drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

   1 /*******************************************************************************
   2   STMMAC Ethtool support
   3
   4   Copyright (C) 2007-2009  STMicroelectronics Ltd
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  23 *******************************************************************************/
  24
  25 #include <linux/etherdevice.h>
  26 #include <linux/ethtool.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/mii.h>
  29 #include <linux/phy.h>
  30 #include <linux/net_tstamp.h>
  31 #include <asm/io.h>
  32
  33 #include "stmmac.h"
  34 #include "dwmac_dma.h"
  35
  36 #define REG_SPACE_SIZE  0x1054
  37 #define MAC100_ETHTOOL_NAME     "st_mac100"
  38 #define GMAC_ETHTOOL_NAME       "st_gmac"
  39
  40 struct stmmac_stats {
  41         char stat_string[ETH_GSTRING_LEN];
  42         int sizeof_stat;
  43         int stat_offset;
  44 };
  45
  46 #define STMMAC_STAT(m)  \
  47         { #m, FIELD_SIZEOF(struct stmmac_extra_stats, m),       \
  48         offsetof(struct stmmac_priv, xstats.m)}
  49
  50 static const struct stmmac_stats stmmac_gstrings_stats[] = {
  51         /* Transmit errors */
  52         STMMAC_STAT(tx_underflow),
  53         STMMAC_STAT(tx_carrier),
  54         STMMAC_STAT(tx_losscarrier),
  55         STMMAC_STAT(vlan_tag),
  56         STMMAC_STAT(tx_deferred),
  57         STMMAC_STAT(tx_vlan),
  58         STMMAC_STAT(tx_jabber),
  59         STMMAC_STAT(tx_frame_flushed),
  60         STMMAC_STAT(tx_payload_error),
  61         STMMAC_STAT(tx_ip_header_error),
  62         /* Receive errors */
  63         STMMAC_STAT(rx_desc),
  64         STMMAC_STAT(sa_filter_fail),
  65         STMMAC_STAT(overflow_error),
  66         STMMAC_STAT(ipc_csum_error),
  67         STMMAC_STAT(rx_collision),
  68         STMMAC_STAT(rx_crc),
  69         STMMAC_STAT(dribbling_bit),
  70         STMMAC_STAT(rx_length),
  71         STMMAC_STAT(rx_mii),
  72         STMMAC_STAT(rx_multicast),
  73         STMMAC_STAT(rx_gmac_overflow),
  74         STMMAC_STAT(rx_watchdog),
  75         STMMAC_STAT(da_rx_filter_fail),
  76         STMMAC_STAT(sa_rx_filter_fail),
  77         STMMAC_STAT(rx_missed_cntr),
  78         STMMAC_STAT(rx_overflow_cntr),
  79         STMMAC_STAT(rx_vlan),
  80         /* Tx/Rx IRQ error info */
  81         STMMAC_STAT(tx_undeflow_irq),
  82         STMMAC_STAT(tx_process_stopped_irq),
  83         STMMAC_STAT(tx_jabber_irq),
  84         STMMAC_STAT(rx_overflow_irq),
  85         STMMAC_STAT(rx_buf_unav_irq),
  86         STMMAC_STAT(rx_process_stopped_irq),
  87         STMMAC_STAT(rx_watchdog_irq),
  88         STMMAC_STAT(tx_early_irq),
  89         STMMAC_STAT(fatal_bus_error_irq),
  90         /* Tx/Rx IRQ Events */
  91         STMMAC_STAT(rx_early_irq),
  92         STMMAC_STAT(threshold),
  93         STMMAC_STAT(tx_pkt_n),
  94         STMMAC_STAT(rx_pkt_n),
  95         STMMAC_STAT(normal_irq_n),
  96         STMMAC_STAT(rx_normal_irq_n),
  97         STMMAC_STAT(napi_poll),
  98         STMMAC_STAT(tx_normal_irq_n),
  99         STMMAC_STAT(tx_clean),
 100         STMMAC_STAT(tx_reset_ic_bit),
 101         STMMAC_STAT(irq_receive_pmt_irq_n),
 102         /* MMC info */
 103         STMMAC_STAT(mmc_tx_irq_n),
 104         STMMAC_STAT(mmc_rx_irq_n),
 105         STMMAC_STAT(mmc_rx_csum_offload_irq_n),
 106         /* EEE */
 107         STMMAC_STAT(irq_tx_path_in_lpi_mode_n),
 108         STMMAC_STAT(irq_tx_path_exit_lpi_mode_n),
 109         STMMAC_STAT(irq_rx_path_in_lpi_mode_n),
 110         STMMAC_STAT(irq_rx_path_exit_lpi_mode_n),
 111         STMMAC_STAT(phy_eee_wakeup_error_n),
 112         /* Extended RDES status */
 113         STMMAC_STAT(ip_hdr_err),
 114         STMMAC_STAT(ip_payload_err),
 115         STMMAC_STAT(ip_csum_bypassed),
 116         STMMAC_STAT(ipv4_pkt_rcvd),
 117         STMMAC_STAT(ipv6_pkt_rcvd),
 118         STMMAC_STAT(rx_msg_type_ext_no_ptp),
 119         STMMAC_STAT(rx_msg_type_sync),
 120         STMMAC_STAT(rx_msg_type_follow_up),
 121         STMMAC_STAT(rx_msg_type_delay_req),
 122         STMMAC_STAT(rx_msg_type_delay_resp),
 123         STMMAC_STAT(rx_msg_type_pdelay_req),
 124         STMMAC_STAT(rx_msg_type_pdelay_resp),
 125         STMMAC_STAT(rx_msg_type_pdelay_follow_up),
 126         STMMAC_STAT(ptp_frame_type),
 127         STMMAC_STAT(ptp_ver),
 128         STMMAC_STAT(timestamp_dropped),
 129         STMMAC_STAT(av_pkt_rcvd),
 130         STMMAC_STAT(av_tagged_pkt_rcvd),
 131         STMMAC_STAT(vlan_tag_priority_val),
 132         STMMAC_STAT(l3_filter_match),
 133         STMMAC_STAT(l4_filter_match),
 134         STMMAC_STAT(l3_l4_filter_no_match),
 135         /* PCS */
 136         STMMAC_STAT(irq_pcs_ane_n),
 137         STMMAC_STAT(irq_pcs_link_n),
 138         STMMAC_STAT(irq_rgmii_n),
 139         /* DEBUG */
 140         STMMAC_STAT(mtl_tx_status_fifo_full),
 141         STMMAC_STAT(mtl_tx_fifo_not_empty),
 142         STMMAC_STAT(mmtl_fifo_ctrl),
 143         STMMAC_STAT(mtl_tx_fifo_read_ctrl_write),
 144         STMMAC_STAT(mtl_tx_fifo_read_ctrl_wait),
 145         STMMAC_STAT(mtl_tx_fifo_read_ctrl_read),
 146         STMMAC_STAT(mtl_tx_fifo_read_ctrl_idle),
 147         STMMAC_STAT(mac_tx_in_pause),
 148         STMMAC_STAT(mac_tx_frame_ctrl_xfer),
 149         STMMAC_STAT(mac_tx_frame_ctrl_idle),
 150         STMMAC_STAT(mac_tx_frame_ctrl_wait),
 151         STMMAC_STAT(mac_tx_frame_ctrl_pause),
 152         STMMAC_STAT(mac_gmii_tx_proto_engine),
 153         STMMAC_STAT(mtl_rx_fifo_fill_level_full),
 154         STMMAC_STAT(mtl_rx_fifo_fill_above_thresh),
 155         STMMAC_STAT(mtl_rx_fifo_fill_below_thresh),
 156         STMMAC_STAT(mtl_rx_fifo_fill_level_empty),
 157         STMMAC_STAT(mtl_rx_fifo_read_ctrl_flush),
 158         STMMAC_STAT(mtl_rx_fifo_read_ctrl_read_data),
 159         STMMAC_STAT(mtl_rx_fifo_read_ctrl_status),
 160         STMMAC_STAT(mtl_rx_fifo_read_ctrl_idle),
 161         STMMAC_STAT(mtl_rx_fifo_ctrl_active),
 162         STMMAC_STAT(mac_rx_frame_ctrl_fifo),
 163         STMMAC_STAT(mac_gmii_rx_proto_engine),
 164 };
 165 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
 166
 167 /* HW MAC Management counters (if supported) */
 168 #define STMMAC_MMC_STAT(m)      \
 169         { #m, FIELD_SIZEOF(struct stmmac_counters, m),  \
 170         offsetof(struct stmmac_priv, mmc.m)}
 171
 172 static const struct stmmac_stats stmmac_mmc[] = {
 173         STMMAC_MMC_STAT(mmc_tx_octetcount_gb),
 174         STMMAC_MMC_STAT(mmc_tx_framecount_gb),
 175         STMMAC_MMC_STAT(mmc_tx_broadcastframe_g),
 176         STMMAC_MMC_STAT(mmc_tx_multicastframe_g),
 177         STMMAC_MMC_STAT(mmc_tx_64_octets_gb),
 178         STMMAC_MMC_STAT(mmc_tx_65_to_127_octets_gb),
 179         STMMAC_MMC_STAT(mmc_tx_128_to_255_octets_gb),
 180         STMMAC_MMC_STAT(mmc_tx_256_to_511_octets_gb),
 181         STMMAC_MMC_STAT(mmc_tx_512_to_1023_octets_gb),
 182         STMMAC_MMC_STAT(mmc_tx_1024_to_max_octets_gb),
 183         STMMAC_MMC_STAT(mmc_tx_unicast_gb),
 184         STMMAC_MMC_STAT(mmc_tx_multicast_gb),
 185         STMMAC_MMC_STAT(mmc_tx_broadcast_gb),
 186         STMMAC_MMC_STAT(mmc_tx_underflow_error),
 187         STMMAC_MMC_STAT(mmc_tx_singlecol_g),
 188         STMMAC_MMC_STAT(mmc_tx_multicol_g),
 189         STMMAC_MMC_STAT(mmc_tx_deferred),
 190         STMMAC_MMC_STAT(mmc_tx_latecol),
 191         STMMAC_MMC_STAT(mmc_tx_exesscol),
 192         STMMAC_MMC_STAT(mmc_tx_carrier_error),
 193         STMMAC_MMC_STAT(mmc_tx_octetcount_g),
 194         STMMAC_MMC_STAT(mmc_tx_framecount_g),
 195         STMMAC_MMC_STAT(mmc_tx_excessdef),
 196         STMMAC_MMC_STAT(mmc_tx_pause_frame),
 197         STMMAC_MMC_STAT(mmc_tx_vlan_frame_g),
 198         STMMAC_MMC_STAT(mmc_rx_framecount_gb),
 199         STMMAC_MMC_STAT(mmc_rx_octetcount_gb),
 200         STMMAC_MMC_STAT(mmc_rx_octetcount_g),
 201         STMMAC_MMC_STAT(mmc_rx_broadcastframe_g),
 202         STMMAC_MMC_STAT(mmc_rx_multicastframe_g),
 203         STMMAC_MMC_STAT(mmc_rx_crc_error),
 204         STMMAC_MMC_STAT(mmc_rx_align_error),
 205         STMMAC_MMC_STAT(mmc_rx_run_error),
 206         STMMAC_MMC_STAT(mmc_rx_jabber_error),
 207         STMMAC_MMC_STAT(mmc_rx_undersize_g),
 208         STMMAC_MMC_STAT(mmc_rx_oversize_g),
 209         STMMAC_MMC_STAT(mmc_rx_64_octets_gb),
 210         STMMAC_MMC_STAT(mmc_rx_65_to_127_octets_gb),
 211         STMMAC_MMC_STAT(mmc_rx_128_to_255_octets_gb),
 212         STMMAC_MMC_STAT(mmc_rx_256_to_511_octets_gb),
 213         STMMAC_MMC_STAT(mmc_rx_512_to_1023_octets_gb),
 214         STMMAC_MMC_STAT(mmc_rx_1024_to_max_octets_gb),
 215         STMMAC_MMC_STAT(mmc_rx_unicast_g),
 216         STMMAC_MMC_STAT(mmc_rx_length_error),
 217         STMMAC_MMC_STAT(mmc_rx_autofrangetype),
 218         STMMAC_MMC_STAT(mmc_rx_pause_frames),
 219         STMMAC_MMC_STAT(mmc_rx_fifo_overflow),
 220         STMMAC_MMC_STAT(mmc_rx_vlan_frames_gb),
 221         STMMAC_MMC_STAT(mmc_rx_watchdog_error),
 222         STMMAC_MMC_STAT(mmc_rx_ipc_intr_mask),
 223         STMMAC_MMC_STAT(mmc_rx_ipc_intr),
 224         STMMAC_MMC_STAT(mmc_rx_ipv4_gd),
 225         STMMAC_MMC_STAT(mmc_rx_ipv4_hderr),
 226         STMMAC_MMC_STAT(mmc_rx_ipv4_nopay),
 227         STMMAC_MMC_STAT(mmc_rx_ipv4_frag),
 228         STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl),
 229         STMMAC_MMC_STAT(mmc_rx_ipv4_gd_octets),
 230         STMMAC_MMC_STAT(mmc_rx_ipv4_hderr_octets),
 231         STMMAC_MMC_STAT(mmc_rx_ipv4_nopay_octets),
 232         STMMAC_MMC_STAT(mmc_rx_ipv4_frag_octets),
 233         STMMAC_MMC_STAT(mmc_rx_ipv4_udsbl_octets),
 234         STMMAC_MMC_STAT(mmc_rx_ipv6_gd_octets),
 235         STMMAC_MMC_STAT(mmc_rx_ipv6_hderr_octets),
 236         STMMAC_MMC_STAT(mmc_rx_ipv6_nopay_octets),
 237         STMMAC_MMC_STAT(mmc_rx_ipv6_gd),
 238         STMMAC_MMC_STAT(mmc_rx_ipv6_hderr),
 239         STMMAC_MMC_STAT(mmc_rx_ipv6_nopay),
 240         STMMAC_MMC_STAT(mmc_rx_udp_gd),
 241         STMMAC_MMC_STAT(mmc_rx_udp_err),
 242         STMMAC_MMC_STAT(mmc_rx_tcp_gd),
 243         STMMAC_MMC_STAT(mmc_rx_tcp_err),
 244         STMMAC_MMC_STAT(mmc_rx_icmp_gd),
 245         STMMAC_MMC_STAT(mmc_rx_icmp_err),
 246         STMMAC_MMC_STAT(mmc_rx_udp_gd_octets),
 247         STMMAC_MMC_STAT(mmc_rx_udp_err_octets),
 248         STMMAC_MMC_STAT(mmc_rx_tcp_gd_octets),
 249         STMMAC_MMC_STAT(mmc_rx_tcp_err_octets),
 250         STMMAC_MMC_STAT(mmc_rx_icmp_gd_octets),
 251         STMMAC_MMC_STAT(mmc_rx_icmp_err_octets),
 252 };
 253 #define STMMAC_MMC_STATS_LEN ARRAY_SIZE(stmmac_mmc)
 254
 255 static void stmmac_ethtool_getdrvinfo(struct net_device *dev,
 256                                       struct ethtool_drvinfo *info)
 257 {
 258         struct stmmac_priv *priv = netdev_priv(dev);
 259
 260         if (priv->plat->has_gmac)
 261                 strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
 262         else
 263                 strlcpy(info->driver, MAC100_ETHTOOL_NAME,
 264                         sizeof(info->driver));
 265
 266         strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
 267 }
 268
 269 static int stmmac_ethtool_getsettings(struct net_device *dev,
 270                                       struct ethtool_cmd *cmd)
 271 {
 272         struct stmmac_priv *priv = netdev_priv(dev);
 273         struct phy_device *phy = priv->phydev;
 274         int rc;
 275
 276         if ((priv->pcs & STMMAC_PCS_RGMII) || (priv->pcs & STMMAC_PCS_SGMII)) {
 277                 struct rgmii_adv adv;
 278
 279                 if (!priv->xstats.pcs_link) {
 280                         ethtool_cmd_speed_set(cmd, SPEED_UNKNOWN);
 281                         cmd->duplex = DUPLEX_UNKNOWN;
 282                         return 0;
 283                 }
 284                 cmd->duplex = priv->xstats.pcs_duplex;
 285
 286                 ethtool_cmd_speed_set(cmd, priv->xstats.pcs_speed);
 287
 288                 /* Get and convert ADV/LP_ADV from the HW AN registers */
 289                 if (!priv->hw->mac->get_adv)
 290                         return -EOPNOTSUPP;     /* should never happen indeed */
 291
 292                 priv->hw->mac->get_adv(priv->hw, &adv);
 293
 294                 /* Encoding of PSE bits is defined in 802.3z, 37.2.1.4 */
 295
 296                 if (adv.pause & STMMAC_PCS_PAUSE)
 297                         cmd->advertising |= ADVERTISED_Pause;
 298                 if (adv.pause & STMMAC_PCS_ASYM_PAUSE)
 299                         cmd->advertising |= ADVERTISED_Asym_Pause;
 300                 if (adv.lp_pause & STMMAC_PCS_PAUSE)
 301                         cmd->lp_advertising |= ADVERTISED_Pause;
 302                 if (adv.lp_pause & STMMAC_PCS_ASYM_PAUSE)
 303                         cmd->lp_advertising |= ADVERTISED_Asym_Pause;
 304
 305                 /* Reg49[3] always set because ANE is always supported */
 306                 cmd->autoneg = ADVERTISED_Autoneg;
 307                 cmd->supported |= SUPPORTED_Autoneg;
 308                 cmd->advertising |= ADVERTISED_Autoneg;
 309                 cmd->lp_advertising |= ADVERTISED_Autoneg;
 310
 311                 if (adv.duplex) {
 312                         cmd->supported |= (SUPPORTED_1000baseT_Full |
 313                                            SUPPORTED_100baseT_Full |
 314                                            SUPPORTED_10baseT_Full);
 315                         cmd->advertising |= (ADVERTISED_1000baseT_Full |
 316                                              ADVERTISED_100baseT_Full |
 317                                              ADVERTISED_10baseT_Full);
 318                 } else {
 319                         cmd->supported |= (SUPPORTED_1000baseT_Half |
 320                                            SUPPORTED_100baseT_Half |
 321                                            SUPPORTED_10baseT_Half);
 322                         cmd->advertising |= (ADVERTISED_1000baseT_Half |
 323                                              ADVERTISED_100baseT_Half |
 324                                              ADVERTISED_10baseT_Half);
 325                 }
 326                 if (adv.lp_duplex)
 327                         cmd->lp_advertising |= (ADVERTISED_1000baseT_Full |
 328                                                 ADVERTISED_100baseT_Full |
 329                                                 ADVERTISED_10baseT_Full);
 330                 else
 331                         cmd->lp_advertising |= (ADVERTISED_1000baseT_Half |
 332                                                 ADVERTISED_100baseT_Half |
 333                                                 ADVERTISED_10baseT_Half);
 334                 cmd->port = PORT_OTHER;
 335
 336                 return 0;
 337         }
 338
 339         if (phy == NULL) {
 340                 pr_err("%s: %s: PHY is not registered\n",
 341                        __func__, dev->name);
 342                 return -ENODEV;
 343         }
 344         if (!netif_running(dev)) {
 345                 pr_err("%s: interface is disabled: we cannot track "
 346                 "link speed / duplex setting\n", dev->name);
 347                 return -EBUSY;
 348         }
 349         cmd->transceiver = XCVR_INTERNAL;
 350         rc = phy_ethtool_gset(phy, cmd);
 351         return rc;
 352 }
 353
 354 static int stmmac_ethtool_setsettings(struct net_device *dev,
 355                                       struct ethtool_cmd *cmd)
 356 {
 357         struct stmmac_priv *priv = netdev_priv(dev);
 358         struct phy_device *phy = priv->phydev;
 359         int rc;
 360
 361         if ((priv->pcs & STMMAC_PCS_RGMII) || (priv->pcs & STMMAC_PCS_SGMII)) {
 362                 u32 mask = ADVERTISED_Autoneg | ADVERTISED_Pause;
 363
 364                 /* Only support ANE */
 365                 if (cmd->autoneg != AUTONEG_ENABLE)
 366                         return -EINVAL;
 367
 368                 mask &= (ADVERTISED_1000baseT_Half |
 369                         ADVERTISED_1000baseT_Full |
 370                         ADVERTISED_100baseT_Half |
 371                         ADVERTISED_100baseT_Full |
 372                         ADVERTISED_10baseT_Half |
 373                         ADVERTISED_10baseT_Full);
 374
 375                 spin_lock(&priv->lock);
 376                 if (priv->hw->mac->ctrl_ane)
 377                         priv->hw->mac->ctrl_ane(priv->hw, 1);
 378                 spin_unlock(&priv->lock);
 379
 380                 return 0;
 381         }
 382
 383         spin_lock(&priv->lock);
 384         rc = phy_ethtool_sset(phy, cmd);
 385         spin_unlock(&priv->lock);
 386
 387         return rc;
 388 }
 389
 390 static u32 stmmac_ethtool_getmsglevel(struct net_device *dev)
 391 {
 392         struct stmmac_priv *priv = netdev_priv(dev);
 393         return priv->msg_enable;
 394 }
 395
 396 static void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level)
 397 {
 398         struct stmmac_priv *priv = netdev_priv(dev);
 399         priv->msg_enable = level;
 400
 401 }
 402
 403 static int stmmac_check_if_running(struct net_device *dev)
 404 {
 405         if (!netif_running(dev))
 406                 return -EBUSY;
 407         return 0;
 408 }
 409
 410 static int stmmac_ethtool_get_regs_len(struct net_device *dev)
 411 {
 412         return REG_SPACE_SIZE;
 413 }
 414
 415 static void stmmac_ethtool_gregs(struct net_device *dev,
 416                           struct ethtool_regs *regs, void *space)
 417 {
 418         int i;
 419         u32 *reg_space = (u32 *) space;
 420
 421         struct stmmac_priv *priv = netdev_priv(dev);
 422
 423         memset(reg_space, 0x0, REG_SPACE_SIZE);
 424
 425         if (!priv->plat->has_gmac) {
 426                 /* MAC registers */
 427                 for (i = 0; i < 12; i++)
 428                         reg_space[i] = readl(priv->ioaddr + (i * 4));
 429                 /* DMA registers */
 430                 for (i = 0; i < 9; i++)
 431                         reg_space[i + 12] =
 432                             readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4)));
 433                 reg_space[22] = readl(priv->ioaddr + DMA_CUR_TX_BUF_ADDR);
 434                 reg_space[23] = readl(priv->ioaddr + DMA_CUR_RX_BUF_ADDR);
 435         } else {
 436                 /* MAC registers */
 437                 for (i = 0; i < 55; i++)
 438                         reg_space[i] = readl(priv->ioaddr + (i * 4));
 439                 /* DMA registers */
 440                 for (i = 0; i < 22; i++)
 441                         reg_space[i + 55] =
 442                             readl(priv->ioaddr + (DMA_BUS_MODE + (i * 4)));
 443         }
 444 }
 445
 446 static void
 447 stmmac_get_pauseparam(struct net_device *netdev,
 448                       struct ethtool_pauseparam *pause)
 449 {
 450         struct stmmac_priv *priv = netdev_priv(netdev);
 451
 452         if (priv->pcs)  /* FIXME */
 453                 return;
 454
 455         pause->rx_pause = 0;
 456         pause->tx_pause = 0;
 457         pause->autoneg = priv->phydev->autoneg;
 458
 459         if (priv->flow_ctrl & FLOW_RX)
 460                 pause->rx_pause = 1;
 461         if (priv->flow_ctrl & FLOW_TX)
 462                 pause->tx_pause = 1;
 463
 464 }
 465
 466 static int
 467 stmmac_set_pauseparam(struct net_device *netdev,
 468                       struct ethtool_pauseparam *pause)
 469 {
 470         struct stmmac_priv *priv = netdev_priv(netdev);
 471         struct phy_device *phy = priv->phydev;
 472         int new_pause = FLOW_OFF;
 473         int ret = 0;
 474
 475         if (priv->pcs)  /* FIXME */
 476                 return -EOPNOTSUPP;
 477
 478         if (pause->rx_pause)
 479                 new_pause |= FLOW_RX;
 480         if (pause->tx_pause)
 481                 new_pause |= FLOW_TX;
 482
 483         priv->flow_ctrl = new_pause;
 484         phy->autoneg = pause->autoneg;
 485
 486         if (phy->autoneg) {
 487                 if (netif_running(netdev))
 488                         ret = phy_start_aneg(phy);
 489         } else
 490                 priv->hw->mac->flow_ctrl(priv->hw, phy->duplex,
 491                                          priv->flow_ctrl, priv->pause);
 492         return ret;
 493 }
 494
 495 static void stmmac_get_ethtool_stats(struct net_device *dev,
 496                                  struct ethtool_stats *dummy, u64 *data)
 497 {
 498         struct stmmac_priv *priv = netdev_priv(dev);
 499         int i, j = 0;
 500
 501         /* Update the DMA HW counters for dwmac10/100 */
 502         if (!priv->plat->has_gmac)
 503                 priv->hw->dma->dma_diagnostic_fr(&dev->stats,
 504                                                  (void *) &priv->xstats,
 505                                                  priv->ioaddr);
 506         else {
 507                 /* If supported, for new GMAC chips expose the MMC counters */
 508                 if (priv->dma_cap.rmon) {
 509                         dwmac_mmc_read(priv->ioaddr, &priv->mmc);
 510
 511                         for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
 512                                 char *p;
 513                                 p = (char *)priv + stmmac_mmc[i].stat_offset;
 514
 515                                 data[j++] = (stmmac_mmc[i].sizeof_stat ==
 516                                              sizeof(u64)) ? (*(u64 *)p) :
 517                                              (*(u32 *)p);
 518                         }
 519                 }
 520                 if (priv->eee_enabled) {
 521                         int val = phy_get_eee_err(priv->phydev);
 522                         if (val)
 523                                 priv->xstats.phy_eee_wakeup_error_n = val;
 524                 }
 525
 526                 if ((priv->hw->mac->debug) &&
 527                     (priv->synopsys_id >= DWMAC_CORE_3_50))
 528                         priv->hw->mac->debug(priv->ioaddr,
 529                                              (void *)&priv->xstats);
 530         }
 531         for (i = 0; i < STMMAC_STATS_LEN; i++) {
 532                 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
 533                 data[j++] = (stmmac_gstrings_stats[i].sizeof_stat ==
 534                              sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
 535         }
 536 }
 537
 538 static int stmmac_get_sset_count(struct net_device *netdev, int sset)
 539 {
 540         struct stmmac_priv *priv = netdev_priv(netdev);
 541         int len;
 542
 543         switch (sset) {
 544         case ETH_SS_STATS:
 545                 len = STMMAC_STATS_LEN;
 546
 547                 if (priv->dma_cap.rmon)
 548                         len += STMMAC_MMC_STATS_LEN;
 549
 550                 return len;
 551         default:
 552                 return -EOPNOTSUPP;
 553         }
 554 }
 555
 556 static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
 557 {
 558         int i;
 559         u8 *p = data;
 560         struct stmmac_priv *priv = netdev_priv(dev);
 561
 562         switch (stringset) {
 563         case ETH_SS_STATS:
 564                 if (priv->dma_cap.rmon)
 565                         for (i = 0; i < STMMAC_MMC_STATS_LEN; i++) {
 566                                 memcpy(p, stmmac_mmc[i].stat_string,
 567                                        ETH_GSTRING_LEN);
 568                                 p += ETH_GSTRING_LEN;
 569                         }
 570                 for (i = 0; i < STMMAC_STATS_LEN; i++) {
 571                         memcpy(p, stmmac_gstrings_stats[i].stat_string,
 572                                 ETH_GSTRING_LEN);
 573                         p += ETH_GSTRING_LEN;
 574                 }
 575                 break;
 576         default:
 577                 WARN_ON(1);
 578                 break;
 579         }
 580 }
 581
 582 /* Currently only support WOL through Magic packet. */
 583 static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 584 {
 585         struct stmmac_priv *priv = netdev_priv(dev);
 586
 587         spin_lock_irq(&priv->lock);
 588         if (device_can_wakeup(priv->device)) {
 589                 wol->supported = WAKE_MAGIC | WAKE_UCAST;
 590                 wol->wolopts = priv->wolopts;
 591         }
 592         spin_unlock_irq(&priv->lock);
 593 }
 594
 595 static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
 596 {
 597         struct stmmac_priv *priv = netdev_priv(dev);
 598         u32 support = WAKE_MAGIC | WAKE_UCAST;
 599
 600         /* By default almost all GMAC devices support the WoL via
 601          * magic frame but we can disable it if the HW capability
 602          * register shows no support for pmt_magic_frame. */
 603         if ((priv->hw_cap_support) && (!priv->dma_cap.pmt_magic_frame))
 604                 wol->wolopts &= ~WAKE_MAGIC;
 605
 606         if (!device_can_wakeup(priv->device))
 607                 return -EINVAL;
 608
 609         if (wol->wolopts & ~support)
 610                 return -EINVAL;
 611
 612         if (wol->wolopts) {
 613                 pr_info("stmmac: wakeup enable\n");
 614                 device_set_wakeup_enable(priv->device, 1);
 615                 enable_irq_wake(priv->wol_irq);
 616         } else {
 617                 device_set_wakeup_enable(priv->device, 0);
 618                 disable_irq_wake(priv->wol_irq);
 619         }
 620
 621         spin_lock_irq(&priv->lock);
 622         priv->wolopts = wol->wolopts;
 623         spin_unlock_irq(&priv->lock);
 624
 625         return 0;
 626 }
 627
 628 static int stmmac_ethtool_op_get_eee(struct net_device *dev,
 629                                      struct ethtool_eee *edata)
 630 {
 631         struct stmmac_priv *priv = netdev_priv(dev);
 632
 633         if (!priv->dma_cap.eee)
 634                 return -EOPNOTSUPP;
 635
 636         edata->eee_enabled = priv->eee_enabled;
 637         edata->eee_active = priv->eee_active;
 638         edata->tx_lpi_timer = priv->tx_lpi_timer;
 639
 640         return phy_ethtool_get_eee(priv->phydev, edata);
 641 }
 642
 643 static int stmmac_ethtool_op_set_eee(struct net_device *dev,
 644                                      struct ethtool_eee *edata)
 645 {
 646         struct stmmac_priv *priv = netdev_priv(dev);
 647
 648         priv->eee_enabled = edata->eee_enabled;
 649
 650         if (!priv->eee_enabled)
 651                 stmmac_disable_eee_mode(priv);
 652         else {
 653                 /* We are asking for enabling the EEE but it is safe
 654                  * to verify all by invoking the eee_init function.
 655                  * In case of failure it will return an error.
 656                  */
 657                 priv->eee_enabled = stmmac_eee_init(priv);
 658                 if (!priv->eee_enabled)
 659                         return -EOPNOTSUPP;
 660
 661                 /* Do not change tx_lpi_timer in case of failure */
 662                 priv->tx_lpi_timer = edata->tx_lpi_timer;
 663         }
 664
 665         return phy_ethtool_set_eee(priv->phydev, edata);
 666 }
 667
 668 static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
 669 {
 670         unsigned long clk = clk_get_rate(priv->stmmac_clk);
 671
 672         if (!clk)
 673                 return 0;
 674
 675         return (usec * (clk / 1000000)) / 256;
 676 }
 677
 678 static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
 679 {
 680         unsigned long clk = clk_get_rate(priv->stmmac_clk);
 681
 682         if (!clk)
 683                 return 0;
 684
 685         return (riwt * 256) / (clk / 1000000);
 686 }
 687
 688 static int stmmac_get_coalesce(struct net_device *dev,
 689                                struct ethtool_coalesce *ec)
 690 {
 691         struct stmmac_priv *priv = netdev_priv(dev);
 692
 693         ec->tx_coalesce_usecs = priv->tx_coal_timer;
 694         ec->tx_max_coalesced_frames = priv->tx_coal_frames;
 695
 696         if (priv->use_riwt)
 697                 ec->rx_coalesce_usecs = stmmac_riwt2usec(priv->rx_riwt, priv);
 698
 699         return 0;
 700 }
 701
 702 static int stmmac_set_coalesce(struct net_device *dev,
 703                                struct ethtool_coalesce *ec)
 704 {
 705         struct stmmac_priv *priv = netdev_priv(dev);
 706         unsigned int rx_riwt;
 707
 708         /* Check not supported parameters  */
 709         if ((ec->rx_max_coalesced_frames) || (ec->rx_coalesce_usecs_irq) ||
 710             (ec->rx_max_coalesced_frames_irq) || (ec->tx_coalesce_usecs_irq) ||
 711             (ec->use_adaptive_rx_coalesce) || (ec->use_adaptive_tx_coalesce) ||
 712             (ec->pkt_rate_low) || (ec->rx_coalesce_usecs_low) ||
 713             (ec->rx_max_coalesced_frames_low) || (ec->tx_coalesce_usecs_high) ||
 714             (ec->tx_max_coalesced_frames_low) || (ec->pkt_rate_high) ||
 715             (ec->tx_coalesce_usecs_low) || (ec->rx_coalesce_usecs_high) ||
 716             (ec->rx_max_coalesced_frames_high) ||
 717             (ec->tx_max_coalesced_frames_irq) ||
 718             (ec->stats_block_coalesce_usecs) ||
 719             (ec->tx_max_coalesced_frames_high) || (ec->rate_sample_interval))
 720                 return -EOPNOTSUPP;
 721
 722         if (ec->rx_coalesce_usecs == 0)
 723                 return -EINVAL;
 724
 725         if ((ec->tx_coalesce_usecs == 0) &&
 726             (ec->tx_max_coalesced_frames == 0))
 727                 return -EINVAL;
 728
 729         if ((ec->tx_coalesce_usecs > STMMAC_MAX_COAL_TX_TICK) ||
 730             (ec->tx_max_coalesced_frames > STMMAC_TX_MAX_FRAMES))
 731                 return -EINVAL;
 732
 733         rx_riwt = stmmac_usec2riwt(ec->rx_coalesce_usecs, priv);
 734
 735         if ((rx_riwt > MAX_DMA_RIWT) || (rx_riwt < MIN_DMA_RIWT))
 736                 return -EINVAL;
 737         else if (!priv->use_riwt)
 738                 return -EOPNOTSUPP;
 739
 740         /* Only copy relevant parameters, ignore all others. */
 741         priv->tx_coal_frames = ec->tx_max_coalesced_frames;
 742         priv->tx_coal_timer = ec->tx_coalesce_usecs;
 743         priv->rx_riwt = rx_riwt;
 744         priv->hw->dma->rx_watchdog(priv->ioaddr, priv->rx_riwt);
 745
 746         return 0;
 747 }
 748
 749 static int stmmac_get_ts_info(struct net_device *dev,
 750                               struct ethtool_ts_info *info)
 751 {
 752         struct stmmac_priv *priv = netdev_priv(dev);
 753
 754         if ((priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) {
 755
 756                 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
 757                                         SOF_TIMESTAMPING_TX_HARDWARE |
 758                                         SOF_TIMESTAMPING_RX_SOFTWARE |
 759                                         SOF_TIMESTAMPING_RX_HARDWARE |
 760                                         SOF_TIMESTAMPING_SOFTWARE |
 761                                         SOF_TIMESTAMPING_RAW_HARDWARE;
 762
 763                 if (priv->ptp_clock)
 764                         info->phc_index = ptp_clock_index(priv->ptp_clock);
 765
 766                 info->tx_types = (1 << HWTSTAMP_TX_OFF) | (1 << HWTSTAMP_TX_ON);
 767
 768                 info->rx_filters = ((1 << HWTSTAMP_FILTER_NONE) |
 769                                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_EVENT) |
 770                                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
 771                                     (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
 772                                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
 773                                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
 774                                     (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) |
 775                                     (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
 776                                     (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
 777                                     (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
 778                                     (1 << HWTSTAMP_FILTER_ALL));
 779                 return 0;
 780         } else
 781                 return ethtool_op_get_ts_info(dev, info);
 782 }
 783
 784 static const struct ethtool_ops stmmac_ethtool_ops = {
 785         .begin = stmmac_check_if_running,
 786         .get_drvinfo = stmmac_ethtool_getdrvinfo,
 787         .get_settings = stmmac_ethtool_getsettings,
 788         .set_settings = stmmac_ethtool_setsettings,
 789         .get_msglevel = stmmac_ethtool_getmsglevel,
 790         .set_msglevel = stmmac_ethtool_setmsglevel,
 791         .get_regs = stmmac_ethtool_gregs,
 792         .get_regs_len = stmmac_ethtool_get_regs_len,
 793         .get_link = ethtool_op_get_link,
 794         .get_pauseparam = stmmac_get_pauseparam,
 795         .set_pauseparam = stmmac_set_pauseparam,
 796         .get_ethtool_stats = stmmac_get_ethtool_stats,
 797         .get_strings = stmmac_get_strings,
 798         .get_wol = stmmac_get_wol,
 799         .set_wol = stmmac_set_wol,
 800         .get_eee = stmmac_ethtool_op_get_eee,
 801         .set_eee = stmmac_ethtool_op_set_eee,
 802         .get_sset_count = stmmac_get_sset_count,
 803         .get_ts_info = stmmac_get_ts_info,
 804         .get_coalesce = stmmac_get_coalesce,
 805         .set_coalesce = stmmac_set_coalesce,
 806 };
 807
 808 void stmmac_set_ethtool_ops(struct net_device *netdev)
 809 {
 810         netdev->ethtool_ops = &stmmac_ethtool_ops;
 811 }