drivers/net/ethernet/stmicro/stmmac/stmmac_main.c

   1 /*******************************************************************************
   2   This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
   3   ST Ethernet IPs are built around a Synopsys IP Core.
   4
   5   Copyright (C) 2007-2009  STMicroelectronics Ltd
   6
   7   This program is free software; you can redistribute it and/or modify it
   8   under the terms and conditions of the GNU General Public License,
   9   version 2, as published by the Free Software Foundation.
  10
  11   This program is distributed in the hope it will be useful, but WITHOUT
  12   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14   more details.
  15
  16   You should have received a copy of the GNU General Public License along with
  17   this program; if not, write to the Free Software Foundation, Inc.,
  18   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19
  20   The full GNU General Public License is included in this distribution in
  21   the file called "COPYING".
  22
  23   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  24
  25   Documentation available at:
  26         http://www.stlinux.com
  27   Support available at:
  28         https://bugzilla.stlinux.com/
  29 *******************************************************************************/
  30
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/kernel.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/etherdevice.h>
  36 #include <linux/platform_device.h>
  37 #include <linux/ip.h>
  38 #include <linux/tcp.h>
  39 #include <linux/skbuff.h>
  40 #include <linux/ethtool.h>
  41 #include <linux/if_ether.h>
  42 #include <linux/crc32.h>
  43 #include <linux/mii.h>
  44 #include <linux/phy.h>
  45 #include <linux/if.h>
  46 #include <linux/if_vlan.h>
  47 #include <linux/dma-mapping.h>
  48 #include <linux/slab.h>
  49 #include <linux/prefetch.h>
  50 #include "stmmac.h"
  51 #ifdef CONFIG_STMMAC_DEBUG_FS
  52 #include <linux/debugfs.h>
  53 #include <linux/seq_file.h>
  54 #endif
  55
  56 #define STMMAC_RESOURCE_NAME    "stmmaceth"
  57
  58 #undef STMMAC_DEBUG
  59 /*#define STMMAC_DEBUG*/
  60 #ifdef STMMAC_DEBUG
  61 #define DBG(nlevel, klevel, fmt, args...) \
  62                 ((void)(netif_msg_##nlevel(priv) && \
  63                 printk(KERN_##klevel fmt, ## args)))
  64 #else
  65 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
  66 #endif
  67
  68 #undef STMMAC_RX_DEBUG
  69 /*#define STMMAC_RX_DEBUG*/
  70 #ifdef STMMAC_RX_DEBUG
  71 #define RX_DBG(fmt, args...)  printk(fmt, ## args)
  72 #else
  73 #define RX_DBG(fmt, args...)  do { } while (0)
  74 #endif
  75
  76 #undef STMMAC_XMIT_DEBUG
  77 /*#define STMMAC_XMIT_DEBUG*/
  78 #ifdef STMMAC_TX_DEBUG
  79 #define TX_DBG(fmt, args...)  printk(fmt, ## args)
  80 #else
  81 #define TX_DBG(fmt, args...)  do { } while (0)
  82 #endif
  83
  84 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
  85 #define JUMBO_LEN       9000
  86
  87 /* Module parameters */
  88 #define TX_TIMEO 5000 /* default 5 seconds */
  89 static int watchdog = TX_TIMEO;
  90 module_param(watchdog, int, S_IRUGO | S_IWUSR);
  91 MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
  92
  93 static int debug = -1;          /* -1: default, 0: no output, 16:  all */
  94 module_param(debug, int, S_IRUGO | S_IWUSR);
  95 MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
  96
  97 static int phyaddr = -1;
  98 module_param(phyaddr, int, S_IRUGO);
  99 MODULE_PARM_DESC(phyaddr, "Physical device address");
 100
 101 #define DMA_TX_SIZE 256
 102 static int dma_txsize = DMA_TX_SIZE;
 103 module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
 104 MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
 105
 106 #define DMA_RX_SIZE 256
 107 static int dma_rxsize = DMA_RX_SIZE;
 108 module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
 109 MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
 110
 111 static int flow_ctrl = FLOW_OFF;
 112 module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
 113 MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
 114
 115 static int pause = PAUSE_TIME;
 116 module_param(pause, int, S_IRUGO | S_IWUSR);
 117 MODULE_PARM_DESC(pause, "Flow Control Pause Time");
 118
 119 #define TC_DEFAULT 64
 120 static int tc = TC_DEFAULT;
 121 module_param(tc, int, S_IRUGO | S_IWUSR);
 122 MODULE_PARM_DESC(tc, "DMA threshold control value");
 123
 124 /* Pay attention to tune this parameter; take care of both
 125  * hardware capability and network stabitily/performance impact.
 126  * Many tests showed that ~4ms latency seems to be good enough. */
 127 #ifdef CONFIG_STMMAC_TIMER
 128 #define DEFAULT_PERIODIC_RATE   256
 129 static int tmrate = DEFAULT_PERIODIC_RATE;
 130 module_param(tmrate, int, S_IRUGO | S_IWUSR);
 131 MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
 132 #endif
 133
 134 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
 135 static int buf_sz = DMA_BUFFER_SIZE;
 136 module_param(buf_sz, int, S_IRUGO | S_IWUSR);
 137 MODULE_PARM_DESC(buf_sz, "DMA buffer size");
 138
 139 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
 140                                       NETIF_MSG_LINK | NETIF_MSG_IFUP |
 141                                       NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
 142
 143 static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
 144
 145 /**
 146  * stmmac_verify_args - verify the driver parameters.
 147  * Description: it verifies if some wrong parameter is passed to the driver.
 148  * Note that wrong parameters are replaced with the default values.
 149  */
 150 static void stmmac_verify_args(void)
 151 {
 152         if (unlikely(watchdog < 0))
 153                 watchdog = TX_TIMEO;
 154         if (unlikely(dma_rxsize < 0))
 155                 dma_rxsize = DMA_RX_SIZE;
 156         if (unlikely(dma_txsize < 0))
 157                 dma_txsize = DMA_TX_SIZE;
 158         if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
 159                 buf_sz = DMA_BUFFER_SIZE;
 160         if (unlikely(flow_ctrl > 1))
 161                 flow_ctrl = FLOW_AUTO;
 162         else if (likely(flow_ctrl < 0))
 163                 flow_ctrl = FLOW_OFF;
 164         if (unlikely((pause < 0) || (pause > 0xffff)))
 165                 pause = PAUSE_TIME;
 166 }
 167
 168 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
 169 static void print_pkt(unsigned char *buf, int len)
 170 {
 171         int j;
 172         pr_info("len = %d byte, buf addr: 0x%p", len, buf);
 173         for (j = 0; j < len; j++) {
 174                 if ((j % 16) == 0)
 175                         pr_info("\n %03x:", j);
 176                 pr_info(" %02x", buf[j]);
 177         }
 178         pr_info("\n");
 179 }
 180 #endif
 181
 182 /* minimum number of free TX descriptors required to wake up TX process */
 183 #define STMMAC_TX_THRESH(x)     (x->dma_tx_size/4)
 184
 185 static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
 186 {
 187         return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
 188 }
 189
 190 /* On some ST platforms, some HW system configuraton registers have to be
 191  * set according to the link speed negotiated.
 192  */
 193 static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
 194 {
 195         struct phy_device *phydev = priv->phydev;
 196
 197         if (likely(priv->plat->fix_mac_speed))
 198                 priv->plat->fix_mac_speed(priv->plat->bsp_priv,
 199                                           phydev->speed);
 200 }
 201
 202 /**
 203  * stmmac_adjust_link
 204  * @dev: net device structure
 205  * Description: it adjusts the link parameters.
 206  */
 207 static void stmmac_adjust_link(struct net_device *dev)
 208 {
 209         struct stmmac_priv *priv = netdev_priv(dev);
 210         struct phy_device *phydev = priv->phydev;
 211         unsigned long flags;
 212         int new_state = 0;
 213         unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
 214
 215         if (phydev == NULL)
 216                 return;
 217
 218         DBG(probe, DEBUG, "stmmac_adjust_link: called.  address %d link %d\n",
 219             phydev->addr, phydev->link);
 220
 221         spin_lock_irqsave(&priv->lock, flags);
 222         if (phydev->link) {
 223                 u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
 224
 225                 /* Now we make sure that we can be in full duplex mode.
 226                  * If not, we operate in half-duplex mode. */
 227                 if (phydev->duplex != priv->oldduplex) {
 228                         new_state = 1;
 229                         if (!(phydev->duplex))
 230                                 ctrl &= ~priv->hw->link.duplex;
 231                         else
 232                                 ctrl |= priv->hw->link.duplex;
 233                         priv->oldduplex = phydev->duplex;
 234                 }
 235                 /* Flow Control operation */
 236                 if (phydev->pause)
 237                         priv->hw->mac->flow_ctrl(priv->ioaddr, phydev->duplex,
 238                                                  fc, pause_time);
 239
 240                 if (phydev->speed != priv->speed) {
 241                         new_state = 1;
 242                         switch (phydev->speed) {
 243                         case 1000:
 244                                 if (likely(priv->plat->has_gmac))
 245                                         ctrl &= ~priv->hw->link.port;
 246                                 stmmac_hw_fix_mac_speed(priv);
 247                                 break;
 248                         case 100:
 249                         case 10:
 250                                 if (priv->plat->has_gmac) {
 251                                         ctrl |= priv->hw->link.port;
 252                                         if (phydev->speed == SPEED_100) {
 253                                                 ctrl |= priv->hw->link.speed;
 254                                         } else {
 255                                                 ctrl &= ~(priv->hw->link.speed);
 256                                         }
 257                                 } else {
 258                                         ctrl &= ~priv->hw->link.port;
 259                                 }
 260                                 stmmac_hw_fix_mac_speed(priv);
 261                                 break;
 262                         default:
 263                                 if (netif_msg_link(priv))
 264                                         pr_warning("%s: Speed (%d) is not 10"
 265                                        " or 100!\n", dev->name, phydev->speed);
 266                                 break;
 267                         }
 268
 269                         priv->speed = phydev->speed;
 270                 }
 271
 272                 writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
 273
 274                 if (!priv->oldlink) {
 275                         new_state = 1;
 276                         priv->oldlink = 1;
 277                 }
 278         } else if (priv->oldlink) {
 279                 new_state = 1;
 280                 priv->oldlink = 0;
 281                 priv->speed = 0;
 282                 priv->oldduplex = -1;
 283         }
 284
 285         if (new_state && netif_msg_link(priv))
 286                 phy_print_status(phydev);
 287
 288         spin_unlock_irqrestore(&priv->lock, flags);
 289
 290         DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
 291 }
 292
 293 /**
 294  * stmmac_init_phy - PHY initialization
 295  * @dev: net device structure
 296  * Description: it initializes the driver's PHY state, and attaches the PHY
 297  * to the mac driver.
 298  *  Return value:
 299  *  0 on success
 300  */
 301 static int stmmac_init_phy(struct net_device *dev)
 302 {
 303         struct stmmac_priv *priv = netdev_priv(dev);
 304         struct phy_device *phydev;
 305         char phy_id[MII_BUS_ID_SIZE + 3];
 306         char bus_id[MII_BUS_ID_SIZE];
 307
 308         priv->oldlink = 0;
 309         priv->speed = 0;
 310         priv->oldduplex = -1;
 311
 312         snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->plat->bus_id);
 313         snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
 314                  priv->plat->phy_addr);
 315         pr_debug("stmmac_init_phy:  trying to attach to %s\n", phy_id);
 316
 317         phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0,
 318                              priv->plat->interface);
 319
 320         if (IS_ERR(phydev)) {
 321                 pr_err("%s: Could not attach to PHY\n", dev->name);
 322                 return PTR_ERR(phydev);
 323         }
 324
 325         /*
 326          * Broken HW is sometimes missing the pull-up resistor on the
 327          * MDIO line, which results in reads to non-existent devices returning
 328          * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
 329          * device as well.
 330          * Note: phydev->phy_id is the result of reading the UID PHY registers.
 331          */
 332         if (phydev->phy_id == 0) {
 333                 phy_disconnect(phydev);
 334                 return -ENODEV;
 335         }
 336         pr_debug("stmmac_init_phy:  %s: attached to PHY (UID 0x%x)"
 337                  " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
 338
 339         priv->phydev = phydev;
 340
 341         return 0;
 342 }
 343
 344 static inline void stmmac_enable_mac(void __iomem *ioaddr)
 345 {
 346         u32 value = readl(ioaddr + MAC_CTRL_REG);
 347
 348         value |= MAC_RNABLE_RX | MAC_ENABLE_TX;
 349         writel(value, ioaddr + MAC_CTRL_REG);
 350 }
 351
 352 static inline void stmmac_disable_mac(void __iomem *ioaddr)
 353 {
 354         u32 value = readl(ioaddr + MAC_CTRL_REG);
 355
 356         value &= ~(MAC_ENABLE_TX | MAC_RNABLE_RX);
 357         writel(value, ioaddr + MAC_CTRL_REG);
 358 }
 359
 360 /**
 361  * display_ring
 362  * @p: pointer to the ring.
 363  * @size: size of the ring.
 364  * Description: display all the descriptors within the ring.
 365  */
 366 static void display_ring(struct dma_desc *p, int size)
 367 {
 368         struct tmp_s {
 369                 u64 a;
 370                 unsigned int b;
 371                 unsigned int c;
 372         };
 373         int i;
 374         for (i = 0; i < size; i++) {
 375                 struct tmp_s *x = (struct tmp_s *)(p + i);
 376                 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
 377                        i, (unsigned int)virt_to_phys(&p[i]),
 378                        (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
 379                        x->b, x->c);
 380                 pr_info("\n");
 381         }
 382 }
 383
 384 /**
 385  * init_dma_desc_rings - init the RX/TX descriptor rings
 386  * @dev: net device structure
 387  * Description:  this function initializes the DMA RX/TX descriptors
 388  * and allocates the socket buffers.
 389  */
 390 static void init_dma_desc_rings(struct net_device *dev)
 391 {
 392         int i;
 393         struct stmmac_priv *priv = netdev_priv(dev);
 394         struct sk_buff *skb;
 395         unsigned int txsize = priv->dma_tx_size;
 396         unsigned int rxsize = priv->dma_rx_size;
 397         unsigned int bfsize = priv->dma_buf_sz;
 398         int buff2_needed = 0, dis_ic = 0;
 399
 400         /* Set the Buffer size according to the MTU;
 401          * indeed, in case of jumbo we need to bump-up the buffer sizes.
 402          */
 403         if (unlikely(dev->mtu >= BUF_SIZE_8KiB))
 404                 bfsize = BUF_SIZE_16KiB;
 405         else if (unlikely(dev->mtu >= BUF_SIZE_4KiB))
 406                 bfsize = BUF_SIZE_8KiB;
 407         else if (unlikely(dev->mtu >= BUF_SIZE_2KiB))
 408                 bfsize = BUF_SIZE_4KiB;
 409         else if (unlikely(dev->mtu >= DMA_BUFFER_SIZE))
 410                 bfsize = BUF_SIZE_2KiB;
 411         else
 412                 bfsize = DMA_BUFFER_SIZE;
 413
 414 #ifdef CONFIG_STMMAC_TIMER
 415         /* Disable interrupts on completion for the reception if timer is on */
 416         if (likely(priv->tm->enable))
 417                 dis_ic = 1;
 418 #endif
 419         /* If the MTU exceeds 8k so use the second buffer in the chain */
 420         if (bfsize >= BUF_SIZE_8KiB)
 421                 buff2_needed = 1;
 422
 423         DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
 424             txsize, rxsize, bfsize);
 425
 426         priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
 427         priv->rx_skbuff =
 428             kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
 429         priv->dma_rx =
 430             (struct dma_desc *)dma_alloc_coherent(priv->device,
 431                                                   rxsize *
 432                                                   sizeof(struct dma_desc),
 433                                                   &priv->dma_rx_phy,
 434                                                   GFP_KERNEL);
 435         priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
 436                                        GFP_KERNEL);
 437         priv->dma_tx =
 438             (struct dma_desc *)dma_alloc_coherent(priv->device,
 439                                                   txsize *
 440                                                   sizeof(struct dma_desc),
 441                                                   &priv->dma_tx_phy,
 442                                                   GFP_KERNEL);
 443
 444         if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
 445                 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
 446                 return;
 447         }
 448
 449         DBG(probe, INFO, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
 450             "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
 451             dev->name, priv->dma_rx, priv->dma_tx,
 452             (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
 453
 454         /* RX INITIALIZATION */
 455         DBG(probe, INFO, "stmmac: SKB addresses:\n"
 456                          "skb\t\tskb data\tdma data\n");
 457
 458         for (i = 0; i < rxsize; i++) {
 459                 struct dma_desc *p = priv->dma_rx + i;
 460
 461                 skb = netdev_alloc_skb_ip_align(dev, bfsize);
 462                 if (unlikely(skb == NULL)) {
 463                         pr_err("%s: Rx init fails; skb is NULL\n", __func__);
 464                         break;
 465                 }
 466                 priv->rx_skbuff[i] = skb;
 467                 priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
 468                                                 bfsize, DMA_FROM_DEVICE);
 469
 470                 p->des2 = priv->rx_skbuff_dma[i];
 471                 if (unlikely(buff2_needed))
 472                         p->des3 = p->des2 + BUF_SIZE_8KiB;
 473                 DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
 474                         priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
 475         }
 476         priv->cur_rx = 0;
 477         priv->dirty_rx = (unsigned int)(i - rxsize);
 478         priv->dma_buf_sz = bfsize;
 479         buf_sz = bfsize;
 480
 481         /* TX INITIALIZATION */
 482         for (i = 0; i < txsize; i++) {
 483                 priv->tx_skbuff[i] = NULL;
 484                 priv->dma_tx[i].des2 = 0;
 485         }
 486         priv->dirty_tx = 0;
 487         priv->cur_tx = 0;
 488
 489         /* Clear the Rx/Tx descriptors */
 490         priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
 491         priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
 492
 493         if (netif_msg_hw(priv)) {
 494                 pr_info("RX descriptor ring:\n");
 495                 display_ring(priv->dma_rx, rxsize);
 496                 pr_info("TX descriptor ring:\n");
 497                 display_ring(priv->dma_tx, txsize);
 498         }
 499 }
 500
 501 static void dma_free_rx_skbufs(struct stmmac_priv *priv)
 502 {
 503         int i;
 504
 505         for (i = 0; i < priv->dma_rx_size; i++) {
 506                 if (priv->rx_skbuff[i]) {
 507                         dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
 508                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
 509                         dev_kfree_skb_any(priv->rx_skbuff[i]);
 510                 }
 511                 priv->rx_skbuff[i] = NULL;
 512         }
 513 }
 514
 515 static void dma_free_tx_skbufs(struct stmmac_priv *priv)
 516 {
 517         int i;
 518
 519         for (i = 0; i < priv->dma_tx_size; i++) {
 520                 if (priv->tx_skbuff[i] != NULL) {
 521                         struct dma_desc *p = priv->dma_tx + i;
 522                         if (p->des2)
 523                                 dma_unmap_single(priv->device, p->des2,
 524                                                  priv->hw->desc->get_tx_len(p),
 525                                                  DMA_TO_DEVICE);
 526                         dev_kfree_skb_any(priv->tx_skbuff[i]);
 527                         priv->tx_skbuff[i] = NULL;
 528                 }
 529         }
 530 }
 531
 532 static void free_dma_desc_resources(struct stmmac_priv *priv)
 533 {
 534         /* Release the DMA TX/RX socket buffers */
 535         dma_free_rx_skbufs(priv);
 536         dma_free_tx_skbufs(priv);
 537
 538         /* Free the region of consistent memory previously allocated for
 539          * the DMA */
 540         dma_free_coherent(priv->device,
 541                           priv->dma_tx_size * sizeof(struct dma_desc),
 542                           priv->dma_tx, priv->dma_tx_phy);
 543         dma_free_coherent(priv->device,
 544                           priv->dma_rx_size * sizeof(struct dma_desc),
 545                           priv->dma_rx, priv->dma_rx_phy);
 546         kfree(priv->rx_skbuff_dma);
 547         kfree(priv->rx_skbuff);
 548         kfree(priv->tx_skbuff);
 549 }
 550
 551 /**
 552  *  stmmac_dma_operation_mode - HW DMA operation mode
 553  *  @priv : pointer to the private device structure.
 554  *  Description: it sets the DMA operation mode: tx/rx DMA thresholds
 555  *  or Store-And-Forward capability.
 556  */
 557 static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
 558 {
 559         if (likely(priv->plat->force_sf_dma_mode ||
 560                 ((priv->plat->tx_coe) && (!priv->no_csum_insertion)))) {
 561                 /*
 562                  * In case of GMAC, SF mode can be enabled
 563                  * to perform the TX COE in HW. This depends on:
 564                  * 1) TX COE if actually supported
 565                  * 2) There is no bugged Jumbo frame support
 566                  *    that needs to not insert csum in the TDES.
 567                  */
 568                 priv->hw->dma->dma_mode(priv->ioaddr,
 569                                         SF_DMA_MODE, SF_DMA_MODE);
 570                 tc = SF_DMA_MODE;
 571         } else
 572                 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
 573 }
 574
 575 /**
 576  * stmmac_tx:
 577  * @priv: private driver structure
 578  * Description: it reclaims resources after transmission completes.
 579  */
 580 static void stmmac_tx(struct stmmac_priv *priv)
 581 {
 582         unsigned int txsize = priv->dma_tx_size;
 583
 584         while (priv->dirty_tx != priv->cur_tx) {
 585                 int last;
 586                 unsigned int entry = priv->dirty_tx % txsize;
 587                 struct sk_buff *skb = priv->tx_skbuff[entry];
 588                 struct dma_desc *p = priv->dma_tx + entry;
 589
 590                 /* Check if the descriptor is owned by the DMA. */
 591                 if (priv->hw->desc->get_tx_owner(p))
 592                         break;
 593
 594                 /* Verify tx error by looking at the last segment */
 595                 last = priv->hw->desc->get_tx_ls(p);
 596                 if (likely(last)) {
 597                         int tx_error =
 598                                 priv->hw->desc->tx_status(&priv->dev->stats,
 599                                                           &priv->xstats, p,
 600                                                           priv->ioaddr);
 601                         if (likely(tx_error == 0)) {
 602                                 priv->dev->stats.tx_packets++;
 603                                 priv->xstats.tx_pkt_n++;
 604                         } else
 605                                 priv->dev->stats.tx_errors++;
 606                 }
 607                 TX_DBG("%s: curr %d, dirty %d\n", __func__,
 608                         priv->cur_tx, priv->dirty_tx);
 609
 610                 if (likely(p->des2))
 611                         dma_unmap_single(priv->device, p->des2,
 612                                          priv->hw->desc->get_tx_len(p),
 613                                          DMA_TO_DEVICE);
 614                 if (unlikely(p->des3))
 615                         p->des3 = 0;
 616
 617                 if (likely(skb != NULL)) {
 618                         /*
 619                          * If there's room in the queue (limit it to size)
 620                          * we add this skb back into the pool,
 621                          * if it's the right size.
 622                          */
 623                         if ((skb_queue_len(&priv->rx_recycle) <
 624                                 priv->dma_rx_size) &&
 625                                 skb_recycle_check(skb, priv->dma_buf_sz))
 626                                 __skb_queue_head(&priv->rx_recycle, skb);
 627                         else
 628                                 dev_kfree_skb(skb);
 629
 630                         priv->tx_skbuff[entry] = NULL;
 631                 }
 632
 633                 priv->hw->desc->release_tx_desc(p);
 634
 635                 entry = (++priv->dirty_tx) % txsize;
 636         }
 637         if (unlikely(netif_queue_stopped(priv->dev) &&
 638                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
 639                 netif_tx_lock(priv->dev);
 640                 if (netif_queue_stopped(priv->dev) &&
 641                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
 642                         TX_DBG("%s: restart transmit\n", __func__);
 643                         netif_wake_queue(priv->dev);
 644                 }
 645                 netif_tx_unlock(priv->dev);
 646         }
 647 }
 648
 649 static inline void stmmac_enable_irq(struct stmmac_priv *priv)
 650 {
 651 #ifdef CONFIG_STMMAC_TIMER
 652         if (likely(priv->tm->enable))
 653                 priv->tm->timer_start(tmrate);
 654         else
 655 #endif
 656                 priv->hw->dma->enable_dma_irq(priv->ioaddr);
 657 }
 658
 659 static inline void stmmac_disable_irq(struct stmmac_priv *priv)
 660 {
 661 #ifdef CONFIG_STMMAC_TIMER
 662         if (likely(priv->tm->enable))
 663                 priv->tm->timer_stop();
 664         else
 665 #endif
 666                 priv->hw->dma->disable_dma_irq(priv->ioaddr);
 667 }
 668
 669 static int stmmac_has_work(struct stmmac_priv *priv)
 670 {
 671         unsigned int has_work = 0;
 672         int rxret, tx_work = 0;
 673
 674         rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
 675                 (priv->cur_rx % priv->dma_rx_size));
 676
 677         if (priv->dirty_tx != priv->cur_tx)
 678                 tx_work = 1;
 679
 680         if (likely(!rxret || tx_work))
 681                 has_work = 1;
 682
 683         return has_work;
 684 }
 685
 686 static inline void _stmmac_schedule(struct stmmac_priv *priv)
 687 {
 688         if (likely(stmmac_has_work(priv))) {
 689                 stmmac_disable_irq(priv);
 690                 napi_schedule(&priv->napi);
 691         }
 692 }
 693
 694 #ifdef CONFIG_STMMAC_TIMER
 695 void stmmac_schedule(struct net_device *dev)
 696 {
 697         struct stmmac_priv *priv = netdev_priv(dev);
 698
 699         priv->xstats.sched_timer_n++;
 700
 701         _stmmac_schedule(priv);
 702 }
 703
 704 static void stmmac_no_timer_started(unsigned int x)
 705 {;
 706 };
 707
 708 static void stmmac_no_timer_stopped(void)
 709 {;
 710 };
 711 #endif
 712
 713 /**
 714  * stmmac_tx_err:
 715  * @priv: pointer to the private device structure
 716  * Description: it cleans the descriptors and restarts the transmission
 717  * in case of errors.
 718  */
 719 static void stmmac_tx_err(struct stmmac_priv *priv)
 720 {
 721
 722         netif_stop_queue(priv->dev);
 723
 724         priv->hw->dma->stop_tx(priv->ioaddr);
 725         dma_free_tx_skbufs(priv);
 726         priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
 727         priv->dirty_tx = 0;
 728         priv->cur_tx = 0;
 729         priv->hw->dma->start_tx(priv->ioaddr);
 730
 731         priv->dev->stats.tx_errors++;
 732         netif_wake_queue(priv->dev);
 733 }
 734
 735
 736 static void stmmac_dma_interrupt(struct stmmac_priv *priv)
 737 {
 738         int status;
 739
 740         status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
 741         if (likely(status == handle_tx_rx))
 742                 _stmmac_schedule(priv);
 743
 744         else if (unlikely(status == tx_hard_error_bump_tc)) {
 745                 /* Try to bump up the dma threshold on this failure */
 746                 if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
 747                         tc += 64;
 748                         priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
 749                         priv->xstats.threshold = tc;
 750                 }
 751         } else if (unlikely(status == tx_hard_error))
 752                 stmmac_tx_err(priv);
 753 }
 754
 755 static void stmmac_mmc_setup(struct stmmac_priv *priv)
 756 {
 757         unsigned int mode = MMC_CNTRL_RESET_ON_READ | MMC_CNTRL_COUNTER_RESET |
 758                             MMC_CNTRL_PRESET | MMC_CNTRL_FULL_HALF_PRESET;
 759
 760         /* Do not manage MMC IRQ (FIXME) */
 761         dwmac_mmc_intr_all_mask(priv->ioaddr);
 762         dwmac_mmc_ctrl(priv->ioaddr, mode);
 763         memset(&priv->mmc, 0, sizeof(struct stmmac_counters));
 764 }
 765
 766 static u32 stmmac_get_synopsys_id(struct stmmac_priv *priv)
 767 {
 768         u32 hwid = priv->hw->synopsys_uid;
 769
 770         /* Only check valid Synopsys Id because old MAC chips
 771          * have no HW registers where get the ID */
 772         if (likely(hwid)) {
 773                 u32 uid = ((hwid & 0x0000ff00) >> 8);
 774                 u32 synid = (hwid & 0x000000ff);
 775
 776                 pr_info("STMMAC - user ID: 0x%x, Synopsys ID: 0x%x\n",
 777                         uid, synid);
 778
 779                 return synid;
 780         }
 781         return 0;
 782 }
 783
 784 /* New GMAC chips support a new register to indicate the
 785  * presence of the optional feature/functions.
 786  */
 787 static int stmmac_get_hw_features(struct stmmac_priv *priv)
 788 {
 789         u32 hw_cap = priv->hw->dma->get_hw_feature(priv->ioaddr);
 790
 791         if (likely(hw_cap)) {
 792                 priv->dma_cap.mbps_10_100 = (hw_cap & 0x1);
 793                 priv->dma_cap.mbps_1000 = (hw_cap & 0x2) >> 1;
 794                 priv->dma_cap.half_duplex = (hw_cap & 0x4) >> 2;
 795                 priv->dma_cap.hash_filter = (hw_cap & 0x10) >> 4;
 796                 priv->dma_cap.multi_addr = (hw_cap & 0x20) >> 5;
 797                 priv->dma_cap.pcs = (hw_cap & 0x40) >> 6;
 798                 priv->dma_cap.sma_mdio = (hw_cap & 0x100) >> 8;
 799                 priv->dma_cap.pmt_remote_wake_up = (hw_cap & 0x200) >> 9;
 800                 priv->dma_cap.pmt_magic_frame = (hw_cap & 0x400) >> 10;
 801                 priv->dma_cap.rmon = (hw_cap & 0x800) >> 11; /* MMC */
 802                 /* IEEE 1588-2002*/
 803                 priv->dma_cap.time_stamp = (hw_cap & 0x1000) >> 12;
 804                 /* IEEE 1588-2008*/
 805                 priv->dma_cap.atime_stamp = (hw_cap & 0x2000) >> 13;
 806                 /* 802.3az - Energy-Efficient Ethernet (EEE) */
 807                 priv->dma_cap.eee = (hw_cap & 0x4000) >> 14;
 808                 priv->dma_cap.av = (hw_cap & 0x8000) >> 15;
 809                 /* TX and RX csum */
 810                 priv->dma_cap.tx_coe = (hw_cap & 0x10000) >> 16;
 811                 priv->dma_cap.rx_coe_type1 = (hw_cap & 0x20000) >> 17;
 812                 priv->dma_cap.rx_coe_type2 = (hw_cap & 0x40000) >> 18;
 813                 priv->dma_cap.rxfifo_over_2048 = (hw_cap & 0x80000) >> 19;
 814                 /* TX and RX number of channels */
 815                 priv->dma_cap.number_rx_channel = (hw_cap & 0x300000) >> 20;
 816                 priv->dma_cap.number_tx_channel = (hw_cap & 0xc00000) >> 22;
 817                 /* Alternate (enhanced) DESC mode*/
 818                 priv->dma_cap.enh_desc = (hw_cap & 0x1000000) >> 24;
 819
 820         } else
 821                 pr_debug("\tNo HW DMA feature register supported");
 822
 823         return hw_cap;
 824 }
 825
 826 /**
 827  *  stmmac_open - open entry point of the driver
 828  *  @dev : pointer to the device structure.
 829  *  Description:
 830  *  This function is the open entry point of the driver.
 831  *  Return value:
 832  *  0 on success and an appropriate (-)ve integer as defined in errno.h
 833  *  file on failure.
 834  */
 835 static int stmmac_open(struct net_device *dev)
 836 {
 837         struct stmmac_priv *priv = netdev_priv(dev);
 838         int ret;
 839
 840         /* Check that the MAC address is valid.  If its not, refuse
 841          * to bring the device up. The user must specify an
 842          * address using the following linux command:
 843          *      ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx  */
 844         if (!is_valid_ether_addr(dev->dev_addr)) {
 845                 random_ether_addr(dev->dev_addr);
 846                 pr_warning("%s: generated random MAC address %pM\n", dev->name,
 847                         dev->dev_addr);
 848         }
 849
 850         stmmac_verify_args();
 851
 852 #ifdef CONFIG_STMMAC_TIMER
 853         priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
 854         if (unlikely(priv->tm == NULL)) {
 855                 pr_err("%s: ERROR: timer memory alloc failed\n", __func__);
 856                 return -ENOMEM;
 857         }
 858         priv->tm->freq = tmrate;
 859
 860         /* Test if the external timer can be actually used.
 861          * In case of failure continue without timer. */
 862         if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
 863                 pr_warning("stmmaceth: cannot attach the external timer.\n");
 864                 priv->tm->freq = 0;
 865                 priv->tm->timer_start = stmmac_no_timer_started;
 866                 priv->tm->timer_stop = stmmac_no_timer_stopped;
 867         } else
 868                 priv->tm->enable = 1;
 869 #endif
 870         ret = stmmac_init_phy(dev);
 871         if (unlikely(ret)) {
 872                 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
 873                 goto open_error;
 874         }
 875
 876         /* Create and initialize the TX/RX descriptors chains. */
 877         priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
 878         priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
 879         priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
 880         init_dma_desc_rings(dev);
 881
 882         /* DMA initialization and SW reset */
 883         ret = priv->hw->dma->init(priv->ioaddr, priv->plat->pbl,
 884                                   priv->dma_tx_phy, priv->dma_rx_phy);
 885         if (ret < 0) {
 886                 pr_err("%s: DMA initialization failed\n", __func__);
 887                 goto open_error;
 888         }
 889
 890         /* Copy the MAC addr into the HW  */
 891         priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
 892         /* If required, perform hw setup of the bus. */
 893         if (priv->plat->bus_setup)
 894                 priv->plat->bus_setup(priv->ioaddr);
 895         /* Initialize the MAC Core */
 896         priv->hw->mac->core_init(priv->ioaddr);
 897
 898         stmmac_get_synopsys_id(priv);
 899
 900         stmmac_get_hw_features(priv);
 901
 902         if (priv->rx_coe)
 903                 pr_info("stmmac: Rx Checksum Offload Engine supported\n");
 904         if (priv->plat->tx_coe)
 905                 pr_info("\tTX Checksum insertion supported\n");
 906         netdev_update_features(dev);
 907
 908         /* Request the IRQ lines */
 909         ret = request_irq(dev->irq, stmmac_interrupt,
 910                          IRQF_SHARED, dev->name, dev);
 911         if (unlikely(ret < 0)) {
 912                 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
 913                        __func__, dev->irq, ret);
 914                 goto open_error;
 915         }
 916
 917         /* Enable the MAC Rx/Tx */
 918         stmmac_enable_mac(priv->ioaddr);
 919
 920         /* Set the HW DMA mode and the COE */
 921         stmmac_dma_operation_mode(priv);
 922
 923         /* Extra statistics */
 924         memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
 925         priv->xstats.threshold = tc;
 926
 927         stmmac_mmc_setup(priv);
 928
 929         /* Start the ball rolling... */
 930         DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
 931         priv->hw->dma->start_tx(priv->ioaddr);
 932         priv->hw->dma->start_rx(priv->ioaddr);
 933
 934 #ifdef CONFIG_STMMAC_TIMER
 935         priv->tm->timer_start(tmrate);
 936 #endif
 937         /* Dump DMA/MAC registers */
 938         if (netif_msg_hw(priv)) {
 939                 priv->hw->mac->dump_regs(priv->ioaddr);
 940                 priv->hw->dma->dump_regs(priv->ioaddr);
 941         }
 942
 943         if (priv->phydev)
 944                 phy_start(priv->phydev);
 945
 946         napi_enable(&priv->napi);
 947         skb_queue_head_init(&priv->rx_recycle);
 948         netif_start_queue(dev);
 949
 950         return 0;
 951
 952 open_error:
 953 #ifdef CONFIG_STMMAC_TIMER
 954         kfree(priv->tm);
 955 #endif
 956         if (priv->phydev)
 957                 phy_disconnect(priv->phydev);
 958
 959         return ret;
 960 }
 961
 962 /**
 963  *  stmmac_release - close entry point of the driver
 964  *  @dev : device pointer.
 965  *  Description:
 966  *  This is the stop entry point of the driver.
 967  */
 968 static int stmmac_release(struct net_device *dev)
 969 {
 970         struct stmmac_priv *priv = netdev_priv(dev);
 971
 972         /* Stop and disconnect the PHY */
 973         if (priv->phydev) {
 974                 phy_stop(priv->phydev);
 975                 phy_disconnect(priv->phydev);
 976                 priv->phydev = NULL;
 977         }
 978
 979         netif_stop_queue(dev);
 980
 981 #ifdef CONFIG_STMMAC_TIMER
 982         /* Stop and release the timer */
 983         stmmac_close_ext_timer();
 984         if (priv->tm != NULL)
 985                 kfree(priv->tm);
 986 #endif
 987         napi_disable(&priv->napi);
 988         skb_queue_purge(&priv->rx_recycle);
 989
 990         /* Free the IRQ lines */
 991         free_irq(dev->irq, dev);
 992
 993         /* Stop TX/RX DMA and clear the descriptors */
 994         priv->hw->dma->stop_tx(priv->ioaddr);
 995         priv->hw->dma->stop_rx(priv->ioaddr);
 996
 997         /* Release and free the Rx/Tx resources */
 998         free_dma_desc_resources(priv);
 999
1000         /* Disable the MAC Rx/Tx */
1001         stmmac_disable_mac(priv->ioaddr);
1002
1003         netif_carrier_off(dev);
1004
1005         return 0;
1006 }
1007
1008 static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
1009                                                struct net_device *dev,
1010                                                int csum_insertion)
1011 {
1012         struct stmmac_priv *priv = netdev_priv(dev);
1013         unsigned int nopaged_len = skb_headlen(skb);
1014         unsigned int txsize = priv->dma_tx_size;
1015         unsigned int entry = priv->cur_tx % txsize;
1016         struct dma_desc *desc = priv->dma_tx + entry;
1017
1018         if (nopaged_len > BUF_SIZE_8KiB) {
1019
1020                 int buf2_size = nopaged_len - BUF_SIZE_8KiB;
1021
1022                 desc->des2 = dma_map_single(priv->device, skb->data,
1023                                             BUF_SIZE_8KiB, DMA_TO_DEVICE);
1024                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1025                 priv->hw->desc->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
1026                                                 csum_insertion);
1027
1028                 entry = (++priv->cur_tx) % txsize;
1029                 desc = priv->dma_tx + entry;
1030
1031                 desc->des2 = dma_map_single(priv->device,
1032                                         skb->data + BUF_SIZE_8KiB,
1033                                         buf2_size, DMA_TO_DEVICE);
1034                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1035                 priv->hw->desc->prepare_tx_desc(desc, 0, buf2_size,
1036                                                 csum_insertion);
1037                 priv->hw->desc->set_tx_owner(desc);
1038                 priv->tx_skbuff[entry] = NULL;
1039         } else {
1040                 desc->des2 = dma_map_single(priv->device, skb->data,
1041                                         nopaged_len, DMA_TO_DEVICE);
1042                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1043                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1044                                                 csum_insertion);
1045         }
1046         return entry;
1047 }
1048
1049 /**
1050  *  stmmac_xmit:
1051  *  @skb : the socket buffer
1052  *  @dev : device pointer
1053  *  Description : Tx entry point of the driver.
1054  */
1055 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
1056 {
1057         struct stmmac_priv *priv = netdev_priv(dev);
1058         unsigned int txsize = priv->dma_tx_size;
1059         unsigned int entry;
1060         int i, csum_insertion = 0;
1061         int nfrags = skb_shinfo(skb)->nr_frags;
1062         struct dma_desc *desc, *first;
1063
1064         if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
1065                 if (!netif_queue_stopped(dev)) {
1066                         netif_stop_queue(dev);
1067                         /* This is a hard error, log it. */
1068                         pr_err("%s: BUG! Tx Ring full when queue awake\n",
1069                                 __func__);
1070                 }
1071                 return NETDEV_TX_BUSY;
1072         }
1073
1074         entry = priv->cur_tx % txsize;
1075
1076 #ifdef STMMAC_XMIT_DEBUG
1077         if ((skb->len > ETH_FRAME_LEN) || nfrags)
1078                 pr_info("stmmac xmit:\n"
1079                        "\tskb addr %p - len: %d - nopaged_len: %d\n"
1080                        "\tn_frags: %d - ip_summed: %d - %s gso\n",
1081                        skb, skb->len, skb_headlen(skb), nfrags, skb->ip_summed,
1082                        !skb_is_gso(skb) ? "isn't" : "is");
1083 #endif
1084
1085         csum_insertion = (skb->ip_summed == CHECKSUM_PARTIAL);
1086
1087         desc = priv->dma_tx + entry;
1088         first = desc;
1089
1090 #ifdef STMMAC_XMIT_DEBUG
1091         if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1092                 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1093                        "\t\tn_frags: %d, ip_summed: %d\n",
1094                        skb->len, skb_headlen(skb), nfrags, skb->ip_summed);
1095 #endif
1096         priv->tx_skbuff[entry] = skb;
1097         if (unlikely(skb->len >= BUF_SIZE_4KiB)) {
1098                 entry = stmmac_handle_jumbo_frames(skb, dev, csum_insertion);
1099                 desc = priv->dma_tx + entry;
1100         } else {
1101                 unsigned int nopaged_len = skb_headlen(skb);
1102                 desc->des2 = dma_map_single(priv->device, skb->data,
1103                                         nopaged_len, DMA_TO_DEVICE);
1104                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1105                                                 csum_insertion);
1106         }
1107
1108         for (i = 0; i < nfrags; i++) {
1109                 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1110                 int len = skb_frag_size(frag);
1111
1112                 entry = (++priv->cur_tx) % txsize;
1113                 desc = priv->dma_tx + entry;
1114
1115                 TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1116                 desc->des2 = skb_frag_dma_map(priv->device, frag, 0, len,
1117                                               DMA_TO_DEVICE);
1118                 priv->tx_skbuff[entry] = NULL;
1119                 priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
1120                 wmb();
1121                 priv->hw->desc->set_tx_owner(desc);
1122         }
1123
1124         /* Interrupt on completition only for the latest segment */
1125         priv->hw->desc->close_tx_desc(desc);
1126
1127 #ifdef CONFIG_STMMAC_TIMER
1128         /* Clean IC while using timer */
1129         if (likely(priv->tm->enable))
1130                 priv->hw->desc->clear_tx_ic(desc);
1131 #endif
1132
1133         wmb();
1134
1135         /* To avoid raise condition */
1136         priv->hw->desc->set_tx_owner(first);
1137
1138         priv->cur_tx++;
1139
1140 #ifdef STMMAC_XMIT_DEBUG
1141         if (netif_msg_pktdata(priv)) {
1142                 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1143                        "first=%p, nfrags=%d\n",
1144                        (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1145                        entry, first, nfrags);
1146                 display_ring(priv->dma_tx, txsize);
1147                 pr_info(">>> frame to be transmitted: ");
1148                 print_pkt(skb->data, skb->len);
1149         }
1150 #endif
1151         if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1152                 TX_DBG("%s: stop transmitted packets\n", __func__);
1153                 netif_stop_queue(dev);
1154         }
1155
1156         dev->stats.tx_bytes += skb->len;
1157
1158         skb_tx_timestamp(skb);
1159
1160         priv->hw->dma->enable_dma_transmission(priv->ioaddr);
1161
1162         return NETDEV_TX_OK;
1163 }
1164
1165 static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1166 {
1167         unsigned int rxsize = priv->dma_rx_size;
1168         int bfsize = priv->dma_buf_sz;
1169         struct dma_desc *p = priv->dma_rx;
1170
1171         for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1172                 unsigned int entry = priv->dirty_rx % rxsize;
1173                 if (likely(priv->rx_skbuff[entry] == NULL)) {
1174                         struct sk_buff *skb;
1175
1176                         skb = __skb_dequeue(&priv->rx_recycle);
1177                         if (skb == NULL)
1178                                 skb = netdev_alloc_skb_ip_align(priv->dev,
1179                                                                 bfsize);
1180
1181                         if (unlikely(skb == NULL))
1182                                 break;
1183
1184                         priv->rx_skbuff[entry] = skb;
1185                         priv->rx_skbuff_dma[entry] =
1186                             dma_map_single(priv->device, skb->data, bfsize,
1187                                            DMA_FROM_DEVICE);
1188
1189                         (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1190                         if (unlikely(priv->plat->has_gmac)) {
1191                                 if (bfsize >= BUF_SIZE_8KiB)
1192                                         (p + entry)->des3 =
1193                                             (p + entry)->des2 + BUF_SIZE_8KiB;
1194                         }
1195                         RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1196                 }
1197                 wmb();
1198                 priv->hw->desc->set_rx_owner(p + entry);
1199         }
1200 }
1201
1202 static int stmmac_rx(struct stmmac_priv *priv, int limit)
1203 {
1204         unsigned int rxsize = priv->dma_rx_size;
1205         unsigned int entry = priv->cur_rx % rxsize;
1206         unsigned int next_entry;
1207         unsigned int count = 0;
1208         struct dma_desc *p = priv->dma_rx + entry;
1209         struct dma_desc *p_next;
1210
1211 #ifdef STMMAC_RX_DEBUG
1212         if (netif_msg_hw(priv)) {
1213                 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1214                 display_ring(priv->dma_rx, rxsize);
1215         }
1216 #endif
1217         count = 0;
1218         while (!priv->hw->desc->get_rx_owner(p)) {
1219                 int status;
1220
1221                 if (count >= limit)
1222                         break;
1223
1224                 count++;
1225
1226                 next_entry = (++priv->cur_rx) % rxsize;
1227                 p_next = priv->dma_rx + next_entry;
1228                 prefetch(p_next);
1229
1230                 /* read the status of the incoming frame */
1231                 status = (priv->hw->desc->rx_status(&priv->dev->stats,
1232                                                     &priv->xstats, p));
1233                 if (unlikely(status == discard_frame))
1234                         priv->dev->stats.rx_errors++;
1235                 else {
1236                         struct sk_buff *skb;
1237                         int frame_len;
1238
1239                         frame_len = priv->hw->desc->get_rx_frame_len(p);
1240                         /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1241                          * Type frames (LLC/LLC-SNAP) */
1242                         if (unlikely(status != llc_snap))
1243                                 frame_len -= ETH_FCS_LEN;
1244 #ifdef STMMAC_RX_DEBUG
1245                         if (frame_len > ETH_FRAME_LEN)
1246                                 pr_debug("\tRX frame size %d, COE status: %d\n",
1247                                         frame_len, status);
1248
1249                         if (netif_msg_hw(priv))
1250                                 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1251                                         p, entry, p->des2);
1252 #endif
1253                         skb = priv->rx_skbuff[entry];
1254                         if (unlikely(!skb)) {
1255                                 pr_err("%s: Inconsistent Rx descriptor chain\n",
1256                                         priv->dev->name);
1257                                 priv->dev->stats.rx_dropped++;
1258                                 break;
1259                         }
1260                         prefetch(skb->data - NET_IP_ALIGN);
1261                         priv->rx_skbuff[entry] = NULL;
1262
1263                         skb_put(skb, frame_len);
1264                         dma_unmap_single(priv->device,
1265                                          priv->rx_skbuff_dma[entry],
1266                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
1267 #ifdef STMMAC_RX_DEBUG
1268                         if (netif_msg_pktdata(priv)) {
1269                                 pr_info(" frame received (%dbytes)", frame_len);
1270                                 print_pkt(skb->data, frame_len);
1271                         }
1272 #endif
1273                         skb->protocol = eth_type_trans(skb, priv->dev);
1274
1275                         if (unlikely(status == csum_none)) {
1276                                 /* always for the old mac 10/100 */
1277                                 skb_checksum_none_assert(skb);
1278                                 netif_receive_skb(skb);
1279                         } else {
1280                                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1281                                 napi_gro_receive(&priv->napi, skb);
1282                         }
1283
1284                         priv->dev->stats.rx_packets++;
1285                         priv->dev->stats.rx_bytes += frame_len;
1286                 }
1287                 entry = next_entry;
1288                 p = p_next;     /* use prefetched values */
1289         }
1290
1291         stmmac_rx_refill(priv);
1292
1293         priv->xstats.rx_pkt_n += count;
1294
1295         return count;
1296 }
1297
1298 /**
1299  *  stmmac_poll - stmmac poll method (NAPI)
1300  *  @napi : pointer to the napi structure.
1301  *  @budget : maximum number of packets that the current CPU can receive from
1302  *            all interfaces.
1303  *  Description :
1304  *   This function implements the the reception process.
1305  *   Also it runs the TX completion thread
1306  */
1307 static int stmmac_poll(struct napi_struct *napi, int budget)
1308 {
1309         struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1310         int work_done = 0;
1311
1312         priv->xstats.poll_n++;
1313         stmmac_tx(priv);
1314         work_done = stmmac_rx(priv, budget);
1315
1316         if (work_done < budget) {
1317                 napi_complete(napi);
1318                 stmmac_enable_irq(priv);
1319         }
1320         return work_done;
1321 }
1322
1323 /**
1324  *  stmmac_tx_timeout
1325  *  @dev : Pointer to net device structure
1326  *  Description: this function is called when a packet transmission fails to
1327  *   complete within a reasonable tmrate. The driver will mark the error in the
1328  *   netdev structure and arrange for the device to be reset to a sane state
1329  *   in order to transmit a new packet.
1330  */
1331 static void stmmac_tx_timeout(struct net_device *dev)
1332 {
1333         struct stmmac_priv *priv = netdev_priv(dev);
1334
1335         /* Clear Tx resources and restart transmitting again */
1336         stmmac_tx_err(priv);
1337 }
1338
1339 /* Configuration changes (passed on by ifconfig) */
1340 static int stmmac_config(struct net_device *dev, struct ifmap *map)
1341 {
1342         if (dev->flags & IFF_UP)        /* can't act on a running interface */
1343                 return -EBUSY;
1344
1345         /* Don't allow changing the I/O address */
1346         if (map->base_addr != dev->base_addr) {
1347                 pr_warning("%s: can't change I/O address\n", dev->name);
1348                 return -EOPNOTSUPP;
1349         }
1350
1351         /* Don't allow changing the IRQ */
1352         if (map->irq != dev->irq) {
1353                 pr_warning("%s: can't change IRQ number %d\n",
1354                        dev->name, dev->irq);
1355                 return -EOPNOTSUPP;
1356         }
1357
1358         /* ignore other fields */
1359         return 0;
1360 }
1361
1362 /**
1363  *  stmmac_set_rx_mode - entry point for multicast addressing
1364  *  @dev : pointer to the device structure
1365  *  Description:
1366  *  This function is a driver entry point which gets called by the kernel
1367  *  whenever multicast addresses must be enabled/disabled.
1368  *  Return value:
1369  *  void.
1370  */
1371 static void stmmac_set_rx_mode(struct net_device *dev)
1372 {
1373         struct stmmac_priv *priv = netdev_priv(dev);
1374
1375         spin_lock(&priv->lock);
1376         priv->hw->mac->set_filter(dev);
1377         spin_unlock(&priv->lock);
1378 }
1379
1380 /**
1381  *  stmmac_change_mtu - entry point to change MTU size for the device.
1382  *  @dev : device pointer.
1383  *  @new_mtu : the new MTU size for the device.
1384  *  Description: the Maximum Transfer Unit (MTU) is used by the network layer
1385  *  to drive packet transmission. Ethernet has an MTU of 1500 octets
1386  *  (ETH_DATA_LEN). This value can be changed with ifconfig.
1387  *  Return value:
1388  *  0 on success and an appropriate (-)ve integer as defined in errno.h
1389  *  file on failure.
1390  */
1391 static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1392 {
1393         struct stmmac_priv *priv = netdev_priv(dev);
1394         int max_mtu;
1395
1396         if (netif_running(dev)) {
1397                 pr_err("%s: must be stopped to change its MTU\n", dev->name);
1398                 return -EBUSY;
1399         }
1400
1401         if (priv->plat->has_gmac)
1402                 max_mtu = JUMBO_LEN;
1403         else
1404                 max_mtu = ETH_DATA_LEN;
1405
1406         if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1407                 pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1408                 return -EINVAL;
1409         }
1410
1411         dev->mtu = new_mtu;
1412         netdev_update_features(dev);
1413
1414         return 0;
1415 }
1416
1417 static u32 stmmac_fix_features(struct net_device *dev, u32 features)
1418 {
1419         struct stmmac_priv *priv = netdev_priv(dev);
1420
1421         if (!priv->rx_coe)
1422                 features &= ~NETIF_F_RXCSUM;
1423         if (!priv->plat->tx_coe)
1424                 features &= ~NETIF_F_ALL_CSUM;
1425
1426         /* Some GMAC devices have a bugged Jumbo frame support that
1427          * needs to have the Tx COE disabled for oversized frames
1428          * (due to limited buffer sizes). In this case we disable
1429          * the TX csum insertionin the TDES and not use SF. */
1430         if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN))
1431                 features &= ~NETIF_F_ALL_CSUM;
1432
1433         return features;
1434 }
1435
1436 static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1437 {
1438         struct net_device *dev = (struct net_device *)dev_id;
1439         struct stmmac_priv *priv = netdev_priv(dev);
1440
1441         if (unlikely(!dev)) {
1442                 pr_err("%s: invalid dev pointer\n", __func__);
1443                 return IRQ_NONE;
1444         }
1445
1446         if (priv->plat->has_gmac)
1447                 /* To handle GMAC own interrupts */
1448                 priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr);
1449
1450         stmmac_dma_interrupt(priv);
1451
1452         return IRQ_HANDLED;
1453 }
1454
1455 #ifdef CONFIG_NET_POLL_CONTROLLER
1456 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1457  * to allow network I/O with interrupts disabled. */
1458 static void stmmac_poll_controller(struct net_device *dev)
1459 {
1460         disable_irq(dev->irq);
1461         stmmac_interrupt(dev->irq, dev);
1462         enable_irq(dev->irq);
1463 }
1464 #endif
1465
1466 /**
1467  *  stmmac_ioctl - Entry point for the Ioctl
1468  *  @dev: Device pointer.
1469  *  @rq: An IOCTL specefic structure, that can contain a pointer to
1470  *  a proprietary structure used to pass information to the driver.
1471  *  @cmd: IOCTL command
1472  *  Description:
1473  *  Currently there are no special functionality supported in IOCTL, just the
1474  *  phy_mii_ioctl(...) can be invoked.
1475  */
1476 static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1477 {
1478         struct stmmac_priv *priv = netdev_priv(dev);
1479         int ret;
1480
1481         if (!netif_running(dev))
1482                 return -EINVAL;
1483
1484         if (!priv->phydev)
1485                 return -EINVAL;
1486
1487         spin_lock(&priv->lock);
1488         ret = phy_mii_ioctl(priv->phydev, rq, cmd);
1489         spin_unlock(&priv->lock);
1490
1491         return ret;
1492 }
1493
1494 #ifdef CONFIG_STMMAC_DEBUG_FS
1495 static struct dentry *stmmac_fs_dir;
1496 static struct dentry *stmmac_rings_status;
1497 static struct dentry *stmmac_dma_cap;
1498
1499 static int stmmac_sysfs_ring_read(struct seq_file *seq, void *v)
1500 {
1501         struct tmp_s {
1502                 u64 a;
1503                 unsigned int b;
1504                 unsigned int c;
1505         };
1506         int i;
1507         struct net_device *dev = seq->private;
1508         struct stmmac_priv *priv = netdev_priv(dev);
1509
1510         seq_printf(seq, "=======================\n");
1511         seq_printf(seq, " RX descriptor ring\n");
1512         seq_printf(seq, "=======================\n");
1513
1514         for (i = 0; i < priv->dma_rx_size; i++) {
1515                 struct tmp_s *x = (struct tmp_s *)(priv->dma_rx + i);
1516                 seq_printf(seq, "[%d] DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
1517                            i, (unsigned int)(x->a),
1518                            (unsigned int)((x->a) >> 32), x->b, x->c);
1519                 seq_printf(seq, "\n");
1520         }
1521
1522         seq_printf(seq, "\n");
1523         seq_printf(seq, "=======================\n");
1524         seq_printf(seq, "  TX descriptor ring\n");
1525         seq_printf(seq, "=======================\n");
1526
1527         for (i = 0; i < priv->dma_tx_size; i++) {
1528                 struct tmp_s *x = (struct tmp_s *)(priv->dma_tx + i);
1529                 seq_printf(seq, "[%d] DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
1530                            i, (unsigned int)(x->a),
1531                            (unsigned int)((x->a) >> 32), x->b, x->c);
1532                 seq_printf(seq, "\n");
1533         }
1534
1535         return 0;
1536 }
1537
1538 static int stmmac_sysfs_ring_open(struct inode *inode, struct file *file)
1539 {
1540         return single_open(file, stmmac_sysfs_ring_read, inode->i_private);
1541 }
1542
1543 static const struct file_operations stmmac_rings_status_fops = {
1544         .owner = THIS_MODULE,
1545         .open = stmmac_sysfs_ring_open,
1546         .read = seq_read,
1547         .llseek = seq_lseek,
1548         .release = seq_release,
1549 };
1550
1551 static int stmmac_sysfs_dma_cap_read(struct seq_file *seq, void *v)
1552 {
1553         struct net_device *dev = seq->private;
1554         struct stmmac_priv *priv = netdev_priv(dev);
1555
1556         if (!stmmac_get_hw_features(priv)) {
1557                 seq_printf(seq, "DMA HW features not supported\n");
1558                 return 0;
1559         }
1560
1561         seq_printf(seq, "==============================\n");
1562         seq_printf(seq, "\tDMA HW features\n");
1563         seq_printf(seq, "==============================\n");
1564
1565         seq_printf(seq, "\t10/100 Mbps %s\n",
1566                    (priv->dma_cap.mbps_10_100) ? "Y" : "N");
1567         seq_printf(seq, "\t1000 Mbps %s\n",
1568                    (priv->dma_cap.mbps_1000) ? "Y" : "N");
1569         seq_printf(seq, "\tHalf duple %s\n",
1570                    (priv->dma_cap.half_duplex) ? "Y" : "N");
1571         seq_printf(seq, "\tHash Filter: %s\n",
1572                    (priv->dma_cap.hash_filter) ? "Y" : "N");
1573         seq_printf(seq, "\tMultiple MAC address registers: %s\n",
1574                    (priv->dma_cap.multi_addr) ? "Y" : "N");
1575         seq_printf(seq, "\tPCS (TBI/SGMII/RTBI PHY interfatces): %s\n",
1576                    (priv->dma_cap.pcs) ? "Y" : "N");
1577         seq_printf(seq, "\tSMA (MDIO) Interface: %s\n",
1578                    (priv->dma_cap.sma_mdio) ? "Y" : "N");
1579         seq_printf(seq, "\tPMT Remote wake up: %s\n",
1580                    (priv->dma_cap.pmt_remote_wake_up) ? "Y" : "N");
1581         seq_printf(seq, "\tPMT Magic Frame: %s\n",
1582                    (priv->dma_cap.pmt_magic_frame) ? "Y" : "N");
1583         seq_printf(seq, "\tRMON module: %s\n",
1584                    (priv->dma_cap.rmon) ? "Y" : "N");
1585         seq_printf(seq, "\tIEEE 1588-2002 Time Stamp: %s\n",
1586                    (priv->dma_cap.time_stamp) ? "Y" : "N");
1587         seq_printf(seq, "\tIEEE 1588-2008 Advanced Time Stamp:%s\n",
1588                    (priv->dma_cap.atime_stamp) ? "Y" : "N");
1589         seq_printf(seq, "\t802.3az - Energy-Efficient Ethernet (EEE) %s\n",
1590                    (priv->dma_cap.eee) ? "Y" : "N");
1591         seq_printf(seq, "\tAV features: %s\n", (priv->dma_cap.av) ? "Y" : "N");
1592         seq_printf(seq, "\tChecksum Offload in TX: %s\n",
1593                    (priv->dma_cap.tx_coe) ? "Y" : "N");
1594         seq_printf(seq, "\tIP Checksum Offload (type1) in RX: %s\n",
1595                    (priv->dma_cap.rx_coe_type1) ? "Y" : "N");
1596         seq_printf(seq, "\tIP Checksum Offload (type2) in RX: %s\n",
1597                    (priv->dma_cap.rx_coe_type2) ? "Y" : "N");
1598         seq_printf(seq, "\tRXFIFO > 2048bytes: %s\n",
1599                    (priv->dma_cap.rxfifo_over_2048) ? "Y" : "N");
1600         seq_printf(seq, "\tNumber of Additional RX channel: %d\n",
1601                    priv->dma_cap.number_rx_channel);
1602         seq_printf(seq, "\tNumber of Additional TX channel: %d\n",
1603                    priv->dma_cap.number_tx_channel);
1604         seq_printf(seq, "\tEnhanced descriptors: %s\n",
1605                    (priv->dma_cap.enh_desc) ? "Y" : "N");
1606
1607         return 0;
1608 }
1609
1610 static int stmmac_sysfs_dma_cap_open(struct inode *inode, struct file *file)
1611 {
1612         return single_open(file, stmmac_sysfs_dma_cap_read, inode->i_private);
1613 }
1614
1615 static const struct file_operations stmmac_dma_cap_fops = {
1616         .owner = THIS_MODULE,
1617         .open = stmmac_sysfs_dma_cap_open,
1618         .read = seq_read,
1619         .llseek = seq_lseek,
1620         .release = seq_release,
1621 };
1622
1623 static int stmmac_init_fs(struct net_device *dev)
1624 {
1625         /* Create debugfs entries */
1626         stmmac_fs_dir = debugfs_create_dir(STMMAC_RESOURCE_NAME, NULL);
1627
1628         if (!stmmac_fs_dir || IS_ERR(stmmac_fs_dir)) {
1629                 pr_err("ERROR %s, debugfs create directory failed\n",
1630                        STMMAC_RESOURCE_NAME);
1631
1632                 return -ENOMEM;
1633         }
1634
1635         /* Entry to report DMA RX/TX rings */
1636         stmmac_rings_status = debugfs_create_file("descriptors_status",
1637                                            S_IRUGO, stmmac_fs_dir, dev,
1638                                            &stmmac_rings_status_fops);
1639
1640         if (!stmmac_rings_status || IS_ERR(stmmac_rings_status)) {
1641                 pr_info("ERROR creating stmmac ring debugfs file\n");
1642                 debugfs_remove(stmmac_fs_dir);
1643
1644                 return -ENOMEM;
1645         }
1646
1647         /* Entry to report the DMA HW features */
1648         stmmac_dma_cap = debugfs_create_file("dma_cap", S_IRUGO, stmmac_fs_dir,
1649                                              dev, &stmmac_dma_cap_fops);
1650
1651         if (!stmmac_dma_cap || IS_ERR(stmmac_dma_cap)) {
1652                 pr_info("ERROR creating stmmac MMC debugfs file\n");
1653                 debugfs_remove(stmmac_rings_status);
1654                 debugfs_remove(stmmac_fs_dir);
1655
1656                 return -ENOMEM;
1657         }
1658
1659         return 0;
1660 }
1661
1662 static void stmmac_exit_fs(void)
1663 {
1664         debugfs_remove(stmmac_rings_status);
1665         debugfs_remove(stmmac_dma_cap);
1666         debugfs_remove(stmmac_fs_dir);
1667 }
1668 #endif /* CONFIG_STMMAC_DEBUG_FS */
1669
1670 static const struct net_device_ops stmmac_netdev_ops = {
1671         .ndo_open = stmmac_open,
1672         .ndo_start_xmit = stmmac_xmit,
1673         .ndo_stop = stmmac_release,
1674         .ndo_change_mtu = stmmac_change_mtu,
1675         .ndo_fix_features = stmmac_fix_features,
1676         .ndo_set_rx_mode = stmmac_set_rx_mode,
1677         .ndo_tx_timeout = stmmac_tx_timeout,
1678         .ndo_do_ioctl = stmmac_ioctl,
1679         .ndo_set_config = stmmac_config,
1680 #ifdef CONFIG_NET_POLL_CONTROLLER
1681         .ndo_poll_controller = stmmac_poll_controller,
1682 #endif
1683         .ndo_set_mac_address = eth_mac_addr,
1684 };
1685
1686 /**
1687  * stmmac_probe - Initialization of the adapter .
1688  * @dev : device pointer
1689  * Description: The function initializes the network device structure for
1690  * the STMMAC driver. It also calls the low level routines
1691  * in order to init the HW (i.e. the DMA engine)
1692  */
1693 static int stmmac_probe(struct net_device *dev)
1694 {
1695         int ret = 0;
1696         struct stmmac_priv *priv = netdev_priv(dev);
1697
1698         ether_setup(dev);
1699
1700         dev->netdev_ops = &stmmac_netdev_ops;
1701         stmmac_set_ethtool_ops(dev);
1702
1703         dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1704         dev->features |= dev->hw_features | NETIF_F_HIGHDMA;
1705         dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1706 #ifdef STMMAC_VLAN_TAG_USED
1707         /* Both mac100 and gmac support receive VLAN tag detection */
1708         dev->features |= NETIF_F_HW_VLAN_RX;
1709 #endif
1710         priv->msg_enable = netif_msg_init(debug, default_msg_level);
1711
1712         if (flow_ctrl)
1713                 priv->flow_ctrl = FLOW_AUTO;    /* RX/TX pause on */
1714
1715         priv->pause = pause;
1716         netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1717
1718         /* Get the MAC address */
1719         priv->hw->mac->get_umac_addr((void __iomem *) dev->base_addr,
1720                                      dev->dev_addr, 0);
1721
1722         if (!is_valid_ether_addr(dev->dev_addr))
1723                 pr_warning("\tno valid MAC address;"
1724                         "please, use ifconfig or nwhwconfig!\n");
1725
1726         spin_lock_init(&priv->lock);
1727
1728         ret = register_netdev(dev);
1729         if (ret) {
1730                 pr_err("%s: ERROR %i registering the device\n",
1731                        __func__, ret);
1732                 return -ENODEV;
1733         }
1734
1735         DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1736             dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1737             (dev->features & NETIF_F_IP_CSUM) ? "on" : "off");
1738
1739         return ret;
1740 }
1741
1742 /**
1743  * stmmac_mac_device_setup
1744  * @dev : device pointer
1745  * Description: select and initialise the mac device (mac100 or Gmac).
1746  */
1747 static int stmmac_mac_device_setup(struct net_device *dev)
1748 {
1749         struct stmmac_priv *priv = netdev_priv(dev);
1750
1751         struct mac_device_info *device;
1752
1753         if (priv->plat->has_gmac) {
1754                 dev->priv_flags |= IFF_UNICAST_FLT;
1755                 device = dwmac1000_setup(priv->ioaddr);
1756         } else {
1757                 device = dwmac100_setup(priv->ioaddr);
1758         }
1759
1760         if (!device)
1761                 return -ENOMEM;
1762
1763         if (priv->plat->enh_desc) {
1764                 device->desc = &enh_desc_ops;
1765                 pr_info("\tEnhanced descriptor structure\n");
1766         } else
1767                 device->desc = &ndesc_ops;
1768
1769         priv->hw = device;
1770
1771         if (device_can_wakeup(priv->device)) {
1772                 priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */
1773                 enable_irq_wake(priv->wol_irq);
1774         }
1775
1776         return 0;
1777 }
1778
1779 /**
1780  * stmmac_dvr_probe
1781  * @pdev: platform device pointer
1782  * Description: the driver is initialized through platform_device.
1783  */
1784 static int stmmac_dvr_probe(struct platform_device *pdev)
1785 {
1786         int ret = 0;
1787         struct resource *res;
1788         void __iomem *addr = NULL;
1789         struct net_device *ndev = NULL;
1790         struct stmmac_priv *priv = NULL;
1791         struct plat_stmmacenet_data *plat_dat;
1792
1793         pr_info("STMMAC driver:\n\tplatform registration... ");
1794         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1795         if (!res)
1796                 return -ENODEV;
1797         pr_info("\tdone!\n");
1798
1799         if (!request_mem_region(res->start, resource_size(res),
1800                                 pdev->name)) {
1801                 pr_err("%s: ERROR: memory allocation failed"
1802                        "cannot get the I/O addr 0x%x\n",
1803                        __func__, (unsigned int)res->start);
1804                 return -EBUSY;
1805         }
1806
1807         addr = ioremap(res->start, resource_size(res));
1808         if (!addr) {
1809                 pr_err("%s: ERROR: memory mapping failed\n", __func__);
1810                 ret = -ENOMEM;
1811                 goto out_release_region;
1812         }
1813
1814         ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1815         if (!ndev) {
1816                 pr_err("%s: ERROR: allocating the device\n", __func__);
1817                 ret = -ENOMEM;
1818                 goto out_unmap;
1819         }
1820
1821         SET_NETDEV_DEV(ndev, &pdev->dev);
1822
1823         /* Get the MAC information */
1824         ndev->irq = platform_get_irq_byname(pdev, "macirq");
1825         if (ndev->irq == -ENXIO) {
1826                 pr_err("%s: ERROR: MAC IRQ configuration "
1827                        "information not found\n", __func__);
1828                 ret = -ENXIO;
1829                 goto out_free_ndev;
1830         }
1831
1832         priv = netdev_priv(ndev);
1833         priv->device = &(pdev->dev);
1834         priv->dev = ndev;
1835         plat_dat = pdev->dev.platform_data;
1836
1837         priv->plat = plat_dat;
1838
1839         priv->ioaddr = addr;
1840
1841         /* PMT module is not integrated in all the MAC devices. */
1842         if (plat_dat->pmt) {
1843                 pr_info("\tPMT module supported\n");
1844                 device_set_wakeup_capable(&pdev->dev, 1);
1845         }
1846         /*
1847          * On some platforms e.g. SPEAr the wake up irq differs from the mac irq
1848          * The external wake up irq can be passed through the platform code
1849          * named as "eth_wake_irq"
1850          *
1851          * In case the wake up interrupt is not passed from the platform
1852          * so the driver will continue to use the mac irq (ndev->irq)
1853          */
1854         priv->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
1855         if (priv->wol_irq == -ENXIO)
1856                 priv->wol_irq = ndev->irq;
1857
1858
1859         platform_set_drvdata(pdev, ndev);
1860
1861         /* Set the I/O base addr */
1862         ndev->base_addr = (unsigned long)addr;
1863
1864         /* Custom initialisation */
1865         if (priv->plat->init) {
1866                 ret = priv->plat->init(pdev);
1867                 if (unlikely(ret))
1868                         goto out_free_ndev;
1869         }
1870
1871         /* MAC HW revice detection */
1872         ret = stmmac_mac_device_setup(ndev);
1873         if (ret < 0)
1874                 goto out_plat_exit;
1875
1876         /* Network Device Registration */
1877         ret = stmmac_probe(ndev);
1878         if (ret < 0)
1879                 goto out_plat_exit;
1880
1881         /* Override with kernel parameters if supplied XXX CRS XXX
1882          * this needs to have multiple instances */
1883         if ((phyaddr >= 0) && (phyaddr <= 31))
1884                 priv->plat->phy_addr = phyaddr;
1885
1886         pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1887                "\tIO base addr: 0x%p)\n", ndev->name, pdev->name,
1888                pdev->id, ndev->irq, addr);
1889
1890         /* MDIO bus Registration */
1891         pr_debug("\tMDIO bus (id: %d)...", priv->plat->bus_id);
1892         ret = stmmac_mdio_register(ndev);
1893         if (ret < 0)
1894                 goto out_unregister;
1895         pr_debug("registered!\n");
1896
1897 #ifdef CONFIG_STMMAC_DEBUG_FS
1898         ret = stmmac_init_fs(ndev);
1899         if (ret < 0)
1900                 pr_warning("\tFailed debugFS registration");
1901 #endif
1902
1903         return 0;
1904
1905 out_unregister:
1906         unregister_netdev(ndev);
1907 out_plat_exit:
1908         if (priv->plat->exit)
1909                 priv->plat->exit(pdev);
1910 out_free_ndev:
1911         free_netdev(ndev);
1912         platform_set_drvdata(pdev, NULL);
1913 out_unmap:
1914         iounmap(addr);
1915 out_release_region:
1916         release_mem_region(res->start, resource_size(res));
1917
1918         return ret;
1919 }
1920
1921 /**
1922  * stmmac_dvr_remove
1923  * @pdev: platform device pointer
1924  * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1925  * changes the link status, releases the DMA descriptor rings,
1926  * unregisters the MDIO bus and unmaps the allocated memory.
1927  */
1928 static int stmmac_dvr_remove(struct platform_device *pdev)
1929 {
1930         struct net_device *ndev = platform_get_drvdata(pdev);
1931         struct stmmac_priv *priv = netdev_priv(ndev);
1932         struct resource *res;
1933
1934         pr_info("%s:\n\tremoving driver", __func__);
1935
1936         priv->hw->dma->stop_rx(priv->ioaddr);
1937         priv->hw->dma->stop_tx(priv->ioaddr);
1938
1939         stmmac_disable_mac(priv->ioaddr);
1940
1941         netif_carrier_off(ndev);
1942
1943         stmmac_mdio_unregister(ndev);
1944
1945         if (priv->plat->exit)
1946                 priv->plat->exit(pdev);
1947
1948         platform_set_drvdata(pdev, NULL);
1949         unregister_netdev(ndev);
1950
1951         iounmap((void *)priv->ioaddr);
1952         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1953         release_mem_region(res->start, resource_size(res));
1954
1955 #ifdef CONFIG_STMMAC_DEBUG_FS
1956         stmmac_exit_fs();
1957 #endif
1958
1959         free_netdev(ndev);
1960
1961         return 0;
1962 }
1963
1964 #ifdef CONFIG_PM
1965 static int stmmac_suspend(struct device *dev)
1966 {
1967         struct net_device *ndev = dev_get_drvdata(dev);
1968         struct stmmac_priv *priv = netdev_priv(ndev);
1969         int dis_ic = 0;
1970
1971         if (!ndev || !netif_running(ndev))
1972                 return 0;
1973
1974         spin_lock(&priv->lock);
1975
1976         netif_device_detach(ndev);
1977         netif_stop_queue(ndev);
1978         if (priv->phydev)
1979                 phy_stop(priv->phydev);
1980
1981 #ifdef CONFIG_STMMAC_TIMER
1982         priv->tm->timer_stop();
1983         if (likely(priv->tm->enable))
1984                 dis_ic = 1;
1985 #endif
1986         napi_disable(&priv->napi);
1987
1988         /* Stop TX/RX DMA */
1989         priv->hw->dma->stop_tx(priv->ioaddr);
1990         priv->hw->dma->stop_rx(priv->ioaddr);
1991         /* Clear the Rx/Tx descriptors */
1992         priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
1993                                      dis_ic);
1994         priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
1995
1996         /* Enable Power down mode by programming the PMT regs */
1997         if (device_may_wakeup(priv->device))
1998                 priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
1999         else
2000                 stmmac_disable_mac(priv->ioaddr);
2001
2002         spin_unlock(&priv->lock);
2003         return 0;
2004 }
2005
2006 static int stmmac_resume(struct device *dev)
2007 {
2008         struct net_device *ndev = dev_get_drvdata(dev);
2009         struct stmmac_priv *priv = netdev_priv(ndev);
2010
2011         if (!netif_running(ndev))
2012                 return 0;
2013
2014         spin_lock(&priv->lock);
2015
2016         /* Power Down bit, into the PM register, is cleared
2017          * automatically as soon as a magic packet or a Wake-up frame
2018          * is received. Anyway, it's better to manually clear
2019          * this bit because it can generate problems while resuming
2020          * from another devices (e.g. serial console). */
2021         if (device_may_wakeup(priv->device))
2022                 priv->hw->mac->pmt(priv->ioaddr, 0);
2023
2024         netif_device_attach(ndev);
2025
2026         /* Enable the MAC and DMA */
2027         stmmac_enable_mac(priv->ioaddr);
2028         priv->hw->dma->start_tx(priv->ioaddr);
2029         priv->hw->dma->start_rx(priv->ioaddr);
2030
2031 #ifdef CONFIG_STMMAC_TIMER
2032         if (likely(priv->tm->enable))
2033                 priv->tm->timer_start(tmrate);
2034 #endif
2035         napi_enable(&priv->napi);
2036
2037         if (priv->phydev)
2038                 phy_start(priv->phydev);
2039
2040         netif_start_queue(ndev);
2041
2042         spin_unlock(&priv->lock);
2043         return 0;
2044 }
2045
2046 static int stmmac_freeze(struct device *dev)
2047 {
2048         struct net_device *ndev = dev_get_drvdata(dev);
2049
2050         if (!ndev || !netif_running(ndev))
2051                 return 0;
2052
2053         return stmmac_release(ndev);
2054 }
2055
2056 static int stmmac_restore(struct device *dev)
2057 {
2058         struct net_device *ndev = dev_get_drvdata(dev);
2059
2060         if (!ndev || !netif_running(ndev))
2061                 return 0;
2062
2063         return stmmac_open(ndev);
2064 }
2065
2066 static const struct dev_pm_ops stmmac_pm_ops = {
2067         .suspend = stmmac_suspend,
2068         .resume = stmmac_resume,
2069         .freeze = stmmac_freeze,
2070         .thaw = stmmac_restore,
2071         .restore = stmmac_restore,
2072 };
2073 #else
2074 static const struct dev_pm_ops stmmac_pm_ops;
2075 #endif /* CONFIG_PM */
2076
2077 static struct platform_driver stmmac_driver = {
2078         .probe = stmmac_dvr_probe,
2079         .remove = stmmac_dvr_remove,
2080         .driver = {
2081                 .name = STMMAC_RESOURCE_NAME,
2082                 .owner = THIS_MODULE,
2083                 .pm = &stmmac_pm_ops,
2084         },
2085 };
2086
2087 /**
2088  * stmmac_init_module - Entry point for the driver
2089  * Description: This function is the entry point for the driver.
2090  */
2091 static int __init stmmac_init_module(void)
2092 {
2093         int ret;
2094
2095         ret = platform_driver_register(&stmmac_driver);
2096         return ret;
2097 }
2098
2099 /**
2100  * stmmac_cleanup_module - Cleanup routine for the driver
2101  * Description: This function is the cleanup routine for the driver.
2102  */
2103 static void __exit stmmac_cleanup_module(void)
2104 {
2105         platform_driver_unregister(&stmmac_driver);
2106 }
2107
2108 #ifndef MODULE
2109 static int __init stmmac_cmdline_opt(char *str)
2110 {
2111         char *opt;
2112
2113         if (!str || !*str)
2114                 return -EINVAL;
2115         while ((opt = strsep(&str, ",")) != NULL) {
2116                 if (!strncmp(opt, "debug:", 6)) {
2117                         if (strict_strtoul(opt + 6, 0, (unsigned long *)&debug))
2118                                 goto err;
2119                 } else if (!strncmp(opt, "phyaddr:", 8)) {
2120                         if (strict_strtoul(opt + 8, 0,
2121                                            (unsigned long *)&phyaddr))
2122                                 goto err;
2123                 } else if (!strncmp(opt, "dma_txsize:", 11)) {
2124                         if (strict_strtoul(opt + 11, 0,
2125                                            (unsigned long *)&dma_txsize))
2126                                 goto err;
2127                 } else if (!strncmp(opt, "dma_rxsize:", 11)) {
2128                         if (strict_strtoul(opt + 11, 0,
2129                                            (unsigned long *)&dma_rxsize))
2130                                 goto err;
2131                 } else if (!strncmp(opt, "buf_sz:", 7)) {
2132                         if (strict_strtoul(opt + 7, 0,
2133                                            (unsigned long *)&buf_sz))
2134                                 goto err;
2135                 } else if (!strncmp(opt, "tc:", 3)) {
2136                         if (strict_strtoul(opt + 3, 0, (unsigned long *)&tc))
2137                                 goto err;
2138                 } else if (!strncmp(opt, "watchdog:", 9)) {
2139                         if (strict_strtoul(opt + 9, 0,
2140                                            (unsigned long *)&watchdog))
2141                                 goto err;
2142                 } else if (!strncmp(opt, "flow_ctrl:", 10)) {
2143                         if (strict_strtoul(opt + 10, 0,
2144                                            (unsigned long *)&flow_ctrl))
2145                                 goto err;
2146                 } else if (!strncmp(opt, "pause:", 6)) {
2147                         if (strict_strtoul(opt + 6, 0, (unsigned long *)&pause))
2148                                 goto err;
2149 #ifdef CONFIG_STMMAC_TIMER
2150                 } else if (!strncmp(opt, "tmrate:", 7)) {
2151                         if (strict_strtoul(opt + 7, 0,
2152                                            (unsigned long *)&tmrate))
2153                                 goto err;
2154 #endif
2155                 }
2156         }
2157         return 0;
2158
2159 err:
2160         pr_err("%s: ERROR broken module parameter conversion", __func__);
2161         return -EINVAL;
2162 }
2163
2164 __setup("stmmaceth=", stmmac_cmdline_opt);
2165 #endif
2166
2167 module_init(stmmac_init_module);
2168 module_exit(stmmac_cleanup_module);
2169
2170 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
2171 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
2172 MODULE_LICENSE("GPL");