2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
30 /* Information for net-next */
31 #define NETNEXT_VERSION "08"
33 /* Information for net */
34 #define NET_VERSION "5"
36 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
37 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
38 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
39 #define MODULENAME "r8152"
41 #define R8152_PHY_ID 32
43 #define PLA_IDR 0xc000
44 #define PLA_RCR 0xc010
45 #define PLA_RMS 0xc016
46 #define PLA_RXFIFO_CTRL0 0xc0a0
47 #define PLA_RXFIFO_CTRL1 0xc0a4
48 #define PLA_RXFIFO_CTRL2 0xc0a8
49 #define PLA_DMY_REG0 0xc0b0
50 #define PLA_FMC 0xc0b4
51 #define PLA_CFG_WOL 0xc0b6
52 #define PLA_TEREDO_CFG 0xc0bc
53 #define PLA_MAR 0xcd00
54 #define PLA_BACKUP 0xd000
55 #define PAL_BDC_CR 0xd1a0
56 #define PLA_TEREDO_TIMER 0xd2cc
57 #define PLA_REALWOW_TIMER 0xd2e8
58 #define PLA_LEDSEL 0xdd90
59 #define PLA_LED_FEATURE 0xdd92
60 #define PLA_PHYAR 0xde00
61 #define PLA_BOOT_CTRL 0xe004
62 #define PLA_GPHY_INTR_IMR 0xe022
63 #define PLA_EEE_CR 0xe040
64 #define PLA_EEEP_CR 0xe080
65 #define PLA_MAC_PWR_CTRL 0xe0c0
66 #define PLA_MAC_PWR_CTRL2 0xe0ca
67 #define PLA_MAC_PWR_CTRL3 0xe0cc
68 #define PLA_MAC_PWR_CTRL4 0xe0ce
69 #define PLA_WDT6_CTRL 0xe428
70 #define PLA_TCR0 0xe610
71 #define PLA_TCR1 0xe612
72 #define PLA_MTPS 0xe615
73 #define PLA_TXFIFO_CTRL 0xe618
74 #define PLA_RSTTALLY 0xe800
76 #define PLA_CRWECR 0xe81c
77 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
78 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
79 #define PLA_CONFIG5 0xe822
80 #define PLA_PHY_PWR 0xe84c
81 #define PLA_OOB_CTRL 0xe84f
82 #define PLA_CPCR 0xe854
83 #define PLA_MISC_0 0xe858
84 #define PLA_MISC_1 0xe85a
85 #define PLA_OCP_GPHY_BASE 0xe86c
86 #define PLA_TALLYCNT 0xe890
87 #define PLA_SFF_STS_7 0xe8de
88 #define PLA_PHYSTATUS 0xe908
89 #define PLA_BP_BA 0xfc26
90 #define PLA_BP_0 0xfc28
91 #define PLA_BP_1 0xfc2a
92 #define PLA_BP_2 0xfc2c
93 #define PLA_BP_3 0xfc2e
94 #define PLA_BP_4 0xfc30
95 #define PLA_BP_5 0xfc32
96 #define PLA_BP_6 0xfc34
97 #define PLA_BP_7 0xfc36
98 #define PLA_BP_EN 0xfc38
100 #define USB_USB2PHY 0xb41e
101 #define USB_SSPHYLINK2 0xb428
102 #define USB_U2P3_CTRL 0xb460
103 #define USB_CSR_DUMMY1 0xb464
104 #define USB_CSR_DUMMY2 0xb466
105 #define USB_DEV_STAT 0xb808
106 #define USB_CONNECT_TIMER 0xcbf8
107 #define USB_BURST_SIZE 0xcfc0
108 #define USB_USB_CTRL 0xd406
109 #define USB_PHY_CTRL 0xd408
110 #define USB_TX_AGG 0xd40a
111 #define USB_RX_BUF_TH 0xd40c
112 #define USB_USB_TIMER 0xd428
113 #define USB_RX_EARLY_TIMEOUT 0xd42c
114 #define USB_RX_EARLY_SIZE 0xd42e
115 #define USB_PM_CTRL_STATUS 0xd432
116 #define USB_TX_DMA 0xd434
117 #define USB_TOLERANCE 0xd490
118 #define USB_LPM_CTRL 0xd41a
119 #define USB_BMU_RESET 0xd4b0
120 #define USB_UPS_CTRL 0xd800
121 #define USB_MISC_0 0xd81a
122 #define USB_POWER_CUT 0xd80a
123 #define USB_AFE_CTRL2 0xd824
124 #define USB_WDT11_CTRL 0xe43c
125 #define USB_BP_BA 0xfc26
126 #define USB_BP_0 0xfc28
127 #define USB_BP_1 0xfc2a
128 #define USB_BP_2 0xfc2c
129 #define USB_BP_3 0xfc2e
130 #define USB_BP_4 0xfc30
131 #define USB_BP_5 0xfc32
132 #define USB_BP_6 0xfc34
133 #define USB_BP_7 0xfc36
134 #define USB_BP_EN 0xfc38
137 #define OCP_ALDPS_CONFIG 0x2010
138 #define OCP_EEE_CONFIG1 0x2080
139 #define OCP_EEE_CONFIG2 0x2092
140 #define OCP_EEE_CONFIG3 0x2094
141 #define OCP_BASE_MII 0xa400
142 #define OCP_EEE_AR 0xa41a
143 #define OCP_EEE_DATA 0xa41c
144 #define OCP_PHY_STATUS 0xa420
145 #define OCP_POWER_CFG 0xa430
146 #define OCP_EEE_CFG 0xa432
147 #define OCP_SRAM_ADDR 0xa436
148 #define OCP_SRAM_DATA 0xa438
149 #define OCP_DOWN_SPEED 0xa442
150 #define OCP_EEE_ABLE 0xa5c4
151 #define OCP_EEE_ADV 0xa5d0
152 #define OCP_EEE_LPABLE 0xa5d2
153 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
154 #define OCP_ADC_CFG 0xbc06
157 #define SRAM_LPF_CFG 0x8012
158 #define SRAM_10M_AMP1 0x8080
159 #define SRAM_10M_AMP2 0x8082
160 #define SRAM_IMPEDANCE 0x8084
163 #define RCR_AAP 0x00000001
164 #define RCR_APM 0x00000002
165 #define RCR_AM 0x00000004
166 #define RCR_AB 0x00000008
167 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
169 /* PLA_RXFIFO_CTRL0 */
170 #define RXFIFO_THR1_NORMAL 0x00080002
171 #define RXFIFO_THR1_OOB 0x01800003
173 /* PLA_RXFIFO_CTRL1 */
174 #define RXFIFO_THR2_FULL 0x00000060
175 #define RXFIFO_THR2_HIGH 0x00000038
176 #define RXFIFO_THR2_OOB 0x0000004a
177 #define RXFIFO_THR2_NORMAL 0x00a0
179 /* PLA_RXFIFO_CTRL2 */
180 #define RXFIFO_THR3_FULL 0x00000078
181 #define RXFIFO_THR3_HIGH 0x00000048
182 #define RXFIFO_THR3_OOB 0x0000005a
183 #define RXFIFO_THR3_NORMAL 0x0110
185 /* PLA_TXFIFO_CTRL */
186 #define TXFIFO_THR_NORMAL 0x00400008
187 #define TXFIFO_THR_NORMAL2 0x01000008
190 #define ECM_ALDPS 0x0002
193 #define FMC_FCR_MCU_EN 0x0001
196 #define EEEP_CR_EEEP_TX 0x0002
199 #define WDT6_SET_MODE 0x0010
202 #define TCR0_TX_EMPTY 0x0800
203 #define TCR0_AUTO_FIFO 0x0080
206 #define VERSION_MASK 0x7cf0
209 #define MTPS_JUMBO (12 * 1024 / 64)
210 #define MTPS_DEFAULT (6 * 1024 / 64)
213 #define TALLY_RESET 0x0001
221 #define CRWECR_NORAML 0x00
222 #define CRWECR_CONFIG 0xc0
225 #define NOW_IS_OOB 0x80
226 #define TXFIFO_EMPTY 0x20
227 #define RXFIFO_EMPTY 0x10
228 #define LINK_LIST_READY 0x02
229 #define DIS_MCU_CLROOB 0x01
230 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
233 #define RXDY_GATED_EN 0x0008
236 #define RE_INIT_LL 0x8000
237 #define MCU_BORW_EN 0x4000
240 #define CPCR_RX_VLAN 0x0040
243 #define MAGIC_EN 0x0001
246 #define TEREDO_SEL 0x8000
247 #define TEREDO_WAKE_MASK 0x7f00
248 #define TEREDO_RS_EVENT_MASK 0x00fe
249 #define OOB_TEREDO_EN 0x0001
252 #define ALDPS_PROXY_MODE 0x0001
255 #define LINK_ON_WAKE_EN 0x0010
256 #define LINK_OFF_WAKE_EN 0x0008
259 #define BWF_EN 0x0040
260 #define MWF_EN 0x0020
261 #define UWF_EN 0x0010
262 #define LAN_WAKE_EN 0x0002
264 /* PLA_LED_FEATURE */
265 #define LED_MODE_MASK 0x0700
268 #define TX_10M_IDLE_EN 0x0080
269 #define PFM_PWM_SWITCH 0x0040
271 /* PLA_MAC_PWR_CTRL */
272 #define D3_CLK_GATED_EN 0x00004000
273 #define MCU_CLK_RATIO 0x07010f07
274 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
275 #define ALDPS_SPDWN_RATIO 0x0f87
277 /* PLA_MAC_PWR_CTRL2 */
278 #define EEE_SPDWN_RATIO 0x8007
280 /* PLA_MAC_PWR_CTRL3 */
281 #define PKT_AVAIL_SPDWN_EN 0x0100
282 #define SUSPEND_SPDWN_EN 0x0004
283 #define U1U2_SPDWN_EN 0x0002
284 #define L1_SPDWN_EN 0x0001
286 /* PLA_MAC_PWR_CTRL4 */
287 #define PWRSAVE_SPDWN_EN 0x1000
288 #define RXDV_SPDWN_EN 0x0800
289 #define TX10MIDLE_EN 0x0100
290 #define TP100_SPDWN_EN 0x0020
291 #define TP500_SPDWN_EN 0x0010
292 #define TP1000_SPDWN_EN 0x0008
293 #define EEE_SPDWN_EN 0x0001
295 /* PLA_GPHY_INTR_IMR */
296 #define GPHY_STS_MSK 0x0001
297 #define SPEED_DOWN_MSK 0x0002
298 #define SPDWN_RXDV_MSK 0x0004
299 #define SPDWN_LINKCHG_MSK 0x0008
302 #define PHYAR_FLAG 0x80000000
305 #define EEE_RX_EN 0x0001
306 #define EEE_TX_EN 0x0002
309 #define AUTOLOAD_DONE 0x0002
312 #define USB2PHY_SUSPEND 0x0001
313 #define USB2PHY_L1 0x0002
316 #define pwd_dn_scale_mask 0x3ffe
317 #define pwd_dn_scale(x) ((x) << 1)
320 #define DYNAMIC_BURST 0x0001
323 #define EP4_FULL_FC 0x0001
326 #define STAT_SPEED_MASK 0x0006
327 #define STAT_SPEED_HIGH 0x0000
328 #define STAT_SPEED_FULL 0x0002
331 #define TX_AGG_MAX_THRESHOLD 0x03
334 #define RX_THR_SUPPER 0x0c350180
335 #define RX_THR_HIGH 0x7a120180
336 #define RX_THR_SLOW 0xffff0180
339 #define TEST_MODE_DISABLE 0x00000001
340 #define TX_SIZE_ADJUST1 0x00000100
343 #define BMU_RESET_EP_IN 0x01
344 #define BMU_RESET_EP_OUT 0x02
347 #define POWER_CUT 0x0100
349 /* USB_PM_CTRL_STATUS */
350 #define RESUME_INDICATE 0x0001
353 #define RX_AGG_DISABLE 0x0010
354 #define RX_ZERO_EN 0x0080
357 #define U2P3_ENABLE 0x0001
360 #define PWR_EN 0x0001
361 #define PHASE2_EN 0x0008
364 #define PCUT_STATUS 0x0001
366 /* USB_RX_EARLY_TIMEOUT */
367 #define COALESCE_SUPER 85000U
368 #define COALESCE_HIGH 250000U
369 #define COALESCE_SLOW 524280U
372 #define TIMER11_EN 0x0001
375 /* bit 4 ~ 5: fifo empty boundary */
376 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
377 /* bit 2 ~ 3: LMP timer */
378 #define LPM_TIMER_MASK 0x0c
379 #define LPM_TIMER_500MS 0x04 /* 500 ms */
380 #define LPM_TIMER_500US 0x0c /* 500 us */
381 #define ROK_EXIT_LPM 0x02
384 #define SEN_VAL_MASK 0xf800
385 #define SEN_VAL_NORMAL 0xa000
386 #define SEL_RXIDLE 0x0100
388 /* OCP_ALDPS_CONFIG */
389 #define ENPWRSAVE 0x8000
390 #define ENPDNPS 0x0200
391 #define LINKENA 0x0100
392 #define DIS_SDSAVE 0x0010
395 #define PHY_STAT_MASK 0x0007
396 #define PHY_STAT_LAN_ON 3
397 #define PHY_STAT_PWRDN 5
400 #define EEE_CLKDIV_EN 0x8000
401 #define EN_ALDPS 0x0004
402 #define EN_10M_PLLOFF 0x0001
404 /* OCP_EEE_CONFIG1 */
405 #define RG_TXLPI_MSK_HFDUP 0x8000
406 #define RG_MATCLR_EN 0x4000
407 #define EEE_10_CAP 0x2000
408 #define EEE_NWAY_EN 0x1000
409 #define TX_QUIET_EN 0x0200
410 #define RX_QUIET_EN 0x0100
411 #define sd_rise_time_mask 0x0070
412 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
413 #define RG_RXLPI_MSK_HFDUP 0x0008
414 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
416 /* OCP_EEE_CONFIG2 */
417 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
418 #define RG_DACQUIET_EN 0x0400
419 #define RG_LDVQUIET_EN 0x0200
420 #define RG_CKRSEL 0x0020
421 #define RG_EEEPRG_EN 0x0010
423 /* OCP_EEE_CONFIG3 */
424 #define fast_snr_mask 0xff80
425 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
426 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
427 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
430 /* bit[15:14] function */
431 #define FUN_ADDR 0x0000
432 #define FUN_DATA 0x4000
433 /* bit[4:0] device addr */
436 #define CTAP_SHORT_EN 0x0040
437 #define EEE10_EN 0x0010
440 #define EN_10M_BGOFF 0x0080
443 #define TXDIS_STATE 0x01
444 #define ABD_STATE 0x02
447 #define CKADSEL_L 0x0100
448 #define ADC_EN 0x0080
449 #define EN_EMI_L 0x0040
452 #define LPF_AUTO_TUNE 0x8000
455 #define GDAC_IB_UPALL 0x0008
458 #define AMP_DN 0x0200
461 #define RX_DRIVING_MASK 0x6000
463 enum rtl_register_content {
471 #define RTL8152_MAX_TX 4
472 #define RTL8152_MAX_RX 10
478 #define INTR_LINK 0x0004
480 #define RTL8152_REQT_READ 0xc0
481 #define RTL8152_REQT_WRITE 0x40
482 #define RTL8152_REQ_GET_REGS 0x05
483 #define RTL8152_REQ_SET_REGS 0x05
485 #define BYTE_EN_DWORD 0xff
486 #define BYTE_EN_WORD 0x33
487 #define BYTE_EN_BYTE 0x11
488 #define BYTE_EN_SIX_BYTES 0x3f
489 #define BYTE_EN_START_MASK 0x0f
490 #define BYTE_EN_END_MASK 0xf0
492 #define RTL8153_MAX_PACKET 9216 /* 9K */
493 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
494 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
495 #define RTL8153_RMS RTL8153_MAX_PACKET
496 #define RTL8152_TX_TIMEOUT (5 * HZ)
497 #define RTL8152_NAPI_WEIGHT 64
510 /* Define these values to match your device */
511 #define VENDOR_ID_REALTEK 0x0bda
512 #define VENDOR_ID_SAMSUNG 0x04e8
513 #define VENDOR_ID_LENOVO 0x17ef
514 #define VENDOR_ID_NVIDIA 0x0955
516 #define MCU_TYPE_PLA 0x0100
517 #define MCU_TYPE_USB 0x0000
519 struct tally_counter {
526 __le32 tx_one_collision;
527 __le32 tx_multi_collision;
537 #define RX_LEN_MASK 0x7fff
540 #define RD_UDP_CS BIT(23)
541 #define RD_TCP_CS BIT(22)
542 #define RD_IPV6_CS BIT(20)
543 #define RD_IPV4_CS BIT(19)
546 #define IPF BIT(23) /* IP checksum fail */
547 #define UDPF BIT(22) /* UDP checksum fail */
548 #define TCPF BIT(21) /* TCP checksum fail */
549 #define RX_VLAN_TAG BIT(16)
558 #define TX_FS BIT(31) /* First segment of a packet */
559 #define TX_LS BIT(30) /* Final segment of a packet */
560 #define GTSENDV4 BIT(28)
561 #define GTSENDV6 BIT(27)
562 #define GTTCPHO_SHIFT 18
563 #define GTTCPHO_MAX 0x7fU
564 #define TX_LEN_MAX 0x3ffffU
567 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
568 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
569 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
570 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
572 #define MSS_MAX 0x7ffU
573 #define TCPHO_SHIFT 17
574 #define TCPHO_MAX 0x7ffU
575 #define TX_VLAN_TAG BIT(16)
581 struct list_head list;
583 struct r8152 *context;
589 struct list_head list;
591 struct r8152 *context;
600 struct usb_device *udev;
601 struct napi_struct napi;
602 struct usb_interface *intf;
603 struct net_device *netdev;
604 struct urb *intr_urb;
605 struct tx_agg tx_info[RTL8152_MAX_TX];
606 struct rx_agg rx_info[RTL8152_MAX_RX];
607 struct list_head rx_done, tx_free;
608 struct sk_buff_head tx_queue, rx_queue;
609 spinlock_t rx_lock, tx_lock;
610 struct delayed_work schedule;
611 struct mii_if_info mii;
612 struct mutex control; /* use for hw setting */
613 #ifdef CONFIG_PM_SLEEP
614 struct notifier_block pm_notifier;
618 void (*init)(struct r8152 *);
619 int (*enable)(struct r8152 *);
620 void (*disable)(struct r8152 *);
621 void (*up)(struct r8152 *);
622 void (*down)(struct r8152 *);
623 void (*unload)(struct r8152 *);
624 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
625 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
626 bool (*in_nway)(struct r8152 *);
627 void (*autosuspend_en)(struct r8152 *tp, bool enable);
657 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
658 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
660 static const int multicast_filter_limit = 32;
661 static unsigned int agg_buf_sz = 16384;
663 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
664 VLAN_ETH_HLEN - VLAN_HLEN)
667 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
672 tmp = kmalloc(size, GFP_KERNEL);
676 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
677 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
678 value, index, tmp, size, 500);
680 memcpy(data, tmp, size);
687 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
692 tmp = kmemdup(data, size, GFP_KERNEL);
696 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
697 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
698 value, index, tmp, size, 500);
705 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
706 void *data, u16 type)
711 if (test_bit(RTL8152_UNPLUG, &tp->flags))
714 /* both size and indix must be 4 bytes align */
715 if ((size & 3) || !size || (index & 3) || !data)
718 if ((u32)index + (u32)size > 0xffff)
723 ret = get_registers(tp, index, type, limit, data);
731 ret = get_registers(tp, index, type, size, data);
743 set_bit(RTL8152_UNPLUG, &tp->flags);
748 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
749 u16 size, void *data, u16 type)
752 u16 byteen_start, byteen_end, byen;
755 if (test_bit(RTL8152_UNPLUG, &tp->flags))
758 /* both size and indix must be 4 bytes align */
759 if ((size & 3) || !size || (index & 3) || !data)
762 if ((u32)index + (u32)size > 0xffff)
765 byteen_start = byteen & BYTE_EN_START_MASK;
766 byteen_end = byteen & BYTE_EN_END_MASK;
768 byen = byteen_start | (byteen_start << 4);
769 ret = set_registers(tp, index, type | byen, 4, data);
782 ret = set_registers(tp, index,
783 type | BYTE_EN_DWORD,
792 ret = set_registers(tp, index,
793 type | BYTE_EN_DWORD,
805 byen = byteen_end | (byteen_end >> 4);
806 ret = set_registers(tp, index, type | byen, 4, data);
813 set_bit(RTL8152_UNPLUG, &tp->flags);
819 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
821 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
825 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
827 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
831 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
833 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
837 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
839 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
842 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
846 generic_ocp_read(tp, index, sizeof(data), &data, type);
848 return __le32_to_cpu(data);
851 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
853 __le32 tmp = __cpu_to_le32(data);
855 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
858 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
862 u8 shift = index & 2;
866 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
868 data = __le32_to_cpu(tmp);
869 data >>= (shift * 8);
875 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
879 u16 byen = BYTE_EN_WORD;
880 u8 shift = index & 2;
886 mask <<= (shift * 8);
887 data <<= (shift * 8);
891 tmp = __cpu_to_le32(data);
893 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
896 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
900 u8 shift = index & 3;
904 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
906 data = __le32_to_cpu(tmp);
907 data >>= (shift * 8);
913 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
917 u16 byen = BYTE_EN_BYTE;
918 u8 shift = index & 3;
924 mask <<= (shift * 8);
925 data <<= (shift * 8);
929 tmp = __cpu_to_le32(data);
931 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
934 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
936 u16 ocp_base, ocp_index;
938 ocp_base = addr & 0xf000;
939 if (ocp_base != tp->ocp_base) {
940 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
941 tp->ocp_base = ocp_base;
944 ocp_index = (addr & 0x0fff) | 0xb000;
945 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
948 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
950 u16 ocp_base, ocp_index;
952 ocp_base = addr & 0xf000;
953 if (ocp_base != tp->ocp_base) {
954 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
955 tp->ocp_base = ocp_base;
958 ocp_index = (addr & 0x0fff) | 0xb000;
959 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
962 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
964 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
967 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
969 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
972 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
974 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
975 ocp_reg_write(tp, OCP_SRAM_DATA, data);
978 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
980 struct r8152 *tp = netdev_priv(netdev);
983 if (test_bit(RTL8152_UNPLUG, &tp->flags))
986 if (phy_id != R8152_PHY_ID)
989 ret = r8152_mdio_read(tp, reg);
995 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
997 struct r8152 *tp = netdev_priv(netdev);
999 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1002 if (phy_id != R8152_PHY_ID)
1005 r8152_mdio_write(tp, reg, val);
1009 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1011 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1013 struct r8152 *tp = netdev_priv(netdev);
1014 struct sockaddr *addr = p;
1015 int ret = -EADDRNOTAVAIL;
1017 if (!is_valid_ether_addr(addr->sa_data))
1020 ret = usb_autopm_get_interface(tp->intf);
1024 mutex_lock(&tp->control);
1026 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1028 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1029 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1030 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1032 mutex_unlock(&tp->control);
1034 usb_autopm_put_interface(tp->intf);
1039 static int set_ethernet_addr(struct r8152 *tp)
1041 struct net_device *dev = tp->netdev;
1045 if (tp->version == RTL_VER_01)
1046 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1048 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1051 netif_err(tp, probe, dev, "Get ether addr fail\n");
1052 } else if (!is_valid_ether_addr(sa.sa_data)) {
1053 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1055 eth_hw_addr_random(dev);
1056 ether_addr_copy(sa.sa_data, dev->dev_addr);
1057 ret = rtl8152_set_mac_address(dev, &sa);
1058 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1061 if (tp->version == RTL_VER_01)
1062 ether_addr_copy(dev->dev_addr, sa.sa_data);
1064 ret = rtl8152_set_mac_address(dev, &sa);
1070 static void read_bulk_callback(struct urb *urb)
1072 struct net_device *netdev;
1073 int status = urb->status;
1085 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1088 if (!test_bit(WORK_ENABLE, &tp->flags))
1091 netdev = tp->netdev;
1093 /* When link down, the driver would cancel all bulks. */
1094 /* This avoid the re-submitting bulk */
1095 if (!netif_carrier_ok(netdev))
1098 usb_mark_last_busy(tp->udev);
1102 if (urb->actual_length < ETH_ZLEN)
1105 spin_lock(&tp->rx_lock);
1106 list_add_tail(&agg->list, &tp->rx_done);
1107 spin_unlock(&tp->rx_lock);
1108 napi_schedule(&tp->napi);
1111 set_bit(RTL8152_UNPLUG, &tp->flags);
1112 netif_device_detach(tp->netdev);
1115 return; /* the urb is in unlink state */
1117 if (net_ratelimit())
1118 netdev_warn(netdev, "maybe reset is needed?\n");
1121 if (net_ratelimit())
1122 netdev_warn(netdev, "Rx status %d\n", status);
1126 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1129 static void write_bulk_callback(struct urb *urb)
1131 struct net_device_stats *stats;
1132 struct net_device *netdev;
1135 int status = urb->status;
1145 netdev = tp->netdev;
1146 stats = &netdev->stats;
1148 if (net_ratelimit())
1149 netdev_warn(netdev, "Tx status %d\n", status);
1150 stats->tx_errors += agg->skb_num;
1152 stats->tx_packets += agg->skb_num;
1153 stats->tx_bytes += agg->skb_len;
1156 spin_lock(&tp->tx_lock);
1157 list_add_tail(&agg->list, &tp->tx_free);
1158 spin_unlock(&tp->tx_lock);
1160 usb_autopm_put_interface_async(tp->intf);
1162 if (!netif_carrier_ok(netdev))
1165 if (!test_bit(WORK_ENABLE, &tp->flags))
1168 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1171 if (!skb_queue_empty(&tp->tx_queue))
1172 napi_schedule(&tp->napi);
1175 static void intr_callback(struct urb *urb)
1179 int status = urb->status;
1186 if (!test_bit(WORK_ENABLE, &tp->flags))
1189 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1193 case 0: /* success */
1195 case -ECONNRESET: /* unlink */
1197 netif_device_detach(tp->netdev);
1200 netif_info(tp, intr, tp->netdev,
1201 "Stop submitting intr, status %d\n", status);
1204 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1206 /* -EPIPE: should clear the halt */
1208 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1212 d = urb->transfer_buffer;
1213 if (INTR_LINK & __le16_to_cpu(d[0])) {
1214 if (!netif_carrier_ok(tp->netdev)) {
1215 set_bit(RTL8152_LINK_CHG, &tp->flags);
1216 schedule_delayed_work(&tp->schedule, 0);
1219 if (netif_carrier_ok(tp->netdev)) {
1220 set_bit(RTL8152_LINK_CHG, &tp->flags);
1221 schedule_delayed_work(&tp->schedule, 0);
1226 res = usb_submit_urb(urb, GFP_ATOMIC);
1227 if (res == -ENODEV) {
1228 set_bit(RTL8152_UNPLUG, &tp->flags);
1229 netif_device_detach(tp->netdev);
1231 netif_err(tp, intr, tp->netdev,
1232 "can't resubmit intr, status %d\n", res);
1236 static inline void *rx_agg_align(void *data)
1238 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1241 static inline void *tx_agg_align(void *data)
1243 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1246 static void free_all_mem(struct r8152 *tp)
1250 for (i = 0; i < RTL8152_MAX_RX; i++) {
1251 usb_free_urb(tp->rx_info[i].urb);
1252 tp->rx_info[i].urb = NULL;
1254 kfree(tp->rx_info[i].buffer);
1255 tp->rx_info[i].buffer = NULL;
1256 tp->rx_info[i].head = NULL;
1259 for (i = 0; i < RTL8152_MAX_TX; i++) {
1260 usb_free_urb(tp->tx_info[i].urb);
1261 tp->tx_info[i].urb = NULL;
1263 kfree(tp->tx_info[i].buffer);
1264 tp->tx_info[i].buffer = NULL;
1265 tp->tx_info[i].head = NULL;
1268 usb_free_urb(tp->intr_urb);
1269 tp->intr_urb = NULL;
1271 kfree(tp->intr_buff);
1272 tp->intr_buff = NULL;
1275 static int alloc_all_mem(struct r8152 *tp)
1277 struct net_device *netdev = tp->netdev;
1278 struct usb_interface *intf = tp->intf;
1279 struct usb_host_interface *alt = intf->cur_altsetting;
1280 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1285 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1287 spin_lock_init(&tp->rx_lock);
1288 spin_lock_init(&tp->tx_lock);
1289 INIT_LIST_HEAD(&tp->tx_free);
1290 skb_queue_head_init(&tp->tx_queue);
1291 skb_queue_head_init(&tp->rx_queue);
1293 for (i = 0; i < RTL8152_MAX_RX; i++) {
1294 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1298 if (buf != rx_agg_align(buf)) {
1300 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1306 urb = usb_alloc_urb(0, GFP_KERNEL);
1312 INIT_LIST_HEAD(&tp->rx_info[i].list);
1313 tp->rx_info[i].context = tp;
1314 tp->rx_info[i].urb = urb;
1315 tp->rx_info[i].buffer = buf;
1316 tp->rx_info[i].head = rx_agg_align(buf);
1319 for (i = 0; i < RTL8152_MAX_TX; i++) {
1320 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1324 if (buf != tx_agg_align(buf)) {
1326 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1332 urb = usb_alloc_urb(0, GFP_KERNEL);
1338 INIT_LIST_HEAD(&tp->tx_info[i].list);
1339 tp->tx_info[i].context = tp;
1340 tp->tx_info[i].urb = urb;
1341 tp->tx_info[i].buffer = buf;
1342 tp->tx_info[i].head = tx_agg_align(buf);
1344 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1347 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1351 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1355 tp->intr_interval = (int)ep_intr->desc.bInterval;
1356 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1357 tp->intr_buff, INTBUFSIZE, intr_callback,
1358 tp, tp->intr_interval);
1367 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1369 struct tx_agg *agg = NULL;
1370 unsigned long flags;
1372 if (list_empty(&tp->tx_free))
1375 spin_lock_irqsave(&tp->tx_lock, flags);
1376 if (!list_empty(&tp->tx_free)) {
1377 struct list_head *cursor;
1379 cursor = tp->tx_free.next;
1380 list_del_init(cursor);
1381 agg = list_entry(cursor, struct tx_agg, list);
1383 spin_unlock_irqrestore(&tp->tx_lock, flags);
1388 /* r8152_csum_workaround()
1389 * The hw limites the value the transport offset. When the offset is out of the
1390 * range, calculate the checksum by sw.
1392 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1393 struct sk_buff_head *list)
1395 if (skb_shinfo(skb)->gso_size) {
1396 netdev_features_t features = tp->netdev->features;
1397 struct sk_buff_head seg_list;
1398 struct sk_buff *segs, *nskb;
1400 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1401 segs = skb_gso_segment(skb, features);
1402 if (IS_ERR(segs) || !segs)
1405 __skb_queue_head_init(&seg_list);
1411 __skb_queue_tail(&seg_list, nskb);
1414 skb_queue_splice(&seg_list, list);
1416 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1417 if (skb_checksum_help(skb) < 0)
1420 __skb_queue_head(list, skb);
1422 struct net_device_stats *stats;
1425 stats = &tp->netdev->stats;
1426 stats->tx_dropped++;
1431 /* msdn_giant_send_check()
1432 * According to the document of microsoft, the TCP Pseudo Header excludes the
1433 * packet length for IPv6 TCP large packets.
1435 static int msdn_giant_send_check(struct sk_buff *skb)
1437 const struct ipv6hdr *ipv6h;
1441 ret = skb_cow_head(skb, 0);
1445 ipv6h = ipv6_hdr(skb);
1449 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1454 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1456 if (skb_vlan_tag_present(skb)) {
1459 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1460 desc->opts2 |= cpu_to_le32(opts2);
1464 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1466 u32 opts2 = le32_to_cpu(desc->opts2);
1468 if (opts2 & RX_VLAN_TAG)
1469 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1470 swab16(opts2 & 0xffff));
1473 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1474 struct sk_buff *skb, u32 len, u32 transport_offset)
1476 u32 mss = skb_shinfo(skb)->gso_size;
1477 u32 opts1, opts2 = 0;
1478 int ret = TX_CSUM_SUCCESS;
1480 WARN_ON_ONCE(len > TX_LEN_MAX);
1482 opts1 = len | TX_FS | TX_LS;
1485 if (transport_offset > GTTCPHO_MAX) {
1486 netif_warn(tp, tx_err, tp->netdev,
1487 "Invalid transport offset 0x%x for TSO\n",
1493 switch (vlan_get_protocol(skb)) {
1494 case htons(ETH_P_IP):
1498 case htons(ETH_P_IPV6):
1499 if (msdn_giant_send_check(skb)) {
1511 opts1 |= transport_offset << GTTCPHO_SHIFT;
1512 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1513 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1516 if (transport_offset > TCPHO_MAX) {
1517 netif_warn(tp, tx_err, tp->netdev,
1518 "Invalid transport offset 0x%x\n",
1524 switch (vlan_get_protocol(skb)) {
1525 case htons(ETH_P_IP):
1527 ip_protocol = ip_hdr(skb)->protocol;
1530 case htons(ETH_P_IPV6):
1532 ip_protocol = ipv6_hdr(skb)->nexthdr;
1536 ip_protocol = IPPROTO_RAW;
1540 if (ip_protocol == IPPROTO_TCP)
1542 else if (ip_protocol == IPPROTO_UDP)
1547 opts2 |= transport_offset << TCPHO_SHIFT;
1550 desc->opts2 = cpu_to_le32(opts2);
1551 desc->opts1 = cpu_to_le32(opts1);
1557 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1559 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1563 __skb_queue_head_init(&skb_head);
1564 spin_lock(&tx_queue->lock);
1565 skb_queue_splice_init(tx_queue, &skb_head);
1566 spin_unlock(&tx_queue->lock);
1568 tx_data = agg->head;
1571 remain = agg_buf_sz;
1573 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1574 struct tx_desc *tx_desc;
1575 struct sk_buff *skb;
1579 skb = __skb_dequeue(&skb_head);
1583 len = skb->len + sizeof(*tx_desc);
1586 __skb_queue_head(&skb_head, skb);
1590 tx_data = tx_agg_align(tx_data);
1591 tx_desc = (struct tx_desc *)tx_data;
1593 offset = (u32)skb_transport_offset(skb);
1595 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1596 r8152_csum_workaround(tp, skb, &skb_head);
1600 rtl_tx_vlan_tag(tx_desc, skb);
1602 tx_data += sizeof(*tx_desc);
1605 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1606 struct net_device_stats *stats = &tp->netdev->stats;
1608 stats->tx_dropped++;
1609 dev_kfree_skb_any(skb);
1610 tx_data -= sizeof(*tx_desc);
1615 agg->skb_len += len;
1618 dev_kfree_skb_any(skb);
1620 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1623 if (!skb_queue_empty(&skb_head)) {
1624 spin_lock(&tx_queue->lock);
1625 skb_queue_splice(&skb_head, tx_queue);
1626 spin_unlock(&tx_queue->lock);
1629 netif_tx_lock(tp->netdev);
1631 if (netif_queue_stopped(tp->netdev) &&
1632 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1633 netif_wake_queue(tp->netdev);
1635 netif_tx_unlock(tp->netdev);
1637 ret = usb_autopm_get_interface_async(tp->intf);
1641 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1642 agg->head, (int)(tx_data - (u8 *)agg->head),
1643 (usb_complete_t)write_bulk_callback, agg);
1645 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1647 usb_autopm_put_interface_async(tp->intf);
1653 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1655 u8 checksum = CHECKSUM_NONE;
1658 if (tp->version == RTL_VER_01)
1661 opts2 = le32_to_cpu(rx_desc->opts2);
1662 opts3 = le32_to_cpu(rx_desc->opts3);
1664 if (opts2 & RD_IPV4_CS) {
1666 checksum = CHECKSUM_NONE;
1667 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1668 checksum = CHECKSUM_NONE;
1669 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1670 checksum = CHECKSUM_NONE;
1672 checksum = CHECKSUM_UNNECESSARY;
1673 } else if (RD_IPV6_CS) {
1674 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1675 checksum = CHECKSUM_UNNECESSARY;
1676 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1677 checksum = CHECKSUM_UNNECESSARY;
1684 static int rx_bottom(struct r8152 *tp, int budget)
1686 unsigned long flags;
1687 struct list_head *cursor, *next, rx_queue;
1688 int ret = 0, work_done = 0;
1690 if (!skb_queue_empty(&tp->rx_queue)) {
1691 while (work_done < budget) {
1692 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1693 struct net_device *netdev = tp->netdev;
1694 struct net_device_stats *stats = &netdev->stats;
1695 unsigned int pkt_len;
1701 napi_gro_receive(&tp->napi, skb);
1703 stats->rx_packets++;
1704 stats->rx_bytes += pkt_len;
1708 if (list_empty(&tp->rx_done))
1711 INIT_LIST_HEAD(&rx_queue);
1712 spin_lock_irqsave(&tp->rx_lock, flags);
1713 list_splice_init(&tp->rx_done, &rx_queue);
1714 spin_unlock_irqrestore(&tp->rx_lock, flags);
1716 list_for_each_safe(cursor, next, &rx_queue) {
1717 struct rx_desc *rx_desc;
1723 list_del_init(cursor);
1725 agg = list_entry(cursor, struct rx_agg, list);
1727 if (urb->actual_length < ETH_ZLEN)
1730 rx_desc = agg->head;
1731 rx_data = agg->head;
1732 len_used += sizeof(struct rx_desc);
1734 while (urb->actual_length > len_used) {
1735 struct net_device *netdev = tp->netdev;
1736 struct net_device_stats *stats = &netdev->stats;
1737 unsigned int pkt_len;
1738 struct sk_buff *skb;
1740 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1741 if (pkt_len < ETH_ZLEN)
1744 len_used += pkt_len;
1745 if (urb->actual_length < len_used)
1748 pkt_len -= CRC_SIZE;
1749 rx_data += sizeof(struct rx_desc);
1751 skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1753 stats->rx_dropped++;
1757 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1758 memcpy(skb->data, rx_data, pkt_len);
1759 skb_put(skb, pkt_len);
1760 skb->protocol = eth_type_trans(skb, netdev);
1761 rtl_rx_vlan_tag(rx_desc, skb);
1762 if (work_done < budget) {
1763 napi_gro_receive(&tp->napi, skb);
1765 stats->rx_packets++;
1766 stats->rx_bytes += pkt_len;
1768 __skb_queue_tail(&tp->rx_queue, skb);
1772 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1773 rx_desc = (struct rx_desc *)rx_data;
1774 len_used = (int)(rx_data - (u8 *)agg->head);
1775 len_used += sizeof(struct rx_desc);
1780 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1782 urb->actual_length = 0;
1783 list_add_tail(&agg->list, next);
1787 if (!list_empty(&rx_queue)) {
1788 spin_lock_irqsave(&tp->rx_lock, flags);
1789 list_splice_tail(&rx_queue, &tp->rx_done);
1790 spin_unlock_irqrestore(&tp->rx_lock, flags);
1797 static void tx_bottom(struct r8152 *tp)
1804 if (skb_queue_empty(&tp->tx_queue))
1807 agg = r8152_get_tx_agg(tp);
1811 res = r8152_tx_agg_fill(tp, agg);
1813 struct net_device *netdev = tp->netdev;
1815 if (res == -ENODEV) {
1816 set_bit(RTL8152_UNPLUG, &tp->flags);
1817 netif_device_detach(netdev);
1819 struct net_device_stats *stats = &netdev->stats;
1820 unsigned long flags;
1822 netif_warn(tp, tx_err, netdev,
1823 "failed tx_urb %d\n", res);
1824 stats->tx_dropped += agg->skb_num;
1826 spin_lock_irqsave(&tp->tx_lock, flags);
1827 list_add_tail(&agg->list, &tp->tx_free);
1828 spin_unlock_irqrestore(&tp->tx_lock, flags);
1834 static void bottom_half(struct r8152 *tp)
1836 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1839 if (!test_bit(WORK_ENABLE, &tp->flags))
1842 /* When link down, the driver would cancel all bulks. */
1843 /* This avoid the re-submitting bulk */
1844 if (!netif_carrier_ok(tp->netdev))
1847 clear_bit(SCHEDULE_NAPI, &tp->flags);
1852 static int r8152_poll(struct napi_struct *napi, int budget)
1854 struct r8152 *tp = container_of(napi, struct r8152, napi);
1857 work_done = rx_bottom(tp, budget);
1860 if (work_done < budget) {
1861 napi_complete(napi);
1862 if (!list_empty(&tp->rx_done))
1863 napi_schedule(napi);
1870 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1874 /* The rx would be stopped, so skip submitting */
1875 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1876 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1879 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1880 agg->head, agg_buf_sz,
1881 (usb_complete_t)read_bulk_callback, agg);
1883 ret = usb_submit_urb(agg->urb, mem_flags);
1884 if (ret == -ENODEV) {
1885 set_bit(RTL8152_UNPLUG, &tp->flags);
1886 netif_device_detach(tp->netdev);
1888 struct urb *urb = agg->urb;
1889 unsigned long flags;
1891 urb->actual_length = 0;
1892 spin_lock_irqsave(&tp->rx_lock, flags);
1893 list_add_tail(&agg->list, &tp->rx_done);
1894 spin_unlock_irqrestore(&tp->rx_lock, flags);
1896 netif_err(tp, rx_err, tp->netdev,
1897 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1899 napi_schedule(&tp->napi);
1905 static void rtl_drop_queued_tx(struct r8152 *tp)
1907 struct net_device_stats *stats = &tp->netdev->stats;
1908 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1909 struct sk_buff *skb;
1911 if (skb_queue_empty(tx_queue))
1914 __skb_queue_head_init(&skb_head);
1915 spin_lock_bh(&tx_queue->lock);
1916 skb_queue_splice_init(tx_queue, &skb_head);
1917 spin_unlock_bh(&tx_queue->lock);
1919 while ((skb = __skb_dequeue(&skb_head))) {
1921 stats->tx_dropped++;
1925 static void rtl8152_tx_timeout(struct net_device *netdev)
1927 struct r8152 *tp = netdev_priv(netdev);
1929 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1931 usb_queue_reset_device(tp->intf);
1934 static void rtl8152_set_rx_mode(struct net_device *netdev)
1936 struct r8152 *tp = netdev_priv(netdev);
1938 if (netif_carrier_ok(netdev)) {
1939 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1940 schedule_delayed_work(&tp->schedule, 0);
1944 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1946 struct r8152 *tp = netdev_priv(netdev);
1947 u32 mc_filter[2]; /* Multicast hash filter */
1951 netif_stop_queue(netdev);
1952 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1953 ocp_data &= ~RCR_ACPT_ALL;
1954 ocp_data |= RCR_AB | RCR_APM;
1956 if (netdev->flags & IFF_PROMISC) {
1957 /* Unconditionally log net taps. */
1958 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1959 ocp_data |= RCR_AM | RCR_AAP;
1960 mc_filter[1] = 0xffffffff;
1961 mc_filter[0] = 0xffffffff;
1962 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1963 (netdev->flags & IFF_ALLMULTI)) {
1964 /* Too many to filter perfectly -- accept all multicasts. */
1966 mc_filter[1] = 0xffffffff;
1967 mc_filter[0] = 0xffffffff;
1969 struct netdev_hw_addr *ha;
1973 netdev_for_each_mc_addr(ha, netdev) {
1974 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1976 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1981 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1982 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1984 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1985 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1986 netif_wake_queue(netdev);
1989 static netdev_features_t
1990 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1991 netdev_features_t features)
1993 u32 mss = skb_shinfo(skb)->gso_size;
1994 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1995 int offset = skb_transport_offset(skb);
1997 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1998 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
1999 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2000 features &= ~NETIF_F_GSO_MASK;
2005 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2006 struct net_device *netdev)
2008 struct r8152 *tp = netdev_priv(netdev);
2010 skb_tx_timestamp(skb);
2012 skb_queue_tail(&tp->tx_queue, skb);
2014 if (!list_empty(&tp->tx_free)) {
2015 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2016 set_bit(SCHEDULE_NAPI, &tp->flags);
2017 schedule_delayed_work(&tp->schedule, 0);
2019 usb_mark_last_busy(tp->udev);
2020 napi_schedule(&tp->napi);
2022 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2023 netif_stop_queue(netdev);
2026 return NETDEV_TX_OK;
2029 static void r8152b_reset_packet_filter(struct r8152 *tp)
2033 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2034 ocp_data &= ~FMC_FCR_MCU_EN;
2035 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2036 ocp_data |= FMC_FCR_MCU_EN;
2037 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2040 static void rtl8152_nic_reset(struct r8152 *tp)
2044 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2046 for (i = 0; i < 1000; i++) {
2047 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2049 usleep_range(100, 400);
2053 static void set_tx_qlen(struct r8152 *tp)
2055 struct net_device *netdev = tp->netdev;
2057 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2058 sizeof(struct tx_desc));
2061 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2063 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2066 static void rtl_set_eee_plus(struct r8152 *tp)
2071 speed = rtl8152_get_speed(tp);
2072 if (speed & _10bps) {
2073 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2074 ocp_data |= EEEP_CR_EEEP_TX;
2075 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2077 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2078 ocp_data &= ~EEEP_CR_EEEP_TX;
2079 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2083 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2087 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2089 ocp_data |= RXDY_GATED_EN;
2091 ocp_data &= ~RXDY_GATED_EN;
2092 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2095 static int rtl_start_rx(struct r8152 *tp)
2099 INIT_LIST_HEAD(&tp->rx_done);
2100 for (i = 0; i < RTL8152_MAX_RX; i++) {
2101 INIT_LIST_HEAD(&tp->rx_info[i].list);
2102 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2107 if (ret && ++i < RTL8152_MAX_RX) {
2108 struct list_head rx_queue;
2109 unsigned long flags;
2111 INIT_LIST_HEAD(&rx_queue);
2114 struct rx_agg *agg = &tp->rx_info[i++];
2115 struct urb *urb = agg->urb;
2117 urb->actual_length = 0;
2118 list_add_tail(&agg->list, &rx_queue);
2119 } while (i < RTL8152_MAX_RX);
2121 spin_lock_irqsave(&tp->rx_lock, flags);
2122 list_splice_tail(&rx_queue, &tp->rx_done);
2123 spin_unlock_irqrestore(&tp->rx_lock, flags);
2129 static int rtl_stop_rx(struct r8152 *tp)
2133 for (i = 0; i < RTL8152_MAX_RX; i++)
2134 usb_kill_urb(tp->rx_info[i].urb);
2136 while (!skb_queue_empty(&tp->rx_queue))
2137 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2142 static int rtl_enable(struct r8152 *tp)
2146 r8152b_reset_packet_filter(tp);
2148 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2149 ocp_data |= CR_RE | CR_TE;
2150 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2152 rxdy_gated_en(tp, false);
2157 static int rtl8152_enable(struct r8152 *tp)
2159 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2163 rtl_set_eee_plus(tp);
2165 return rtl_enable(tp);
2168 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2170 u32 ocp_data = tp->coalesce / 8;
2172 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2175 static void r8153_set_rx_early_size(struct r8152 *tp)
2177 u32 mtu = tp->netdev->mtu;
2178 u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 8;
2180 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2183 static int rtl8153_enable(struct r8152 *tp)
2185 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2188 usb_disable_lpm(tp->udev);
2190 rtl_set_eee_plus(tp);
2191 r8153_set_rx_early_timeout(tp);
2192 r8153_set_rx_early_size(tp);
2194 return rtl_enable(tp);
2197 static void rtl_disable(struct r8152 *tp)
2202 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2203 rtl_drop_queued_tx(tp);
2207 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2208 ocp_data &= ~RCR_ACPT_ALL;
2209 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2211 rtl_drop_queued_tx(tp);
2213 for (i = 0; i < RTL8152_MAX_TX; i++)
2214 usb_kill_urb(tp->tx_info[i].urb);
2216 rxdy_gated_en(tp, true);
2218 for (i = 0; i < 1000; i++) {
2219 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2220 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2222 usleep_range(1000, 2000);
2225 for (i = 0; i < 1000; i++) {
2226 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2228 usleep_range(1000, 2000);
2233 rtl8152_nic_reset(tp);
2236 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2240 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2242 ocp_data |= POWER_CUT;
2244 ocp_data &= ~POWER_CUT;
2245 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2247 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2248 ocp_data &= ~RESUME_INDICATE;
2249 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2252 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2256 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2258 ocp_data |= CPCR_RX_VLAN;
2260 ocp_data &= ~CPCR_RX_VLAN;
2261 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2264 static int rtl8152_set_features(struct net_device *dev,
2265 netdev_features_t features)
2267 netdev_features_t changed = features ^ dev->features;
2268 struct r8152 *tp = netdev_priv(dev);
2271 ret = usb_autopm_get_interface(tp->intf);
2275 mutex_lock(&tp->control);
2277 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2278 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2279 rtl_rx_vlan_en(tp, true);
2281 rtl_rx_vlan_en(tp, false);
2284 mutex_unlock(&tp->control);
2286 usb_autopm_put_interface(tp->intf);
2292 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2294 static u32 __rtl_get_wol(struct r8152 *tp)
2299 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2300 if (!(ocp_data & LAN_WAKE_EN))
2303 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2304 if (ocp_data & LINK_ON_WAKE_EN)
2305 wolopts |= WAKE_PHY;
2307 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2308 if (ocp_data & UWF_EN)
2309 wolopts |= WAKE_UCAST;
2310 if (ocp_data & BWF_EN)
2311 wolopts |= WAKE_BCAST;
2312 if (ocp_data & MWF_EN)
2313 wolopts |= WAKE_MCAST;
2315 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2316 if (ocp_data & MAGIC_EN)
2317 wolopts |= WAKE_MAGIC;
2322 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2326 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2328 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2329 ocp_data &= ~LINK_ON_WAKE_EN;
2330 if (wolopts & WAKE_PHY)
2331 ocp_data |= LINK_ON_WAKE_EN;
2332 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2334 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2335 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2336 if (wolopts & WAKE_UCAST)
2338 if (wolopts & WAKE_BCAST)
2340 if (wolopts & WAKE_MCAST)
2342 if (wolopts & WAKE_ANY)
2343 ocp_data |= LAN_WAKE_EN;
2344 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2346 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2348 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2349 ocp_data &= ~MAGIC_EN;
2350 if (wolopts & WAKE_MAGIC)
2351 ocp_data |= MAGIC_EN;
2352 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2354 if (wolopts & WAKE_ANY)
2355 device_set_wakeup_enable(&tp->udev->dev, true);
2357 device_set_wakeup_enable(&tp->udev->dev, false);
2360 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2365 memset(u1u2, 0xff, sizeof(u1u2));
2367 memset(u1u2, 0x00, sizeof(u1u2));
2369 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2372 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2376 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2377 if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2378 ocp_data |= U2P3_ENABLE;
2380 ocp_data &= ~U2P3_ENABLE;
2381 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2384 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2388 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2390 ocp_data |= PWR_EN | PHASE2_EN;
2392 ocp_data &= ~(PWR_EN | PHASE2_EN);
2393 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2395 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2396 ocp_data &= ~PCUT_STATUS;
2397 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2400 static bool rtl_can_wakeup(struct r8152 *tp)
2402 struct usb_device *udev = tp->udev;
2404 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2407 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2412 __rtl_set_wol(tp, WAKE_ANY);
2414 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2416 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2417 ocp_data |= LINK_OFF_WAKE_EN;
2418 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2420 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2424 __rtl_set_wol(tp, tp->saved_wolopts);
2426 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2428 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2429 ocp_data &= ~LINK_OFF_WAKE_EN;
2430 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2432 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2436 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2438 rtl_runtime_suspend_enable(tp, enable);
2441 r8153_u1u2en(tp, false);
2442 r8153_u2p3en(tp, false);
2444 r8153_u2p3en(tp, true);
2445 r8153_u1u2en(tp, true);
2449 static void rtl_phy_reset(struct r8152 *tp)
2454 data = r8152_mdio_read(tp, MII_BMCR);
2456 /* don't reset again before the previous one complete */
2457 if (data & BMCR_RESET)
2461 r8152_mdio_write(tp, MII_BMCR, data);
2463 for (i = 0; i < 50; i++) {
2465 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2470 static void r8153_teredo_off(struct r8152 *tp)
2474 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2475 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2476 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2478 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2479 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2480 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2483 static void rtl_reset_bmu(struct r8152 *tp)
2487 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2488 ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2489 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2490 ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2491 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2494 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2497 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2498 LINKENA | DIS_SDSAVE);
2500 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2506 static void rtl8152_disable(struct r8152 *tp)
2508 r8152_aldps_en(tp, false);
2510 r8152_aldps_en(tp, true);
2513 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2517 data = r8152_mdio_read(tp, MII_BMCR);
2518 if (data & BMCR_PDOWN) {
2519 data &= ~BMCR_PDOWN;
2520 r8152_mdio_write(tp, MII_BMCR, data);
2523 set_bit(PHY_RESET, &tp->flags);
2526 static void r8152b_exit_oob(struct r8152 *tp)
2531 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2532 ocp_data &= ~RCR_ACPT_ALL;
2533 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2535 rxdy_gated_en(tp, true);
2536 r8153_teredo_off(tp);
2537 r8152b_hw_phy_cfg(tp);
2539 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2540 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2542 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2543 ocp_data &= ~NOW_IS_OOB;
2544 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2546 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2547 ocp_data &= ~MCU_BORW_EN;
2548 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2550 for (i = 0; i < 1000; i++) {
2551 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2552 if (ocp_data & LINK_LIST_READY)
2554 usleep_range(1000, 2000);
2557 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2558 ocp_data |= RE_INIT_LL;
2559 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2561 for (i = 0; i < 1000; i++) {
2562 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2563 if (ocp_data & LINK_LIST_READY)
2565 usleep_range(1000, 2000);
2568 rtl8152_nic_reset(tp);
2570 /* rx share fifo credit full threshold */
2571 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2573 if (tp->udev->speed == USB_SPEED_FULL ||
2574 tp->udev->speed == USB_SPEED_LOW) {
2575 /* rx share fifo credit near full threshold */
2576 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2578 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2581 /* rx share fifo credit near full threshold */
2582 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2584 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2588 /* TX share fifo free credit full threshold */
2589 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2591 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2592 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2593 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2594 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2596 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2598 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2600 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2601 ocp_data |= TCR0_AUTO_FIFO;
2602 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2605 static void r8152b_enter_oob(struct r8152 *tp)
2610 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2611 ocp_data &= ~NOW_IS_OOB;
2612 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2614 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2615 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2616 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2620 for (i = 0; i < 1000; i++) {
2621 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2622 if (ocp_data & LINK_LIST_READY)
2624 usleep_range(1000, 2000);
2627 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2628 ocp_data |= RE_INIT_LL;
2629 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2631 for (i = 0; i < 1000; i++) {
2632 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2633 if (ocp_data & LINK_LIST_READY)
2635 usleep_range(1000, 2000);
2638 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2640 rtl_rx_vlan_en(tp, true);
2642 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2643 ocp_data |= ALDPS_PROXY_MODE;
2644 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2646 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2647 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2648 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2650 rxdy_gated_en(tp, false);
2652 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2653 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2654 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2657 static void r8153_hw_phy_cfg(struct r8152 *tp)
2662 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
2663 tp->version == RTL_VER_05)
2664 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2666 data = r8152_mdio_read(tp, MII_BMCR);
2667 if (data & BMCR_PDOWN) {
2668 data &= ~BMCR_PDOWN;
2669 r8152_mdio_write(tp, MII_BMCR, data);
2672 if (tp->version == RTL_VER_03) {
2673 data = ocp_reg_read(tp, OCP_EEE_CFG);
2674 data &= ~CTAP_SHORT_EN;
2675 ocp_reg_write(tp, OCP_EEE_CFG, data);
2678 data = ocp_reg_read(tp, OCP_POWER_CFG);
2679 data |= EEE_CLKDIV_EN;
2680 ocp_reg_write(tp, OCP_POWER_CFG, data);
2682 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2683 data |= EN_10M_BGOFF;
2684 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2685 data = ocp_reg_read(tp, OCP_POWER_CFG);
2686 data |= EN_10M_PLLOFF;
2687 ocp_reg_write(tp, OCP_POWER_CFG, data);
2688 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2690 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2691 ocp_data |= PFM_PWM_SWITCH;
2692 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2694 /* Enable LPF corner auto tune */
2695 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2697 /* Adjust 10M Amplitude */
2698 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2699 sram_write(tp, SRAM_10M_AMP2, 0x0208);
2701 set_bit(PHY_RESET, &tp->flags);
2704 static void r8153_first_init(struct r8152 *tp)
2709 rxdy_gated_en(tp, true);
2710 r8153_teredo_off(tp);
2712 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2713 ocp_data &= ~RCR_ACPT_ALL;
2714 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2716 r8153_hw_phy_cfg(tp);
2718 rtl8152_nic_reset(tp);
2721 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2722 ocp_data &= ~NOW_IS_OOB;
2723 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2725 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2726 ocp_data &= ~MCU_BORW_EN;
2727 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2729 for (i = 0; i < 1000; i++) {
2730 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2731 if (ocp_data & LINK_LIST_READY)
2733 usleep_range(1000, 2000);
2736 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2737 ocp_data |= RE_INIT_LL;
2738 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2740 for (i = 0; i < 1000; i++) {
2741 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2742 if (ocp_data & LINK_LIST_READY)
2744 usleep_range(1000, 2000);
2747 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2749 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2750 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2752 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2753 ocp_data |= TCR0_AUTO_FIFO;
2754 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2756 rtl8152_nic_reset(tp);
2758 /* rx share fifo credit full threshold */
2759 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2760 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2761 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2762 /* TX share fifo free credit full threshold */
2763 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2765 /* rx aggregation */
2766 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2767 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2768 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2771 static void r8153_enter_oob(struct r8152 *tp)
2776 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2777 ocp_data &= ~NOW_IS_OOB;
2778 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2783 for (i = 0; i < 1000; i++) {
2784 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2785 if (ocp_data & LINK_LIST_READY)
2787 usleep_range(1000, 2000);
2790 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2791 ocp_data |= RE_INIT_LL;
2792 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2794 for (i = 0; i < 1000; i++) {
2795 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2796 if (ocp_data & LINK_LIST_READY)
2798 usleep_range(1000, 2000);
2801 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2803 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2804 ocp_data &= ~TEREDO_WAKE_MASK;
2805 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2807 rtl_rx_vlan_en(tp, true);
2809 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2810 ocp_data |= ALDPS_PROXY_MODE;
2811 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2813 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2814 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2815 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2817 rxdy_gated_en(tp, false);
2819 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2820 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2821 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2824 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2828 data = ocp_reg_read(tp, OCP_POWER_CFG);
2831 ocp_reg_write(tp, OCP_POWER_CFG, data);
2834 ocp_reg_write(tp, OCP_POWER_CFG, data);
2839 static void rtl8153_disable(struct r8152 *tp)
2841 r8153_aldps_en(tp, false);
2844 r8153_aldps_en(tp, true);
2845 usb_enable_lpm(tp->udev);
2848 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2850 u16 bmcr, anar, gbcr;
2853 cancel_delayed_work_sync(&tp->schedule);
2854 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2855 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2856 ADVERTISE_100HALF | ADVERTISE_100FULL);
2857 if (tp->mii.supports_gmii) {
2858 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2859 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2864 if (autoneg == AUTONEG_DISABLE) {
2865 if (speed == SPEED_10) {
2867 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2868 } else if (speed == SPEED_100) {
2869 bmcr = BMCR_SPEED100;
2870 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2871 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2872 bmcr = BMCR_SPEED1000;
2873 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2879 if (duplex == DUPLEX_FULL)
2880 bmcr |= BMCR_FULLDPLX;
2882 if (speed == SPEED_10) {
2883 if (duplex == DUPLEX_FULL)
2884 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2886 anar |= ADVERTISE_10HALF;
2887 } else if (speed == SPEED_100) {
2888 if (duplex == DUPLEX_FULL) {
2889 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2890 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2892 anar |= ADVERTISE_10HALF;
2893 anar |= ADVERTISE_100HALF;
2895 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2896 if (duplex == DUPLEX_FULL) {
2897 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2898 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2899 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2901 anar |= ADVERTISE_10HALF;
2902 anar |= ADVERTISE_100HALF;
2903 gbcr |= ADVERTISE_1000HALF;
2910 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2913 if (test_bit(PHY_RESET, &tp->flags))
2916 if (tp->mii.supports_gmii)
2917 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2919 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2920 r8152_mdio_write(tp, MII_BMCR, bmcr);
2922 if (test_and_clear_bit(PHY_RESET, &tp->flags)) {
2925 for (i = 0; i < 50; i++) {
2927 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2936 static void rtl8152_up(struct r8152 *tp)
2938 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2941 r8152_aldps_en(tp, false);
2942 r8152b_exit_oob(tp);
2943 r8152_aldps_en(tp, true);
2946 static void rtl8152_down(struct r8152 *tp)
2948 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2949 rtl_drop_queued_tx(tp);
2953 r8152_power_cut_en(tp, false);
2954 r8152_aldps_en(tp, false);
2955 r8152b_enter_oob(tp);
2956 r8152_aldps_en(tp, true);
2959 static void rtl8153_up(struct r8152 *tp)
2961 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2964 r8153_u1u2en(tp, false);
2965 r8153_aldps_en(tp, false);
2966 r8153_first_init(tp);
2967 r8153_aldps_en(tp, true);
2968 r8153_u2p3en(tp, true);
2969 r8153_u1u2en(tp, true);
2970 usb_enable_lpm(tp->udev);
2973 static void rtl8153_down(struct r8152 *tp)
2975 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2976 rtl_drop_queued_tx(tp);
2980 r8153_u1u2en(tp, false);
2981 r8153_u2p3en(tp, false);
2982 r8153_power_cut_en(tp, false);
2983 r8153_aldps_en(tp, false);
2984 r8153_enter_oob(tp);
2985 r8153_aldps_en(tp, true);
2988 static bool rtl8152_in_nway(struct r8152 *tp)
2992 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
2993 tp->ocp_base = 0x2000;
2994 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
2995 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
2997 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
2998 if (nway_state & 0xc000)
3004 static bool rtl8153_in_nway(struct r8152 *tp)
3006 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3008 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3014 static void set_carrier(struct r8152 *tp)
3016 struct net_device *netdev = tp->netdev;
3019 speed = rtl8152_get_speed(tp);
3021 if (speed & LINK_STATUS) {
3022 if (!netif_carrier_ok(netdev)) {
3023 tp->rtl_ops.enable(tp);
3024 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3025 napi_disable(&tp->napi);
3026 netif_carrier_on(netdev);
3028 napi_enable(&tp->napi);
3031 if (netif_carrier_ok(netdev)) {
3032 netif_carrier_off(netdev);
3033 napi_disable(&tp->napi);
3034 tp->rtl_ops.disable(tp);
3035 napi_enable(&tp->napi);
3040 static void rtl_work_func_t(struct work_struct *work)
3042 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3044 /* If the device is unplugged or !netif_running(), the workqueue
3045 * doesn't need to wake the device, and could return directly.
3047 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3050 if (usb_autopm_get_interface(tp->intf) < 0)
3053 if (!test_bit(WORK_ENABLE, &tp->flags))
3056 if (!mutex_trylock(&tp->control)) {
3057 schedule_delayed_work(&tp->schedule, 0);
3061 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3064 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3065 _rtl8152_set_rx_mode(tp->netdev);
3067 /* don't schedule napi before linking */
3068 if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3069 netif_carrier_ok(tp->netdev))
3070 napi_schedule(&tp->napi);
3072 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3075 mutex_unlock(&tp->control);
3078 usb_autopm_put_interface(tp->intf);
3081 #ifdef CONFIG_PM_SLEEP
3082 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3085 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3088 case PM_HIBERNATION_PREPARE:
3089 case PM_SUSPEND_PREPARE:
3090 usb_autopm_get_interface(tp->intf);
3093 case PM_POST_HIBERNATION:
3094 case PM_POST_SUSPEND:
3095 usb_autopm_put_interface(tp->intf);
3098 case PM_POST_RESTORE:
3099 case PM_RESTORE_PREPARE:
3108 static int rtl8152_open(struct net_device *netdev)
3110 struct r8152 *tp = netdev_priv(netdev);
3113 res = alloc_all_mem(tp);
3117 netif_carrier_off(netdev);
3119 res = usb_autopm_get_interface(tp->intf);
3125 mutex_lock(&tp->control);
3129 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3130 tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3132 netif_carrier_off(netdev);
3133 netif_start_queue(netdev);
3134 set_bit(WORK_ENABLE, &tp->flags);
3136 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3139 netif_device_detach(tp->netdev);
3140 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3144 napi_enable(&tp->napi);
3147 mutex_unlock(&tp->control);
3149 usb_autopm_put_interface(tp->intf);
3150 #ifdef CONFIG_PM_SLEEP
3151 tp->pm_notifier.notifier_call = rtl_notifier;
3152 register_pm_notifier(&tp->pm_notifier);
3159 static int rtl8152_close(struct net_device *netdev)
3161 struct r8152 *tp = netdev_priv(netdev);
3164 #ifdef CONFIG_PM_SLEEP
3165 unregister_pm_notifier(&tp->pm_notifier);
3167 napi_disable(&tp->napi);
3168 clear_bit(WORK_ENABLE, &tp->flags);
3169 usb_kill_urb(tp->intr_urb);
3170 cancel_delayed_work_sync(&tp->schedule);
3171 netif_stop_queue(netdev);
3173 res = usb_autopm_get_interface(tp->intf);
3174 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3175 rtl_drop_queued_tx(tp);
3178 mutex_lock(&tp->control);
3180 tp->rtl_ops.down(tp);
3182 mutex_unlock(&tp->control);
3184 usb_autopm_put_interface(tp->intf);
3192 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3194 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3195 ocp_reg_write(tp, OCP_EEE_DATA, reg);
3196 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3199 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3203 r8152_mmd_indirect(tp, dev, reg);
3204 data = ocp_reg_read(tp, OCP_EEE_DATA);
3205 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3210 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3212 r8152_mmd_indirect(tp, dev, reg);
3213 ocp_reg_write(tp, OCP_EEE_DATA, data);
3214 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3217 static void r8152_eee_en(struct r8152 *tp, bool enable)
3219 u16 config1, config2, config3;
3222 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3223 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3224 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3225 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3228 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3229 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3230 config1 |= sd_rise_time(1);
3231 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3232 config3 |= fast_snr(42);
3234 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3235 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3237 config1 |= sd_rise_time(7);
3238 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3239 config3 |= fast_snr(511);
3242 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3243 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3244 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3245 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3248 static void r8152b_enable_eee(struct r8152 *tp)
3250 r8152_eee_en(tp, true);
3251 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3254 static void r8153_eee_en(struct r8152 *tp, bool enable)
3259 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3260 config = ocp_reg_read(tp, OCP_EEE_CFG);
3263 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3266 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3267 config &= ~EEE10_EN;
3270 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3271 ocp_reg_write(tp, OCP_EEE_CFG, config);
3274 static void r8153_enable_eee(struct r8152 *tp)
3276 r8153_eee_en(tp, true);
3277 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3280 static void r8152b_enable_fc(struct r8152 *tp)
3284 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3285 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3286 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3289 static void rtl_tally_reset(struct r8152 *tp)
3293 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3294 ocp_data |= TALLY_RESET;
3295 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3298 static void r8152b_init(struct r8152 *tp)
3302 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3305 r8152_aldps_en(tp, false);
3307 if (tp->version == RTL_VER_01) {
3308 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3309 ocp_data &= ~LED_MODE_MASK;
3310 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3313 r8152_power_cut_en(tp, false);
3315 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3316 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3317 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3318 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3319 ocp_data &= ~MCU_CLK_RATIO_MASK;
3320 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3321 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3322 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3323 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3324 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3326 r8152b_enable_eee(tp);
3327 r8152_aldps_en(tp, true);
3328 r8152b_enable_fc(tp);
3329 rtl_tally_reset(tp);
3331 /* enable rx aggregation */
3332 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3333 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3334 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3337 static void r8153_init(struct r8152 *tp)
3342 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3345 r8153_aldps_en(tp, false);
3346 r8153_u1u2en(tp, false);
3348 for (i = 0; i < 500; i++) {
3349 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3355 for (i = 0; i < 500; i++) {
3356 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3357 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3362 usb_disable_lpm(tp->udev);
3363 r8153_u2p3en(tp, false);
3365 if (tp->version == RTL_VER_04) {
3366 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3367 ocp_data &= ~pwd_dn_scale_mask;
3368 ocp_data |= pwd_dn_scale(96);
3369 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3371 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3372 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3373 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3374 } else if (tp->version == RTL_VER_05) {
3375 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3376 ocp_data &= ~ECM_ALDPS;
3377 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3379 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3380 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3381 ocp_data &= ~DYNAMIC_BURST;
3383 ocp_data |= DYNAMIC_BURST;
3384 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3385 } else if (tp->version == RTL_VER_06) {
3386 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3387 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3388 ocp_data &= ~DYNAMIC_BURST;
3390 ocp_data |= DYNAMIC_BURST;
3391 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3394 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3395 ocp_data |= EP4_FULL_FC;
3396 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3398 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3399 ocp_data &= ~TIMER11_EN;
3400 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3402 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3403 ocp_data &= ~LED_MODE_MASK;
3404 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3406 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3407 if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3408 ocp_data |= LPM_TIMER_500MS;
3410 ocp_data |= LPM_TIMER_500US;
3411 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3413 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3414 ocp_data &= ~SEN_VAL_MASK;
3415 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3416 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3418 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3420 r8153_power_cut_en(tp, false);
3421 r8153_u1u2en(tp, true);
3423 /* MAC clock speed down */
3424 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
3425 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
3426 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
3427 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
3429 r8153_enable_eee(tp);
3430 r8153_aldps_en(tp, true);
3431 r8152b_enable_fc(tp);
3432 rtl_tally_reset(tp);
3433 r8153_u2p3en(tp, true);
3436 static int rtl8152_pre_reset(struct usb_interface *intf)
3438 struct r8152 *tp = usb_get_intfdata(intf);
3439 struct net_device *netdev;
3444 netdev = tp->netdev;
3445 if (!netif_running(netdev))
3448 napi_disable(&tp->napi);
3449 clear_bit(WORK_ENABLE, &tp->flags);
3450 usb_kill_urb(tp->intr_urb);
3451 cancel_delayed_work_sync(&tp->schedule);
3452 if (netif_carrier_ok(netdev)) {
3453 netif_stop_queue(netdev);
3454 mutex_lock(&tp->control);
3455 tp->rtl_ops.disable(tp);
3456 mutex_unlock(&tp->control);
3462 static int rtl8152_post_reset(struct usb_interface *intf)
3464 struct r8152 *tp = usb_get_intfdata(intf);
3465 struct net_device *netdev;
3470 netdev = tp->netdev;
3471 if (!netif_running(netdev))
3474 set_bit(WORK_ENABLE, &tp->flags);
3475 if (netif_carrier_ok(netdev)) {
3476 mutex_lock(&tp->control);
3477 tp->rtl_ops.enable(tp);
3478 rtl8152_set_rx_mode(netdev);
3479 mutex_unlock(&tp->control);
3480 netif_wake_queue(netdev);
3483 napi_enable(&tp->napi);
3488 static bool delay_autosuspend(struct r8152 *tp)
3490 bool sw_linking = !!netif_carrier_ok(tp->netdev);
3491 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3493 /* This means a linking change occurs and the driver doesn't detect it,
3494 * yet. If the driver has disabled tx/rx and hw is linking on, the
3495 * device wouldn't wake up by receiving any packet.
3497 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3500 /* If the linking down is occurred by nway, the device may miss the
3501 * linking change event. And it wouldn't wake when linking on.
3503 if (!sw_linking && tp->rtl_ops.in_nway(tp))
3509 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3511 struct r8152 *tp = usb_get_intfdata(intf);
3512 struct net_device *netdev = tp->netdev;
3515 mutex_lock(&tp->control);
3517 if (PMSG_IS_AUTO(message)) {
3518 if (netif_running(netdev) && delay_autosuspend(tp)) {
3523 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3525 netif_device_detach(netdev);
3528 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3529 clear_bit(WORK_ENABLE, &tp->flags);
3530 usb_kill_urb(tp->intr_urb);
3531 napi_disable(&tp->napi);
3532 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3534 tp->rtl_ops.autosuspend_en(tp, true);
3536 cancel_delayed_work_sync(&tp->schedule);
3537 tp->rtl_ops.down(tp);
3539 napi_enable(&tp->napi);
3542 mutex_unlock(&tp->control);
3547 static int rtl8152_resume(struct usb_interface *intf)
3549 struct r8152 *tp = usb_get_intfdata(intf);
3551 mutex_lock(&tp->control);
3553 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3554 tp->rtl_ops.init(tp);
3555 netif_device_attach(tp->netdev);
3558 if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3559 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3560 tp->rtl_ops.autosuspend_en(tp, false);
3561 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3562 napi_disable(&tp->napi);
3563 set_bit(WORK_ENABLE, &tp->flags);
3564 if (netif_carrier_ok(tp->netdev))
3566 napi_enable(&tp->napi);
3569 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3570 tp->mii.supports_gmii ?
3571 SPEED_1000 : SPEED_100,
3573 netif_carrier_off(tp->netdev);
3574 set_bit(WORK_ENABLE, &tp->flags);
3576 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3577 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3578 if (tp->netdev->flags & IFF_UP)
3579 tp->rtl_ops.autosuspend_en(tp, false);
3580 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3583 mutex_unlock(&tp->control);
3588 static int rtl8152_reset_resume(struct usb_interface *intf)
3590 struct r8152 *tp = usb_get_intfdata(intf);
3592 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3593 return rtl8152_resume(intf);
3596 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3598 struct r8152 *tp = netdev_priv(dev);
3600 if (usb_autopm_get_interface(tp->intf) < 0)
3603 if (!rtl_can_wakeup(tp)) {
3607 mutex_lock(&tp->control);
3608 wol->supported = WAKE_ANY;
3609 wol->wolopts = __rtl_get_wol(tp);
3610 mutex_unlock(&tp->control);
3613 usb_autopm_put_interface(tp->intf);
3616 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3618 struct r8152 *tp = netdev_priv(dev);
3621 if (!rtl_can_wakeup(tp))
3624 ret = usb_autopm_get_interface(tp->intf);
3628 mutex_lock(&tp->control);
3630 __rtl_set_wol(tp, wol->wolopts);
3631 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3633 mutex_unlock(&tp->control);
3635 usb_autopm_put_interface(tp->intf);
3641 static u32 rtl8152_get_msglevel(struct net_device *dev)
3643 struct r8152 *tp = netdev_priv(dev);
3645 return tp->msg_enable;
3648 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3650 struct r8152 *tp = netdev_priv(dev);
3652 tp->msg_enable = value;
3655 static void rtl8152_get_drvinfo(struct net_device *netdev,
3656 struct ethtool_drvinfo *info)
3658 struct r8152 *tp = netdev_priv(netdev);
3660 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3661 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3662 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3666 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3668 struct r8152 *tp = netdev_priv(netdev);
3671 if (!tp->mii.mdio_read)
3674 ret = usb_autopm_get_interface(tp->intf);
3678 mutex_lock(&tp->control);
3680 ret = mii_ethtool_gset(&tp->mii, cmd);
3682 mutex_unlock(&tp->control);
3684 usb_autopm_put_interface(tp->intf);
3690 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3692 struct r8152 *tp = netdev_priv(dev);
3695 ret = usb_autopm_get_interface(tp->intf);
3699 mutex_lock(&tp->control);
3701 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3703 mutex_unlock(&tp->control);
3705 usb_autopm_put_interface(tp->intf);
3711 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3718 "tx_single_collisions",
3719 "tx_multi_collisions",
3727 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3731 return ARRAY_SIZE(rtl8152_gstrings);
3737 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3738 struct ethtool_stats *stats, u64 *data)
3740 struct r8152 *tp = netdev_priv(dev);
3741 struct tally_counter tally;
3743 if (usb_autopm_get_interface(tp->intf) < 0)
3746 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3748 usb_autopm_put_interface(tp->intf);
3750 data[0] = le64_to_cpu(tally.tx_packets);
3751 data[1] = le64_to_cpu(tally.rx_packets);
3752 data[2] = le64_to_cpu(tally.tx_errors);
3753 data[3] = le32_to_cpu(tally.rx_errors);
3754 data[4] = le16_to_cpu(tally.rx_missed);
3755 data[5] = le16_to_cpu(tally.align_errors);
3756 data[6] = le32_to_cpu(tally.tx_one_collision);
3757 data[7] = le32_to_cpu(tally.tx_multi_collision);
3758 data[8] = le64_to_cpu(tally.rx_unicast);
3759 data[9] = le64_to_cpu(tally.rx_broadcast);
3760 data[10] = le32_to_cpu(tally.rx_multicast);
3761 data[11] = le16_to_cpu(tally.tx_aborted);
3762 data[12] = le16_to_cpu(tally.tx_underrun);
3765 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3767 switch (stringset) {
3769 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3774 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3776 u32 ocp_data, lp, adv, supported = 0;
3779 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3780 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3782 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3783 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3785 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3786 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3788 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3789 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3791 eee->eee_enabled = !!ocp_data;
3792 eee->eee_active = !!(supported & adv & lp);
3793 eee->supported = supported;
3794 eee->advertised = adv;
3795 eee->lp_advertised = lp;
3800 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3802 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3804 r8152_eee_en(tp, eee->eee_enabled);
3806 if (!eee->eee_enabled)
3809 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3814 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3816 u32 ocp_data, lp, adv, supported = 0;
3819 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3820 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3822 val = ocp_reg_read(tp, OCP_EEE_ADV);
3823 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3825 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3826 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3828 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3829 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3831 eee->eee_enabled = !!ocp_data;
3832 eee->eee_active = !!(supported & adv & lp);
3833 eee->supported = supported;
3834 eee->advertised = adv;
3835 eee->lp_advertised = lp;
3840 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3842 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3844 r8153_eee_en(tp, eee->eee_enabled);
3846 if (!eee->eee_enabled)
3849 ocp_reg_write(tp, OCP_EEE_ADV, val);
3855 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3857 struct r8152 *tp = netdev_priv(net);
3860 ret = usb_autopm_get_interface(tp->intf);
3864 mutex_lock(&tp->control);
3866 ret = tp->rtl_ops.eee_get(tp, edata);
3868 mutex_unlock(&tp->control);
3870 usb_autopm_put_interface(tp->intf);
3877 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3879 struct r8152 *tp = netdev_priv(net);
3882 ret = usb_autopm_get_interface(tp->intf);
3886 mutex_lock(&tp->control);
3888 ret = tp->rtl_ops.eee_set(tp, edata);
3890 ret = mii_nway_restart(&tp->mii);
3892 mutex_unlock(&tp->control);
3894 usb_autopm_put_interface(tp->intf);
3900 static int rtl8152_nway_reset(struct net_device *dev)
3902 struct r8152 *tp = netdev_priv(dev);
3905 ret = usb_autopm_get_interface(tp->intf);
3909 mutex_lock(&tp->control);
3911 ret = mii_nway_restart(&tp->mii);
3913 mutex_unlock(&tp->control);
3915 usb_autopm_put_interface(tp->intf);
3921 static int rtl8152_get_coalesce(struct net_device *netdev,
3922 struct ethtool_coalesce *coalesce)
3924 struct r8152 *tp = netdev_priv(netdev);
3926 switch (tp->version) {
3934 coalesce->rx_coalesce_usecs = tp->coalesce;
3939 static int rtl8152_set_coalesce(struct net_device *netdev,
3940 struct ethtool_coalesce *coalesce)
3942 struct r8152 *tp = netdev_priv(netdev);
3945 switch (tp->version) {
3953 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
3956 ret = usb_autopm_get_interface(tp->intf);
3960 mutex_lock(&tp->control);
3962 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
3963 tp->coalesce = coalesce->rx_coalesce_usecs;
3965 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
3966 r8153_set_rx_early_timeout(tp);
3969 mutex_unlock(&tp->control);
3971 usb_autopm_put_interface(tp->intf);
3976 static struct ethtool_ops ops = {
3977 .get_drvinfo = rtl8152_get_drvinfo,
3978 .get_settings = rtl8152_get_settings,
3979 .set_settings = rtl8152_set_settings,
3980 .get_link = ethtool_op_get_link,
3981 .nway_reset = rtl8152_nway_reset,
3982 .get_msglevel = rtl8152_get_msglevel,
3983 .set_msglevel = rtl8152_set_msglevel,
3984 .get_wol = rtl8152_get_wol,
3985 .set_wol = rtl8152_set_wol,
3986 .get_strings = rtl8152_get_strings,
3987 .get_sset_count = rtl8152_get_sset_count,
3988 .get_ethtool_stats = rtl8152_get_ethtool_stats,
3989 .get_coalesce = rtl8152_get_coalesce,
3990 .set_coalesce = rtl8152_set_coalesce,
3991 .get_eee = rtl_ethtool_get_eee,
3992 .set_eee = rtl_ethtool_set_eee,
3995 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3997 struct r8152 *tp = netdev_priv(netdev);
3998 struct mii_ioctl_data *data = if_mii(rq);
4001 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4004 res = usb_autopm_get_interface(tp->intf);
4010 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4014 mutex_lock(&tp->control);
4015 data->val_out = r8152_mdio_read(tp, data->reg_num);
4016 mutex_unlock(&tp->control);
4020 if (!capable(CAP_NET_ADMIN)) {
4024 mutex_lock(&tp->control);
4025 r8152_mdio_write(tp, data->reg_num, data->val_in);
4026 mutex_unlock(&tp->control);
4033 usb_autopm_put_interface(tp->intf);
4039 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4041 struct r8152 *tp = netdev_priv(dev);
4044 switch (tp->version) {
4047 return eth_change_mtu(dev, new_mtu);
4052 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4055 ret = usb_autopm_get_interface(tp->intf);
4059 mutex_lock(&tp->control);
4063 if (netif_running(dev) && netif_carrier_ok(dev))
4064 r8153_set_rx_early_size(tp);
4066 mutex_unlock(&tp->control);
4068 usb_autopm_put_interface(tp->intf);
4073 static const struct net_device_ops rtl8152_netdev_ops = {
4074 .ndo_open = rtl8152_open,
4075 .ndo_stop = rtl8152_close,
4076 .ndo_do_ioctl = rtl8152_ioctl,
4077 .ndo_start_xmit = rtl8152_start_xmit,
4078 .ndo_tx_timeout = rtl8152_tx_timeout,
4079 .ndo_set_features = rtl8152_set_features,
4080 .ndo_set_rx_mode = rtl8152_set_rx_mode,
4081 .ndo_set_mac_address = rtl8152_set_mac_address,
4082 .ndo_change_mtu = rtl8152_change_mtu,
4083 .ndo_validate_addr = eth_validate_addr,
4084 .ndo_features_check = rtl8152_features_check,
4087 static void r8152b_get_version(struct r8152 *tp)
4092 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4093 version = (u16)(ocp_data & VERSION_MASK);
4097 tp->version = RTL_VER_01;
4100 tp->version = RTL_VER_02;
4103 tp->version = RTL_VER_03;
4104 tp->mii.supports_gmii = 1;
4107 tp->version = RTL_VER_04;
4108 tp->mii.supports_gmii = 1;
4111 tp->version = RTL_VER_05;
4112 tp->mii.supports_gmii = 1;
4115 tp->version = RTL_VER_06;
4116 tp->mii.supports_gmii = 1;
4119 netif_info(tp, probe, tp->netdev,
4120 "Unknown version 0x%04x\n", version);
4125 static void rtl8152_unload(struct r8152 *tp)
4127 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4130 if (tp->version != RTL_VER_01)
4131 r8152_power_cut_en(tp, true);
4134 static void rtl8153_unload(struct r8152 *tp)
4136 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4139 r8153_power_cut_en(tp, false);
4142 static int rtl_ops_init(struct r8152 *tp)
4144 struct rtl_ops *ops = &tp->rtl_ops;
4147 switch (tp->version) {
4150 ops->init = r8152b_init;
4151 ops->enable = rtl8152_enable;
4152 ops->disable = rtl8152_disable;
4153 ops->up = rtl8152_up;
4154 ops->down = rtl8152_down;
4155 ops->unload = rtl8152_unload;
4156 ops->eee_get = r8152_get_eee;
4157 ops->eee_set = r8152_set_eee;
4158 ops->in_nway = rtl8152_in_nway;
4159 ops->autosuspend_en = rtl_runtime_suspend_enable;
4166 ops->init = r8153_init;
4167 ops->enable = rtl8153_enable;
4168 ops->disable = rtl8153_disable;
4169 ops->up = rtl8153_up;
4170 ops->down = rtl8153_down;
4171 ops->unload = rtl8153_unload;
4172 ops->eee_get = r8153_get_eee;
4173 ops->eee_set = r8153_set_eee;
4174 ops->in_nway = rtl8153_in_nway;
4175 ops->autosuspend_en = rtl8153_runtime_enable;
4180 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4187 static int rtl8152_probe(struct usb_interface *intf,
4188 const struct usb_device_id *id)
4190 struct usb_device *udev = interface_to_usbdev(intf);
4192 struct net_device *netdev;
4195 if (udev->actconfig->desc.bConfigurationValue != 1) {
4196 usb_driver_set_configuration(udev, 1);
4200 usb_reset_device(udev);
4201 netdev = alloc_etherdev(sizeof(struct r8152));
4203 dev_err(&intf->dev, "Out of memory\n");
4207 SET_NETDEV_DEV(netdev, &intf->dev);
4208 tp = netdev_priv(netdev);
4209 tp->msg_enable = 0x7FFF;
4212 tp->netdev = netdev;
4215 r8152b_get_version(tp);
4216 ret = rtl_ops_init(tp);
4220 mutex_init(&tp->control);
4221 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4223 netdev->netdev_ops = &rtl8152_netdev_ops;
4224 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4226 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4227 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4228 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4229 NETIF_F_HW_VLAN_CTAG_TX;
4230 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4231 NETIF_F_TSO | NETIF_F_FRAGLIST |
4232 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4233 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4234 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4235 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4236 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4238 netdev->ethtool_ops = &ops;
4239 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4241 tp->mii.dev = netdev;
4242 tp->mii.mdio_read = read_mii_word;
4243 tp->mii.mdio_write = write_mii_word;
4244 tp->mii.phy_id_mask = 0x3f;
4245 tp->mii.reg_num_mask = 0x1f;
4246 tp->mii.phy_id = R8152_PHY_ID;
4248 switch (udev->speed) {
4249 case USB_SPEED_SUPER:
4250 case USB_SPEED_SUPER_PLUS:
4251 tp->coalesce = COALESCE_SUPER;
4253 case USB_SPEED_HIGH:
4254 tp->coalesce = COALESCE_HIGH;
4257 tp->coalesce = COALESCE_SLOW;
4261 intf->needs_remote_wakeup = 1;
4263 tp->rtl_ops.init(tp);
4264 set_ethernet_addr(tp);
4266 usb_set_intfdata(intf, tp);
4267 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4269 ret = register_netdev(netdev);
4271 netif_err(tp, probe, netdev, "couldn't register the device\n");
4275 if (!rtl_can_wakeup(tp))
4276 __rtl_set_wol(tp, 0);
4278 tp->saved_wolopts = __rtl_get_wol(tp);
4279 if (tp->saved_wolopts)
4280 device_set_wakeup_enable(&udev->dev, true);
4282 device_set_wakeup_enable(&udev->dev, false);
4284 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4289 netif_napi_del(&tp->napi);
4290 usb_set_intfdata(intf, NULL);
4292 free_netdev(netdev);
4296 static void rtl8152_disconnect(struct usb_interface *intf)
4298 struct r8152 *tp = usb_get_intfdata(intf);
4300 usb_set_intfdata(intf, NULL);
4302 struct usb_device *udev = tp->udev;
4304 if (udev->state == USB_STATE_NOTATTACHED)
4305 set_bit(RTL8152_UNPLUG, &tp->flags);
4307 netif_napi_del(&tp->napi);
4308 unregister_netdev(tp->netdev);
4309 tp->rtl_ops.unload(tp);
4310 free_netdev(tp->netdev);
4314 #define REALTEK_USB_DEVICE(vend, prod) \
4315 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4316 USB_DEVICE_ID_MATCH_INT_CLASS, \
4317 .idVendor = (vend), \
4318 .idProduct = (prod), \
4319 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4322 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4323 USB_DEVICE_ID_MATCH_DEVICE, \
4324 .idVendor = (vend), \
4325 .idProduct = (prod), \
4326 .bInterfaceClass = USB_CLASS_COMM, \
4327 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4328 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4330 /* table of devices that work with this driver */
4331 static struct usb_device_id rtl8152_table[] = {
4332 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4333 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4334 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4335 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
4336 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
4337 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
4341 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4343 static struct usb_driver rtl8152_driver = {
4345 .id_table = rtl8152_table,
4346 .probe = rtl8152_probe,
4347 .disconnect = rtl8152_disconnect,
4348 .suspend = rtl8152_suspend,
4349 .resume = rtl8152_resume,
4350 .reset_resume = rtl8152_reset_resume,
4351 .pre_reset = rtl8152_pre_reset,
4352 .post_reset = rtl8152_post_reset,
4353 .supports_autosuspend = 1,
4354 .disable_hub_initiated_lpm = 1,
4357 module_usb_driver(rtl8152_driver);
4359 MODULE_AUTHOR(DRIVER_AUTHOR);
4360 MODULE_DESCRIPTION(DRIVER_DESC);
4361 MODULE_LICENSE("GPL");