2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29 #include <linux/acpi.h>
31 /* Information for net-next */
32 #define NETNEXT_VERSION "08"
34 /* Information for net */
35 #define NET_VERSION "6"
37 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
40 #define MODULENAME "r8152"
42 #define R8152_PHY_ID 32
44 #define PLA_IDR 0xc000
45 #define PLA_RCR 0xc010
46 #define PLA_RMS 0xc016
47 #define PLA_RXFIFO_CTRL0 0xc0a0
48 #define PLA_RXFIFO_CTRL1 0xc0a4
49 #define PLA_RXFIFO_CTRL2 0xc0a8
50 #define PLA_DMY_REG0 0xc0b0
51 #define PLA_FMC 0xc0b4
52 #define PLA_CFG_WOL 0xc0b6
53 #define PLA_TEREDO_CFG 0xc0bc
54 #define PLA_MAR 0xcd00
55 #define PLA_BACKUP 0xd000
56 #define PAL_BDC_CR 0xd1a0
57 #define PLA_TEREDO_TIMER 0xd2cc
58 #define PLA_REALWOW_TIMER 0xd2e8
59 #define PLA_LEDSEL 0xdd90
60 #define PLA_LED_FEATURE 0xdd92
61 #define PLA_PHYAR 0xde00
62 #define PLA_BOOT_CTRL 0xe004
63 #define PLA_GPHY_INTR_IMR 0xe022
64 #define PLA_EEE_CR 0xe040
65 #define PLA_EEEP_CR 0xe080
66 #define PLA_MAC_PWR_CTRL 0xe0c0
67 #define PLA_MAC_PWR_CTRL2 0xe0ca
68 #define PLA_MAC_PWR_CTRL3 0xe0cc
69 #define PLA_MAC_PWR_CTRL4 0xe0ce
70 #define PLA_WDT6_CTRL 0xe428
71 #define PLA_TCR0 0xe610
72 #define PLA_TCR1 0xe612
73 #define PLA_MTPS 0xe615
74 #define PLA_TXFIFO_CTRL 0xe618
75 #define PLA_RSTTALLY 0xe800
77 #define PLA_CRWECR 0xe81c
78 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
79 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
80 #define PLA_CONFIG5 0xe822
81 #define PLA_PHY_PWR 0xe84c
82 #define PLA_OOB_CTRL 0xe84f
83 #define PLA_CPCR 0xe854
84 #define PLA_MISC_0 0xe858
85 #define PLA_MISC_1 0xe85a
86 #define PLA_OCP_GPHY_BASE 0xe86c
87 #define PLA_TALLYCNT 0xe890
88 #define PLA_SFF_STS_7 0xe8de
89 #define PLA_PHYSTATUS 0xe908
90 #define PLA_BP_BA 0xfc26
91 #define PLA_BP_0 0xfc28
92 #define PLA_BP_1 0xfc2a
93 #define PLA_BP_2 0xfc2c
94 #define PLA_BP_3 0xfc2e
95 #define PLA_BP_4 0xfc30
96 #define PLA_BP_5 0xfc32
97 #define PLA_BP_6 0xfc34
98 #define PLA_BP_7 0xfc36
99 #define PLA_BP_EN 0xfc38
101 #define USB_USB2PHY 0xb41e
102 #define USB_SSPHYLINK2 0xb428
103 #define USB_U2P3_CTRL 0xb460
104 #define USB_CSR_DUMMY1 0xb464
105 #define USB_CSR_DUMMY2 0xb466
106 #define USB_DEV_STAT 0xb808
107 #define USB_CONNECT_TIMER 0xcbf8
108 #define USB_BURST_SIZE 0xcfc0
109 #define USB_USB_CTRL 0xd406
110 #define USB_PHY_CTRL 0xd408
111 #define USB_TX_AGG 0xd40a
112 #define USB_RX_BUF_TH 0xd40c
113 #define USB_USB_TIMER 0xd428
114 #define USB_RX_EARLY_TIMEOUT 0xd42c
115 #define USB_RX_EARLY_SIZE 0xd42e
116 #define USB_PM_CTRL_STATUS 0xd432
117 #define USB_TX_DMA 0xd434
118 #define USB_TOLERANCE 0xd490
119 #define USB_LPM_CTRL 0xd41a
120 #define USB_BMU_RESET 0xd4b0
121 #define USB_UPS_CTRL 0xd800
122 #define USB_MISC_0 0xd81a
123 #define USB_POWER_CUT 0xd80a
124 #define USB_AFE_CTRL2 0xd824
125 #define USB_WDT11_CTRL 0xe43c
126 #define USB_BP_BA 0xfc26
127 #define USB_BP_0 0xfc28
128 #define USB_BP_1 0xfc2a
129 #define USB_BP_2 0xfc2c
130 #define USB_BP_3 0xfc2e
131 #define USB_BP_4 0xfc30
132 #define USB_BP_5 0xfc32
133 #define USB_BP_6 0xfc34
134 #define USB_BP_7 0xfc36
135 #define USB_BP_EN 0xfc38
138 #define OCP_ALDPS_CONFIG 0x2010
139 #define OCP_EEE_CONFIG1 0x2080
140 #define OCP_EEE_CONFIG2 0x2092
141 #define OCP_EEE_CONFIG3 0x2094
142 #define OCP_BASE_MII 0xa400
143 #define OCP_EEE_AR 0xa41a
144 #define OCP_EEE_DATA 0xa41c
145 #define OCP_PHY_STATUS 0xa420
146 #define OCP_POWER_CFG 0xa430
147 #define OCP_EEE_CFG 0xa432
148 #define OCP_SRAM_ADDR 0xa436
149 #define OCP_SRAM_DATA 0xa438
150 #define OCP_DOWN_SPEED 0xa442
151 #define OCP_EEE_ABLE 0xa5c4
152 #define OCP_EEE_ADV 0xa5d0
153 #define OCP_EEE_LPABLE 0xa5d2
154 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
155 #define OCP_ADC_CFG 0xbc06
158 #define SRAM_LPF_CFG 0x8012
159 #define SRAM_10M_AMP1 0x8080
160 #define SRAM_10M_AMP2 0x8082
161 #define SRAM_IMPEDANCE 0x8084
164 #define RCR_AAP 0x00000001
165 #define RCR_APM 0x00000002
166 #define RCR_AM 0x00000004
167 #define RCR_AB 0x00000008
168 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
170 /* PLA_RXFIFO_CTRL0 */
171 #define RXFIFO_THR1_NORMAL 0x00080002
172 #define RXFIFO_THR1_OOB 0x01800003
174 /* PLA_RXFIFO_CTRL1 */
175 #define RXFIFO_THR2_FULL 0x00000060
176 #define RXFIFO_THR2_HIGH 0x00000038
177 #define RXFIFO_THR2_OOB 0x0000004a
178 #define RXFIFO_THR2_NORMAL 0x00a0
180 /* PLA_RXFIFO_CTRL2 */
181 #define RXFIFO_THR3_FULL 0x00000078
182 #define RXFIFO_THR3_HIGH 0x00000048
183 #define RXFIFO_THR3_OOB 0x0000005a
184 #define RXFIFO_THR3_NORMAL 0x0110
186 /* PLA_TXFIFO_CTRL */
187 #define TXFIFO_THR_NORMAL 0x00400008
188 #define TXFIFO_THR_NORMAL2 0x01000008
191 #define ECM_ALDPS 0x0002
194 #define FMC_FCR_MCU_EN 0x0001
197 #define EEEP_CR_EEEP_TX 0x0002
200 #define WDT6_SET_MODE 0x0010
203 #define TCR0_TX_EMPTY 0x0800
204 #define TCR0_AUTO_FIFO 0x0080
207 #define VERSION_MASK 0x7cf0
210 #define MTPS_JUMBO (12 * 1024 / 64)
211 #define MTPS_DEFAULT (6 * 1024 / 64)
214 #define TALLY_RESET 0x0001
222 #define CRWECR_NORAML 0x00
223 #define CRWECR_CONFIG 0xc0
226 #define NOW_IS_OOB 0x80
227 #define TXFIFO_EMPTY 0x20
228 #define RXFIFO_EMPTY 0x10
229 #define LINK_LIST_READY 0x02
230 #define DIS_MCU_CLROOB 0x01
231 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
234 #define RXDY_GATED_EN 0x0008
237 #define RE_INIT_LL 0x8000
238 #define MCU_BORW_EN 0x4000
241 #define CPCR_RX_VLAN 0x0040
244 #define MAGIC_EN 0x0001
247 #define TEREDO_SEL 0x8000
248 #define TEREDO_WAKE_MASK 0x7f00
249 #define TEREDO_RS_EVENT_MASK 0x00fe
250 #define OOB_TEREDO_EN 0x0001
253 #define ALDPS_PROXY_MODE 0x0001
256 #define LINK_ON_WAKE_EN 0x0010
257 #define LINK_OFF_WAKE_EN 0x0008
260 #define BWF_EN 0x0040
261 #define MWF_EN 0x0020
262 #define UWF_EN 0x0010
263 #define LAN_WAKE_EN 0x0002
265 /* PLA_LED_FEATURE */
266 #define LED_MODE_MASK 0x0700
269 #define TX_10M_IDLE_EN 0x0080
270 #define PFM_PWM_SWITCH 0x0040
272 /* PLA_MAC_PWR_CTRL */
273 #define D3_CLK_GATED_EN 0x00004000
274 #define MCU_CLK_RATIO 0x07010f07
275 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
276 #define ALDPS_SPDWN_RATIO 0x0f87
278 /* PLA_MAC_PWR_CTRL2 */
279 #define EEE_SPDWN_RATIO 0x8007
281 /* PLA_MAC_PWR_CTRL3 */
282 #define PKT_AVAIL_SPDWN_EN 0x0100
283 #define SUSPEND_SPDWN_EN 0x0004
284 #define U1U2_SPDWN_EN 0x0002
285 #define L1_SPDWN_EN 0x0001
287 /* PLA_MAC_PWR_CTRL4 */
288 #define PWRSAVE_SPDWN_EN 0x1000
289 #define RXDV_SPDWN_EN 0x0800
290 #define TX10MIDLE_EN 0x0100
291 #define TP100_SPDWN_EN 0x0020
292 #define TP500_SPDWN_EN 0x0010
293 #define TP1000_SPDWN_EN 0x0008
294 #define EEE_SPDWN_EN 0x0001
296 /* PLA_GPHY_INTR_IMR */
297 #define GPHY_STS_MSK 0x0001
298 #define SPEED_DOWN_MSK 0x0002
299 #define SPDWN_RXDV_MSK 0x0004
300 #define SPDWN_LINKCHG_MSK 0x0008
303 #define PHYAR_FLAG 0x80000000
306 #define EEE_RX_EN 0x0001
307 #define EEE_TX_EN 0x0002
310 #define AUTOLOAD_DONE 0x0002
313 #define USB2PHY_SUSPEND 0x0001
314 #define USB2PHY_L1 0x0002
317 #define pwd_dn_scale_mask 0x3ffe
318 #define pwd_dn_scale(x) ((x) << 1)
321 #define DYNAMIC_BURST 0x0001
324 #define EP4_FULL_FC 0x0001
327 #define STAT_SPEED_MASK 0x0006
328 #define STAT_SPEED_HIGH 0x0000
329 #define STAT_SPEED_FULL 0x0002
332 #define TX_AGG_MAX_THRESHOLD 0x03
335 #define RX_THR_SUPPER 0x0c350180
336 #define RX_THR_HIGH 0x7a120180
337 #define RX_THR_SLOW 0xffff0180
340 #define TEST_MODE_DISABLE 0x00000001
341 #define TX_SIZE_ADJUST1 0x00000100
344 #define BMU_RESET_EP_IN 0x01
345 #define BMU_RESET_EP_OUT 0x02
348 #define POWER_CUT 0x0100
350 /* USB_PM_CTRL_STATUS */
351 #define RESUME_INDICATE 0x0001
354 #define RX_AGG_DISABLE 0x0010
355 #define RX_ZERO_EN 0x0080
358 #define U2P3_ENABLE 0x0001
361 #define PWR_EN 0x0001
362 #define PHASE2_EN 0x0008
365 #define PCUT_STATUS 0x0001
367 /* USB_RX_EARLY_TIMEOUT */
368 #define COALESCE_SUPER 85000U
369 #define COALESCE_HIGH 250000U
370 #define COALESCE_SLOW 524280U
373 #define TIMER11_EN 0x0001
376 /* bit 4 ~ 5: fifo empty boundary */
377 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
378 /* bit 2 ~ 3: LMP timer */
379 #define LPM_TIMER_MASK 0x0c
380 #define LPM_TIMER_500MS 0x04 /* 500 ms */
381 #define LPM_TIMER_500US 0x0c /* 500 us */
382 #define ROK_EXIT_LPM 0x02
385 #define SEN_VAL_MASK 0xf800
386 #define SEN_VAL_NORMAL 0xa000
387 #define SEL_RXIDLE 0x0100
389 /* OCP_ALDPS_CONFIG */
390 #define ENPWRSAVE 0x8000
391 #define ENPDNPS 0x0200
392 #define LINKENA 0x0100
393 #define DIS_SDSAVE 0x0010
396 #define PHY_STAT_MASK 0x0007
397 #define PHY_STAT_LAN_ON 3
398 #define PHY_STAT_PWRDN 5
401 #define EEE_CLKDIV_EN 0x8000
402 #define EN_ALDPS 0x0004
403 #define EN_10M_PLLOFF 0x0001
405 /* OCP_EEE_CONFIG1 */
406 #define RG_TXLPI_MSK_HFDUP 0x8000
407 #define RG_MATCLR_EN 0x4000
408 #define EEE_10_CAP 0x2000
409 #define EEE_NWAY_EN 0x1000
410 #define TX_QUIET_EN 0x0200
411 #define RX_QUIET_EN 0x0100
412 #define sd_rise_time_mask 0x0070
413 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
414 #define RG_RXLPI_MSK_HFDUP 0x0008
415 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
417 /* OCP_EEE_CONFIG2 */
418 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
419 #define RG_DACQUIET_EN 0x0400
420 #define RG_LDVQUIET_EN 0x0200
421 #define RG_CKRSEL 0x0020
422 #define RG_EEEPRG_EN 0x0010
424 /* OCP_EEE_CONFIG3 */
425 #define fast_snr_mask 0xff80
426 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
427 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
428 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
431 /* bit[15:14] function */
432 #define FUN_ADDR 0x0000
433 #define FUN_DATA 0x4000
434 /* bit[4:0] device addr */
437 #define CTAP_SHORT_EN 0x0040
438 #define EEE10_EN 0x0010
441 #define EN_10M_BGOFF 0x0080
444 #define TXDIS_STATE 0x01
445 #define ABD_STATE 0x02
448 #define CKADSEL_L 0x0100
449 #define ADC_EN 0x0080
450 #define EN_EMI_L 0x0040
453 #define LPF_AUTO_TUNE 0x8000
456 #define GDAC_IB_UPALL 0x0008
459 #define AMP_DN 0x0200
462 #define RX_DRIVING_MASK 0x6000
465 #define AD_MASK 0xfee0
467 #define PASS_THRU_MASK 0x1
469 enum rtl_register_content {
477 #define RTL8152_MAX_TX 4
478 #define RTL8152_MAX_RX 10
484 #define INTR_LINK 0x0004
486 #define RTL8152_REQT_READ 0xc0
487 #define RTL8152_REQT_WRITE 0x40
488 #define RTL8152_REQ_GET_REGS 0x05
489 #define RTL8152_REQ_SET_REGS 0x05
491 #define BYTE_EN_DWORD 0xff
492 #define BYTE_EN_WORD 0x33
493 #define BYTE_EN_BYTE 0x11
494 #define BYTE_EN_SIX_BYTES 0x3f
495 #define BYTE_EN_START_MASK 0x0f
496 #define BYTE_EN_END_MASK 0xf0
498 #define RTL8153_MAX_PACKET 9216 /* 9K */
499 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
500 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
501 #define RTL8153_RMS RTL8153_MAX_PACKET
502 #define RTL8152_TX_TIMEOUT (5 * HZ)
503 #define RTL8152_NAPI_WEIGHT 64
516 /* Define these values to match your device */
517 #define VENDOR_ID_REALTEK 0x0bda
518 #define VENDOR_ID_SAMSUNG 0x04e8
519 #define VENDOR_ID_LENOVO 0x17ef
520 #define VENDOR_ID_NVIDIA 0x0955
522 #define MCU_TYPE_PLA 0x0100
523 #define MCU_TYPE_USB 0x0000
525 struct tally_counter {
532 __le32 tx_one_collision;
533 __le32 tx_multi_collision;
543 #define RX_LEN_MASK 0x7fff
546 #define RD_UDP_CS BIT(23)
547 #define RD_TCP_CS BIT(22)
548 #define RD_IPV6_CS BIT(20)
549 #define RD_IPV4_CS BIT(19)
552 #define IPF BIT(23) /* IP checksum fail */
553 #define UDPF BIT(22) /* UDP checksum fail */
554 #define TCPF BIT(21) /* TCP checksum fail */
555 #define RX_VLAN_TAG BIT(16)
564 #define TX_FS BIT(31) /* First segment of a packet */
565 #define TX_LS BIT(30) /* Final segment of a packet */
566 #define GTSENDV4 BIT(28)
567 #define GTSENDV6 BIT(27)
568 #define GTTCPHO_SHIFT 18
569 #define GTTCPHO_MAX 0x7fU
570 #define TX_LEN_MAX 0x3ffffU
573 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
574 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
575 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
576 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
578 #define MSS_MAX 0x7ffU
579 #define TCPHO_SHIFT 17
580 #define TCPHO_MAX 0x7ffU
581 #define TX_VLAN_TAG BIT(16)
587 struct list_head list;
589 struct r8152 *context;
595 struct list_head list;
597 struct r8152 *context;
606 struct usb_device *udev;
607 struct napi_struct napi;
608 struct usb_interface *intf;
609 struct net_device *netdev;
610 struct urb *intr_urb;
611 struct tx_agg tx_info[RTL8152_MAX_TX];
612 struct rx_agg rx_info[RTL8152_MAX_RX];
613 struct list_head rx_done, tx_free;
614 struct sk_buff_head tx_queue, rx_queue;
615 spinlock_t rx_lock, tx_lock;
616 struct delayed_work schedule, hw_phy_work;
617 struct mii_if_info mii;
618 struct mutex control; /* use for hw setting */
619 #ifdef CONFIG_PM_SLEEP
620 struct notifier_block pm_notifier;
624 void (*init)(struct r8152 *);
625 int (*enable)(struct r8152 *);
626 void (*disable)(struct r8152 *);
627 void (*up)(struct r8152 *);
628 void (*down)(struct r8152 *);
629 void (*unload)(struct r8152 *);
630 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
631 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
632 bool (*in_nway)(struct r8152 *);
633 void (*hw_phy_cfg)(struct r8152 *);
634 void (*autosuspend_en)(struct r8152 *tp, bool enable);
667 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
668 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
670 static const int multicast_filter_limit = 32;
671 static unsigned int agg_buf_sz = 16384;
673 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
674 VLAN_ETH_HLEN - VLAN_HLEN)
677 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
682 tmp = kmalloc(size, GFP_KERNEL);
686 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
687 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
688 value, index, tmp, size, 500);
690 memcpy(data, tmp, size);
697 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
702 tmp = kmemdup(data, size, GFP_KERNEL);
706 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
707 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
708 value, index, tmp, size, 500);
715 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
716 void *data, u16 type)
721 if (test_bit(RTL8152_UNPLUG, &tp->flags))
724 /* both size and indix must be 4 bytes align */
725 if ((size & 3) || !size || (index & 3) || !data)
728 if ((u32)index + (u32)size > 0xffff)
733 ret = get_registers(tp, index, type, limit, data);
741 ret = get_registers(tp, index, type, size, data);
753 set_bit(RTL8152_UNPLUG, &tp->flags);
758 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
759 u16 size, void *data, u16 type)
762 u16 byteen_start, byteen_end, byen;
765 if (test_bit(RTL8152_UNPLUG, &tp->flags))
768 /* both size and indix must be 4 bytes align */
769 if ((size & 3) || !size || (index & 3) || !data)
772 if ((u32)index + (u32)size > 0xffff)
775 byteen_start = byteen & BYTE_EN_START_MASK;
776 byteen_end = byteen & BYTE_EN_END_MASK;
778 byen = byteen_start | (byteen_start << 4);
779 ret = set_registers(tp, index, type | byen, 4, data);
792 ret = set_registers(tp, index,
793 type | BYTE_EN_DWORD,
802 ret = set_registers(tp, index,
803 type | BYTE_EN_DWORD,
815 byen = byteen_end | (byteen_end >> 4);
816 ret = set_registers(tp, index, type | byen, 4, data);
823 set_bit(RTL8152_UNPLUG, &tp->flags);
829 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
831 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
835 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
837 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
841 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
843 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
847 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
849 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
852 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
856 generic_ocp_read(tp, index, sizeof(data), &data, type);
858 return __le32_to_cpu(data);
861 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
863 __le32 tmp = __cpu_to_le32(data);
865 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
868 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
872 u8 shift = index & 2;
876 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
878 data = __le32_to_cpu(tmp);
879 data >>= (shift * 8);
885 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
889 u16 byen = BYTE_EN_WORD;
890 u8 shift = index & 2;
896 mask <<= (shift * 8);
897 data <<= (shift * 8);
901 tmp = __cpu_to_le32(data);
903 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
906 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
910 u8 shift = index & 3;
914 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
916 data = __le32_to_cpu(tmp);
917 data >>= (shift * 8);
923 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
927 u16 byen = BYTE_EN_BYTE;
928 u8 shift = index & 3;
934 mask <<= (shift * 8);
935 data <<= (shift * 8);
939 tmp = __cpu_to_le32(data);
941 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
944 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
946 u16 ocp_base, ocp_index;
948 ocp_base = addr & 0xf000;
949 if (ocp_base != tp->ocp_base) {
950 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
951 tp->ocp_base = ocp_base;
954 ocp_index = (addr & 0x0fff) | 0xb000;
955 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
958 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
960 u16 ocp_base, ocp_index;
962 ocp_base = addr & 0xf000;
963 if (ocp_base != tp->ocp_base) {
964 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
965 tp->ocp_base = ocp_base;
968 ocp_index = (addr & 0x0fff) | 0xb000;
969 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
972 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
974 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
977 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
979 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
982 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
984 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
985 ocp_reg_write(tp, OCP_SRAM_DATA, data);
988 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
990 struct r8152 *tp = netdev_priv(netdev);
993 if (test_bit(RTL8152_UNPLUG, &tp->flags))
996 if (phy_id != R8152_PHY_ID)
999 ret = r8152_mdio_read(tp, reg);
1005 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1007 struct r8152 *tp = netdev_priv(netdev);
1009 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1012 if (phy_id != R8152_PHY_ID)
1015 r8152_mdio_write(tp, reg, val);
1019 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1021 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1023 struct r8152 *tp = netdev_priv(netdev);
1024 struct sockaddr *addr = p;
1025 int ret = -EADDRNOTAVAIL;
1027 if (!is_valid_ether_addr(addr->sa_data))
1030 ret = usb_autopm_get_interface(tp->intf);
1034 mutex_lock(&tp->control);
1036 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1038 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1039 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1040 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1042 mutex_unlock(&tp->control);
1044 usb_autopm_put_interface(tp->intf);
1049 /* Devices containing RTL8153-AD can support a persistent
1050 * host system provided MAC address.
1051 * Examples of this are Dell TB15 and Dell WD15 docks
1053 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1056 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1057 union acpi_object *obj;
1060 unsigned char buf[6];
1062 /* test for -AD variant of RTL8153 */
1063 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1064 if ((ocp_data & AD_MASK) != 0x1000)
1067 /* test for MAC address pass-through bit */
1068 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1069 if ((ocp_data & PASS_THRU_MASK) != 1)
1072 /* returns _AUXMAC_#AABBCCDDEEFF# */
1073 status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1074 obj = (union acpi_object *)buffer.pointer;
1075 if (!ACPI_SUCCESS(status))
1077 if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1078 netif_warn(tp, probe, tp->netdev,
1079 "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1080 obj->type, obj->string.length);
1083 if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1084 strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1085 netif_warn(tp, probe, tp->netdev,
1086 "Invalid header when reading pass-thru MAC addr\n");
1089 ret = hex2bin(buf, obj->string.pointer + 9, 6);
1090 if (!(ret == 0 && is_valid_ether_addr(buf))) {
1091 netif_warn(tp, probe, tp->netdev,
1092 "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1097 memcpy(sa->sa_data, buf, 6);
1098 ether_addr_copy(tp->netdev->dev_addr, sa->sa_data);
1099 netif_info(tp, probe, tp->netdev,
1100 "Using pass-thru MAC addr %pM\n", sa->sa_data);
1107 static int set_ethernet_addr(struct r8152 *tp)
1109 struct net_device *dev = tp->netdev;
1113 if (tp->version == RTL_VER_01) {
1114 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1116 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1117 * or system doesn't provide valid _SB.AMAC this will be
1118 * be expected to non-zero
1120 ret = vendor_mac_passthru_addr_read(tp, &sa);
1122 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1126 netif_err(tp, probe, dev, "Get ether addr fail\n");
1127 } else if (!is_valid_ether_addr(sa.sa_data)) {
1128 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1130 eth_hw_addr_random(dev);
1131 ether_addr_copy(sa.sa_data, dev->dev_addr);
1132 ret = rtl8152_set_mac_address(dev, &sa);
1133 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1136 if (tp->version == RTL_VER_01)
1137 ether_addr_copy(dev->dev_addr, sa.sa_data);
1139 ret = rtl8152_set_mac_address(dev, &sa);
1145 static void read_bulk_callback(struct urb *urb)
1147 struct net_device *netdev;
1148 int status = urb->status;
1160 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1163 if (!test_bit(WORK_ENABLE, &tp->flags))
1166 netdev = tp->netdev;
1168 /* When link down, the driver would cancel all bulks. */
1169 /* This avoid the re-submitting bulk */
1170 if (!netif_carrier_ok(netdev))
1173 usb_mark_last_busy(tp->udev);
1177 if (urb->actual_length < ETH_ZLEN)
1180 spin_lock(&tp->rx_lock);
1181 list_add_tail(&agg->list, &tp->rx_done);
1182 spin_unlock(&tp->rx_lock);
1183 napi_schedule(&tp->napi);
1186 set_bit(RTL8152_UNPLUG, &tp->flags);
1187 netif_device_detach(tp->netdev);
1190 return; /* the urb is in unlink state */
1192 if (net_ratelimit())
1193 netdev_warn(netdev, "maybe reset is needed?\n");
1196 if (net_ratelimit())
1197 netdev_warn(netdev, "Rx status %d\n", status);
1201 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1204 static void write_bulk_callback(struct urb *urb)
1206 struct net_device_stats *stats;
1207 struct net_device *netdev;
1210 int status = urb->status;
1220 netdev = tp->netdev;
1221 stats = &netdev->stats;
1223 if (net_ratelimit())
1224 netdev_warn(netdev, "Tx status %d\n", status);
1225 stats->tx_errors += agg->skb_num;
1227 stats->tx_packets += agg->skb_num;
1228 stats->tx_bytes += agg->skb_len;
1231 spin_lock(&tp->tx_lock);
1232 list_add_tail(&agg->list, &tp->tx_free);
1233 spin_unlock(&tp->tx_lock);
1235 usb_autopm_put_interface_async(tp->intf);
1237 if (!netif_carrier_ok(netdev))
1240 if (!test_bit(WORK_ENABLE, &tp->flags))
1243 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1246 if (!skb_queue_empty(&tp->tx_queue))
1247 napi_schedule(&tp->napi);
1250 static void intr_callback(struct urb *urb)
1254 int status = urb->status;
1261 if (!test_bit(WORK_ENABLE, &tp->flags))
1264 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1268 case 0: /* success */
1270 case -ECONNRESET: /* unlink */
1272 netif_device_detach(tp->netdev);
1275 netif_info(tp, intr, tp->netdev,
1276 "Stop submitting intr, status %d\n", status);
1279 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1281 /* -EPIPE: should clear the halt */
1283 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1287 d = urb->transfer_buffer;
1288 if (INTR_LINK & __le16_to_cpu(d[0])) {
1289 if (!netif_carrier_ok(tp->netdev)) {
1290 set_bit(RTL8152_LINK_CHG, &tp->flags);
1291 schedule_delayed_work(&tp->schedule, 0);
1294 if (netif_carrier_ok(tp->netdev)) {
1295 set_bit(RTL8152_LINK_CHG, &tp->flags);
1296 schedule_delayed_work(&tp->schedule, 0);
1301 res = usb_submit_urb(urb, GFP_ATOMIC);
1302 if (res == -ENODEV) {
1303 set_bit(RTL8152_UNPLUG, &tp->flags);
1304 netif_device_detach(tp->netdev);
1306 netif_err(tp, intr, tp->netdev,
1307 "can't resubmit intr, status %d\n", res);
1311 static inline void *rx_agg_align(void *data)
1313 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1316 static inline void *tx_agg_align(void *data)
1318 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1321 static void free_all_mem(struct r8152 *tp)
1325 for (i = 0; i < RTL8152_MAX_RX; i++) {
1326 usb_free_urb(tp->rx_info[i].urb);
1327 tp->rx_info[i].urb = NULL;
1329 kfree(tp->rx_info[i].buffer);
1330 tp->rx_info[i].buffer = NULL;
1331 tp->rx_info[i].head = NULL;
1334 for (i = 0; i < RTL8152_MAX_TX; i++) {
1335 usb_free_urb(tp->tx_info[i].urb);
1336 tp->tx_info[i].urb = NULL;
1338 kfree(tp->tx_info[i].buffer);
1339 tp->tx_info[i].buffer = NULL;
1340 tp->tx_info[i].head = NULL;
1343 usb_free_urb(tp->intr_urb);
1344 tp->intr_urb = NULL;
1346 kfree(tp->intr_buff);
1347 tp->intr_buff = NULL;
1350 static int alloc_all_mem(struct r8152 *tp)
1352 struct net_device *netdev = tp->netdev;
1353 struct usb_interface *intf = tp->intf;
1354 struct usb_host_interface *alt = intf->cur_altsetting;
1355 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1360 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1362 spin_lock_init(&tp->rx_lock);
1363 spin_lock_init(&tp->tx_lock);
1364 INIT_LIST_HEAD(&tp->tx_free);
1365 skb_queue_head_init(&tp->tx_queue);
1366 skb_queue_head_init(&tp->rx_queue);
1368 for (i = 0; i < RTL8152_MAX_RX; i++) {
1369 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1373 if (buf != rx_agg_align(buf)) {
1375 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1381 urb = usb_alloc_urb(0, GFP_KERNEL);
1387 INIT_LIST_HEAD(&tp->rx_info[i].list);
1388 tp->rx_info[i].context = tp;
1389 tp->rx_info[i].urb = urb;
1390 tp->rx_info[i].buffer = buf;
1391 tp->rx_info[i].head = rx_agg_align(buf);
1394 for (i = 0; i < RTL8152_MAX_TX; i++) {
1395 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1399 if (buf != tx_agg_align(buf)) {
1401 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1407 urb = usb_alloc_urb(0, GFP_KERNEL);
1413 INIT_LIST_HEAD(&tp->tx_info[i].list);
1414 tp->tx_info[i].context = tp;
1415 tp->tx_info[i].urb = urb;
1416 tp->tx_info[i].buffer = buf;
1417 tp->tx_info[i].head = tx_agg_align(buf);
1419 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1422 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1426 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1430 tp->intr_interval = (int)ep_intr->desc.bInterval;
1431 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1432 tp->intr_buff, INTBUFSIZE, intr_callback,
1433 tp, tp->intr_interval);
1442 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1444 struct tx_agg *agg = NULL;
1445 unsigned long flags;
1447 if (list_empty(&tp->tx_free))
1450 spin_lock_irqsave(&tp->tx_lock, flags);
1451 if (!list_empty(&tp->tx_free)) {
1452 struct list_head *cursor;
1454 cursor = tp->tx_free.next;
1455 list_del_init(cursor);
1456 agg = list_entry(cursor, struct tx_agg, list);
1458 spin_unlock_irqrestore(&tp->tx_lock, flags);
1463 /* r8152_csum_workaround()
1464 * The hw limites the value the transport offset. When the offset is out of the
1465 * range, calculate the checksum by sw.
1467 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1468 struct sk_buff_head *list)
1470 if (skb_shinfo(skb)->gso_size) {
1471 netdev_features_t features = tp->netdev->features;
1472 struct sk_buff_head seg_list;
1473 struct sk_buff *segs, *nskb;
1475 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1476 segs = skb_gso_segment(skb, features);
1477 if (IS_ERR(segs) || !segs)
1480 __skb_queue_head_init(&seg_list);
1486 __skb_queue_tail(&seg_list, nskb);
1489 skb_queue_splice(&seg_list, list);
1491 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1492 if (skb_checksum_help(skb) < 0)
1495 __skb_queue_head(list, skb);
1497 struct net_device_stats *stats;
1500 stats = &tp->netdev->stats;
1501 stats->tx_dropped++;
1506 /* msdn_giant_send_check()
1507 * According to the document of microsoft, the TCP Pseudo Header excludes the
1508 * packet length for IPv6 TCP large packets.
1510 static int msdn_giant_send_check(struct sk_buff *skb)
1512 const struct ipv6hdr *ipv6h;
1516 ret = skb_cow_head(skb, 0);
1520 ipv6h = ipv6_hdr(skb);
1524 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1529 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1531 if (skb_vlan_tag_present(skb)) {
1534 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1535 desc->opts2 |= cpu_to_le32(opts2);
1539 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1541 u32 opts2 = le32_to_cpu(desc->opts2);
1543 if (opts2 & RX_VLAN_TAG)
1544 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1545 swab16(opts2 & 0xffff));
1548 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1549 struct sk_buff *skb, u32 len, u32 transport_offset)
1551 u32 mss = skb_shinfo(skb)->gso_size;
1552 u32 opts1, opts2 = 0;
1553 int ret = TX_CSUM_SUCCESS;
1555 WARN_ON_ONCE(len > TX_LEN_MAX);
1557 opts1 = len | TX_FS | TX_LS;
1560 if (transport_offset > GTTCPHO_MAX) {
1561 netif_warn(tp, tx_err, tp->netdev,
1562 "Invalid transport offset 0x%x for TSO\n",
1568 switch (vlan_get_protocol(skb)) {
1569 case htons(ETH_P_IP):
1573 case htons(ETH_P_IPV6):
1574 if (msdn_giant_send_check(skb)) {
1586 opts1 |= transport_offset << GTTCPHO_SHIFT;
1587 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1588 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1591 if (transport_offset > TCPHO_MAX) {
1592 netif_warn(tp, tx_err, tp->netdev,
1593 "Invalid transport offset 0x%x\n",
1599 switch (vlan_get_protocol(skb)) {
1600 case htons(ETH_P_IP):
1602 ip_protocol = ip_hdr(skb)->protocol;
1605 case htons(ETH_P_IPV6):
1607 ip_protocol = ipv6_hdr(skb)->nexthdr;
1611 ip_protocol = IPPROTO_RAW;
1615 if (ip_protocol == IPPROTO_TCP)
1617 else if (ip_protocol == IPPROTO_UDP)
1622 opts2 |= transport_offset << TCPHO_SHIFT;
1625 desc->opts2 = cpu_to_le32(opts2);
1626 desc->opts1 = cpu_to_le32(opts1);
1632 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1634 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1638 __skb_queue_head_init(&skb_head);
1639 spin_lock(&tx_queue->lock);
1640 skb_queue_splice_init(tx_queue, &skb_head);
1641 spin_unlock(&tx_queue->lock);
1643 tx_data = agg->head;
1646 remain = agg_buf_sz;
1648 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1649 struct tx_desc *tx_desc;
1650 struct sk_buff *skb;
1654 skb = __skb_dequeue(&skb_head);
1658 len = skb->len + sizeof(*tx_desc);
1661 __skb_queue_head(&skb_head, skb);
1665 tx_data = tx_agg_align(tx_data);
1666 tx_desc = (struct tx_desc *)tx_data;
1668 offset = (u32)skb_transport_offset(skb);
1670 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1671 r8152_csum_workaround(tp, skb, &skb_head);
1675 rtl_tx_vlan_tag(tx_desc, skb);
1677 tx_data += sizeof(*tx_desc);
1680 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1681 struct net_device_stats *stats = &tp->netdev->stats;
1683 stats->tx_dropped++;
1684 dev_kfree_skb_any(skb);
1685 tx_data -= sizeof(*tx_desc);
1690 agg->skb_len += len;
1693 dev_kfree_skb_any(skb);
1695 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1698 if (!skb_queue_empty(&skb_head)) {
1699 spin_lock(&tx_queue->lock);
1700 skb_queue_splice(&skb_head, tx_queue);
1701 spin_unlock(&tx_queue->lock);
1704 netif_tx_lock(tp->netdev);
1706 if (netif_queue_stopped(tp->netdev) &&
1707 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1708 netif_wake_queue(tp->netdev);
1710 netif_tx_unlock(tp->netdev);
1712 ret = usb_autopm_get_interface_async(tp->intf);
1716 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1717 agg->head, (int)(tx_data - (u8 *)agg->head),
1718 (usb_complete_t)write_bulk_callback, agg);
1720 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1722 usb_autopm_put_interface_async(tp->intf);
1728 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1730 u8 checksum = CHECKSUM_NONE;
1733 if (tp->version == RTL_VER_01)
1736 opts2 = le32_to_cpu(rx_desc->opts2);
1737 opts3 = le32_to_cpu(rx_desc->opts3);
1739 if (opts2 & RD_IPV4_CS) {
1741 checksum = CHECKSUM_NONE;
1742 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1743 checksum = CHECKSUM_NONE;
1744 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1745 checksum = CHECKSUM_NONE;
1747 checksum = CHECKSUM_UNNECESSARY;
1748 } else if (RD_IPV6_CS) {
1749 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1750 checksum = CHECKSUM_UNNECESSARY;
1751 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1752 checksum = CHECKSUM_UNNECESSARY;
1759 static int rx_bottom(struct r8152 *tp, int budget)
1761 unsigned long flags;
1762 struct list_head *cursor, *next, rx_queue;
1763 int ret = 0, work_done = 0;
1765 if (!skb_queue_empty(&tp->rx_queue)) {
1766 while (work_done < budget) {
1767 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1768 struct net_device *netdev = tp->netdev;
1769 struct net_device_stats *stats = &netdev->stats;
1770 unsigned int pkt_len;
1776 napi_gro_receive(&tp->napi, skb);
1778 stats->rx_packets++;
1779 stats->rx_bytes += pkt_len;
1783 if (list_empty(&tp->rx_done))
1786 INIT_LIST_HEAD(&rx_queue);
1787 spin_lock_irqsave(&tp->rx_lock, flags);
1788 list_splice_init(&tp->rx_done, &rx_queue);
1789 spin_unlock_irqrestore(&tp->rx_lock, flags);
1791 list_for_each_safe(cursor, next, &rx_queue) {
1792 struct rx_desc *rx_desc;
1798 list_del_init(cursor);
1800 agg = list_entry(cursor, struct rx_agg, list);
1802 if (urb->actual_length < ETH_ZLEN)
1805 rx_desc = agg->head;
1806 rx_data = agg->head;
1807 len_used += sizeof(struct rx_desc);
1809 while (urb->actual_length > len_used) {
1810 struct net_device *netdev = tp->netdev;
1811 struct net_device_stats *stats = &netdev->stats;
1812 unsigned int pkt_len;
1813 struct sk_buff *skb;
1815 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1816 if (pkt_len < ETH_ZLEN)
1819 len_used += pkt_len;
1820 if (urb->actual_length < len_used)
1823 pkt_len -= CRC_SIZE;
1824 rx_data += sizeof(struct rx_desc);
1826 skb = napi_alloc_skb(&tp->napi, pkt_len);
1828 stats->rx_dropped++;
1832 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1833 memcpy(skb->data, rx_data, pkt_len);
1834 skb_put(skb, pkt_len);
1835 skb->protocol = eth_type_trans(skb, netdev);
1836 rtl_rx_vlan_tag(rx_desc, skb);
1837 if (work_done < budget) {
1838 napi_gro_receive(&tp->napi, skb);
1840 stats->rx_packets++;
1841 stats->rx_bytes += pkt_len;
1843 __skb_queue_tail(&tp->rx_queue, skb);
1847 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1848 rx_desc = (struct rx_desc *)rx_data;
1849 len_used = (int)(rx_data - (u8 *)agg->head);
1850 len_used += sizeof(struct rx_desc);
1855 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1857 urb->actual_length = 0;
1858 list_add_tail(&agg->list, next);
1862 if (!list_empty(&rx_queue)) {
1863 spin_lock_irqsave(&tp->rx_lock, flags);
1864 list_splice_tail(&rx_queue, &tp->rx_done);
1865 spin_unlock_irqrestore(&tp->rx_lock, flags);
1872 static void tx_bottom(struct r8152 *tp)
1879 if (skb_queue_empty(&tp->tx_queue))
1882 agg = r8152_get_tx_agg(tp);
1886 res = r8152_tx_agg_fill(tp, agg);
1888 struct net_device *netdev = tp->netdev;
1890 if (res == -ENODEV) {
1891 set_bit(RTL8152_UNPLUG, &tp->flags);
1892 netif_device_detach(netdev);
1894 struct net_device_stats *stats = &netdev->stats;
1895 unsigned long flags;
1897 netif_warn(tp, tx_err, netdev,
1898 "failed tx_urb %d\n", res);
1899 stats->tx_dropped += agg->skb_num;
1901 spin_lock_irqsave(&tp->tx_lock, flags);
1902 list_add_tail(&agg->list, &tp->tx_free);
1903 spin_unlock_irqrestore(&tp->tx_lock, flags);
1909 static void bottom_half(struct r8152 *tp)
1911 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1914 if (!test_bit(WORK_ENABLE, &tp->flags))
1917 /* When link down, the driver would cancel all bulks. */
1918 /* This avoid the re-submitting bulk */
1919 if (!netif_carrier_ok(tp->netdev))
1922 clear_bit(SCHEDULE_NAPI, &tp->flags);
1927 static int r8152_poll(struct napi_struct *napi, int budget)
1929 struct r8152 *tp = container_of(napi, struct r8152, napi);
1932 work_done = rx_bottom(tp, budget);
1935 if (work_done < budget) {
1936 napi_complete(napi);
1937 if (!list_empty(&tp->rx_done))
1938 napi_schedule(napi);
1945 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1949 /* The rx would be stopped, so skip submitting */
1950 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1951 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1954 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1955 agg->head, agg_buf_sz,
1956 (usb_complete_t)read_bulk_callback, agg);
1958 ret = usb_submit_urb(agg->urb, mem_flags);
1959 if (ret == -ENODEV) {
1960 set_bit(RTL8152_UNPLUG, &tp->flags);
1961 netif_device_detach(tp->netdev);
1963 struct urb *urb = agg->urb;
1964 unsigned long flags;
1966 urb->actual_length = 0;
1967 spin_lock_irqsave(&tp->rx_lock, flags);
1968 list_add_tail(&agg->list, &tp->rx_done);
1969 spin_unlock_irqrestore(&tp->rx_lock, flags);
1971 netif_err(tp, rx_err, tp->netdev,
1972 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1974 napi_schedule(&tp->napi);
1980 static void rtl_drop_queued_tx(struct r8152 *tp)
1982 struct net_device_stats *stats = &tp->netdev->stats;
1983 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1984 struct sk_buff *skb;
1986 if (skb_queue_empty(tx_queue))
1989 __skb_queue_head_init(&skb_head);
1990 spin_lock_bh(&tx_queue->lock);
1991 skb_queue_splice_init(tx_queue, &skb_head);
1992 spin_unlock_bh(&tx_queue->lock);
1994 while ((skb = __skb_dequeue(&skb_head))) {
1996 stats->tx_dropped++;
2000 static void rtl8152_tx_timeout(struct net_device *netdev)
2002 struct r8152 *tp = netdev_priv(netdev);
2004 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2006 usb_queue_reset_device(tp->intf);
2009 static void rtl8152_set_rx_mode(struct net_device *netdev)
2011 struct r8152 *tp = netdev_priv(netdev);
2013 if (netif_carrier_ok(netdev)) {
2014 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2015 schedule_delayed_work(&tp->schedule, 0);
2019 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2021 struct r8152 *tp = netdev_priv(netdev);
2022 u32 mc_filter[2]; /* Multicast hash filter */
2026 netif_stop_queue(netdev);
2027 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2028 ocp_data &= ~RCR_ACPT_ALL;
2029 ocp_data |= RCR_AB | RCR_APM;
2031 if (netdev->flags & IFF_PROMISC) {
2032 /* Unconditionally log net taps. */
2033 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2034 ocp_data |= RCR_AM | RCR_AAP;
2035 mc_filter[1] = 0xffffffff;
2036 mc_filter[0] = 0xffffffff;
2037 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2038 (netdev->flags & IFF_ALLMULTI)) {
2039 /* Too many to filter perfectly -- accept all multicasts. */
2041 mc_filter[1] = 0xffffffff;
2042 mc_filter[0] = 0xffffffff;
2044 struct netdev_hw_addr *ha;
2048 netdev_for_each_mc_addr(ha, netdev) {
2049 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2051 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2056 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2057 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2059 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2060 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2061 netif_wake_queue(netdev);
2064 static netdev_features_t
2065 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2066 netdev_features_t features)
2068 u32 mss = skb_shinfo(skb)->gso_size;
2069 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2070 int offset = skb_transport_offset(skb);
2072 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2073 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2074 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2075 features &= ~NETIF_F_GSO_MASK;
2080 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2081 struct net_device *netdev)
2083 struct r8152 *tp = netdev_priv(netdev);
2085 skb_tx_timestamp(skb);
2087 skb_queue_tail(&tp->tx_queue, skb);
2089 if (!list_empty(&tp->tx_free)) {
2090 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2091 set_bit(SCHEDULE_NAPI, &tp->flags);
2092 schedule_delayed_work(&tp->schedule, 0);
2094 usb_mark_last_busy(tp->udev);
2095 napi_schedule(&tp->napi);
2097 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2098 netif_stop_queue(netdev);
2101 return NETDEV_TX_OK;
2104 static void r8152b_reset_packet_filter(struct r8152 *tp)
2108 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2109 ocp_data &= ~FMC_FCR_MCU_EN;
2110 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2111 ocp_data |= FMC_FCR_MCU_EN;
2112 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2115 static void rtl8152_nic_reset(struct r8152 *tp)
2119 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2121 for (i = 0; i < 1000; i++) {
2122 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2124 usleep_range(100, 400);
2128 static void set_tx_qlen(struct r8152 *tp)
2130 struct net_device *netdev = tp->netdev;
2132 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2133 sizeof(struct tx_desc));
2136 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2138 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2141 static void rtl_set_eee_plus(struct r8152 *tp)
2146 speed = rtl8152_get_speed(tp);
2147 if (speed & _10bps) {
2148 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2149 ocp_data |= EEEP_CR_EEEP_TX;
2150 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2152 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2153 ocp_data &= ~EEEP_CR_EEEP_TX;
2154 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2158 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2162 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2164 ocp_data |= RXDY_GATED_EN;
2166 ocp_data &= ~RXDY_GATED_EN;
2167 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2170 static int rtl_start_rx(struct r8152 *tp)
2174 INIT_LIST_HEAD(&tp->rx_done);
2175 for (i = 0; i < RTL8152_MAX_RX; i++) {
2176 INIT_LIST_HEAD(&tp->rx_info[i].list);
2177 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2182 if (ret && ++i < RTL8152_MAX_RX) {
2183 struct list_head rx_queue;
2184 unsigned long flags;
2186 INIT_LIST_HEAD(&rx_queue);
2189 struct rx_agg *agg = &tp->rx_info[i++];
2190 struct urb *urb = agg->urb;
2192 urb->actual_length = 0;
2193 list_add_tail(&agg->list, &rx_queue);
2194 } while (i < RTL8152_MAX_RX);
2196 spin_lock_irqsave(&tp->rx_lock, flags);
2197 list_splice_tail(&rx_queue, &tp->rx_done);
2198 spin_unlock_irqrestore(&tp->rx_lock, flags);
2204 static int rtl_stop_rx(struct r8152 *tp)
2208 for (i = 0; i < RTL8152_MAX_RX; i++)
2209 usb_kill_urb(tp->rx_info[i].urb);
2211 while (!skb_queue_empty(&tp->rx_queue))
2212 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2217 static int rtl_enable(struct r8152 *tp)
2221 r8152b_reset_packet_filter(tp);
2223 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2224 ocp_data |= CR_RE | CR_TE;
2225 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2227 rxdy_gated_en(tp, false);
2232 static int rtl8152_enable(struct r8152 *tp)
2234 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2238 rtl_set_eee_plus(tp);
2240 return rtl_enable(tp);
2243 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2245 u32 ocp_data = tp->coalesce / 8;
2247 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2250 static void r8153_set_rx_early_size(struct r8152 *tp)
2252 u32 mtu = tp->netdev->mtu;
2253 u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 8;
2255 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2258 static int rtl8153_enable(struct r8152 *tp)
2260 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2263 usb_disable_lpm(tp->udev);
2265 rtl_set_eee_plus(tp);
2266 r8153_set_rx_early_timeout(tp);
2267 r8153_set_rx_early_size(tp);
2269 return rtl_enable(tp);
2272 static void rtl_disable(struct r8152 *tp)
2277 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2278 rtl_drop_queued_tx(tp);
2282 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2283 ocp_data &= ~RCR_ACPT_ALL;
2284 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2286 rtl_drop_queued_tx(tp);
2288 for (i = 0; i < RTL8152_MAX_TX; i++)
2289 usb_kill_urb(tp->tx_info[i].urb);
2291 rxdy_gated_en(tp, true);
2293 for (i = 0; i < 1000; i++) {
2294 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2295 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2297 usleep_range(1000, 2000);
2300 for (i = 0; i < 1000; i++) {
2301 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2303 usleep_range(1000, 2000);
2308 rtl8152_nic_reset(tp);
2311 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2315 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2317 ocp_data |= POWER_CUT;
2319 ocp_data &= ~POWER_CUT;
2320 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2322 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2323 ocp_data &= ~RESUME_INDICATE;
2324 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2327 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2331 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2333 ocp_data |= CPCR_RX_VLAN;
2335 ocp_data &= ~CPCR_RX_VLAN;
2336 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2339 static int rtl8152_set_features(struct net_device *dev,
2340 netdev_features_t features)
2342 netdev_features_t changed = features ^ dev->features;
2343 struct r8152 *tp = netdev_priv(dev);
2346 ret = usb_autopm_get_interface(tp->intf);
2350 mutex_lock(&tp->control);
2352 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2353 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2354 rtl_rx_vlan_en(tp, true);
2356 rtl_rx_vlan_en(tp, false);
2359 mutex_unlock(&tp->control);
2361 usb_autopm_put_interface(tp->intf);
2367 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2369 static u32 __rtl_get_wol(struct r8152 *tp)
2374 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2375 if (ocp_data & LINK_ON_WAKE_EN)
2376 wolopts |= WAKE_PHY;
2378 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2379 if (ocp_data & UWF_EN)
2380 wolopts |= WAKE_UCAST;
2381 if (ocp_data & BWF_EN)
2382 wolopts |= WAKE_BCAST;
2383 if (ocp_data & MWF_EN)
2384 wolopts |= WAKE_MCAST;
2386 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2387 if (ocp_data & MAGIC_EN)
2388 wolopts |= WAKE_MAGIC;
2393 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2397 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2399 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2400 ocp_data &= ~LINK_ON_WAKE_EN;
2401 if (wolopts & WAKE_PHY)
2402 ocp_data |= LINK_ON_WAKE_EN;
2403 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2405 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2406 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2407 if (wolopts & WAKE_UCAST)
2409 if (wolopts & WAKE_BCAST)
2411 if (wolopts & WAKE_MCAST)
2413 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2415 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2417 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2418 ocp_data &= ~MAGIC_EN;
2419 if (wolopts & WAKE_MAGIC)
2420 ocp_data |= MAGIC_EN;
2421 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2423 if (wolopts & WAKE_ANY)
2424 device_set_wakeup_enable(&tp->udev->dev, true);
2426 device_set_wakeup_enable(&tp->udev->dev, false);
2429 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2434 memset(u1u2, 0xff, sizeof(u1u2));
2436 memset(u1u2, 0x00, sizeof(u1u2));
2438 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2441 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2445 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2446 if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2447 ocp_data |= U2P3_ENABLE;
2449 ocp_data &= ~U2P3_ENABLE;
2450 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2453 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2457 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2459 ocp_data |= PWR_EN | PHASE2_EN;
2461 ocp_data &= ~(PWR_EN | PHASE2_EN);
2462 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2464 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2465 ocp_data &= ~PCUT_STATUS;
2466 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2469 static bool rtl_can_wakeup(struct r8152 *tp)
2471 struct usb_device *udev = tp->udev;
2473 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2476 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2481 __rtl_set_wol(tp, WAKE_ANY);
2483 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2485 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2486 ocp_data |= LINK_OFF_WAKE_EN;
2487 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2489 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2493 __rtl_set_wol(tp, tp->saved_wolopts);
2495 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2497 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2498 ocp_data &= ~LINK_OFF_WAKE_EN;
2499 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2501 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2505 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2507 rtl_runtime_suspend_enable(tp, enable);
2510 r8153_u1u2en(tp, false);
2511 r8153_u2p3en(tp, false);
2513 r8153_u2p3en(tp, true);
2514 r8153_u1u2en(tp, true);
2518 static void r8153_teredo_off(struct r8152 *tp)
2522 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2523 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2524 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2526 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2527 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2528 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2531 static void rtl_reset_bmu(struct r8152 *tp)
2535 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2536 ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2537 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2538 ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2539 ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2542 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2545 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2546 LINKENA | DIS_SDSAVE);
2548 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2554 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2556 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2557 ocp_reg_write(tp, OCP_EEE_DATA, reg);
2558 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2561 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2565 r8152_mmd_indirect(tp, dev, reg);
2566 data = ocp_reg_read(tp, OCP_EEE_DATA);
2567 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2572 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2574 r8152_mmd_indirect(tp, dev, reg);
2575 ocp_reg_write(tp, OCP_EEE_DATA, data);
2576 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2579 static void r8152_eee_en(struct r8152 *tp, bool enable)
2581 u16 config1, config2, config3;
2584 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2585 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2586 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2587 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2590 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2591 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
2592 config1 |= sd_rise_time(1);
2593 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
2594 config3 |= fast_snr(42);
2596 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2597 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
2599 config1 |= sd_rise_time(7);
2600 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
2601 config3 |= fast_snr(511);
2604 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2605 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
2606 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
2607 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
2610 static void r8152b_enable_eee(struct r8152 *tp)
2612 r8152_eee_en(tp, true);
2613 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
2616 static void r8152b_enable_fc(struct r8152 *tp)
2620 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2621 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2622 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2625 static void rtl8152_disable(struct r8152 *tp)
2627 r8152_aldps_en(tp, false);
2629 r8152_aldps_en(tp, true);
2632 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2634 r8152b_enable_eee(tp);
2635 r8152_aldps_en(tp, true);
2636 r8152b_enable_fc(tp);
2638 set_bit(PHY_RESET, &tp->flags);
2641 static void r8152b_exit_oob(struct r8152 *tp)
2646 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2647 ocp_data &= ~RCR_ACPT_ALL;
2648 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2650 rxdy_gated_en(tp, true);
2651 r8153_teredo_off(tp);
2652 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2653 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2655 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2656 ocp_data &= ~NOW_IS_OOB;
2657 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2659 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2660 ocp_data &= ~MCU_BORW_EN;
2661 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2663 for (i = 0; i < 1000; i++) {
2664 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2665 if (ocp_data & LINK_LIST_READY)
2667 usleep_range(1000, 2000);
2670 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2671 ocp_data |= RE_INIT_LL;
2672 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2674 for (i = 0; i < 1000; i++) {
2675 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2676 if (ocp_data & LINK_LIST_READY)
2678 usleep_range(1000, 2000);
2681 rtl8152_nic_reset(tp);
2683 /* rx share fifo credit full threshold */
2684 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2686 if (tp->udev->speed == USB_SPEED_FULL ||
2687 tp->udev->speed == USB_SPEED_LOW) {
2688 /* rx share fifo credit near full threshold */
2689 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2691 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2694 /* rx share fifo credit near full threshold */
2695 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2697 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2701 /* TX share fifo free credit full threshold */
2702 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2704 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2705 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2706 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2707 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2709 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2711 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2713 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2714 ocp_data |= TCR0_AUTO_FIFO;
2715 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2718 static void r8152b_enter_oob(struct r8152 *tp)
2723 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2724 ocp_data &= ~NOW_IS_OOB;
2725 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2727 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2728 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2729 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2733 for (i = 0; i < 1000; i++) {
2734 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2735 if (ocp_data & LINK_LIST_READY)
2737 usleep_range(1000, 2000);
2740 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2741 ocp_data |= RE_INIT_LL;
2742 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2744 for (i = 0; i < 1000; i++) {
2745 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2746 if (ocp_data & LINK_LIST_READY)
2748 usleep_range(1000, 2000);
2751 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2753 rtl_rx_vlan_en(tp, true);
2755 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2756 ocp_data |= ALDPS_PROXY_MODE;
2757 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2759 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2760 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2761 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2763 rxdy_gated_en(tp, false);
2765 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2766 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2767 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2770 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2774 data = ocp_reg_read(tp, OCP_POWER_CFG);
2777 ocp_reg_write(tp, OCP_POWER_CFG, data);
2780 ocp_reg_write(tp, OCP_POWER_CFG, data);
2785 static void r8153_eee_en(struct r8152 *tp, bool enable)
2790 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2791 config = ocp_reg_read(tp, OCP_EEE_CFG);
2794 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2797 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2798 config &= ~EEE10_EN;
2801 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2802 ocp_reg_write(tp, OCP_EEE_CFG, config);
2805 static void r8153_hw_phy_cfg(struct r8152 *tp)
2810 /* disable ALDPS before updating the PHY parameters */
2811 r8153_aldps_en(tp, false);
2813 /* disable EEE before updating the PHY parameters */
2814 r8153_eee_en(tp, false);
2815 ocp_reg_write(tp, OCP_EEE_ADV, 0);
2817 if (tp->version == RTL_VER_03) {
2818 data = ocp_reg_read(tp, OCP_EEE_CFG);
2819 data &= ~CTAP_SHORT_EN;
2820 ocp_reg_write(tp, OCP_EEE_CFG, data);
2823 data = ocp_reg_read(tp, OCP_POWER_CFG);
2824 data |= EEE_CLKDIV_EN;
2825 ocp_reg_write(tp, OCP_POWER_CFG, data);
2827 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2828 data |= EN_10M_BGOFF;
2829 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2830 data = ocp_reg_read(tp, OCP_POWER_CFG);
2831 data |= EN_10M_PLLOFF;
2832 ocp_reg_write(tp, OCP_POWER_CFG, data);
2833 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2835 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2836 ocp_data |= PFM_PWM_SWITCH;
2837 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2839 /* Enable LPF corner auto tune */
2840 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2842 /* Adjust 10M Amplitude */
2843 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2844 sram_write(tp, SRAM_10M_AMP2, 0x0208);
2846 r8153_eee_en(tp, true);
2847 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
2849 r8153_aldps_en(tp, true);
2850 r8152b_enable_fc(tp);
2852 set_bit(PHY_RESET, &tp->flags);
2855 static void r8153_first_init(struct r8152 *tp)
2860 rxdy_gated_en(tp, true);
2861 r8153_teredo_off(tp);
2863 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2864 ocp_data &= ~RCR_ACPT_ALL;
2865 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2867 rtl8152_nic_reset(tp);
2870 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2871 ocp_data &= ~NOW_IS_OOB;
2872 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2874 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2875 ocp_data &= ~MCU_BORW_EN;
2876 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2878 for (i = 0; i < 1000; i++) {
2879 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2880 if (ocp_data & LINK_LIST_READY)
2882 usleep_range(1000, 2000);
2885 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2886 ocp_data |= RE_INIT_LL;
2887 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2889 for (i = 0; i < 1000; i++) {
2890 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2891 if (ocp_data & LINK_LIST_READY)
2893 usleep_range(1000, 2000);
2896 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2898 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2899 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2901 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2902 ocp_data |= TCR0_AUTO_FIFO;
2903 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2905 rtl8152_nic_reset(tp);
2907 /* rx share fifo credit full threshold */
2908 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2909 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2910 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2911 /* TX share fifo free credit full threshold */
2912 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2914 /* rx aggregation */
2915 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2916 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2917 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2920 static void r8153_enter_oob(struct r8152 *tp)
2925 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2926 ocp_data &= ~NOW_IS_OOB;
2927 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2932 for (i = 0; i < 1000; i++) {
2933 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2934 if (ocp_data & LINK_LIST_READY)
2936 usleep_range(1000, 2000);
2939 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2940 ocp_data |= RE_INIT_LL;
2941 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2943 for (i = 0; i < 1000; i++) {
2944 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2945 if (ocp_data & LINK_LIST_READY)
2947 usleep_range(1000, 2000);
2950 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2952 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2953 ocp_data &= ~TEREDO_WAKE_MASK;
2954 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2956 rtl_rx_vlan_en(tp, true);
2958 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2959 ocp_data |= ALDPS_PROXY_MODE;
2960 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2962 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2963 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2964 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2966 rxdy_gated_en(tp, false);
2968 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2969 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2970 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2973 static void rtl8153_disable(struct r8152 *tp)
2975 r8153_aldps_en(tp, false);
2978 r8153_aldps_en(tp, true);
2979 usb_enable_lpm(tp->udev);
2982 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2984 u16 bmcr, anar, gbcr;
2987 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2988 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2989 ADVERTISE_100HALF | ADVERTISE_100FULL);
2990 if (tp->mii.supports_gmii) {
2991 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2992 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2997 if (autoneg == AUTONEG_DISABLE) {
2998 if (speed == SPEED_10) {
3000 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3001 } else if (speed == SPEED_100) {
3002 bmcr = BMCR_SPEED100;
3003 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3004 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3005 bmcr = BMCR_SPEED1000;
3006 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3012 if (duplex == DUPLEX_FULL)
3013 bmcr |= BMCR_FULLDPLX;
3015 if (speed == SPEED_10) {
3016 if (duplex == DUPLEX_FULL)
3017 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3019 anar |= ADVERTISE_10HALF;
3020 } else if (speed == SPEED_100) {
3021 if (duplex == DUPLEX_FULL) {
3022 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3023 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3025 anar |= ADVERTISE_10HALF;
3026 anar |= ADVERTISE_100HALF;
3028 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3029 if (duplex == DUPLEX_FULL) {
3030 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3031 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3032 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3034 anar |= ADVERTISE_10HALF;
3035 anar |= ADVERTISE_100HALF;
3036 gbcr |= ADVERTISE_1000HALF;
3043 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3046 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3049 if (tp->mii.supports_gmii)
3050 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3052 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3053 r8152_mdio_write(tp, MII_BMCR, bmcr);
3055 if (bmcr & BMCR_RESET) {
3058 for (i = 0; i < 50; i++) {
3060 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3069 static void rtl8152_up(struct r8152 *tp)
3071 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3074 r8152_aldps_en(tp, false);
3075 r8152b_exit_oob(tp);
3076 r8152_aldps_en(tp, true);
3079 static void rtl8152_down(struct r8152 *tp)
3081 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3082 rtl_drop_queued_tx(tp);
3086 r8152_power_cut_en(tp, false);
3087 r8152_aldps_en(tp, false);
3088 r8152b_enter_oob(tp);
3089 r8152_aldps_en(tp, true);
3092 static void rtl8153_up(struct r8152 *tp)
3094 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3097 r8153_u1u2en(tp, false);
3098 r8153_aldps_en(tp, false);
3099 r8153_first_init(tp);
3100 r8153_aldps_en(tp, true);
3101 r8153_u2p3en(tp, true);
3102 r8153_u1u2en(tp, true);
3103 usb_enable_lpm(tp->udev);
3106 static void rtl8153_down(struct r8152 *tp)
3108 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3109 rtl_drop_queued_tx(tp);
3113 r8153_u1u2en(tp, false);
3114 r8153_u2p3en(tp, false);
3115 r8153_power_cut_en(tp, false);
3116 r8153_aldps_en(tp, false);
3117 r8153_enter_oob(tp);
3118 r8153_aldps_en(tp, true);
3121 static bool rtl8152_in_nway(struct r8152 *tp)
3125 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3126 tp->ocp_base = 0x2000;
3127 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
3128 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3130 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3131 if (nway_state & 0xc000)
3137 static bool rtl8153_in_nway(struct r8152 *tp)
3139 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3141 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3147 static void set_carrier(struct r8152 *tp)
3149 struct net_device *netdev = tp->netdev;
3152 speed = rtl8152_get_speed(tp);
3154 if (speed & LINK_STATUS) {
3155 if (!netif_carrier_ok(netdev)) {
3156 tp->rtl_ops.enable(tp);
3157 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3158 napi_disable(&tp->napi);
3159 netif_carrier_on(netdev);
3161 napi_enable(&tp->napi);
3164 if (netif_carrier_ok(netdev)) {
3165 netif_carrier_off(netdev);
3166 napi_disable(&tp->napi);
3167 tp->rtl_ops.disable(tp);
3168 napi_enable(&tp->napi);
3173 static void rtl_work_func_t(struct work_struct *work)
3175 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3177 /* If the device is unplugged or !netif_running(), the workqueue
3178 * doesn't need to wake the device, and could return directly.
3180 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3183 if (usb_autopm_get_interface(tp->intf) < 0)
3186 if (!test_bit(WORK_ENABLE, &tp->flags))
3189 if (!mutex_trylock(&tp->control)) {
3190 schedule_delayed_work(&tp->schedule, 0);
3194 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3197 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3198 _rtl8152_set_rx_mode(tp->netdev);
3200 /* don't schedule napi before linking */
3201 if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3202 netif_carrier_ok(tp->netdev))
3203 napi_schedule(&tp->napi);
3205 mutex_unlock(&tp->control);
3208 usb_autopm_put_interface(tp->intf);
3211 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3213 struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3215 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3218 if (usb_autopm_get_interface(tp->intf) < 0)
3221 mutex_lock(&tp->control);
3223 tp->rtl_ops.hw_phy_cfg(tp);
3225 rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
3227 mutex_unlock(&tp->control);
3229 usb_autopm_put_interface(tp->intf);
3232 #ifdef CONFIG_PM_SLEEP
3233 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3236 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3239 case PM_HIBERNATION_PREPARE:
3240 case PM_SUSPEND_PREPARE:
3241 usb_autopm_get_interface(tp->intf);
3244 case PM_POST_HIBERNATION:
3245 case PM_POST_SUSPEND:
3246 usb_autopm_put_interface(tp->intf);
3249 case PM_POST_RESTORE:
3250 case PM_RESTORE_PREPARE:
3259 static int rtl8152_open(struct net_device *netdev)
3261 struct r8152 *tp = netdev_priv(netdev);
3264 res = alloc_all_mem(tp);
3268 res = usb_autopm_get_interface(tp->intf);
3274 mutex_lock(&tp->control);
3278 netif_carrier_off(netdev);
3279 netif_start_queue(netdev);
3280 set_bit(WORK_ENABLE, &tp->flags);
3282 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3285 netif_device_detach(tp->netdev);
3286 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3290 napi_enable(&tp->napi);
3293 mutex_unlock(&tp->control);
3295 usb_autopm_put_interface(tp->intf);
3296 #ifdef CONFIG_PM_SLEEP
3297 tp->pm_notifier.notifier_call = rtl_notifier;
3298 register_pm_notifier(&tp->pm_notifier);
3305 static int rtl8152_close(struct net_device *netdev)
3307 struct r8152 *tp = netdev_priv(netdev);
3310 #ifdef CONFIG_PM_SLEEP
3311 unregister_pm_notifier(&tp->pm_notifier);
3313 napi_disable(&tp->napi);
3314 clear_bit(WORK_ENABLE, &tp->flags);
3315 usb_kill_urb(tp->intr_urb);
3316 cancel_delayed_work_sync(&tp->schedule);
3317 netif_stop_queue(netdev);
3319 res = usb_autopm_get_interface(tp->intf);
3320 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3321 rtl_drop_queued_tx(tp);
3324 mutex_lock(&tp->control);
3326 tp->rtl_ops.down(tp);
3328 mutex_unlock(&tp->control);
3330 usb_autopm_put_interface(tp->intf);
3338 static void rtl_tally_reset(struct r8152 *tp)
3342 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3343 ocp_data |= TALLY_RESET;
3344 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3347 static void r8152b_init(struct r8152 *tp)
3352 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3355 data = r8152_mdio_read(tp, MII_BMCR);
3356 if (data & BMCR_PDOWN) {
3357 data &= ~BMCR_PDOWN;
3358 r8152_mdio_write(tp, MII_BMCR, data);
3361 r8152_aldps_en(tp, false);
3363 if (tp->version == RTL_VER_01) {
3364 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3365 ocp_data &= ~LED_MODE_MASK;
3366 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3369 r8152_power_cut_en(tp, false);
3371 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3372 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3373 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3374 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3375 ocp_data &= ~MCU_CLK_RATIO_MASK;
3376 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3377 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3378 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3379 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3380 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3382 rtl_tally_reset(tp);
3384 /* enable rx aggregation */
3385 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3386 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3387 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3390 static void r8153_init(struct r8152 *tp)
3396 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3399 r8153_u1u2en(tp, false);
3401 for (i = 0; i < 500; i++) {
3402 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3408 for (i = 0; i < 500; i++) {
3409 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3410 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3415 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
3416 tp->version == RTL_VER_05)
3417 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
3419 data = r8152_mdio_read(tp, MII_BMCR);
3420 if (data & BMCR_PDOWN) {
3421 data &= ~BMCR_PDOWN;
3422 r8152_mdio_write(tp, MII_BMCR, data);
3425 for (i = 0; i < 500; i++) {
3426 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3427 if (ocp_data == PHY_STAT_LAN_ON)
3432 usb_disable_lpm(tp->udev);
3433 r8153_u2p3en(tp, false);
3435 if (tp->version == RTL_VER_04) {
3436 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3437 ocp_data &= ~pwd_dn_scale_mask;
3438 ocp_data |= pwd_dn_scale(96);
3439 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3441 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3442 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3443 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3444 } else if (tp->version == RTL_VER_05) {
3445 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3446 ocp_data &= ~ECM_ALDPS;
3447 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3449 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3450 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3451 ocp_data &= ~DYNAMIC_BURST;
3453 ocp_data |= DYNAMIC_BURST;
3454 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3455 } else if (tp->version == RTL_VER_06) {
3456 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3457 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3458 ocp_data &= ~DYNAMIC_BURST;
3460 ocp_data |= DYNAMIC_BURST;
3461 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3464 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3465 ocp_data |= EP4_FULL_FC;
3466 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3468 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3469 ocp_data &= ~TIMER11_EN;
3470 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3472 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3473 ocp_data &= ~LED_MODE_MASK;
3474 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3476 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3477 if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3478 ocp_data |= LPM_TIMER_500MS;
3480 ocp_data |= LPM_TIMER_500US;
3481 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3483 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3484 ocp_data &= ~SEN_VAL_MASK;
3485 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3486 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3488 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3490 r8153_power_cut_en(tp, false);
3491 r8153_u1u2en(tp, true);
3493 /* MAC clock speed down */
3494 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
3495 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
3496 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
3497 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
3499 rtl_tally_reset(tp);
3500 r8153_u2p3en(tp, true);
3503 static int rtl8152_pre_reset(struct usb_interface *intf)
3505 struct r8152 *tp = usb_get_intfdata(intf);
3506 struct net_device *netdev;
3511 netdev = tp->netdev;
3512 if (!netif_running(netdev))
3515 napi_disable(&tp->napi);
3516 clear_bit(WORK_ENABLE, &tp->flags);
3517 usb_kill_urb(tp->intr_urb);
3518 cancel_delayed_work_sync(&tp->schedule);
3519 if (netif_carrier_ok(netdev)) {
3520 netif_stop_queue(netdev);
3521 mutex_lock(&tp->control);
3522 tp->rtl_ops.disable(tp);
3523 mutex_unlock(&tp->control);
3529 static int rtl8152_post_reset(struct usb_interface *intf)
3531 struct r8152 *tp = usb_get_intfdata(intf);
3532 struct net_device *netdev;
3537 netdev = tp->netdev;
3538 if (!netif_running(netdev))
3541 set_bit(WORK_ENABLE, &tp->flags);
3542 if (netif_carrier_ok(netdev)) {
3543 mutex_lock(&tp->control);
3544 tp->rtl_ops.enable(tp);
3545 rtl8152_set_rx_mode(netdev);
3546 mutex_unlock(&tp->control);
3547 netif_wake_queue(netdev);
3550 napi_enable(&tp->napi);
3555 static bool delay_autosuspend(struct r8152 *tp)
3557 bool sw_linking = !!netif_carrier_ok(tp->netdev);
3558 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3560 /* This means a linking change occurs and the driver doesn't detect it,
3561 * yet. If the driver has disabled tx/rx and hw is linking on, the
3562 * device wouldn't wake up by receiving any packet.
3564 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3567 /* If the linking down is occurred by nway, the device may miss the
3568 * linking change event. And it wouldn't wake when linking on.
3570 if (!sw_linking && tp->rtl_ops.in_nway(tp))
3576 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3578 struct r8152 *tp = usb_get_intfdata(intf);
3579 struct net_device *netdev = tp->netdev;
3582 mutex_lock(&tp->control);
3584 if (PMSG_IS_AUTO(message)) {
3585 if (netif_running(netdev) && delay_autosuspend(tp)) {
3590 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3592 netif_device_detach(netdev);
3595 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3596 clear_bit(WORK_ENABLE, &tp->flags);
3597 usb_kill_urb(tp->intr_urb);
3598 napi_disable(&tp->napi);
3599 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3601 tp->rtl_ops.autosuspend_en(tp, true);
3603 cancel_delayed_work_sync(&tp->schedule);
3604 tp->rtl_ops.down(tp);
3606 napi_enable(&tp->napi);
3609 mutex_unlock(&tp->control);
3614 static int rtl8152_resume(struct usb_interface *intf)
3616 struct r8152 *tp = usb_get_intfdata(intf);
3618 mutex_lock(&tp->control);
3620 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3621 tp->rtl_ops.init(tp);
3622 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3623 netif_device_attach(tp->netdev);
3626 if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3627 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3628 tp->rtl_ops.autosuspend_en(tp, false);
3629 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3630 napi_disable(&tp->napi);
3631 set_bit(WORK_ENABLE, &tp->flags);
3632 if (netif_carrier_ok(tp->netdev))
3634 napi_enable(&tp->napi);
3637 netif_carrier_off(tp->netdev);
3638 set_bit(WORK_ENABLE, &tp->flags);
3640 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3641 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3642 if (tp->netdev->flags & IFF_UP)
3643 tp->rtl_ops.autosuspend_en(tp, false);
3644 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3647 mutex_unlock(&tp->control);
3652 static int rtl8152_reset_resume(struct usb_interface *intf)
3654 struct r8152 *tp = usb_get_intfdata(intf);
3656 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3657 return rtl8152_resume(intf);
3660 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3662 struct r8152 *tp = netdev_priv(dev);
3664 if (usb_autopm_get_interface(tp->intf) < 0)
3667 if (!rtl_can_wakeup(tp)) {
3671 mutex_lock(&tp->control);
3672 wol->supported = WAKE_ANY;
3673 wol->wolopts = __rtl_get_wol(tp);
3674 mutex_unlock(&tp->control);
3677 usb_autopm_put_interface(tp->intf);
3680 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3682 struct r8152 *tp = netdev_priv(dev);
3685 if (!rtl_can_wakeup(tp))
3688 ret = usb_autopm_get_interface(tp->intf);
3692 mutex_lock(&tp->control);
3694 __rtl_set_wol(tp, wol->wolopts);
3695 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3697 mutex_unlock(&tp->control);
3699 usb_autopm_put_interface(tp->intf);
3705 static u32 rtl8152_get_msglevel(struct net_device *dev)
3707 struct r8152 *tp = netdev_priv(dev);
3709 return tp->msg_enable;
3712 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3714 struct r8152 *tp = netdev_priv(dev);
3716 tp->msg_enable = value;
3719 static void rtl8152_get_drvinfo(struct net_device *netdev,
3720 struct ethtool_drvinfo *info)
3722 struct r8152 *tp = netdev_priv(netdev);
3724 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3725 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3726 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3730 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3732 struct r8152 *tp = netdev_priv(netdev);
3735 if (!tp->mii.mdio_read)
3738 ret = usb_autopm_get_interface(tp->intf);
3742 mutex_lock(&tp->control);
3744 ret = mii_ethtool_gset(&tp->mii, cmd);
3746 mutex_unlock(&tp->control);
3748 usb_autopm_put_interface(tp->intf);
3754 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3756 struct r8152 *tp = netdev_priv(dev);
3759 ret = usb_autopm_get_interface(tp->intf);
3763 mutex_lock(&tp->control);
3765 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3767 tp->autoneg = cmd->autoneg;
3768 tp->speed = cmd->speed;
3769 tp->duplex = cmd->duplex;
3772 mutex_unlock(&tp->control);
3774 usb_autopm_put_interface(tp->intf);
3780 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3787 "tx_single_collisions",
3788 "tx_multi_collisions",
3796 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3800 return ARRAY_SIZE(rtl8152_gstrings);
3806 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3807 struct ethtool_stats *stats, u64 *data)
3809 struct r8152 *tp = netdev_priv(dev);
3810 struct tally_counter tally;
3812 if (usb_autopm_get_interface(tp->intf) < 0)
3815 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3817 usb_autopm_put_interface(tp->intf);
3819 data[0] = le64_to_cpu(tally.tx_packets);
3820 data[1] = le64_to_cpu(tally.rx_packets);
3821 data[2] = le64_to_cpu(tally.tx_errors);
3822 data[3] = le32_to_cpu(tally.rx_errors);
3823 data[4] = le16_to_cpu(tally.rx_missed);
3824 data[5] = le16_to_cpu(tally.align_errors);
3825 data[6] = le32_to_cpu(tally.tx_one_collision);
3826 data[7] = le32_to_cpu(tally.tx_multi_collision);
3827 data[8] = le64_to_cpu(tally.rx_unicast);
3828 data[9] = le64_to_cpu(tally.rx_broadcast);
3829 data[10] = le32_to_cpu(tally.rx_multicast);
3830 data[11] = le16_to_cpu(tally.tx_aborted);
3831 data[12] = le16_to_cpu(tally.tx_underrun);
3834 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3836 switch (stringset) {
3838 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3843 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3845 u32 ocp_data, lp, adv, supported = 0;
3848 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3849 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3851 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3852 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3854 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3855 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3857 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3858 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3860 eee->eee_enabled = !!ocp_data;
3861 eee->eee_active = !!(supported & adv & lp);
3862 eee->supported = supported;
3863 eee->advertised = adv;
3864 eee->lp_advertised = lp;
3869 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3871 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3873 r8152_eee_en(tp, eee->eee_enabled);
3875 if (!eee->eee_enabled)
3878 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3883 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3885 u32 ocp_data, lp, adv, supported = 0;
3888 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3889 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3891 val = ocp_reg_read(tp, OCP_EEE_ADV);
3892 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3894 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3895 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3897 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3898 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3900 eee->eee_enabled = !!ocp_data;
3901 eee->eee_active = !!(supported & adv & lp);
3902 eee->supported = supported;
3903 eee->advertised = adv;
3904 eee->lp_advertised = lp;
3909 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3911 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3913 r8153_eee_en(tp, eee->eee_enabled);
3915 if (!eee->eee_enabled)
3918 ocp_reg_write(tp, OCP_EEE_ADV, val);
3924 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3926 struct r8152 *tp = netdev_priv(net);
3929 ret = usb_autopm_get_interface(tp->intf);
3933 mutex_lock(&tp->control);
3935 ret = tp->rtl_ops.eee_get(tp, edata);
3937 mutex_unlock(&tp->control);
3939 usb_autopm_put_interface(tp->intf);
3946 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3948 struct r8152 *tp = netdev_priv(net);
3951 ret = usb_autopm_get_interface(tp->intf);
3955 mutex_lock(&tp->control);
3957 ret = tp->rtl_ops.eee_set(tp, edata);
3959 ret = mii_nway_restart(&tp->mii);
3961 mutex_unlock(&tp->control);
3963 usb_autopm_put_interface(tp->intf);
3969 static int rtl8152_nway_reset(struct net_device *dev)
3971 struct r8152 *tp = netdev_priv(dev);
3974 ret = usb_autopm_get_interface(tp->intf);
3978 mutex_lock(&tp->control);
3980 ret = mii_nway_restart(&tp->mii);
3982 mutex_unlock(&tp->control);
3984 usb_autopm_put_interface(tp->intf);
3990 static int rtl8152_get_coalesce(struct net_device *netdev,
3991 struct ethtool_coalesce *coalesce)
3993 struct r8152 *tp = netdev_priv(netdev);
3995 switch (tp->version) {
4003 coalesce->rx_coalesce_usecs = tp->coalesce;
4008 static int rtl8152_set_coalesce(struct net_device *netdev,
4009 struct ethtool_coalesce *coalesce)
4011 struct r8152 *tp = netdev_priv(netdev);
4014 switch (tp->version) {
4022 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4025 ret = usb_autopm_get_interface(tp->intf);
4029 mutex_lock(&tp->control);
4031 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4032 tp->coalesce = coalesce->rx_coalesce_usecs;
4034 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4035 r8153_set_rx_early_timeout(tp);
4038 mutex_unlock(&tp->control);
4040 usb_autopm_put_interface(tp->intf);
4045 static const struct ethtool_ops ops = {
4046 .get_drvinfo = rtl8152_get_drvinfo,
4047 .get_settings = rtl8152_get_settings,
4048 .set_settings = rtl8152_set_settings,
4049 .get_link = ethtool_op_get_link,
4050 .nway_reset = rtl8152_nway_reset,
4051 .get_msglevel = rtl8152_get_msglevel,
4052 .set_msglevel = rtl8152_set_msglevel,
4053 .get_wol = rtl8152_get_wol,
4054 .set_wol = rtl8152_set_wol,
4055 .get_strings = rtl8152_get_strings,
4056 .get_sset_count = rtl8152_get_sset_count,
4057 .get_ethtool_stats = rtl8152_get_ethtool_stats,
4058 .get_coalesce = rtl8152_get_coalesce,
4059 .set_coalesce = rtl8152_set_coalesce,
4060 .get_eee = rtl_ethtool_get_eee,
4061 .set_eee = rtl_ethtool_set_eee,
4064 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4066 struct r8152 *tp = netdev_priv(netdev);
4067 struct mii_ioctl_data *data = if_mii(rq);
4070 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4073 res = usb_autopm_get_interface(tp->intf);
4079 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4083 mutex_lock(&tp->control);
4084 data->val_out = r8152_mdio_read(tp, data->reg_num);
4085 mutex_unlock(&tp->control);
4089 if (!capable(CAP_NET_ADMIN)) {
4093 mutex_lock(&tp->control);
4094 r8152_mdio_write(tp, data->reg_num, data->val_in);
4095 mutex_unlock(&tp->control);
4102 usb_autopm_put_interface(tp->intf);
4108 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4110 struct r8152 *tp = netdev_priv(dev);
4113 switch (tp->version) {
4116 return eth_change_mtu(dev, new_mtu);
4121 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4124 ret = usb_autopm_get_interface(tp->intf);
4128 mutex_lock(&tp->control);
4132 if (netif_running(dev) && netif_carrier_ok(dev))
4133 r8153_set_rx_early_size(tp);
4135 mutex_unlock(&tp->control);
4137 usb_autopm_put_interface(tp->intf);
4142 static const struct net_device_ops rtl8152_netdev_ops = {
4143 .ndo_open = rtl8152_open,
4144 .ndo_stop = rtl8152_close,
4145 .ndo_do_ioctl = rtl8152_ioctl,
4146 .ndo_start_xmit = rtl8152_start_xmit,
4147 .ndo_tx_timeout = rtl8152_tx_timeout,
4148 .ndo_set_features = rtl8152_set_features,
4149 .ndo_set_rx_mode = rtl8152_set_rx_mode,
4150 .ndo_set_mac_address = rtl8152_set_mac_address,
4151 .ndo_change_mtu = rtl8152_change_mtu,
4152 .ndo_validate_addr = eth_validate_addr,
4153 .ndo_features_check = rtl8152_features_check,
4156 static void r8152b_get_version(struct r8152 *tp)
4161 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4162 version = (u16)(ocp_data & VERSION_MASK);
4166 tp->version = RTL_VER_01;
4169 tp->version = RTL_VER_02;
4172 tp->version = RTL_VER_03;
4173 tp->mii.supports_gmii = 1;
4176 tp->version = RTL_VER_04;
4177 tp->mii.supports_gmii = 1;
4180 tp->version = RTL_VER_05;
4181 tp->mii.supports_gmii = 1;
4184 tp->version = RTL_VER_06;
4185 tp->mii.supports_gmii = 1;
4188 netif_info(tp, probe, tp->netdev,
4189 "Unknown version 0x%04x\n", version);
4194 static void rtl8152_unload(struct r8152 *tp)
4196 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4199 if (tp->version != RTL_VER_01)
4200 r8152_power_cut_en(tp, true);
4203 static void rtl8153_unload(struct r8152 *tp)
4205 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4208 r8153_power_cut_en(tp, false);
4211 static int rtl_ops_init(struct r8152 *tp)
4213 struct rtl_ops *ops = &tp->rtl_ops;
4216 switch (tp->version) {
4219 ops->init = r8152b_init;
4220 ops->enable = rtl8152_enable;
4221 ops->disable = rtl8152_disable;
4222 ops->up = rtl8152_up;
4223 ops->down = rtl8152_down;
4224 ops->unload = rtl8152_unload;
4225 ops->eee_get = r8152_get_eee;
4226 ops->eee_set = r8152_set_eee;
4227 ops->in_nway = rtl8152_in_nway;
4228 ops->hw_phy_cfg = r8152b_hw_phy_cfg;
4229 ops->autosuspend_en = rtl_runtime_suspend_enable;
4236 ops->init = r8153_init;
4237 ops->enable = rtl8153_enable;
4238 ops->disable = rtl8153_disable;
4239 ops->up = rtl8153_up;
4240 ops->down = rtl8153_down;
4241 ops->unload = rtl8153_unload;
4242 ops->eee_get = r8153_get_eee;
4243 ops->eee_set = r8153_set_eee;
4244 ops->in_nway = rtl8153_in_nway;
4245 ops->hw_phy_cfg = r8153_hw_phy_cfg;
4246 ops->autosuspend_en = rtl8153_runtime_enable;
4251 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4258 static int rtl8152_probe(struct usb_interface *intf,
4259 const struct usb_device_id *id)
4261 struct usb_device *udev = interface_to_usbdev(intf);
4263 struct net_device *netdev;
4266 if (udev->actconfig->desc.bConfigurationValue != 1) {
4267 usb_driver_set_configuration(udev, 1);
4271 usb_reset_device(udev);
4272 netdev = alloc_etherdev(sizeof(struct r8152));
4274 dev_err(&intf->dev, "Out of memory\n");
4278 SET_NETDEV_DEV(netdev, &intf->dev);
4279 tp = netdev_priv(netdev);
4280 tp->msg_enable = 0x7FFF;
4283 tp->netdev = netdev;
4286 r8152b_get_version(tp);
4287 ret = rtl_ops_init(tp);
4291 mutex_init(&tp->control);
4292 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4293 INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4295 netdev->netdev_ops = &rtl8152_netdev_ops;
4296 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4298 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4299 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4300 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4301 NETIF_F_HW_VLAN_CTAG_TX;
4302 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4303 NETIF_F_TSO | NETIF_F_FRAGLIST |
4304 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4305 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4306 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4307 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4308 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4310 netdev->ethtool_ops = &ops;
4311 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4313 tp->mii.dev = netdev;
4314 tp->mii.mdio_read = read_mii_word;
4315 tp->mii.mdio_write = write_mii_word;
4316 tp->mii.phy_id_mask = 0x3f;
4317 tp->mii.reg_num_mask = 0x1f;
4318 tp->mii.phy_id = R8152_PHY_ID;
4320 switch (udev->speed) {
4321 case USB_SPEED_SUPER:
4322 case USB_SPEED_SUPER_PLUS:
4323 tp->coalesce = COALESCE_SUPER;
4325 case USB_SPEED_HIGH:
4326 tp->coalesce = COALESCE_HIGH;
4329 tp->coalesce = COALESCE_SLOW;
4333 tp->autoneg = AUTONEG_ENABLE;
4334 tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
4335 tp->duplex = DUPLEX_FULL;
4337 intf->needs_remote_wakeup = 1;
4339 tp->rtl_ops.init(tp);
4340 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4341 set_ethernet_addr(tp);
4343 usb_set_intfdata(intf, tp);
4344 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4346 ret = register_netdev(netdev);
4348 netif_err(tp, probe, netdev, "couldn't register the device\n");
4352 if (!rtl_can_wakeup(tp))
4353 __rtl_set_wol(tp, 0);
4355 tp->saved_wolopts = __rtl_get_wol(tp);
4356 if (tp->saved_wolopts)
4357 device_set_wakeup_enable(&udev->dev, true);
4359 device_set_wakeup_enable(&udev->dev, false);
4361 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4366 netif_napi_del(&tp->napi);
4367 usb_set_intfdata(intf, NULL);
4369 free_netdev(netdev);
4373 static void rtl8152_disconnect(struct usb_interface *intf)
4375 struct r8152 *tp = usb_get_intfdata(intf);
4377 usb_set_intfdata(intf, NULL);
4379 struct usb_device *udev = tp->udev;
4381 if (udev->state == USB_STATE_NOTATTACHED)
4382 set_bit(RTL8152_UNPLUG, &tp->flags);
4384 netif_napi_del(&tp->napi);
4385 unregister_netdev(tp->netdev);
4386 cancel_delayed_work_sync(&tp->hw_phy_work);
4387 tp->rtl_ops.unload(tp);
4388 free_netdev(tp->netdev);
4392 #define REALTEK_USB_DEVICE(vend, prod) \
4393 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4394 USB_DEVICE_ID_MATCH_INT_CLASS, \
4395 .idVendor = (vend), \
4396 .idProduct = (prod), \
4397 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4400 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4401 USB_DEVICE_ID_MATCH_DEVICE, \
4402 .idVendor = (vend), \
4403 .idProduct = (prod), \
4404 .bInterfaceClass = USB_CLASS_COMM, \
4405 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4406 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4408 /* table of devices that work with this driver */
4409 static struct usb_device_id rtl8152_table[] = {
4410 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4411 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4412 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4413 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
4414 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
4415 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
4419 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4421 static struct usb_driver rtl8152_driver = {
4423 .id_table = rtl8152_table,
4424 .probe = rtl8152_probe,
4425 .disconnect = rtl8152_disconnect,
4426 .suspend = rtl8152_suspend,
4427 .resume = rtl8152_resume,
4428 .reset_resume = rtl8152_reset_resume,
4429 .pre_reset = rtl8152_pre_reset,
4430 .post_reset = rtl8152_post_reset,
4431 .supports_autosuspend = 1,
4432 .disable_hub_initiated_lpm = 1,
4435 module_usb_driver(rtl8152_driver);
4437 MODULE_AUTHOR(DRIVER_AUTHOR);
4438 MODULE_DESCRIPTION(DRIVER_DESC);
4439 MODULE_LICENSE("GPL");
4440 MODULE_VERSION(DRIVER_VERSION);