2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
30 /* Information for net-next */
31 #define NETNEXT_VERSION "08"
33 /* Information for net */
34 #define NET_VERSION "3"
36 #define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
37 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
38 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
39 #define MODULENAME "r8152"
41 #define R8152_PHY_ID 32
43 #define PLA_IDR 0xc000
44 #define PLA_RCR 0xc010
45 #define PLA_RMS 0xc016
46 #define PLA_RXFIFO_CTRL0 0xc0a0
47 #define PLA_RXFIFO_CTRL1 0xc0a4
48 #define PLA_RXFIFO_CTRL2 0xc0a8
49 #define PLA_DMY_REG0 0xc0b0
50 #define PLA_FMC 0xc0b4
51 #define PLA_CFG_WOL 0xc0b6
52 #define PLA_TEREDO_CFG 0xc0bc
53 #define PLA_MAR 0xcd00
54 #define PLA_BACKUP 0xd000
55 #define PAL_BDC_CR 0xd1a0
56 #define PLA_TEREDO_TIMER 0xd2cc
57 #define PLA_REALWOW_TIMER 0xd2e8
58 #define PLA_LEDSEL 0xdd90
59 #define PLA_LED_FEATURE 0xdd92
60 #define PLA_PHYAR 0xde00
61 #define PLA_BOOT_CTRL 0xe004
62 #define PLA_GPHY_INTR_IMR 0xe022
63 #define PLA_EEE_CR 0xe040
64 #define PLA_EEEP_CR 0xe080
65 #define PLA_MAC_PWR_CTRL 0xe0c0
66 #define PLA_MAC_PWR_CTRL2 0xe0ca
67 #define PLA_MAC_PWR_CTRL3 0xe0cc
68 #define PLA_MAC_PWR_CTRL4 0xe0ce
69 #define PLA_WDT6_CTRL 0xe428
70 #define PLA_TCR0 0xe610
71 #define PLA_TCR1 0xe612
72 #define PLA_MTPS 0xe615
73 #define PLA_TXFIFO_CTRL 0xe618
74 #define PLA_RSTTALLY 0xe800
76 #define PLA_CRWECR 0xe81c
77 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
78 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
79 #define PLA_CONFIG5 0xe822
80 #define PLA_PHY_PWR 0xe84c
81 #define PLA_OOB_CTRL 0xe84f
82 #define PLA_CPCR 0xe854
83 #define PLA_MISC_0 0xe858
84 #define PLA_MISC_1 0xe85a
85 #define PLA_OCP_GPHY_BASE 0xe86c
86 #define PLA_TALLYCNT 0xe890
87 #define PLA_SFF_STS_7 0xe8de
88 #define PLA_PHYSTATUS 0xe908
89 #define PLA_BP_BA 0xfc26
90 #define PLA_BP_0 0xfc28
91 #define PLA_BP_1 0xfc2a
92 #define PLA_BP_2 0xfc2c
93 #define PLA_BP_3 0xfc2e
94 #define PLA_BP_4 0xfc30
95 #define PLA_BP_5 0xfc32
96 #define PLA_BP_6 0xfc34
97 #define PLA_BP_7 0xfc36
98 #define PLA_BP_EN 0xfc38
100 #define USB_USB2PHY 0xb41e
101 #define USB_SSPHYLINK2 0xb428
102 #define USB_U2P3_CTRL 0xb460
103 #define USB_CSR_DUMMY1 0xb464
104 #define USB_CSR_DUMMY2 0xb466
105 #define USB_DEV_STAT 0xb808
106 #define USB_CONNECT_TIMER 0xcbf8
107 #define USB_BURST_SIZE 0xcfc0
108 #define USB_USB_CTRL 0xd406
109 #define USB_PHY_CTRL 0xd408
110 #define USB_TX_AGG 0xd40a
111 #define USB_RX_BUF_TH 0xd40c
112 #define USB_USB_TIMER 0xd428
113 #define USB_RX_EARLY_TIMEOUT 0xd42c
114 #define USB_RX_EARLY_SIZE 0xd42e
115 #define USB_PM_CTRL_STATUS 0xd432
116 #define USB_TX_DMA 0xd434
117 #define USB_TOLERANCE 0xd490
118 #define USB_LPM_CTRL 0xd41a
119 #define USB_UPS_CTRL 0xd800
120 #define USB_MISC_0 0xd81a
121 #define USB_POWER_CUT 0xd80a
122 #define USB_AFE_CTRL2 0xd824
123 #define USB_WDT11_CTRL 0xe43c
124 #define USB_BP_BA 0xfc26
125 #define USB_BP_0 0xfc28
126 #define USB_BP_1 0xfc2a
127 #define USB_BP_2 0xfc2c
128 #define USB_BP_3 0xfc2e
129 #define USB_BP_4 0xfc30
130 #define USB_BP_5 0xfc32
131 #define USB_BP_6 0xfc34
132 #define USB_BP_7 0xfc36
133 #define USB_BP_EN 0xfc38
136 #define OCP_ALDPS_CONFIG 0x2010
137 #define OCP_EEE_CONFIG1 0x2080
138 #define OCP_EEE_CONFIG2 0x2092
139 #define OCP_EEE_CONFIG3 0x2094
140 #define OCP_BASE_MII 0xa400
141 #define OCP_EEE_AR 0xa41a
142 #define OCP_EEE_DATA 0xa41c
143 #define OCP_PHY_STATUS 0xa420
144 #define OCP_POWER_CFG 0xa430
145 #define OCP_EEE_CFG 0xa432
146 #define OCP_SRAM_ADDR 0xa436
147 #define OCP_SRAM_DATA 0xa438
148 #define OCP_DOWN_SPEED 0xa442
149 #define OCP_EEE_ABLE 0xa5c4
150 #define OCP_EEE_ADV 0xa5d0
151 #define OCP_EEE_LPABLE 0xa5d2
152 #define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
153 #define OCP_ADC_CFG 0xbc06
156 #define SRAM_LPF_CFG 0x8012
157 #define SRAM_10M_AMP1 0x8080
158 #define SRAM_10M_AMP2 0x8082
159 #define SRAM_IMPEDANCE 0x8084
162 #define RCR_AAP 0x00000001
163 #define RCR_APM 0x00000002
164 #define RCR_AM 0x00000004
165 #define RCR_AB 0x00000008
166 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
168 /* PLA_RXFIFO_CTRL0 */
169 #define RXFIFO_THR1_NORMAL 0x00080002
170 #define RXFIFO_THR1_OOB 0x01800003
172 /* PLA_RXFIFO_CTRL1 */
173 #define RXFIFO_THR2_FULL 0x00000060
174 #define RXFIFO_THR2_HIGH 0x00000038
175 #define RXFIFO_THR2_OOB 0x0000004a
176 #define RXFIFO_THR2_NORMAL 0x00a0
178 /* PLA_RXFIFO_CTRL2 */
179 #define RXFIFO_THR3_FULL 0x00000078
180 #define RXFIFO_THR3_HIGH 0x00000048
181 #define RXFIFO_THR3_OOB 0x0000005a
182 #define RXFIFO_THR3_NORMAL 0x0110
184 /* PLA_TXFIFO_CTRL */
185 #define TXFIFO_THR_NORMAL 0x00400008
186 #define TXFIFO_THR_NORMAL2 0x01000008
189 #define ECM_ALDPS 0x0002
192 #define FMC_FCR_MCU_EN 0x0001
195 #define EEEP_CR_EEEP_TX 0x0002
198 #define WDT6_SET_MODE 0x0010
201 #define TCR0_TX_EMPTY 0x0800
202 #define TCR0_AUTO_FIFO 0x0080
205 #define VERSION_MASK 0x7cf0
208 #define MTPS_JUMBO (12 * 1024 / 64)
209 #define MTPS_DEFAULT (6 * 1024 / 64)
212 #define TALLY_RESET 0x0001
220 #define CRWECR_NORAML 0x00
221 #define CRWECR_CONFIG 0xc0
224 #define NOW_IS_OOB 0x80
225 #define TXFIFO_EMPTY 0x20
226 #define RXFIFO_EMPTY 0x10
227 #define LINK_LIST_READY 0x02
228 #define DIS_MCU_CLROOB 0x01
229 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
232 #define RXDY_GATED_EN 0x0008
235 #define RE_INIT_LL 0x8000
236 #define MCU_BORW_EN 0x4000
239 #define CPCR_RX_VLAN 0x0040
242 #define MAGIC_EN 0x0001
245 #define TEREDO_SEL 0x8000
246 #define TEREDO_WAKE_MASK 0x7f00
247 #define TEREDO_RS_EVENT_MASK 0x00fe
248 #define OOB_TEREDO_EN 0x0001
251 #define ALDPS_PROXY_MODE 0x0001
254 #define LINK_ON_WAKE_EN 0x0010
255 #define LINK_OFF_WAKE_EN 0x0008
258 #define BWF_EN 0x0040
259 #define MWF_EN 0x0020
260 #define UWF_EN 0x0010
261 #define LAN_WAKE_EN 0x0002
263 /* PLA_LED_FEATURE */
264 #define LED_MODE_MASK 0x0700
267 #define TX_10M_IDLE_EN 0x0080
268 #define PFM_PWM_SWITCH 0x0040
270 /* PLA_MAC_PWR_CTRL */
271 #define D3_CLK_GATED_EN 0x00004000
272 #define MCU_CLK_RATIO 0x07010f07
273 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
274 #define ALDPS_SPDWN_RATIO 0x0f87
276 /* PLA_MAC_PWR_CTRL2 */
277 #define EEE_SPDWN_RATIO 0x8007
279 /* PLA_MAC_PWR_CTRL3 */
280 #define PKT_AVAIL_SPDWN_EN 0x0100
281 #define SUSPEND_SPDWN_EN 0x0004
282 #define U1U2_SPDWN_EN 0x0002
283 #define L1_SPDWN_EN 0x0001
285 /* PLA_MAC_PWR_CTRL4 */
286 #define PWRSAVE_SPDWN_EN 0x1000
287 #define RXDV_SPDWN_EN 0x0800
288 #define TX10MIDLE_EN 0x0100
289 #define TP100_SPDWN_EN 0x0020
290 #define TP500_SPDWN_EN 0x0010
291 #define TP1000_SPDWN_EN 0x0008
292 #define EEE_SPDWN_EN 0x0001
294 /* PLA_GPHY_INTR_IMR */
295 #define GPHY_STS_MSK 0x0001
296 #define SPEED_DOWN_MSK 0x0002
297 #define SPDWN_RXDV_MSK 0x0004
298 #define SPDWN_LINKCHG_MSK 0x0008
301 #define PHYAR_FLAG 0x80000000
304 #define EEE_RX_EN 0x0001
305 #define EEE_TX_EN 0x0002
308 #define AUTOLOAD_DONE 0x0002
311 #define USB2PHY_SUSPEND 0x0001
312 #define USB2PHY_L1 0x0002
315 #define pwd_dn_scale_mask 0x3ffe
316 #define pwd_dn_scale(x) ((x) << 1)
319 #define DYNAMIC_BURST 0x0001
322 #define EP4_FULL_FC 0x0001
325 #define STAT_SPEED_MASK 0x0006
326 #define STAT_SPEED_HIGH 0x0000
327 #define STAT_SPEED_FULL 0x0002
330 #define TX_AGG_MAX_THRESHOLD 0x03
333 #define RX_THR_SUPPER 0x0c350180
334 #define RX_THR_HIGH 0x7a120180
335 #define RX_THR_SLOW 0xffff0180
338 #define TEST_MODE_DISABLE 0x00000001
339 #define TX_SIZE_ADJUST1 0x00000100
342 #define POWER_CUT 0x0100
344 /* USB_PM_CTRL_STATUS */
345 #define RESUME_INDICATE 0x0001
348 #define RX_AGG_DISABLE 0x0010
349 #define RX_ZERO_EN 0x0080
352 #define U2P3_ENABLE 0x0001
355 #define PWR_EN 0x0001
356 #define PHASE2_EN 0x0008
359 #define PCUT_STATUS 0x0001
361 /* USB_RX_EARLY_TIMEOUT */
362 #define COALESCE_SUPER 85000U
363 #define COALESCE_HIGH 250000U
364 #define COALESCE_SLOW 524280U
367 #define TIMER11_EN 0x0001
370 /* bit 4 ~ 5: fifo empty boundary */
371 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
372 /* bit 2 ~ 3: LMP timer */
373 #define LPM_TIMER_MASK 0x0c
374 #define LPM_TIMER_500MS 0x04 /* 500 ms */
375 #define LPM_TIMER_500US 0x0c /* 500 us */
376 #define ROK_EXIT_LPM 0x02
379 #define SEN_VAL_MASK 0xf800
380 #define SEN_VAL_NORMAL 0xa000
381 #define SEL_RXIDLE 0x0100
383 /* OCP_ALDPS_CONFIG */
384 #define ENPWRSAVE 0x8000
385 #define ENPDNPS 0x0200
386 #define LINKENA 0x0100
387 #define DIS_SDSAVE 0x0010
390 #define PHY_STAT_MASK 0x0007
391 #define PHY_STAT_LAN_ON 3
392 #define PHY_STAT_PWRDN 5
395 #define EEE_CLKDIV_EN 0x8000
396 #define EN_ALDPS 0x0004
397 #define EN_10M_PLLOFF 0x0001
399 /* OCP_EEE_CONFIG1 */
400 #define RG_TXLPI_MSK_HFDUP 0x8000
401 #define RG_MATCLR_EN 0x4000
402 #define EEE_10_CAP 0x2000
403 #define EEE_NWAY_EN 0x1000
404 #define TX_QUIET_EN 0x0200
405 #define RX_QUIET_EN 0x0100
406 #define sd_rise_time_mask 0x0070
407 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
408 #define RG_RXLPI_MSK_HFDUP 0x0008
409 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
411 /* OCP_EEE_CONFIG2 */
412 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
413 #define RG_DACQUIET_EN 0x0400
414 #define RG_LDVQUIET_EN 0x0200
415 #define RG_CKRSEL 0x0020
416 #define RG_EEEPRG_EN 0x0010
418 /* OCP_EEE_CONFIG3 */
419 #define fast_snr_mask 0xff80
420 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
421 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
422 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
425 /* bit[15:14] function */
426 #define FUN_ADDR 0x0000
427 #define FUN_DATA 0x4000
428 /* bit[4:0] device addr */
431 #define CTAP_SHORT_EN 0x0040
432 #define EEE10_EN 0x0010
435 #define EN_10M_BGOFF 0x0080
438 #define TXDIS_STATE 0x01
439 #define ABD_STATE 0x02
442 #define CKADSEL_L 0x0100
443 #define ADC_EN 0x0080
444 #define EN_EMI_L 0x0040
447 #define LPF_AUTO_TUNE 0x8000
450 #define GDAC_IB_UPALL 0x0008
453 #define AMP_DN 0x0200
456 #define RX_DRIVING_MASK 0x6000
458 enum rtl_register_content {
466 #define RTL8152_MAX_TX 4
467 #define RTL8152_MAX_RX 10
473 #define INTR_LINK 0x0004
475 #define RTL8152_REQT_READ 0xc0
476 #define RTL8152_REQT_WRITE 0x40
477 #define RTL8152_REQ_GET_REGS 0x05
478 #define RTL8152_REQ_SET_REGS 0x05
480 #define BYTE_EN_DWORD 0xff
481 #define BYTE_EN_WORD 0x33
482 #define BYTE_EN_BYTE 0x11
483 #define BYTE_EN_SIX_BYTES 0x3f
484 #define BYTE_EN_START_MASK 0x0f
485 #define BYTE_EN_END_MASK 0xf0
487 #define RTL8153_MAX_PACKET 9216 /* 9K */
488 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
489 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
490 #define RTL8153_RMS RTL8153_MAX_PACKET
491 #define RTL8152_TX_TIMEOUT (5 * HZ)
492 #define RTL8152_NAPI_WEIGHT 64
505 /* Define these values to match your device */
506 #define VENDOR_ID_REALTEK 0x0bda
507 #define VENDOR_ID_SAMSUNG 0x04e8
508 #define VENDOR_ID_LENOVO 0x17ef
509 #define VENDOR_ID_NVIDIA 0x0955
511 #define MCU_TYPE_PLA 0x0100
512 #define MCU_TYPE_USB 0x0000
514 struct tally_counter {
521 __le32 tx_one_collision;
522 __le32 tx_multi_collision;
532 #define RX_LEN_MASK 0x7fff
535 #define RD_UDP_CS BIT(23)
536 #define RD_TCP_CS BIT(22)
537 #define RD_IPV6_CS BIT(20)
538 #define RD_IPV4_CS BIT(19)
541 #define IPF BIT(23) /* IP checksum fail */
542 #define UDPF BIT(22) /* UDP checksum fail */
543 #define TCPF BIT(21) /* TCP checksum fail */
544 #define RX_VLAN_TAG BIT(16)
553 #define TX_FS BIT(31) /* First segment of a packet */
554 #define TX_LS BIT(30) /* Final segment of a packet */
555 #define GTSENDV4 BIT(28)
556 #define GTSENDV6 BIT(27)
557 #define GTTCPHO_SHIFT 18
558 #define GTTCPHO_MAX 0x7fU
559 #define TX_LEN_MAX 0x3ffffU
562 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
563 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
564 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
565 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
567 #define MSS_MAX 0x7ffU
568 #define TCPHO_SHIFT 17
569 #define TCPHO_MAX 0x7ffU
570 #define TX_VLAN_TAG BIT(16)
576 struct list_head list;
578 struct r8152 *context;
584 struct list_head list;
586 struct r8152 *context;
595 struct usb_device *udev;
596 struct napi_struct napi;
597 struct usb_interface *intf;
598 struct net_device *netdev;
599 struct urb *intr_urb;
600 struct tx_agg tx_info[RTL8152_MAX_TX];
601 struct rx_agg rx_info[RTL8152_MAX_RX];
602 struct list_head rx_done, tx_free;
603 struct sk_buff_head tx_queue, rx_queue;
604 spinlock_t rx_lock, tx_lock;
605 struct delayed_work schedule, hw_phy_work;
606 struct mii_if_info mii;
607 struct mutex control; /* use for hw setting */
608 #ifdef CONFIG_PM_SLEEP
609 struct notifier_block pm_notifier;
613 void (*init)(struct r8152 *);
614 int (*enable)(struct r8152 *);
615 void (*disable)(struct r8152 *);
616 void (*up)(struct r8152 *);
617 void (*down)(struct r8152 *);
618 void (*unload)(struct r8152 *);
619 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
620 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
621 bool (*in_nway)(struct r8152 *);
622 void (*hw_phy_cfg)(struct r8152 *);
652 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
653 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
655 static const int multicast_filter_limit = 32;
656 static unsigned int agg_buf_sz = 16384;
658 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
659 VLAN_ETH_HLEN - VLAN_HLEN)
662 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
667 tmp = kmalloc(size, GFP_KERNEL);
671 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
672 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
673 value, index, tmp, size, 500);
675 memcpy(data, tmp, size);
682 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
687 tmp = kmemdup(data, size, GFP_KERNEL);
691 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
692 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
693 value, index, tmp, size, 500);
700 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
701 void *data, u16 type)
706 if (test_bit(RTL8152_UNPLUG, &tp->flags))
709 /* both size and indix must be 4 bytes align */
710 if ((size & 3) || !size || (index & 3) || !data)
713 if ((u32)index + (u32)size > 0xffff)
718 ret = get_registers(tp, index, type, limit, data);
726 ret = get_registers(tp, index, type, size, data);
738 set_bit(RTL8152_UNPLUG, &tp->flags);
743 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
744 u16 size, void *data, u16 type)
747 u16 byteen_start, byteen_end, byen;
750 if (test_bit(RTL8152_UNPLUG, &tp->flags))
753 /* both size and indix must be 4 bytes align */
754 if ((size & 3) || !size || (index & 3) || !data)
757 if ((u32)index + (u32)size > 0xffff)
760 byteen_start = byteen & BYTE_EN_START_MASK;
761 byteen_end = byteen & BYTE_EN_END_MASK;
763 byen = byteen_start | (byteen_start << 4);
764 ret = set_registers(tp, index, type | byen, 4, data);
777 ret = set_registers(tp, index,
778 type | BYTE_EN_DWORD,
787 ret = set_registers(tp, index,
788 type | BYTE_EN_DWORD,
800 byen = byteen_end | (byteen_end >> 4);
801 ret = set_registers(tp, index, type | byen, 4, data);
808 set_bit(RTL8152_UNPLUG, &tp->flags);
814 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
816 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
820 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
822 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
826 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
828 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
832 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
834 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
837 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
841 generic_ocp_read(tp, index, sizeof(data), &data, type);
843 return __le32_to_cpu(data);
846 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
848 __le32 tmp = __cpu_to_le32(data);
850 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
853 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
857 u8 shift = index & 2;
861 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
863 data = __le32_to_cpu(tmp);
864 data >>= (shift * 8);
870 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
874 u16 byen = BYTE_EN_WORD;
875 u8 shift = index & 2;
881 mask <<= (shift * 8);
882 data <<= (shift * 8);
886 tmp = __cpu_to_le32(data);
888 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
891 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
895 u8 shift = index & 3;
899 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
901 data = __le32_to_cpu(tmp);
902 data >>= (shift * 8);
908 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
912 u16 byen = BYTE_EN_BYTE;
913 u8 shift = index & 3;
919 mask <<= (shift * 8);
920 data <<= (shift * 8);
924 tmp = __cpu_to_le32(data);
926 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
929 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
931 u16 ocp_base, ocp_index;
933 ocp_base = addr & 0xf000;
934 if (ocp_base != tp->ocp_base) {
935 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
936 tp->ocp_base = ocp_base;
939 ocp_index = (addr & 0x0fff) | 0xb000;
940 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
943 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
945 u16 ocp_base, ocp_index;
947 ocp_base = addr & 0xf000;
948 if (ocp_base != tp->ocp_base) {
949 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
950 tp->ocp_base = ocp_base;
953 ocp_index = (addr & 0x0fff) | 0xb000;
954 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
957 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
959 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
962 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
964 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
967 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
969 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
970 ocp_reg_write(tp, OCP_SRAM_DATA, data);
973 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
975 struct r8152 *tp = netdev_priv(netdev);
978 if (test_bit(RTL8152_UNPLUG, &tp->flags))
981 if (phy_id != R8152_PHY_ID)
984 ret = r8152_mdio_read(tp, reg);
990 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
992 struct r8152 *tp = netdev_priv(netdev);
994 if (test_bit(RTL8152_UNPLUG, &tp->flags))
997 if (phy_id != R8152_PHY_ID)
1000 r8152_mdio_write(tp, reg, val);
1004 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1006 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1008 struct r8152 *tp = netdev_priv(netdev);
1009 struct sockaddr *addr = p;
1010 int ret = -EADDRNOTAVAIL;
1012 if (!is_valid_ether_addr(addr->sa_data))
1015 ret = usb_autopm_get_interface(tp->intf);
1019 mutex_lock(&tp->control);
1021 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1023 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1024 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1025 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1027 mutex_unlock(&tp->control);
1029 usb_autopm_put_interface(tp->intf);
1034 static int set_ethernet_addr(struct r8152 *tp)
1036 struct net_device *dev = tp->netdev;
1040 if (tp->version == RTL_VER_01)
1041 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1043 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1046 netif_err(tp, probe, dev, "Get ether addr fail\n");
1047 } else if (!is_valid_ether_addr(sa.sa_data)) {
1048 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1050 eth_hw_addr_random(dev);
1051 ether_addr_copy(sa.sa_data, dev->dev_addr);
1052 ret = rtl8152_set_mac_address(dev, &sa);
1053 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1056 if (tp->version == RTL_VER_01)
1057 ether_addr_copy(dev->dev_addr, sa.sa_data);
1059 ret = rtl8152_set_mac_address(dev, &sa);
1065 static void read_bulk_callback(struct urb *urb)
1067 struct net_device *netdev;
1068 int status = urb->status;
1080 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1083 if (!test_bit(WORK_ENABLE, &tp->flags))
1086 netdev = tp->netdev;
1088 /* When link down, the driver would cancel all bulks. */
1089 /* This avoid the re-submitting bulk */
1090 if (!netif_carrier_ok(netdev))
1093 usb_mark_last_busy(tp->udev);
1097 if (urb->actual_length < ETH_ZLEN)
1100 spin_lock(&tp->rx_lock);
1101 list_add_tail(&agg->list, &tp->rx_done);
1102 spin_unlock(&tp->rx_lock);
1103 napi_schedule(&tp->napi);
1106 set_bit(RTL8152_UNPLUG, &tp->flags);
1107 netif_device_detach(tp->netdev);
1110 return; /* the urb is in unlink state */
1112 if (net_ratelimit())
1113 netdev_warn(netdev, "maybe reset is needed?\n");
1116 if (net_ratelimit())
1117 netdev_warn(netdev, "Rx status %d\n", status);
1121 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1124 static void write_bulk_callback(struct urb *urb)
1126 struct net_device_stats *stats;
1127 struct net_device *netdev;
1130 int status = urb->status;
1140 netdev = tp->netdev;
1141 stats = &netdev->stats;
1143 if (net_ratelimit())
1144 netdev_warn(netdev, "Tx status %d\n", status);
1145 stats->tx_errors += agg->skb_num;
1147 stats->tx_packets += agg->skb_num;
1148 stats->tx_bytes += agg->skb_len;
1151 spin_lock(&tp->tx_lock);
1152 list_add_tail(&agg->list, &tp->tx_free);
1153 spin_unlock(&tp->tx_lock);
1155 usb_autopm_put_interface_async(tp->intf);
1157 if (!netif_carrier_ok(netdev))
1160 if (!test_bit(WORK_ENABLE, &tp->flags))
1163 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1166 if (!skb_queue_empty(&tp->tx_queue))
1167 napi_schedule(&tp->napi);
1170 static void intr_callback(struct urb *urb)
1174 int status = urb->status;
1181 if (!test_bit(WORK_ENABLE, &tp->flags))
1184 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1188 case 0: /* success */
1190 case -ECONNRESET: /* unlink */
1192 netif_device_detach(tp->netdev);
1195 netif_info(tp, intr, tp->netdev,
1196 "Stop submitting intr, status %d\n", status);
1199 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1201 /* -EPIPE: should clear the halt */
1203 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1207 d = urb->transfer_buffer;
1208 if (INTR_LINK & __le16_to_cpu(d[0])) {
1209 if (!netif_carrier_ok(tp->netdev)) {
1210 set_bit(RTL8152_LINK_CHG, &tp->flags);
1211 schedule_delayed_work(&tp->schedule, 0);
1214 if (netif_carrier_ok(tp->netdev)) {
1215 set_bit(RTL8152_LINK_CHG, &tp->flags);
1216 schedule_delayed_work(&tp->schedule, 0);
1221 res = usb_submit_urb(urb, GFP_ATOMIC);
1222 if (res == -ENODEV) {
1223 set_bit(RTL8152_UNPLUG, &tp->flags);
1224 netif_device_detach(tp->netdev);
1226 netif_err(tp, intr, tp->netdev,
1227 "can't resubmit intr, status %d\n", res);
1231 static inline void *rx_agg_align(void *data)
1233 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1236 static inline void *tx_agg_align(void *data)
1238 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1241 static void free_all_mem(struct r8152 *tp)
1245 for (i = 0; i < RTL8152_MAX_RX; i++) {
1246 usb_free_urb(tp->rx_info[i].urb);
1247 tp->rx_info[i].urb = NULL;
1249 kfree(tp->rx_info[i].buffer);
1250 tp->rx_info[i].buffer = NULL;
1251 tp->rx_info[i].head = NULL;
1254 for (i = 0; i < RTL8152_MAX_TX; i++) {
1255 usb_free_urb(tp->tx_info[i].urb);
1256 tp->tx_info[i].urb = NULL;
1258 kfree(tp->tx_info[i].buffer);
1259 tp->tx_info[i].buffer = NULL;
1260 tp->tx_info[i].head = NULL;
1263 usb_free_urb(tp->intr_urb);
1264 tp->intr_urb = NULL;
1266 kfree(tp->intr_buff);
1267 tp->intr_buff = NULL;
1270 static int alloc_all_mem(struct r8152 *tp)
1272 struct net_device *netdev = tp->netdev;
1273 struct usb_interface *intf = tp->intf;
1274 struct usb_host_interface *alt = intf->cur_altsetting;
1275 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1280 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1282 spin_lock_init(&tp->rx_lock);
1283 spin_lock_init(&tp->tx_lock);
1284 INIT_LIST_HEAD(&tp->tx_free);
1285 skb_queue_head_init(&tp->tx_queue);
1286 skb_queue_head_init(&tp->rx_queue);
1288 for (i = 0; i < RTL8152_MAX_RX; i++) {
1289 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1293 if (buf != rx_agg_align(buf)) {
1295 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1301 urb = usb_alloc_urb(0, GFP_KERNEL);
1307 INIT_LIST_HEAD(&tp->rx_info[i].list);
1308 tp->rx_info[i].context = tp;
1309 tp->rx_info[i].urb = urb;
1310 tp->rx_info[i].buffer = buf;
1311 tp->rx_info[i].head = rx_agg_align(buf);
1314 for (i = 0; i < RTL8152_MAX_TX; i++) {
1315 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1319 if (buf != tx_agg_align(buf)) {
1321 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1327 urb = usb_alloc_urb(0, GFP_KERNEL);
1333 INIT_LIST_HEAD(&tp->tx_info[i].list);
1334 tp->tx_info[i].context = tp;
1335 tp->tx_info[i].urb = urb;
1336 tp->tx_info[i].buffer = buf;
1337 tp->tx_info[i].head = tx_agg_align(buf);
1339 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1342 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1346 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1350 tp->intr_interval = (int)ep_intr->desc.bInterval;
1351 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1352 tp->intr_buff, INTBUFSIZE, intr_callback,
1353 tp, tp->intr_interval);
1362 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1364 struct tx_agg *agg = NULL;
1365 unsigned long flags;
1367 if (list_empty(&tp->tx_free))
1370 spin_lock_irqsave(&tp->tx_lock, flags);
1371 if (!list_empty(&tp->tx_free)) {
1372 struct list_head *cursor;
1374 cursor = tp->tx_free.next;
1375 list_del_init(cursor);
1376 agg = list_entry(cursor, struct tx_agg, list);
1378 spin_unlock_irqrestore(&tp->tx_lock, flags);
1383 /* r8152_csum_workaround()
1384 * The hw limites the value the transport offset. When the offset is out of the
1385 * range, calculate the checksum by sw.
1387 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1388 struct sk_buff_head *list)
1390 if (skb_shinfo(skb)->gso_size) {
1391 netdev_features_t features = tp->netdev->features;
1392 struct sk_buff_head seg_list;
1393 struct sk_buff *segs, *nskb;
1395 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1396 segs = skb_gso_segment(skb, features);
1397 if (IS_ERR(segs) || !segs)
1400 __skb_queue_head_init(&seg_list);
1406 __skb_queue_tail(&seg_list, nskb);
1409 skb_queue_splice(&seg_list, list);
1411 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1412 if (skb_checksum_help(skb) < 0)
1415 __skb_queue_head(list, skb);
1417 struct net_device_stats *stats;
1420 stats = &tp->netdev->stats;
1421 stats->tx_dropped++;
1426 /* msdn_giant_send_check()
1427 * According to the document of microsoft, the TCP Pseudo Header excludes the
1428 * packet length for IPv6 TCP large packets.
1430 static int msdn_giant_send_check(struct sk_buff *skb)
1432 const struct ipv6hdr *ipv6h;
1436 ret = skb_cow_head(skb, 0);
1440 ipv6h = ipv6_hdr(skb);
1444 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1449 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1451 if (skb_vlan_tag_present(skb)) {
1454 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1455 desc->opts2 |= cpu_to_le32(opts2);
1459 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1461 u32 opts2 = le32_to_cpu(desc->opts2);
1463 if (opts2 & RX_VLAN_TAG)
1464 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1465 swab16(opts2 & 0xffff));
1468 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1469 struct sk_buff *skb, u32 len, u32 transport_offset)
1471 u32 mss = skb_shinfo(skb)->gso_size;
1472 u32 opts1, opts2 = 0;
1473 int ret = TX_CSUM_SUCCESS;
1475 WARN_ON_ONCE(len > TX_LEN_MAX);
1477 opts1 = len | TX_FS | TX_LS;
1480 if (transport_offset > GTTCPHO_MAX) {
1481 netif_warn(tp, tx_err, tp->netdev,
1482 "Invalid transport offset 0x%x for TSO\n",
1488 switch (vlan_get_protocol(skb)) {
1489 case htons(ETH_P_IP):
1493 case htons(ETH_P_IPV6):
1494 if (msdn_giant_send_check(skb)) {
1506 opts1 |= transport_offset << GTTCPHO_SHIFT;
1507 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1508 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1511 if (transport_offset > TCPHO_MAX) {
1512 netif_warn(tp, tx_err, tp->netdev,
1513 "Invalid transport offset 0x%x\n",
1519 switch (vlan_get_protocol(skb)) {
1520 case htons(ETH_P_IP):
1522 ip_protocol = ip_hdr(skb)->protocol;
1525 case htons(ETH_P_IPV6):
1527 ip_protocol = ipv6_hdr(skb)->nexthdr;
1531 ip_protocol = IPPROTO_RAW;
1535 if (ip_protocol == IPPROTO_TCP)
1537 else if (ip_protocol == IPPROTO_UDP)
1542 opts2 |= transport_offset << TCPHO_SHIFT;
1545 desc->opts2 = cpu_to_le32(opts2);
1546 desc->opts1 = cpu_to_le32(opts1);
1552 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1554 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1558 __skb_queue_head_init(&skb_head);
1559 spin_lock(&tx_queue->lock);
1560 skb_queue_splice_init(tx_queue, &skb_head);
1561 spin_unlock(&tx_queue->lock);
1563 tx_data = agg->head;
1566 remain = agg_buf_sz;
1568 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1569 struct tx_desc *tx_desc;
1570 struct sk_buff *skb;
1574 skb = __skb_dequeue(&skb_head);
1578 len = skb->len + sizeof(*tx_desc);
1581 __skb_queue_head(&skb_head, skb);
1585 tx_data = tx_agg_align(tx_data);
1586 tx_desc = (struct tx_desc *)tx_data;
1588 offset = (u32)skb_transport_offset(skb);
1590 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1591 r8152_csum_workaround(tp, skb, &skb_head);
1595 rtl_tx_vlan_tag(tx_desc, skb);
1597 tx_data += sizeof(*tx_desc);
1600 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1601 struct net_device_stats *stats = &tp->netdev->stats;
1603 stats->tx_dropped++;
1604 dev_kfree_skb_any(skb);
1605 tx_data -= sizeof(*tx_desc);
1610 agg->skb_len += len;
1613 dev_kfree_skb_any(skb);
1615 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1618 if (!skb_queue_empty(&skb_head)) {
1619 spin_lock(&tx_queue->lock);
1620 skb_queue_splice(&skb_head, tx_queue);
1621 spin_unlock(&tx_queue->lock);
1624 netif_tx_lock(tp->netdev);
1626 if (netif_queue_stopped(tp->netdev) &&
1627 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1628 netif_wake_queue(tp->netdev);
1630 netif_tx_unlock(tp->netdev);
1632 ret = usb_autopm_get_interface_async(tp->intf);
1636 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1637 agg->head, (int)(tx_data - (u8 *)agg->head),
1638 (usb_complete_t)write_bulk_callback, agg);
1640 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1642 usb_autopm_put_interface_async(tp->intf);
1648 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1650 u8 checksum = CHECKSUM_NONE;
1653 if (tp->version == RTL_VER_01)
1656 opts2 = le32_to_cpu(rx_desc->opts2);
1657 opts3 = le32_to_cpu(rx_desc->opts3);
1659 if (opts2 & RD_IPV4_CS) {
1661 checksum = CHECKSUM_NONE;
1662 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1663 checksum = CHECKSUM_NONE;
1664 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1665 checksum = CHECKSUM_NONE;
1667 checksum = CHECKSUM_UNNECESSARY;
1668 } else if (RD_IPV6_CS) {
1669 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1670 checksum = CHECKSUM_UNNECESSARY;
1671 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1672 checksum = CHECKSUM_UNNECESSARY;
1679 static int rx_bottom(struct r8152 *tp, int budget)
1681 unsigned long flags;
1682 struct list_head *cursor, *next, rx_queue;
1683 int ret = 0, work_done = 0;
1685 if (!skb_queue_empty(&tp->rx_queue)) {
1686 while (work_done < budget) {
1687 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1688 struct net_device *netdev = tp->netdev;
1689 struct net_device_stats *stats = &netdev->stats;
1690 unsigned int pkt_len;
1696 napi_gro_receive(&tp->napi, skb);
1698 stats->rx_packets++;
1699 stats->rx_bytes += pkt_len;
1703 if (list_empty(&tp->rx_done))
1706 INIT_LIST_HEAD(&rx_queue);
1707 spin_lock_irqsave(&tp->rx_lock, flags);
1708 list_splice_init(&tp->rx_done, &rx_queue);
1709 spin_unlock_irqrestore(&tp->rx_lock, flags);
1711 list_for_each_safe(cursor, next, &rx_queue) {
1712 struct rx_desc *rx_desc;
1718 list_del_init(cursor);
1720 agg = list_entry(cursor, struct rx_agg, list);
1722 if (urb->actual_length < ETH_ZLEN)
1725 rx_desc = agg->head;
1726 rx_data = agg->head;
1727 len_used += sizeof(struct rx_desc);
1729 while (urb->actual_length > len_used) {
1730 struct net_device *netdev = tp->netdev;
1731 struct net_device_stats *stats = &netdev->stats;
1732 unsigned int pkt_len;
1733 struct sk_buff *skb;
1735 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1736 if (pkt_len < ETH_ZLEN)
1739 len_used += pkt_len;
1740 if (urb->actual_length < len_used)
1743 pkt_len -= CRC_SIZE;
1744 rx_data += sizeof(struct rx_desc);
1746 skb = napi_alloc_skb(&tp->napi, pkt_len);
1748 stats->rx_dropped++;
1752 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1753 memcpy(skb->data, rx_data, pkt_len);
1754 skb_put(skb, pkt_len);
1755 skb->protocol = eth_type_trans(skb, netdev);
1756 rtl_rx_vlan_tag(rx_desc, skb);
1757 if (work_done < budget) {
1758 napi_gro_receive(&tp->napi, skb);
1760 stats->rx_packets++;
1761 stats->rx_bytes += pkt_len;
1763 __skb_queue_tail(&tp->rx_queue, skb);
1767 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1768 rx_desc = (struct rx_desc *)rx_data;
1769 len_used = (int)(rx_data - (u8 *)agg->head);
1770 len_used += sizeof(struct rx_desc);
1775 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1777 urb->actual_length = 0;
1778 list_add_tail(&agg->list, next);
1782 if (!list_empty(&rx_queue)) {
1783 spin_lock_irqsave(&tp->rx_lock, flags);
1784 list_splice_tail(&rx_queue, &tp->rx_done);
1785 spin_unlock_irqrestore(&tp->rx_lock, flags);
1792 static void tx_bottom(struct r8152 *tp)
1799 if (skb_queue_empty(&tp->tx_queue))
1802 agg = r8152_get_tx_agg(tp);
1806 res = r8152_tx_agg_fill(tp, agg);
1808 struct net_device *netdev = tp->netdev;
1810 if (res == -ENODEV) {
1811 set_bit(RTL8152_UNPLUG, &tp->flags);
1812 netif_device_detach(netdev);
1814 struct net_device_stats *stats = &netdev->stats;
1815 unsigned long flags;
1817 netif_warn(tp, tx_err, netdev,
1818 "failed tx_urb %d\n", res);
1819 stats->tx_dropped += agg->skb_num;
1821 spin_lock_irqsave(&tp->tx_lock, flags);
1822 list_add_tail(&agg->list, &tp->tx_free);
1823 spin_unlock_irqrestore(&tp->tx_lock, flags);
1829 static void bottom_half(struct r8152 *tp)
1831 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1834 if (!test_bit(WORK_ENABLE, &tp->flags))
1837 /* When link down, the driver would cancel all bulks. */
1838 /* This avoid the re-submitting bulk */
1839 if (!netif_carrier_ok(tp->netdev))
1842 clear_bit(SCHEDULE_NAPI, &tp->flags);
1847 static int r8152_poll(struct napi_struct *napi, int budget)
1849 struct r8152 *tp = container_of(napi, struct r8152, napi);
1852 work_done = rx_bottom(tp, budget);
1855 if (work_done < budget) {
1856 napi_complete(napi);
1857 if (!list_empty(&tp->rx_done))
1858 napi_schedule(napi);
1865 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1869 /* The rx would be stopped, so skip submitting */
1870 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1871 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1874 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1875 agg->head, agg_buf_sz,
1876 (usb_complete_t)read_bulk_callback, agg);
1878 ret = usb_submit_urb(agg->urb, mem_flags);
1879 if (ret == -ENODEV) {
1880 set_bit(RTL8152_UNPLUG, &tp->flags);
1881 netif_device_detach(tp->netdev);
1883 struct urb *urb = agg->urb;
1884 unsigned long flags;
1886 urb->actual_length = 0;
1887 spin_lock_irqsave(&tp->rx_lock, flags);
1888 list_add_tail(&agg->list, &tp->rx_done);
1889 spin_unlock_irqrestore(&tp->rx_lock, flags);
1891 netif_err(tp, rx_err, tp->netdev,
1892 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1894 napi_schedule(&tp->napi);
1900 static void rtl_drop_queued_tx(struct r8152 *tp)
1902 struct net_device_stats *stats = &tp->netdev->stats;
1903 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1904 struct sk_buff *skb;
1906 if (skb_queue_empty(tx_queue))
1909 __skb_queue_head_init(&skb_head);
1910 spin_lock_bh(&tx_queue->lock);
1911 skb_queue_splice_init(tx_queue, &skb_head);
1912 spin_unlock_bh(&tx_queue->lock);
1914 while ((skb = __skb_dequeue(&skb_head))) {
1916 stats->tx_dropped++;
1920 static void rtl8152_tx_timeout(struct net_device *netdev)
1922 struct r8152 *tp = netdev_priv(netdev);
1924 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1926 usb_queue_reset_device(tp->intf);
1929 static void rtl8152_set_rx_mode(struct net_device *netdev)
1931 struct r8152 *tp = netdev_priv(netdev);
1933 if (netif_carrier_ok(netdev)) {
1934 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1935 schedule_delayed_work(&tp->schedule, 0);
1939 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1941 struct r8152 *tp = netdev_priv(netdev);
1942 u32 mc_filter[2]; /* Multicast hash filter */
1946 netif_stop_queue(netdev);
1947 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1948 ocp_data &= ~RCR_ACPT_ALL;
1949 ocp_data |= RCR_AB | RCR_APM;
1951 if (netdev->flags & IFF_PROMISC) {
1952 /* Unconditionally log net taps. */
1953 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1954 ocp_data |= RCR_AM | RCR_AAP;
1955 mc_filter[1] = 0xffffffff;
1956 mc_filter[0] = 0xffffffff;
1957 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1958 (netdev->flags & IFF_ALLMULTI)) {
1959 /* Too many to filter perfectly -- accept all multicasts. */
1961 mc_filter[1] = 0xffffffff;
1962 mc_filter[0] = 0xffffffff;
1964 struct netdev_hw_addr *ha;
1968 netdev_for_each_mc_addr(ha, netdev) {
1969 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1971 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1976 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1977 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1979 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1980 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1981 netif_wake_queue(netdev);
1984 static netdev_features_t
1985 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1986 netdev_features_t features)
1988 u32 mss = skb_shinfo(skb)->gso_size;
1989 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1990 int offset = skb_transport_offset(skb);
1992 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1993 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
1994 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
1995 features &= ~NETIF_F_GSO_MASK;
2000 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2001 struct net_device *netdev)
2003 struct r8152 *tp = netdev_priv(netdev);
2005 skb_tx_timestamp(skb);
2007 skb_queue_tail(&tp->tx_queue, skb);
2009 if (!list_empty(&tp->tx_free)) {
2010 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2011 set_bit(SCHEDULE_NAPI, &tp->flags);
2012 schedule_delayed_work(&tp->schedule, 0);
2014 usb_mark_last_busy(tp->udev);
2015 napi_schedule(&tp->napi);
2017 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2018 netif_stop_queue(netdev);
2021 return NETDEV_TX_OK;
2024 static void r8152b_reset_packet_filter(struct r8152 *tp)
2028 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2029 ocp_data &= ~FMC_FCR_MCU_EN;
2030 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2031 ocp_data |= FMC_FCR_MCU_EN;
2032 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2035 static void rtl8152_nic_reset(struct r8152 *tp)
2039 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2041 for (i = 0; i < 1000; i++) {
2042 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2044 usleep_range(100, 400);
2048 static void set_tx_qlen(struct r8152 *tp)
2050 struct net_device *netdev = tp->netdev;
2052 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2053 sizeof(struct tx_desc));
2056 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2058 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2061 static void rtl_set_eee_plus(struct r8152 *tp)
2066 speed = rtl8152_get_speed(tp);
2067 if (speed & _10bps) {
2068 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2069 ocp_data |= EEEP_CR_EEEP_TX;
2070 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2072 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2073 ocp_data &= ~EEEP_CR_EEEP_TX;
2074 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2078 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2082 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2084 ocp_data |= RXDY_GATED_EN;
2086 ocp_data &= ~RXDY_GATED_EN;
2087 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2090 static int rtl_start_rx(struct r8152 *tp)
2094 INIT_LIST_HEAD(&tp->rx_done);
2095 for (i = 0; i < RTL8152_MAX_RX; i++) {
2096 INIT_LIST_HEAD(&tp->rx_info[i].list);
2097 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2102 if (ret && ++i < RTL8152_MAX_RX) {
2103 struct list_head rx_queue;
2104 unsigned long flags;
2106 INIT_LIST_HEAD(&rx_queue);
2109 struct rx_agg *agg = &tp->rx_info[i++];
2110 struct urb *urb = agg->urb;
2112 urb->actual_length = 0;
2113 list_add_tail(&agg->list, &rx_queue);
2114 } while (i < RTL8152_MAX_RX);
2116 spin_lock_irqsave(&tp->rx_lock, flags);
2117 list_splice_tail(&rx_queue, &tp->rx_done);
2118 spin_unlock_irqrestore(&tp->rx_lock, flags);
2124 static int rtl_stop_rx(struct r8152 *tp)
2128 for (i = 0; i < RTL8152_MAX_RX; i++)
2129 usb_kill_urb(tp->rx_info[i].urb);
2131 while (!skb_queue_empty(&tp->rx_queue))
2132 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2137 static int rtl_enable(struct r8152 *tp)
2141 r8152b_reset_packet_filter(tp);
2143 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2144 ocp_data |= CR_RE | CR_TE;
2145 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2147 rxdy_gated_en(tp, false);
2152 static int rtl8152_enable(struct r8152 *tp)
2154 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2158 rtl_set_eee_plus(tp);
2160 return rtl_enable(tp);
2163 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2165 u32 ocp_data = tp->coalesce / 8;
2167 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2170 static void r8153_set_rx_early_size(struct r8152 *tp)
2172 u32 mtu = tp->netdev->mtu;
2173 u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
2175 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2178 static int rtl8153_enable(struct r8152 *tp)
2180 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2183 usb_disable_lpm(tp->udev);
2185 rtl_set_eee_plus(tp);
2186 r8153_set_rx_early_timeout(tp);
2187 r8153_set_rx_early_size(tp);
2189 return rtl_enable(tp);
2192 static void rtl_disable(struct r8152 *tp)
2197 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2198 rtl_drop_queued_tx(tp);
2202 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2203 ocp_data &= ~RCR_ACPT_ALL;
2204 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2206 rtl_drop_queued_tx(tp);
2208 for (i = 0; i < RTL8152_MAX_TX; i++)
2209 usb_kill_urb(tp->tx_info[i].urb);
2211 rxdy_gated_en(tp, true);
2213 for (i = 0; i < 1000; i++) {
2214 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2215 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2217 usleep_range(1000, 2000);
2220 for (i = 0; i < 1000; i++) {
2221 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2223 usleep_range(1000, 2000);
2228 rtl8152_nic_reset(tp);
2231 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2235 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2237 ocp_data |= POWER_CUT;
2239 ocp_data &= ~POWER_CUT;
2240 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2242 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2243 ocp_data &= ~RESUME_INDICATE;
2244 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2247 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2251 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2253 ocp_data |= CPCR_RX_VLAN;
2255 ocp_data &= ~CPCR_RX_VLAN;
2256 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2259 static int rtl8152_set_features(struct net_device *dev,
2260 netdev_features_t features)
2262 netdev_features_t changed = features ^ dev->features;
2263 struct r8152 *tp = netdev_priv(dev);
2266 ret = usb_autopm_get_interface(tp->intf);
2270 mutex_lock(&tp->control);
2272 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2273 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2274 rtl_rx_vlan_en(tp, true);
2276 rtl_rx_vlan_en(tp, false);
2279 mutex_unlock(&tp->control);
2281 usb_autopm_put_interface(tp->intf);
2287 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2289 static u32 __rtl_get_wol(struct r8152 *tp)
2294 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2295 if (!(ocp_data & LAN_WAKE_EN))
2298 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2299 if (ocp_data & LINK_ON_WAKE_EN)
2300 wolopts |= WAKE_PHY;
2302 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2303 if (ocp_data & UWF_EN)
2304 wolopts |= WAKE_UCAST;
2305 if (ocp_data & BWF_EN)
2306 wolopts |= WAKE_BCAST;
2307 if (ocp_data & MWF_EN)
2308 wolopts |= WAKE_MCAST;
2310 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2311 if (ocp_data & MAGIC_EN)
2312 wolopts |= WAKE_MAGIC;
2317 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2321 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2323 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2324 ocp_data &= ~LINK_ON_WAKE_EN;
2325 if (wolopts & WAKE_PHY)
2326 ocp_data |= LINK_ON_WAKE_EN;
2327 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2329 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2330 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2331 if (wolopts & WAKE_UCAST)
2333 if (wolopts & WAKE_BCAST)
2335 if (wolopts & WAKE_MCAST)
2337 if (wolopts & WAKE_ANY)
2338 ocp_data |= LAN_WAKE_EN;
2339 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2341 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2343 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2344 ocp_data &= ~MAGIC_EN;
2345 if (wolopts & WAKE_MAGIC)
2346 ocp_data |= MAGIC_EN;
2347 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2349 if (wolopts & WAKE_ANY)
2350 device_set_wakeup_enable(&tp->udev->dev, true);
2352 device_set_wakeup_enable(&tp->udev->dev, false);
2355 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2360 memset(u1u2, 0xff, sizeof(u1u2));
2362 memset(u1u2, 0x00, sizeof(u1u2));
2364 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2367 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2371 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2372 if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2373 ocp_data |= U2P3_ENABLE;
2375 ocp_data &= ~U2P3_ENABLE;
2376 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2379 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2383 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2385 ocp_data |= PWR_EN | PHASE2_EN;
2387 ocp_data &= ~(PWR_EN | PHASE2_EN);
2388 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2390 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2391 ocp_data &= ~PCUT_STATUS;
2392 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2395 static bool rtl_can_wakeup(struct r8152 *tp)
2397 struct usb_device *udev = tp->udev;
2399 return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2402 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2407 r8153_u1u2en(tp, false);
2408 r8153_u2p3en(tp, false);
2410 __rtl_set_wol(tp, WAKE_ANY);
2412 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2414 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2415 ocp_data |= LINK_OFF_WAKE_EN;
2416 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2418 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2420 __rtl_set_wol(tp, tp->saved_wolopts);
2421 r8153_u2p3en(tp, true);
2422 r8153_u1u2en(tp, true);
2426 static void rtl_phy_reset(struct r8152 *tp)
2431 data = r8152_mdio_read(tp, MII_BMCR);
2433 /* don't reset again before the previous one complete */
2434 if (data & BMCR_RESET)
2438 r8152_mdio_write(tp, MII_BMCR, data);
2440 for (i = 0; i < 50; i++) {
2442 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2447 static void r8153_teredo_off(struct r8152 *tp)
2451 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2452 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2453 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2455 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2456 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2457 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2460 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2463 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2464 LINKENA | DIS_SDSAVE);
2466 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2472 static void rtl8152_disable(struct r8152 *tp)
2474 r8152_aldps_en(tp, false);
2476 r8152_aldps_en(tp, true);
2479 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2483 data = r8152_mdio_read(tp, MII_BMCR);
2484 if (data & BMCR_PDOWN) {
2485 data &= ~BMCR_PDOWN;
2486 r8152_mdio_write(tp, MII_BMCR, data);
2489 set_bit(PHY_RESET, &tp->flags);
2492 static void r8152b_exit_oob(struct r8152 *tp)
2497 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2498 ocp_data &= ~RCR_ACPT_ALL;
2499 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2501 rxdy_gated_en(tp, true);
2502 r8153_teredo_off(tp);
2503 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2504 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2506 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2507 ocp_data &= ~NOW_IS_OOB;
2508 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2510 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2511 ocp_data &= ~MCU_BORW_EN;
2512 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2514 for (i = 0; i < 1000; i++) {
2515 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2516 if (ocp_data & LINK_LIST_READY)
2518 usleep_range(1000, 2000);
2521 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2522 ocp_data |= RE_INIT_LL;
2523 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2525 for (i = 0; i < 1000; i++) {
2526 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2527 if (ocp_data & LINK_LIST_READY)
2529 usleep_range(1000, 2000);
2532 rtl8152_nic_reset(tp);
2534 /* rx share fifo credit full threshold */
2535 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2537 if (tp->udev->speed == USB_SPEED_FULL ||
2538 tp->udev->speed == USB_SPEED_LOW) {
2539 /* rx share fifo credit near full threshold */
2540 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2542 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2545 /* rx share fifo credit near full threshold */
2546 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2548 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2552 /* TX share fifo free credit full threshold */
2553 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2555 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2556 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2557 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2558 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2560 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2562 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2564 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2565 ocp_data |= TCR0_AUTO_FIFO;
2566 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2569 static void r8152b_enter_oob(struct r8152 *tp)
2574 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2575 ocp_data &= ~NOW_IS_OOB;
2576 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2578 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2579 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2580 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2584 for (i = 0; i < 1000; i++) {
2585 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2586 if (ocp_data & LINK_LIST_READY)
2588 usleep_range(1000, 2000);
2591 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2592 ocp_data |= RE_INIT_LL;
2593 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2595 for (i = 0; i < 1000; i++) {
2596 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2597 if (ocp_data & LINK_LIST_READY)
2599 usleep_range(1000, 2000);
2602 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2604 rtl_rx_vlan_en(tp, true);
2606 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2607 ocp_data |= ALDPS_PROXY_MODE;
2608 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2610 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2611 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2612 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2614 rxdy_gated_en(tp, false);
2616 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2617 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2618 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2621 static void r8153_hw_phy_cfg(struct r8152 *tp)
2626 if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
2627 tp->version == RTL_VER_05)
2628 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2630 data = r8152_mdio_read(tp, MII_BMCR);
2631 if (data & BMCR_PDOWN) {
2632 data &= ~BMCR_PDOWN;
2633 r8152_mdio_write(tp, MII_BMCR, data);
2636 if (tp->version == RTL_VER_03) {
2637 data = ocp_reg_read(tp, OCP_EEE_CFG);
2638 data &= ~CTAP_SHORT_EN;
2639 ocp_reg_write(tp, OCP_EEE_CFG, data);
2642 data = ocp_reg_read(tp, OCP_POWER_CFG);
2643 data |= EEE_CLKDIV_EN;
2644 ocp_reg_write(tp, OCP_POWER_CFG, data);
2646 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2647 data |= EN_10M_BGOFF;
2648 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2649 data = ocp_reg_read(tp, OCP_POWER_CFG);
2650 data |= EN_10M_PLLOFF;
2651 ocp_reg_write(tp, OCP_POWER_CFG, data);
2652 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2654 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2655 ocp_data |= PFM_PWM_SWITCH;
2656 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2658 /* Enable LPF corner auto tune */
2659 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2661 /* Adjust 10M Amplitude */
2662 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2663 sram_write(tp, SRAM_10M_AMP2, 0x0208);
2665 set_bit(PHY_RESET, &tp->flags);
2668 static void r8153_first_init(struct r8152 *tp)
2673 rxdy_gated_en(tp, true);
2674 r8153_teredo_off(tp);
2676 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2677 ocp_data &= ~RCR_ACPT_ALL;
2678 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2680 rtl8152_nic_reset(tp);
2682 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2683 ocp_data &= ~NOW_IS_OOB;
2684 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2686 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2687 ocp_data &= ~MCU_BORW_EN;
2688 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2690 for (i = 0; i < 1000; i++) {
2691 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2692 if (ocp_data & LINK_LIST_READY)
2694 usleep_range(1000, 2000);
2697 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2698 ocp_data |= RE_INIT_LL;
2699 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2701 for (i = 0; i < 1000; i++) {
2702 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2703 if (ocp_data & LINK_LIST_READY)
2705 usleep_range(1000, 2000);
2708 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2710 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2711 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2713 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2714 ocp_data |= TCR0_AUTO_FIFO;
2715 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2717 rtl8152_nic_reset(tp);
2719 /* rx share fifo credit full threshold */
2720 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2721 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2722 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2723 /* TX share fifo free credit full threshold */
2724 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2726 /* rx aggregation */
2727 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2728 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2729 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2732 static void r8153_enter_oob(struct r8152 *tp)
2737 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2738 ocp_data &= ~NOW_IS_OOB;
2739 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2743 for (i = 0; i < 1000; i++) {
2744 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2745 if (ocp_data & LINK_LIST_READY)
2747 usleep_range(1000, 2000);
2750 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2751 ocp_data |= RE_INIT_LL;
2752 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2754 for (i = 0; i < 1000; i++) {
2755 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2756 if (ocp_data & LINK_LIST_READY)
2758 usleep_range(1000, 2000);
2761 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2763 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2764 ocp_data &= ~TEREDO_WAKE_MASK;
2765 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2767 rtl_rx_vlan_en(tp, true);
2769 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2770 ocp_data |= ALDPS_PROXY_MODE;
2771 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2773 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2774 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2775 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2777 rxdy_gated_en(tp, false);
2779 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2780 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2781 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2784 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2788 data = ocp_reg_read(tp, OCP_POWER_CFG);
2791 ocp_reg_write(tp, OCP_POWER_CFG, data);
2794 ocp_reg_write(tp, OCP_POWER_CFG, data);
2799 static void rtl8153_disable(struct r8152 *tp)
2801 r8153_aldps_en(tp, false);
2803 r8153_aldps_en(tp, true);
2804 usb_enable_lpm(tp->udev);
2807 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2809 u16 bmcr, anar, gbcr;
2812 cancel_delayed_work_sync(&tp->schedule);
2813 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2814 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2815 ADVERTISE_100HALF | ADVERTISE_100FULL);
2816 if (tp->mii.supports_gmii) {
2817 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2818 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2823 if (autoneg == AUTONEG_DISABLE) {
2824 if (speed == SPEED_10) {
2826 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2827 } else if (speed == SPEED_100) {
2828 bmcr = BMCR_SPEED100;
2829 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2830 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2831 bmcr = BMCR_SPEED1000;
2832 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2838 if (duplex == DUPLEX_FULL)
2839 bmcr |= BMCR_FULLDPLX;
2841 if (speed == SPEED_10) {
2842 if (duplex == DUPLEX_FULL)
2843 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2845 anar |= ADVERTISE_10HALF;
2846 } else if (speed == SPEED_100) {
2847 if (duplex == DUPLEX_FULL) {
2848 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2849 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2851 anar |= ADVERTISE_10HALF;
2852 anar |= ADVERTISE_100HALF;
2854 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2855 if (duplex == DUPLEX_FULL) {
2856 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2857 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2858 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2860 anar |= ADVERTISE_10HALF;
2861 anar |= ADVERTISE_100HALF;
2862 gbcr |= ADVERTISE_1000HALF;
2869 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2872 if (test_bit(PHY_RESET, &tp->flags))
2875 if (tp->mii.supports_gmii)
2876 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2878 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2879 r8152_mdio_write(tp, MII_BMCR, bmcr);
2881 if (test_and_clear_bit(PHY_RESET, &tp->flags)) {
2884 for (i = 0; i < 50; i++) {
2886 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2895 static void rtl8152_up(struct r8152 *tp)
2897 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2900 r8152_aldps_en(tp, false);
2901 r8152b_exit_oob(tp);
2902 r8152_aldps_en(tp, true);
2905 static void rtl8152_down(struct r8152 *tp)
2907 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2908 rtl_drop_queued_tx(tp);
2912 r8152_power_cut_en(tp, false);
2913 r8152_aldps_en(tp, false);
2914 r8152b_enter_oob(tp);
2915 r8152_aldps_en(tp, true);
2918 static void rtl8153_up(struct r8152 *tp)
2920 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2923 r8153_u1u2en(tp, false);
2924 r8153_aldps_en(tp, false);
2925 r8153_first_init(tp);
2926 r8153_aldps_en(tp, true);
2927 r8153_u2p3en(tp, true);
2928 r8153_u1u2en(tp, true);
2929 usb_enable_lpm(tp->udev);
2932 static void rtl8153_down(struct r8152 *tp)
2934 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2935 rtl_drop_queued_tx(tp);
2939 r8153_u1u2en(tp, false);
2940 r8153_u2p3en(tp, false);
2941 r8153_power_cut_en(tp, false);
2942 r8153_aldps_en(tp, false);
2943 r8153_enter_oob(tp);
2944 r8153_aldps_en(tp, true);
2947 static bool rtl8152_in_nway(struct r8152 *tp)
2951 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
2952 tp->ocp_base = 0x2000;
2953 ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c); /* phy state */
2954 nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
2956 /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
2957 if (nway_state & 0xc000)
2963 static bool rtl8153_in_nway(struct r8152 *tp)
2965 u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
2967 if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
2973 static void set_carrier(struct r8152 *tp)
2975 struct net_device *netdev = tp->netdev;
2978 speed = rtl8152_get_speed(tp);
2980 if (speed & LINK_STATUS) {
2981 if (!netif_carrier_ok(netdev)) {
2982 tp->rtl_ops.enable(tp);
2983 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2984 napi_disable(&tp->napi);
2985 netif_carrier_on(netdev);
2987 napi_enable(&tp->napi);
2990 if (netif_carrier_ok(netdev)) {
2991 netif_carrier_off(netdev);
2992 napi_disable(&tp->napi);
2993 tp->rtl_ops.disable(tp);
2994 napi_enable(&tp->napi);
2999 static void rtl_work_func_t(struct work_struct *work)
3001 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3003 /* If the device is unplugged or !netif_running(), the workqueue
3004 * doesn't need to wake the device, and could return directly.
3006 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3009 if (usb_autopm_get_interface(tp->intf) < 0)
3012 if (!test_bit(WORK_ENABLE, &tp->flags))
3015 if (!mutex_trylock(&tp->control)) {
3016 schedule_delayed_work(&tp->schedule, 0);
3020 if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3023 if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3024 _rtl8152_set_rx_mode(tp->netdev);
3026 /* don't schedule napi before linking */
3027 if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3028 netif_carrier_ok(tp->netdev))
3029 napi_schedule(&tp->napi);
3031 if (test_and_clear_bit(PHY_RESET, &tp->flags))
3034 mutex_unlock(&tp->control);
3037 usb_autopm_put_interface(tp->intf);
3040 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3042 struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3044 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3047 if (usb_autopm_get_interface(tp->intf) < 0)
3050 mutex_lock(&tp->control);
3052 tp->rtl_ops.hw_phy_cfg(tp);
3054 mutex_unlock(&tp->control);
3056 usb_autopm_put_interface(tp->intf);
3059 #ifdef CONFIG_PM_SLEEP
3060 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3063 struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3066 case PM_HIBERNATION_PREPARE:
3067 case PM_SUSPEND_PREPARE:
3068 usb_autopm_get_interface(tp->intf);
3071 case PM_POST_HIBERNATION:
3072 case PM_POST_SUSPEND:
3073 usb_autopm_put_interface(tp->intf);
3076 case PM_POST_RESTORE:
3077 case PM_RESTORE_PREPARE:
3086 static int rtl8152_open(struct net_device *netdev)
3088 struct r8152 *tp = netdev_priv(netdev);
3091 res = alloc_all_mem(tp);
3095 netif_carrier_off(netdev);
3097 res = usb_autopm_get_interface(tp->intf);
3103 mutex_lock(&tp->control);
3107 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3108 tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3110 netif_carrier_off(netdev);
3111 netif_start_queue(netdev);
3112 set_bit(WORK_ENABLE, &tp->flags);
3114 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3117 netif_device_detach(tp->netdev);
3118 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3122 napi_enable(&tp->napi);
3125 mutex_unlock(&tp->control);
3127 usb_autopm_put_interface(tp->intf);
3128 #ifdef CONFIG_PM_SLEEP
3129 tp->pm_notifier.notifier_call = rtl_notifier;
3130 register_pm_notifier(&tp->pm_notifier);
3137 static int rtl8152_close(struct net_device *netdev)
3139 struct r8152 *tp = netdev_priv(netdev);
3142 #ifdef CONFIG_PM_SLEEP
3143 unregister_pm_notifier(&tp->pm_notifier);
3145 napi_disable(&tp->napi);
3146 clear_bit(WORK_ENABLE, &tp->flags);
3147 usb_kill_urb(tp->intr_urb);
3148 cancel_delayed_work_sync(&tp->schedule);
3149 netif_stop_queue(netdev);
3151 res = usb_autopm_get_interface(tp->intf);
3152 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3153 rtl_drop_queued_tx(tp);
3156 mutex_lock(&tp->control);
3158 tp->rtl_ops.down(tp);
3160 mutex_unlock(&tp->control);
3162 usb_autopm_put_interface(tp->intf);
3170 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3172 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3173 ocp_reg_write(tp, OCP_EEE_DATA, reg);
3174 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3177 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3181 r8152_mmd_indirect(tp, dev, reg);
3182 data = ocp_reg_read(tp, OCP_EEE_DATA);
3183 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3188 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3190 r8152_mmd_indirect(tp, dev, reg);
3191 ocp_reg_write(tp, OCP_EEE_DATA, data);
3192 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3195 static void r8152_eee_en(struct r8152 *tp, bool enable)
3197 u16 config1, config2, config3;
3200 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3201 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3202 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3203 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3206 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3207 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3208 config1 |= sd_rise_time(1);
3209 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3210 config3 |= fast_snr(42);
3212 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3213 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3215 config1 |= sd_rise_time(7);
3216 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3217 config3 |= fast_snr(511);
3220 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3221 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3222 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3223 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3226 static void r8152b_enable_eee(struct r8152 *tp)
3228 r8152_eee_en(tp, true);
3229 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3232 static void r8153_eee_en(struct r8152 *tp, bool enable)
3237 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3238 config = ocp_reg_read(tp, OCP_EEE_CFG);
3241 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3244 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3245 config &= ~EEE10_EN;
3248 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3249 ocp_reg_write(tp, OCP_EEE_CFG, config);
3252 static void r8153_enable_eee(struct r8152 *tp)
3254 r8153_eee_en(tp, true);
3255 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3258 static void r8152b_enable_fc(struct r8152 *tp)
3262 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3263 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3264 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3267 static void rtl_tally_reset(struct r8152 *tp)
3271 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3272 ocp_data |= TALLY_RESET;
3273 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3276 static void r8152b_init(struct r8152 *tp)
3280 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3283 r8152_aldps_en(tp, false);
3285 if (tp->version == RTL_VER_01) {
3286 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3287 ocp_data &= ~LED_MODE_MASK;
3288 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3291 r8152_power_cut_en(tp, false);
3293 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3294 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3295 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3296 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3297 ocp_data &= ~MCU_CLK_RATIO_MASK;
3298 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3299 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3300 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3301 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3302 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3304 r8152b_enable_eee(tp);
3305 r8152_aldps_en(tp, true);
3306 r8152b_enable_fc(tp);
3307 rtl_tally_reset(tp);
3309 /* enable rx aggregation */
3310 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3311 ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3312 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3315 static void r8153_init(struct r8152 *tp)
3320 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3323 r8153_aldps_en(tp, false);
3324 r8153_u1u2en(tp, false);
3326 for (i = 0; i < 500; i++) {
3327 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3333 for (i = 0; i < 500; i++) {
3334 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3335 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3340 usb_disable_lpm(tp->udev);
3341 r8153_u2p3en(tp, false);
3343 if (tp->version == RTL_VER_04) {
3344 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3345 ocp_data &= ~pwd_dn_scale_mask;
3346 ocp_data |= pwd_dn_scale(96);
3347 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3349 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3350 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3351 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3352 } else if (tp->version == RTL_VER_05) {
3353 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3354 ocp_data &= ~ECM_ALDPS;
3355 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3357 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3358 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3359 ocp_data &= ~DYNAMIC_BURST;
3361 ocp_data |= DYNAMIC_BURST;
3362 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3363 } else if (tp->version == RTL_VER_06) {
3364 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3365 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3366 ocp_data &= ~DYNAMIC_BURST;
3368 ocp_data |= DYNAMIC_BURST;
3369 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3372 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3373 ocp_data |= EP4_FULL_FC;
3374 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3376 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3377 ocp_data &= ~TIMER11_EN;
3378 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3380 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3381 ocp_data &= ~LED_MODE_MASK;
3382 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3384 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3385 if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3386 ocp_data |= LPM_TIMER_500MS;
3388 ocp_data |= LPM_TIMER_500US;
3389 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3391 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3392 ocp_data &= ~SEN_VAL_MASK;
3393 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3394 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3396 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3398 r8153_power_cut_en(tp, false);
3399 r8153_u1u2en(tp, true);
3401 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3402 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3403 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3404 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3405 U1U2_SPDWN_EN | L1_SPDWN_EN);
3406 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3407 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3408 TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3411 r8153_enable_eee(tp);
3412 r8153_aldps_en(tp, true);
3413 r8152b_enable_fc(tp);
3414 rtl_tally_reset(tp);
3415 r8153_u2p3en(tp, true);
3418 static int rtl8152_pre_reset(struct usb_interface *intf)
3420 struct r8152 *tp = usb_get_intfdata(intf);
3421 struct net_device *netdev;
3426 netdev = tp->netdev;
3427 if (!netif_running(netdev))
3430 napi_disable(&tp->napi);
3431 clear_bit(WORK_ENABLE, &tp->flags);
3432 usb_kill_urb(tp->intr_urb);
3433 cancel_delayed_work_sync(&tp->schedule);
3434 if (netif_carrier_ok(netdev)) {
3435 netif_stop_queue(netdev);
3436 mutex_lock(&tp->control);
3437 tp->rtl_ops.disable(tp);
3438 mutex_unlock(&tp->control);
3444 static int rtl8152_post_reset(struct usb_interface *intf)
3446 struct r8152 *tp = usb_get_intfdata(intf);
3447 struct net_device *netdev;
3452 netdev = tp->netdev;
3453 if (!netif_running(netdev))
3456 set_bit(WORK_ENABLE, &tp->flags);
3457 if (netif_carrier_ok(netdev)) {
3458 mutex_lock(&tp->control);
3459 tp->rtl_ops.enable(tp);
3460 rtl8152_set_rx_mode(netdev);
3461 mutex_unlock(&tp->control);
3462 netif_wake_queue(netdev);
3465 napi_enable(&tp->napi);
3470 static bool delay_autosuspend(struct r8152 *tp)
3472 bool sw_linking = !!netif_carrier_ok(tp->netdev);
3473 bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3475 /* This means a linking change occurs and the driver doesn't detect it,
3476 * yet. If the driver has disabled tx/rx and hw is linking on, the
3477 * device wouldn't wake up by receiving any packet.
3479 if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3482 /* If the linking down is occurred by nway, the device may miss the
3483 * linking change event. And it wouldn't wake when linking on.
3485 if (!sw_linking && tp->rtl_ops.in_nway(tp))
3491 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3493 struct r8152 *tp = usb_get_intfdata(intf);
3494 struct net_device *netdev = tp->netdev;
3497 mutex_lock(&tp->control);
3499 if (PMSG_IS_AUTO(message)) {
3500 if (netif_running(netdev) && delay_autosuspend(tp)) {
3505 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3507 netif_device_detach(netdev);
3510 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3511 clear_bit(WORK_ENABLE, &tp->flags);
3512 usb_kill_urb(tp->intr_urb);
3513 napi_disable(&tp->napi);
3514 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3516 rtl_runtime_suspend_enable(tp, true);
3518 cancel_delayed_work_sync(&tp->schedule);
3519 tp->rtl_ops.down(tp);
3521 napi_enable(&tp->napi);
3524 mutex_unlock(&tp->control);
3529 static int rtl8152_resume(struct usb_interface *intf)
3531 struct r8152 *tp = usb_get_intfdata(intf);
3533 mutex_lock(&tp->control);
3535 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3536 tp->rtl_ops.init(tp);
3537 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3538 netif_device_attach(tp->netdev);
3541 if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3542 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3543 rtl_runtime_suspend_enable(tp, false);
3544 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3545 napi_disable(&tp->napi);
3546 set_bit(WORK_ENABLE, &tp->flags);
3547 if (netif_carrier_ok(tp->netdev))
3549 napi_enable(&tp->napi);
3552 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3553 tp->mii.supports_gmii ?
3554 SPEED_1000 : SPEED_100,
3556 netif_carrier_off(tp->netdev);
3557 set_bit(WORK_ENABLE, &tp->flags);
3559 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3560 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3561 if (tp->netdev->flags & IFF_UP)
3562 rtl_runtime_suspend_enable(tp, false);
3563 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3566 mutex_unlock(&tp->control);
3571 static int rtl8152_reset_resume(struct usb_interface *intf)
3573 struct r8152 *tp = usb_get_intfdata(intf);
3575 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3576 return rtl8152_resume(intf);
3579 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3581 struct r8152 *tp = netdev_priv(dev);
3583 if (usb_autopm_get_interface(tp->intf) < 0)
3586 if (!rtl_can_wakeup(tp)) {
3590 mutex_lock(&tp->control);
3591 wol->supported = WAKE_ANY;
3592 wol->wolopts = __rtl_get_wol(tp);
3593 mutex_unlock(&tp->control);
3596 usb_autopm_put_interface(tp->intf);
3599 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3601 struct r8152 *tp = netdev_priv(dev);
3604 if (!rtl_can_wakeup(tp))
3607 ret = usb_autopm_get_interface(tp->intf);
3611 mutex_lock(&tp->control);
3613 __rtl_set_wol(tp, wol->wolopts);
3614 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3616 mutex_unlock(&tp->control);
3618 usb_autopm_put_interface(tp->intf);
3624 static u32 rtl8152_get_msglevel(struct net_device *dev)
3626 struct r8152 *tp = netdev_priv(dev);
3628 return tp->msg_enable;
3631 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3633 struct r8152 *tp = netdev_priv(dev);
3635 tp->msg_enable = value;
3638 static void rtl8152_get_drvinfo(struct net_device *netdev,
3639 struct ethtool_drvinfo *info)
3641 struct r8152 *tp = netdev_priv(netdev);
3643 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3644 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3645 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3649 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3651 struct r8152 *tp = netdev_priv(netdev);
3654 if (!tp->mii.mdio_read)
3657 ret = usb_autopm_get_interface(tp->intf);
3661 mutex_lock(&tp->control);
3663 ret = mii_ethtool_gset(&tp->mii, cmd);
3665 mutex_unlock(&tp->control);
3667 usb_autopm_put_interface(tp->intf);
3673 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3675 struct r8152 *tp = netdev_priv(dev);
3678 ret = usb_autopm_get_interface(tp->intf);
3682 mutex_lock(&tp->control);
3684 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3686 mutex_unlock(&tp->control);
3688 usb_autopm_put_interface(tp->intf);
3694 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3701 "tx_single_collisions",
3702 "tx_multi_collisions",
3710 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3714 return ARRAY_SIZE(rtl8152_gstrings);
3720 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3721 struct ethtool_stats *stats, u64 *data)
3723 struct r8152 *tp = netdev_priv(dev);
3724 struct tally_counter tally;
3726 if (usb_autopm_get_interface(tp->intf) < 0)
3729 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3731 usb_autopm_put_interface(tp->intf);
3733 data[0] = le64_to_cpu(tally.tx_packets);
3734 data[1] = le64_to_cpu(tally.rx_packets);
3735 data[2] = le64_to_cpu(tally.tx_errors);
3736 data[3] = le32_to_cpu(tally.rx_errors);
3737 data[4] = le16_to_cpu(tally.rx_missed);
3738 data[5] = le16_to_cpu(tally.align_errors);
3739 data[6] = le32_to_cpu(tally.tx_one_collision);
3740 data[7] = le32_to_cpu(tally.tx_multi_collision);
3741 data[8] = le64_to_cpu(tally.rx_unicast);
3742 data[9] = le64_to_cpu(tally.rx_broadcast);
3743 data[10] = le32_to_cpu(tally.rx_multicast);
3744 data[11] = le16_to_cpu(tally.tx_aborted);
3745 data[12] = le16_to_cpu(tally.tx_underrun);
3748 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3750 switch (stringset) {
3752 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3757 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3759 u32 ocp_data, lp, adv, supported = 0;
3762 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3763 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3765 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3766 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3768 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3769 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3771 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3772 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3774 eee->eee_enabled = !!ocp_data;
3775 eee->eee_active = !!(supported & adv & lp);
3776 eee->supported = supported;
3777 eee->advertised = adv;
3778 eee->lp_advertised = lp;
3783 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3785 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3787 r8152_eee_en(tp, eee->eee_enabled);
3789 if (!eee->eee_enabled)
3792 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3797 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3799 u32 ocp_data, lp, adv, supported = 0;
3802 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3803 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3805 val = ocp_reg_read(tp, OCP_EEE_ADV);
3806 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3808 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3809 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3811 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3812 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3814 eee->eee_enabled = !!ocp_data;
3815 eee->eee_active = !!(supported & adv & lp);
3816 eee->supported = supported;
3817 eee->advertised = adv;
3818 eee->lp_advertised = lp;
3823 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3825 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3827 r8153_eee_en(tp, eee->eee_enabled);
3829 if (!eee->eee_enabled)
3832 ocp_reg_write(tp, OCP_EEE_ADV, val);
3838 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3840 struct r8152 *tp = netdev_priv(net);
3843 ret = usb_autopm_get_interface(tp->intf);
3847 mutex_lock(&tp->control);
3849 ret = tp->rtl_ops.eee_get(tp, edata);
3851 mutex_unlock(&tp->control);
3853 usb_autopm_put_interface(tp->intf);
3860 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3862 struct r8152 *tp = netdev_priv(net);
3865 ret = usb_autopm_get_interface(tp->intf);
3869 mutex_lock(&tp->control);
3871 ret = tp->rtl_ops.eee_set(tp, edata);
3873 ret = mii_nway_restart(&tp->mii);
3875 mutex_unlock(&tp->control);
3877 usb_autopm_put_interface(tp->intf);
3883 static int rtl8152_nway_reset(struct net_device *dev)
3885 struct r8152 *tp = netdev_priv(dev);
3888 ret = usb_autopm_get_interface(tp->intf);
3892 mutex_lock(&tp->control);
3894 ret = mii_nway_restart(&tp->mii);
3896 mutex_unlock(&tp->control);
3898 usb_autopm_put_interface(tp->intf);
3904 static int rtl8152_get_coalesce(struct net_device *netdev,
3905 struct ethtool_coalesce *coalesce)
3907 struct r8152 *tp = netdev_priv(netdev);
3909 switch (tp->version) {
3917 coalesce->rx_coalesce_usecs = tp->coalesce;
3922 static int rtl8152_set_coalesce(struct net_device *netdev,
3923 struct ethtool_coalesce *coalesce)
3925 struct r8152 *tp = netdev_priv(netdev);
3928 switch (tp->version) {
3936 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
3939 ret = usb_autopm_get_interface(tp->intf);
3943 mutex_lock(&tp->control);
3945 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
3946 tp->coalesce = coalesce->rx_coalesce_usecs;
3948 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
3949 r8153_set_rx_early_timeout(tp);
3952 mutex_unlock(&tp->control);
3954 usb_autopm_put_interface(tp->intf);
3959 static struct ethtool_ops ops = {
3960 .get_drvinfo = rtl8152_get_drvinfo,
3961 .get_settings = rtl8152_get_settings,
3962 .set_settings = rtl8152_set_settings,
3963 .get_link = ethtool_op_get_link,
3964 .nway_reset = rtl8152_nway_reset,
3965 .get_msglevel = rtl8152_get_msglevel,
3966 .set_msglevel = rtl8152_set_msglevel,
3967 .get_wol = rtl8152_get_wol,
3968 .set_wol = rtl8152_set_wol,
3969 .get_strings = rtl8152_get_strings,
3970 .get_sset_count = rtl8152_get_sset_count,
3971 .get_ethtool_stats = rtl8152_get_ethtool_stats,
3972 .get_coalesce = rtl8152_get_coalesce,
3973 .set_coalesce = rtl8152_set_coalesce,
3974 .get_eee = rtl_ethtool_get_eee,
3975 .set_eee = rtl_ethtool_set_eee,
3978 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3980 struct r8152 *tp = netdev_priv(netdev);
3981 struct mii_ioctl_data *data = if_mii(rq);
3984 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3987 res = usb_autopm_get_interface(tp->intf);
3993 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3997 mutex_lock(&tp->control);
3998 data->val_out = r8152_mdio_read(tp, data->reg_num);
3999 mutex_unlock(&tp->control);
4003 if (!capable(CAP_NET_ADMIN)) {
4007 mutex_lock(&tp->control);
4008 r8152_mdio_write(tp, data->reg_num, data->val_in);
4009 mutex_unlock(&tp->control);
4016 usb_autopm_put_interface(tp->intf);
4022 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4024 struct r8152 *tp = netdev_priv(dev);
4027 switch (tp->version) {
4030 return eth_change_mtu(dev, new_mtu);
4035 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4038 ret = usb_autopm_get_interface(tp->intf);
4042 mutex_lock(&tp->control);
4046 if (netif_running(dev) && netif_carrier_ok(dev))
4047 r8153_set_rx_early_size(tp);
4049 mutex_unlock(&tp->control);
4051 usb_autopm_put_interface(tp->intf);
4056 static const struct net_device_ops rtl8152_netdev_ops = {
4057 .ndo_open = rtl8152_open,
4058 .ndo_stop = rtl8152_close,
4059 .ndo_do_ioctl = rtl8152_ioctl,
4060 .ndo_start_xmit = rtl8152_start_xmit,
4061 .ndo_tx_timeout = rtl8152_tx_timeout,
4062 .ndo_set_features = rtl8152_set_features,
4063 .ndo_set_rx_mode = rtl8152_set_rx_mode,
4064 .ndo_set_mac_address = rtl8152_set_mac_address,
4065 .ndo_change_mtu = rtl8152_change_mtu,
4066 .ndo_validate_addr = eth_validate_addr,
4067 .ndo_features_check = rtl8152_features_check,
4070 static void r8152b_get_version(struct r8152 *tp)
4075 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4076 version = (u16)(ocp_data & VERSION_MASK);
4080 tp->version = RTL_VER_01;
4083 tp->version = RTL_VER_02;
4086 tp->version = RTL_VER_03;
4087 tp->mii.supports_gmii = 1;
4090 tp->version = RTL_VER_04;
4091 tp->mii.supports_gmii = 1;
4094 tp->version = RTL_VER_05;
4095 tp->mii.supports_gmii = 1;
4098 tp->version = RTL_VER_06;
4099 tp->mii.supports_gmii = 1;
4102 netif_info(tp, probe, tp->netdev,
4103 "Unknown version 0x%04x\n", version);
4108 static void rtl8152_unload(struct r8152 *tp)
4110 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4113 if (tp->version != RTL_VER_01)
4114 r8152_power_cut_en(tp, true);
4117 static void rtl8153_unload(struct r8152 *tp)
4119 if (test_bit(RTL8152_UNPLUG, &tp->flags))
4122 r8153_power_cut_en(tp, false);
4125 static int rtl_ops_init(struct r8152 *tp)
4127 struct rtl_ops *ops = &tp->rtl_ops;
4130 switch (tp->version) {
4133 ops->init = r8152b_init;
4134 ops->enable = rtl8152_enable;
4135 ops->disable = rtl8152_disable;
4136 ops->up = rtl8152_up;
4137 ops->down = rtl8152_down;
4138 ops->unload = rtl8152_unload;
4139 ops->eee_get = r8152_get_eee;
4140 ops->eee_set = r8152_set_eee;
4141 ops->in_nway = rtl8152_in_nway;
4142 ops->hw_phy_cfg = r8152b_hw_phy_cfg;
4149 ops->init = r8153_init;
4150 ops->enable = rtl8153_enable;
4151 ops->disable = rtl8153_disable;
4152 ops->up = rtl8153_up;
4153 ops->down = rtl8153_down;
4154 ops->unload = rtl8153_unload;
4155 ops->eee_get = r8153_get_eee;
4156 ops->eee_set = r8153_set_eee;
4157 ops->in_nway = rtl8153_in_nway;
4158 ops->hw_phy_cfg = r8153_hw_phy_cfg;
4163 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4170 static int rtl8152_probe(struct usb_interface *intf,
4171 const struct usb_device_id *id)
4173 struct usb_device *udev = interface_to_usbdev(intf);
4175 struct net_device *netdev;
4178 if (udev->actconfig->desc.bConfigurationValue != 1) {
4179 usb_driver_set_configuration(udev, 1);
4183 usb_reset_device(udev);
4184 netdev = alloc_etherdev(sizeof(struct r8152));
4186 dev_err(&intf->dev, "Out of memory\n");
4190 SET_NETDEV_DEV(netdev, &intf->dev);
4191 tp = netdev_priv(netdev);
4192 tp->msg_enable = 0x7FFF;
4195 tp->netdev = netdev;
4198 r8152b_get_version(tp);
4199 ret = rtl_ops_init(tp);
4203 mutex_init(&tp->control);
4204 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4205 INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4207 netdev->netdev_ops = &rtl8152_netdev_ops;
4208 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4210 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4211 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4212 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4213 NETIF_F_HW_VLAN_CTAG_TX;
4214 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4215 NETIF_F_TSO | NETIF_F_FRAGLIST |
4216 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4217 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4218 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4219 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4220 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4222 netdev->ethtool_ops = &ops;
4223 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4225 tp->mii.dev = netdev;
4226 tp->mii.mdio_read = read_mii_word;
4227 tp->mii.mdio_write = write_mii_word;
4228 tp->mii.phy_id_mask = 0x3f;
4229 tp->mii.reg_num_mask = 0x1f;
4230 tp->mii.phy_id = R8152_PHY_ID;
4232 switch (udev->speed) {
4233 case USB_SPEED_SUPER:
4234 case USB_SPEED_SUPER_PLUS:
4235 tp->coalesce = COALESCE_SUPER;
4237 case USB_SPEED_HIGH:
4238 tp->coalesce = COALESCE_HIGH;
4241 tp->coalesce = COALESCE_SLOW;
4245 intf->needs_remote_wakeup = 1;
4247 tp->rtl_ops.init(tp);
4248 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4249 set_ethernet_addr(tp);
4251 usb_set_intfdata(intf, tp);
4252 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4254 ret = register_netdev(netdev);
4256 netif_err(tp, probe, netdev, "couldn't register the device\n");
4260 if (!rtl_can_wakeup(tp))
4261 __rtl_set_wol(tp, 0);
4263 tp->saved_wolopts = __rtl_get_wol(tp);
4264 if (tp->saved_wolopts)
4265 device_set_wakeup_enable(&udev->dev, true);
4267 device_set_wakeup_enable(&udev->dev, false);
4269 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4274 netif_napi_del(&tp->napi);
4275 usb_set_intfdata(intf, NULL);
4277 free_netdev(netdev);
4281 static void rtl8152_disconnect(struct usb_interface *intf)
4283 struct r8152 *tp = usb_get_intfdata(intf);
4285 usb_set_intfdata(intf, NULL);
4287 struct usb_device *udev = tp->udev;
4289 if (udev->state == USB_STATE_NOTATTACHED)
4290 set_bit(RTL8152_UNPLUG, &tp->flags);
4292 netif_napi_del(&tp->napi);
4293 unregister_netdev(tp->netdev);
4294 cancel_delayed_work_sync(&tp->hw_phy_work);
4295 tp->rtl_ops.unload(tp);
4296 free_netdev(tp->netdev);
4300 #define REALTEK_USB_DEVICE(vend, prod) \
4301 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4302 USB_DEVICE_ID_MATCH_INT_CLASS, \
4303 .idVendor = (vend), \
4304 .idProduct = (prod), \
4305 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4308 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4309 USB_DEVICE_ID_MATCH_DEVICE, \
4310 .idVendor = (vend), \
4311 .idProduct = (prod), \
4312 .bInterfaceClass = USB_CLASS_COMM, \
4313 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4314 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4316 /* table of devices that work with this driver */
4317 static struct usb_device_id rtl8152_table[] = {
4318 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4319 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4320 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4321 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x7205)},
4322 {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO, 0x304f)},
4323 {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA, 0x09ff)},
4327 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4329 static struct usb_driver rtl8152_driver = {
4331 .id_table = rtl8152_table,
4332 .probe = rtl8152_probe,
4333 .disconnect = rtl8152_disconnect,
4334 .suspend = rtl8152_suspend,
4335 .resume = rtl8152_resume,
4336 .reset_resume = rtl8152_reset_resume,
4337 .pre_reset = rtl8152_pre_reset,
4338 .post_reset = rtl8152_post_reset,
4339 .supports_autosuspend = 1,
4340 .disable_hub_initiated_lpm = 1,
4343 module_usb_driver(rtl8152_driver);
4345 MODULE_AUTHOR(DRIVER_AUTHOR);
4346 MODULE_DESCRIPTION(DRIVER_DESC);
4347 MODULE_LICENSE("GPL");