r8152: move the settings of PHY to a work queue
[cascardo/linux.git] / drivers / net / usb / r8152.c
1 /*
2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * version 2 as published by the Free Software Foundation.
7  *
8  */
9
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
22 #include <linux/ip.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29
30 /* Information for net-next */
31 #define NETNEXT_VERSION         "08"
32
33 /* Information for net */
34 #define NET_VERSION             "3"
35
36 #define DRIVER_VERSION          "v1." NETNEXT_VERSION "." NET_VERSION
37 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
38 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
39 #define MODULENAME "r8152"
40
41 #define R8152_PHY_ID            32
42
43 #define PLA_IDR                 0xc000
44 #define PLA_RCR                 0xc010
45 #define PLA_RMS                 0xc016
46 #define PLA_RXFIFO_CTRL0        0xc0a0
47 #define PLA_RXFIFO_CTRL1        0xc0a4
48 #define PLA_RXFIFO_CTRL2        0xc0a8
49 #define PLA_DMY_REG0            0xc0b0
50 #define PLA_FMC                 0xc0b4
51 #define PLA_CFG_WOL             0xc0b6
52 #define PLA_TEREDO_CFG          0xc0bc
53 #define PLA_MAR                 0xcd00
54 #define PLA_BACKUP              0xd000
55 #define PAL_BDC_CR              0xd1a0
56 #define PLA_TEREDO_TIMER        0xd2cc
57 #define PLA_REALWOW_TIMER       0xd2e8
58 #define PLA_LEDSEL              0xdd90
59 #define PLA_LED_FEATURE         0xdd92
60 #define PLA_PHYAR               0xde00
61 #define PLA_BOOT_CTRL           0xe004
62 #define PLA_GPHY_INTR_IMR       0xe022
63 #define PLA_EEE_CR              0xe040
64 #define PLA_EEEP_CR             0xe080
65 #define PLA_MAC_PWR_CTRL        0xe0c0
66 #define PLA_MAC_PWR_CTRL2       0xe0ca
67 #define PLA_MAC_PWR_CTRL3       0xe0cc
68 #define PLA_MAC_PWR_CTRL4       0xe0ce
69 #define PLA_WDT6_CTRL           0xe428
70 #define PLA_TCR0                0xe610
71 #define PLA_TCR1                0xe612
72 #define PLA_MTPS                0xe615
73 #define PLA_TXFIFO_CTRL         0xe618
74 #define PLA_RSTTALLY            0xe800
75 #define PLA_CR                  0xe813
76 #define PLA_CRWECR              0xe81c
77 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
78 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
79 #define PLA_CONFIG5             0xe822
80 #define PLA_PHY_PWR             0xe84c
81 #define PLA_OOB_CTRL            0xe84f
82 #define PLA_CPCR                0xe854
83 #define PLA_MISC_0              0xe858
84 #define PLA_MISC_1              0xe85a
85 #define PLA_OCP_GPHY_BASE       0xe86c
86 #define PLA_TALLYCNT            0xe890
87 #define PLA_SFF_STS_7           0xe8de
88 #define PLA_PHYSTATUS           0xe908
89 #define PLA_BP_BA               0xfc26
90 #define PLA_BP_0                0xfc28
91 #define PLA_BP_1                0xfc2a
92 #define PLA_BP_2                0xfc2c
93 #define PLA_BP_3                0xfc2e
94 #define PLA_BP_4                0xfc30
95 #define PLA_BP_5                0xfc32
96 #define PLA_BP_6                0xfc34
97 #define PLA_BP_7                0xfc36
98 #define PLA_BP_EN               0xfc38
99
100 #define USB_USB2PHY             0xb41e
101 #define USB_SSPHYLINK2          0xb428
102 #define USB_U2P3_CTRL           0xb460
103 #define USB_CSR_DUMMY1          0xb464
104 #define USB_CSR_DUMMY2          0xb466
105 #define USB_DEV_STAT            0xb808
106 #define USB_CONNECT_TIMER       0xcbf8
107 #define USB_BURST_SIZE          0xcfc0
108 #define USB_USB_CTRL            0xd406
109 #define USB_PHY_CTRL            0xd408
110 #define USB_TX_AGG              0xd40a
111 #define USB_RX_BUF_TH           0xd40c
112 #define USB_USB_TIMER           0xd428
113 #define USB_RX_EARLY_TIMEOUT    0xd42c
114 #define USB_RX_EARLY_SIZE       0xd42e
115 #define USB_PM_CTRL_STATUS      0xd432
116 #define USB_TX_DMA              0xd434
117 #define USB_TOLERANCE           0xd490
118 #define USB_LPM_CTRL            0xd41a
119 #define USB_UPS_CTRL            0xd800
120 #define USB_MISC_0              0xd81a
121 #define USB_POWER_CUT           0xd80a
122 #define USB_AFE_CTRL2           0xd824
123 #define USB_WDT11_CTRL          0xe43c
124 #define USB_BP_BA               0xfc26
125 #define USB_BP_0                0xfc28
126 #define USB_BP_1                0xfc2a
127 #define USB_BP_2                0xfc2c
128 #define USB_BP_3                0xfc2e
129 #define USB_BP_4                0xfc30
130 #define USB_BP_5                0xfc32
131 #define USB_BP_6                0xfc34
132 #define USB_BP_7                0xfc36
133 #define USB_BP_EN               0xfc38
134
135 /* OCP Registers */
136 #define OCP_ALDPS_CONFIG        0x2010
137 #define OCP_EEE_CONFIG1         0x2080
138 #define OCP_EEE_CONFIG2         0x2092
139 #define OCP_EEE_CONFIG3         0x2094
140 #define OCP_BASE_MII            0xa400
141 #define OCP_EEE_AR              0xa41a
142 #define OCP_EEE_DATA            0xa41c
143 #define OCP_PHY_STATUS          0xa420
144 #define OCP_POWER_CFG           0xa430
145 #define OCP_EEE_CFG             0xa432
146 #define OCP_SRAM_ADDR           0xa436
147 #define OCP_SRAM_DATA           0xa438
148 #define OCP_DOWN_SPEED          0xa442
149 #define OCP_EEE_ABLE            0xa5c4
150 #define OCP_EEE_ADV             0xa5d0
151 #define OCP_EEE_LPABLE          0xa5d2
152 #define OCP_PHY_STATE           0xa708          /* nway state for 8153 */
153 #define OCP_ADC_CFG             0xbc06
154
155 /* SRAM Register */
156 #define SRAM_LPF_CFG            0x8012
157 #define SRAM_10M_AMP1           0x8080
158 #define SRAM_10M_AMP2           0x8082
159 #define SRAM_IMPEDANCE          0x8084
160
161 /* PLA_RCR */
162 #define RCR_AAP                 0x00000001
163 #define RCR_APM                 0x00000002
164 #define RCR_AM                  0x00000004
165 #define RCR_AB                  0x00000008
166 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
167
168 /* PLA_RXFIFO_CTRL0 */
169 #define RXFIFO_THR1_NORMAL      0x00080002
170 #define RXFIFO_THR1_OOB         0x01800003
171
172 /* PLA_RXFIFO_CTRL1 */
173 #define RXFIFO_THR2_FULL        0x00000060
174 #define RXFIFO_THR2_HIGH        0x00000038
175 #define RXFIFO_THR2_OOB         0x0000004a
176 #define RXFIFO_THR2_NORMAL      0x00a0
177
178 /* PLA_RXFIFO_CTRL2 */
179 #define RXFIFO_THR3_FULL        0x00000078
180 #define RXFIFO_THR3_HIGH        0x00000048
181 #define RXFIFO_THR3_OOB         0x0000005a
182 #define RXFIFO_THR3_NORMAL      0x0110
183
184 /* PLA_TXFIFO_CTRL */
185 #define TXFIFO_THR_NORMAL       0x00400008
186 #define TXFIFO_THR_NORMAL2      0x01000008
187
188 /* PLA_DMY_REG0 */
189 #define ECM_ALDPS               0x0002
190
191 /* PLA_FMC */
192 #define FMC_FCR_MCU_EN          0x0001
193
194 /* PLA_EEEP_CR */
195 #define EEEP_CR_EEEP_TX         0x0002
196
197 /* PLA_WDT6_CTRL */
198 #define WDT6_SET_MODE           0x0010
199
200 /* PLA_TCR0 */
201 #define TCR0_TX_EMPTY           0x0800
202 #define TCR0_AUTO_FIFO          0x0080
203
204 /* PLA_TCR1 */
205 #define VERSION_MASK            0x7cf0
206
207 /* PLA_MTPS */
208 #define MTPS_JUMBO              (12 * 1024 / 64)
209 #define MTPS_DEFAULT            (6 * 1024 / 64)
210
211 /* PLA_RSTTALLY */
212 #define TALLY_RESET             0x0001
213
214 /* PLA_CR */
215 #define CR_RST                  0x10
216 #define CR_RE                   0x08
217 #define CR_TE                   0x04
218
219 /* PLA_CRWECR */
220 #define CRWECR_NORAML           0x00
221 #define CRWECR_CONFIG           0xc0
222
223 /* PLA_OOB_CTRL */
224 #define NOW_IS_OOB              0x80
225 #define TXFIFO_EMPTY            0x20
226 #define RXFIFO_EMPTY            0x10
227 #define LINK_LIST_READY         0x02
228 #define DIS_MCU_CLROOB          0x01
229 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
230
231 /* PLA_MISC_1 */
232 #define RXDY_GATED_EN           0x0008
233
234 /* PLA_SFF_STS_7 */
235 #define RE_INIT_LL              0x8000
236 #define MCU_BORW_EN             0x4000
237
238 /* PLA_CPCR */
239 #define CPCR_RX_VLAN            0x0040
240
241 /* PLA_CFG_WOL */
242 #define MAGIC_EN                0x0001
243
244 /* PLA_TEREDO_CFG */
245 #define TEREDO_SEL              0x8000
246 #define TEREDO_WAKE_MASK        0x7f00
247 #define TEREDO_RS_EVENT_MASK    0x00fe
248 #define OOB_TEREDO_EN           0x0001
249
250 /* PAL_BDC_CR */
251 #define ALDPS_PROXY_MODE        0x0001
252
253 /* PLA_CONFIG34 */
254 #define LINK_ON_WAKE_EN         0x0010
255 #define LINK_OFF_WAKE_EN        0x0008
256
257 /* PLA_CONFIG5 */
258 #define BWF_EN                  0x0040
259 #define MWF_EN                  0x0020
260 #define UWF_EN                  0x0010
261 #define LAN_WAKE_EN             0x0002
262
263 /* PLA_LED_FEATURE */
264 #define LED_MODE_MASK           0x0700
265
266 /* PLA_PHY_PWR */
267 #define TX_10M_IDLE_EN          0x0080
268 #define PFM_PWM_SWITCH          0x0040
269
270 /* PLA_MAC_PWR_CTRL */
271 #define D3_CLK_GATED_EN         0x00004000
272 #define MCU_CLK_RATIO           0x07010f07
273 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
274 #define ALDPS_SPDWN_RATIO       0x0f87
275
276 /* PLA_MAC_PWR_CTRL2 */
277 #define EEE_SPDWN_RATIO         0x8007
278
279 /* PLA_MAC_PWR_CTRL3 */
280 #define PKT_AVAIL_SPDWN_EN      0x0100
281 #define SUSPEND_SPDWN_EN        0x0004
282 #define U1U2_SPDWN_EN           0x0002
283 #define L1_SPDWN_EN             0x0001
284
285 /* PLA_MAC_PWR_CTRL4 */
286 #define PWRSAVE_SPDWN_EN        0x1000
287 #define RXDV_SPDWN_EN           0x0800
288 #define TX10MIDLE_EN            0x0100
289 #define TP100_SPDWN_EN          0x0020
290 #define TP500_SPDWN_EN          0x0010
291 #define TP1000_SPDWN_EN         0x0008
292 #define EEE_SPDWN_EN            0x0001
293
294 /* PLA_GPHY_INTR_IMR */
295 #define GPHY_STS_MSK            0x0001
296 #define SPEED_DOWN_MSK          0x0002
297 #define SPDWN_RXDV_MSK          0x0004
298 #define SPDWN_LINKCHG_MSK       0x0008
299
300 /* PLA_PHYAR */
301 #define PHYAR_FLAG              0x80000000
302
303 /* PLA_EEE_CR */
304 #define EEE_RX_EN               0x0001
305 #define EEE_TX_EN               0x0002
306
307 /* PLA_BOOT_CTRL */
308 #define AUTOLOAD_DONE           0x0002
309
310 /* USB_USB2PHY */
311 #define USB2PHY_SUSPEND         0x0001
312 #define USB2PHY_L1              0x0002
313
314 /* USB_SSPHYLINK2 */
315 #define pwd_dn_scale_mask       0x3ffe
316 #define pwd_dn_scale(x)         ((x) << 1)
317
318 /* USB_CSR_DUMMY1 */
319 #define DYNAMIC_BURST           0x0001
320
321 /* USB_CSR_DUMMY2 */
322 #define EP4_FULL_FC             0x0001
323
324 /* USB_DEV_STAT */
325 #define STAT_SPEED_MASK         0x0006
326 #define STAT_SPEED_HIGH         0x0000
327 #define STAT_SPEED_FULL         0x0002
328
329 /* USB_TX_AGG */
330 #define TX_AGG_MAX_THRESHOLD    0x03
331
332 /* USB_RX_BUF_TH */
333 #define RX_THR_SUPPER           0x0c350180
334 #define RX_THR_HIGH             0x7a120180
335 #define RX_THR_SLOW             0xffff0180
336
337 /* USB_TX_DMA */
338 #define TEST_MODE_DISABLE       0x00000001
339 #define TX_SIZE_ADJUST1         0x00000100
340
341 /* USB_UPS_CTRL */
342 #define POWER_CUT               0x0100
343
344 /* USB_PM_CTRL_STATUS */
345 #define RESUME_INDICATE         0x0001
346
347 /* USB_USB_CTRL */
348 #define RX_AGG_DISABLE          0x0010
349 #define RX_ZERO_EN              0x0080
350
351 /* USB_U2P3_CTRL */
352 #define U2P3_ENABLE             0x0001
353
354 /* USB_POWER_CUT */
355 #define PWR_EN                  0x0001
356 #define PHASE2_EN               0x0008
357
358 /* USB_MISC_0 */
359 #define PCUT_STATUS             0x0001
360
361 /* USB_RX_EARLY_TIMEOUT */
362 #define COALESCE_SUPER           85000U
363 #define COALESCE_HIGH           250000U
364 #define COALESCE_SLOW           524280U
365
366 /* USB_WDT11_CTRL */
367 #define TIMER11_EN              0x0001
368
369 /* USB_LPM_CTRL */
370 /* bit 4 ~ 5: fifo empty boundary */
371 #define FIFO_EMPTY_1FB          0x30    /* 0x1fb * 64 = 32448 bytes */
372 /* bit 2 ~ 3: LMP timer */
373 #define LPM_TIMER_MASK          0x0c
374 #define LPM_TIMER_500MS         0x04    /* 500 ms */
375 #define LPM_TIMER_500US         0x0c    /* 500 us */
376 #define ROK_EXIT_LPM            0x02
377
378 /* USB_AFE_CTRL2 */
379 #define SEN_VAL_MASK            0xf800
380 #define SEN_VAL_NORMAL          0xa000
381 #define SEL_RXIDLE              0x0100
382
383 /* OCP_ALDPS_CONFIG */
384 #define ENPWRSAVE               0x8000
385 #define ENPDNPS                 0x0200
386 #define LINKENA                 0x0100
387 #define DIS_SDSAVE              0x0010
388
389 /* OCP_PHY_STATUS */
390 #define PHY_STAT_MASK           0x0007
391 #define PHY_STAT_LAN_ON         3
392 #define PHY_STAT_PWRDN          5
393
394 /* OCP_POWER_CFG */
395 #define EEE_CLKDIV_EN           0x8000
396 #define EN_ALDPS                0x0004
397 #define EN_10M_PLLOFF           0x0001
398
399 /* OCP_EEE_CONFIG1 */
400 #define RG_TXLPI_MSK_HFDUP      0x8000
401 #define RG_MATCLR_EN            0x4000
402 #define EEE_10_CAP              0x2000
403 #define EEE_NWAY_EN             0x1000
404 #define TX_QUIET_EN             0x0200
405 #define RX_QUIET_EN             0x0100
406 #define sd_rise_time_mask       0x0070
407 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
408 #define RG_RXLPI_MSK_HFDUP      0x0008
409 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
410
411 /* OCP_EEE_CONFIG2 */
412 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
413 #define RG_DACQUIET_EN          0x0400
414 #define RG_LDVQUIET_EN          0x0200
415 #define RG_CKRSEL               0x0020
416 #define RG_EEEPRG_EN            0x0010
417
418 /* OCP_EEE_CONFIG3 */
419 #define fast_snr_mask           0xff80
420 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
421 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
422 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
423
424 /* OCP_EEE_AR */
425 /* bit[15:14] function */
426 #define FUN_ADDR                0x0000
427 #define FUN_DATA                0x4000
428 /* bit[4:0] device addr */
429
430 /* OCP_EEE_CFG */
431 #define CTAP_SHORT_EN           0x0040
432 #define EEE10_EN                0x0010
433
434 /* OCP_DOWN_SPEED */
435 #define EN_10M_BGOFF            0x0080
436
437 /* OCP_PHY_STATE */
438 #define TXDIS_STATE             0x01
439 #define ABD_STATE               0x02
440
441 /* OCP_ADC_CFG */
442 #define CKADSEL_L               0x0100
443 #define ADC_EN                  0x0080
444 #define EN_EMI_L                0x0040
445
446 /* SRAM_LPF_CFG */
447 #define LPF_AUTO_TUNE           0x8000
448
449 /* SRAM_10M_AMP1 */
450 #define GDAC_IB_UPALL           0x0008
451
452 /* SRAM_10M_AMP2 */
453 #define AMP_DN                  0x0200
454
455 /* SRAM_IMPEDANCE */
456 #define RX_DRIVING_MASK         0x6000
457
458 enum rtl_register_content {
459         _1000bps        = 0x10,
460         _100bps         = 0x08,
461         _10bps          = 0x04,
462         LINK_STATUS     = 0x02,
463         FULL_DUP        = 0x01,
464 };
465
466 #define RTL8152_MAX_TX          4
467 #define RTL8152_MAX_RX          10
468 #define INTBUFSIZE              2
469 #define CRC_SIZE                4
470 #define TX_ALIGN                4
471 #define RX_ALIGN                8
472
473 #define INTR_LINK               0x0004
474
475 #define RTL8152_REQT_READ       0xc0
476 #define RTL8152_REQT_WRITE      0x40
477 #define RTL8152_REQ_GET_REGS    0x05
478 #define RTL8152_REQ_SET_REGS    0x05
479
480 #define BYTE_EN_DWORD           0xff
481 #define BYTE_EN_WORD            0x33
482 #define BYTE_EN_BYTE            0x11
483 #define BYTE_EN_SIX_BYTES       0x3f
484 #define BYTE_EN_START_MASK      0x0f
485 #define BYTE_EN_END_MASK        0xf0
486
487 #define RTL8153_MAX_PACKET      9216 /* 9K */
488 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
489 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
490 #define RTL8153_RMS             RTL8153_MAX_PACKET
491 #define RTL8152_TX_TIMEOUT      (5 * HZ)
492 #define RTL8152_NAPI_WEIGHT     64
493
494 /* rtl8152 flags */
495 enum rtl8152_flags {
496         RTL8152_UNPLUG = 0,
497         RTL8152_SET_RX_MODE,
498         WORK_ENABLE,
499         RTL8152_LINK_CHG,
500         SELECTIVE_SUSPEND,
501         PHY_RESET,
502         SCHEDULE_NAPI,
503 };
504
505 /* Define these values to match your device */
506 #define VENDOR_ID_REALTEK               0x0bda
507 #define VENDOR_ID_SAMSUNG               0x04e8
508 #define VENDOR_ID_LENOVO                0x17ef
509 #define VENDOR_ID_NVIDIA                0x0955
510
511 #define MCU_TYPE_PLA                    0x0100
512 #define MCU_TYPE_USB                    0x0000
513
514 struct tally_counter {
515         __le64  tx_packets;
516         __le64  rx_packets;
517         __le64  tx_errors;
518         __le32  rx_errors;
519         __le16  rx_missed;
520         __le16  align_errors;
521         __le32  tx_one_collision;
522         __le32  tx_multi_collision;
523         __le64  rx_unicast;
524         __le64  rx_broadcast;
525         __le32  rx_multicast;
526         __le16  tx_aborted;
527         __le16  tx_underrun;
528 };
529
530 struct rx_desc {
531         __le32 opts1;
532 #define RX_LEN_MASK                     0x7fff
533
534         __le32 opts2;
535 #define RD_UDP_CS                       BIT(23)
536 #define RD_TCP_CS                       BIT(22)
537 #define RD_IPV6_CS                      BIT(20)
538 #define RD_IPV4_CS                      BIT(19)
539
540         __le32 opts3;
541 #define IPF                             BIT(23) /* IP checksum fail */
542 #define UDPF                            BIT(22) /* UDP checksum fail */
543 #define TCPF                            BIT(21) /* TCP checksum fail */
544 #define RX_VLAN_TAG                     BIT(16)
545
546         __le32 opts4;
547         __le32 opts5;
548         __le32 opts6;
549 };
550
551 struct tx_desc {
552         __le32 opts1;
553 #define TX_FS                   BIT(31) /* First segment of a packet */
554 #define TX_LS                   BIT(30) /* Final segment of a packet */
555 #define GTSENDV4                BIT(28)
556 #define GTSENDV6                BIT(27)
557 #define GTTCPHO_SHIFT           18
558 #define GTTCPHO_MAX             0x7fU
559 #define TX_LEN_MAX              0x3ffffU
560
561         __le32 opts2;
562 #define UDP_CS                  BIT(31) /* Calculate UDP/IP checksum */
563 #define TCP_CS                  BIT(30) /* Calculate TCP/IP checksum */
564 #define IPV4_CS                 BIT(29) /* Calculate IPv4 checksum */
565 #define IPV6_CS                 BIT(28) /* Calculate IPv6 checksum */
566 #define MSS_SHIFT               17
567 #define MSS_MAX                 0x7ffU
568 #define TCPHO_SHIFT             17
569 #define TCPHO_MAX               0x7ffU
570 #define TX_VLAN_TAG             BIT(16)
571 };
572
573 struct r8152;
574
575 struct rx_agg {
576         struct list_head list;
577         struct urb *urb;
578         struct r8152 *context;
579         void *buffer;
580         void *head;
581 };
582
583 struct tx_agg {
584         struct list_head list;
585         struct urb *urb;
586         struct r8152 *context;
587         void *buffer;
588         void *head;
589         u32 skb_num;
590         u32 skb_len;
591 };
592
593 struct r8152 {
594         unsigned long flags;
595         struct usb_device *udev;
596         struct napi_struct napi;
597         struct usb_interface *intf;
598         struct net_device *netdev;
599         struct urb *intr_urb;
600         struct tx_agg tx_info[RTL8152_MAX_TX];
601         struct rx_agg rx_info[RTL8152_MAX_RX];
602         struct list_head rx_done, tx_free;
603         struct sk_buff_head tx_queue, rx_queue;
604         spinlock_t rx_lock, tx_lock;
605         struct delayed_work schedule, hw_phy_work;
606         struct mii_if_info mii;
607         struct mutex control;   /* use for hw setting */
608 #ifdef CONFIG_PM_SLEEP
609         struct notifier_block pm_notifier;
610 #endif
611
612         struct rtl_ops {
613                 void (*init)(struct r8152 *);
614                 int (*enable)(struct r8152 *);
615                 void (*disable)(struct r8152 *);
616                 void (*up)(struct r8152 *);
617                 void (*down)(struct r8152 *);
618                 void (*unload)(struct r8152 *);
619                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
620                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
621                 bool (*in_nway)(struct r8152 *);
622                 void (*hw_phy_cfg)(struct r8152 *);
623         } rtl_ops;
624
625         int intr_interval;
626         u32 saved_wolopts;
627         u32 msg_enable;
628         u32 tx_qlen;
629         u32 coalesce;
630         u16 ocp_base;
631         u8 *intr_buff;
632         u8 version;
633 };
634
635 enum rtl_version {
636         RTL_VER_UNKNOWN = 0,
637         RTL_VER_01,
638         RTL_VER_02,
639         RTL_VER_03,
640         RTL_VER_04,
641         RTL_VER_05,
642         RTL_VER_06,
643         RTL_VER_MAX
644 };
645
646 enum tx_csum_stat {
647         TX_CSUM_SUCCESS = 0,
648         TX_CSUM_TSO,
649         TX_CSUM_NONE
650 };
651
652 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
653  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
654  */
655 static const int multicast_filter_limit = 32;
656 static unsigned int agg_buf_sz = 16384;
657
658 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
659                                  VLAN_ETH_HLEN - VLAN_HLEN)
660
661 static
662 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
663 {
664         int ret;
665         void *tmp;
666
667         tmp = kmalloc(size, GFP_KERNEL);
668         if (!tmp)
669                 return -ENOMEM;
670
671         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
672                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
673                               value, index, tmp, size, 500);
674
675         memcpy(data, tmp, size);
676         kfree(tmp);
677
678         return ret;
679 }
680
681 static
682 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
683 {
684         int ret;
685         void *tmp;
686
687         tmp = kmemdup(data, size, GFP_KERNEL);
688         if (!tmp)
689                 return -ENOMEM;
690
691         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
692                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
693                               value, index, tmp, size, 500);
694
695         kfree(tmp);
696
697         return ret;
698 }
699
700 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
701                             void *data, u16 type)
702 {
703         u16 limit = 64;
704         int ret = 0;
705
706         if (test_bit(RTL8152_UNPLUG, &tp->flags))
707                 return -ENODEV;
708
709         /* both size and indix must be 4 bytes align */
710         if ((size & 3) || !size || (index & 3) || !data)
711                 return -EPERM;
712
713         if ((u32)index + (u32)size > 0xffff)
714                 return -EPERM;
715
716         while (size) {
717                 if (size > limit) {
718                         ret = get_registers(tp, index, type, limit, data);
719                         if (ret < 0)
720                                 break;
721
722                         index += limit;
723                         data += limit;
724                         size -= limit;
725                 } else {
726                         ret = get_registers(tp, index, type, size, data);
727                         if (ret < 0)
728                                 break;
729
730                         index += size;
731                         data += size;
732                         size = 0;
733                         break;
734                 }
735         }
736
737         if (ret == -ENODEV)
738                 set_bit(RTL8152_UNPLUG, &tp->flags);
739
740         return ret;
741 }
742
743 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
744                              u16 size, void *data, u16 type)
745 {
746         int ret;
747         u16 byteen_start, byteen_end, byen;
748         u16 limit = 512;
749
750         if (test_bit(RTL8152_UNPLUG, &tp->flags))
751                 return -ENODEV;
752
753         /* both size and indix must be 4 bytes align */
754         if ((size & 3) || !size || (index & 3) || !data)
755                 return -EPERM;
756
757         if ((u32)index + (u32)size > 0xffff)
758                 return -EPERM;
759
760         byteen_start = byteen & BYTE_EN_START_MASK;
761         byteen_end = byteen & BYTE_EN_END_MASK;
762
763         byen = byteen_start | (byteen_start << 4);
764         ret = set_registers(tp, index, type | byen, 4, data);
765         if (ret < 0)
766                 goto error1;
767
768         index += 4;
769         data += 4;
770         size -= 4;
771
772         if (size) {
773                 size -= 4;
774
775                 while (size) {
776                         if (size > limit) {
777                                 ret = set_registers(tp, index,
778                                                     type | BYTE_EN_DWORD,
779                                                     limit, data);
780                                 if (ret < 0)
781                                         goto error1;
782
783                                 index += limit;
784                                 data += limit;
785                                 size -= limit;
786                         } else {
787                                 ret = set_registers(tp, index,
788                                                     type | BYTE_EN_DWORD,
789                                                     size, data);
790                                 if (ret < 0)
791                                         goto error1;
792
793                                 index += size;
794                                 data += size;
795                                 size = 0;
796                                 break;
797                         }
798                 }
799
800                 byen = byteen_end | (byteen_end >> 4);
801                 ret = set_registers(tp, index, type | byen, 4, data);
802                 if (ret < 0)
803                         goto error1;
804         }
805
806 error1:
807         if (ret == -ENODEV)
808                 set_bit(RTL8152_UNPLUG, &tp->flags);
809
810         return ret;
811 }
812
813 static inline
814 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
815 {
816         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
817 }
818
819 static inline
820 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
821 {
822         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
823 }
824
825 static inline
826 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
827 {
828         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
829 }
830
831 static inline
832 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
833 {
834         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
835 }
836
837 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
838 {
839         __le32 data;
840
841         generic_ocp_read(tp, index, sizeof(data), &data, type);
842
843         return __le32_to_cpu(data);
844 }
845
846 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
847 {
848         __le32 tmp = __cpu_to_le32(data);
849
850         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
851 }
852
853 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
854 {
855         u32 data;
856         __le32 tmp;
857         u8 shift = index & 2;
858
859         index &= ~3;
860
861         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
862
863         data = __le32_to_cpu(tmp);
864         data >>= (shift * 8);
865         data &= 0xffff;
866
867         return (u16)data;
868 }
869
870 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
871 {
872         u32 mask = 0xffff;
873         __le32 tmp;
874         u16 byen = BYTE_EN_WORD;
875         u8 shift = index & 2;
876
877         data &= mask;
878
879         if (index & 2) {
880                 byen <<= shift;
881                 mask <<= (shift * 8);
882                 data <<= (shift * 8);
883                 index &= ~3;
884         }
885
886         tmp = __cpu_to_le32(data);
887
888         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
889 }
890
891 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
892 {
893         u32 data;
894         __le32 tmp;
895         u8 shift = index & 3;
896
897         index &= ~3;
898
899         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
900
901         data = __le32_to_cpu(tmp);
902         data >>= (shift * 8);
903         data &= 0xff;
904
905         return (u8)data;
906 }
907
908 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
909 {
910         u32 mask = 0xff;
911         __le32 tmp;
912         u16 byen = BYTE_EN_BYTE;
913         u8 shift = index & 3;
914
915         data &= mask;
916
917         if (index & 3) {
918                 byen <<= shift;
919                 mask <<= (shift * 8);
920                 data <<= (shift * 8);
921                 index &= ~3;
922         }
923
924         tmp = __cpu_to_le32(data);
925
926         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
927 }
928
929 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
930 {
931         u16 ocp_base, ocp_index;
932
933         ocp_base = addr & 0xf000;
934         if (ocp_base != tp->ocp_base) {
935                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
936                 tp->ocp_base = ocp_base;
937         }
938
939         ocp_index = (addr & 0x0fff) | 0xb000;
940         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
941 }
942
943 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
944 {
945         u16 ocp_base, ocp_index;
946
947         ocp_base = addr & 0xf000;
948         if (ocp_base != tp->ocp_base) {
949                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
950                 tp->ocp_base = ocp_base;
951         }
952
953         ocp_index = (addr & 0x0fff) | 0xb000;
954         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
955 }
956
957 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
958 {
959         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
960 }
961
962 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
963 {
964         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
965 }
966
967 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
968 {
969         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
970         ocp_reg_write(tp, OCP_SRAM_DATA, data);
971 }
972
973 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
974 {
975         struct r8152 *tp = netdev_priv(netdev);
976         int ret;
977
978         if (test_bit(RTL8152_UNPLUG, &tp->flags))
979                 return -ENODEV;
980
981         if (phy_id != R8152_PHY_ID)
982                 return -EINVAL;
983
984         ret = r8152_mdio_read(tp, reg);
985
986         return ret;
987 }
988
989 static
990 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
991 {
992         struct r8152 *tp = netdev_priv(netdev);
993
994         if (test_bit(RTL8152_UNPLUG, &tp->flags))
995                 return;
996
997         if (phy_id != R8152_PHY_ID)
998                 return;
999
1000         r8152_mdio_write(tp, reg, val);
1001 }
1002
1003 static int
1004 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1005
1006 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1007 {
1008         struct r8152 *tp = netdev_priv(netdev);
1009         struct sockaddr *addr = p;
1010         int ret = -EADDRNOTAVAIL;
1011
1012         if (!is_valid_ether_addr(addr->sa_data))
1013                 goto out1;
1014
1015         ret = usb_autopm_get_interface(tp->intf);
1016         if (ret < 0)
1017                 goto out1;
1018
1019         mutex_lock(&tp->control);
1020
1021         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1022
1023         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1024         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1025         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1026
1027         mutex_unlock(&tp->control);
1028
1029         usb_autopm_put_interface(tp->intf);
1030 out1:
1031         return ret;
1032 }
1033
1034 static int set_ethernet_addr(struct r8152 *tp)
1035 {
1036         struct net_device *dev = tp->netdev;
1037         struct sockaddr sa;
1038         int ret;
1039
1040         if (tp->version == RTL_VER_01)
1041                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1042         else
1043                 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1044
1045         if (ret < 0) {
1046                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1047         } else if (!is_valid_ether_addr(sa.sa_data)) {
1048                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1049                           sa.sa_data);
1050                 eth_hw_addr_random(dev);
1051                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1052                 ret = rtl8152_set_mac_address(dev, &sa);
1053                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1054                            sa.sa_data);
1055         } else {
1056                 if (tp->version == RTL_VER_01)
1057                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1058                 else
1059                         ret = rtl8152_set_mac_address(dev, &sa);
1060         }
1061
1062         return ret;
1063 }
1064
1065 static void read_bulk_callback(struct urb *urb)
1066 {
1067         struct net_device *netdev;
1068         int status = urb->status;
1069         struct rx_agg *agg;
1070         struct r8152 *tp;
1071
1072         agg = urb->context;
1073         if (!agg)
1074                 return;
1075
1076         tp = agg->context;
1077         if (!tp)
1078                 return;
1079
1080         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1081                 return;
1082
1083         if (!test_bit(WORK_ENABLE, &tp->flags))
1084                 return;
1085
1086         netdev = tp->netdev;
1087
1088         /* When link down, the driver would cancel all bulks. */
1089         /* This avoid the re-submitting bulk */
1090         if (!netif_carrier_ok(netdev))
1091                 return;
1092
1093         usb_mark_last_busy(tp->udev);
1094
1095         switch (status) {
1096         case 0:
1097                 if (urb->actual_length < ETH_ZLEN)
1098                         break;
1099
1100                 spin_lock(&tp->rx_lock);
1101                 list_add_tail(&agg->list, &tp->rx_done);
1102                 spin_unlock(&tp->rx_lock);
1103                 napi_schedule(&tp->napi);
1104                 return;
1105         case -ESHUTDOWN:
1106                 set_bit(RTL8152_UNPLUG, &tp->flags);
1107                 netif_device_detach(tp->netdev);
1108                 return;
1109         case -ENOENT:
1110                 return; /* the urb is in unlink state */
1111         case -ETIME:
1112                 if (net_ratelimit())
1113                         netdev_warn(netdev, "maybe reset is needed?\n");
1114                 break;
1115         default:
1116                 if (net_ratelimit())
1117                         netdev_warn(netdev, "Rx status %d\n", status);
1118                 break;
1119         }
1120
1121         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1122 }
1123
1124 static void write_bulk_callback(struct urb *urb)
1125 {
1126         struct net_device_stats *stats;
1127         struct net_device *netdev;
1128         struct tx_agg *agg;
1129         struct r8152 *tp;
1130         int status = urb->status;
1131
1132         agg = urb->context;
1133         if (!agg)
1134                 return;
1135
1136         tp = agg->context;
1137         if (!tp)
1138                 return;
1139
1140         netdev = tp->netdev;
1141         stats = &netdev->stats;
1142         if (status) {
1143                 if (net_ratelimit())
1144                         netdev_warn(netdev, "Tx status %d\n", status);
1145                 stats->tx_errors += agg->skb_num;
1146         } else {
1147                 stats->tx_packets += agg->skb_num;
1148                 stats->tx_bytes += agg->skb_len;
1149         }
1150
1151         spin_lock(&tp->tx_lock);
1152         list_add_tail(&agg->list, &tp->tx_free);
1153         spin_unlock(&tp->tx_lock);
1154
1155         usb_autopm_put_interface_async(tp->intf);
1156
1157         if (!netif_carrier_ok(netdev))
1158                 return;
1159
1160         if (!test_bit(WORK_ENABLE, &tp->flags))
1161                 return;
1162
1163         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1164                 return;
1165
1166         if (!skb_queue_empty(&tp->tx_queue))
1167                 napi_schedule(&tp->napi);
1168 }
1169
1170 static void intr_callback(struct urb *urb)
1171 {
1172         struct r8152 *tp;
1173         __le16 *d;
1174         int status = urb->status;
1175         int res;
1176
1177         tp = urb->context;
1178         if (!tp)
1179                 return;
1180
1181         if (!test_bit(WORK_ENABLE, &tp->flags))
1182                 return;
1183
1184         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1185                 return;
1186
1187         switch (status) {
1188         case 0:                 /* success */
1189                 break;
1190         case -ECONNRESET:       /* unlink */
1191         case -ESHUTDOWN:
1192                 netif_device_detach(tp->netdev);
1193         case -ENOENT:
1194         case -EPROTO:
1195                 netif_info(tp, intr, tp->netdev,
1196                            "Stop submitting intr, status %d\n", status);
1197                 return;
1198         case -EOVERFLOW:
1199                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1200                 goto resubmit;
1201         /* -EPIPE:  should clear the halt */
1202         default:
1203                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1204                 goto resubmit;
1205         }
1206
1207         d = urb->transfer_buffer;
1208         if (INTR_LINK & __le16_to_cpu(d[0])) {
1209                 if (!netif_carrier_ok(tp->netdev)) {
1210                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1211                         schedule_delayed_work(&tp->schedule, 0);
1212                 }
1213         } else {
1214                 if (netif_carrier_ok(tp->netdev)) {
1215                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1216                         schedule_delayed_work(&tp->schedule, 0);
1217                 }
1218         }
1219
1220 resubmit:
1221         res = usb_submit_urb(urb, GFP_ATOMIC);
1222         if (res == -ENODEV) {
1223                 set_bit(RTL8152_UNPLUG, &tp->flags);
1224                 netif_device_detach(tp->netdev);
1225         } else if (res) {
1226                 netif_err(tp, intr, tp->netdev,
1227                           "can't resubmit intr, status %d\n", res);
1228         }
1229 }
1230
1231 static inline void *rx_agg_align(void *data)
1232 {
1233         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1234 }
1235
1236 static inline void *tx_agg_align(void *data)
1237 {
1238         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1239 }
1240
1241 static void free_all_mem(struct r8152 *tp)
1242 {
1243         int i;
1244
1245         for (i = 0; i < RTL8152_MAX_RX; i++) {
1246                 usb_free_urb(tp->rx_info[i].urb);
1247                 tp->rx_info[i].urb = NULL;
1248
1249                 kfree(tp->rx_info[i].buffer);
1250                 tp->rx_info[i].buffer = NULL;
1251                 tp->rx_info[i].head = NULL;
1252         }
1253
1254         for (i = 0; i < RTL8152_MAX_TX; i++) {
1255                 usb_free_urb(tp->tx_info[i].urb);
1256                 tp->tx_info[i].urb = NULL;
1257
1258                 kfree(tp->tx_info[i].buffer);
1259                 tp->tx_info[i].buffer = NULL;
1260                 tp->tx_info[i].head = NULL;
1261         }
1262
1263         usb_free_urb(tp->intr_urb);
1264         tp->intr_urb = NULL;
1265
1266         kfree(tp->intr_buff);
1267         tp->intr_buff = NULL;
1268 }
1269
1270 static int alloc_all_mem(struct r8152 *tp)
1271 {
1272         struct net_device *netdev = tp->netdev;
1273         struct usb_interface *intf = tp->intf;
1274         struct usb_host_interface *alt = intf->cur_altsetting;
1275         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1276         struct urb *urb;
1277         int node, i;
1278         u8 *buf;
1279
1280         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1281
1282         spin_lock_init(&tp->rx_lock);
1283         spin_lock_init(&tp->tx_lock);
1284         INIT_LIST_HEAD(&tp->tx_free);
1285         skb_queue_head_init(&tp->tx_queue);
1286         skb_queue_head_init(&tp->rx_queue);
1287
1288         for (i = 0; i < RTL8152_MAX_RX; i++) {
1289                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1290                 if (!buf)
1291                         goto err1;
1292
1293                 if (buf != rx_agg_align(buf)) {
1294                         kfree(buf);
1295                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1296                                            node);
1297                         if (!buf)
1298                                 goto err1;
1299                 }
1300
1301                 urb = usb_alloc_urb(0, GFP_KERNEL);
1302                 if (!urb) {
1303                         kfree(buf);
1304                         goto err1;
1305                 }
1306
1307                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1308                 tp->rx_info[i].context = tp;
1309                 tp->rx_info[i].urb = urb;
1310                 tp->rx_info[i].buffer = buf;
1311                 tp->rx_info[i].head = rx_agg_align(buf);
1312         }
1313
1314         for (i = 0; i < RTL8152_MAX_TX; i++) {
1315                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1316                 if (!buf)
1317                         goto err1;
1318
1319                 if (buf != tx_agg_align(buf)) {
1320                         kfree(buf);
1321                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1322                                            node);
1323                         if (!buf)
1324                                 goto err1;
1325                 }
1326
1327                 urb = usb_alloc_urb(0, GFP_KERNEL);
1328                 if (!urb) {
1329                         kfree(buf);
1330                         goto err1;
1331                 }
1332
1333                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1334                 tp->tx_info[i].context = tp;
1335                 tp->tx_info[i].urb = urb;
1336                 tp->tx_info[i].buffer = buf;
1337                 tp->tx_info[i].head = tx_agg_align(buf);
1338
1339                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1340         }
1341
1342         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1343         if (!tp->intr_urb)
1344                 goto err1;
1345
1346         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1347         if (!tp->intr_buff)
1348                 goto err1;
1349
1350         tp->intr_interval = (int)ep_intr->desc.bInterval;
1351         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1352                          tp->intr_buff, INTBUFSIZE, intr_callback,
1353                          tp, tp->intr_interval);
1354
1355         return 0;
1356
1357 err1:
1358         free_all_mem(tp);
1359         return -ENOMEM;
1360 }
1361
1362 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1363 {
1364         struct tx_agg *agg = NULL;
1365         unsigned long flags;
1366
1367         if (list_empty(&tp->tx_free))
1368                 return NULL;
1369
1370         spin_lock_irqsave(&tp->tx_lock, flags);
1371         if (!list_empty(&tp->tx_free)) {
1372                 struct list_head *cursor;
1373
1374                 cursor = tp->tx_free.next;
1375                 list_del_init(cursor);
1376                 agg = list_entry(cursor, struct tx_agg, list);
1377         }
1378         spin_unlock_irqrestore(&tp->tx_lock, flags);
1379
1380         return agg;
1381 }
1382
1383 /* r8152_csum_workaround()
1384  * The hw limites the value the transport offset. When the offset is out of the
1385  * range, calculate the checksum by sw.
1386  */
1387 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1388                                   struct sk_buff_head *list)
1389 {
1390         if (skb_shinfo(skb)->gso_size) {
1391                 netdev_features_t features = tp->netdev->features;
1392                 struct sk_buff_head seg_list;
1393                 struct sk_buff *segs, *nskb;
1394
1395                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1396                 segs = skb_gso_segment(skb, features);
1397                 if (IS_ERR(segs) || !segs)
1398                         goto drop;
1399
1400                 __skb_queue_head_init(&seg_list);
1401
1402                 do {
1403                         nskb = segs;
1404                         segs = segs->next;
1405                         nskb->next = NULL;
1406                         __skb_queue_tail(&seg_list, nskb);
1407                 } while (segs);
1408
1409                 skb_queue_splice(&seg_list, list);
1410                 dev_kfree_skb(skb);
1411         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1412                 if (skb_checksum_help(skb) < 0)
1413                         goto drop;
1414
1415                 __skb_queue_head(list, skb);
1416         } else {
1417                 struct net_device_stats *stats;
1418
1419 drop:
1420                 stats = &tp->netdev->stats;
1421                 stats->tx_dropped++;
1422                 dev_kfree_skb(skb);
1423         }
1424 }
1425
1426 /* msdn_giant_send_check()
1427  * According to the document of microsoft, the TCP Pseudo Header excludes the
1428  * packet length for IPv6 TCP large packets.
1429  */
1430 static int msdn_giant_send_check(struct sk_buff *skb)
1431 {
1432         const struct ipv6hdr *ipv6h;
1433         struct tcphdr *th;
1434         int ret;
1435
1436         ret = skb_cow_head(skb, 0);
1437         if (ret)
1438                 return ret;
1439
1440         ipv6h = ipv6_hdr(skb);
1441         th = tcp_hdr(skb);
1442
1443         th->check = 0;
1444         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1445
1446         return ret;
1447 }
1448
1449 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1450 {
1451         if (skb_vlan_tag_present(skb)) {
1452                 u32 opts2;
1453
1454                 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1455                 desc->opts2 |= cpu_to_le32(opts2);
1456         }
1457 }
1458
1459 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1460 {
1461         u32 opts2 = le32_to_cpu(desc->opts2);
1462
1463         if (opts2 & RX_VLAN_TAG)
1464                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1465                                        swab16(opts2 & 0xffff));
1466 }
1467
1468 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1469                          struct sk_buff *skb, u32 len, u32 transport_offset)
1470 {
1471         u32 mss = skb_shinfo(skb)->gso_size;
1472         u32 opts1, opts2 = 0;
1473         int ret = TX_CSUM_SUCCESS;
1474
1475         WARN_ON_ONCE(len > TX_LEN_MAX);
1476
1477         opts1 = len | TX_FS | TX_LS;
1478
1479         if (mss) {
1480                 if (transport_offset > GTTCPHO_MAX) {
1481                         netif_warn(tp, tx_err, tp->netdev,
1482                                    "Invalid transport offset 0x%x for TSO\n",
1483                                    transport_offset);
1484                         ret = TX_CSUM_TSO;
1485                         goto unavailable;
1486                 }
1487
1488                 switch (vlan_get_protocol(skb)) {
1489                 case htons(ETH_P_IP):
1490                         opts1 |= GTSENDV4;
1491                         break;
1492
1493                 case htons(ETH_P_IPV6):
1494                         if (msdn_giant_send_check(skb)) {
1495                                 ret = TX_CSUM_TSO;
1496                                 goto unavailable;
1497                         }
1498                         opts1 |= GTSENDV6;
1499                         break;
1500
1501                 default:
1502                         WARN_ON_ONCE(1);
1503                         break;
1504                 }
1505
1506                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1507                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1508         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1509                 u8 ip_protocol;
1510
1511                 if (transport_offset > TCPHO_MAX) {
1512                         netif_warn(tp, tx_err, tp->netdev,
1513                                    "Invalid transport offset 0x%x\n",
1514                                    transport_offset);
1515                         ret = TX_CSUM_NONE;
1516                         goto unavailable;
1517                 }
1518
1519                 switch (vlan_get_protocol(skb)) {
1520                 case htons(ETH_P_IP):
1521                         opts2 |= IPV4_CS;
1522                         ip_protocol = ip_hdr(skb)->protocol;
1523                         break;
1524
1525                 case htons(ETH_P_IPV6):
1526                         opts2 |= IPV6_CS;
1527                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1528                         break;
1529
1530                 default:
1531                         ip_protocol = IPPROTO_RAW;
1532                         break;
1533                 }
1534
1535                 if (ip_protocol == IPPROTO_TCP)
1536                         opts2 |= TCP_CS;
1537                 else if (ip_protocol == IPPROTO_UDP)
1538                         opts2 |= UDP_CS;
1539                 else
1540                         WARN_ON_ONCE(1);
1541
1542                 opts2 |= transport_offset << TCPHO_SHIFT;
1543         }
1544
1545         desc->opts2 = cpu_to_le32(opts2);
1546         desc->opts1 = cpu_to_le32(opts1);
1547
1548 unavailable:
1549         return ret;
1550 }
1551
1552 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1553 {
1554         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1555         int remain, ret;
1556         u8 *tx_data;
1557
1558         __skb_queue_head_init(&skb_head);
1559         spin_lock(&tx_queue->lock);
1560         skb_queue_splice_init(tx_queue, &skb_head);
1561         spin_unlock(&tx_queue->lock);
1562
1563         tx_data = agg->head;
1564         agg->skb_num = 0;
1565         agg->skb_len = 0;
1566         remain = agg_buf_sz;
1567
1568         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1569                 struct tx_desc *tx_desc;
1570                 struct sk_buff *skb;
1571                 unsigned int len;
1572                 u32 offset;
1573
1574                 skb = __skb_dequeue(&skb_head);
1575                 if (!skb)
1576                         break;
1577
1578                 len = skb->len + sizeof(*tx_desc);
1579
1580                 if (len > remain) {
1581                         __skb_queue_head(&skb_head, skb);
1582                         break;
1583                 }
1584
1585                 tx_data = tx_agg_align(tx_data);
1586                 tx_desc = (struct tx_desc *)tx_data;
1587
1588                 offset = (u32)skb_transport_offset(skb);
1589
1590                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1591                         r8152_csum_workaround(tp, skb, &skb_head);
1592                         continue;
1593                 }
1594
1595                 rtl_tx_vlan_tag(tx_desc, skb);
1596
1597                 tx_data += sizeof(*tx_desc);
1598
1599                 len = skb->len;
1600                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1601                         struct net_device_stats *stats = &tp->netdev->stats;
1602
1603                         stats->tx_dropped++;
1604                         dev_kfree_skb_any(skb);
1605                         tx_data -= sizeof(*tx_desc);
1606                         continue;
1607                 }
1608
1609                 tx_data += len;
1610                 agg->skb_len += len;
1611                 agg->skb_num++;
1612
1613                 dev_kfree_skb_any(skb);
1614
1615                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1616         }
1617
1618         if (!skb_queue_empty(&skb_head)) {
1619                 spin_lock(&tx_queue->lock);
1620                 skb_queue_splice(&skb_head, tx_queue);
1621                 spin_unlock(&tx_queue->lock);
1622         }
1623
1624         netif_tx_lock(tp->netdev);
1625
1626         if (netif_queue_stopped(tp->netdev) &&
1627             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1628                 netif_wake_queue(tp->netdev);
1629
1630         netif_tx_unlock(tp->netdev);
1631
1632         ret = usb_autopm_get_interface_async(tp->intf);
1633         if (ret < 0)
1634                 goto out_tx_fill;
1635
1636         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1637                           agg->head, (int)(tx_data - (u8 *)agg->head),
1638                           (usb_complete_t)write_bulk_callback, agg);
1639
1640         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1641         if (ret < 0)
1642                 usb_autopm_put_interface_async(tp->intf);
1643
1644 out_tx_fill:
1645         return ret;
1646 }
1647
1648 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1649 {
1650         u8 checksum = CHECKSUM_NONE;
1651         u32 opts2, opts3;
1652
1653         if (tp->version == RTL_VER_01)
1654                 goto return_result;
1655
1656         opts2 = le32_to_cpu(rx_desc->opts2);
1657         opts3 = le32_to_cpu(rx_desc->opts3);
1658
1659         if (opts2 & RD_IPV4_CS) {
1660                 if (opts3 & IPF)
1661                         checksum = CHECKSUM_NONE;
1662                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1663                         checksum = CHECKSUM_NONE;
1664                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1665                         checksum = CHECKSUM_NONE;
1666                 else
1667                         checksum = CHECKSUM_UNNECESSARY;
1668         } else if (RD_IPV6_CS) {
1669                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1670                         checksum = CHECKSUM_UNNECESSARY;
1671                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1672                         checksum = CHECKSUM_UNNECESSARY;
1673         }
1674
1675 return_result:
1676         return checksum;
1677 }
1678
1679 static int rx_bottom(struct r8152 *tp, int budget)
1680 {
1681         unsigned long flags;
1682         struct list_head *cursor, *next, rx_queue;
1683         int ret = 0, work_done = 0;
1684
1685         if (!skb_queue_empty(&tp->rx_queue)) {
1686                 while (work_done < budget) {
1687                         struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1688                         struct net_device *netdev = tp->netdev;
1689                         struct net_device_stats *stats = &netdev->stats;
1690                         unsigned int pkt_len;
1691
1692                         if (!skb)
1693                                 break;
1694
1695                         pkt_len = skb->len;
1696                         napi_gro_receive(&tp->napi, skb);
1697                         work_done++;
1698                         stats->rx_packets++;
1699                         stats->rx_bytes += pkt_len;
1700                 }
1701         }
1702
1703         if (list_empty(&tp->rx_done))
1704                 goto out1;
1705
1706         INIT_LIST_HEAD(&rx_queue);
1707         spin_lock_irqsave(&tp->rx_lock, flags);
1708         list_splice_init(&tp->rx_done, &rx_queue);
1709         spin_unlock_irqrestore(&tp->rx_lock, flags);
1710
1711         list_for_each_safe(cursor, next, &rx_queue) {
1712                 struct rx_desc *rx_desc;
1713                 struct rx_agg *agg;
1714                 int len_used = 0;
1715                 struct urb *urb;
1716                 u8 *rx_data;
1717
1718                 list_del_init(cursor);
1719
1720                 agg = list_entry(cursor, struct rx_agg, list);
1721                 urb = agg->urb;
1722                 if (urb->actual_length < ETH_ZLEN)
1723                         goto submit;
1724
1725                 rx_desc = agg->head;
1726                 rx_data = agg->head;
1727                 len_used += sizeof(struct rx_desc);
1728
1729                 while (urb->actual_length > len_used) {
1730                         struct net_device *netdev = tp->netdev;
1731                         struct net_device_stats *stats = &netdev->stats;
1732                         unsigned int pkt_len;
1733                         struct sk_buff *skb;
1734
1735                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1736                         if (pkt_len < ETH_ZLEN)
1737                                 break;
1738
1739                         len_used += pkt_len;
1740                         if (urb->actual_length < len_used)
1741                                 break;
1742
1743                         pkt_len -= CRC_SIZE;
1744                         rx_data += sizeof(struct rx_desc);
1745
1746                         skb = napi_alloc_skb(&tp->napi, pkt_len);
1747                         if (!skb) {
1748                                 stats->rx_dropped++;
1749                                 goto find_next_rx;
1750                         }
1751
1752                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1753                         memcpy(skb->data, rx_data, pkt_len);
1754                         skb_put(skb, pkt_len);
1755                         skb->protocol = eth_type_trans(skb, netdev);
1756                         rtl_rx_vlan_tag(rx_desc, skb);
1757                         if (work_done < budget) {
1758                                 napi_gro_receive(&tp->napi, skb);
1759                                 work_done++;
1760                                 stats->rx_packets++;
1761                                 stats->rx_bytes += pkt_len;
1762                         } else {
1763                                 __skb_queue_tail(&tp->rx_queue, skb);
1764                         }
1765
1766 find_next_rx:
1767                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1768                         rx_desc = (struct rx_desc *)rx_data;
1769                         len_used = (int)(rx_data - (u8 *)agg->head);
1770                         len_used += sizeof(struct rx_desc);
1771                 }
1772
1773 submit:
1774                 if (!ret) {
1775                         ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1776                 } else {
1777                         urb->actual_length = 0;
1778                         list_add_tail(&agg->list, next);
1779                 }
1780         }
1781
1782         if (!list_empty(&rx_queue)) {
1783                 spin_lock_irqsave(&tp->rx_lock, flags);
1784                 list_splice_tail(&rx_queue, &tp->rx_done);
1785                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1786         }
1787
1788 out1:
1789         return work_done;
1790 }
1791
1792 static void tx_bottom(struct r8152 *tp)
1793 {
1794         int res;
1795
1796         do {
1797                 struct tx_agg *agg;
1798
1799                 if (skb_queue_empty(&tp->tx_queue))
1800                         break;
1801
1802                 agg = r8152_get_tx_agg(tp);
1803                 if (!agg)
1804                         break;
1805
1806                 res = r8152_tx_agg_fill(tp, agg);
1807                 if (res) {
1808                         struct net_device *netdev = tp->netdev;
1809
1810                         if (res == -ENODEV) {
1811                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1812                                 netif_device_detach(netdev);
1813                         } else {
1814                                 struct net_device_stats *stats = &netdev->stats;
1815                                 unsigned long flags;
1816
1817                                 netif_warn(tp, tx_err, netdev,
1818                                            "failed tx_urb %d\n", res);
1819                                 stats->tx_dropped += agg->skb_num;
1820
1821                                 spin_lock_irqsave(&tp->tx_lock, flags);
1822                                 list_add_tail(&agg->list, &tp->tx_free);
1823                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1824                         }
1825                 }
1826         } while (res == 0);
1827 }
1828
1829 static void bottom_half(struct r8152 *tp)
1830 {
1831         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1832                 return;
1833
1834         if (!test_bit(WORK_ENABLE, &tp->flags))
1835                 return;
1836
1837         /* When link down, the driver would cancel all bulks. */
1838         /* This avoid the re-submitting bulk */
1839         if (!netif_carrier_ok(tp->netdev))
1840                 return;
1841
1842         clear_bit(SCHEDULE_NAPI, &tp->flags);
1843
1844         tx_bottom(tp);
1845 }
1846
1847 static int r8152_poll(struct napi_struct *napi, int budget)
1848 {
1849         struct r8152 *tp = container_of(napi, struct r8152, napi);
1850         int work_done;
1851
1852         work_done = rx_bottom(tp, budget);
1853         bottom_half(tp);
1854
1855         if (work_done < budget) {
1856                 napi_complete(napi);
1857                 if (!list_empty(&tp->rx_done))
1858                         napi_schedule(napi);
1859         }
1860
1861         return work_done;
1862 }
1863
1864 static
1865 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1866 {
1867         int ret;
1868
1869         /* The rx would be stopped, so skip submitting */
1870         if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1871             !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1872                 return 0;
1873
1874         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1875                           agg->head, agg_buf_sz,
1876                           (usb_complete_t)read_bulk_callback, agg);
1877
1878         ret = usb_submit_urb(agg->urb, mem_flags);
1879         if (ret == -ENODEV) {
1880                 set_bit(RTL8152_UNPLUG, &tp->flags);
1881                 netif_device_detach(tp->netdev);
1882         } else if (ret) {
1883                 struct urb *urb = agg->urb;
1884                 unsigned long flags;
1885
1886                 urb->actual_length = 0;
1887                 spin_lock_irqsave(&tp->rx_lock, flags);
1888                 list_add_tail(&agg->list, &tp->rx_done);
1889                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1890
1891                 netif_err(tp, rx_err, tp->netdev,
1892                           "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1893
1894                 napi_schedule(&tp->napi);
1895         }
1896
1897         return ret;
1898 }
1899
1900 static void rtl_drop_queued_tx(struct r8152 *tp)
1901 {
1902         struct net_device_stats *stats = &tp->netdev->stats;
1903         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1904         struct sk_buff *skb;
1905
1906         if (skb_queue_empty(tx_queue))
1907                 return;
1908
1909         __skb_queue_head_init(&skb_head);
1910         spin_lock_bh(&tx_queue->lock);
1911         skb_queue_splice_init(tx_queue, &skb_head);
1912         spin_unlock_bh(&tx_queue->lock);
1913
1914         while ((skb = __skb_dequeue(&skb_head))) {
1915                 dev_kfree_skb(skb);
1916                 stats->tx_dropped++;
1917         }
1918 }
1919
1920 static void rtl8152_tx_timeout(struct net_device *netdev)
1921 {
1922         struct r8152 *tp = netdev_priv(netdev);
1923
1924         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1925
1926         usb_queue_reset_device(tp->intf);
1927 }
1928
1929 static void rtl8152_set_rx_mode(struct net_device *netdev)
1930 {
1931         struct r8152 *tp = netdev_priv(netdev);
1932
1933         if (netif_carrier_ok(netdev)) {
1934                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1935                 schedule_delayed_work(&tp->schedule, 0);
1936         }
1937 }
1938
1939 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1940 {
1941         struct r8152 *tp = netdev_priv(netdev);
1942         u32 mc_filter[2];       /* Multicast hash filter */
1943         __le32 tmp[2];
1944         u32 ocp_data;
1945
1946         netif_stop_queue(netdev);
1947         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1948         ocp_data &= ~RCR_ACPT_ALL;
1949         ocp_data |= RCR_AB | RCR_APM;
1950
1951         if (netdev->flags & IFF_PROMISC) {
1952                 /* Unconditionally log net taps. */
1953                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1954                 ocp_data |= RCR_AM | RCR_AAP;
1955                 mc_filter[1] = 0xffffffff;
1956                 mc_filter[0] = 0xffffffff;
1957         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1958                    (netdev->flags & IFF_ALLMULTI)) {
1959                 /* Too many to filter perfectly -- accept all multicasts. */
1960                 ocp_data |= RCR_AM;
1961                 mc_filter[1] = 0xffffffff;
1962                 mc_filter[0] = 0xffffffff;
1963         } else {
1964                 struct netdev_hw_addr *ha;
1965
1966                 mc_filter[1] = 0;
1967                 mc_filter[0] = 0;
1968                 netdev_for_each_mc_addr(ha, netdev) {
1969                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1970
1971                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1972                         ocp_data |= RCR_AM;
1973                 }
1974         }
1975
1976         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1977         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1978
1979         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1980         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1981         netif_wake_queue(netdev);
1982 }
1983
1984 static netdev_features_t
1985 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1986                        netdev_features_t features)
1987 {
1988         u32 mss = skb_shinfo(skb)->gso_size;
1989         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1990         int offset = skb_transport_offset(skb);
1991
1992         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1993                 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
1994         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
1995                 features &= ~NETIF_F_GSO_MASK;
1996
1997         return features;
1998 }
1999
2000 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2001                                       struct net_device *netdev)
2002 {
2003         struct r8152 *tp = netdev_priv(netdev);
2004
2005         skb_tx_timestamp(skb);
2006
2007         skb_queue_tail(&tp->tx_queue, skb);
2008
2009         if (!list_empty(&tp->tx_free)) {
2010                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2011                         set_bit(SCHEDULE_NAPI, &tp->flags);
2012                         schedule_delayed_work(&tp->schedule, 0);
2013                 } else {
2014                         usb_mark_last_busy(tp->udev);
2015                         napi_schedule(&tp->napi);
2016                 }
2017         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2018                 netif_stop_queue(netdev);
2019         }
2020
2021         return NETDEV_TX_OK;
2022 }
2023
2024 static void r8152b_reset_packet_filter(struct r8152 *tp)
2025 {
2026         u32     ocp_data;
2027
2028         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2029         ocp_data &= ~FMC_FCR_MCU_EN;
2030         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2031         ocp_data |= FMC_FCR_MCU_EN;
2032         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2033 }
2034
2035 static void rtl8152_nic_reset(struct r8152 *tp)
2036 {
2037         int     i;
2038
2039         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2040
2041         for (i = 0; i < 1000; i++) {
2042                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2043                         break;
2044                 usleep_range(100, 400);
2045         }
2046 }
2047
2048 static void set_tx_qlen(struct r8152 *tp)
2049 {
2050         struct net_device *netdev = tp->netdev;
2051
2052         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2053                                     sizeof(struct tx_desc));
2054 }
2055
2056 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2057 {
2058         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2059 }
2060
2061 static void rtl_set_eee_plus(struct r8152 *tp)
2062 {
2063         u32 ocp_data;
2064         u8 speed;
2065
2066         speed = rtl8152_get_speed(tp);
2067         if (speed & _10bps) {
2068                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2069                 ocp_data |= EEEP_CR_EEEP_TX;
2070                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2071         } else {
2072                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2073                 ocp_data &= ~EEEP_CR_EEEP_TX;
2074                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2075         }
2076 }
2077
2078 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2079 {
2080         u32 ocp_data;
2081
2082         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2083         if (enable)
2084                 ocp_data |= RXDY_GATED_EN;
2085         else
2086                 ocp_data &= ~RXDY_GATED_EN;
2087         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2088 }
2089
2090 static int rtl_start_rx(struct r8152 *tp)
2091 {
2092         int i, ret = 0;
2093
2094         INIT_LIST_HEAD(&tp->rx_done);
2095         for (i = 0; i < RTL8152_MAX_RX; i++) {
2096                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2097                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2098                 if (ret)
2099                         break;
2100         }
2101
2102         if (ret && ++i < RTL8152_MAX_RX) {
2103                 struct list_head rx_queue;
2104                 unsigned long flags;
2105
2106                 INIT_LIST_HEAD(&rx_queue);
2107
2108                 do {
2109                         struct rx_agg *agg = &tp->rx_info[i++];
2110                         struct urb *urb = agg->urb;
2111
2112                         urb->actual_length = 0;
2113                         list_add_tail(&agg->list, &rx_queue);
2114                 } while (i < RTL8152_MAX_RX);
2115
2116                 spin_lock_irqsave(&tp->rx_lock, flags);
2117                 list_splice_tail(&rx_queue, &tp->rx_done);
2118                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2119         }
2120
2121         return ret;
2122 }
2123
2124 static int rtl_stop_rx(struct r8152 *tp)
2125 {
2126         int i;
2127
2128         for (i = 0; i < RTL8152_MAX_RX; i++)
2129                 usb_kill_urb(tp->rx_info[i].urb);
2130
2131         while (!skb_queue_empty(&tp->rx_queue))
2132                 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2133
2134         return 0;
2135 }
2136
2137 static int rtl_enable(struct r8152 *tp)
2138 {
2139         u32 ocp_data;
2140
2141         r8152b_reset_packet_filter(tp);
2142
2143         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2144         ocp_data |= CR_RE | CR_TE;
2145         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2146
2147         rxdy_gated_en(tp, false);
2148
2149         return 0;
2150 }
2151
2152 static int rtl8152_enable(struct r8152 *tp)
2153 {
2154         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2155                 return -ENODEV;
2156
2157         set_tx_qlen(tp);
2158         rtl_set_eee_plus(tp);
2159
2160         return rtl_enable(tp);
2161 }
2162
2163 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2164 {
2165         u32 ocp_data = tp->coalesce / 8;
2166
2167         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2168 }
2169
2170 static void r8153_set_rx_early_size(struct r8152 *tp)
2171 {
2172         u32 mtu = tp->netdev->mtu;
2173         u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
2174
2175         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2176 }
2177
2178 static int rtl8153_enable(struct r8152 *tp)
2179 {
2180         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2181                 return -ENODEV;
2182
2183         usb_disable_lpm(tp->udev);
2184         set_tx_qlen(tp);
2185         rtl_set_eee_plus(tp);
2186         r8153_set_rx_early_timeout(tp);
2187         r8153_set_rx_early_size(tp);
2188
2189         return rtl_enable(tp);
2190 }
2191
2192 static void rtl_disable(struct r8152 *tp)
2193 {
2194         u32 ocp_data;
2195         int i;
2196
2197         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2198                 rtl_drop_queued_tx(tp);
2199                 return;
2200         }
2201
2202         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2203         ocp_data &= ~RCR_ACPT_ALL;
2204         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2205
2206         rtl_drop_queued_tx(tp);
2207
2208         for (i = 0; i < RTL8152_MAX_TX; i++)
2209                 usb_kill_urb(tp->tx_info[i].urb);
2210
2211         rxdy_gated_en(tp, true);
2212
2213         for (i = 0; i < 1000; i++) {
2214                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2215                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2216                         break;
2217                 usleep_range(1000, 2000);
2218         }
2219
2220         for (i = 0; i < 1000; i++) {
2221                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2222                         break;
2223                 usleep_range(1000, 2000);
2224         }
2225
2226         rtl_stop_rx(tp);
2227
2228         rtl8152_nic_reset(tp);
2229 }
2230
2231 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2232 {
2233         u32 ocp_data;
2234
2235         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2236         if (enable)
2237                 ocp_data |= POWER_CUT;
2238         else
2239                 ocp_data &= ~POWER_CUT;
2240         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2241
2242         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2243         ocp_data &= ~RESUME_INDICATE;
2244         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2245 }
2246
2247 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2248 {
2249         u32 ocp_data;
2250
2251         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2252         if (enable)
2253                 ocp_data |= CPCR_RX_VLAN;
2254         else
2255                 ocp_data &= ~CPCR_RX_VLAN;
2256         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2257 }
2258
2259 static int rtl8152_set_features(struct net_device *dev,
2260                                 netdev_features_t features)
2261 {
2262         netdev_features_t changed = features ^ dev->features;
2263         struct r8152 *tp = netdev_priv(dev);
2264         int ret;
2265
2266         ret = usb_autopm_get_interface(tp->intf);
2267         if (ret < 0)
2268                 goto out;
2269
2270         mutex_lock(&tp->control);
2271
2272         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2273                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2274                         rtl_rx_vlan_en(tp, true);
2275                 else
2276                         rtl_rx_vlan_en(tp, false);
2277         }
2278
2279         mutex_unlock(&tp->control);
2280
2281         usb_autopm_put_interface(tp->intf);
2282
2283 out:
2284         return ret;
2285 }
2286
2287 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2288
2289 static u32 __rtl_get_wol(struct r8152 *tp)
2290 {
2291         u32 ocp_data;
2292         u32 wolopts = 0;
2293
2294         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2295         if (!(ocp_data & LAN_WAKE_EN))
2296                 return 0;
2297
2298         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2299         if (ocp_data & LINK_ON_WAKE_EN)
2300                 wolopts |= WAKE_PHY;
2301
2302         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2303         if (ocp_data & UWF_EN)
2304                 wolopts |= WAKE_UCAST;
2305         if (ocp_data & BWF_EN)
2306                 wolopts |= WAKE_BCAST;
2307         if (ocp_data & MWF_EN)
2308                 wolopts |= WAKE_MCAST;
2309
2310         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2311         if (ocp_data & MAGIC_EN)
2312                 wolopts |= WAKE_MAGIC;
2313
2314         return wolopts;
2315 }
2316
2317 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2318 {
2319         u32 ocp_data;
2320
2321         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2322
2323         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2324         ocp_data &= ~LINK_ON_WAKE_EN;
2325         if (wolopts & WAKE_PHY)
2326                 ocp_data |= LINK_ON_WAKE_EN;
2327         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2328
2329         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2330         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2331         if (wolopts & WAKE_UCAST)
2332                 ocp_data |= UWF_EN;
2333         if (wolopts & WAKE_BCAST)
2334                 ocp_data |= BWF_EN;
2335         if (wolopts & WAKE_MCAST)
2336                 ocp_data |= MWF_EN;
2337         if (wolopts & WAKE_ANY)
2338                 ocp_data |= LAN_WAKE_EN;
2339         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2340
2341         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2342
2343         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2344         ocp_data &= ~MAGIC_EN;
2345         if (wolopts & WAKE_MAGIC)
2346                 ocp_data |= MAGIC_EN;
2347         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2348
2349         if (wolopts & WAKE_ANY)
2350                 device_set_wakeup_enable(&tp->udev->dev, true);
2351         else
2352                 device_set_wakeup_enable(&tp->udev->dev, false);
2353 }
2354
2355 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2356 {
2357         u8 u1u2[8];
2358
2359         if (enable)
2360                 memset(u1u2, 0xff, sizeof(u1u2));
2361         else
2362                 memset(u1u2, 0x00, sizeof(u1u2));
2363
2364         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2365 }
2366
2367 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2368 {
2369         u32 ocp_data;
2370
2371         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2372         if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2373                 ocp_data |= U2P3_ENABLE;
2374         else
2375                 ocp_data &= ~U2P3_ENABLE;
2376         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2377 }
2378
2379 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2380 {
2381         u32 ocp_data;
2382
2383         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2384         if (enable)
2385                 ocp_data |= PWR_EN | PHASE2_EN;
2386         else
2387                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2388         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2389
2390         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2391         ocp_data &= ~PCUT_STATUS;
2392         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2393 }
2394
2395 static bool rtl_can_wakeup(struct r8152 *tp)
2396 {
2397         struct usb_device *udev = tp->udev;
2398
2399         return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2400 }
2401
2402 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2403 {
2404         if (enable) {
2405                 u32 ocp_data;
2406
2407                 r8153_u1u2en(tp, false);
2408                 r8153_u2p3en(tp, false);
2409
2410                 __rtl_set_wol(tp, WAKE_ANY);
2411
2412                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2413
2414                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2415                 ocp_data |= LINK_OFF_WAKE_EN;
2416                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2417
2418                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2419         } else {
2420                 __rtl_set_wol(tp, tp->saved_wolopts);
2421                 r8153_u2p3en(tp, true);
2422                 r8153_u1u2en(tp, true);
2423         }
2424 }
2425
2426 static void rtl_phy_reset(struct r8152 *tp)
2427 {
2428         u16 data;
2429         int i;
2430
2431         data = r8152_mdio_read(tp, MII_BMCR);
2432
2433         /* don't reset again before the previous one complete */
2434         if (data & BMCR_RESET)
2435                 return;
2436
2437         data |= BMCR_RESET;
2438         r8152_mdio_write(tp, MII_BMCR, data);
2439
2440         for (i = 0; i < 50; i++) {
2441                 msleep(20);
2442                 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2443                         break;
2444         }
2445 }
2446
2447 static void r8153_teredo_off(struct r8152 *tp)
2448 {
2449         u32 ocp_data;
2450
2451         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2452         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2453         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2454
2455         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2456         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2457         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2458 }
2459
2460 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2461 {
2462         if (enable) {
2463                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2464                                                     LINKENA | DIS_SDSAVE);
2465         } else {
2466                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2467                                                     DIS_SDSAVE);
2468                 msleep(20);
2469         }
2470 }
2471
2472 static void rtl8152_disable(struct r8152 *tp)
2473 {
2474         r8152_aldps_en(tp, false);
2475         rtl_disable(tp);
2476         r8152_aldps_en(tp, true);
2477 }
2478
2479 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2480 {
2481         u16 data;
2482
2483         data = r8152_mdio_read(tp, MII_BMCR);
2484         if (data & BMCR_PDOWN) {
2485                 data &= ~BMCR_PDOWN;
2486                 r8152_mdio_write(tp, MII_BMCR, data);
2487         }
2488
2489         set_bit(PHY_RESET, &tp->flags);
2490 }
2491
2492 static void r8152b_exit_oob(struct r8152 *tp)
2493 {
2494         u32 ocp_data;
2495         int i;
2496
2497         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2498         ocp_data &= ~RCR_ACPT_ALL;
2499         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2500
2501         rxdy_gated_en(tp, true);
2502         r8153_teredo_off(tp);
2503         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2504         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2505
2506         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2507         ocp_data &= ~NOW_IS_OOB;
2508         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2509
2510         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2511         ocp_data &= ~MCU_BORW_EN;
2512         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2513
2514         for (i = 0; i < 1000; i++) {
2515                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2516                 if (ocp_data & LINK_LIST_READY)
2517                         break;
2518                 usleep_range(1000, 2000);
2519         }
2520
2521         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2522         ocp_data |= RE_INIT_LL;
2523         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2524
2525         for (i = 0; i < 1000; i++) {
2526                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2527                 if (ocp_data & LINK_LIST_READY)
2528                         break;
2529                 usleep_range(1000, 2000);
2530         }
2531
2532         rtl8152_nic_reset(tp);
2533
2534         /* rx share fifo credit full threshold */
2535         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2536
2537         if (tp->udev->speed == USB_SPEED_FULL ||
2538             tp->udev->speed == USB_SPEED_LOW) {
2539                 /* rx share fifo credit near full threshold */
2540                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2541                                 RXFIFO_THR2_FULL);
2542                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2543                                 RXFIFO_THR3_FULL);
2544         } else {
2545                 /* rx share fifo credit near full threshold */
2546                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2547                                 RXFIFO_THR2_HIGH);
2548                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2549                                 RXFIFO_THR3_HIGH);
2550         }
2551
2552         /* TX share fifo free credit full threshold */
2553         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2554
2555         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2556         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2557         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2558                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2559
2560         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2561
2562         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2563
2564         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2565         ocp_data |= TCR0_AUTO_FIFO;
2566         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2567 }
2568
2569 static void r8152b_enter_oob(struct r8152 *tp)
2570 {
2571         u32 ocp_data;
2572         int i;
2573
2574         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2575         ocp_data &= ~NOW_IS_OOB;
2576         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2577
2578         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2579         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2580         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2581
2582         rtl_disable(tp);
2583
2584         for (i = 0; i < 1000; i++) {
2585                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2586                 if (ocp_data & LINK_LIST_READY)
2587                         break;
2588                 usleep_range(1000, 2000);
2589         }
2590
2591         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2592         ocp_data |= RE_INIT_LL;
2593         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2594
2595         for (i = 0; i < 1000; i++) {
2596                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2597                 if (ocp_data & LINK_LIST_READY)
2598                         break;
2599                 usleep_range(1000, 2000);
2600         }
2601
2602         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2603
2604         rtl_rx_vlan_en(tp, true);
2605
2606         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2607         ocp_data |= ALDPS_PROXY_MODE;
2608         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2609
2610         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2611         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2612         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2613
2614         rxdy_gated_en(tp, false);
2615
2616         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2617         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2618         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2619 }
2620
2621 static void r8153_hw_phy_cfg(struct r8152 *tp)
2622 {
2623         u32 ocp_data;
2624         u16 data;
2625
2626         if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
2627             tp->version == RTL_VER_05)
2628                 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2629
2630         data = r8152_mdio_read(tp, MII_BMCR);
2631         if (data & BMCR_PDOWN) {
2632                 data &= ~BMCR_PDOWN;
2633                 r8152_mdio_write(tp, MII_BMCR, data);
2634         }
2635
2636         if (tp->version == RTL_VER_03) {
2637                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2638                 data &= ~CTAP_SHORT_EN;
2639                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2640         }
2641
2642         data = ocp_reg_read(tp, OCP_POWER_CFG);
2643         data |= EEE_CLKDIV_EN;
2644         ocp_reg_write(tp, OCP_POWER_CFG, data);
2645
2646         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2647         data |= EN_10M_BGOFF;
2648         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2649         data = ocp_reg_read(tp, OCP_POWER_CFG);
2650         data |= EN_10M_PLLOFF;
2651         ocp_reg_write(tp, OCP_POWER_CFG, data);
2652         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2653
2654         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2655         ocp_data |= PFM_PWM_SWITCH;
2656         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2657
2658         /* Enable LPF corner auto tune */
2659         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2660
2661         /* Adjust 10M Amplitude */
2662         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2663         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2664
2665         set_bit(PHY_RESET, &tp->flags);
2666 }
2667
2668 static void r8153_first_init(struct r8152 *tp)
2669 {
2670         u32 ocp_data;
2671         int i;
2672
2673         rxdy_gated_en(tp, true);
2674         r8153_teredo_off(tp);
2675
2676         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2677         ocp_data &= ~RCR_ACPT_ALL;
2678         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2679
2680         rtl8152_nic_reset(tp);
2681
2682         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2683         ocp_data &= ~NOW_IS_OOB;
2684         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2685
2686         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2687         ocp_data &= ~MCU_BORW_EN;
2688         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2689
2690         for (i = 0; i < 1000; i++) {
2691                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2692                 if (ocp_data & LINK_LIST_READY)
2693                         break;
2694                 usleep_range(1000, 2000);
2695         }
2696
2697         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2698         ocp_data |= RE_INIT_LL;
2699         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2700
2701         for (i = 0; i < 1000; i++) {
2702                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2703                 if (ocp_data & LINK_LIST_READY)
2704                         break;
2705                 usleep_range(1000, 2000);
2706         }
2707
2708         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2709
2710         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2711         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2712
2713         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2714         ocp_data |= TCR0_AUTO_FIFO;
2715         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2716
2717         rtl8152_nic_reset(tp);
2718
2719         /* rx share fifo credit full threshold */
2720         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2721         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2722         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2723         /* TX share fifo free credit full threshold */
2724         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2725
2726         /* rx aggregation */
2727         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2728         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2729         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2730 }
2731
2732 static void r8153_enter_oob(struct r8152 *tp)
2733 {
2734         u32 ocp_data;
2735         int i;
2736
2737         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2738         ocp_data &= ~NOW_IS_OOB;
2739         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2740
2741         rtl_disable(tp);
2742
2743         for (i = 0; i < 1000; i++) {
2744                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2745                 if (ocp_data & LINK_LIST_READY)
2746                         break;
2747                 usleep_range(1000, 2000);
2748         }
2749
2750         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2751         ocp_data |= RE_INIT_LL;
2752         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2753
2754         for (i = 0; i < 1000; i++) {
2755                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2756                 if (ocp_data & LINK_LIST_READY)
2757                         break;
2758                 usleep_range(1000, 2000);
2759         }
2760
2761         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2762
2763         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2764         ocp_data &= ~TEREDO_WAKE_MASK;
2765         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2766
2767         rtl_rx_vlan_en(tp, true);
2768
2769         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2770         ocp_data |= ALDPS_PROXY_MODE;
2771         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2772
2773         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2774         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2775         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2776
2777         rxdy_gated_en(tp, false);
2778
2779         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2780         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2781         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2782 }
2783
2784 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2785 {
2786         u16 data;
2787
2788         data = ocp_reg_read(tp, OCP_POWER_CFG);
2789         if (enable) {
2790                 data |= EN_ALDPS;
2791                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2792         } else {
2793                 data &= ~EN_ALDPS;
2794                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2795                 msleep(20);
2796         }
2797 }
2798
2799 static void rtl8153_disable(struct r8152 *tp)
2800 {
2801         r8153_aldps_en(tp, false);
2802         rtl_disable(tp);
2803         r8153_aldps_en(tp, true);
2804         usb_enable_lpm(tp->udev);
2805 }
2806
2807 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2808 {
2809         u16 bmcr, anar, gbcr;
2810         int ret = 0;
2811
2812         cancel_delayed_work_sync(&tp->schedule);
2813         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2814         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2815                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2816         if (tp->mii.supports_gmii) {
2817                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2818                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2819         } else {
2820                 gbcr = 0;
2821         }
2822
2823         if (autoneg == AUTONEG_DISABLE) {
2824                 if (speed == SPEED_10) {
2825                         bmcr = 0;
2826                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2827                 } else if (speed == SPEED_100) {
2828                         bmcr = BMCR_SPEED100;
2829                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2830                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2831                         bmcr = BMCR_SPEED1000;
2832                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2833                 } else {
2834                         ret = -EINVAL;
2835                         goto out;
2836                 }
2837
2838                 if (duplex == DUPLEX_FULL)
2839                         bmcr |= BMCR_FULLDPLX;
2840         } else {
2841                 if (speed == SPEED_10) {
2842                         if (duplex == DUPLEX_FULL)
2843                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2844                         else
2845                                 anar |= ADVERTISE_10HALF;
2846                 } else if (speed == SPEED_100) {
2847                         if (duplex == DUPLEX_FULL) {
2848                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2849                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2850                         } else {
2851                                 anar |= ADVERTISE_10HALF;
2852                                 anar |= ADVERTISE_100HALF;
2853                         }
2854                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2855                         if (duplex == DUPLEX_FULL) {
2856                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2857                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2858                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2859                         } else {
2860                                 anar |= ADVERTISE_10HALF;
2861                                 anar |= ADVERTISE_100HALF;
2862                                 gbcr |= ADVERTISE_1000HALF;
2863                         }
2864                 } else {
2865                         ret = -EINVAL;
2866                         goto out;
2867                 }
2868
2869                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2870         }
2871
2872         if (test_bit(PHY_RESET, &tp->flags))
2873                 bmcr |= BMCR_RESET;
2874
2875         if (tp->mii.supports_gmii)
2876                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2877
2878         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2879         r8152_mdio_write(tp, MII_BMCR, bmcr);
2880
2881         if (test_and_clear_bit(PHY_RESET, &tp->flags)) {
2882                 int i;
2883
2884                 for (i = 0; i < 50; i++) {
2885                         msleep(20);
2886                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2887                                 break;
2888                 }
2889         }
2890
2891 out:
2892         return ret;
2893 }
2894
2895 static void rtl8152_up(struct r8152 *tp)
2896 {
2897         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2898                 return;
2899
2900         r8152_aldps_en(tp, false);
2901         r8152b_exit_oob(tp);
2902         r8152_aldps_en(tp, true);
2903 }
2904
2905 static void rtl8152_down(struct r8152 *tp)
2906 {
2907         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2908                 rtl_drop_queued_tx(tp);
2909                 return;
2910         }
2911
2912         r8152_power_cut_en(tp, false);
2913         r8152_aldps_en(tp, false);
2914         r8152b_enter_oob(tp);
2915         r8152_aldps_en(tp, true);
2916 }
2917
2918 static void rtl8153_up(struct r8152 *tp)
2919 {
2920         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2921                 return;
2922
2923         r8153_u1u2en(tp, false);
2924         r8153_aldps_en(tp, false);
2925         r8153_first_init(tp);
2926         r8153_aldps_en(tp, true);
2927         r8153_u2p3en(tp, true);
2928         r8153_u1u2en(tp, true);
2929         usb_enable_lpm(tp->udev);
2930 }
2931
2932 static void rtl8153_down(struct r8152 *tp)
2933 {
2934         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2935                 rtl_drop_queued_tx(tp);
2936                 return;
2937         }
2938
2939         r8153_u1u2en(tp, false);
2940         r8153_u2p3en(tp, false);
2941         r8153_power_cut_en(tp, false);
2942         r8153_aldps_en(tp, false);
2943         r8153_enter_oob(tp);
2944         r8153_aldps_en(tp, true);
2945 }
2946
2947 static bool rtl8152_in_nway(struct r8152 *tp)
2948 {
2949         u16 nway_state;
2950
2951         ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
2952         tp->ocp_base = 0x2000;
2953         ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c);         /* phy state */
2954         nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
2955
2956         /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
2957         if (nway_state & 0xc000)
2958                 return false;
2959         else
2960                 return true;
2961 }
2962
2963 static bool rtl8153_in_nway(struct r8152 *tp)
2964 {
2965         u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
2966
2967         if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
2968                 return false;
2969         else
2970                 return true;
2971 }
2972
2973 static void set_carrier(struct r8152 *tp)
2974 {
2975         struct net_device *netdev = tp->netdev;
2976         u8 speed;
2977
2978         speed = rtl8152_get_speed(tp);
2979
2980         if (speed & LINK_STATUS) {
2981                 if (!netif_carrier_ok(netdev)) {
2982                         tp->rtl_ops.enable(tp);
2983                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2984                         napi_disable(&tp->napi);
2985                         netif_carrier_on(netdev);
2986                         rtl_start_rx(tp);
2987                         napi_enable(&tp->napi);
2988                 }
2989         } else {
2990                 if (netif_carrier_ok(netdev)) {
2991                         netif_carrier_off(netdev);
2992                         napi_disable(&tp->napi);
2993                         tp->rtl_ops.disable(tp);
2994                         napi_enable(&tp->napi);
2995                 }
2996         }
2997 }
2998
2999 static void rtl_work_func_t(struct work_struct *work)
3000 {
3001         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3002
3003         /* If the device is unplugged or !netif_running(), the workqueue
3004          * doesn't need to wake the device, and could return directly.
3005          */
3006         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3007                 return;
3008
3009         if (usb_autopm_get_interface(tp->intf) < 0)
3010                 return;
3011
3012         if (!test_bit(WORK_ENABLE, &tp->flags))
3013                 goto out1;
3014
3015         if (!mutex_trylock(&tp->control)) {
3016                 schedule_delayed_work(&tp->schedule, 0);
3017                 goto out1;
3018         }
3019
3020         if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3021                 set_carrier(tp);
3022
3023         if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3024                 _rtl8152_set_rx_mode(tp->netdev);
3025
3026         /* don't schedule napi before linking */
3027         if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3028             netif_carrier_ok(tp->netdev))
3029                 napi_schedule(&tp->napi);
3030
3031         if (test_and_clear_bit(PHY_RESET, &tp->flags))
3032                 rtl_phy_reset(tp);
3033
3034         mutex_unlock(&tp->control);
3035
3036 out1:
3037         usb_autopm_put_interface(tp->intf);
3038 }
3039
3040 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3041 {
3042         struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3043
3044         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3045                 return;
3046
3047         if (usb_autopm_get_interface(tp->intf) < 0)
3048                 return;
3049
3050         mutex_lock(&tp->control);
3051
3052         tp->rtl_ops.hw_phy_cfg(tp);
3053
3054         mutex_unlock(&tp->control);
3055
3056         usb_autopm_put_interface(tp->intf);
3057 }
3058
3059 #ifdef CONFIG_PM_SLEEP
3060 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3061                         void *data)
3062 {
3063         struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3064
3065         switch (action) {
3066         case PM_HIBERNATION_PREPARE:
3067         case PM_SUSPEND_PREPARE:
3068                 usb_autopm_get_interface(tp->intf);
3069                 break;
3070
3071         case PM_POST_HIBERNATION:
3072         case PM_POST_SUSPEND:
3073                 usb_autopm_put_interface(tp->intf);
3074                 break;
3075
3076         case PM_POST_RESTORE:
3077         case PM_RESTORE_PREPARE:
3078         default:
3079                 break;
3080         }
3081
3082         return NOTIFY_DONE;
3083 }
3084 #endif
3085
3086 static int rtl8152_open(struct net_device *netdev)
3087 {
3088         struct r8152 *tp = netdev_priv(netdev);
3089         int res = 0;
3090
3091         res = alloc_all_mem(tp);
3092         if (res)
3093                 goto out;
3094
3095         netif_carrier_off(netdev);
3096
3097         res = usb_autopm_get_interface(tp->intf);
3098         if (res < 0) {
3099                 free_all_mem(tp);
3100                 goto out;
3101         }
3102
3103         mutex_lock(&tp->control);
3104
3105         tp->rtl_ops.up(tp);
3106
3107         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3108                           tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3109                           DUPLEX_FULL);
3110         netif_carrier_off(netdev);
3111         netif_start_queue(netdev);
3112         set_bit(WORK_ENABLE, &tp->flags);
3113
3114         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3115         if (res) {
3116                 if (res == -ENODEV)
3117                         netif_device_detach(tp->netdev);
3118                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3119                            res);
3120                 free_all_mem(tp);
3121         } else {
3122                 napi_enable(&tp->napi);
3123         }
3124
3125         mutex_unlock(&tp->control);
3126
3127         usb_autopm_put_interface(tp->intf);
3128 #ifdef CONFIG_PM_SLEEP
3129         tp->pm_notifier.notifier_call = rtl_notifier;
3130         register_pm_notifier(&tp->pm_notifier);
3131 #endif
3132
3133 out:
3134         return res;
3135 }
3136
3137 static int rtl8152_close(struct net_device *netdev)
3138 {
3139         struct r8152 *tp = netdev_priv(netdev);
3140         int res = 0;
3141
3142 #ifdef CONFIG_PM_SLEEP
3143         unregister_pm_notifier(&tp->pm_notifier);
3144 #endif
3145         napi_disable(&tp->napi);
3146         clear_bit(WORK_ENABLE, &tp->flags);
3147         usb_kill_urb(tp->intr_urb);
3148         cancel_delayed_work_sync(&tp->schedule);
3149         netif_stop_queue(netdev);
3150
3151         res = usb_autopm_get_interface(tp->intf);
3152         if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3153                 rtl_drop_queued_tx(tp);
3154                 rtl_stop_rx(tp);
3155         } else {
3156                 mutex_lock(&tp->control);
3157
3158                 tp->rtl_ops.down(tp);
3159
3160                 mutex_unlock(&tp->control);
3161
3162                 usb_autopm_put_interface(tp->intf);
3163         }
3164
3165         free_all_mem(tp);
3166
3167         return res;
3168 }
3169
3170 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3171 {
3172         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3173         ocp_reg_write(tp, OCP_EEE_DATA, reg);
3174         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3175 }
3176
3177 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3178 {
3179         u16 data;
3180
3181         r8152_mmd_indirect(tp, dev, reg);
3182         data = ocp_reg_read(tp, OCP_EEE_DATA);
3183         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3184
3185         return data;
3186 }
3187
3188 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3189 {
3190         r8152_mmd_indirect(tp, dev, reg);
3191         ocp_reg_write(tp, OCP_EEE_DATA, data);
3192         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3193 }
3194
3195 static void r8152_eee_en(struct r8152 *tp, bool enable)
3196 {
3197         u16 config1, config2, config3;
3198         u32 ocp_data;
3199
3200         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3201         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3202         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3203         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3204
3205         if (enable) {
3206                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3207                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3208                 config1 |= sd_rise_time(1);
3209                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3210                 config3 |= fast_snr(42);
3211         } else {
3212                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3213                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3214                              RX_QUIET_EN);
3215                 config1 |= sd_rise_time(7);
3216                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3217                 config3 |= fast_snr(511);
3218         }
3219
3220         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3221         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3222         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3223         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3224 }
3225
3226 static void r8152b_enable_eee(struct r8152 *tp)
3227 {
3228         r8152_eee_en(tp, true);
3229         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3230 }
3231
3232 static void r8153_eee_en(struct r8152 *tp, bool enable)
3233 {
3234         u32 ocp_data;
3235         u16 config;
3236
3237         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3238         config = ocp_reg_read(tp, OCP_EEE_CFG);
3239
3240         if (enable) {
3241                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3242                 config |= EEE10_EN;
3243         } else {
3244                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3245                 config &= ~EEE10_EN;
3246         }
3247
3248         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3249         ocp_reg_write(tp, OCP_EEE_CFG, config);
3250 }
3251
3252 static void r8153_enable_eee(struct r8152 *tp)
3253 {
3254         r8153_eee_en(tp, true);
3255         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3256 }
3257
3258 static void r8152b_enable_fc(struct r8152 *tp)
3259 {
3260         u16 anar;
3261
3262         anar = r8152_mdio_read(tp, MII_ADVERTISE);
3263         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3264         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3265 }
3266
3267 static void rtl_tally_reset(struct r8152 *tp)
3268 {
3269         u32 ocp_data;
3270
3271         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3272         ocp_data |= TALLY_RESET;
3273         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3274 }
3275
3276 static void r8152b_init(struct r8152 *tp)
3277 {
3278         u32 ocp_data;
3279
3280         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3281                 return;
3282
3283         r8152_aldps_en(tp, false);
3284
3285         if (tp->version == RTL_VER_01) {
3286                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3287                 ocp_data &= ~LED_MODE_MASK;
3288                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3289         }
3290
3291         r8152_power_cut_en(tp, false);
3292
3293         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3294         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3295         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3296         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3297         ocp_data &= ~MCU_CLK_RATIO_MASK;
3298         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3299         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3300         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3301                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3302         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3303
3304         r8152b_enable_eee(tp);
3305         r8152_aldps_en(tp, true);
3306         r8152b_enable_fc(tp);
3307         rtl_tally_reset(tp);
3308
3309         /* enable rx aggregation */
3310         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3311         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3312         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3313 }
3314
3315 static void r8153_init(struct r8152 *tp)
3316 {
3317         u32 ocp_data;
3318         int i;
3319
3320         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3321                 return;
3322
3323         r8153_aldps_en(tp, false);
3324         r8153_u1u2en(tp, false);
3325
3326         for (i = 0; i < 500; i++) {
3327                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3328                     AUTOLOAD_DONE)
3329                         break;
3330                 msleep(20);
3331         }
3332
3333         for (i = 0; i < 500; i++) {
3334                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3335                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3336                         break;
3337                 msleep(20);
3338         }
3339
3340         usb_disable_lpm(tp->udev);
3341         r8153_u2p3en(tp, false);
3342
3343         if (tp->version == RTL_VER_04) {
3344                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3345                 ocp_data &= ~pwd_dn_scale_mask;
3346                 ocp_data |= pwd_dn_scale(96);
3347                 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3348
3349                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3350                 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3351                 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3352         } else if (tp->version == RTL_VER_05) {
3353                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3354                 ocp_data &= ~ECM_ALDPS;
3355                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3356
3357                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3358                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3359                         ocp_data &= ~DYNAMIC_BURST;
3360                 else
3361                         ocp_data |= DYNAMIC_BURST;
3362                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3363         } else if (tp->version == RTL_VER_06) {
3364                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3365                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3366                         ocp_data &= ~DYNAMIC_BURST;
3367                 else
3368                         ocp_data |= DYNAMIC_BURST;
3369                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3370         }
3371
3372         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3373         ocp_data |= EP4_FULL_FC;
3374         ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3375
3376         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3377         ocp_data &= ~TIMER11_EN;
3378         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3379
3380         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3381         ocp_data &= ~LED_MODE_MASK;
3382         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3383
3384         ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3385         if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3386                 ocp_data |= LPM_TIMER_500MS;
3387         else
3388                 ocp_data |= LPM_TIMER_500US;
3389         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3390
3391         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3392         ocp_data &= ~SEN_VAL_MASK;
3393         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3394         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3395
3396         ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3397
3398         r8153_power_cut_en(tp, false);
3399         r8153_u1u2en(tp, true);
3400
3401         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3402         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3403         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3404                        PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3405                        U1U2_SPDWN_EN | L1_SPDWN_EN);
3406         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3407                        PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3408                        TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3409                        EEE_SPDWN_EN);
3410
3411         r8153_enable_eee(tp);
3412         r8153_aldps_en(tp, true);
3413         r8152b_enable_fc(tp);
3414         rtl_tally_reset(tp);
3415         r8153_u2p3en(tp, true);
3416 }
3417
3418 static int rtl8152_pre_reset(struct usb_interface *intf)
3419 {
3420         struct r8152 *tp = usb_get_intfdata(intf);
3421         struct net_device *netdev;
3422
3423         if (!tp)
3424                 return 0;
3425
3426         netdev = tp->netdev;
3427         if (!netif_running(netdev))
3428                 return 0;
3429
3430         napi_disable(&tp->napi);
3431         clear_bit(WORK_ENABLE, &tp->flags);
3432         usb_kill_urb(tp->intr_urb);
3433         cancel_delayed_work_sync(&tp->schedule);
3434         if (netif_carrier_ok(netdev)) {
3435                 netif_stop_queue(netdev);
3436                 mutex_lock(&tp->control);
3437                 tp->rtl_ops.disable(tp);
3438                 mutex_unlock(&tp->control);
3439         }
3440
3441         return 0;
3442 }
3443
3444 static int rtl8152_post_reset(struct usb_interface *intf)
3445 {
3446         struct r8152 *tp = usb_get_intfdata(intf);
3447         struct net_device *netdev;
3448
3449         if (!tp)
3450                 return 0;
3451
3452         netdev = tp->netdev;
3453         if (!netif_running(netdev))
3454                 return 0;
3455
3456         set_bit(WORK_ENABLE, &tp->flags);
3457         if (netif_carrier_ok(netdev)) {
3458                 mutex_lock(&tp->control);
3459                 tp->rtl_ops.enable(tp);
3460                 rtl8152_set_rx_mode(netdev);
3461                 mutex_unlock(&tp->control);
3462                 netif_wake_queue(netdev);
3463         }
3464
3465         napi_enable(&tp->napi);
3466
3467         return 0;
3468 }
3469
3470 static bool delay_autosuspend(struct r8152 *tp)
3471 {
3472         bool sw_linking = !!netif_carrier_ok(tp->netdev);
3473         bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3474
3475         /* This means a linking change occurs and the driver doesn't detect it,
3476          * yet. If the driver has disabled tx/rx and hw is linking on, the
3477          * device wouldn't wake up by receiving any packet.
3478          */
3479         if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3480                 return true;
3481
3482         /* If the linking down is occurred by nway, the device may miss the
3483          * linking change event. And it wouldn't wake when linking on.
3484          */
3485         if (!sw_linking && tp->rtl_ops.in_nway(tp))
3486                 return true;
3487         else
3488                 return false;
3489 }
3490
3491 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3492 {
3493         struct r8152 *tp = usb_get_intfdata(intf);
3494         struct net_device *netdev = tp->netdev;
3495         int ret = 0;
3496
3497         mutex_lock(&tp->control);
3498
3499         if (PMSG_IS_AUTO(message)) {
3500                 if (netif_running(netdev) && delay_autosuspend(tp)) {
3501                         ret = -EBUSY;
3502                         goto out1;
3503                 }
3504
3505                 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3506         } else {
3507                 netif_device_detach(netdev);
3508         }
3509
3510         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3511                 clear_bit(WORK_ENABLE, &tp->flags);
3512                 usb_kill_urb(tp->intr_urb);
3513                 napi_disable(&tp->napi);
3514                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3515                         rtl_stop_rx(tp);
3516                         rtl_runtime_suspend_enable(tp, true);
3517                 } else {
3518                         cancel_delayed_work_sync(&tp->schedule);
3519                         tp->rtl_ops.down(tp);
3520                 }
3521                 napi_enable(&tp->napi);
3522         }
3523 out1:
3524         mutex_unlock(&tp->control);
3525
3526         return ret;
3527 }
3528
3529 static int rtl8152_resume(struct usb_interface *intf)
3530 {
3531         struct r8152 *tp = usb_get_intfdata(intf);
3532
3533         mutex_lock(&tp->control);
3534
3535         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3536                 tp->rtl_ops.init(tp);
3537                 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3538                 netif_device_attach(tp->netdev);
3539         }
3540
3541         if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3542                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3543                         rtl_runtime_suspend_enable(tp, false);
3544                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3545                         napi_disable(&tp->napi);
3546                         set_bit(WORK_ENABLE, &tp->flags);
3547                         if (netif_carrier_ok(tp->netdev))
3548                                 rtl_start_rx(tp);
3549                         napi_enable(&tp->napi);
3550                 } else {
3551                         tp->rtl_ops.up(tp);
3552                         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3553                                           tp->mii.supports_gmii ?
3554                                           SPEED_1000 : SPEED_100,
3555                                           DUPLEX_FULL);
3556                         netif_carrier_off(tp->netdev);
3557                         set_bit(WORK_ENABLE, &tp->flags);
3558                 }
3559                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3560         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3561                 if (tp->netdev->flags & IFF_UP)
3562                         rtl_runtime_suspend_enable(tp, false);
3563                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3564         }
3565
3566         mutex_unlock(&tp->control);
3567
3568         return 0;
3569 }
3570
3571 static int rtl8152_reset_resume(struct usb_interface *intf)
3572 {
3573         struct r8152 *tp = usb_get_intfdata(intf);
3574
3575         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3576         return rtl8152_resume(intf);
3577 }
3578
3579 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3580 {
3581         struct r8152 *tp = netdev_priv(dev);
3582
3583         if (usb_autopm_get_interface(tp->intf) < 0)
3584                 return;
3585
3586         if (!rtl_can_wakeup(tp)) {
3587                 wol->supported = 0;
3588                 wol->wolopts = 0;
3589         } else {
3590                 mutex_lock(&tp->control);
3591                 wol->supported = WAKE_ANY;
3592                 wol->wolopts = __rtl_get_wol(tp);
3593                 mutex_unlock(&tp->control);
3594         }
3595
3596         usb_autopm_put_interface(tp->intf);
3597 }
3598
3599 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3600 {
3601         struct r8152 *tp = netdev_priv(dev);
3602         int ret;
3603
3604         if (!rtl_can_wakeup(tp))
3605                 return -EOPNOTSUPP;
3606
3607         ret = usb_autopm_get_interface(tp->intf);
3608         if (ret < 0)
3609                 goto out_set_wol;
3610
3611         mutex_lock(&tp->control);
3612
3613         __rtl_set_wol(tp, wol->wolopts);
3614         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3615
3616         mutex_unlock(&tp->control);
3617
3618         usb_autopm_put_interface(tp->intf);
3619
3620 out_set_wol:
3621         return ret;
3622 }
3623
3624 static u32 rtl8152_get_msglevel(struct net_device *dev)
3625 {
3626         struct r8152 *tp = netdev_priv(dev);
3627
3628         return tp->msg_enable;
3629 }
3630
3631 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3632 {
3633         struct r8152 *tp = netdev_priv(dev);
3634
3635         tp->msg_enable = value;
3636 }
3637
3638 static void rtl8152_get_drvinfo(struct net_device *netdev,
3639                                 struct ethtool_drvinfo *info)
3640 {
3641         struct r8152 *tp = netdev_priv(netdev);
3642
3643         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3644         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3645         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3646 }
3647
3648 static
3649 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3650 {
3651         struct r8152 *tp = netdev_priv(netdev);
3652         int ret;
3653
3654         if (!tp->mii.mdio_read)
3655                 return -EOPNOTSUPP;
3656
3657         ret = usb_autopm_get_interface(tp->intf);
3658         if (ret < 0)
3659                 goto out;
3660
3661         mutex_lock(&tp->control);
3662
3663         ret = mii_ethtool_gset(&tp->mii, cmd);
3664
3665         mutex_unlock(&tp->control);
3666
3667         usb_autopm_put_interface(tp->intf);
3668
3669 out:
3670         return ret;
3671 }
3672
3673 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3674 {
3675         struct r8152 *tp = netdev_priv(dev);
3676         int ret;
3677
3678         ret = usb_autopm_get_interface(tp->intf);
3679         if (ret < 0)
3680                 goto out;
3681
3682         mutex_lock(&tp->control);
3683
3684         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3685
3686         mutex_unlock(&tp->control);
3687
3688         usb_autopm_put_interface(tp->intf);
3689
3690 out:
3691         return ret;
3692 }
3693
3694 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3695         "tx_packets",
3696         "rx_packets",
3697         "tx_errors",
3698         "rx_errors",
3699         "rx_missed",
3700         "align_errors",
3701         "tx_single_collisions",
3702         "tx_multi_collisions",
3703         "rx_unicast",
3704         "rx_broadcast",
3705         "rx_multicast",
3706         "tx_aborted",
3707         "tx_underrun",
3708 };
3709
3710 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3711 {
3712         switch (sset) {
3713         case ETH_SS_STATS:
3714                 return ARRAY_SIZE(rtl8152_gstrings);
3715         default:
3716                 return -EOPNOTSUPP;
3717         }
3718 }
3719
3720 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3721                                       struct ethtool_stats *stats, u64 *data)
3722 {
3723         struct r8152 *tp = netdev_priv(dev);
3724         struct tally_counter tally;
3725
3726         if (usb_autopm_get_interface(tp->intf) < 0)
3727                 return;
3728
3729         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3730
3731         usb_autopm_put_interface(tp->intf);
3732
3733         data[0] = le64_to_cpu(tally.tx_packets);
3734         data[1] = le64_to_cpu(tally.rx_packets);
3735         data[2] = le64_to_cpu(tally.tx_errors);
3736         data[3] = le32_to_cpu(tally.rx_errors);
3737         data[4] = le16_to_cpu(tally.rx_missed);
3738         data[5] = le16_to_cpu(tally.align_errors);
3739         data[6] = le32_to_cpu(tally.tx_one_collision);
3740         data[7] = le32_to_cpu(tally.tx_multi_collision);
3741         data[8] = le64_to_cpu(tally.rx_unicast);
3742         data[9] = le64_to_cpu(tally.rx_broadcast);
3743         data[10] = le32_to_cpu(tally.rx_multicast);
3744         data[11] = le16_to_cpu(tally.tx_aborted);
3745         data[12] = le16_to_cpu(tally.tx_underrun);
3746 }
3747
3748 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3749 {
3750         switch (stringset) {
3751         case ETH_SS_STATS:
3752                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3753                 break;
3754         }
3755 }
3756
3757 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3758 {
3759         u32 ocp_data, lp, adv, supported = 0;
3760         u16 val;
3761
3762         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3763         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3764
3765         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3766         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3767
3768         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3769         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3770
3771         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3772         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3773
3774         eee->eee_enabled = !!ocp_data;
3775         eee->eee_active = !!(supported & adv & lp);
3776         eee->supported = supported;
3777         eee->advertised = adv;
3778         eee->lp_advertised = lp;
3779
3780         return 0;
3781 }
3782
3783 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3784 {
3785         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3786
3787         r8152_eee_en(tp, eee->eee_enabled);
3788
3789         if (!eee->eee_enabled)
3790                 val = 0;
3791
3792         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3793
3794         return 0;
3795 }
3796
3797 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3798 {
3799         u32 ocp_data, lp, adv, supported = 0;
3800         u16 val;
3801
3802         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3803         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3804
3805         val = ocp_reg_read(tp, OCP_EEE_ADV);
3806         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3807
3808         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3809         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3810
3811         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3812         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3813
3814         eee->eee_enabled = !!ocp_data;
3815         eee->eee_active = !!(supported & adv & lp);
3816         eee->supported = supported;
3817         eee->advertised = adv;
3818         eee->lp_advertised = lp;
3819
3820         return 0;
3821 }
3822
3823 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3824 {
3825         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3826
3827         r8153_eee_en(tp, eee->eee_enabled);
3828
3829         if (!eee->eee_enabled)
3830                 val = 0;
3831
3832         ocp_reg_write(tp, OCP_EEE_ADV, val);
3833
3834         return 0;
3835 }
3836
3837 static int
3838 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3839 {
3840         struct r8152 *tp = netdev_priv(net);
3841         int ret;
3842
3843         ret = usb_autopm_get_interface(tp->intf);
3844         if (ret < 0)
3845                 goto out;
3846
3847         mutex_lock(&tp->control);
3848
3849         ret = tp->rtl_ops.eee_get(tp, edata);
3850
3851         mutex_unlock(&tp->control);
3852
3853         usb_autopm_put_interface(tp->intf);
3854
3855 out:
3856         return ret;
3857 }
3858
3859 static int
3860 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3861 {
3862         struct r8152 *tp = netdev_priv(net);
3863         int ret;
3864
3865         ret = usb_autopm_get_interface(tp->intf);
3866         if (ret < 0)
3867                 goto out;
3868
3869         mutex_lock(&tp->control);
3870
3871         ret = tp->rtl_ops.eee_set(tp, edata);
3872         if (!ret)
3873                 ret = mii_nway_restart(&tp->mii);
3874
3875         mutex_unlock(&tp->control);
3876
3877         usb_autopm_put_interface(tp->intf);
3878
3879 out:
3880         return ret;
3881 }
3882
3883 static int rtl8152_nway_reset(struct net_device *dev)
3884 {
3885         struct r8152 *tp = netdev_priv(dev);
3886         int ret;
3887
3888         ret = usb_autopm_get_interface(tp->intf);
3889         if (ret < 0)
3890                 goto out;
3891
3892         mutex_lock(&tp->control);
3893
3894         ret = mii_nway_restart(&tp->mii);
3895
3896         mutex_unlock(&tp->control);
3897
3898         usb_autopm_put_interface(tp->intf);
3899
3900 out:
3901         return ret;
3902 }
3903
3904 static int rtl8152_get_coalesce(struct net_device *netdev,
3905                                 struct ethtool_coalesce *coalesce)
3906 {
3907         struct r8152 *tp = netdev_priv(netdev);
3908
3909         switch (tp->version) {
3910         case RTL_VER_01:
3911         case RTL_VER_02:
3912                 return -EOPNOTSUPP;
3913         default:
3914                 break;
3915         }
3916
3917         coalesce->rx_coalesce_usecs = tp->coalesce;
3918
3919         return 0;
3920 }
3921
3922 static int rtl8152_set_coalesce(struct net_device *netdev,
3923                                 struct ethtool_coalesce *coalesce)
3924 {
3925         struct r8152 *tp = netdev_priv(netdev);
3926         int ret;
3927
3928         switch (tp->version) {
3929         case RTL_VER_01:
3930         case RTL_VER_02:
3931                 return -EOPNOTSUPP;
3932         default:
3933                 break;
3934         }
3935
3936         if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
3937                 return -EINVAL;
3938
3939         ret = usb_autopm_get_interface(tp->intf);
3940         if (ret < 0)
3941                 return ret;
3942
3943         mutex_lock(&tp->control);
3944
3945         if (tp->coalesce != coalesce->rx_coalesce_usecs) {
3946                 tp->coalesce = coalesce->rx_coalesce_usecs;
3947
3948                 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
3949                         r8153_set_rx_early_timeout(tp);
3950         }
3951
3952         mutex_unlock(&tp->control);
3953
3954         usb_autopm_put_interface(tp->intf);
3955
3956         return ret;
3957 }
3958
3959 static struct ethtool_ops ops = {
3960         .get_drvinfo = rtl8152_get_drvinfo,
3961         .get_settings = rtl8152_get_settings,
3962         .set_settings = rtl8152_set_settings,
3963         .get_link = ethtool_op_get_link,
3964         .nway_reset = rtl8152_nway_reset,
3965         .get_msglevel = rtl8152_get_msglevel,
3966         .set_msglevel = rtl8152_set_msglevel,
3967         .get_wol = rtl8152_get_wol,
3968         .set_wol = rtl8152_set_wol,
3969         .get_strings = rtl8152_get_strings,
3970         .get_sset_count = rtl8152_get_sset_count,
3971         .get_ethtool_stats = rtl8152_get_ethtool_stats,
3972         .get_coalesce = rtl8152_get_coalesce,
3973         .set_coalesce = rtl8152_set_coalesce,
3974         .get_eee = rtl_ethtool_get_eee,
3975         .set_eee = rtl_ethtool_set_eee,
3976 };
3977
3978 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3979 {
3980         struct r8152 *tp = netdev_priv(netdev);
3981         struct mii_ioctl_data *data = if_mii(rq);
3982         int res;
3983
3984         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3985                 return -ENODEV;
3986
3987         res = usb_autopm_get_interface(tp->intf);
3988         if (res < 0)
3989                 goto out;
3990
3991         switch (cmd) {
3992         case SIOCGMIIPHY:
3993                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3994                 break;
3995
3996         case SIOCGMIIREG:
3997                 mutex_lock(&tp->control);
3998                 data->val_out = r8152_mdio_read(tp, data->reg_num);
3999                 mutex_unlock(&tp->control);
4000                 break;
4001
4002         case SIOCSMIIREG:
4003                 if (!capable(CAP_NET_ADMIN)) {
4004                         res = -EPERM;
4005                         break;
4006                 }
4007                 mutex_lock(&tp->control);
4008                 r8152_mdio_write(tp, data->reg_num, data->val_in);
4009                 mutex_unlock(&tp->control);
4010                 break;
4011
4012         default:
4013                 res = -EOPNOTSUPP;
4014         }
4015
4016         usb_autopm_put_interface(tp->intf);
4017
4018 out:
4019         return res;
4020 }
4021
4022 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4023 {
4024         struct r8152 *tp = netdev_priv(dev);
4025         int ret;
4026
4027         switch (tp->version) {
4028         case RTL_VER_01:
4029         case RTL_VER_02:
4030                 return eth_change_mtu(dev, new_mtu);
4031         default:
4032                 break;
4033         }
4034
4035         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4036                 return -EINVAL;
4037
4038         ret = usb_autopm_get_interface(tp->intf);
4039         if (ret < 0)
4040                 return ret;
4041
4042         mutex_lock(&tp->control);
4043
4044         dev->mtu = new_mtu;
4045
4046         if (netif_running(dev) && netif_carrier_ok(dev))
4047                 r8153_set_rx_early_size(tp);
4048
4049         mutex_unlock(&tp->control);
4050
4051         usb_autopm_put_interface(tp->intf);
4052
4053         return ret;
4054 }
4055
4056 static const struct net_device_ops rtl8152_netdev_ops = {
4057         .ndo_open               = rtl8152_open,
4058         .ndo_stop               = rtl8152_close,
4059         .ndo_do_ioctl           = rtl8152_ioctl,
4060         .ndo_start_xmit         = rtl8152_start_xmit,
4061         .ndo_tx_timeout         = rtl8152_tx_timeout,
4062         .ndo_set_features       = rtl8152_set_features,
4063         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
4064         .ndo_set_mac_address    = rtl8152_set_mac_address,
4065         .ndo_change_mtu         = rtl8152_change_mtu,
4066         .ndo_validate_addr      = eth_validate_addr,
4067         .ndo_features_check     = rtl8152_features_check,
4068 };
4069
4070 static void r8152b_get_version(struct r8152 *tp)
4071 {
4072         u32     ocp_data;
4073         u16     version;
4074
4075         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4076         version = (u16)(ocp_data & VERSION_MASK);
4077
4078         switch (version) {
4079         case 0x4c00:
4080                 tp->version = RTL_VER_01;
4081                 break;
4082         case 0x4c10:
4083                 tp->version = RTL_VER_02;
4084                 break;
4085         case 0x5c00:
4086                 tp->version = RTL_VER_03;
4087                 tp->mii.supports_gmii = 1;
4088                 break;
4089         case 0x5c10:
4090                 tp->version = RTL_VER_04;
4091                 tp->mii.supports_gmii = 1;
4092                 break;
4093         case 0x5c20:
4094                 tp->version = RTL_VER_05;
4095                 tp->mii.supports_gmii = 1;
4096                 break;
4097         case 0x5c30:
4098                 tp->version = RTL_VER_06;
4099                 tp->mii.supports_gmii = 1;
4100                 break;
4101         default:
4102                 netif_info(tp, probe, tp->netdev,
4103                            "Unknown version 0x%04x\n", version);
4104                 break;
4105         }
4106 }
4107
4108 static void rtl8152_unload(struct r8152 *tp)
4109 {
4110         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4111                 return;
4112
4113         if (tp->version != RTL_VER_01)
4114                 r8152_power_cut_en(tp, true);
4115 }
4116
4117 static void rtl8153_unload(struct r8152 *tp)
4118 {
4119         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4120                 return;
4121
4122         r8153_power_cut_en(tp, false);
4123 }
4124
4125 static int rtl_ops_init(struct r8152 *tp)
4126 {
4127         struct rtl_ops *ops = &tp->rtl_ops;
4128         int ret = 0;
4129
4130         switch (tp->version) {
4131         case RTL_VER_01:
4132         case RTL_VER_02:
4133                 ops->init               = r8152b_init;
4134                 ops->enable             = rtl8152_enable;
4135                 ops->disable            = rtl8152_disable;
4136                 ops->up                 = rtl8152_up;
4137                 ops->down               = rtl8152_down;
4138                 ops->unload             = rtl8152_unload;
4139                 ops->eee_get            = r8152_get_eee;
4140                 ops->eee_set            = r8152_set_eee;
4141                 ops->in_nway            = rtl8152_in_nway;
4142                 ops->hw_phy_cfg         = r8152b_hw_phy_cfg;
4143                 break;
4144
4145         case RTL_VER_03:
4146         case RTL_VER_04:
4147         case RTL_VER_05:
4148         case RTL_VER_06:
4149                 ops->init               = r8153_init;
4150                 ops->enable             = rtl8153_enable;
4151                 ops->disable            = rtl8153_disable;
4152                 ops->up                 = rtl8153_up;
4153                 ops->down               = rtl8153_down;
4154                 ops->unload             = rtl8153_unload;
4155                 ops->eee_get            = r8153_get_eee;
4156                 ops->eee_set            = r8153_set_eee;
4157                 ops->in_nway            = rtl8153_in_nway;
4158                 ops->hw_phy_cfg         = r8153_hw_phy_cfg;
4159                 break;
4160
4161         default:
4162                 ret = -ENODEV;
4163                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4164                 break;
4165         }
4166
4167         return ret;
4168 }
4169
4170 static int rtl8152_probe(struct usb_interface *intf,
4171                          const struct usb_device_id *id)
4172 {
4173         struct usb_device *udev = interface_to_usbdev(intf);
4174         struct r8152 *tp;
4175         struct net_device *netdev;
4176         int ret;
4177
4178         if (udev->actconfig->desc.bConfigurationValue != 1) {
4179                 usb_driver_set_configuration(udev, 1);
4180                 return -ENODEV;
4181         }
4182
4183         usb_reset_device(udev);
4184         netdev = alloc_etherdev(sizeof(struct r8152));
4185         if (!netdev) {
4186                 dev_err(&intf->dev, "Out of memory\n");
4187                 return -ENOMEM;
4188         }
4189
4190         SET_NETDEV_DEV(netdev, &intf->dev);
4191         tp = netdev_priv(netdev);
4192         tp->msg_enable = 0x7FFF;
4193
4194         tp->udev = udev;
4195         tp->netdev = netdev;
4196         tp->intf = intf;
4197
4198         r8152b_get_version(tp);
4199         ret = rtl_ops_init(tp);
4200         if (ret)
4201                 goto out;
4202
4203         mutex_init(&tp->control);
4204         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4205         INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4206
4207         netdev->netdev_ops = &rtl8152_netdev_ops;
4208         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4209
4210         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4211                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4212                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4213                             NETIF_F_HW_VLAN_CTAG_TX;
4214         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4215                               NETIF_F_TSO | NETIF_F_FRAGLIST |
4216                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4217                               NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4218         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4219                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4220                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4221
4222         netdev->ethtool_ops = &ops;
4223         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4224
4225         tp->mii.dev = netdev;
4226         tp->mii.mdio_read = read_mii_word;
4227         tp->mii.mdio_write = write_mii_word;
4228         tp->mii.phy_id_mask = 0x3f;
4229         tp->mii.reg_num_mask = 0x1f;
4230         tp->mii.phy_id = R8152_PHY_ID;
4231
4232         switch (udev->speed) {
4233         case USB_SPEED_SUPER:
4234         case USB_SPEED_SUPER_PLUS:
4235                 tp->coalesce = COALESCE_SUPER;
4236                 break;
4237         case USB_SPEED_HIGH:
4238                 tp->coalesce = COALESCE_HIGH;
4239                 break;
4240         default:
4241                 tp->coalesce = COALESCE_SLOW;
4242                 break;
4243         }
4244
4245         intf->needs_remote_wakeup = 1;
4246
4247         tp->rtl_ops.init(tp);
4248         queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4249         set_ethernet_addr(tp);
4250
4251         usb_set_intfdata(intf, tp);
4252         netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4253
4254         ret = register_netdev(netdev);
4255         if (ret != 0) {
4256                 netif_err(tp, probe, netdev, "couldn't register the device\n");
4257                 goto out1;
4258         }
4259
4260         if (!rtl_can_wakeup(tp))
4261                 __rtl_set_wol(tp, 0);
4262
4263         tp->saved_wolopts = __rtl_get_wol(tp);
4264         if (tp->saved_wolopts)
4265                 device_set_wakeup_enable(&udev->dev, true);
4266         else
4267                 device_set_wakeup_enable(&udev->dev, false);
4268
4269         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4270
4271         return 0;
4272
4273 out1:
4274         netif_napi_del(&tp->napi);
4275         usb_set_intfdata(intf, NULL);
4276 out:
4277         free_netdev(netdev);
4278         return ret;
4279 }
4280
4281 static void rtl8152_disconnect(struct usb_interface *intf)
4282 {
4283         struct r8152 *tp = usb_get_intfdata(intf);
4284
4285         usb_set_intfdata(intf, NULL);
4286         if (tp) {
4287                 struct usb_device *udev = tp->udev;
4288
4289                 if (udev->state == USB_STATE_NOTATTACHED)
4290                         set_bit(RTL8152_UNPLUG, &tp->flags);
4291
4292                 netif_napi_del(&tp->napi);
4293                 unregister_netdev(tp->netdev);
4294                 cancel_delayed_work_sync(&tp->hw_phy_work);
4295                 tp->rtl_ops.unload(tp);
4296                 free_netdev(tp->netdev);
4297         }
4298 }
4299
4300 #define REALTEK_USB_DEVICE(vend, prod)  \
4301         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4302                        USB_DEVICE_ID_MATCH_INT_CLASS, \
4303         .idVendor = (vend), \
4304         .idProduct = (prod), \
4305         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4306 }, \
4307 { \
4308         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4309                        USB_DEVICE_ID_MATCH_DEVICE, \
4310         .idVendor = (vend), \
4311         .idProduct = (prod), \
4312         .bInterfaceClass = USB_CLASS_COMM, \
4313         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4314         .bInterfaceProtocol = USB_CDC_PROTO_NONE
4315
4316 /* table of devices that work with this driver */
4317 static struct usb_device_id rtl8152_table[] = {
4318         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4319         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4320         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4321         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7205)},
4322         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x304f)},
4323         {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA,  0x09ff)},
4324         {}
4325 };
4326
4327 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4328
4329 static struct usb_driver rtl8152_driver = {
4330         .name =         MODULENAME,
4331         .id_table =     rtl8152_table,
4332         .probe =        rtl8152_probe,
4333         .disconnect =   rtl8152_disconnect,
4334         .suspend =      rtl8152_suspend,
4335         .resume =       rtl8152_resume,
4336         .reset_resume = rtl8152_reset_resume,
4337         .pre_reset =    rtl8152_pre_reset,
4338         .post_reset =   rtl8152_post_reset,
4339         .supports_autosuspend = 1,
4340         .disable_hub_initiated_lpm = 1,
4341 };
4342
4343 module_usb_driver(rtl8152_driver);
4344
4345 MODULE_AUTHOR(DRIVER_AUTHOR);
4346 MODULE_DESCRIPTION(DRIVER_DESC);
4347 MODULE_LICENSE("GPL");