r8152: use test_and_clear_bit
[cascardo/linux.git] / drivers / net / usb / r8152.c
1 /*
2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * version 2 as published by the Free Software Foundation.
7  *
8  */
9
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
22 #include <linux/ip.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28
29 /* Information for net-next */
30 #define NETNEXT_VERSION         "08"
31
32 /* Information for net */
33 #define NET_VERSION             "2"
34
35 #define DRIVER_VERSION          "v1." NETNEXT_VERSION "." NET_VERSION
36 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
37 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
38 #define MODULENAME "r8152"
39
40 #define R8152_PHY_ID            32
41
42 #define PLA_IDR                 0xc000
43 #define PLA_RCR                 0xc010
44 #define PLA_RMS                 0xc016
45 #define PLA_RXFIFO_CTRL0        0xc0a0
46 #define PLA_RXFIFO_CTRL1        0xc0a4
47 #define PLA_RXFIFO_CTRL2        0xc0a8
48 #define PLA_DMY_REG0            0xc0b0
49 #define PLA_FMC                 0xc0b4
50 #define PLA_CFG_WOL             0xc0b6
51 #define PLA_TEREDO_CFG          0xc0bc
52 #define PLA_MAR                 0xcd00
53 #define PLA_BACKUP              0xd000
54 #define PAL_BDC_CR              0xd1a0
55 #define PLA_TEREDO_TIMER        0xd2cc
56 #define PLA_REALWOW_TIMER       0xd2e8
57 #define PLA_LEDSEL              0xdd90
58 #define PLA_LED_FEATURE         0xdd92
59 #define PLA_PHYAR               0xde00
60 #define PLA_BOOT_CTRL           0xe004
61 #define PLA_GPHY_INTR_IMR       0xe022
62 #define PLA_EEE_CR              0xe040
63 #define PLA_EEEP_CR             0xe080
64 #define PLA_MAC_PWR_CTRL        0xe0c0
65 #define PLA_MAC_PWR_CTRL2       0xe0ca
66 #define PLA_MAC_PWR_CTRL3       0xe0cc
67 #define PLA_MAC_PWR_CTRL4       0xe0ce
68 #define PLA_WDT6_CTRL           0xe428
69 #define PLA_TCR0                0xe610
70 #define PLA_TCR1                0xe612
71 #define PLA_MTPS                0xe615
72 #define PLA_TXFIFO_CTRL         0xe618
73 #define PLA_RSTTALLY            0xe800
74 #define PLA_CR                  0xe813
75 #define PLA_CRWECR              0xe81c
76 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
77 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
78 #define PLA_CONFIG5             0xe822
79 #define PLA_PHY_PWR             0xe84c
80 #define PLA_OOB_CTRL            0xe84f
81 #define PLA_CPCR                0xe854
82 #define PLA_MISC_0              0xe858
83 #define PLA_MISC_1              0xe85a
84 #define PLA_OCP_GPHY_BASE       0xe86c
85 #define PLA_TALLYCNT            0xe890
86 #define PLA_SFF_STS_7           0xe8de
87 #define PLA_PHYSTATUS           0xe908
88 #define PLA_BP_BA               0xfc26
89 #define PLA_BP_0                0xfc28
90 #define PLA_BP_1                0xfc2a
91 #define PLA_BP_2                0xfc2c
92 #define PLA_BP_3                0xfc2e
93 #define PLA_BP_4                0xfc30
94 #define PLA_BP_5                0xfc32
95 #define PLA_BP_6                0xfc34
96 #define PLA_BP_7                0xfc36
97 #define PLA_BP_EN               0xfc38
98
99 #define USB_USB2PHY             0xb41e
100 #define USB_SSPHYLINK2          0xb428
101 #define USB_U2P3_CTRL           0xb460
102 #define USB_CSR_DUMMY1          0xb464
103 #define USB_CSR_DUMMY2          0xb466
104 #define USB_DEV_STAT            0xb808
105 #define USB_CONNECT_TIMER       0xcbf8
106 #define USB_BURST_SIZE          0xcfc0
107 #define USB_USB_CTRL            0xd406
108 #define USB_PHY_CTRL            0xd408
109 #define USB_TX_AGG              0xd40a
110 #define USB_RX_BUF_TH           0xd40c
111 #define USB_USB_TIMER           0xd428
112 #define USB_RX_EARLY_TIMEOUT    0xd42c
113 #define USB_RX_EARLY_SIZE       0xd42e
114 #define USB_PM_CTRL_STATUS      0xd432
115 #define USB_TX_DMA              0xd434
116 #define USB_TOLERANCE           0xd490
117 #define USB_LPM_CTRL            0xd41a
118 #define USB_UPS_CTRL            0xd800
119 #define USB_MISC_0              0xd81a
120 #define USB_POWER_CUT           0xd80a
121 #define USB_AFE_CTRL2           0xd824
122 #define USB_WDT11_CTRL          0xe43c
123 #define USB_BP_BA               0xfc26
124 #define USB_BP_0                0xfc28
125 #define USB_BP_1                0xfc2a
126 #define USB_BP_2                0xfc2c
127 #define USB_BP_3                0xfc2e
128 #define USB_BP_4                0xfc30
129 #define USB_BP_5                0xfc32
130 #define USB_BP_6                0xfc34
131 #define USB_BP_7                0xfc36
132 #define USB_BP_EN               0xfc38
133
134 /* OCP Registers */
135 #define OCP_ALDPS_CONFIG        0x2010
136 #define OCP_EEE_CONFIG1         0x2080
137 #define OCP_EEE_CONFIG2         0x2092
138 #define OCP_EEE_CONFIG3         0x2094
139 #define OCP_BASE_MII            0xa400
140 #define OCP_EEE_AR              0xa41a
141 #define OCP_EEE_DATA            0xa41c
142 #define OCP_PHY_STATUS          0xa420
143 #define OCP_POWER_CFG           0xa430
144 #define OCP_EEE_CFG             0xa432
145 #define OCP_SRAM_ADDR           0xa436
146 #define OCP_SRAM_DATA           0xa438
147 #define OCP_DOWN_SPEED          0xa442
148 #define OCP_EEE_ABLE            0xa5c4
149 #define OCP_EEE_ADV             0xa5d0
150 #define OCP_EEE_LPABLE          0xa5d2
151 #define OCP_PHY_STATE           0xa708          /* nway state for 8153 */
152 #define OCP_ADC_CFG             0xbc06
153
154 /* SRAM Register */
155 #define SRAM_LPF_CFG            0x8012
156 #define SRAM_10M_AMP1           0x8080
157 #define SRAM_10M_AMP2           0x8082
158 #define SRAM_IMPEDANCE          0x8084
159
160 /* PLA_RCR */
161 #define RCR_AAP                 0x00000001
162 #define RCR_APM                 0x00000002
163 #define RCR_AM                  0x00000004
164 #define RCR_AB                  0x00000008
165 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
166
167 /* PLA_RXFIFO_CTRL0 */
168 #define RXFIFO_THR1_NORMAL      0x00080002
169 #define RXFIFO_THR1_OOB         0x01800003
170
171 /* PLA_RXFIFO_CTRL1 */
172 #define RXFIFO_THR2_FULL        0x00000060
173 #define RXFIFO_THR2_HIGH        0x00000038
174 #define RXFIFO_THR2_OOB         0x0000004a
175 #define RXFIFO_THR2_NORMAL      0x00a0
176
177 /* PLA_RXFIFO_CTRL2 */
178 #define RXFIFO_THR3_FULL        0x00000078
179 #define RXFIFO_THR3_HIGH        0x00000048
180 #define RXFIFO_THR3_OOB         0x0000005a
181 #define RXFIFO_THR3_NORMAL      0x0110
182
183 /* PLA_TXFIFO_CTRL */
184 #define TXFIFO_THR_NORMAL       0x00400008
185 #define TXFIFO_THR_NORMAL2      0x01000008
186
187 /* PLA_DMY_REG0 */
188 #define ECM_ALDPS               0x0002
189
190 /* PLA_FMC */
191 #define FMC_FCR_MCU_EN          0x0001
192
193 /* PLA_EEEP_CR */
194 #define EEEP_CR_EEEP_TX         0x0002
195
196 /* PLA_WDT6_CTRL */
197 #define WDT6_SET_MODE           0x0010
198
199 /* PLA_TCR0 */
200 #define TCR0_TX_EMPTY           0x0800
201 #define TCR0_AUTO_FIFO          0x0080
202
203 /* PLA_TCR1 */
204 #define VERSION_MASK            0x7cf0
205
206 /* PLA_MTPS */
207 #define MTPS_JUMBO              (12 * 1024 / 64)
208 #define MTPS_DEFAULT            (6 * 1024 / 64)
209
210 /* PLA_RSTTALLY */
211 #define TALLY_RESET             0x0001
212
213 /* PLA_CR */
214 #define CR_RST                  0x10
215 #define CR_RE                   0x08
216 #define CR_TE                   0x04
217
218 /* PLA_CRWECR */
219 #define CRWECR_NORAML           0x00
220 #define CRWECR_CONFIG           0xc0
221
222 /* PLA_OOB_CTRL */
223 #define NOW_IS_OOB              0x80
224 #define TXFIFO_EMPTY            0x20
225 #define RXFIFO_EMPTY            0x10
226 #define LINK_LIST_READY         0x02
227 #define DIS_MCU_CLROOB          0x01
228 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
229
230 /* PLA_MISC_1 */
231 #define RXDY_GATED_EN           0x0008
232
233 /* PLA_SFF_STS_7 */
234 #define RE_INIT_LL              0x8000
235 #define MCU_BORW_EN             0x4000
236
237 /* PLA_CPCR */
238 #define CPCR_RX_VLAN            0x0040
239
240 /* PLA_CFG_WOL */
241 #define MAGIC_EN                0x0001
242
243 /* PLA_TEREDO_CFG */
244 #define TEREDO_SEL              0x8000
245 #define TEREDO_WAKE_MASK        0x7f00
246 #define TEREDO_RS_EVENT_MASK    0x00fe
247 #define OOB_TEREDO_EN           0x0001
248
249 /* PAL_BDC_CR */
250 #define ALDPS_PROXY_MODE        0x0001
251
252 /* PLA_CONFIG34 */
253 #define LINK_ON_WAKE_EN         0x0010
254 #define LINK_OFF_WAKE_EN        0x0008
255
256 /* PLA_CONFIG5 */
257 #define BWF_EN                  0x0040
258 #define MWF_EN                  0x0020
259 #define UWF_EN                  0x0010
260 #define LAN_WAKE_EN             0x0002
261
262 /* PLA_LED_FEATURE */
263 #define LED_MODE_MASK           0x0700
264
265 /* PLA_PHY_PWR */
266 #define TX_10M_IDLE_EN          0x0080
267 #define PFM_PWM_SWITCH          0x0040
268
269 /* PLA_MAC_PWR_CTRL */
270 #define D3_CLK_GATED_EN         0x00004000
271 #define MCU_CLK_RATIO           0x07010f07
272 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
273 #define ALDPS_SPDWN_RATIO       0x0f87
274
275 /* PLA_MAC_PWR_CTRL2 */
276 #define EEE_SPDWN_RATIO         0x8007
277
278 /* PLA_MAC_PWR_CTRL3 */
279 #define PKT_AVAIL_SPDWN_EN      0x0100
280 #define SUSPEND_SPDWN_EN        0x0004
281 #define U1U2_SPDWN_EN           0x0002
282 #define L1_SPDWN_EN             0x0001
283
284 /* PLA_MAC_PWR_CTRL4 */
285 #define PWRSAVE_SPDWN_EN        0x1000
286 #define RXDV_SPDWN_EN           0x0800
287 #define TX10MIDLE_EN            0x0100
288 #define TP100_SPDWN_EN          0x0020
289 #define TP500_SPDWN_EN          0x0010
290 #define TP1000_SPDWN_EN         0x0008
291 #define EEE_SPDWN_EN            0x0001
292
293 /* PLA_GPHY_INTR_IMR */
294 #define GPHY_STS_MSK            0x0001
295 #define SPEED_DOWN_MSK          0x0002
296 #define SPDWN_RXDV_MSK          0x0004
297 #define SPDWN_LINKCHG_MSK       0x0008
298
299 /* PLA_PHYAR */
300 #define PHYAR_FLAG              0x80000000
301
302 /* PLA_EEE_CR */
303 #define EEE_RX_EN               0x0001
304 #define EEE_TX_EN               0x0002
305
306 /* PLA_BOOT_CTRL */
307 #define AUTOLOAD_DONE           0x0002
308
309 /* USB_USB2PHY */
310 #define USB2PHY_SUSPEND         0x0001
311 #define USB2PHY_L1              0x0002
312
313 /* USB_SSPHYLINK2 */
314 #define pwd_dn_scale_mask       0x3ffe
315 #define pwd_dn_scale(x)         ((x) << 1)
316
317 /* USB_CSR_DUMMY1 */
318 #define DYNAMIC_BURST           0x0001
319
320 /* USB_CSR_DUMMY2 */
321 #define EP4_FULL_FC             0x0001
322
323 /* USB_DEV_STAT */
324 #define STAT_SPEED_MASK         0x0006
325 #define STAT_SPEED_HIGH         0x0000
326 #define STAT_SPEED_FULL         0x0002
327
328 /* USB_TX_AGG */
329 #define TX_AGG_MAX_THRESHOLD    0x03
330
331 /* USB_RX_BUF_TH */
332 #define RX_THR_SUPPER           0x0c350180
333 #define RX_THR_HIGH             0x7a120180
334 #define RX_THR_SLOW             0xffff0180
335
336 /* USB_TX_DMA */
337 #define TEST_MODE_DISABLE       0x00000001
338 #define TX_SIZE_ADJUST1         0x00000100
339
340 /* USB_UPS_CTRL */
341 #define POWER_CUT               0x0100
342
343 /* USB_PM_CTRL_STATUS */
344 #define RESUME_INDICATE         0x0001
345
346 /* USB_USB_CTRL */
347 #define RX_AGG_DISABLE          0x0010
348 #define RX_ZERO_EN              0x0080
349
350 /* USB_U2P3_CTRL */
351 #define U2P3_ENABLE             0x0001
352
353 /* USB_POWER_CUT */
354 #define PWR_EN                  0x0001
355 #define PHASE2_EN               0x0008
356
357 /* USB_MISC_0 */
358 #define PCUT_STATUS             0x0001
359
360 /* USB_RX_EARLY_TIMEOUT */
361 #define COALESCE_SUPER           85000U
362 #define COALESCE_HIGH           250000U
363 #define COALESCE_SLOW           524280U
364
365 /* USB_WDT11_CTRL */
366 #define TIMER11_EN              0x0001
367
368 /* USB_LPM_CTRL */
369 /* bit 4 ~ 5: fifo empty boundary */
370 #define FIFO_EMPTY_1FB          0x30    /* 0x1fb * 64 = 32448 bytes */
371 /* bit 2 ~ 3: LMP timer */
372 #define LPM_TIMER_MASK          0x0c
373 #define LPM_TIMER_500MS         0x04    /* 500 ms */
374 #define LPM_TIMER_500US         0x0c    /* 500 us */
375 #define ROK_EXIT_LPM            0x02
376
377 /* USB_AFE_CTRL2 */
378 #define SEN_VAL_MASK            0xf800
379 #define SEN_VAL_NORMAL          0xa000
380 #define SEL_RXIDLE              0x0100
381
382 /* OCP_ALDPS_CONFIG */
383 #define ENPWRSAVE               0x8000
384 #define ENPDNPS                 0x0200
385 #define LINKENA                 0x0100
386 #define DIS_SDSAVE              0x0010
387
388 /* OCP_PHY_STATUS */
389 #define PHY_STAT_MASK           0x0007
390 #define PHY_STAT_LAN_ON         3
391 #define PHY_STAT_PWRDN          5
392
393 /* OCP_POWER_CFG */
394 #define EEE_CLKDIV_EN           0x8000
395 #define EN_ALDPS                0x0004
396 #define EN_10M_PLLOFF           0x0001
397
398 /* OCP_EEE_CONFIG1 */
399 #define RG_TXLPI_MSK_HFDUP      0x8000
400 #define RG_MATCLR_EN            0x4000
401 #define EEE_10_CAP              0x2000
402 #define EEE_NWAY_EN             0x1000
403 #define TX_QUIET_EN             0x0200
404 #define RX_QUIET_EN             0x0100
405 #define sd_rise_time_mask       0x0070
406 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
407 #define RG_RXLPI_MSK_HFDUP      0x0008
408 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
409
410 /* OCP_EEE_CONFIG2 */
411 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
412 #define RG_DACQUIET_EN          0x0400
413 #define RG_LDVQUIET_EN          0x0200
414 #define RG_CKRSEL               0x0020
415 #define RG_EEEPRG_EN            0x0010
416
417 /* OCP_EEE_CONFIG3 */
418 #define fast_snr_mask           0xff80
419 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
420 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
421 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
422
423 /* OCP_EEE_AR */
424 /* bit[15:14] function */
425 #define FUN_ADDR                0x0000
426 #define FUN_DATA                0x4000
427 /* bit[4:0] device addr */
428
429 /* OCP_EEE_CFG */
430 #define CTAP_SHORT_EN           0x0040
431 #define EEE10_EN                0x0010
432
433 /* OCP_DOWN_SPEED */
434 #define EN_10M_BGOFF            0x0080
435
436 /* OCP_PHY_STATE */
437 #define TXDIS_STATE             0x01
438 #define ABD_STATE               0x02
439
440 /* OCP_ADC_CFG */
441 #define CKADSEL_L               0x0100
442 #define ADC_EN                  0x0080
443 #define EN_EMI_L                0x0040
444
445 /* SRAM_LPF_CFG */
446 #define LPF_AUTO_TUNE           0x8000
447
448 /* SRAM_10M_AMP1 */
449 #define GDAC_IB_UPALL           0x0008
450
451 /* SRAM_10M_AMP2 */
452 #define AMP_DN                  0x0200
453
454 /* SRAM_IMPEDANCE */
455 #define RX_DRIVING_MASK         0x6000
456
457 enum rtl_register_content {
458         _1000bps        = 0x10,
459         _100bps         = 0x08,
460         _10bps          = 0x04,
461         LINK_STATUS     = 0x02,
462         FULL_DUP        = 0x01,
463 };
464
465 #define RTL8152_MAX_TX          4
466 #define RTL8152_MAX_RX          10
467 #define INTBUFSIZE              2
468 #define CRC_SIZE                4
469 #define TX_ALIGN                4
470 #define RX_ALIGN                8
471
472 #define INTR_LINK               0x0004
473
474 #define RTL8152_REQT_READ       0xc0
475 #define RTL8152_REQT_WRITE      0x40
476 #define RTL8152_REQ_GET_REGS    0x05
477 #define RTL8152_REQ_SET_REGS    0x05
478
479 #define BYTE_EN_DWORD           0xff
480 #define BYTE_EN_WORD            0x33
481 #define BYTE_EN_BYTE            0x11
482 #define BYTE_EN_SIX_BYTES       0x3f
483 #define BYTE_EN_START_MASK      0x0f
484 #define BYTE_EN_END_MASK        0xf0
485
486 #define RTL8153_MAX_PACKET      9216 /* 9K */
487 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
488 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
489 #define RTL8153_RMS             RTL8153_MAX_PACKET
490 #define RTL8152_TX_TIMEOUT      (5 * HZ)
491 #define RTL8152_NAPI_WEIGHT     64
492
493 /* rtl8152 flags */
494 enum rtl8152_flags {
495         RTL8152_UNPLUG = 0,
496         RTL8152_SET_RX_MODE,
497         WORK_ENABLE,
498         RTL8152_LINK_CHG,
499         SELECTIVE_SUSPEND,
500         PHY_RESET,
501         SCHEDULE_NAPI,
502 };
503
504 /* Define these values to match your device */
505 #define VENDOR_ID_REALTEK               0x0bda
506 #define VENDOR_ID_SAMSUNG               0x04e8
507 #define VENDOR_ID_LENOVO                0x17ef
508 #define VENDOR_ID_NVIDIA                0x0955
509
510 #define MCU_TYPE_PLA                    0x0100
511 #define MCU_TYPE_USB                    0x0000
512
513 struct tally_counter {
514         __le64  tx_packets;
515         __le64  rx_packets;
516         __le64  tx_errors;
517         __le32  rx_errors;
518         __le16  rx_missed;
519         __le16  align_errors;
520         __le32  tx_one_collision;
521         __le32  tx_multi_collision;
522         __le64  rx_unicast;
523         __le64  rx_broadcast;
524         __le32  rx_multicast;
525         __le16  tx_aborted;
526         __le16  tx_underrun;
527 };
528
529 struct rx_desc {
530         __le32 opts1;
531 #define RX_LEN_MASK                     0x7fff
532
533         __le32 opts2;
534 #define RD_UDP_CS                       BIT(23)
535 #define RD_TCP_CS                       BIT(22)
536 #define RD_IPV6_CS                      BIT(20)
537 #define RD_IPV4_CS                      BIT(19)
538
539         __le32 opts3;
540 #define IPF                             BIT(23) /* IP checksum fail */
541 #define UDPF                            BIT(22) /* UDP checksum fail */
542 #define TCPF                            BIT(21) /* TCP checksum fail */
543 #define RX_VLAN_TAG                     BIT(16)
544
545         __le32 opts4;
546         __le32 opts5;
547         __le32 opts6;
548 };
549
550 struct tx_desc {
551         __le32 opts1;
552 #define TX_FS                   BIT(31) /* First segment of a packet */
553 #define TX_LS                   BIT(30) /* Final segment of a packet */
554 #define GTSENDV4                BIT(28)
555 #define GTSENDV6                BIT(27)
556 #define GTTCPHO_SHIFT           18
557 #define GTTCPHO_MAX             0x7fU
558 #define TX_LEN_MAX              0x3ffffU
559
560         __le32 opts2;
561 #define UDP_CS                  BIT(31) /* Calculate UDP/IP checksum */
562 #define TCP_CS                  BIT(30) /* Calculate TCP/IP checksum */
563 #define IPV4_CS                 BIT(29) /* Calculate IPv4 checksum */
564 #define IPV6_CS                 BIT(28) /* Calculate IPv6 checksum */
565 #define MSS_SHIFT               17
566 #define MSS_MAX                 0x7ffU
567 #define TCPHO_SHIFT             17
568 #define TCPHO_MAX               0x7ffU
569 #define TX_VLAN_TAG             BIT(16)
570 };
571
572 struct r8152;
573
574 struct rx_agg {
575         struct list_head list;
576         struct urb *urb;
577         struct r8152 *context;
578         void *buffer;
579         void *head;
580 };
581
582 struct tx_agg {
583         struct list_head list;
584         struct urb *urb;
585         struct r8152 *context;
586         void *buffer;
587         void *head;
588         u32 skb_num;
589         u32 skb_len;
590 };
591
592 struct r8152 {
593         unsigned long flags;
594         struct usb_device *udev;
595         struct napi_struct napi;
596         struct usb_interface *intf;
597         struct net_device *netdev;
598         struct urb *intr_urb;
599         struct tx_agg tx_info[RTL8152_MAX_TX];
600         struct rx_agg rx_info[RTL8152_MAX_RX];
601         struct list_head rx_done, tx_free;
602         struct sk_buff_head tx_queue, rx_queue;
603         spinlock_t rx_lock, tx_lock;
604         struct delayed_work schedule;
605         struct mii_if_info mii;
606         struct mutex control;   /* use for hw setting */
607
608         struct rtl_ops {
609                 void (*init)(struct r8152 *);
610                 int (*enable)(struct r8152 *);
611                 void (*disable)(struct r8152 *);
612                 void (*up)(struct r8152 *);
613                 void (*down)(struct r8152 *);
614                 void (*unload)(struct r8152 *);
615                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
616                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
617                 bool (*in_nway)(struct r8152 *);
618         } rtl_ops;
619
620         int intr_interval;
621         u32 saved_wolopts;
622         u32 msg_enable;
623         u32 tx_qlen;
624         u32 coalesce;
625         u16 ocp_base;
626         u8 *intr_buff;
627         u8 version;
628 };
629
630 enum rtl_version {
631         RTL_VER_UNKNOWN = 0,
632         RTL_VER_01,
633         RTL_VER_02,
634         RTL_VER_03,
635         RTL_VER_04,
636         RTL_VER_05,
637         RTL_VER_06,
638         RTL_VER_MAX
639 };
640
641 enum tx_csum_stat {
642         TX_CSUM_SUCCESS = 0,
643         TX_CSUM_TSO,
644         TX_CSUM_NONE
645 };
646
647 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
648  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
649  */
650 static const int multicast_filter_limit = 32;
651 static unsigned int agg_buf_sz = 16384;
652
653 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
654                                  VLAN_ETH_HLEN - VLAN_HLEN)
655
656 static
657 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
658 {
659         int ret;
660         void *tmp;
661
662         tmp = kmalloc(size, GFP_KERNEL);
663         if (!tmp)
664                 return -ENOMEM;
665
666         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
667                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
668                               value, index, tmp, size, 500);
669
670         memcpy(data, tmp, size);
671         kfree(tmp);
672
673         return ret;
674 }
675
676 static
677 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
678 {
679         int ret;
680         void *tmp;
681
682         tmp = kmemdup(data, size, GFP_KERNEL);
683         if (!tmp)
684                 return -ENOMEM;
685
686         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
687                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
688                               value, index, tmp, size, 500);
689
690         kfree(tmp);
691
692         return ret;
693 }
694
695 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
696                             void *data, u16 type)
697 {
698         u16 limit = 64;
699         int ret = 0;
700
701         if (test_bit(RTL8152_UNPLUG, &tp->flags))
702                 return -ENODEV;
703
704         /* both size and indix must be 4 bytes align */
705         if ((size & 3) || !size || (index & 3) || !data)
706                 return -EPERM;
707
708         if ((u32)index + (u32)size > 0xffff)
709                 return -EPERM;
710
711         while (size) {
712                 if (size > limit) {
713                         ret = get_registers(tp, index, type, limit, data);
714                         if (ret < 0)
715                                 break;
716
717                         index += limit;
718                         data += limit;
719                         size -= limit;
720                 } else {
721                         ret = get_registers(tp, index, type, size, data);
722                         if (ret < 0)
723                                 break;
724
725                         index += size;
726                         data += size;
727                         size = 0;
728                         break;
729                 }
730         }
731
732         if (ret == -ENODEV)
733                 set_bit(RTL8152_UNPLUG, &tp->flags);
734
735         return ret;
736 }
737
738 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
739                              u16 size, void *data, u16 type)
740 {
741         int ret;
742         u16 byteen_start, byteen_end, byen;
743         u16 limit = 512;
744
745         if (test_bit(RTL8152_UNPLUG, &tp->flags))
746                 return -ENODEV;
747
748         /* both size and indix must be 4 bytes align */
749         if ((size & 3) || !size || (index & 3) || !data)
750                 return -EPERM;
751
752         if ((u32)index + (u32)size > 0xffff)
753                 return -EPERM;
754
755         byteen_start = byteen & BYTE_EN_START_MASK;
756         byteen_end = byteen & BYTE_EN_END_MASK;
757
758         byen = byteen_start | (byteen_start << 4);
759         ret = set_registers(tp, index, type | byen, 4, data);
760         if (ret < 0)
761                 goto error1;
762
763         index += 4;
764         data += 4;
765         size -= 4;
766
767         if (size) {
768                 size -= 4;
769
770                 while (size) {
771                         if (size > limit) {
772                                 ret = set_registers(tp, index,
773                                                     type | BYTE_EN_DWORD,
774                                                     limit, data);
775                                 if (ret < 0)
776                                         goto error1;
777
778                                 index += limit;
779                                 data += limit;
780                                 size -= limit;
781                         } else {
782                                 ret = set_registers(tp, index,
783                                                     type | BYTE_EN_DWORD,
784                                                     size, data);
785                                 if (ret < 0)
786                                         goto error1;
787
788                                 index += size;
789                                 data += size;
790                                 size = 0;
791                                 break;
792                         }
793                 }
794
795                 byen = byteen_end | (byteen_end >> 4);
796                 ret = set_registers(tp, index, type | byen, 4, data);
797                 if (ret < 0)
798                         goto error1;
799         }
800
801 error1:
802         if (ret == -ENODEV)
803                 set_bit(RTL8152_UNPLUG, &tp->flags);
804
805         return ret;
806 }
807
808 static inline
809 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
810 {
811         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
812 }
813
814 static inline
815 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
816 {
817         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
818 }
819
820 static inline
821 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
822 {
823         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
824 }
825
826 static inline
827 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
828 {
829         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
830 }
831
832 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
833 {
834         __le32 data;
835
836         generic_ocp_read(tp, index, sizeof(data), &data, type);
837
838         return __le32_to_cpu(data);
839 }
840
841 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
842 {
843         __le32 tmp = __cpu_to_le32(data);
844
845         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
846 }
847
848 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
849 {
850         u32 data;
851         __le32 tmp;
852         u8 shift = index & 2;
853
854         index &= ~3;
855
856         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
857
858         data = __le32_to_cpu(tmp);
859         data >>= (shift * 8);
860         data &= 0xffff;
861
862         return (u16)data;
863 }
864
865 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
866 {
867         u32 mask = 0xffff;
868         __le32 tmp;
869         u16 byen = BYTE_EN_WORD;
870         u8 shift = index & 2;
871
872         data &= mask;
873
874         if (index & 2) {
875                 byen <<= shift;
876                 mask <<= (shift * 8);
877                 data <<= (shift * 8);
878                 index &= ~3;
879         }
880
881         tmp = __cpu_to_le32(data);
882
883         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
884 }
885
886 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
887 {
888         u32 data;
889         __le32 tmp;
890         u8 shift = index & 3;
891
892         index &= ~3;
893
894         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
895
896         data = __le32_to_cpu(tmp);
897         data >>= (shift * 8);
898         data &= 0xff;
899
900         return (u8)data;
901 }
902
903 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
904 {
905         u32 mask = 0xff;
906         __le32 tmp;
907         u16 byen = BYTE_EN_BYTE;
908         u8 shift = index & 3;
909
910         data &= mask;
911
912         if (index & 3) {
913                 byen <<= shift;
914                 mask <<= (shift * 8);
915                 data <<= (shift * 8);
916                 index &= ~3;
917         }
918
919         tmp = __cpu_to_le32(data);
920
921         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
922 }
923
924 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
925 {
926         u16 ocp_base, ocp_index;
927
928         ocp_base = addr & 0xf000;
929         if (ocp_base != tp->ocp_base) {
930                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
931                 tp->ocp_base = ocp_base;
932         }
933
934         ocp_index = (addr & 0x0fff) | 0xb000;
935         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
936 }
937
938 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
939 {
940         u16 ocp_base, ocp_index;
941
942         ocp_base = addr & 0xf000;
943         if (ocp_base != tp->ocp_base) {
944                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
945                 tp->ocp_base = ocp_base;
946         }
947
948         ocp_index = (addr & 0x0fff) | 0xb000;
949         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
950 }
951
952 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
953 {
954         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
955 }
956
957 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
958 {
959         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
960 }
961
962 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
963 {
964         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
965         ocp_reg_write(tp, OCP_SRAM_DATA, data);
966 }
967
968 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
969 {
970         struct r8152 *tp = netdev_priv(netdev);
971         int ret;
972
973         if (test_bit(RTL8152_UNPLUG, &tp->flags))
974                 return -ENODEV;
975
976         if (phy_id != R8152_PHY_ID)
977                 return -EINVAL;
978
979         ret = r8152_mdio_read(tp, reg);
980
981         return ret;
982 }
983
984 static
985 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
986 {
987         struct r8152 *tp = netdev_priv(netdev);
988
989         if (test_bit(RTL8152_UNPLUG, &tp->flags))
990                 return;
991
992         if (phy_id != R8152_PHY_ID)
993                 return;
994
995         r8152_mdio_write(tp, reg, val);
996 }
997
998 static int
999 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1000
1001 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1002 {
1003         struct r8152 *tp = netdev_priv(netdev);
1004         struct sockaddr *addr = p;
1005         int ret = -EADDRNOTAVAIL;
1006
1007         if (!is_valid_ether_addr(addr->sa_data))
1008                 goto out1;
1009
1010         ret = usb_autopm_get_interface(tp->intf);
1011         if (ret < 0)
1012                 goto out1;
1013
1014         mutex_lock(&tp->control);
1015
1016         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1017
1018         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1019         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1020         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1021
1022         mutex_unlock(&tp->control);
1023
1024         usb_autopm_put_interface(tp->intf);
1025 out1:
1026         return ret;
1027 }
1028
1029 static int set_ethernet_addr(struct r8152 *tp)
1030 {
1031         struct net_device *dev = tp->netdev;
1032         struct sockaddr sa;
1033         int ret;
1034
1035         if (tp->version == RTL_VER_01)
1036                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1037         else
1038                 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1039
1040         if (ret < 0) {
1041                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1042         } else if (!is_valid_ether_addr(sa.sa_data)) {
1043                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1044                           sa.sa_data);
1045                 eth_hw_addr_random(dev);
1046                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1047                 ret = rtl8152_set_mac_address(dev, &sa);
1048                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1049                            sa.sa_data);
1050         } else {
1051                 if (tp->version == RTL_VER_01)
1052                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1053                 else
1054                         ret = rtl8152_set_mac_address(dev, &sa);
1055         }
1056
1057         return ret;
1058 }
1059
1060 static void read_bulk_callback(struct urb *urb)
1061 {
1062         struct net_device *netdev;
1063         int status = urb->status;
1064         struct rx_agg *agg;
1065         struct r8152 *tp;
1066
1067         agg = urb->context;
1068         if (!agg)
1069                 return;
1070
1071         tp = agg->context;
1072         if (!tp)
1073                 return;
1074
1075         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1076                 return;
1077
1078         if (!test_bit(WORK_ENABLE, &tp->flags))
1079                 return;
1080
1081         netdev = tp->netdev;
1082
1083         /* When link down, the driver would cancel all bulks. */
1084         /* This avoid the re-submitting bulk */
1085         if (!netif_carrier_ok(netdev))
1086                 return;
1087
1088         usb_mark_last_busy(tp->udev);
1089
1090         switch (status) {
1091         case 0:
1092                 if (urb->actual_length < ETH_ZLEN)
1093                         break;
1094
1095                 spin_lock(&tp->rx_lock);
1096                 list_add_tail(&agg->list, &tp->rx_done);
1097                 spin_unlock(&tp->rx_lock);
1098                 napi_schedule(&tp->napi);
1099                 return;
1100         case -ESHUTDOWN:
1101                 set_bit(RTL8152_UNPLUG, &tp->flags);
1102                 netif_device_detach(tp->netdev);
1103                 return;
1104         case -ENOENT:
1105                 return; /* the urb is in unlink state */
1106         case -ETIME:
1107                 if (net_ratelimit())
1108                         netdev_warn(netdev, "maybe reset is needed?\n");
1109                 break;
1110         default:
1111                 if (net_ratelimit())
1112                         netdev_warn(netdev, "Rx status %d\n", status);
1113                 break;
1114         }
1115
1116         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1117 }
1118
1119 static void write_bulk_callback(struct urb *urb)
1120 {
1121         struct net_device_stats *stats;
1122         struct net_device *netdev;
1123         struct tx_agg *agg;
1124         struct r8152 *tp;
1125         int status = urb->status;
1126
1127         agg = urb->context;
1128         if (!agg)
1129                 return;
1130
1131         tp = agg->context;
1132         if (!tp)
1133                 return;
1134
1135         netdev = tp->netdev;
1136         stats = &netdev->stats;
1137         if (status) {
1138                 if (net_ratelimit())
1139                         netdev_warn(netdev, "Tx status %d\n", status);
1140                 stats->tx_errors += agg->skb_num;
1141         } else {
1142                 stats->tx_packets += agg->skb_num;
1143                 stats->tx_bytes += agg->skb_len;
1144         }
1145
1146         spin_lock(&tp->tx_lock);
1147         list_add_tail(&agg->list, &tp->tx_free);
1148         spin_unlock(&tp->tx_lock);
1149
1150         usb_autopm_put_interface_async(tp->intf);
1151
1152         if (!netif_carrier_ok(netdev))
1153                 return;
1154
1155         if (!test_bit(WORK_ENABLE, &tp->flags))
1156                 return;
1157
1158         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1159                 return;
1160
1161         if (!skb_queue_empty(&tp->tx_queue))
1162                 napi_schedule(&tp->napi);
1163 }
1164
1165 static void intr_callback(struct urb *urb)
1166 {
1167         struct r8152 *tp;
1168         __le16 *d;
1169         int status = urb->status;
1170         int res;
1171
1172         tp = urb->context;
1173         if (!tp)
1174                 return;
1175
1176         if (!test_bit(WORK_ENABLE, &tp->flags))
1177                 return;
1178
1179         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1180                 return;
1181
1182         switch (status) {
1183         case 0:                 /* success */
1184                 break;
1185         case -ECONNRESET:       /* unlink */
1186         case -ESHUTDOWN:
1187                 netif_device_detach(tp->netdev);
1188         case -ENOENT:
1189         case -EPROTO:
1190                 netif_info(tp, intr, tp->netdev,
1191                            "Stop submitting intr, status %d\n", status);
1192                 return;
1193         case -EOVERFLOW:
1194                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1195                 goto resubmit;
1196         /* -EPIPE:  should clear the halt */
1197         default:
1198                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1199                 goto resubmit;
1200         }
1201
1202         d = urb->transfer_buffer;
1203         if (INTR_LINK & __le16_to_cpu(d[0])) {
1204                 if (!netif_carrier_ok(tp->netdev)) {
1205                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1206                         schedule_delayed_work(&tp->schedule, 0);
1207                 }
1208         } else {
1209                 if (netif_carrier_ok(tp->netdev)) {
1210                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1211                         schedule_delayed_work(&tp->schedule, 0);
1212                 }
1213         }
1214
1215 resubmit:
1216         res = usb_submit_urb(urb, GFP_ATOMIC);
1217         if (res == -ENODEV) {
1218                 set_bit(RTL8152_UNPLUG, &tp->flags);
1219                 netif_device_detach(tp->netdev);
1220         } else if (res) {
1221                 netif_err(tp, intr, tp->netdev,
1222                           "can't resubmit intr, status %d\n", res);
1223         }
1224 }
1225
1226 static inline void *rx_agg_align(void *data)
1227 {
1228         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1229 }
1230
1231 static inline void *tx_agg_align(void *data)
1232 {
1233         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1234 }
1235
1236 static void free_all_mem(struct r8152 *tp)
1237 {
1238         int i;
1239
1240         for (i = 0; i < RTL8152_MAX_RX; i++) {
1241                 usb_free_urb(tp->rx_info[i].urb);
1242                 tp->rx_info[i].urb = NULL;
1243
1244                 kfree(tp->rx_info[i].buffer);
1245                 tp->rx_info[i].buffer = NULL;
1246                 tp->rx_info[i].head = NULL;
1247         }
1248
1249         for (i = 0; i < RTL8152_MAX_TX; i++) {
1250                 usb_free_urb(tp->tx_info[i].urb);
1251                 tp->tx_info[i].urb = NULL;
1252
1253                 kfree(tp->tx_info[i].buffer);
1254                 tp->tx_info[i].buffer = NULL;
1255                 tp->tx_info[i].head = NULL;
1256         }
1257
1258         usb_free_urb(tp->intr_urb);
1259         tp->intr_urb = NULL;
1260
1261         kfree(tp->intr_buff);
1262         tp->intr_buff = NULL;
1263 }
1264
1265 static int alloc_all_mem(struct r8152 *tp)
1266 {
1267         struct net_device *netdev = tp->netdev;
1268         struct usb_interface *intf = tp->intf;
1269         struct usb_host_interface *alt = intf->cur_altsetting;
1270         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1271         struct urb *urb;
1272         int node, i;
1273         u8 *buf;
1274
1275         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1276
1277         spin_lock_init(&tp->rx_lock);
1278         spin_lock_init(&tp->tx_lock);
1279         INIT_LIST_HEAD(&tp->tx_free);
1280         skb_queue_head_init(&tp->tx_queue);
1281         skb_queue_head_init(&tp->rx_queue);
1282
1283         for (i = 0; i < RTL8152_MAX_RX; i++) {
1284                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1285                 if (!buf)
1286                         goto err1;
1287
1288                 if (buf != rx_agg_align(buf)) {
1289                         kfree(buf);
1290                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1291                                            node);
1292                         if (!buf)
1293                                 goto err1;
1294                 }
1295
1296                 urb = usb_alloc_urb(0, GFP_KERNEL);
1297                 if (!urb) {
1298                         kfree(buf);
1299                         goto err1;
1300                 }
1301
1302                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1303                 tp->rx_info[i].context = tp;
1304                 tp->rx_info[i].urb = urb;
1305                 tp->rx_info[i].buffer = buf;
1306                 tp->rx_info[i].head = rx_agg_align(buf);
1307         }
1308
1309         for (i = 0; i < RTL8152_MAX_TX; i++) {
1310                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1311                 if (!buf)
1312                         goto err1;
1313
1314                 if (buf != tx_agg_align(buf)) {
1315                         kfree(buf);
1316                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1317                                            node);
1318                         if (!buf)
1319                                 goto err1;
1320                 }
1321
1322                 urb = usb_alloc_urb(0, GFP_KERNEL);
1323                 if (!urb) {
1324                         kfree(buf);
1325                         goto err1;
1326                 }
1327
1328                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1329                 tp->tx_info[i].context = tp;
1330                 tp->tx_info[i].urb = urb;
1331                 tp->tx_info[i].buffer = buf;
1332                 tp->tx_info[i].head = tx_agg_align(buf);
1333
1334                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1335         }
1336
1337         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1338         if (!tp->intr_urb)
1339                 goto err1;
1340
1341         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1342         if (!tp->intr_buff)
1343                 goto err1;
1344
1345         tp->intr_interval = (int)ep_intr->desc.bInterval;
1346         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1347                          tp->intr_buff, INTBUFSIZE, intr_callback,
1348                          tp, tp->intr_interval);
1349
1350         return 0;
1351
1352 err1:
1353         free_all_mem(tp);
1354         return -ENOMEM;
1355 }
1356
1357 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1358 {
1359         struct tx_agg *agg = NULL;
1360         unsigned long flags;
1361
1362         if (list_empty(&tp->tx_free))
1363                 return NULL;
1364
1365         spin_lock_irqsave(&tp->tx_lock, flags);
1366         if (!list_empty(&tp->tx_free)) {
1367                 struct list_head *cursor;
1368
1369                 cursor = tp->tx_free.next;
1370                 list_del_init(cursor);
1371                 agg = list_entry(cursor, struct tx_agg, list);
1372         }
1373         spin_unlock_irqrestore(&tp->tx_lock, flags);
1374
1375         return agg;
1376 }
1377
1378 /* r8152_csum_workaround()
1379  * The hw limites the value the transport offset. When the offset is out of the
1380  * range, calculate the checksum by sw.
1381  */
1382 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1383                                   struct sk_buff_head *list)
1384 {
1385         if (skb_shinfo(skb)->gso_size) {
1386                 netdev_features_t features = tp->netdev->features;
1387                 struct sk_buff_head seg_list;
1388                 struct sk_buff *segs, *nskb;
1389
1390                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1391                 segs = skb_gso_segment(skb, features);
1392                 if (IS_ERR(segs) || !segs)
1393                         goto drop;
1394
1395                 __skb_queue_head_init(&seg_list);
1396
1397                 do {
1398                         nskb = segs;
1399                         segs = segs->next;
1400                         nskb->next = NULL;
1401                         __skb_queue_tail(&seg_list, nskb);
1402                 } while (segs);
1403
1404                 skb_queue_splice(&seg_list, list);
1405                 dev_kfree_skb(skb);
1406         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1407                 if (skb_checksum_help(skb) < 0)
1408                         goto drop;
1409
1410                 __skb_queue_head(list, skb);
1411         } else {
1412                 struct net_device_stats *stats;
1413
1414 drop:
1415                 stats = &tp->netdev->stats;
1416                 stats->tx_dropped++;
1417                 dev_kfree_skb(skb);
1418         }
1419 }
1420
1421 /* msdn_giant_send_check()
1422  * According to the document of microsoft, the TCP Pseudo Header excludes the
1423  * packet length for IPv6 TCP large packets.
1424  */
1425 static int msdn_giant_send_check(struct sk_buff *skb)
1426 {
1427         const struct ipv6hdr *ipv6h;
1428         struct tcphdr *th;
1429         int ret;
1430
1431         ret = skb_cow_head(skb, 0);
1432         if (ret)
1433                 return ret;
1434
1435         ipv6h = ipv6_hdr(skb);
1436         th = tcp_hdr(skb);
1437
1438         th->check = 0;
1439         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1440
1441         return ret;
1442 }
1443
1444 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1445 {
1446         if (skb_vlan_tag_present(skb)) {
1447                 u32 opts2;
1448
1449                 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1450                 desc->opts2 |= cpu_to_le32(opts2);
1451         }
1452 }
1453
1454 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1455 {
1456         u32 opts2 = le32_to_cpu(desc->opts2);
1457
1458         if (opts2 & RX_VLAN_TAG)
1459                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1460                                        swab16(opts2 & 0xffff));
1461 }
1462
1463 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1464                          struct sk_buff *skb, u32 len, u32 transport_offset)
1465 {
1466         u32 mss = skb_shinfo(skb)->gso_size;
1467         u32 opts1, opts2 = 0;
1468         int ret = TX_CSUM_SUCCESS;
1469
1470         WARN_ON_ONCE(len > TX_LEN_MAX);
1471
1472         opts1 = len | TX_FS | TX_LS;
1473
1474         if (mss) {
1475                 if (transport_offset > GTTCPHO_MAX) {
1476                         netif_warn(tp, tx_err, tp->netdev,
1477                                    "Invalid transport offset 0x%x for TSO\n",
1478                                    transport_offset);
1479                         ret = TX_CSUM_TSO;
1480                         goto unavailable;
1481                 }
1482
1483                 switch (vlan_get_protocol(skb)) {
1484                 case htons(ETH_P_IP):
1485                         opts1 |= GTSENDV4;
1486                         break;
1487
1488                 case htons(ETH_P_IPV6):
1489                         if (msdn_giant_send_check(skb)) {
1490                                 ret = TX_CSUM_TSO;
1491                                 goto unavailable;
1492                         }
1493                         opts1 |= GTSENDV6;
1494                         break;
1495
1496                 default:
1497                         WARN_ON_ONCE(1);
1498                         break;
1499                 }
1500
1501                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1502                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1503         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1504                 u8 ip_protocol;
1505
1506                 if (transport_offset > TCPHO_MAX) {
1507                         netif_warn(tp, tx_err, tp->netdev,
1508                                    "Invalid transport offset 0x%x\n",
1509                                    transport_offset);
1510                         ret = TX_CSUM_NONE;
1511                         goto unavailable;
1512                 }
1513
1514                 switch (vlan_get_protocol(skb)) {
1515                 case htons(ETH_P_IP):
1516                         opts2 |= IPV4_CS;
1517                         ip_protocol = ip_hdr(skb)->protocol;
1518                         break;
1519
1520                 case htons(ETH_P_IPV6):
1521                         opts2 |= IPV6_CS;
1522                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1523                         break;
1524
1525                 default:
1526                         ip_protocol = IPPROTO_RAW;
1527                         break;
1528                 }
1529
1530                 if (ip_protocol == IPPROTO_TCP)
1531                         opts2 |= TCP_CS;
1532                 else if (ip_protocol == IPPROTO_UDP)
1533                         opts2 |= UDP_CS;
1534                 else
1535                         WARN_ON_ONCE(1);
1536
1537                 opts2 |= transport_offset << TCPHO_SHIFT;
1538         }
1539
1540         desc->opts2 = cpu_to_le32(opts2);
1541         desc->opts1 = cpu_to_le32(opts1);
1542
1543 unavailable:
1544         return ret;
1545 }
1546
1547 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1548 {
1549         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1550         int remain, ret;
1551         u8 *tx_data;
1552
1553         __skb_queue_head_init(&skb_head);
1554         spin_lock(&tx_queue->lock);
1555         skb_queue_splice_init(tx_queue, &skb_head);
1556         spin_unlock(&tx_queue->lock);
1557
1558         tx_data = agg->head;
1559         agg->skb_num = 0;
1560         agg->skb_len = 0;
1561         remain = agg_buf_sz;
1562
1563         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1564                 struct tx_desc *tx_desc;
1565                 struct sk_buff *skb;
1566                 unsigned int len;
1567                 u32 offset;
1568
1569                 skb = __skb_dequeue(&skb_head);
1570                 if (!skb)
1571                         break;
1572
1573                 len = skb->len + sizeof(*tx_desc);
1574
1575                 if (len > remain) {
1576                         __skb_queue_head(&skb_head, skb);
1577                         break;
1578                 }
1579
1580                 tx_data = tx_agg_align(tx_data);
1581                 tx_desc = (struct tx_desc *)tx_data;
1582
1583                 offset = (u32)skb_transport_offset(skb);
1584
1585                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1586                         r8152_csum_workaround(tp, skb, &skb_head);
1587                         continue;
1588                 }
1589
1590                 rtl_tx_vlan_tag(tx_desc, skb);
1591
1592                 tx_data += sizeof(*tx_desc);
1593
1594                 len = skb->len;
1595                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1596                         struct net_device_stats *stats = &tp->netdev->stats;
1597
1598                         stats->tx_dropped++;
1599                         dev_kfree_skb_any(skb);
1600                         tx_data -= sizeof(*tx_desc);
1601                         continue;
1602                 }
1603
1604                 tx_data += len;
1605                 agg->skb_len += len;
1606                 agg->skb_num++;
1607
1608                 dev_kfree_skb_any(skb);
1609
1610                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1611         }
1612
1613         if (!skb_queue_empty(&skb_head)) {
1614                 spin_lock(&tx_queue->lock);
1615                 skb_queue_splice(&skb_head, tx_queue);
1616                 spin_unlock(&tx_queue->lock);
1617         }
1618
1619         netif_tx_lock(tp->netdev);
1620
1621         if (netif_queue_stopped(tp->netdev) &&
1622             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1623                 netif_wake_queue(tp->netdev);
1624
1625         netif_tx_unlock(tp->netdev);
1626
1627         ret = usb_autopm_get_interface_async(tp->intf);
1628         if (ret < 0)
1629                 goto out_tx_fill;
1630
1631         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1632                           agg->head, (int)(tx_data - (u8 *)agg->head),
1633                           (usb_complete_t)write_bulk_callback, agg);
1634
1635         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1636         if (ret < 0)
1637                 usb_autopm_put_interface_async(tp->intf);
1638
1639 out_tx_fill:
1640         return ret;
1641 }
1642
1643 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1644 {
1645         u8 checksum = CHECKSUM_NONE;
1646         u32 opts2, opts3;
1647
1648         if (tp->version == RTL_VER_01)
1649                 goto return_result;
1650
1651         opts2 = le32_to_cpu(rx_desc->opts2);
1652         opts3 = le32_to_cpu(rx_desc->opts3);
1653
1654         if (opts2 & RD_IPV4_CS) {
1655                 if (opts3 & IPF)
1656                         checksum = CHECKSUM_NONE;
1657                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1658                         checksum = CHECKSUM_NONE;
1659                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1660                         checksum = CHECKSUM_NONE;
1661                 else
1662                         checksum = CHECKSUM_UNNECESSARY;
1663         } else if (RD_IPV6_CS) {
1664                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1665                         checksum = CHECKSUM_UNNECESSARY;
1666                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1667                         checksum = CHECKSUM_UNNECESSARY;
1668         }
1669
1670 return_result:
1671         return checksum;
1672 }
1673
1674 static int rx_bottom(struct r8152 *tp, int budget)
1675 {
1676         unsigned long flags;
1677         struct list_head *cursor, *next, rx_queue;
1678         int ret = 0, work_done = 0;
1679
1680         if (!skb_queue_empty(&tp->rx_queue)) {
1681                 while (work_done < budget) {
1682                         struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1683                         struct net_device *netdev = tp->netdev;
1684                         struct net_device_stats *stats = &netdev->stats;
1685                         unsigned int pkt_len;
1686
1687                         if (!skb)
1688                                 break;
1689
1690                         pkt_len = skb->len;
1691                         napi_gro_receive(&tp->napi, skb);
1692                         work_done++;
1693                         stats->rx_packets++;
1694                         stats->rx_bytes += pkt_len;
1695                 }
1696         }
1697
1698         if (list_empty(&tp->rx_done))
1699                 goto out1;
1700
1701         INIT_LIST_HEAD(&rx_queue);
1702         spin_lock_irqsave(&tp->rx_lock, flags);
1703         list_splice_init(&tp->rx_done, &rx_queue);
1704         spin_unlock_irqrestore(&tp->rx_lock, flags);
1705
1706         list_for_each_safe(cursor, next, &rx_queue) {
1707                 struct rx_desc *rx_desc;
1708                 struct rx_agg *agg;
1709                 int len_used = 0;
1710                 struct urb *urb;
1711                 u8 *rx_data;
1712
1713                 list_del_init(cursor);
1714
1715                 agg = list_entry(cursor, struct rx_agg, list);
1716                 urb = agg->urb;
1717                 if (urb->actual_length < ETH_ZLEN)
1718                         goto submit;
1719
1720                 rx_desc = agg->head;
1721                 rx_data = agg->head;
1722                 len_used += sizeof(struct rx_desc);
1723
1724                 while (urb->actual_length > len_used) {
1725                         struct net_device *netdev = tp->netdev;
1726                         struct net_device_stats *stats = &netdev->stats;
1727                         unsigned int pkt_len;
1728                         struct sk_buff *skb;
1729
1730                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1731                         if (pkt_len < ETH_ZLEN)
1732                                 break;
1733
1734                         len_used += pkt_len;
1735                         if (urb->actual_length < len_used)
1736                                 break;
1737
1738                         pkt_len -= CRC_SIZE;
1739                         rx_data += sizeof(struct rx_desc);
1740
1741                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1742                         if (!skb) {
1743                                 stats->rx_dropped++;
1744                                 goto find_next_rx;
1745                         }
1746
1747                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1748                         memcpy(skb->data, rx_data, pkt_len);
1749                         skb_put(skb, pkt_len);
1750                         skb->protocol = eth_type_trans(skb, netdev);
1751                         rtl_rx_vlan_tag(rx_desc, skb);
1752                         if (work_done < budget) {
1753                                 napi_gro_receive(&tp->napi, skb);
1754                                 work_done++;
1755                                 stats->rx_packets++;
1756                                 stats->rx_bytes += pkt_len;
1757                         } else {
1758                                 __skb_queue_tail(&tp->rx_queue, skb);
1759                         }
1760
1761 find_next_rx:
1762                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1763                         rx_desc = (struct rx_desc *)rx_data;
1764                         len_used = (int)(rx_data - (u8 *)agg->head);
1765                         len_used += sizeof(struct rx_desc);
1766                 }
1767
1768 submit:
1769                 if (!ret) {
1770                         ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1771                 } else {
1772                         urb->actual_length = 0;
1773                         list_add_tail(&agg->list, next);
1774                 }
1775         }
1776
1777         if (!list_empty(&rx_queue)) {
1778                 spin_lock_irqsave(&tp->rx_lock, flags);
1779                 list_splice_tail(&rx_queue, &tp->rx_done);
1780                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1781         }
1782
1783 out1:
1784         return work_done;
1785 }
1786
1787 static void tx_bottom(struct r8152 *tp)
1788 {
1789         int res;
1790
1791         do {
1792                 struct tx_agg *agg;
1793
1794                 if (skb_queue_empty(&tp->tx_queue))
1795                         break;
1796
1797                 agg = r8152_get_tx_agg(tp);
1798                 if (!agg)
1799                         break;
1800
1801                 res = r8152_tx_agg_fill(tp, agg);
1802                 if (res) {
1803                         struct net_device *netdev = tp->netdev;
1804
1805                         if (res == -ENODEV) {
1806                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1807                                 netif_device_detach(netdev);
1808                         } else {
1809                                 struct net_device_stats *stats = &netdev->stats;
1810                                 unsigned long flags;
1811
1812                                 netif_warn(tp, tx_err, netdev,
1813                                            "failed tx_urb %d\n", res);
1814                                 stats->tx_dropped += agg->skb_num;
1815
1816                                 spin_lock_irqsave(&tp->tx_lock, flags);
1817                                 list_add_tail(&agg->list, &tp->tx_free);
1818                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1819                         }
1820                 }
1821         } while (res == 0);
1822 }
1823
1824 static void bottom_half(struct r8152 *tp)
1825 {
1826         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1827                 return;
1828
1829         if (!test_bit(WORK_ENABLE, &tp->flags))
1830                 return;
1831
1832         /* When link down, the driver would cancel all bulks. */
1833         /* This avoid the re-submitting bulk */
1834         if (!netif_carrier_ok(tp->netdev))
1835                 return;
1836
1837         clear_bit(SCHEDULE_NAPI, &tp->flags);
1838
1839         tx_bottom(tp);
1840 }
1841
1842 static int r8152_poll(struct napi_struct *napi, int budget)
1843 {
1844         struct r8152 *tp = container_of(napi, struct r8152, napi);
1845         int work_done;
1846
1847         work_done = rx_bottom(tp, budget);
1848         bottom_half(tp);
1849
1850         if (work_done < budget) {
1851                 napi_complete(napi);
1852                 if (!list_empty(&tp->rx_done))
1853                         napi_schedule(napi);
1854         }
1855
1856         return work_done;
1857 }
1858
1859 static
1860 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1861 {
1862         int ret;
1863
1864         /* The rx would be stopped, so skip submitting */
1865         if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1866             !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1867                 return 0;
1868
1869         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1870                           agg->head, agg_buf_sz,
1871                           (usb_complete_t)read_bulk_callback, agg);
1872
1873         ret = usb_submit_urb(agg->urb, mem_flags);
1874         if (ret == -ENODEV) {
1875                 set_bit(RTL8152_UNPLUG, &tp->flags);
1876                 netif_device_detach(tp->netdev);
1877         } else if (ret) {
1878                 struct urb *urb = agg->urb;
1879                 unsigned long flags;
1880
1881                 urb->actual_length = 0;
1882                 spin_lock_irqsave(&tp->rx_lock, flags);
1883                 list_add_tail(&agg->list, &tp->rx_done);
1884                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1885
1886                 netif_err(tp, rx_err, tp->netdev,
1887                           "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1888
1889                 napi_schedule(&tp->napi);
1890         }
1891
1892         return ret;
1893 }
1894
1895 static void rtl_drop_queued_tx(struct r8152 *tp)
1896 {
1897         struct net_device_stats *stats = &tp->netdev->stats;
1898         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1899         struct sk_buff *skb;
1900
1901         if (skb_queue_empty(tx_queue))
1902                 return;
1903
1904         __skb_queue_head_init(&skb_head);
1905         spin_lock_bh(&tx_queue->lock);
1906         skb_queue_splice_init(tx_queue, &skb_head);
1907         spin_unlock_bh(&tx_queue->lock);
1908
1909         while ((skb = __skb_dequeue(&skb_head))) {
1910                 dev_kfree_skb(skb);
1911                 stats->tx_dropped++;
1912         }
1913 }
1914
1915 static void rtl8152_tx_timeout(struct net_device *netdev)
1916 {
1917         struct r8152 *tp = netdev_priv(netdev);
1918
1919         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1920
1921         usb_queue_reset_device(tp->intf);
1922 }
1923
1924 static void rtl8152_set_rx_mode(struct net_device *netdev)
1925 {
1926         struct r8152 *tp = netdev_priv(netdev);
1927
1928         if (netif_carrier_ok(netdev)) {
1929                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1930                 schedule_delayed_work(&tp->schedule, 0);
1931         }
1932 }
1933
1934 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1935 {
1936         struct r8152 *tp = netdev_priv(netdev);
1937         u32 mc_filter[2];       /* Multicast hash filter */
1938         __le32 tmp[2];
1939         u32 ocp_data;
1940
1941         netif_stop_queue(netdev);
1942         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1943         ocp_data &= ~RCR_ACPT_ALL;
1944         ocp_data |= RCR_AB | RCR_APM;
1945
1946         if (netdev->flags & IFF_PROMISC) {
1947                 /* Unconditionally log net taps. */
1948                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1949                 ocp_data |= RCR_AM | RCR_AAP;
1950                 mc_filter[1] = 0xffffffff;
1951                 mc_filter[0] = 0xffffffff;
1952         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1953                    (netdev->flags & IFF_ALLMULTI)) {
1954                 /* Too many to filter perfectly -- accept all multicasts. */
1955                 ocp_data |= RCR_AM;
1956                 mc_filter[1] = 0xffffffff;
1957                 mc_filter[0] = 0xffffffff;
1958         } else {
1959                 struct netdev_hw_addr *ha;
1960
1961                 mc_filter[1] = 0;
1962                 mc_filter[0] = 0;
1963                 netdev_for_each_mc_addr(ha, netdev) {
1964                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1965
1966                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1967                         ocp_data |= RCR_AM;
1968                 }
1969         }
1970
1971         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1972         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1973
1974         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1975         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1976         netif_wake_queue(netdev);
1977 }
1978
1979 static netdev_features_t
1980 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1981                        netdev_features_t features)
1982 {
1983         u32 mss = skb_shinfo(skb)->gso_size;
1984         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1985         int offset = skb_transport_offset(skb);
1986
1987         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1988                 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
1989         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
1990                 features &= ~NETIF_F_GSO_MASK;
1991
1992         return features;
1993 }
1994
1995 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1996                                       struct net_device *netdev)
1997 {
1998         struct r8152 *tp = netdev_priv(netdev);
1999
2000         skb_tx_timestamp(skb);
2001
2002         skb_queue_tail(&tp->tx_queue, skb);
2003
2004         if (!list_empty(&tp->tx_free)) {
2005                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2006                         set_bit(SCHEDULE_NAPI, &tp->flags);
2007                         schedule_delayed_work(&tp->schedule, 0);
2008                 } else {
2009                         usb_mark_last_busy(tp->udev);
2010                         napi_schedule(&tp->napi);
2011                 }
2012         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2013                 netif_stop_queue(netdev);
2014         }
2015
2016         return NETDEV_TX_OK;
2017 }
2018
2019 static void r8152b_reset_packet_filter(struct r8152 *tp)
2020 {
2021         u32     ocp_data;
2022
2023         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2024         ocp_data &= ~FMC_FCR_MCU_EN;
2025         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2026         ocp_data |= FMC_FCR_MCU_EN;
2027         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2028 }
2029
2030 static void rtl8152_nic_reset(struct r8152 *tp)
2031 {
2032         int     i;
2033
2034         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2035
2036         for (i = 0; i < 1000; i++) {
2037                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2038                         break;
2039                 usleep_range(100, 400);
2040         }
2041 }
2042
2043 static void set_tx_qlen(struct r8152 *tp)
2044 {
2045         struct net_device *netdev = tp->netdev;
2046
2047         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2048                                     sizeof(struct tx_desc));
2049 }
2050
2051 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2052 {
2053         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2054 }
2055
2056 static void rtl_set_eee_plus(struct r8152 *tp)
2057 {
2058         u32 ocp_data;
2059         u8 speed;
2060
2061         speed = rtl8152_get_speed(tp);
2062         if (speed & _10bps) {
2063                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2064                 ocp_data |= EEEP_CR_EEEP_TX;
2065                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2066         } else {
2067                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2068                 ocp_data &= ~EEEP_CR_EEEP_TX;
2069                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2070         }
2071 }
2072
2073 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2074 {
2075         u32 ocp_data;
2076
2077         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2078         if (enable)
2079                 ocp_data |= RXDY_GATED_EN;
2080         else
2081                 ocp_data &= ~RXDY_GATED_EN;
2082         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2083 }
2084
2085 static int rtl_start_rx(struct r8152 *tp)
2086 {
2087         int i, ret = 0;
2088
2089         INIT_LIST_HEAD(&tp->rx_done);
2090         for (i = 0; i < RTL8152_MAX_RX; i++) {
2091                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2092                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2093                 if (ret)
2094                         break;
2095         }
2096
2097         if (ret && ++i < RTL8152_MAX_RX) {
2098                 struct list_head rx_queue;
2099                 unsigned long flags;
2100
2101                 INIT_LIST_HEAD(&rx_queue);
2102
2103                 do {
2104                         struct rx_agg *agg = &tp->rx_info[i++];
2105                         struct urb *urb = agg->urb;
2106
2107                         urb->actual_length = 0;
2108                         list_add_tail(&agg->list, &rx_queue);
2109                 } while (i < RTL8152_MAX_RX);
2110
2111                 spin_lock_irqsave(&tp->rx_lock, flags);
2112                 list_splice_tail(&rx_queue, &tp->rx_done);
2113                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2114         }
2115
2116         return ret;
2117 }
2118
2119 static int rtl_stop_rx(struct r8152 *tp)
2120 {
2121         int i;
2122
2123         for (i = 0; i < RTL8152_MAX_RX; i++)
2124                 usb_kill_urb(tp->rx_info[i].urb);
2125
2126         while (!skb_queue_empty(&tp->rx_queue))
2127                 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2128
2129         return 0;
2130 }
2131
2132 static int rtl_enable(struct r8152 *tp)
2133 {
2134         u32 ocp_data;
2135
2136         r8152b_reset_packet_filter(tp);
2137
2138         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2139         ocp_data |= CR_RE | CR_TE;
2140         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2141
2142         rxdy_gated_en(tp, false);
2143
2144         return 0;
2145 }
2146
2147 static int rtl8152_enable(struct r8152 *tp)
2148 {
2149         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2150                 return -ENODEV;
2151
2152         set_tx_qlen(tp);
2153         rtl_set_eee_plus(tp);
2154
2155         return rtl_enable(tp);
2156 }
2157
2158 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2159 {
2160         u32 ocp_data = tp->coalesce / 8;
2161
2162         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2163 }
2164
2165 static void r8153_set_rx_early_size(struct r8152 *tp)
2166 {
2167         u32 mtu = tp->netdev->mtu;
2168         u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
2169
2170         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2171 }
2172
2173 static int rtl8153_enable(struct r8152 *tp)
2174 {
2175         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2176                 return -ENODEV;
2177
2178         usb_disable_lpm(tp->udev);
2179         set_tx_qlen(tp);
2180         rtl_set_eee_plus(tp);
2181         r8153_set_rx_early_timeout(tp);
2182         r8153_set_rx_early_size(tp);
2183
2184         return rtl_enable(tp);
2185 }
2186
2187 static void rtl_disable(struct r8152 *tp)
2188 {
2189         u32 ocp_data;
2190         int i;
2191
2192         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2193                 rtl_drop_queued_tx(tp);
2194                 return;
2195         }
2196
2197         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2198         ocp_data &= ~RCR_ACPT_ALL;
2199         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2200
2201         rtl_drop_queued_tx(tp);
2202
2203         for (i = 0; i < RTL8152_MAX_TX; i++)
2204                 usb_kill_urb(tp->tx_info[i].urb);
2205
2206         rxdy_gated_en(tp, true);
2207
2208         for (i = 0; i < 1000; i++) {
2209                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2210                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2211                         break;
2212                 usleep_range(1000, 2000);
2213         }
2214
2215         for (i = 0; i < 1000; i++) {
2216                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2217                         break;
2218                 usleep_range(1000, 2000);
2219         }
2220
2221         rtl_stop_rx(tp);
2222
2223         rtl8152_nic_reset(tp);
2224 }
2225
2226 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2227 {
2228         u32 ocp_data;
2229
2230         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2231         if (enable)
2232                 ocp_data |= POWER_CUT;
2233         else
2234                 ocp_data &= ~POWER_CUT;
2235         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2236
2237         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2238         ocp_data &= ~RESUME_INDICATE;
2239         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2240 }
2241
2242 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2243 {
2244         u32 ocp_data;
2245
2246         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2247         if (enable)
2248                 ocp_data |= CPCR_RX_VLAN;
2249         else
2250                 ocp_data &= ~CPCR_RX_VLAN;
2251         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2252 }
2253
2254 static int rtl8152_set_features(struct net_device *dev,
2255                                 netdev_features_t features)
2256 {
2257         netdev_features_t changed = features ^ dev->features;
2258         struct r8152 *tp = netdev_priv(dev);
2259         int ret;
2260
2261         ret = usb_autopm_get_interface(tp->intf);
2262         if (ret < 0)
2263                 goto out;
2264
2265         mutex_lock(&tp->control);
2266
2267         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2268                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2269                         rtl_rx_vlan_en(tp, true);
2270                 else
2271                         rtl_rx_vlan_en(tp, false);
2272         }
2273
2274         mutex_unlock(&tp->control);
2275
2276         usb_autopm_put_interface(tp->intf);
2277
2278 out:
2279         return ret;
2280 }
2281
2282 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2283
2284 static u32 __rtl_get_wol(struct r8152 *tp)
2285 {
2286         u32 ocp_data;
2287         u32 wolopts = 0;
2288
2289         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2290         if (!(ocp_data & LAN_WAKE_EN))
2291                 return 0;
2292
2293         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2294         if (ocp_data & LINK_ON_WAKE_EN)
2295                 wolopts |= WAKE_PHY;
2296
2297         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2298         if (ocp_data & UWF_EN)
2299                 wolopts |= WAKE_UCAST;
2300         if (ocp_data & BWF_EN)
2301                 wolopts |= WAKE_BCAST;
2302         if (ocp_data & MWF_EN)
2303                 wolopts |= WAKE_MCAST;
2304
2305         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2306         if (ocp_data & MAGIC_EN)
2307                 wolopts |= WAKE_MAGIC;
2308
2309         return wolopts;
2310 }
2311
2312 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2313 {
2314         u32 ocp_data;
2315
2316         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2317
2318         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2319         ocp_data &= ~LINK_ON_WAKE_EN;
2320         if (wolopts & WAKE_PHY)
2321                 ocp_data |= LINK_ON_WAKE_EN;
2322         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2323
2324         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2325         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2326         if (wolopts & WAKE_UCAST)
2327                 ocp_data |= UWF_EN;
2328         if (wolopts & WAKE_BCAST)
2329                 ocp_data |= BWF_EN;
2330         if (wolopts & WAKE_MCAST)
2331                 ocp_data |= MWF_EN;
2332         if (wolopts & WAKE_ANY)
2333                 ocp_data |= LAN_WAKE_EN;
2334         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2335
2336         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2337
2338         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2339         ocp_data &= ~MAGIC_EN;
2340         if (wolopts & WAKE_MAGIC)
2341                 ocp_data |= MAGIC_EN;
2342         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2343
2344         if (wolopts & WAKE_ANY)
2345                 device_set_wakeup_enable(&tp->udev->dev, true);
2346         else
2347                 device_set_wakeup_enable(&tp->udev->dev, false);
2348 }
2349
2350 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2351 {
2352         u8 u1u2[8];
2353
2354         if (enable)
2355                 memset(u1u2, 0xff, sizeof(u1u2));
2356         else
2357                 memset(u1u2, 0x00, sizeof(u1u2));
2358
2359         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2360 }
2361
2362 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2363 {
2364         u32 ocp_data;
2365
2366         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2367         if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2368                 ocp_data |= U2P3_ENABLE;
2369         else
2370                 ocp_data &= ~U2P3_ENABLE;
2371         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2372 }
2373
2374 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2375 {
2376         u32 ocp_data;
2377
2378         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2379         if (enable)
2380                 ocp_data |= PWR_EN | PHASE2_EN;
2381         else
2382                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2383         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2384
2385         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2386         ocp_data &= ~PCUT_STATUS;
2387         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2388 }
2389
2390 static bool rtl_can_wakeup(struct r8152 *tp)
2391 {
2392         struct usb_device *udev = tp->udev;
2393
2394         return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2395 }
2396
2397 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2398 {
2399         if (enable) {
2400                 u32 ocp_data;
2401
2402                 r8153_u1u2en(tp, false);
2403                 r8153_u2p3en(tp, false);
2404
2405                 __rtl_set_wol(tp, WAKE_ANY);
2406
2407                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2408
2409                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2410                 ocp_data |= LINK_OFF_WAKE_EN;
2411                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2412
2413                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2414         } else {
2415                 __rtl_set_wol(tp, tp->saved_wolopts);
2416                 r8153_u2p3en(tp, true);
2417                 r8153_u1u2en(tp, true);
2418         }
2419 }
2420
2421 static void rtl_phy_reset(struct r8152 *tp)
2422 {
2423         u16 data;
2424         int i;
2425
2426         data = r8152_mdio_read(tp, MII_BMCR);
2427
2428         /* don't reset again before the previous one complete */
2429         if (data & BMCR_RESET)
2430                 return;
2431
2432         data |= BMCR_RESET;
2433         r8152_mdio_write(tp, MII_BMCR, data);
2434
2435         for (i = 0; i < 50; i++) {
2436                 msleep(20);
2437                 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2438                         break;
2439         }
2440 }
2441
2442 static void r8153_teredo_off(struct r8152 *tp)
2443 {
2444         u32 ocp_data;
2445
2446         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2447         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2448         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2449
2450         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2451         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2452         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2453 }
2454
2455 static void r8152b_disable_aldps(struct r8152 *tp)
2456 {
2457         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2458         msleep(20);
2459 }
2460
2461 static inline void r8152b_enable_aldps(struct r8152 *tp)
2462 {
2463         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2464                                             LINKENA | DIS_SDSAVE);
2465 }
2466
2467 static void rtl8152_disable(struct r8152 *tp)
2468 {
2469         r8152b_disable_aldps(tp);
2470         rtl_disable(tp);
2471         r8152b_enable_aldps(tp);
2472 }
2473
2474 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2475 {
2476         u16 data;
2477
2478         data = r8152_mdio_read(tp, MII_BMCR);
2479         if (data & BMCR_PDOWN) {
2480                 data &= ~BMCR_PDOWN;
2481                 r8152_mdio_write(tp, MII_BMCR, data);
2482         }
2483
2484         set_bit(PHY_RESET, &tp->flags);
2485 }
2486
2487 static void r8152b_exit_oob(struct r8152 *tp)
2488 {
2489         u32 ocp_data;
2490         int i;
2491
2492         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2493         ocp_data &= ~RCR_ACPT_ALL;
2494         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2495
2496         rxdy_gated_en(tp, true);
2497         r8153_teredo_off(tp);
2498         r8152b_hw_phy_cfg(tp);
2499
2500         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2501         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2502
2503         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2504         ocp_data &= ~NOW_IS_OOB;
2505         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2506
2507         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2508         ocp_data &= ~MCU_BORW_EN;
2509         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2510
2511         for (i = 0; i < 1000; i++) {
2512                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2513                 if (ocp_data & LINK_LIST_READY)
2514                         break;
2515                 usleep_range(1000, 2000);
2516         }
2517
2518         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2519         ocp_data |= RE_INIT_LL;
2520         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2521
2522         for (i = 0; i < 1000; i++) {
2523                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2524                 if (ocp_data & LINK_LIST_READY)
2525                         break;
2526                 usleep_range(1000, 2000);
2527         }
2528
2529         rtl8152_nic_reset(tp);
2530
2531         /* rx share fifo credit full threshold */
2532         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2533
2534         if (tp->udev->speed == USB_SPEED_FULL ||
2535             tp->udev->speed == USB_SPEED_LOW) {
2536                 /* rx share fifo credit near full threshold */
2537                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2538                                 RXFIFO_THR2_FULL);
2539                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2540                                 RXFIFO_THR3_FULL);
2541         } else {
2542                 /* rx share fifo credit near full threshold */
2543                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2544                                 RXFIFO_THR2_HIGH);
2545                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2546                                 RXFIFO_THR3_HIGH);
2547         }
2548
2549         /* TX share fifo free credit full threshold */
2550         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2551
2552         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2553         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2554         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2555                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2556
2557         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2558
2559         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2560
2561         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2562         ocp_data |= TCR0_AUTO_FIFO;
2563         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2564 }
2565
2566 static void r8152b_enter_oob(struct r8152 *tp)
2567 {
2568         u32 ocp_data;
2569         int i;
2570
2571         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2572         ocp_data &= ~NOW_IS_OOB;
2573         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2574
2575         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2576         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2577         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2578
2579         rtl_disable(tp);
2580
2581         for (i = 0; i < 1000; i++) {
2582                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2583                 if (ocp_data & LINK_LIST_READY)
2584                         break;
2585                 usleep_range(1000, 2000);
2586         }
2587
2588         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2589         ocp_data |= RE_INIT_LL;
2590         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2591
2592         for (i = 0; i < 1000; i++) {
2593                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2594                 if (ocp_data & LINK_LIST_READY)
2595                         break;
2596                 usleep_range(1000, 2000);
2597         }
2598
2599         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2600
2601         rtl_rx_vlan_en(tp, true);
2602
2603         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2604         ocp_data |= ALDPS_PROXY_MODE;
2605         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2606
2607         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2608         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2609         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2610
2611         rxdy_gated_en(tp, false);
2612
2613         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2614         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2615         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2616 }
2617
2618 static void r8153_hw_phy_cfg(struct r8152 *tp)
2619 {
2620         u32 ocp_data;
2621         u16 data;
2622
2623         if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
2624             tp->version == RTL_VER_05)
2625                 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2626
2627         data = r8152_mdio_read(tp, MII_BMCR);
2628         if (data & BMCR_PDOWN) {
2629                 data &= ~BMCR_PDOWN;
2630                 r8152_mdio_write(tp, MII_BMCR, data);
2631         }
2632
2633         if (tp->version == RTL_VER_03) {
2634                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2635                 data &= ~CTAP_SHORT_EN;
2636                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2637         }
2638
2639         data = ocp_reg_read(tp, OCP_POWER_CFG);
2640         data |= EEE_CLKDIV_EN;
2641         ocp_reg_write(tp, OCP_POWER_CFG, data);
2642
2643         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2644         data |= EN_10M_BGOFF;
2645         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2646         data = ocp_reg_read(tp, OCP_POWER_CFG);
2647         data |= EN_10M_PLLOFF;
2648         ocp_reg_write(tp, OCP_POWER_CFG, data);
2649         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2650
2651         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2652         ocp_data |= PFM_PWM_SWITCH;
2653         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2654
2655         /* Enable LPF corner auto tune */
2656         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2657
2658         /* Adjust 10M Amplitude */
2659         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2660         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2661
2662         set_bit(PHY_RESET, &tp->flags);
2663 }
2664
2665 static void r8153_first_init(struct r8152 *tp)
2666 {
2667         u32 ocp_data;
2668         int i;
2669
2670         rxdy_gated_en(tp, true);
2671         r8153_teredo_off(tp);
2672
2673         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2674         ocp_data &= ~RCR_ACPT_ALL;
2675         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2676
2677         r8153_hw_phy_cfg(tp);
2678
2679         rtl8152_nic_reset(tp);
2680
2681         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2682         ocp_data &= ~NOW_IS_OOB;
2683         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2684
2685         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2686         ocp_data &= ~MCU_BORW_EN;
2687         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2688
2689         for (i = 0; i < 1000; i++) {
2690                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2691                 if (ocp_data & LINK_LIST_READY)
2692                         break;
2693                 usleep_range(1000, 2000);
2694         }
2695
2696         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2697         ocp_data |= RE_INIT_LL;
2698         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2699
2700         for (i = 0; i < 1000; i++) {
2701                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2702                 if (ocp_data & LINK_LIST_READY)
2703                         break;
2704                 usleep_range(1000, 2000);
2705         }
2706
2707         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2708
2709         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2710         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2711
2712         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2713         ocp_data |= TCR0_AUTO_FIFO;
2714         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2715
2716         rtl8152_nic_reset(tp);
2717
2718         /* rx share fifo credit full threshold */
2719         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2720         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2721         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2722         /* TX share fifo free credit full threshold */
2723         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2724
2725         /* rx aggregation */
2726         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2727         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2728         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2729 }
2730
2731 static void r8153_enter_oob(struct r8152 *tp)
2732 {
2733         u32 ocp_data;
2734         int i;
2735
2736         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2737         ocp_data &= ~NOW_IS_OOB;
2738         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2739
2740         rtl_disable(tp);
2741
2742         for (i = 0; i < 1000; i++) {
2743                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2744                 if (ocp_data & LINK_LIST_READY)
2745                         break;
2746                 usleep_range(1000, 2000);
2747         }
2748
2749         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2750         ocp_data |= RE_INIT_LL;
2751         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2752
2753         for (i = 0; i < 1000; i++) {
2754                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2755                 if (ocp_data & LINK_LIST_READY)
2756                         break;
2757                 usleep_range(1000, 2000);
2758         }
2759
2760         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2761
2762         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2763         ocp_data &= ~TEREDO_WAKE_MASK;
2764         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2765
2766         rtl_rx_vlan_en(tp, true);
2767
2768         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2769         ocp_data |= ALDPS_PROXY_MODE;
2770         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2771
2772         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2773         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2774         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2775
2776         rxdy_gated_en(tp, false);
2777
2778         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2779         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2780         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2781 }
2782
2783 static void r8153_disable_aldps(struct r8152 *tp)
2784 {
2785         u16 data;
2786
2787         data = ocp_reg_read(tp, OCP_POWER_CFG);
2788         data &= ~EN_ALDPS;
2789         ocp_reg_write(tp, OCP_POWER_CFG, data);
2790         msleep(20);
2791 }
2792
2793 static void r8153_enable_aldps(struct r8152 *tp)
2794 {
2795         u16 data;
2796
2797         data = ocp_reg_read(tp, OCP_POWER_CFG);
2798         data |= EN_ALDPS;
2799         ocp_reg_write(tp, OCP_POWER_CFG, data);
2800 }
2801
2802 static void rtl8153_disable(struct r8152 *tp)
2803 {
2804         r8153_disable_aldps(tp);
2805         rtl_disable(tp);
2806         r8153_enable_aldps(tp);
2807         usb_enable_lpm(tp->udev);
2808 }
2809
2810 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2811 {
2812         u16 bmcr, anar, gbcr;
2813         int ret = 0;
2814
2815         cancel_delayed_work_sync(&tp->schedule);
2816         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2817         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2818                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2819         if (tp->mii.supports_gmii) {
2820                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2821                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2822         } else {
2823                 gbcr = 0;
2824         }
2825
2826         if (autoneg == AUTONEG_DISABLE) {
2827                 if (speed == SPEED_10) {
2828                         bmcr = 0;
2829                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2830                 } else if (speed == SPEED_100) {
2831                         bmcr = BMCR_SPEED100;
2832                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2833                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2834                         bmcr = BMCR_SPEED1000;
2835                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2836                 } else {
2837                         ret = -EINVAL;
2838                         goto out;
2839                 }
2840
2841                 if (duplex == DUPLEX_FULL)
2842                         bmcr |= BMCR_FULLDPLX;
2843         } else {
2844                 if (speed == SPEED_10) {
2845                         if (duplex == DUPLEX_FULL)
2846                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2847                         else
2848                                 anar |= ADVERTISE_10HALF;
2849                 } else if (speed == SPEED_100) {
2850                         if (duplex == DUPLEX_FULL) {
2851                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2852                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2853                         } else {
2854                                 anar |= ADVERTISE_10HALF;
2855                                 anar |= ADVERTISE_100HALF;
2856                         }
2857                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2858                         if (duplex == DUPLEX_FULL) {
2859                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2860                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2861                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2862                         } else {
2863                                 anar |= ADVERTISE_10HALF;
2864                                 anar |= ADVERTISE_100HALF;
2865                                 gbcr |= ADVERTISE_1000HALF;
2866                         }
2867                 } else {
2868                         ret = -EINVAL;
2869                         goto out;
2870                 }
2871
2872                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2873         }
2874
2875         if (test_bit(PHY_RESET, &tp->flags))
2876                 bmcr |= BMCR_RESET;
2877
2878         if (tp->mii.supports_gmii)
2879                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2880
2881         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2882         r8152_mdio_write(tp, MII_BMCR, bmcr);
2883
2884         if (test_and_clear_bit(PHY_RESET, &tp->flags)) {
2885                 int i;
2886
2887                 for (i = 0; i < 50; i++) {
2888                         msleep(20);
2889                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2890                                 break;
2891                 }
2892         }
2893
2894 out:
2895         return ret;
2896 }
2897
2898 static void rtl8152_up(struct r8152 *tp)
2899 {
2900         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2901                 return;
2902
2903         r8152b_disable_aldps(tp);
2904         r8152b_exit_oob(tp);
2905         r8152b_enable_aldps(tp);
2906 }
2907
2908 static void rtl8152_down(struct r8152 *tp)
2909 {
2910         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2911                 rtl_drop_queued_tx(tp);
2912                 return;
2913         }
2914
2915         r8152_power_cut_en(tp, false);
2916         r8152b_disable_aldps(tp);
2917         r8152b_enter_oob(tp);
2918         r8152b_enable_aldps(tp);
2919 }
2920
2921 static void rtl8153_up(struct r8152 *tp)
2922 {
2923         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2924                 return;
2925
2926         r8153_u1u2en(tp, false);
2927         r8153_disable_aldps(tp);
2928         r8153_first_init(tp);
2929         r8153_enable_aldps(tp);
2930         r8153_u2p3en(tp, true);
2931         r8153_u1u2en(tp, true);
2932         usb_enable_lpm(tp->udev);
2933 }
2934
2935 static void rtl8153_down(struct r8152 *tp)
2936 {
2937         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2938                 rtl_drop_queued_tx(tp);
2939                 return;
2940         }
2941
2942         r8153_u1u2en(tp, false);
2943         r8153_u2p3en(tp, false);
2944         r8153_power_cut_en(tp, false);
2945         r8153_disable_aldps(tp);
2946         r8153_enter_oob(tp);
2947         r8153_enable_aldps(tp);
2948 }
2949
2950 static bool rtl8152_in_nway(struct r8152 *tp)
2951 {
2952         u16 nway_state;
2953
2954         ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
2955         tp->ocp_base = 0x2000;
2956         ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c);         /* phy state */
2957         nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
2958
2959         /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
2960         if (nway_state & 0xc000)
2961                 return false;
2962         else
2963                 return true;
2964 }
2965
2966 static bool rtl8153_in_nway(struct r8152 *tp)
2967 {
2968         u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
2969
2970         if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
2971                 return false;
2972         else
2973                 return true;
2974 }
2975
2976 static void set_carrier(struct r8152 *tp)
2977 {
2978         struct net_device *netdev = tp->netdev;
2979         u8 speed;
2980
2981         speed = rtl8152_get_speed(tp);
2982
2983         if (speed & LINK_STATUS) {
2984                 if (!netif_carrier_ok(netdev)) {
2985                         tp->rtl_ops.enable(tp);
2986                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2987                         napi_disable(&tp->napi);
2988                         netif_carrier_on(netdev);
2989                         rtl_start_rx(tp);
2990                         napi_enable(&tp->napi);
2991                 }
2992         } else {
2993                 if (netif_carrier_ok(netdev)) {
2994                         netif_carrier_off(netdev);
2995                         napi_disable(&tp->napi);
2996                         tp->rtl_ops.disable(tp);
2997                         napi_enable(&tp->napi);
2998                 }
2999         }
3000 }
3001
3002 static void rtl_work_func_t(struct work_struct *work)
3003 {
3004         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3005
3006         /* If the device is unplugged or !netif_running(), the workqueue
3007          * doesn't need to wake the device, and could return directly.
3008          */
3009         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3010                 return;
3011
3012         if (usb_autopm_get_interface(tp->intf) < 0)
3013                 return;
3014
3015         if (!test_bit(WORK_ENABLE, &tp->flags))
3016                 goto out1;
3017
3018         if (!mutex_trylock(&tp->control)) {
3019                 schedule_delayed_work(&tp->schedule, 0);
3020                 goto out1;
3021         }
3022
3023         if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3024                 set_carrier(tp);
3025
3026         if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3027                 _rtl8152_set_rx_mode(tp->netdev);
3028
3029         /* don't schedule napi before linking */
3030         if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3031             netif_carrier_ok(tp->netdev))
3032                 napi_schedule(&tp->napi);
3033
3034         if (test_and_clear_bit(PHY_RESET, &tp->flags))
3035                 rtl_phy_reset(tp);
3036
3037         mutex_unlock(&tp->control);
3038
3039 out1:
3040         usb_autopm_put_interface(tp->intf);
3041 }
3042
3043 static int rtl8152_open(struct net_device *netdev)
3044 {
3045         struct r8152 *tp = netdev_priv(netdev);
3046         int res = 0;
3047
3048         res = alloc_all_mem(tp);
3049         if (res)
3050                 goto out;
3051
3052         netif_carrier_off(netdev);
3053
3054         res = usb_autopm_get_interface(tp->intf);
3055         if (res < 0) {
3056                 free_all_mem(tp);
3057                 goto out;
3058         }
3059
3060         mutex_lock(&tp->control);
3061
3062         tp->rtl_ops.up(tp);
3063
3064         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3065                           tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3066                           DUPLEX_FULL);
3067         netif_carrier_off(netdev);
3068         netif_start_queue(netdev);
3069         set_bit(WORK_ENABLE, &tp->flags);
3070
3071         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3072         if (res) {
3073                 if (res == -ENODEV)
3074                         netif_device_detach(tp->netdev);
3075                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3076                            res);
3077                 free_all_mem(tp);
3078         } else {
3079                 napi_enable(&tp->napi);
3080         }
3081
3082         mutex_unlock(&tp->control);
3083
3084         usb_autopm_put_interface(tp->intf);
3085
3086 out:
3087         return res;
3088 }
3089
3090 static int rtl8152_close(struct net_device *netdev)
3091 {
3092         struct r8152 *tp = netdev_priv(netdev);
3093         int res = 0;
3094
3095         napi_disable(&tp->napi);
3096         clear_bit(WORK_ENABLE, &tp->flags);
3097         usb_kill_urb(tp->intr_urb);
3098         cancel_delayed_work_sync(&tp->schedule);
3099         netif_stop_queue(netdev);
3100
3101         res = usb_autopm_get_interface(tp->intf);
3102         if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3103                 rtl_drop_queued_tx(tp);
3104                 rtl_stop_rx(tp);
3105         } else {
3106                 mutex_lock(&tp->control);
3107
3108                 tp->rtl_ops.down(tp);
3109
3110                 mutex_unlock(&tp->control);
3111
3112                 usb_autopm_put_interface(tp->intf);
3113         }
3114
3115         free_all_mem(tp);
3116
3117         return res;
3118 }
3119
3120 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3121 {
3122         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3123         ocp_reg_write(tp, OCP_EEE_DATA, reg);
3124         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3125 }
3126
3127 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3128 {
3129         u16 data;
3130
3131         r8152_mmd_indirect(tp, dev, reg);
3132         data = ocp_reg_read(tp, OCP_EEE_DATA);
3133         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3134
3135         return data;
3136 }
3137
3138 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3139 {
3140         r8152_mmd_indirect(tp, dev, reg);
3141         ocp_reg_write(tp, OCP_EEE_DATA, data);
3142         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3143 }
3144
3145 static void r8152_eee_en(struct r8152 *tp, bool enable)
3146 {
3147         u16 config1, config2, config3;
3148         u32 ocp_data;
3149
3150         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3151         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3152         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3153         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3154
3155         if (enable) {
3156                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3157                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3158                 config1 |= sd_rise_time(1);
3159                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3160                 config3 |= fast_snr(42);
3161         } else {
3162                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3163                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3164                              RX_QUIET_EN);
3165                 config1 |= sd_rise_time(7);
3166                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3167                 config3 |= fast_snr(511);
3168         }
3169
3170         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3171         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3172         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3173         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3174 }
3175
3176 static void r8152b_enable_eee(struct r8152 *tp)
3177 {
3178         r8152_eee_en(tp, true);
3179         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3180 }
3181
3182 static void r8153_eee_en(struct r8152 *tp, bool enable)
3183 {
3184         u32 ocp_data;
3185         u16 config;
3186
3187         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3188         config = ocp_reg_read(tp, OCP_EEE_CFG);
3189
3190         if (enable) {
3191                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3192                 config |= EEE10_EN;
3193         } else {
3194                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3195                 config &= ~EEE10_EN;
3196         }
3197
3198         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3199         ocp_reg_write(tp, OCP_EEE_CFG, config);
3200 }
3201
3202 static void r8153_enable_eee(struct r8152 *tp)
3203 {
3204         r8153_eee_en(tp, true);
3205         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3206 }
3207
3208 static void r8152b_enable_fc(struct r8152 *tp)
3209 {
3210         u16 anar;
3211
3212         anar = r8152_mdio_read(tp, MII_ADVERTISE);
3213         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3214         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3215 }
3216
3217 static void rtl_tally_reset(struct r8152 *tp)
3218 {
3219         u32 ocp_data;
3220
3221         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3222         ocp_data |= TALLY_RESET;
3223         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3224 }
3225
3226 static void r8152b_init(struct r8152 *tp)
3227 {
3228         u32 ocp_data;
3229
3230         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3231                 return;
3232
3233         r8152b_disable_aldps(tp);
3234
3235         if (tp->version == RTL_VER_01) {
3236                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3237                 ocp_data &= ~LED_MODE_MASK;
3238                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3239         }
3240
3241         r8152_power_cut_en(tp, false);
3242
3243         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3244         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3245         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3246         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3247         ocp_data &= ~MCU_CLK_RATIO_MASK;
3248         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3249         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3250         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3251                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3252         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3253
3254         r8152b_enable_eee(tp);
3255         r8152b_enable_aldps(tp);
3256         r8152b_enable_fc(tp);
3257         rtl_tally_reset(tp);
3258
3259         /* enable rx aggregation */
3260         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3261         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3262         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3263 }
3264
3265 static void r8153_init(struct r8152 *tp)
3266 {
3267         u32 ocp_data;
3268         int i;
3269
3270         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3271                 return;
3272
3273         r8153_disable_aldps(tp);
3274         r8153_u1u2en(tp, false);
3275
3276         for (i = 0; i < 500; i++) {
3277                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3278                     AUTOLOAD_DONE)
3279                         break;
3280                 msleep(20);
3281         }
3282
3283         for (i = 0; i < 500; i++) {
3284                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3285                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3286                         break;
3287                 msleep(20);
3288         }
3289
3290         usb_disable_lpm(tp->udev);
3291         r8153_u2p3en(tp, false);
3292
3293         if (tp->version == RTL_VER_04) {
3294                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3295                 ocp_data &= ~pwd_dn_scale_mask;
3296                 ocp_data |= pwd_dn_scale(96);
3297                 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3298
3299                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3300                 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3301                 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3302         } else if (tp->version == RTL_VER_05) {
3303                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3304                 ocp_data &= ~ECM_ALDPS;
3305                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3306
3307                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3308                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3309                         ocp_data &= ~DYNAMIC_BURST;
3310                 else
3311                         ocp_data |= DYNAMIC_BURST;
3312                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3313         } else if (tp->version == RTL_VER_06) {
3314                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3315                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3316                         ocp_data &= ~DYNAMIC_BURST;
3317                 else
3318                         ocp_data |= DYNAMIC_BURST;
3319                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3320         }
3321
3322         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3323         ocp_data |= EP4_FULL_FC;
3324         ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3325
3326         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3327         ocp_data &= ~TIMER11_EN;
3328         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3329
3330         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3331         ocp_data &= ~LED_MODE_MASK;
3332         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3333
3334         ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3335         if (tp->version == RTL_VER_04 && tp->udev->speed != USB_SPEED_SUPER)
3336                 ocp_data |= LPM_TIMER_500MS;
3337         else
3338                 ocp_data |= LPM_TIMER_500US;
3339         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3340
3341         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3342         ocp_data &= ~SEN_VAL_MASK;
3343         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3344         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3345
3346         ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3347
3348         r8153_power_cut_en(tp, false);
3349         r8153_u1u2en(tp, true);
3350
3351         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3352         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3353         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3354                        PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3355                        U1U2_SPDWN_EN | L1_SPDWN_EN);
3356         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3357                        PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3358                        TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3359                        EEE_SPDWN_EN);
3360
3361         r8153_enable_eee(tp);
3362         r8153_enable_aldps(tp);
3363         r8152b_enable_fc(tp);
3364         rtl_tally_reset(tp);
3365         r8153_u2p3en(tp, true);
3366 }
3367
3368 static int rtl8152_pre_reset(struct usb_interface *intf)
3369 {
3370         struct r8152 *tp = usb_get_intfdata(intf);
3371         struct net_device *netdev;
3372
3373         if (!tp)
3374                 return 0;
3375
3376         netdev = tp->netdev;
3377         if (!netif_running(netdev))
3378                 return 0;
3379
3380         napi_disable(&tp->napi);
3381         clear_bit(WORK_ENABLE, &tp->flags);
3382         usb_kill_urb(tp->intr_urb);
3383         cancel_delayed_work_sync(&tp->schedule);
3384         if (netif_carrier_ok(netdev)) {
3385                 netif_stop_queue(netdev);
3386                 mutex_lock(&tp->control);
3387                 tp->rtl_ops.disable(tp);
3388                 mutex_unlock(&tp->control);
3389         }
3390
3391         return 0;
3392 }
3393
3394 static int rtl8152_post_reset(struct usb_interface *intf)
3395 {
3396         struct r8152 *tp = usb_get_intfdata(intf);
3397         struct net_device *netdev;
3398
3399         if (!tp)
3400                 return 0;
3401
3402         netdev = tp->netdev;
3403         if (!netif_running(netdev))
3404                 return 0;
3405
3406         set_bit(WORK_ENABLE, &tp->flags);
3407         if (netif_carrier_ok(netdev)) {
3408                 mutex_lock(&tp->control);
3409                 tp->rtl_ops.enable(tp);
3410                 rtl8152_set_rx_mode(netdev);
3411                 mutex_unlock(&tp->control);
3412                 netif_wake_queue(netdev);
3413         }
3414
3415         napi_enable(&tp->napi);
3416
3417         return 0;
3418 }
3419
3420 static bool delay_autosuspend(struct r8152 *tp)
3421 {
3422         bool sw_linking = !!netif_carrier_ok(tp->netdev);
3423         bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3424
3425         /* This means a linking change occurs and the driver doesn't detect it,
3426          * yet. If the driver has disabled tx/rx and hw is linking on, the
3427          * device wouldn't wake up by receiving any packet.
3428          */
3429         if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3430                 return true;
3431
3432         /* If the linking down is occurred by nway, the device may miss the
3433          * linking change event. And it wouldn't wake when linking on.
3434          */
3435         if (!sw_linking && tp->rtl_ops.in_nway(tp))
3436                 return true;
3437         else
3438                 return false;
3439 }
3440
3441 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3442 {
3443         struct r8152 *tp = usb_get_intfdata(intf);
3444         struct net_device *netdev = tp->netdev;
3445         int ret = 0;
3446
3447         mutex_lock(&tp->control);
3448
3449         if (PMSG_IS_AUTO(message)) {
3450                 if (netif_running(netdev) && delay_autosuspend(tp)) {
3451                         ret = -EBUSY;
3452                         goto out1;
3453                 }
3454
3455                 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3456         } else {
3457                 netif_device_detach(netdev);
3458         }
3459
3460         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3461                 clear_bit(WORK_ENABLE, &tp->flags);
3462                 usb_kill_urb(tp->intr_urb);
3463                 napi_disable(&tp->napi);
3464                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3465                         rtl_stop_rx(tp);
3466                         rtl_runtime_suspend_enable(tp, true);
3467                 } else {
3468                         cancel_delayed_work_sync(&tp->schedule);
3469                         tp->rtl_ops.down(tp);
3470                 }
3471                 napi_enable(&tp->napi);
3472         }
3473 out1:
3474         mutex_unlock(&tp->control);
3475
3476         return ret;
3477 }
3478
3479 static int rtl8152_resume(struct usb_interface *intf)
3480 {
3481         struct r8152 *tp = usb_get_intfdata(intf);
3482
3483         mutex_lock(&tp->control);
3484
3485         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3486                 tp->rtl_ops.init(tp);
3487                 netif_device_attach(tp->netdev);
3488         }
3489
3490         if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3491                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3492                         rtl_runtime_suspend_enable(tp, false);
3493                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3494                         napi_disable(&tp->napi);
3495                         set_bit(WORK_ENABLE, &tp->flags);
3496                         if (netif_carrier_ok(tp->netdev))
3497                                 rtl_start_rx(tp);
3498                         napi_enable(&tp->napi);
3499                 } else {
3500                         tp->rtl_ops.up(tp);
3501                         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3502                                           tp->mii.supports_gmii ?
3503                                           SPEED_1000 : SPEED_100,
3504                                           DUPLEX_FULL);
3505                         netif_carrier_off(tp->netdev);
3506                         set_bit(WORK_ENABLE, &tp->flags);
3507                 }
3508                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3509         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3510                 if (tp->netdev->flags & IFF_UP)
3511                         rtl_runtime_suspend_enable(tp, false);
3512                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3513         }
3514
3515         mutex_unlock(&tp->control);
3516
3517         return 0;
3518 }
3519
3520 static int rtl8152_reset_resume(struct usb_interface *intf)
3521 {
3522         struct r8152 *tp = usb_get_intfdata(intf);
3523
3524         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3525         return rtl8152_resume(intf);
3526 }
3527
3528 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3529 {
3530         struct r8152 *tp = netdev_priv(dev);
3531
3532         if (usb_autopm_get_interface(tp->intf) < 0)
3533                 return;
3534
3535         if (!rtl_can_wakeup(tp)) {
3536                 wol->supported = 0;
3537                 wol->wolopts = 0;
3538         } else {
3539                 mutex_lock(&tp->control);
3540                 wol->supported = WAKE_ANY;
3541                 wol->wolopts = __rtl_get_wol(tp);
3542                 mutex_unlock(&tp->control);
3543         }
3544
3545         usb_autopm_put_interface(tp->intf);
3546 }
3547
3548 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3549 {
3550         struct r8152 *tp = netdev_priv(dev);
3551         int ret;
3552
3553         if (!rtl_can_wakeup(tp))
3554                 return -EOPNOTSUPP;
3555
3556         ret = usb_autopm_get_interface(tp->intf);
3557         if (ret < 0)
3558                 goto out_set_wol;
3559
3560         mutex_lock(&tp->control);
3561
3562         __rtl_set_wol(tp, wol->wolopts);
3563         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3564
3565         mutex_unlock(&tp->control);
3566
3567         usb_autopm_put_interface(tp->intf);
3568
3569 out_set_wol:
3570         return ret;
3571 }
3572
3573 static u32 rtl8152_get_msglevel(struct net_device *dev)
3574 {
3575         struct r8152 *tp = netdev_priv(dev);
3576
3577         return tp->msg_enable;
3578 }
3579
3580 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3581 {
3582         struct r8152 *tp = netdev_priv(dev);
3583
3584         tp->msg_enable = value;
3585 }
3586
3587 static void rtl8152_get_drvinfo(struct net_device *netdev,
3588                                 struct ethtool_drvinfo *info)
3589 {
3590         struct r8152 *tp = netdev_priv(netdev);
3591
3592         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3593         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3594         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3595 }
3596
3597 static
3598 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3599 {
3600         struct r8152 *tp = netdev_priv(netdev);
3601         int ret;
3602
3603         if (!tp->mii.mdio_read)
3604                 return -EOPNOTSUPP;
3605
3606         ret = usb_autopm_get_interface(tp->intf);
3607         if (ret < 0)
3608                 goto out;
3609
3610         mutex_lock(&tp->control);
3611
3612         ret = mii_ethtool_gset(&tp->mii, cmd);
3613
3614         mutex_unlock(&tp->control);
3615
3616         usb_autopm_put_interface(tp->intf);
3617
3618 out:
3619         return ret;
3620 }
3621
3622 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3623 {
3624         struct r8152 *tp = netdev_priv(dev);
3625         int ret;
3626
3627         ret = usb_autopm_get_interface(tp->intf);
3628         if (ret < 0)
3629                 goto out;
3630
3631         mutex_lock(&tp->control);
3632
3633         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3634
3635         mutex_unlock(&tp->control);
3636
3637         usb_autopm_put_interface(tp->intf);
3638
3639 out:
3640         return ret;
3641 }
3642
3643 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3644         "tx_packets",
3645         "rx_packets",
3646         "tx_errors",
3647         "rx_errors",
3648         "rx_missed",
3649         "align_errors",
3650         "tx_single_collisions",
3651         "tx_multi_collisions",
3652         "rx_unicast",
3653         "rx_broadcast",
3654         "rx_multicast",
3655         "tx_aborted",
3656         "tx_underrun",
3657 };
3658
3659 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3660 {
3661         switch (sset) {
3662         case ETH_SS_STATS:
3663                 return ARRAY_SIZE(rtl8152_gstrings);
3664         default:
3665                 return -EOPNOTSUPP;
3666         }
3667 }
3668
3669 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3670                                       struct ethtool_stats *stats, u64 *data)
3671 {
3672         struct r8152 *tp = netdev_priv(dev);
3673         struct tally_counter tally;
3674
3675         if (usb_autopm_get_interface(tp->intf) < 0)
3676                 return;
3677
3678         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3679
3680         usb_autopm_put_interface(tp->intf);
3681
3682         data[0] = le64_to_cpu(tally.tx_packets);
3683         data[1] = le64_to_cpu(tally.rx_packets);
3684         data[2] = le64_to_cpu(tally.tx_errors);
3685         data[3] = le32_to_cpu(tally.rx_errors);
3686         data[4] = le16_to_cpu(tally.rx_missed);
3687         data[5] = le16_to_cpu(tally.align_errors);
3688         data[6] = le32_to_cpu(tally.tx_one_collision);
3689         data[7] = le32_to_cpu(tally.tx_multi_collision);
3690         data[8] = le64_to_cpu(tally.rx_unicast);
3691         data[9] = le64_to_cpu(tally.rx_broadcast);
3692         data[10] = le32_to_cpu(tally.rx_multicast);
3693         data[11] = le16_to_cpu(tally.tx_aborted);
3694         data[12] = le16_to_cpu(tally.tx_underrun);
3695 }
3696
3697 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3698 {
3699         switch (stringset) {
3700         case ETH_SS_STATS:
3701                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3702                 break;
3703         }
3704 }
3705
3706 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3707 {
3708         u32 ocp_data, lp, adv, supported = 0;
3709         u16 val;
3710
3711         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3712         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3713
3714         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3715         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3716
3717         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3718         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3719
3720         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3721         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3722
3723         eee->eee_enabled = !!ocp_data;
3724         eee->eee_active = !!(supported & adv & lp);
3725         eee->supported = supported;
3726         eee->advertised = adv;
3727         eee->lp_advertised = lp;
3728
3729         return 0;
3730 }
3731
3732 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3733 {
3734         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3735
3736         r8152_eee_en(tp, eee->eee_enabled);
3737
3738         if (!eee->eee_enabled)
3739                 val = 0;
3740
3741         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3742
3743         return 0;
3744 }
3745
3746 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3747 {
3748         u32 ocp_data, lp, adv, supported = 0;
3749         u16 val;
3750
3751         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3752         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3753
3754         val = ocp_reg_read(tp, OCP_EEE_ADV);
3755         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3756
3757         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3758         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3759
3760         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3761         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3762
3763         eee->eee_enabled = !!ocp_data;
3764         eee->eee_active = !!(supported & adv & lp);
3765         eee->supported = supported;
3766         eee->advertised = adv;
3767         eee->lp_advertised = lp;
3768
3769         return 0;
3770 }
3771
3772 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3773 {
3774         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3775
3776         r8153_eee_en(tp, eee->eee_enabled);
3777
3778         if (!eee->eee_enabled)
3779                 val = 0;
3780
3781         ocp_reg_write(tp, OCP_EEE_ADV, val);
3782
3783         return 0;
3784 }
3785
3786 static int
3787 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3788 {
3789         struct r8152 *tp = netdev_priv(net);
3790         int ret;
3791
3792         ret = usb_autopm_get_interface(tp->intf);
3793         if (ret < 0)
3794                 goto out;
3795
3796         mutex_lock(&tp->control);
3797
3798         ret = tp->rtl_ops.eee_get(tp, edata);
3799
3800         mutex_unlock(&tp->control);
3801
3802         usb_autopm_put_interface(tp->intf);
3803
3804 out:
3805         return ret;
3806 }
3807
3808 static int
3809 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3810 {
3811         struct r8152 *tp = netdev_priv(net);
3812         int ret;
3813
3814         ret = usb_autopm_get_interface(tp->intf);
3815         if (ret < 0)
3816                 goto out;
3817
3818         mutex_lock(&tp->control);
3819
3820         ret = tp->rtl_ops.eee_set(tp, edata);
3821         if (!ret)
3822                 ret = mii_nway_restart(&tp->mii);
3823
3824         mutex_unlock(&tp->control);
3825
3826         usb_autopm_put_interface(tp->intf);
3827
3828 out:
3829         return ret;
3830 }
3831
3832 static int rtl8152_nway_reset(struct net_device *dev)
3833 {
3834         struct r8152 *tp = netdev_priv(dev);
3835         int ret;
3836
3837         ret = usb_autopm_get_interface(tp->intf);
3838         if (ret < 0)
3839                 goto out;
3840
3841         mutex_lock(&tp->control);
3842
3843         ret = mii_nway_restart(&tp->mii);
3844
3845         mutex_unlock(&tp->control);
3846
3847         usb_autopm_put_interface(tp->intf);
3848
3849 out:
3850         return ret;
3851 }
3852
3853 static int rtl8152_get_coalesce(struct net_device *netdev,
3854                                 struct ethtool_coalesce *coalesce)
3855 {
3856         struct r8152 *tp = netdev_priv(netdev);
3857
3858         switch (tp->version) {
3859         case RTL_VER_01:
3860         case RTL_VER_02:
3861                 return -EOPNOTSUPP;
3862         default:
3863                 break;
3864         }
3865
3866         coalesce->rx_coalesce_usecs = tp->coalesce;
3867
3868         return 0;
3869 }
3870
3871 static int rtl8152_set_coalesce(struct net_device *netdev,
3872                                 struct ethtool_coalesce *coalesce)
3873 {
3874         struct r8152 *tp = netdev_priv(netdev);
3875         int ret;
3876
3877         switch (tp->version) {
3878         case RTL_VER_01:
3879         case RTL_VER_02:
3880                 return -EOPNOTSUPP;
3881         default:
3882                 break;
3883         }
3884
3885         if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
3886                 return -EINVAL;
3887
3888         ret = usb_autopm_get_interface(tp->intf);
3889         if (ret < 0)
3890                 return ret;
3891
3892         mutex_lock(&tp->control);
3893
3894         if (tp->coalesce != coalesce->rx_coalesce_usecs) {
3895                 tp->coalesce = coalesce->rx_coalesce_usecs;
3896
3897                 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
3898                         r8153_set_rx_early_timeout(tp);
3899         }
3900
3901         mutex_unlock(&tp->control);
3902
3903         usb_autopm_put_interface(tp->intf);
3904
3905         return ret;
3906 }
3907
3908 static struct ethtool_ops ops = {
3909         .get_drvinfo = rtl8152_get_drvinfo,
3910         .get_settings = rtl8152_get_settings,
3911         .set_settings = rtl8152_set_settings,
3912         .get_link = ethtool_op_get_link,
3913         .nway_reset = rtl8152_nway_reset,
3914         .get_msglevel = rtl8152_get_msglevel,
3915         .set_msglevel = rtl8152_set_msglevel,
3916         .get_wol = rtl8152_get_wol,
3917         .set_wol = rtl8152_set_wol,
3918         .get_strings = rtl8152_get_strings,
3919         .get_sset_count = rtl8152_get_sset_count,
3920         .get_ethtool_stats = rtl8152_get_ethtool_stats,
3921         .get_coalesce = rtl8152_get_coalesce,
3922         .set_coalesce = rtl8152_set_coalesce,
3923         .get_eee = rtl_ethtool_get_eee,
3924         .set_eee = rtl_ethtool_set_eee,
3925 };
3926
3927 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3928 {
3929         struct r8152 *tp = netdev_priv(netdev);
3930         struct mii_ioctl_data *data = if_mii(rq);
3931         int res;
3932
3933         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3934                 return -ENODEV;
3935
3936         res = usb_autopm_get_interface(tp->intf);
3937         if (res < 0)
3938                 goto out;
3939
3940         switch (cmd) {
3941         case SIOCGMIIPHY:
3942                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3943                 break;
3944
3945         case SIOCGMIIREG:
3946                 mutex_lock(&tp->control);
3947                 data->val_out = r8152_mdio_read(tp, data->reg_num);
3948                 mutex_unlock(&tp->control);
3949                 break;
3950
3951         case SIOCSMIIREG:
3952                 if (!capable(CAP_NET_ADMIN)) {
3953                         res = -EPERM;
3954                         break;
3955                 }
3956                 mutex_lock(&tp->control);
3957                 r8152_mdio_write(tp, data->reg_num, data->val_in);
3958                 mutex_unlock(&tp->control);
3959                 break;
3960
3961         default:
3962                 res = -EOPNOTSUPP;
3963         }
3964
3965         usb_autopm_put_interface(tp->intf);
3966
3967 out:
3968         return res;
3969 }
3970
3971 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3972 {
3973         struct r8152 *tp = netdev_priv(dev);
3974         int ret;
3975
3976         switch (tp->version) {
3977         case RTL_VER_01:
3978         case RTL_VER_02:
3979                 return eth_change_mtu(dev, new_mtu);
3980         default:
3981                 break;
3982         }
3983
3984         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3985                 return -EINVAL;
3986
3987         ret = usb_autopm_get_interface(tp->intf);
3988         if (ret < 0)
3989                 return ret;
3990
3991         mutex_lock(&tp->control);
3992
3993         dev->mtu = new_mtu;
3994
3995         if (netif_running(dev) && netif_carrier_ok(dev))
3996                 r8153_set_rx_early_size(tp);
3997
3998         mutex_unlock(&tp->control);
3999
4000         usb_autopm_put_interface(tp->intf);
4001
4002         return ret;
4003 }
4004
4005 static const struct net_device_ops rtl8152_netdev_ops = {
4006         .ndo_open               = rtl8152_open,
4007         .ndo_stop               = rtl8152_close,
4008         .ndo_do_ioctl           = rtl8152_ioctl,
4009         .ndo_start_xmit         = rtl8152_start_xmit,
4010         .ndo_tx_timeout         = rtl8152_tx_timeout,
4011         .ndo_set_features       = rtl8152_set_features,
4012         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
4013         .ndo_set_mac_address    = rtl8152_set_mac_address,
4014         .ndo_change_mtu         = rtl8152_change_mtu,
4015         .ndo_validate_addr      = eth_validate_addr,
4016         .ndo_features_check     = rtl8152_features_check,
4017 };
4018
4019 static void r8152b_get_version(struct r8152 *tp)
4020 {
4021         u32     ocp_data;
4022         u16     version;
4023
4024         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4025         version = (u16)(ocp_data & VERSION_MASK);
4026
4027         switch (version) {
4028         case 0x4c00:
4029                 tp->version = RTL_VER_01;
4030                 break;
4031         case 0x4c10:
4032                 tp->version = RTL_VER_02;
4033                 break;
4034         case 0x5c00:
4035                 tp->version = RTL_VER_03;
4036                 tp->mii.supports_gmii = 1;
4037                 break;
4038         case 0x5c10:
4039                 tp->version = RTL_VER_04;
4040                 tp->mii.supports_gmii = 1;
4041                 break;
4042         case 0x5c20:
4043                 tp->version = RTL_VER_05;
4044                 tp->mii.supports_gmii = 1;
4045                 break;
4046         case 0x5c30:
4047                 tp->version = RTL_VER_06;
4048                 tp->mii.supports_gmii = 1;
4049                 break;
4050         default:
4051                 netif_info(tp, probe, tp->netdev,
4052                            "Unknown version 0x%04x\n", version);
4053                 break;
4054         }
4055 }
4056
4057 static void rtl8152_unload(struct r8152 *tp)
4058 {
4059         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4060                 return;
4061
4062         if (tp->version != RTL_VER_01)
4063                 r8152_power_cut_en(tp, true);
4064 }
4065
4066 static void rtl8153_unload(struct r8152 *tp)
4067 {
4068         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4069                 return;
4070
4071         r8153_power_cut_en(tp, false);
4072 }
4073
4074 static int rtl_ops_init(struct r8152 *tp)
4075 {
4076         struct rtl_ops *ops = &tp->rtl_ops;
4077         int ret = 0;
4078
4079         switch (tp->version) {
4080         case RTL_VER_01:
4081         case RTL_VER_02:
4082                 ops->init               = r8152b_init;
4083                 ops->enable             = rtl8152_enable;
4084                 ops->disable            = rtl8152_disable;
4085                 ops->up                 = rtl8152_up;
4086                 ops->down               = rtl8152_down;
4087                 ops->unload             = rtl8152_unload;
4088                 ops->eee_get            = r8152_get_eee;
4089                 ops->eee_set            = r8152_set_eee;
4090                 ops->in_nway            = rtl8152_in_nway;
4091                 break;
4092
4093         case RTL_VER_03:
4094         case RTL_VER_04:
4095         case RTL_VER_05:
4096         case RTL_VER_06:
4097                 ops->init               = r8153_init;
4098                 ops->enable             = rtl8153_enable;
4099                 ops->disable            = rtl8153_disable;
4100                 ops->up                 = rtl8153_up;
4101                 ops->down               = rtl8153_down;
4102                 ops->unload             = rtl8153_unload;
4103                 ops->eee_get            = r8153_get_eee;
4104                 ops->eee_set            = r8153_set_eee;
4105                 ops->in_nway            = rtl8153_in_nway;
4106                 break;
4107
4108         default:
4109                 ret = -ENODEV;
4110                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4111                 break;
4112         }
4113
4114         return ret;
4115 }
4116
4117 static int rtl8152_probe(struct usb_interface *intf,
4118                          const struct usb_device_id *id)
4119 {
4120         struct usb_device *udev = interface_to_usbdev(intf);
4121         struct r8152 *tp;
4122         struct net_device *netdev;
4123         int ret;
4124
4125         if (udev->actconfig->desc.bConfigurationValue != 1) {
4126                 usb_driver_set_configuration(udev, 1);
4127                 return -ENODEV;
4128         }
4129
4130         usb_reset_device(udev);
4131         netdev = alloc_etherdev(sizeof(struct r8152));
4132         if (!netdev) {
4133                 dev_err(&intf->dev, "Out of memory\n");
4134                 return -ENOMEM;
4135         }
4136
4137         SET_NETDEV_DEV(netdev, &intf->dev);
4138         tp = netdev_priv(netdev);
4139         tp->msg_enable = 0x7FFF;
4140
4141         tp->udev = udev;
4142         tp->netdev = netdev;
4143         tp->intf = intf;
4144
4145         r8152b_get_version(tp);
4146         ret = rtl_ops_init(tp);
4147         if (ret)
4148                 goto out;
4149
4150         mutex_init(&tp->control);
4151         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4152
4153         netdev->netdev_ops = &rtl8152_netdev_ops;
4154         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4155
4156         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4157                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4158                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4159                             NETIF_F_HW_VLAN_CTAG_TX;
4160         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4161                               NETIF_F_TSO | NETIF_F_FRAGLIST |
4162                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4163                               NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4164         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4165                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4166                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4167
4168         netdev->ethtool_ops = &ops;
4169         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4170
4171         tp->mii.dev = netdev;
4172         tp->mii.mdio_read = read_mii_word;
4173         tp->mii.mdio_write = write_mii_word;
4174         tp->mii.phy_id_mask = 0x3f;
4175         tp->mii.reg_num_mask = 0x1f;
4176         tp->mii.phy_id = R8152_PHY_ID;
4177
4178         switch (udev->speed) {
4179         case USB_SPEED_SUPER:
4180                 tp->coalesce = COALESCE_SUPER;
4181                 break;
4182         case USB_SPEED_HIGH:
4183                 tp->coalesce = COALESCE_HIGH;
4184                 break;
4185         default:
4186                 tp->coalesce = COALESCE_SLOW;
4187                 break;
4188         }
4189
4190         intf->needs_remote_wakeup = 1;
4191
4192         tp->rtl_ops.init(tp);
4193         set_ethernet_addr(tp);
4194
4195         usb_set_intfdata(intf, tp);
4196         netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4197
4198         ret = register_netdev(netdev);
4199         if (ret != 0) {
4200                 netif_err(tp, probe, netdev, "couldn't register the device\n");
4201                 goto out1;
4202         }
4203
4204         if (!rtl_can_wakeup(tp))
4205                 __rtl_set_wol(tp, 0);
4206
4207         tp->saved_wolopts = __rtl_get_wol(tp);
4208         if (tp->saved_wolopts)
4209                 device_set_wakeup_enable(&udev->dev, true);
4210         else
4211                 device_set_wakeup_enable(&udev->dev, false);
4212
4213         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4214
4215         return 0;
4216
4217 out1:
4218         netif_napi_del(&tp->napi);
4219         usb_set_intfdata(intf, NULL);
4220 out:
4221         free_netdev(netdev);
4222         return ret;
4223 }
4224
4225 static void rtl8152_disconnect(struct usb_interface *intf)
4226 {
4227         struct r8152 *tp = usb_get_intfdata(intf);
4228
4229         usb_set_intfdata(intf, NULL);
4230         if (tp) {
4231                 struct usb_device *udev = tp->udev;
4232
4233                 if (udev->state == USB_STATE_NOTATTACHED)
4234                         set_bit(RTL8152_UNPLUG, &tp->flags);
4235
4236                 netif_napi_del(&tp->napi);
4237                 unregister_netdev(tp->netdev);
4238                 tp->rtl_ops.unload(tp);
4239                 free_netdev(tp->netdev);
4240         }
4241 }
4242
4243 #define REALTEK_USB_DEVICE(vend, prod)  \
4244         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4245                        USB_DEVICE_ID_MATCH_INT_CLASS, \
4246         .idVendor = (vend), \
4247         .idProduct = (prod), \
4248         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4249 }, \
4250 { \
4251         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4252                        USB_DEVICE_ID_MATCH_DEVICE, \
4253         .idVendor = (vend), \
4254         .idProduct = (prod), \
4255         .bInterfaceClass = USB_CLASS_COMM, \
4256         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4257         .bInterfaceProtocol = USB_CDC_PROTO_NONE
4258
4259 /* table of devices that work with this driver */
4260 static struct usb_device_id rtl8152_table[] = {
4261         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4262         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4263         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4264         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7205)},
4265         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x304f)},
4266         {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA,  0x09ff)},
4267         {}
4268 };
4269
4270 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4271
4272 static struct usb_driver rtl8152_driver = {
4273         .name =         MODULENAME,
4274         .id_table =     rtl8152_table,
4275         .probe =        rtl8152_probe,
4276         .disconnect =   rtl8152_disconnect,
4277         .suspend =      rtl8152_suspend,
4278         .resume =       rtl8152_resume,
4279         .reset_resume = rtl8152_reset_resume,
4280         .pre_reset =    rtl8152_pre_reset,
4281         .post_reset =   rtl8152_post_reset,
4282         .supports_autosuspend = 1,
4283         .disable_hub_initiated_lpm = 1,
4284 };
4285
4286 module_usb_driver(rtl8152_driver);
4287
4288 MODULE_AUTHOR(DRIVER_AUTHOR);
4289 MODULE_DESCRIPTION(DRIVER_DESC);
4290 MODULE_LICENSE("GPL");