2 * Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * version 2 as published by the Free Software Foundation.
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
29 /* Version Information */
30 #define DRIVER_VERSION "v1.08.0 (2015/01/13)"
31 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
32 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
33 #define MODULENAME "r8152"
35 #define R8152_PHY_ID 32
37 #define PLA_IDR 0xc000
38 #define PLA_RCR 0xc010
39 #define PLA_RMS 0xc016
40 #define PLA_RXFIFO_CTRL0 0xc0a0
41 #define PLA_RXFIFO_CTRL1 0xc0a4
42 #define PLA_RXFIFO_CTRL2 0xc0a8
43 #define PLA_DMY_REG0 0xc0b0
44 #define PLA_FMC 0xc0b4
45 #define PLA_CFG_WOL 0xc0b6
46 #define PLA_TEREDO_CFG 0xc0bc
47 #define PLA_MAR 0xcd00
48 #define PLA_BACKUP 0xd000
49 #define PAL_BDC_CR 0xd1a0
50 #define PLA_TEREDO_TIMER 0xd2cc
51 #define PLA_REALWOW_TIMER 0xd2e8
52 #define PLA_LEDSEL 0xdd90
53 #define PLA_LED_FEATURE 0xdd92
54 #define PLA_PHYAR 0xde00
55 #define PLA_BOOT_CTRL 0xe004
56 #define PLA_GPHY_INTR_IMR 0xe022
57 #define PLA_EEE_CR 0xe040
58 #define PLA_EEEP_CR 0xe080
59 #define PLA_MAC_PWR_CTRL 0xe0c0
60 #define PLA_MAC_PWR_CTRL2 0xe0ca
61 #define PLA_MAC_PWR_CTRL3 0xe0cc
62 #define PLA_MAC_PWR_CTRL4 0xe0ce
63 #define PLA_WDT6_CTRL 0xe428
64 #define PLA_TCR0 0xe610
65 #define PLA_TCR1 0xe612
66 #define PLA_MTPS 0xe615
67 #define PLA_TXFIFO_CTRL 0xe618
68 #define PLA_RSTTALLY 0xe800
70 #define PLA_CRWECR 0xe81c
71 #define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
72 #define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
73 #define PLA_CONFIG5 0xe822
74 #define PLA_PHY_PWR 0xe84c
75 #define PLA_OOB_CTRL 0xe84f
76 #define PLA_CPCR 0xe854
77 #define PLA_MISC_0 0xe858
78 #define PLA_MISC_1 0xe85a
79 #define PLA_OCP_GPHY_BASE 0xe86c
80 #define PLA_TALLYCNT 0xe890
81 #define PLA_SFF_STS_7 0xe8de
82 #define PLA_PHYSTATUS 0xe908
83 #define PLA_BP_BA 0xfc26
84 #define PLA_BP_0 0xfc28
85 #define PLA_BP_1 0xfc2a
86 #define PLA_BP_2 0xfc2c
87 #define PLA_BP_3 0xfc2e
88 #define PLA_BP_4 0xfc30
89 #define PLA_BP_5 0xfc32
90 #define PLA_BP_6 0xfc34
91 #define PLA_BP_7 0xfc36
92 #define PLA_BP_EN 0xfc38
94 #define USB_USB2PHY 0xb41e
95 #define USB_SSPHYLINK2 0xb428
96 #define USB_U2P3_CTRL 0xb460
97 #define USB_CSR_DUMMY1 0xb464
98 #define USB_CSR_DUMMY2 0xb466
99 #define USB_DEV_STAT 0xb808
100 #define USB_CONNECT_TIMER 0xcbf8
101 #define USB_BURST_SIZE 0xcfc0
102 #define USB_USB_CTRL 0xd406
103 #define USB_PHY_CTRL 0xd408
104 #define USB_TX_AGG 0xd40a
105 #define USB_RX_BUF_TH 0xd40c
106 #define USB_USB_TIMER 0xd428
107 #define USB_RX_EARLY_TIMEOUT 0xd42c
108 #define USB_RX_EARLY_SIZE 0xd42e
109 #define USB_PM_CTRL_STATUS 0xd432
110 #define USB_TX_DMA 0xd434
111 #define USB_TOLERANCE 0xd490
112 #define USB_LPM_CTRL 0xd41a
113 #define USB_UPS_CTRL 0xd800
114 #define USB_MISC_0 0xd81a
115 #define USB_POWER_CUT 0xd80a
116 #define USB_AFE_CTRL2 0xd824
117 #define USB_WDT11_CTRL 0xe43c
118 #define USB_BP_BA 0xfc26
119 #define USB_BP_0 0xfc28
120 #define USB_BP_1 0xfc2a
121 #define USB_BP_2 0xfc2c
122 #define USB_BP_3 0xfc2e
123 #define USB_BP_4 0xfc30
124 #define USB_BP_5 0xfc32
125 #define USB_BP_6 0xfc34
126 #define USB_BP_7 0xfc36
127 #define USB_BP_EN 0xfc38
130 #define OCP_ALDPS_CONFIG 0x2010
131 #define OCP_EEE_CONFIG1 0x2080
132 #define OCP_EEE_CONFIG2 0x2092
133 #define OCP_EEE_CONFIG3 0x2094
134 #define OCP_BASE_MII 0xa400
135 #define OCP_EEE_AR 0xa41a
136 #define OCP_EEE_DATA 0xa41c
137 #define OCP_PHY_STATUS 0xa420
138 #define OCP_POWER_CFG 0xa430
139 #define OCP_EEE_CFG 0xa432
140 #define OCP_SRAM_ADDR 0xa436
141 #define OCP_SRAM_DATA 0xa438
142 #define OCP_DOWN_SPEED 0xa442
143 #define OCP_EEE_ABLE 0xa5c4
144 #define OCP_EEE_ADV 0xa5d0
145 #define OCP_EEE_LPABLE 0xa5d2
146 #define OCP_ADC_CFG 0xbc06
149 #define SRAM_LPF_CFG 0x8012
150 #define SRAM_10M_AMP1 0x8080
151 #define SRAM_10M_AMP2 0x8082
152 #define SRAM_IMPEDANCE 0x8084
155 #define RCR_AAP 0x00000001
156 #define RCR_APM 0x00000002
157 #define RCR_AM 0x00000004
158 #define RCR_AB 0x00000008
159 #define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
161 /* PLA_RXFIFO_CTRL0 */
162 #define RXFIFO_THR1_NORMAL 0x00080002
163 #define RXFIFO_THR1_OOB 0x01800003
165 /* PLA_RXFIFO_CTRL1 */
166 #define RXFIFO_THR2_FULL 0x00000060
167 #define RXFIFO_THR2_HIGH 0x00000038
168 #define RXFIFO_THR2_OOB 0x0000004a
169 #define RXFIFO_THR2_NORMAL 0x00a0
171 /* PLA_RXFIFO_CTRL2 */
172 #define RXFIFO_THR3_FULL 0x00000078
173 #define RXFIFO_THR3_HIGH 0x00000048
174 #define RXFIFO_THR3_OOB 0x0000005a
175 #define RXFIFO_THR3_NORMAL 0x0110
177 /* PLA_TXFIFO_CTRL */
178 #define TXFIFO_THR_NORMAL 0x00400008
179 #define TXFIFO_THR_NORMAL2 0x01000008
182 #define ECM_ALDPS 0x0002
185 #define FMC_FCR_MCU_EN 0x0001
188 #define EEEP_CR_EEEP_TX 0x0002
191 #define WDT6_SET_MODE 0x0010
194 #define TCR0_TX_EMPTY 0x0800
195 #define TCR0_AUTO_FIFO 0x0080
198 #define VERSION_MASK 0x7cf0
201 #define MTPS_JUMBO (12 * 1024 / 64)
202 #define MTPS_DEFAULT (6 * 1024 / 64)
205 #define TALLY_RESET 0x0001
213 #define CRWECR_NORAML 0x00
214 #define CRWECR_CONFIG 0xc0
217 #define NOW_IS_OOB 0x80
218 #define TXFIFO_EMPTY 0x20
219 #define RXFIFO_EMPTY 0x10
220 #define LINK_LIST_READY 0x02
221 #define DIS_MCU_CLROOB 0x01
222 #define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
225 #define RXDY_GATED_EN 0x0008
228 #define RE_INIT_LL 0x8000
229 #define MCU_BORW_EN 0x4000
232 #define CPCR_RX_VLAN 0x0040
235 #define MAGIC_EN 0x0001
238 #define TEREDO_SEL 0x8000
239 #define TEREDO_WAKE_MASK 0x7f00
240 #define TEREDO_RS_EVENT_MASK 0x00fe
241 #define OOB_TEREDO_EN 0x0001
244 #define ALDPS_PROXY_MODE 0x0001
247 #define LINK_ON_WAKE_EN 0x0010
248 #define LINK_OFF_WAKE_EN 0x0008
251 #define BWF_EN 0x0040
252 #define MWF_EN 0x0020
253 #define UWF_EN 0x0010
254 #define LAN_WAKE_EN 0x0002
256 /* PLA_LED_FEATURE */
257 #define LED_MODE_MASK 0x0700
260 #define TX_10M_IDLE_EN 0x0080
261 #define PFM_PWM_SWITCH 0x0040
263 /* PLA_MAC_PWR_CTRL */
264 #define D3_CLK_GATED_EN 0x00004000
265 #define MCU_CLK_RATIO 0x07010f07
266 #define MCU_CLK_RATIO_MASK 0x0f0f0f0f
267 #define ALDPS_SPDWN_RATIO 0x0f87
269 /* PLA_MAC_PWR_CTRL2 */
270 #define EEE_SPDWN_RATIO 0x8007
272 /* PLA_MAC_PWR_CTRL3 */
273 #define PKT_AVAIL_SPDWN_EN 0x0100
274 #define SUSPEND_SPDWN_EN 0x0004
275 #define U1U2_SPDWN_EN 0x0002
276 #define L1_SPDWN_EN 0x0001
278 /* PLA_MAC_PWR_CTRL4 */
279 #define PWRSAVE_SPDWN_EN 0x1000
280 #define RXDV_SPDWN_EN 0x0800
281 #define TX10MIDLE_EN 0x0100
282 #define TP100_SPDWN_EN 0x0020
283 #define TP500_SPDWN_EN 0x0010
284 #define TP1000_SPDWN_EN 0x0008
285 #define EEE_SPDWN_EN 0x0001
287 /* PLA_GPHY_INTR_IMR */
288 #define GPHY_STS_MSK 0x0001
289 #define SPEED_DOWN_MSK 0x0002
290 #define SPDWN_RXDV_MSK 0x0004
291 #define SPDWN_LINKCHG_MSK 0x0008
294 #define PHYAR_FLAG 0x80000000
297 #define EEE_RX_EN 0x0001
298 #define EEE_TX_EN 0x0002
301 #define AUTOLOAD_DONE 0x0002
304 #define USB2PHY_SUSPEND 0x0001
305 #define USB2PHY_L1 0x0002
308 #define pwd_dn_scale_mask 0x3ffe
309 #define pwd_dn_scale(x) ((x) << 1)
312 #define DYNAMIC_BURST 0x0001
315 #define EP4_FULL_FC 0x0001
318 #define STAT_SPEED_MASK 0x0006
319 #define STAT_SPEED_HIGH 0x0000
320 #define STAT_SPEED_FULL 0x0002
323 #define TX_AGG_MAX_THRESHOLD 0x03
326 #define RX_THR_SUPPER 0x0c350180
327 #define RX_THR_HIGH 0x7a120180
328 #define RX_THR_SLOW 0xffff0180
331 #define TEST_MODE_DISABLE 0x00000001
332 #define TX_SIZE_ADJUST1 0x00000100
335 #define POWER_CUT 0x0100
337 /* USB_PM_CTRL_STATUS */
338 #define RESUME_INDICATE 0x0001
341 #define RX_AGG_DISABLE 0x0010
344 #define U2P3_ENABLE 0x0001
347 #define PWR_EN 0x0001
348 #define PHASE2_EN 0x0008
351 #define PCUT_STATUS 0x0001
353 /* USB_RX_EARLY_TIMEOUT */
354 #define COALESCE_SUPER 85000U
355 #define COALESCE_HIGH 250000U
356 #define COALESCE_SLOW 524280U
359 #define TIMER11_EN 0x0001
362 /* bit 4 ~ 5: fifo empty boundary */
363 #define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
364 /* bit 2 ~ 3: LMP timer */
365 #define LPM_TIMER_MASK 0x0c
366 #define LPM_TIMER_500MS 0x04 /* 500 ms */
367 #define LPM_TIMER_500US 0x0c /* 500 us */
368 #define ROK_EXIT_LPM 0x02
371 #define SEN_VAL_MASK 0xf800
372 #define SEN_VAL_NORMAL 0xa000
373 #define SEL_RXIDLE 0x0100
375 /* OCP_ALDPS_CONFIG */
376 #define ENPWRSAVE 0x8000
377 #define ENPDNPS 0x0200
378 #define LINKENA 0x0100
379 #define DIS_SDSAVE 0x0010
382 #define PHY_STAT_MASK 0x0007
383 #define PHY_STAT_LAN_ON 3
384 #define PHY_STAT_PWRDN 5
387 #define EEE_CLKDIV_EN 0x8000
388 #define EN_ALDPS 0x0004
389 #define EN_10M_PLLOFF 0x0001
391 /* OCP_EEE_CONFIG1 */
392 #define RG_TXLPI_MSK_HFDUP 0x8000
393 #define RG_MATCLR_EN 0x4000
394 #define EEE_10_CAP 0x2000
395 #define EEE_NWAY_EN 0x1000
396 #define TX_QUIET_EN 0x0200
397 #define RX_QUIET_EN 0x0100
398 #define sd_rise_time_mask 0x0070
399 #define sd_rise_time(x) (min(x, 7) << 4) /* bit 4 ~ 6 */
400 #define RG_RXLPI_MSK_HFDUP 0x0008
401 #define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
403 /* OCP_EEE_CONFIG2 */
404 #define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
405 #define RG_DACQUIET_EN 0x0400
406 #define RG_LDVQUIET_EN 0x0200
407 #define RG_CKRSEL 0x0020
408 #define RG_EEEPRG_EN 0x0010
410 /* OCP_EEE_CONFIG3 */
411 #define fast_snr_mask 0xff80
412 #define fast_snr(x) (min(x, 0x1ff) << 7) /* bit 7 ~ 15 */
413 #define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
414 #define MSK_PH 0x0006 /* bit 0 ~ 3 */
417 /* bit[15:14] function */
418 #define FUN_ADDR 0x0000
419 #define FUN_DATA 0x4000
420 /* bit[4:0] device addr */
423 #define CTAP_SHORT_EN 0x0040
424 #define EEE10_EN 0x0010
427 #define EN_10M_BGOFF 0x0080
430 #define CKADSEL_L 0x0100
431 #define ADC_EN 0x0080
432 #define EN_EMI_L 0x0040
435 #define LPF_AUTO_TUNE 0x8000
438 #define GDAC_IB_UPALL 0x0008
441 #define AMP_DN 0x0200
444 #define RX_DRIVING_MASK 0x6000
446 enum rtl_register_content {
454 #define RTL8152_MAX_TX 4
455 #define RTL8152_MAX_RX 10
461 #define INTR_LINK 0x0004
463 #define RTL8152_REQT_READ 0xc0
464 #define RTL8152_REQT_WRITE 0x40
465 #define RTL8152_REQ_GET_REGS 0x05
466 #define RTL8152_REQ_SET_REGS 0x05
468 #define BYTE_EN_DWORD 0xff
469 #define BYTE_EN_WORD 0x33
470 #define BYTE_EN_BYTE 0x11
471 #define BYTE_EN_SIX_BYTES 0x3f
472 #define BYTE_EN_START_MASK 0x0f
473 #define BYTE_EN_END_MASK 0xf0
475 #define RTL8153_MAX_PACKET 9216 /* 9K */
476 #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
477 #define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
478 #define RTL8153_RMS RTL8153_MAX_PACKET
479 #define RTL8152_TX_TIMEOUT (5 * HZ)
480 #define RTL8152_NAPI_WEIGHT 64
493 /* Define these values to match your device */
494 #define VENDOR_ID_REALTEK 0x0bda
495 #define VENDOR_ID_SAMSUNG 0x04e8
497 #define MCU_TYPE_PLA 0x0100
498 #define MCU_TYPE_USB 0x0000
500 struct tally_counter {
507 __le32 tx_one_collision;
508 __le32 tx_multi_collision;
518 #define RX_LEN_MASK 0x7fff
521 #define RD_UDP_CS BIT(23)
522 #define RD_TCP_CS BIT(22)
523 #define RD_IPV6_CS BIT(20)
524 #define RD_IPV4_CS BIT(19)
527 #define IPF BIT(23) /* IP checksum fail */
528 #define UDPF BIT(22) /* UDP checksum fail */
529 #define TCPF BIT(21) /* TCP checksum fail */
530 #define RX_VLAN_TAG BIT(16)
539 #define TX_FS BIT(31) /* First segment of a packet */
540 #define TX_LS BIT(30) /* Final segment of a packet */
541 #define GTSENDV4 BIT(28)
542 #define GTSENDV6 BIT(27)
543 #define GTTCPHO_SHIFT 18
544 #define GTTCPHO_MAX 0x7fU
545 #define TX_LEN_MAX 0x3ffffU
548 #define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
549 #define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
550 #define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
551 #define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
553 #define MSS_MAX 0x7ffU
554 #define TCPHO_SHIFT 17
555 #define TCPHO_MAX 0x7ffU
556 #define TX_VLAN_TAG BIT(16)
562 struct list_head list;
564 struct r8152 *context;
570 struct list_head list;
572 struct r8152 *context;
581 struct usb_device *udev;
582 struct napi_struct napi;
583 struct usb_interface *intf;
584 struct net_device *netdev;
585 struct urb *intr_urb;
586 struct tx_agg tx_info[RTL8152_MAX_TX];
587 struct rx_agg rx_info[RTL8152_MAX_RX];
588 struct list_head rx_done, tx_free;
589 struct sk_buff_head tx_queue, rx_queue;
590 spinlock_t rx_lock, tx_lock;
591 struct delayed_work schedule;
592 struct mii_if_info mii;
593 struct mutex control; /* use for hw setting */
596 void (*init)(struct r8152 *);
597 int (*enable)(struct r8152 *);
598 void (*disable)(struct r8152 *);
599 void (*up)(struct r8152 *);
600 void (*down)(struct r8152 *);
601 void (*unload)(struct r8152 *);
602 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
603 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
632 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
633 * The RTL chips use a 64 element hash table based on the Ethernet CRC.
635 static const int multicast_filter_limit = 32;
636 static unsigned int agg_buf_sz = 16384;
638 #define RTL_LIMITED_TSO_SIZE (agg_buf_sz - sizeof(struct tx_desc) - \
639 VLAN_ETH_HLEN - VLAN_HLEN)
642 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
647 tmp = kmalloc(size, GFP_KERNEL);
651 ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
652 RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
653 value, index, tmp, size, 500);
655 memcpy(data, tmp, size);
662 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
667 tmp = kmemdup(data, size, GFP_KERNEL);
671 ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
672 RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
673 value, index, tmp, size, 500);
680 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
681 void *data, u16 type)
686 if (test_bit(RTL8152_UNPLUG, &tp->flags))
689 /* both size and indix must be 4 bytes align */
690 if ((size & 3) || !size || (index & 3) || !data)
693 if ((u32)index + (u32)size > 0xffff)
698 ret = get_registers(tp, index, type, limit, data);
706 ret = get_registers(tp, index, type, size, data);
718 set_bit(RTL8152_UNPLUG, &tp->flags);
723 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
724 u16 size, void *data, u16 type)
727 u16 byteen_start, byteen_end, byen;
730 if (test_bit(RTL8152_UNPLUG, &tp->flags))
733 /* both size and indix must be 4 bytes align */
734 if ((size & 3) || !size || (index & 3) || !data)
737 if ((u32)index + (u32)size > 0xffff)
740 byteen_start = byteen & BYTE_EN_START_MASK;
741 byteen_end = byteen & BYTE_EN_END_MASK;
743 byen = byteen_start | (byteen_start << 4);
744 ret = set_registers(tp, index, type | byen, 4, data);
757 ret = set_registers(tp, index,
758 type | BYTE_EN_DWORD,
767 ret = set_registers(tp, index,
768 type | BYTE_EN_DWORD,
780 byen = byteen_end | (byteen_end >> 4);
781 ret = set_registers(tp, index, type | byen, 4, data);
788 set_bit(RTL8152_UNPLUG, &tp->flags);
794 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
796 return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
800 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
802 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
806 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
808 return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
812 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
814 return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
817 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
821 generic_ocp_read(tp, index, sizeof(data), &data, type);
823 return __le32_to_cpu(data);
826 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
828 __le32 tmp = __cpu_to_le32(data);
830 generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
833 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
837 u8 shift = index & 2;
841 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
843 data = __le32_to_cpu(tmp);
844 data >>= (shift * 8);
850 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
854 u16 byen = BYTE_EN_WORD;
855 u8 shift = index & 2;
861 mask <<= (shift * 8);
862 data <<= (shift * 8);
866 tmp = __cpu_to_le32(data);
868 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
871 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
875 u8 shift = index & 3;
879 generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
881 data = __le32_to_cpu(tmp);
882 data >>= (shift * 8);
888 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
892 u16 byen = BYTE_EN_BYTE;
893 u8 shift = index & 3;
899 mask <<= (shift * 8);
900 data <<= (shift * 8);
904 tmp = __cpu_to_le32(data);
906 generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
909 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
911 u16 ocp_base, ocp_index;
913 ocp_base = addr & 0xf000;
914 if (ocp_base != tp->ocp_base) {
915 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
916 tp->ocp_base = ocp_base;
919 ocp_index = (addr & 0x0fff) | 0xb000;
920 return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
923 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
925 u16 ocp_base, ocp_index;
927 ocp_base = addr & 0xf000;
928 if (ocp_base != tp->ocp_base) {
929 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
930 tp->ocp_base = ocp_base;
933 ocp_index = (addr & 0x0fff) | 0xb000;
934 ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
937 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
939 ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
942 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
944 return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
947 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
949 ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
950 ocp_reg_write(tp, OCP_SRAM_DATA, data);
953 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
955 struct r8152 *tp = netdev_priv(netdev);
958 if (test_bit(RTL8152_UNPLUG, &tp->flags))
961 if (phy_id != R8152_PHY_ID)
964 ret = r8152_mdio_read(tp, reg);
970 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
972 struct r8152 *tp = netdev_priv(netdev);
974 if (test_bit(RTL8152_UNPLUG, &tp->flags))
977 if (phy_id != R8152_PHY_ID)
980 r8152_mdio_write(tp, reg, val);
984 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
986 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
988 struct r8152 *tp = netdev_priv(netdev);
989 struct sockaddr *addr = p;
990 int ret = -EADDRNOTAVAIL;
992 if (!is_valid_ether_addr(addr->sa_data))
995 ret = usb_autopm_get_interface(tp->intf);
999 mutex_lock(&tp->control);
1001 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1003 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1004 pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1005 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1007 mutex_unlock(&tp->control);
1009 usb_autopm_put_interface(tp->intf);
1014 static int set_ethernet_addr(struct r8152 *tp)
1016 struct net_device *dev = tp->netdev;
1020 if (tp->version == RTL_VER_01)
1021 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1023 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1026 netif_err(tp, probe, dev, "Get ether addr fail\n");
1027 } else if (!is_valid_ether_addr(sa.sa_data)) {
1028 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1030 eth_hw_addr_random(dev);
1031 ether_addr_copy(sa.sa_data, dev->dev_addr);
1032 ret = rtl8152_set_mac_address(dev, &sa);
1033 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1036 if (tp->version == RTL_VER_01)
1037 ether_addr_copy(dev->dev_addr, sa.sa_data);
1039 ret = rtl8152_set_mac_address(dev, &sa);
1045 static void read_bulk_callback(struct urb *urb)
1047 struct net_device *netdev;
1048 int status = urb->status;
1060 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1063 if (!test_bit(WORK_ENABLE, &tp->flags))
1066 netdev = tp->netdev;
1068 /* When link down, the driver would cancel all bulks. */
1069 /* This avoid the re-submitting bulk */
1070 if (!netif_carrier_ok(netdev))
1073 usb_mark_last_busy(tp->udev);
1077 if (urb->actual_length < ETH_ZLEN)
1080 spin_lock(&tp->rx_lock);
1081 list_add_tail(&agg->list, &tp->rx_done);
1082 spin_unlock(&tp->rx_lock);
1083 napi_schedule(&tp->napi);
1086 set_bit(RTL8152_UNPLUG, &tp->flags);
1087 netif_device_detach(tp->netdev);
1090 return; /* the urb is in unlink state */
1092 if (net_ratelimit())
1093 netdev_warn(netdev, "maybe reset is needed?\n");
1096 if (net_ratelimit())
1097 netdev_warn(netdev, "Rx status %d\n", status);
1101 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1104 static void write_bulk_callback(struct urb *urb)
1106 struct net_device_stats *stats;
1107 struct net_device *netdev;
1110 int status = urb->status;
1120 netdev = tp->netdev;
1121 stats = &netdev->stats;
1123 if (net_ratelimit())
1124 netdev_warn(netdev, "Tx status %d\n", status);
1125 stats->tx_errors += agg->skb_num;
1127 stats->tx_packets += agg->skb_num;
1128 stats->tx_bytes += agg->skb_len;
1131 spin_lock(&tp->tx_lock);
1132 list_add_tail(&agg->list, &tp->tx_free);
1133 spin_unlock(&tp->tx_lock);
1135 usb_autopm_put_interface_async(tp->intf);
1137 if (!netif_carrier_ok(netdev))
1140 if (!test_bit(WORK_ENABLE, &tp->flags))
1143 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1146 if (!skb_queue_empty(&tp->tx_queue))
1147 napi_schedule(&tp->napi);
1150 static void intr_callback(struct urb *urb)
1154 int status = urb->status;
1161 if (!test_bit(WORK_ENABLE, &tp->flags))
1164 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1168 case 0: /* success */
1170 case -ECONNRESET: /* unlink */
1172 netif_device_detach(tp->netdev);
1175 netif_info(tp, intr, tp->netdev,
1176 "Stop submitting intr, status %d\n", status);
1179 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1181 /* -EPIPE: should clear the halt */
1183 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1187 d = urb->transfer_buffer;
1188 if (INTR_LINK & __le16_to_cpu(d[0])) {
1189 if (!netif_carrier_ok(tp->netdev)) {
1190 set_bit(RTL8152_LINK_CHG, &tp->flags);
1191 schedule_delayed_work(&tp->schedule, 0);
1194 if (netif_carrier_ok(tp->netdev)) {
1195 set_bit(RTL8152_LINK_CHG, &tp->flags);
1196 schedule_delayed_work(&tp->schedule, 0);
1201 res = usb_submit_urb(urb, GFP_ATOMIC);
1202 if (res == -ENODEV) {
1203 set_bit(RTL8152_UNPLUG, &tp->flags);
1204 netif_device_detach(tp->netdev);
1206 netif_err(tp, intr, tp->netdev,
1207 "can't resubmit intr, status %d\n", res);
1211 static inline void *rx_agg_align(void *data)
1213 return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1216 static inline void *tx_agg_align(void *data)
1218 return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1221 static void free_all_mem(struct r8152 *tp)
1225 for (i = 0; i < RTL8152_MAX_RX; i++) {
1226 usb_free_urb(tp->rx_info[i].urb);
1227 tp->rx_info[i].urb = NULL;
1229 kfree(tp->rx_info[i].buffer);
1230 tp->rx_info[i].buffer = NULL;
1231 tp->rx_info[i].head = NULL;
1234 for (i = 0; i < RTL8152_MAX_TX; i++) {
1235 usb_free_urb(tp->tx_info[i].urb);
1236 tp->tx_info[i].urb = NULL;
1238 kfree(tp->tx_info[i].buffer);
1239 tp->tx_info[i].buffer = NULL;
1240 tp->tx_info[i].head = NULL;
1243 usb_free_urb(tp->intr_urb);
1244 tp->intr_urb = NULL;
1246 kfree(tp->intr_buff);
1247 tp->intr_buff = NULL;
1250 static int alloc_all_mem(struct r8152 *tp)
1252 struct net_device *netdev = tp->netdev;
1253 struct usb_interface *intf = tp->intf;
1254 struct usb_host_interface *alt = intf->cur_altsetting;
1255 struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1260 node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1262 spin_lock_init(&tp->rx_lock);
1263 spin_lock_init(&tp->tx_lock);
1264 INIT_LIST_HEAD(&tp->tx_free);
1265 skb_queue_head_init(&tp->tx_queue);
1266 skb_queue_head_init(&tp->rx_queue);
1268 for (i = 0; i < RTL8152_MAX_RX; i++) {
1269 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1273 if (buf != rx_agg_align(buf)) {
1275 buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1281 urb = usb_alloc_urb(0, GFP_KERNEL);
1287 INIT_LIST_HEAD(&tp->rx_info[i].list);
1288 tp->rx_info[i].context = tp;
1289 tp->rx_info[i].urb = urb;
1290 tp->rx_info[i].buffer = buf;
1291 tp->rx_info[i].head = rx_agg_align(buf);
1294 for (i = 0; i < RTL8152_MAX_TX; i++) {
1295 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1299 if (buf != tx_agg_align(buf)) {
1301 buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1307 urb = usb_alloc_urb(0, GFP_KERNEL);
1313 INIT_LIST_HEAD(&tp->tx_info[i].list);
1314 tp->tx_info[i].context = tp;
1315 tp->tx_info[i].urb = urb;
1316 tp->tx_info[i].buffer = buf;
1317 tp->tx_info[i].head = tx_agg_align(buf);
1319 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1322 tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1326 tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1330 tp->intr_interval = (int)ep_intr->desc.bInterval;
1331 usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1332 tp->intr_buff, INTBUFSIZE, intr_callback,
1333 tp, tp->intr_interval);
1342 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1344 struct tx_agg *agg = NULL;
1345 unsigned long flags;
1347 if (list_empty(&tp->tx_free))
1350 spin_lock_irqsave(&tp->tx_lock, flags);
1351 if (!list_empty(&tp->tx_free)) {
1352 struct list_head *cursor;
1354 cursor = tp->tx_free.next;
1355 list_del_init(cursor);
1356 agg = list_entry(cursor, struct tx_agg, list);
1358 spin_unlock_irqrestore(&tp->tx_lock, flags);
1363 /* r8152_csum_workaround()
1364 * The hw limites the value the transport offset. When the offset is out of the
1365 * range, calculate the checksum by sw.
1367 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1368 struct sk_buff_head *list)
1370 if (skb_shinfo(skb)->gso_size) {
1371 netdev_features_t features = tp->netdev->features;
1372 struct sk_buff_head seg_list;
1373 struct sk_buff *segs, *nskb;
1375 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1376 segs = skb_gso_segment(skb, features);
1377 if (IS_ERR(segs) || !segs)
1380 __skb_queue_head_init(&seg_list);
1386 __skb_queue_tail(&seg_list, nskb);
1389 skb_queue_splice(&seg_list, list);
1391 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1392 if (skb_checksum_help(skb) < 0)
1395 __skb_queue_head(list, skb);
1397 struct net_device_stats *stats;
1400 stats = &tp->netdev->stats;
1401 stats->tx_dropped++;
1406 /* msdn_giant_send_check()
1407 * According to the document of microsoft, the TCP Pseudo Header excludes the
1408 * packet length for IPv6 TCP large packets.
1410 static int msdn_giant_send_check(struct sk_buff *skb)
1412 const struct ipv6hdr *ipv6h;
1416 ret = skb_cow_head(skb, 0);
1420 ipv6h = ipv6_hdr(skb);
1424 th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1429 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1431 if (skb_vlan_tag_present(skb)) {
1434 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1435 desc->opts2 |= cpu_to_le32(opts2);
1439 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1441 u32 opts2 = le32_to_cpu(desc->opts2);
1443 if (opts2 & RX_VLAN_TAG)
1444 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1445 swab16(opts2 & 0xffff));
1448 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1449 struct sk_buff *skb, u32 len, u32 transport_offset)
1451 u32 mss = skb_shinfo(skb)->gso_size;
1452 u32 opts1, opts2 = 0;
1453 int ret = TX_CSUM_SUCCESS;
1455 WARN_ON_ONCE(len > TX_LEN_MAX);
1457 opts1 = len | TX_FS | TX_LS;
1460 if (transport_offset > GTTCPHO_MAX) {
1461 netif_warn(tp, tx_err, tp->netdev,
1462 "Invalid transport offset 0x%x for TSO\n",
1468 switch (vlan_get_protocol(skb)) {
1469 case htons(ETH_P_IP):
1473 case htons(ETH_P_IPV6):
1474 if (msdn_giant_send_check(skb)) {
1486 opts1 |= transport_offset << GTTCPHO_SHIFT;
1487 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1488 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1491 if (transport_offset > TCPHO_MAX) {
1492 netif_warn(tp, tx_err, tp->netdev,
1493 "Invalid transport offset 0x%x\n",
1499 switch (vlan_get_protocol(skb)) {
1500 case htons(ETH_P_IP):
1502 ip_protocol = ip_hdr(skb)->protocol;
1505 case htons(ETH_P_IPV6):
1507 ip_protocol = ipv6_hdr(skb)->nexthdr;
1511 ip_protocol = IPPROTO_RAW;
1515 if (ip_protocol == IPPROTO_TCP)
1517 else if (ip_protocol == IPPROTO_UDP)
1522 opts2 |= transport_offset << TCPHO_SHIFT;
1525 desc->opts2 = cpu_to_le32(opts2);
1526 desc->opts1 = cpu_to_le32(opts1);
1532 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1534 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1538 __skb_queue_head_init(&skb_head);
1539 spin_lock(&tx_queue->lock);
1540 skb_queue_splice_init(tx_queue, &skb_head);
1541 spin_unlock(&tx_queue->lock);
1543 tx_data = agg->head;
1546 remain = agg_buf_sz;
1548 while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1549 struct tx_desc *tx_desc;
1550 struct sk_buff *skb;
1554 skb = __skb_dequeue(&skb_head);
1558 len = skb->len + sizeof(*tx_desc);
1561 __skb_queue_head(&skb_head, skb);
1565 tx_data = tx_agg_align(tx_data);
1566 tx_desc = (struct tx_desc *)tx_data;
1568 offset = (u32)skb_transport_offset(skb);
1570 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1571 r8152_csum_workaround(tp, skb, &skb_head);
1575 rtl_tx_vlan_tag(tx_desc, skb);
1577 tx_data += sizeof(*tx_desc);
1580 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1581 struct net_device_stats *stats = &tp->netdev->stats;
1583 stats->tx_dropped++;
1584 dev_kfree_skb_any(skb);
1585 tx_data -= sizeof(*tx_desc);
1590 agg->skb_len += len;
1593 dev_kfree_skb_any(skb);
1595 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1598 if (!skb_queue_empty(&skb_head)) {
1599 spin_lock(&tx_queue->lock);
1600 skb_queue_splice(&skb_head, tx_queue);
1601 spin_unlock(&tx_queue->lock);
1604 netif_tx_lock(tp->netdev);
1606 if (netif_queue_stopped(tp->netdev) &&
1607 skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1608 netif_wake_queue(tp->netdev);
1610 netif_tx_unlock(tp->netdev);
1612 ret = usb_autopm_get_interface_async(tp->intf);
1616 usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1617 agg->head, (int)(tx_data - (u8 *)agg->head),
1618 (usb_complete_t)write_bulk_callback, agg);
1620 ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1622 usb_autopm_put_interface_async(tp->intf);
1628 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1630 u8 checksum = CHECKSUM_NONE;
1633 if (tp->version == RTL_VER_01)
1636 opts2 = le32_to_cpu(rx_desc->opts2);
1637 opts3 = le32_to_cpu(rx_desc->opts3);
1639 if (opts2 & RD_IPV4_CS) {
1641 checksum = CHECKSUM_NONE;
1642 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1643 checksum = CHECKSUM_NONE;
1644 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1645 checksum = CHECKSUM_NONE;
1647 checksum = CHECKSUM_UNNECESSARY;
1648 } else if (RD_IPV6_CS) {
1649 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1650 checksum = CHECKSUM_UNNECESSARY;
1651 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1652 checksum = CHECKSUM_UNNECESSARY;
1659 static int rx_bottom(struct r8152 *tp, int budget)
1661 unsigned long flags;
1662 struct list_head *cursor, *next, rx_queue;
1663 int ret = 0, work_done = 0;
1665 if (!skb_queue_empty(&tp->rx_queue)) {
1666 while (work_done < budget) {
1667 struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1668 struct net_device *netdev = tp->netdev;
1669 struct net_device_stats *stats = &netdev->stats;
1670 unsigned int pkt_len;
1676 napi_gro_receive(&tp->napi, skb);
1678 stats->rx_packets++;
1679 stats->rx_bytes += pkt_len;
1683 if (list_empty(&tp->rx_done))
1686 INIT_LIST_HEAD(&rx_queue);
1687 spin_lock_irqsave(&tp->rx_lock, flags);
1688 list_splice_init(&tp->rx_done, &rx_queue);
1689 spin_unlock_irqrestore(&tp->rx_lock, flags);
1691 list_for_each_safe(cursor, next, &rx_queue) {
1692 struct rx_desc *rx_desc;
1698 list_del_init(cursor);
1700 agg = list_entry(cursor, struct rx_agg, list);
1702 if (urb->actual_length < ETH_ZLEN)
1705 rx_desc = agg->head;
1706 rx_data = agg->head;
1707 len_used += sizeof(struct rx_desc);
1709 while (urb->actual_length > len_used) {
1710 struct net_device *netdev = tp->netdev;
1711 struct net_device_stats *stats = &netdev->stats;
1712 unsigned int pkt_len;
1713 struct sk_buff *skb;
1715 pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1716 if (pkt_len < ETH_ZLEN)
1719 len_used += pkt_len;
1720 if (urb->actual_length < len_used)
1723 pkt_len -= CRC_SIZE;
1724 rx_data += sizeof(struct rx_desc);
1726 skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1728 stats->rx_dropped++;
1732 skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1733 memcpy(skb->data, rx_data, pkt_len);
1734 skb_put(skb, pkt_len);
1735 skb->protocol = eth_type_trans(skb, netdev);
1736 rtl_rx_vlan_tag(rx_desc, skb);
1737 if (work_done < budget) {
1738 napi_gro_receive(&tp->napi, skb);
1740 stats->rx_packets++;
1741 stats->rx_bytes += pkt_len;
1743 __skb_queue_tail(&tp->rx_queue, skb);
1747 rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1748 rx_desc = (struct rx_desc *)rx_data;
1749 len_used = (int)(rx_data - (u8 *)agg->head);
1750 len_used += sizeof(struct rx_desc);
1755 ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1757 urb->actual_length = 0;
1758 list_add_tail(&agg->list, next);
1762 if (!list_empty(&rx_queue)) {
1763 spin_lock_irqsave(&tp->rx_lock, flags);
1764 list_splice_tail(&rx_queue, &tp->rx_done);
1765 spin_unlock_irqrestore(&tp->rx_lock, flags);
1772 static void tx_bottom(struct r8152 *tp)
1779 if (skb_queue_empty(&tp->tx_queue))
1782 agg = r8152_get_tx_agg(tp);
1786 res = r8152_tx_agg_fill(tp, agg);
1788 struct net_device *netdev = tp->netdev;
1790 if (res == -ENODEV) {
1791 set_bit(RTL8152_UNPLUG, &tp->flags);
1792 netif_device_detach(netdev);
1794 struct net_device_stats *stats = &netdev->stats;
1795 unsigned long flags;
1797 netif_warn(tp, tx_err, netdev,
1798 "failed tx_urb %d\n", res);
1799 stats->tx_dropped += agg->skb_num;
1801 spin_lock_irqsave(&tp->tx_lock, flags);
1802 list_add_tail(&agg->list, &tp->tx_free);
1803 spin_unlock_irqrestore(&tp->tx_lock, flags);
1809 static void bottom_half(struct r8152 *tp)
1811 if (test_bit(RTL8152_UNPLUG, &tp->flags))
1814 if (!test_bit(WORK_ENABLE, &tp->flags))
1817 /* When link down, the driver would cancel all bulks. */
1818 /* This avoid the re-submitting bulk */
1819 if (!netif_carrier_ok(tp->netdev))
1822 clear_bit(SCHEDULE_NAPI, &tp->flags);
1827 static int r8152_poll(struct napi_struct *napi, int budget)
1829 struct r8152 *tp = container_of(napi, struct r8152, napi);
1832 work_done = rx_bottom(tp, budget);
1835 if (work_done < budget) {
1836 napi_complete(napi);
1837 if (!list_empty(&tp->rx_done))
1838 napi_schedule(napi);
1845 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1849 /* The rx would be stopped, so skip submitting */
1850 if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1851 !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1854 usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1855 agg->head, agg_buf_sz,
1856 (usb_complete_t)read_bulk_callback, agg);
1858 ret = usb_submit_urb(agg->urb, mem_flags);
1859 if (ret == -ENODEV) {
1860 set_bit(RTL8152_UNPLUG, &tp->flags);
1861 netif_device_detach(tp->netdev);
1863 struct urb *urb = agg->urb;
1864 unsigned long flags;
1866 urb->actual_length = 0;
1867 spin_lock_irqsave(&tp->rx_lock, flags);
1868 list_add_tail(&agg->list, &tp->rx_done);
1869 spin_unlock_irqrestore(&tp->rx_lock, flags);
1871 netif_err(tp, rx_err, tp->netdev,
1872 "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1874 napi_schedule(&tp->napi);
1880 static void rtl_drop_queued_tx(struct r8152 *tp)
1882 struct net_device_stats *stats = &tp->netdev->stats;
1883 struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1884 struct sk_buff *skb;
1886 if (skb_queue_empty(tx_queue))
1889 __skb_queue_head_init(&skb_head);
1890 spin_lock_bh(&tx_queue->lock);
1891 skb_queue_splice_init(tx_queue, &skb_head);
1892 spin_unlock_bh(&tx_queue->lock);
1894 while ((skb = __skb_dequeue(&skb_head))) {
1896 stats->tx_dropped++;
1900 static void rtl8152_tx_timeout(struct net_device *netdev)
1902 struct r8152 *tp = netdev_priv(netdev);
1905 netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1906 for (i = 0; i < RTL8152_MAX_TX; i++)
1907 usb_unlink_urb(tp->tx_info[i].urb);
1910 static void rtl8152_set_rx_mode(struct net_device *netdev)
1912 struct r8152 *tp = netdev_priv(netdev);
1914 if (netif_carrier_ok(netdev)) {
1915 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1916 schedule_delayed_work(&tp->schedule, 0);
1920 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1922 struct r8152 *tp = netdev_priv(netdev);
1923 u32 mc_filter[2]; /* Multicast hash filter */
1927 clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1928 netif_stop_queue(netdev);
1929 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1930 ocp_data &= ~RCR_ACPT_ALL;
1931 ocp_data |= RCR_AB | RCR_APM;
1933 if (netdev->flags & IFF_PROMISC) {
1934 /* Unconditionally log net taps. */
1935 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1936 ocp_data |= RCR_AM | RCR_AAP;
1937 mc_filter[1] = 0xffffffff;
1938 mc_filter[0] = 0xffffffff;
1939 } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1940 (netdev->flags & IFF_ALLMULTI)) {
1941 /* Too many to filter perfectly -- accept all multicasts. */
1943 mc_filter[1] = 0xffffffff;
1944 mc_filter[0] = 0xffffffff;
1946 struct netdev_hw_addr *ha;
1950 netdev_for_each_mc_addr(ha, netdev) {
1951 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1953 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1958 tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1959 tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1961 pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1962 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1963 netif_wake_queue(netdev);
1966 static netdev_features_t
1967 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1968 netdev_features_t features)
1970 u32 mss = skb_shinfo(skb)->gso_size;
1971 int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1972 int offset = skb_transport_offset(skb);
1974 if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1975 features &= ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
1976 else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
1977 features &= ~NETIF_F_GSO_MASK;
1982 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1983 struct net_device *netdev)
1985 struct r8152 *tp = netdev_priv(netdev);
1987 skb_tx_timestamp(skb);
1989 skb_queue_tail(&tp->tx_queue, skb);
1991 if (!list_empty(&tp->tx_free)) {
1992 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
1993 set_bit(SCHEDULE_NAPI, &tp->flags);
1994 schedule_delayed_work(&tp->schedule, 0);
1996 usb_mark_last_busy(tp->udev);
1997 napi_schedule(&tp->napi);
1999 } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2000 netif_stop_queue(netdev);
2003 return NETDEV_TX_OK;
2006 static void r8152b_reset_packet_filter(struct r8152 *tp)
2010 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2011 ocp_data &= ~FMC_FCR_MCU_EN;
2012 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2013 ocp_data |= FMC_FCR_MCU_EN;
2014 ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2017 static void rtl8152_nic_reset(struct r8152 *tp)
2021 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2023 for (i = 0; i < 1000; i++) {
2024 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2026 usleep_range(100, 400);
2030 static void set_tx_qlen(struct r8152 *tp)
2032 struct net_device *netdev = tp->netdev;
2034 tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2035 sizeof(struct tx_desc));
2038 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2040 return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2043 static void rtl_set_eee_plus(struct r8152 *tp)
2048 speed = rtl8152_get_speed(tp);
2049 if (speed & _10bps) {
2050 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2051 ocp_data |= EEEP_CR_EEEP_TX;
2052 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2054 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2055 ocp_data &= ~EEEP_CR_EEEP_TX;
2056 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2060 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2064 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2066 ocp_data |= RXDY_GATED_EN;
2068 ocp_data &= ~RXDY_GATED_EN;
2069 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2072 static int rtl_start_rx(struct r8152 *tp)
2076 napi_disable(&tp->napi);
2077 INIT_LIST_HEAD(&tp->rx_done);
2078 for (i = 0; i < RTL8152_MAX_RX; i++) {
2079 INIT_LIST_HEAD(&tp->rx_info[i].list);
2080 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2084 napi_enable(&tp->napi);
2086 if (ret && ++i < RTL8152_MAX_RX) {
2087 struct list_head rx_queue;
2088 unsigned long flags;
2090 INIT_LIST_HEAD(&rx_queue);
2093 struct rx_agg *agg = &tp->rx_info[i++];
2094 struct urb *urb = agg->urb;
2096 urb->actual_length = 0;
2097 list_add_tail(&agg->list, &rx_queue);
2098 } while (i < RTL8152_MAX_RX);
2100 spin_lock_irqsave(&tp->rx_lock, flags);
2101 list_splice_tail(&rx_queue, &tp->rx_done);
2102 spin_unlock_irqrestore(&tp->rx_lock, flags);
2108 static int rtl_stop_rx(struct r8152 *tp)
2112 for (i = 0; i < RTL8152_MAX_RX; i++)
2113 usb_kill_urb(tp->rx_info[i].urb);
2115 while (!skb_queue_empty(&tp->rx_queue))
2116 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2121 static int rtl_enable(struct r8152 *tp)
2125 r8152b_reset_packet_filter(tp);
2127 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2128 ocp_data |= CR_RE | CR_TE;
2129 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2131 rxdy_gated_en(tp, false);
2136 static int rtl8152_enable(struct r8152 *tp)
2138 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2142 rtl_set_eee_plus(tp);
2144 return rtl_enable(tp);
2147 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2149 u32 ocp_data = tp->coalesce / 8;
2151 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2154 static void r8153_set_rx_early_size(struct r8152 *tp)
2156 u32 mtu = tp->netdev->mtu;
2157 u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
2159 ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2162 static int rtl8153_enable(struct r8152 *tp)
2164 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2168 rtl_set_eee_plus(tp);
2169 r8153_set_rx_early_timeout(tp);
2170 r8153_set_rx_early_size(tp);
2172 return rtl_enable(tp);
2175 static void rtl_disable(struct r8152 *tp)
2180 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2181 rtl_drop_queued_tx(tp);
2185 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2186 ocp_data &= ~RCR_ACPT_ALL;
2187 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2189 rtl_drop_queued_tx(tp);
2191 for (i = 0; i < RTL8152_MAX_TX; i++)
2192 usb_kill_urb(tp->tx_info[i].urb);
2194 rxdy_gated_en(tp, true);
2196 for (i = 0; i < 1000; i++) {
2197 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2198 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2200 usleep_range(1000, 2000);
2203 for (i = 0; i < 1000; i++) {
2204 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2206 usleep_range(1000, 2000);
2211 rtl8152_nic_reset(tp);
2214 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2218 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2220 ocp_data |= POWER_CUT;
2222 ocp_data &= ~POWER_CUT;
2223 ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2225 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2226 ocp_data &= ~RESUME_INDICATE;
2227 ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2230 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2234 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2236 ocp_data |= CPCR_RX_VLAN;
2238 ocp_data &= ~CPCR_RX_VLAN;
2239 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2242 static int rtl8152_set_features(struct net_device *dev,
2243 netdev_features_t features)
2245 netdev_features_t changed = features ^ dev->features;
2246 struct r8152 *tp = netdev_priv(dev);
2249 ret = usb_autopm_get_interface(tp->intf);
2253 mutex_lock(&tp->control);
2255 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2256 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2257 rtl_rx_vlan_en(tp, true);
2259 rtl_rx_vlan_en(tp, false);
2262 mutex_unlock(&tp->control);
2264 usb_autopm_put_interface(tp->intf);
2270 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2272 static u32 __rtl_get_wol(struct r8152 *tp)
2277 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2278 if (!(ocp_data & LAN_WAKE_EN))
2281 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2282 if (ocp_data & LINK_ON_WAKE_EN)
2283 wolopts |= WAKE_PHY;
2285 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2286 if (ocp_data & UWF_EN)
2287 wolopts |= WAKE_UCAST;
2288 if (ocp_data & BWF_EN)
2289 wolopts |= WAKE_BCAST;
2290 if (ocp_data & MWF_EN)
2291 wolopts |= WAKE_MCAST;
2293 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2294 if (ocp_data & MAGIC_EN)
2295 wolopts |= WAKE_MAGIC;
2300 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2304 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2306 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2307 ocp_data &= ~LINK_ON_WAKE_EN;
2308 if (wolopts & WAKE_PHY)
2309 ocp_data |= LINK_ON_WAKE_EN;
2310 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2312 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2313 ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2314 if (wolopts & WAKE_UCAST)
2316 if (wolopts & WAKE_BCAST)
2318 if (wolopts & WAKE_MCAST)
2320 if (wolopts & WAKE_ANY)
2321 ocp_data |= LAN_WAKE_EN;
2322 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2324 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2326 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2327 ocp_data &= ~MAGIC_EN;
2328 if (wolopts & WAKE_MAGIC)
2329 ocp_data |= MAGIC_EN;
2330 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2332 if (wolopts & WAKE_ANY)
2333 device_set_wakeup_enable(&tp->udev->dev, true);
2335 device_set_wakeup_enable(&tp->udev->dev, false);
2338 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2343 __rtl_set_wol(tp, WAKE_ANY);
2345 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2347 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2348 ocp_data |= LINK_OFF_WAKE_EN;
2349 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2351 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2353 __rtl_set_wol(tp, tp->saved_wolopts);
2357 static void rtl_phy_reset(struct r8152 *tp)
2362 clear_bit(PHY_RESET, &tp->flags);
2364 data = r8152_mdio_read(tp, MII_BMCR);
2366 /* don't reset again before the previous one complete */
2367 if (data & BMCR_RESET)
2371 r8152_mdio_write(tp, MII_BMCR, data);
2373 for (i = 0; i < 50; i++) {
2375 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2380 static void r8153_teredo_off(struct r8152 *tp)
2384 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2385 ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2386 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2388 ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2389 ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2390 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2393 static void r8152b_disable_aldps(struct r8152 *tp)
2395 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2399 static inline void r8152b_enable_aldps(struct r8152 *tp)
2401 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2402 LINKENA | DIS_SDSAVE);
2405 static void rtl8152_disable(struct r8152 *tp)
2407 r8152b_disable_aldps(tp);
2409 r8152b_enable_aldps(tp);
2412 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2416 data = r8152_mdio_read(tp, MII_BMCR);
2417 if (data & BMCR_PDOWN) {
2418 data &= ~BMCR_PDOWN;
2419 r8152_mdio_write(tp, MII_BMCR, data);
2422 set_bit(PHY_RESET, &tp->flags);
2425 static void r8152b_exit_oob(struct r8152 *tp)
2430 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2431 ocp_data &= ~RCR_ACPT_ALL;
2432 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2434 rxdy_gated_en(tp, true);
2435 r8153_teredo_off(tp);
2436 r8152b_hw_phy_cfg(tp);
2438 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2439 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2441 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2442 ocp_data &= ~NOW_IS_OOB;
2443 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2445 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2446 ocp_data &= ~MCU_BORW_EN;
2447 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2449 for (i = 0; i < 1000; i++) {
2450 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2451 if (ocp_data & LINK_LIST_READY)
2453 usleep_range(1000, 2000);
2456 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2457 ocp_data |= RE_INIT_LL;
2458 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2460 for (i = 0; i < 1000; i++) {
2461 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2462 if (ocp_data & LINK_LIST_READY)
2464 usleep_range(1000, 2000);
2467 rtl8152_nic_reset(tp);
2469 /* rx share fifo credit full threshold */
2470 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2472 if (tp->udev->speed == USB_SPEED_FULL ||
2473 tp->udev->speed == USB_SPEED_LOW) {
2474 /* rx share fifo credit near full threshold */
2475 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2477 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2480 /* rx share fifo credit near full threshold */
2481 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2483 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2487 /* TX share fifo free credit full threshold */
2488 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2490 ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2491 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2492 ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2493 TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2495 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2497 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2499 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2500 ocp_data |= TCR0_AUTO_FIFO;
2501 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2504 static void r8152b_enter_oob(struct r8152 *tp)
2509 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2510 ocp_data &= ~NOW_IS_OOB;
2511 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2513 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2514 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2515 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2519 for (i = 0; i < 1000; i++) {
2520 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2521 if (ocp_data & LINK_LIST_READY)
2523 usleep_range(1000, 2000);
2526 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2527 ocp_data |= RE_INIT_LL;
2528 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2530 for (i = 0; i < 1000; i++) {
2531 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2532 if (ocp_data & LINK_LIST_READY)
2534 usleep_range(1000, 2000);
2537 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2539 rtl_rx_vlan_en(tp, true);
2541 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2542 ocp_data |= ALDPS_PROXY_MODE;
2543 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2545 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2546 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2547 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2549 rxdy_gated_en(tp, false);
2551 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2552 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2553 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2556 static void r8153_hw_phy_cfg(struct r8152 *tp)
2561 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2562 data = r8152_mdio_read(tp, MII_BMCR);
2563 if (data & BMCR_PDOWN) {
2564 data &= ~BMCR_PDOWN;
2565 r8152_mdio_write(tp, MII_BMCR, data);
2568 if (tp->version == RTL_VER_03) {
2569 data = ocp_reg_read(tp, OCP_EEE_CFG);
2570 data &= ~CTAP_SHORT_EN;
2571 ocp_reg_write(tp, OCP_EEE_CFG, data);
2574 data = ocp_reg_read(tp, OCP_POWER_CFG);
2575 data |= EEE_CLKDIV_EN;
2576 ocp_reg_write(tp, OCP_POWER_CFG, data);
2578 data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2579 data |= EN_10M_BGOFF;
2580 ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2581 data = ocp_reg_read(tp, OCP_POWER_CFG);
2582 data |= EN_10M_PLLOFF;
2583 ocp_reg_write(tp, OCP_POWER_CFG, data);
2584 sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2586 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2587 ocp_data |= PFM_PWM_SWITCH;
2588 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2590 /* Enable LPF corner auto tune */
2591 sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2593 /* Adjust 10M Amplitude */
2594 sram_write(tp, SRAM_10M_AMP1, 0x00af);
2595 sram_write(tp, SRAM_10M_AMP2, 0x0208);
2597 set_bit(PHY_RESET, &tp->flags);
2600 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2605 memset(u1u2, 0xff, sizeof(u1u2));
2607 memset(u1u2, 0x00, sizeof(u1u2));
2609 usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2612 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2616 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2618 ocp_data |= U2P3_ENABLE;
2620 ocp_data &= ~U2P3_ENABLE;
2621 ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2624 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2628 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2630 ocp_data |= PWR_EN | PHASE2_EN;
2632 ocp_data &= ~(PWR_EN | PHASE2_EN);
2633 ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2635 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2636 ocp_data &= ~PCUT_STATUS;
2637 ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2640 static void r8153_first_init(struct r8152 *tp)
2645 rxdy_gated_en(tp, true);
2646 r8153_teredo_off(tp);
2648 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2649 ocp_data &= ~RCR_ACPT_ALL;
2650 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2652 r8153_hw_phy_cfg(tp);
2654 rtl8152_nic_reset(tp);
2656 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2657 ocp_data &= ~NOW_IS_OOB;
2658 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2660 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2661 ocp_data &= ~MCU_BORW_EN;
2662 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2664 for (i = 0; i < 1000; i++) {
2665 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2666 if (ocp_data & LINK_LIST_READY)
2668 usleep_range(1000, 2000);
2671 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2672 ocp_data |= RE_INIT_LL;
2673 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2675 for (i = 0; i < 1000; i++) {
2676 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2677 if (ocp_data & LINK_LIST_READY)
2679 usleep_range(1000, 2000);
2682 rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2684 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2685 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2687 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2688 ocp_data |= TCR0_AUTO_FIFO;
2689 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2691 rtl8152_nic_reset(tp);
2693 /* rx share fifo credit full threshold */
2694 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2695 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2696 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2697 /* TX share fifo free credit full threshold */
2698 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2700 /* rx aggregation */
2701 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2702 ocp_data &= ~RX_AGG_DISABLE;
2703 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2706 static void r8153_enter_oob(struct r8152 *tp)
2711 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2712 ocp_data &= ~NOW_IS_OOB;
2713 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2717 for (i = 0; i < 1000; i++) {
2718 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2719 if (ocp_data & LINK_LIST_READY)
2721 usleep_range(1000, 2000);
2724 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2725 ocp_data |= RE_INIT_LL;
2726 ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2728 for (i = 0; i < 1000; i++) {
2729 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2730 if (ocp_data & LINK_LIST_READY)
2732 usleep_range(1000, 2000);
2735 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2737 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2738 ocp_data &= ~TEREDO_WAKE_MASK;
2739 ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2741 rtl_rx_vlan_en(tp, true);
2743 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2744 ocp_data |= ALDPS_PROXY_MODE;
2745 ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2747 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2748 ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2749 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2751 rxdy_gated_en(tp, false);
2753 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2754 ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2755 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2758 static void r8153_disable_aldps(struct r8152 *tp)
2762 data = ocp_reg_read(tp, OCP_POWER_CFG);
2764 ocp_reg_write(tp, OCP_POWER_CFG, data);
2768 static void r8153_enable_aldps(struct r8152 *tp)
2772 data = ocp_reg_read(tp, OCP_POWER_CFG);
2774 ocp_reg_write(tp, OCP_POWER_CFG, data);
2777 static void rtl8153_disable(struct r8152 *tp)
2779 r8153_disable_aldps(tp);
2781 r8153_enable_aldps(tp);
2784 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2786 u16 bmcr, anar, gbcr;
2789 cancel_delayed_work_sync(&tp->schedule);
2790 anar = r8152_mdio_read(tp, MII_ADVERTISE);
2791 anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2792 ADVERTISE_100HALF | ADVERTISE_100FULL);
2793 if (tp->mii.supports_gmii) {
2794 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2795 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2800 if (autoneg == AUTONEG_DISABLE) {
2801 if (speed == SPEED_10) {
2803 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2804 } else if (speed == SPEED_100) {
2805 bmcr = BMCR_SPEED100;
2806 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2807 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2808 bmcr = BMCR_SPEED1000;
2809 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2815 if (duplex == DUPLEX_FULL)
2816 bmcr |= BMCR_FULLDPLX;
2818 if (speed == SPEED_10) {
2819 if (duplex == DUPLEX_FULL)
2820 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2822 anar |= ADVERTISE_10HALF;
2823 } else if (speed == SPEED_100) {
2824 if (duplex == DUPLEX_FULL) {
2825 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2826 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2828 anar |= ADVERTISE_10HALF;
2829 anar |= ADVERTISE_100HALF;
2831 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2832 if (duplex == DUPLEX_FULL) {
2833 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2834 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2835 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2837 anar |= ADVERTISE_10HALF;
2838 anar |= ADVERTISE_100HALF;
2839 gbcr |= ADVERTISE_1000HALF;
2846 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2849 if (test_bit(PHY_RESET, &tp->flags))
2852 if (tp->mii.supports_gmii)
2853 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2855 r8152_mdio_write(tp, MII_ADVERTISE, anar);
2856 r8152_mdio_write(tp, MII_BMCR, bmcr);
2858 if (test_bit(PHY_RESET, &tp->flags)) {
2861 clear_bit(PHY_RESET, &tp->flags);
2862 for (i = 0; i < 50; i++) {
2864 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2874 static void rtl8152_up(struct r8152 *tp)
2876 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2879 r8152b_disable_aldps(tp);
2880 r8152b_exit_oob(tp);
2881 r8152b_enable_aldps(tp);
2884 static void rtl8152_down(struct r8152 *tp)
2886 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2887 rtl_drop_queued_tx(tp);
2891 r8152_power_cut_en(tp, false);
2892 r8152b_disable_aldps(tp);
2893 r8152b_enter_oob(tp);
2894 r8152b_enable_aldps(tp);
2897 static void rtl8153_up(struct r8152 *tp)
2899 if (test_bit(RTL8152_UNPLUG, &tp->flags))
2902 r8153_disable_aldps(tp);
2903 r8153_first_init(tp);
2904 r8153_enable_aldps(tp);
2907 static void rtl8153_down(struct r8152 *tp)
2909 if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2910 rtl_drop_queued_tx(tp);
2914 r8153_u1u2en(tp, false);
2915 r8153_power_cut_en(tp, false);
2916 r8153_disable_aldps(tp);
2917 r8153_enter_oob(tp);
2918 r8153_enable_aldps(tp);
2921 static void set_carrier(struct r8152 *tp)
2923 struct net_device *netdev = tp->netdev;
2926 clear_bit(RTL8152_LINK_CHG, &tp->flags);
2927 speed = rtl8152_get_speed(tp);
2929 if (speed & LINK_STATUS) {
2930 if (!netif_carrier_ok(netdev)) {
2931 tp->rtl_ops.enable(tp);
2932 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2933 netif_carrier_on(netdev);
2937 if (netif_carrier_ok(netdev)) {
2938 netif_carrier_off(netdev);
2939 napi_disable(&tp->napi);
2940 tp->rtl_ops.disable(tp);
2941 napi_enable(&tp->napi);
2946 static void rtl_work_func_t(struct work_struct *work)
2948 struct r8152 *tp = container_of(work, struct r8152, schedule.work);
2950 /* If the device is unplugged or !netif_running(), the workqueue
2951 * doesn't need to wake the device, and could return directly.
2953 if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
2956 if (usb_autopm_get_interface(tp->intf) < 0)
2959 if (!test_bit(WORK_ENABLE, &tp->flags))
2962 if (!mutex_trylock(&tp->control)) {
2963 schedule_delayed_work(&tp->schedule, 0);
2967 if (test_bit(RTL8152_LINK_CHG, &tp->flags))
2970 if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
2971 _rtl8152_set_rx_mode(tp->netdev);
2973 /* don't schedule napi before linking */
2974 if (test_bit(SCHEDULE_NAPI, &tp->flags) &&
2975 netif_carrier_ok(tp->netdev)) {
2976 clear_bit(SCHEDULE_NAPI, &tp->flags);
2977 napi_schedule(&tp->napi);
2980 if (test_bit(PHY_RESET, &tp->flags))
2983 mutex_unlock(&tp->control);
2986 usb_autopm_put_interface(tp->intf);
2989 static int rtl8152_open(struct net_device *netdev)
2991 struct r8152 *tp = netdev_priv(netdev);
2994 res = alloc_all_mem(tp);
2998 netif_carrier_off(netdev);
3000 res = usb_autopm_get_interface(tp->intf);
3006 mutex_lock(&tp->control);
3008 /* The WORK_ENABLE may be set when autoresume occurs */
3009 if (test_bit(WORK_ENABLE, &tp->flags)) {
3010 clear_bit(WORK_ENABLE, &tp->flags);
3011 usb_kill_urb(tp->intr_urb);
3012 cancel_delayed_work_sync(&tp->schedule);
3014 /* disable the tx/rx, if the workqueue has enabled them. */
3015 if (netif_carrier_ok(netdev))
3016 tp->rtl_ops.disable(tp);
3021 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3022 tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3024 netif_carrier_off(netdev);
3025 netif_start_queue(netdev);
3026 set_bit(WORK_ENABLE, &tp->flags);
3028 res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3031 netif_device_detach(tp->netdev);
3032 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3036 napi_enable(&tp->napi);
3039 mutex_unlock(&tp->control);
3041 usb_autopm_put_interface(tp->intf);
3047 static int rtl8152_close(struct net_device *netdev)
3049 struct r8152 *tp = netdev_priv(netdev);
3052 napi_disable(&tp->napi);
3053 clear_bit(WORK_ENABLE, &tp->flags);
3054 usb_kill_urb(tp->intr_urb);
3055 cancel_delayed_work_sync(&tp->schedule);
3056 netif_stop_queue(netdev);
3058 res = usb_autopm_get_interface(tp->intf);
3059 if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3060 rtl_drop_queued_tx(tp);
3063 mutex_lock(&tp->control);
3065 /* The autosuspend may have been enabled and wouldn't
3066 * be disable when autoresume occurs, because the
3067 * netif_running() would be false.
3069 rtl_runtime_suspend_enable(tp, false);
3071 tp->rtl_ops.down(tp);
3073 mutex_unlock(&tp->control);
3075 usb_autopm_put_interface(tp->intf);
3083 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3085 ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3086 ocp_reg_write(tp, OCP_EEE_DATA, reg);
3087 ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3090 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3094 r8152_mmd_indirect(tp, dev, reg);
3095 data = ocp_reg_read(tp, OCP_EEE_DATA);
3096 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3101 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3103 r8152_mmd_indirect(tp, dev, reg);
3104 ocp_reg_write(tp, OCP_EEE_DATA, data);
3105 ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3108 static void r8152_eee_en(struct r8152 *tp, bool enable)
3110 u16 config1, config2, config3;
3113 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3114 config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3115 config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3116 config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3119 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3120 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3121 config1 |= sd_rise_time(1);
3122 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3123 config3 |= fast_snr(42);
3125 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3126 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3128 config1 |= sd_rise_time(7);
3129 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3130 config3 |= fast_snr(511);
3133 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3134 ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3135 ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3136 ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3139 static void r8152b_enable_eee(struct r8152 *tp)
3141 r8152_eee_en(tp, true);
3142 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3145 static void r8153_eee_en(struct r8152 *tp, bool enable)
3150 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3151 config = ocp_reg_read(tp, OCP_EEE_CFG);
3154 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3157 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3158 config &= ~EEE10_EN;
3161 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3162 ocp_reg_write(tp, OCP_EEE_CFG, config);
3165 static void r8153_enable_eee(struct r8152 *tp)
3167 r8153_eee_en(tp, true);
3168 ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3171 static void r8152b_enable_fc(struct r8152 *tp)
3175 anar = r8152_mdio_read(tp, MII_ADVERTISE);
3176 anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3177 r8152_mdio_write(tp, MII_ADVERTISE, anar);
3180 static void rtl_tally_reset(struct r8152 *tp)
3184 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3185 ocp_data |= TALLY_RESET;
3186 ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3189 static void r8152b_init(struct r8152 *tp)
3193 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3196 r8152b_disable_aldps(tp);
3198 if (tp->version == RTL_VER_01) {
3199 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3200 ocp_data &= ~LED_MODE_MASK;
3201 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3204 r8152_power_cut_en(tp, false);
3206 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3207 ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3208 ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3209 ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3210 ocp_data &= ~MCU_CLK_RATIO_MASK;
3211 ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3212 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3213 ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3214 SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3215 ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3217 r8152b_enable_eee(tp);
3218 r8152b_enable_aldps(tp);
3219 r8152b_enable_fc(tp);
3220 rtl_tally_reset(tp);
3222 /* enable rx aggregation */
3223 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3224 ocp_data &= ~RX_AGG_DISABLE;
3225 ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3228 static void r8153_init(struct r8152 *tp)
3233 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3236 r8153_disable_aldps(tp);
3237 r8153_u1u2en(tp, false);
3239 for (i = 0; i < 500; i++) {
3240 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3246 for (i = 0; i < 500; i++) {
3247 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3248 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3253 r8153_u2p3en(tp, false);
3255 if (tp->version == RTL_VER_04) {
3256 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3257 ocp_data &= ~pwd_dn_scale_mask;
3258 ocp_data |= pwd_dn_scale(96);
3259 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3261 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3262 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3263 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3264 } else if (tp->version == RTL_VER_05) {
3265 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3266 ocp_data &= ~ECM_ALDPS;
3267 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3269 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3270 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3271 ocp_data &= ~DYNAMIC_BURST;
3273 ocp_data |= DYNAMIC_BURST;
3274 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3277 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3278 ocp_data |= EP4_FULL_FC;
3279 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3281 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3282 ocp_data &= ~TIMER11_EN;
3283 ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3285 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3286 ocp_data &= ~LED_MODE_MASK;
3287 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3289 ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3290 if (tp->version == RTL_VER_04 && tp->udev->speed != USB_SPEED_SUPER)
3291 ocp_data |= LPM_TIMER_500MS;
3293 ocp_data |= LPM_TIMER_500US;
3294 ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3296 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3297 ocp_data &= ~SEN_VAL_MASK;
3298 ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3299 ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3301 ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3303 r8153_power_cut_en(tp, false);
3304 r8153_u1u2en(tp, true);
3306 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3307 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3308 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3309 PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3310 U1U2_SPDWN_EN | L1_SPDWN_EN);
3311 ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3312 PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3313 TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3316 r8153_enable_eee(tp);
3317 r8153_enable_aldps(tp);
3318 r8152b_enable_fc(tp);
3319 rtl_tally_reset(tp);
3322 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3324 struct r8152 *tp = usb_get_intfdata(intf);
3325 struct net_device *netdev = tp->netdev;
3328 mutex_lock(&tp->control);
3330 if (PMSG_IS_AUTO(message)) {
3331 if (netif_running(netdev) && work_busy(&tp->schedule.work)) {
3336 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3338 netif_device_detach(netdev);
3341 if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3342 clear_bit(WORK_ENABLE, &tp->flags);
3343 usb_kill_urb(tp->intr_urb);
3344 napi_disable(&tp->napi);
3345 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3347 rtl_runtime_suspend_enable(tp, true);
3349 cancel_delayed_work_sync(&tp->schedule);
3350 tp->rtl_ops.down(tp);
3352 napi_enable(&tp->napi);
3355 mutex_unlock(&tp->control);
3360 static int rtl8152_resume(struct usb_interface *intf)
3362 struct r8152 *tp = usb_get_intfdata(intf);
3364 mutex_lock(&tp->control);
3366 if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3367 tp->rtl_ops.init(tp);
3368 netif_device_attach(tp->netdev);
3371 if (netif_running(tp->netdev)) {
3372 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3373 rtl_runtime_suspend_enable(tp, false);
3374 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3375 set_bit(WORK_ENABLE, &tp->flags);
3376 if (netif_carrier_ok(tp->netdev))
3380 rtl8152_set_speed(tp, AUTONEG_ENABLE,
3381 tp->mii.supports_gmii ?
3382 SPEED_1000 : SPEED_100,
3384 netif_carrier_off(tp->netdev);
3385 set_bit(WORK_ENABLE, &tp->flags);
3387 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3388 } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3389 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3392 mutex_unlock(&tp->control);
3397 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3399 struct r8152 *tp = netdev_priv(dev);
3401 if (usb_autopm_get_interface(tp->intf) < 0)
3404 mutex_lock(&tp->control);
3406 wol->supported = WAKE_ANY;
3407 wol->wolopts = __rtl_get_wol(tp);
3409 mutex_unlock(&tp->control);
3411 usb_autopm_put_interface(tp->intf);
3414 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3416 struct r8152 *tp = netdev_priv(dev);
3419 ret = usb_autopm_get_interface(tp->intf);
3423 mutex_lock(&tp->control);
3425 __rtl_set_wol(tp, wol->wolopts);
3426 tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3428 mutex_unlock(&tp->control);
3430 usb_autopm_put_interface(tp->intf);
3436 static u32 rtl8152_get_msglevel(struct net_device *dev)
3438 struct r8152 *tp = netdev_priv(dev);
3440 return tp->msg_enable;
3443 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3445 struct r8152 *tp = netdev_priv(dev);
3447 tp->msg_enable = value;
3450 static void rtl8152_get_drvinfo(struct net_device *netdev,
3451 struct ethtool_drvinfo *info)
3453 struct r8152 *tp = netdev_priv(netdev);
3455 strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3456 strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3457 usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3461 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3463 struct r8152 *tp = netdev_priv(netdev);
3466 if (!tp->mii.mdio_read)
3469 ret = usb_autopm_get_interface(tp->intf);
3473 mutex_lock(&tp->control);
3475 ret = mii_ethtool_gset(&tp->mii, cmd);
3477 mutex_unlock(&tp->control);
3479 usb_autopm_put_interface(tp->intf);
3485 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3487 struct r8152 *tp = netdev_priv(dev);
3490 ret = usb_autopm_get_interface(tp->intf);
3494 mutex_lock(&tp->control);
3496 ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3498 mutex_unlock(&tp->control);
3500 usb_autopm_put_interface(tp->intf);
3506 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3513 "tx_single_collisions",
3514 "tx_multi_collisions",
3522 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3526 return ARRAY_SIZE(rtl8152_gstrings);
3532 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3533 struct ethtool_stats *stats, u64 *data)
3535 struct r8152 *tp = netdev_priv(dev);
3536 struct tally_counter tally;
3538 if (usb_autopm_get_interface(tp->intf) < 0)
3541 generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3543 usb_autopm_put_interface(tp->intf);
3545 data[0] = le64_to_cpu(tally.tx_packets);
3546 data[1] = le64_to_cpu(tally.rx_packets);
3547 data[2] = le64_to_cpu(tally.tx_errors);
3548 data[3] = le32_to_cpu(tally.rx_errors);
3549 data[4] = le16_to_cpu(tally.rx_missed);
3550 data[5] = le16_to_cpu(tally.align_errors);
3551 data[6] = le32_to_cpu(tally.tx_one_collision);
3552 data[7] = le32_to_cpu(tally.tx_multi_collision);
3553 data[8] = le64_to_cpu(tally.rx_unicast);
3554 data[9] = le64_to_cpu(tally.rx_broadcast);
3555 data[10] = le32_to_cpu(tally.rx_multicast);
3556 data[11] = le16_to_cpu(tally.tx_aborted);
3557 data[12] = le16_to_cpu(tally.tx_underrun);
3560 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3562 switch (stringset) {
3564 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3569 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3571 u32 ocp_data, lp, adv, supported = 0;
3574 val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3575 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3577 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3578 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3580 val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3581 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3583 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3584 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3586 eee->eee_enabled = !!ocp_data;
3587 eee->eee_active = !!(supported & adv & lp);
3588 eee->supported = supported;
3589 eee->advertised = adv;
3590 eee->lp_advertised = lp;
3595 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3597 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3599 r8152_eee_en(tp, eee->eee_enabled);
3601 if (!eee->eee_enabled)
3604 r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3609 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3611 u32 ocp_data, lp, adv, supported = 0;
3614 val = ocp_reg_read(tp, OCP_EEE_ABLE);
3615 supported = mmd_eee_cap_to_ethtool_sup_t(val);
3617 val = ocp_reg_read(tp, OCP_EEE_ADV);
3618 adv = mmd_eee_adv_to_ethtool_adv_t(val);
3620 val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3621 lp = mmd_eee_adv_to_ethtool_adv_t(val);
3623 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3624 ocp_data &= EEE_RX_EN | EEE_TX_EN;
3626 eee->eee_enabled = !!ocp_data;
3627 eee->eee_active = !!(supported & adv & lp);
3628 eee->supported = supported;
3629 eee->advertised = adv;
3630 eee->lp_advertised = lp;
3635 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3637 u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3639 r8153_eee_en(tp, eee->eee_enabled);
3641 if (!eee->eee_enabled)
3644 ocp_reg_write(tp, OCP_EEE_ADV, val);
3650 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3652 struct r8152 *tp = netdev_priv(net);
3655 ret = usb_autopm_get_interface(tp->intf);
3659 mutex_lock(&tp->control);
3661 ret = tp->rtl_ops.eee_get(tp, edata);
3663 mutex_unlock(&tp->control);
3665 usb_autopm_put_interface(tp->intf);
3672 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3674 struct r8152 *tp = netdev_priv(net);
3677 ret = usb_autopm_get_interface(tp->intf);
3681 mutex_lock(&tp->control);
3683 ret = tp->rtl_ops.eee_set(tp, edata);
3685 ret = mii_nway_restart(&tp->mii);
3687 mutex_unlock(&tp->control);
3689 usb_autopm_put_interface(tp->intf);
3695 static int rtl8152_nway_reset(struct net_device *dev)
3697 struct r8152 *tp = netdev_priv(dev);
3700 ret = usb_autopm_get_interface(tp->intf);
3704 mutex_lock(&tp->control);
3706 ret = mii_nway_restart(&tp->mii);
3708 mutex_unlock(&tp->control);
3710 usb_autopm_put_interface(tp->intf);
3716 static int rtl8152_get_coalesce(struct net_device *netdev,
3717 struct ethtool_coalesce *coalesce)
3719 struct r8152 *tp = netdev_priv(netdev);
3721 switch (tp->version) {
3729 coalesce->rx_coalesce_usecs = tp->coalesce;
3734 static int rtl8152_set_coalesce(struct net_device *netdev,
3735 struct ethtool_coalesce *coalesce)
3737 struct r8152 *tp = netdev_priv(netdev);
3740 switch (tp->version) {
3748 if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
3751 ret = usb_autopm_get_interface(tp->intf);
3755 mutex_lock(&tp->control);
3757 if (tp->coalesce != coalesce->rx_coalesce_usecs) {
3758 tp->coalesce = coalesce->rx_coalesce_usecs;
3760 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
3761 r8153_set_rx_early_timeout(tp);
3764 mutex_unlock(&tp->control);
3766 usb_autopm_put_interface(tp->intf);
3771 static struct ethtool_ops ops = {
3772 .get_drvinfo = rtl8152_get_drvinfo,
3773 .get_settings = rtl8152_get_settings,
3774 .set_settings = rtl8152_set_settings,
3775 .get_link = ethtool_op_get_link,
3776 .nway_reset = rtl8152_nway_reset,
3777 .get_msglevel = rtl8152_get_msglevel,
3778 .set_msglevel = rtl8152_set_msglevel,
3779 .get_wol = rtl8152_get_wol,
3780 .set_wol = rtl8152_set_wol,
3781 .get_strings = rtl8152_get_strings,
3782 .get_sset_count = rtl8152_get_sset_count,
3783 .get_ethtool_stats = rtl8152_get_ethtool_stats,
3784 .get_coalesce = rtl8152_get_coalesce,
3785 .set_coalesce = rtl8152_set_coalesce,
3786 .get_eee = rtl_ethtool_get_eee,
3787 .set_eee = rtl_ethtool_set_eee,
3790 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3792 struct r8152 *tp = netdev_priv(netdev);
3793 struct mii_ioctl_data *data = if_mii(rq);
3796 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3799 res = usb_autopm_get_interface(tp->intf);
3805 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3809 mutex_lock(&tp->control);
3810 data->val_out = r8152_mdio_read(tp, data->reg_num);
3811 mutex_unlock(&tp->control);
3815 if (!capable(CAP_NET_ADMIN)) {
3819 mutex_lock(&tp->control);
3820 r8152_mdio_write(tp, data->reg_num, data->val_in);
3821 mutex_unlock(&tp->control);
3828 usb_autopm_put_interface(tp->intf);
3834 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3836 struct r8152 *tp = netdev_priv(dev);
3839 switch (tp->version) {
3842 return eth_change_mtu(dev, new_mtu);
3847 if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3850 ret = usb_autopm_get_interface(tp->intf);
3854 mutex_lock(&tp->control);
3858 if (netif_running(dev) && netif_carrier_ok(dev))
3859 r8153_set_rx_early_size(tp);
3861 mutex_unlock(&tp->control);
3863 usb_autopm_put_interface(tp->intf);
3868 static const struct net_device_ops rtl8152_netdev_ops = {
3869 .ndo_open = rtl8152_open,
3870 .ndo_stop = rtl8152_close,
3871 .ndo_do_ioctl = rtl8152_ioctl,
3872 .ndo_start_xmit = rtl8152_start_xmit,
3873 .ndo_tx_timeout = rtl8152_tx_timeout,
3874 .ndo_set_features = rtl8152_set_features,
3875 .ndo_set_rx_mode = rtl8152_set_rx_mode,
3876 .ndo_set_mac_address = rtl8152_set_mac_address,
3877 .ndo_change_mtu = rtl8152_change_mtu,
3878 .ndo_validate_addr = eth_validate_addr,
3879 .ndo_features_check = rtl8152_features_check,
3882 static void r8152b_get_version(struct r8152 *tp)
3887 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
3888 version = (u16)(ocp_data & VERSION_MASK);
3892 tp->version = RTL_VER_01;
3895 tp->version = RTL_VER_02;
3898 tp->version = RTL_VER_03;
3899 tp->mii.supports_gmii = 1;
3902 tp->version = RTL_VER_04;
3903 tp->mii.supports_gmii = 1;
3906 tp->version = RTL_VER_05;
3907 tp->mii.supports_gmii = 1;
3910 netif_info(tp, probe, tp->netdev,
3911 "Unknown version 0x%04x\n", version);
3916 static void rtl8152_unload(struct r8152 *tp)
3918 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3921 if (tp->version != RTL_VER_01)
3922 r8152_power_cut_en(tp, true);
3925 static void rtl8153_unload(struct r8152 *tp)
3927 if (test_bit(RTL8152_UNPLUG, &tp->flags))
3930 r8153_power_cut_en(tp, false);
3933 static int rtl_ops_init(struct r8152 *tp)
3935 struct rtl_ops *ops = &tp->rtl_ops;
3938 switch (tp->version) {
3941 ops->init = r8152b_init;
3942 ops->enable = rtl8152_enable;
3943 ops->disable = rtl8152_disable;
3944 ops->up = rtl8152_up;
3945 ops->down = rtl8152_down;
3946 ops->unload = rtl8152_unload;
3947 ops->eee_get = r8152_get_eee;
3948 ops->eee_set = r8152_set_eee;
3954 ops->init = r8153_init;
3955 ops->enable = rtl8153_enable;
3956 ops->disable = rtl8153_disable;
3957 ops->up = rtl8153_up;
3958 ops->down = rtl8153_down;
3959 ops->unload = rtl8153_unload;
3960 ops->eee_get = r8153_get_eee;
3961 ops->eee_set = r8153_set_eee;
3966 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
3973 static int rtl8152_probe(struct usb_interface *intf,
3974 const struct usb_device_id *id)
3976 struct usb_device *udev = interface_to_usbdev(intf);
3978 struct net_device *netdev;
3981 if (udev->actconfig->desc.bConfigurationValue != 1) {
3982 usb_driver_set_configuration(udev, 1);
3986 usb_reset_device(udev);
3987 netdev = alloc_etherdev(sizeof(struct r8152));
3989 dev_err(&intf->dev, "Out of memory\n");
3993 SET_NETDEV_DEV(netdev, &intf->dev);
3994 tp = netdev_priv(netdev);
3995 tp->msg_enable = 0x7FFF;
3998 tp->netdev = netdev;
4001 r8152b_get_version(tp);
4002 ret = rtl_ops_init(tp);
4006 mutex_init(&tp->control);
4007 INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4009 netdev->netdev_ops = &rtl8152_netdev_ops;
4010 netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4012 netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4013 NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4014 NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4015 NETIF_F_HW_VLAN_CTAG_TX;
4016 netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4017 NETIF_F_TSO | NETIF_F_FRAGLIST |
4018 NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4019 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4020 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4021 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4022 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4024 netdev->ethtool_ops = &ops;
4025 netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4027 tp->mii.dev = netdev;
4028 tp->mii.mdio_read = read_mii_word;
4029 tp->mii.mdio_write = write_mii_word;
4030 tp->mii.phy_id_mask = 0x3f;
4031 tp->mii.reg_num_mask = 0x1f;
4032 tp->mii.phy_id = R8152_PHY_ID;
4034 switch (udev->speed) {
4035 case USB_SPEED_SUPER:
4036 tp->coalesce = COALESCE_SUPER;
4038 case USB_SPEED_HIGH:
4039 tp->coalesce = COALESCE_HIGH;
4042 tp->coalesce = COALESCE_SLOW;
4046 intf->needs_remote_wakeup = 1;
4048 tp->rtl_ops.init(tp);
4049 set_ethernet_addr(tp);
4051 usb_set_intfdata(intf, tp);
4052 netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4054 ret = register_netdev(netdev);
4056 netif_err(tp, probe, netdev, "couldn't register the device\n");
4060 tp->saved_wolopts = __rtl_get_wol(tp);
4061 if (tp->saved_wolopts)
4062 device_set_wakeup_enable(&udev->dev, true);
4064 device_set_wakeup_enable(&udev->dev, false);
4066 netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4071 netif_napi_del(&tp->napi);
4072 usb_set_intfdata(intf, NULL);
4074 free_netdev(netdev);
4078 static void rtl8152_disconnect(struct usb_interface *intf)
4080 struct r8152 *tp = usb_get_intfdata(intf);
4082 usb_set_intfdata(intf, NULL);
4084 struct usb_device *udev = tp->udev;
4086 if (udev->state == USB_STATE_NOTATTACHED)
4087 set_bit(RTL8152_UNPLUG, &tp->flags);
4089 netif_napi_del(&tp->napi);
4090 unregister_netdev(tp->netdev);
4091 tp->rtl_ops.unload(tp);
4092 free_netdev(tp->netdev);
4096 #define REALTEK_USB_DEVICE(vend, prod) \
4097 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4098 USB_DEVICE_ID_MATCH_INT_CLASS, \
4099 .idVendor = (vend), \
4100 .idProduct = (prod), \
4101 .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4104 .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4105 USB_DEVICE_ID_MATCH_DEVICE, \
4106 .idVendor = (vend), \
4107 .idProduct = (prod), \
4108 .bInterfaceClass = USB_CLASS_COMM, \
4109 .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4110 .bInterfaceProtocol = USB_CDC_PROTO_NONE
4112 /* table of devices that work with this driver */
4113 static struct usb_device_id rtl8152_table[] = {
4114 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4115 {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4116 {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4120 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4122 static struct usb_driver rtl8152_driver = {
4124 .id_table = rtl8152_table,
4125 .probe = rtl8152_probe,
4126 .disconnect = rtl8152_disconnect,
4127 .suspend = rtl8152_suspend,
4128 .resume = rtl8152_resume,
4129 .reset_resume = rtl8152_resume,
4130 .supports_autosuspend = 1,
4131 .disable_hub_initiated_lpm = 1,
4134 module_usb_driver(rtl8152_driver);
4136 MODULE_AUTHOR(DRIVER_AUTHOR);
4137 MODULE_DESCRIPTION(DRIVER_DESC);
4138 MODULE_LICENSE("GPL");