r8152: clear LINK_OFF_WAKE_EN after autoresume
[cascardo/linux.git] / drivers / net / usb / r8152.c
1 /*
2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * version 2 as published by the Free Software Foundation.
7  *
8  */
9
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
22 #include <linux/ip.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28 #include <linux/suspend.h>
29
30 /* Information for net-next */
31 #define NETNEXT_VERSION         "08"
32
33 /* Information for net */
34 #define NET_VERSION             "4"
35
36 #define DRIVER_VERSION          "v1." NETNEXT_VERSION "." NET_VERSION
37 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
38 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
39 #define MODULENAME "r8152"
40
41 #define R8152_PHY_ID            32
42
43 #define PLA_IDR                 0xc000
44 #define PLA_RCR                 0xc010
45 #define PLA_RMS                 0xc016
46 #define PLA_RXFIFO_CTRL0        0xc0a0
47 #define PLA_RXFIFO_CTRL1        0xc0a4
48 #define PLA_RXFIFO_CTRL2        0xc0a8
49 #define PLA_DMY_REG0            0xc0b0
50 #define PLA_FMC                 0xc0b4
51 #define PLA_CFG_WOL             0xc0b6
52 #define PLA_TEREDO_CFG          0xc0bc
53 #define PLA_MAR                 0xcd00
54 #define PLA_BACKUP              0xd000
55 #define PAL_BDC_CR              0xd1a0
56 #define PLA_TEREDO_TIMER        0xd2cc
57 #define PLA_REALWOW_TIMER       0xd2e8
58 #define PLA_LEDSEL              0xdd90
59 #define PLA_LED_FEATURE         0xdd92
60 #define PLA_PHYAR               0xde00
61 #define PLA_BOOT_CTRL           0xe004
62 #define PLA_GPHY_INTR_IMR       0xe022
63 #define PLA_EEE_CR              0xe040
64 #define PLA_EEEP_CR             0xe080
65 #define PLA_MAC_PWR_CTRL        0xe0c0
66 #define PLA_MAC_PWR_CTRL2       0xe0ca
67 #define PLA_MAC_PWR_CTRL3       0xe0cc
68 #define PLA_MAC_PWR_CTRL4       0xe0ce
69 #define PLA_WDT6_CTRL           0xe428
70 #define PLA_TCR0                0xe610
71 #define PLA_TCR1                0xe612
72 #define PLA_MTPS                0xe615
73 #define PLA_TXFIFO_CTRL         0xe618
74 #define PLA_RSTTALLY            0xe800
75 #define PLA_CR                  0xe813
76 #define PLA_CRWECR              0xe81c
77 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
78 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
79 #define PLA_CONFIG5             0xe822
80 #define PLA_PHY_PWR             0xe84c
81 #define PLA_OOB_CTRL            0xe84f
82 #define PLA_CPCR                0xe854
83 #define PLA_MISC_0              0xe858
84 #define PLA_MISC_1              0xe85a
85 #define PLA_OCP_GPHY_BASE       0xe86c
86 #define PLA_TALLYCNT            0xe890
87 #define PLA_SFF_STS_7           0xe8de
88 #define PLA_PHYSTATUS           0xe908
89 #define PLA_BP_BA               0xfc26
90 #define PLA_BP_0                0xfc28
91 #define PLA_BP_1                0xfc2a
92 #define PLA_BP_2                0xfc2c
93 #define PLA_BP_3                0xfc2e
94 #define PLA_BP_4                0xfc30
95 #define PLA_BP_5                0xfc32
96 #define PLA_BP_6                0xfc34
97 #define PLA_BP_7                0xfc36
98 #define PLA_BP_EN               0xfc38
99
100 #define USB_USB2PHY             0xb41e
101 #define USB_SSPHYLINK2          0xb428
102 #define USB_U2P3_CTRL           0xb460
103 #define USB_CSR_DUMMY1          0xb464
104 #define USB_CSR_DUMMY2          0xb466
105 #define USB_DEV_STAT            0xb808
106 #define USB_CONNECT_TIMER       0xcbf8
107 #define USB_BURST_SIZE          0xcfc0
108 #define USB_USB_CTRL            0xd406
109 #define USB_PHY_CTRL            0xd408
110 #define USB_TX_AGG              0xd40a
111 #define USB_RX_BUF_TH           0xd40c
112 #define USB_USB_TIMER           0xd428
113 #define USB_RX_EARLY_TIMEOUT    0xd42c
114 #define USB_RX_EARLY_SIZE       0xd42e
115 #define USB_PM_CTRL_STATUS      0xd432
116 #define USB_TX_DMA              0xd434
117 #define USB_TOLERANCE           0xd490
118 #define USB_LPM_CTRL            0xd41a
119 #define USB_BMU_RESET           0xd4b0
120 #define USB_UPS_CTRL            0xd800
121 #define USB_MISC_0              0xd81a
122 #define USB_POWER_CUT           0xd80a
123 #define USB_AFE_CTRL2           0xd824
124 #define USB_WDT11_CTRL          0xe43c
125 #define USB_BP_BA               0xfc26
126 #define USB_BP_0                0xfc28
127 #define USB_BP_1                0xfc2a
128 #define USB_BP_2                0xfc2c
129 #define USB_BP_3                0xfc2e
130 #define USB_BP_4                0xfc30
131 #define USB_BP_5                0xfc32
132 #define USB_BP_6                0xfc34
133 #define USB_BP_7                0xfc36
134 #define USB_BP_EN               0xfc38
135
136 /* OCP Registers */
137 #define OCP_ALDPS_CONFIG        0x2010
138 #define OCP_EEE_CONFIG1         0x2080
139 #define OCP_EEE_CONFIG2         0x2092
140 #define OCP_EEE_CONFIG3         0x2094
141 #define OCP_BASE_MII            0xa400
142 #define OCP_EEE_AR              0xa41a
143 #define OCP_EEE_DATA            0xa41c
144 #define OCP_PHY_STATUS          0xa420
145 #define OCP_POWER_CFG           0xa430
146 #define OCP_EEE_CFG             0xa432
147 #define OCP_SRAM_ADDR           0xa436
148 #define OCP_SRAM_DATA           0xa438
149 #define OCP_DOWN_SPEED          0xa442
150 #define OCP_EEE_ABLE            0xa5c4
151 #define OCP_EEE_ADV             0xa5d0
152 #define OCP_EEE_LPABLE          0xa5d2
153 #define OCP_PHY_STATE           0xa708          /* nway state for 8153 */
154 #define OCP_ADC_CFG             0xbc06
155
156 /* SRAM Register */
157 #define SRAM_LPF_CFG            0x8012
158 #define SRAM_10M_AMP1           0x8080
159 #define SRAM_10M_AMP2           0x8082
160 #define SRAM_IMPEDANCE          0x8084
161
162 /* PLA_RCR */
163 #define RCR_AAP                 0x00000001
164 #define RCR_APM                 0x00000002
165 #define RCR_AM                  0x00000004
166 #define RCR_AB                  0x00000008
167 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
168
169 /* PLA_RXFIFO_CTRL0 */
170 #define RXFIFO_THR1_NORMAL      0x00080002
171 #define RXFIFO_THR1_OOB         0x01800003
172
173 /* PLA_RXFIFO_CTRL1 */
174 #define RXFIFO_THR2_FULL        0x00000060
175 #define RXFIFO_THR2_HIGH        0x00000038
176 #define RXFIFO_THR2_OOB         0x0000004a
177 #define RXFIFO_THR2_NORMAL      0x00a0
178
179 /* PLA_RXFIFO_CTRL2 */
180 #define RXFIFO_THR3_FULL        0x00000078
181 #define RXFIFO_THR3_HIGH        0x00000048
182 #define RXFIFO_THR3_OOB         0x0000005a
183 #define RXFIFO_THR3_NORMAL      0x0110
184
185 /* PLA_TXFIFO_CTRL */
186 #define TXFIFO_THR_NORMAL       0x00400008
187 #define TXFIFO_THR_NORMAL2      0x01000008
188
189 /* PLA_DMY_REG0 */
190 #define ECM_ALDPS               0x0002
191
192 /* PLA_FMC */
193 #define FMC_FCR_MCU_EN          0x0001
194
195 /* PLA_EEEP_CR */
196 #define EEEP_CR_EEEP_TX         0x0002
197
198 /* PLA_WDT6_CTRL */
199 #define WDT6_SET_MODE           0x0010
200
201 /* PLA_TCR0 */
202 #define TCR0_TX_EMPTY           0x0800
203 #define TCR0_AUTO_FIFO          0x0080
204
205 /* PLA_TCR1 */
206 #define VERSION_MASK            0x7cf0
207
208 /* PLA_MTPS */
209 #define MTPS_JUMBO              (12 * 1024 / 64)
210 #define MTPS_DEFAULT            (6 * 1024 / 64)
211
212 /* PLA_RSTTALLY */
213 #define TALLY_RESET             0x0001
214
215 /* PLA_CR */
216 #define CR_RST                  0x10
217 #define CR_RE                   0x08
218 #define CR_TE                   0x04
219
220 /* PLA_CRWECR */
221 #define CRWECR_NORAML           0x00
222 #define CRWECR_CONFIG           0xc0
223
224 /* PLA_OOB_CTRL */
225 #define NOW_IS_OOB              0x80
226 #define TXFIFO_EMPTY            0x20
227 #define RXFIFO_EMPTY            0x10
228 #define LINK_LIST_READY         0x02
229 #define DIS_MCU_CLROOB          0x01
230 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
231
232 /* PLA_MISC_1 */
233 #define RXDY_GATED_EN           0x0008
234
235 /* PLA_SFF_STS_7 */
236 #define RE_INIT_LL              0x8000
237 #define MCU_BORW_EN             0x4000
238
239 /* PLA_CPCR */
240 #define CPCR_RX_VLAN            0x0040
241
242 /* PLA_CFG_WOL */
243 #define MAGIC_EN                0x0001
244
245 /* PLA_TEREDO_CFG */
246 #define TEREDO_SEL              0x8000
247 #define TEREDO_WAKE_MASK        0x7f00
248 #define TEREDO_RS_EVENT_MASK    0x00fe
249 #define OOB_TEREDO_EN           0x0001
250
251 /* PAL_BDC_CR */
252 #define ALDPS_PROXY_MODE        0x0001
253
254 /* PLA_CONFIG34 */
255 #define LINK_ON_WAKE_EN         0x0010
256 #define LINK_OFF_WAKE_EN        0x0008
257
258 /* PLA_CONFIG5 */
259 #define BWF_EN                  0x0040
260 #define MWF_EN                  0x0020
261 #define UWF_EN                  0x0010
262 #define LAN_WAKE_EN             0x0002
263
264 /* PLA_LED_FEATURE */
265 #define LED_MODE_MASK           0x0700
266
267 /* PLA_PHY_PWR */
268 #define TX_10M_IDLE_EN          0x0080
269 #define PFM_PWM_SWITCH          0x0040
270
271 /* PLA_MAC_PWR_CTRL */
272 #define D3_CLK_GATED_EN         0x00004000
273 #define MCU_CLK_RATIO           0x07010f07
274 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
275 #define ALDPS_SPDWN_RATIO       0x0f87
276
277 /* PLA_MAC_PWR_CTRL2 */
278 #define EEE_SPDWN_RATIO         0x8007
279
280 /* PLA_MAC_PWR_CTRL3 */
281 #define PKT_AVAIL_SPDWN_EN      0x0100
282 #define SUSPEND_SPDWN_EN        0x0004
283 #define U1U2_SPDWN_EN           0x0002
284 #define L1_SPDWN_EN             0x0001
285
286 /* PLA_MAC_PWR_CTRL4 */
287 #define PWRSAVE_SPDWN_EN        0x1000
288 #define RXDV_SPDWN_EN           0x0800
289 #define TX10MIDLE_EN            0x0100
290 #define TP100_SPDWN_EN          0x0020
291 #define TP500_SPDWN_EN          0x0010
292 #define TP1000_SPDWN_EN         0x0008
293 #define EEE_SPDWN_EN            0x0001
294
295 /* PLA_GPHY_INTR_IMR */
296 #define GPHY_STS_MSK            0x0001
297 #define SPEED_DOWN_MSK          0x0002
298 #define SPDWN_RXDV_MSK          0x0004
299 #define SPDWN_LINKCHG_MSK       0x0008
300
301 /* PLA_PHYAR */
302 #define PHYAR_FLAG              0x80000000
303
304 /* PLA_EEE_CR */
305 #define EEE_RX_EN               0x0001
306 #define EEE_TX_EN               0x0002
307
308 /* PLA_BOOT_CTRL */
309 #define AUTOLOAD_DONE           0x0002
310
311 /* USB_USB2PHY */
312 #define USB2PHY_SUSPEND         0x0001
313 #define USB2PHY_L1              0x0002
314
315 /* USB_SSPHYLINK2 */
316 #define pwd_dn_scale_mask       0x3ffe
317 #define pwd_dn_scale(x)         ((x) << 1)
318
319 /* USB_CSR_DUMMY1 */
320 #define DYNAMIC_BURST           0x0001
321
322 /* USB_CSR_DUMMY2 */
323 #define EP4_FULL_FC             0x0001
324
325 /* USB_DEV_STAT */
326 #define STAT_SPEED_MASK         0x0006
327 #define STAT_SPEED_HIGH         0x0000
328 #define STAT_SPEED_FULL         0x0002
329
330 /* USB_TX_AGG */
331 #define TX_AGG_MAX_THRESHOLD    0x03
332
333 /* USB_RX_BUF_TH */
334 #define RX_THR_SUPPER           0x0c350180
335 #define RX_THR_HIGH             0x7a120180
336 #define RX_THR_SLOW             0xffff0180
337
338 /* USB_TX_DMA */
339 #define TEST_MODE_DISABLE       0x00000001
340 #define TX_SIZE_ADJUST1         0x00000100
341
342 /* USB_BMU_RESET */
343 #define BMU_RESET_EP_IN         0x01
344 #define BMU_RESET_EP_OUT        0x02
345
346 /* USB_UPS_CTRL */
347 #define POWER_CUT               0x0100
348
349 /* USB_PM_CTRL_STATUS */
350 #define RESUME_INDICATE         0x0001
351
352 /* USB_USB_CTRL */
353 #define RX_AGG_DISABLE          0x0010
354 #define RX_ZERO_EN              0x0080
355
356 /* USB_U2P3_CTRL */
357 #define U2P3_ENABLE             0x0001
358
359 /* USB_POWER_CUT */
360 #define PWR_EN                  0x0001
361 #define PHASE2_EN               0x0008
362
363 /* USB_MISC_0 */
364 #define PCUT_STATUS             0x0001
365
366 /* USB_RX_EARLY_TIMEOUT */
367 #define COALESCE_SUPER           85000U
368 #define COALESCE_HIGH           250000U
369 #define COALESCE_SLOW           524280U
370
371 /* USB_WDT11_CTRL */
372 #define TIMER11_EN              0x0001
373
374 /* USB_LPM_CTRL */
375 /* bit 4 ~ 5: fifo empty boundary */
376 #define FIFO_EMPTY_1FB          0x30    /* 0x1fb * 64 = 32448 bytes */
377 /* bit 2 ~ 3: LMP timer */
378 #define LPM_TIMER_MASK          0x0c
379 #define LPM_TIMER_500MS         0x04    /* 500 ms */
380 #define LPM_TIMER_500US         0x0c    /* 500 us */
381 #define ROK_EXIT_LPM            0x02
382
383 /* USB_AFE_CTRL2 */
384 #define SEN_VAL_MASK            0xf800
385 #define SEN_VAL_NORMAL          0xa000
386 #define SEL_RXIDLE              0x0100
387
388 /* OCP_ALDPS_CONFIG */
389 #define ENPWRSAVE               0x8000
390 #define ENPDNPS                 0x0200
391 #define LINKENA                 0x0100
392 #define DIS_SDSAVE              0x0010
393
394 /* OCP_PHY_STATUS */
395 #define PHY_STAT_MASK           0x0007
396 #define PHY_STAT_LAN_ON         3
397 #define PHY_STAT_PWRDN          5
398
399 /* OCP_POWER_CFG */
400 #define EEE_CLKDIV_EN           0x8000
401 #define EN_ALDPS                0x0004
402 #define EN_10M_PLLOFF           0x0001
403
404 /* OCP_EEE_CONFIG1 */
405 #define RG_TXLPI_MSK_HFDUP      0x8000
406 #define RG_MATCLR_EN            0x4000
407 #define EEE_10_CAP              0x2000
408 #define EEE_NWAY_EN             0x1000
409 #define TX_QUIET_EN             0x0200
410 #define RX_QUIET_EN             0x0100
411 #define sd_rise_time_mask       0x0070
412 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
413 #define RG_RXLPI_MSK_HFDUP      0x0008
414 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
415
416 /* OCP_EEE_CONFIG2 */
417 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
418 #define RG_DACQUIET_EN          0x0400
419 #define RG_LDVQUIET_EN          0x0200
420 #define RG_CKRSEL               0x0020
421 #define RG_EEEPRG_EN            0x0010
422
423 /* OCP_EEE_CONFIG3 */
424 #define fast_snr_mask           0xff80
425 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
426 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
427 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
428
429 /* OCP_EEE_AR */
430 /* bit[15:14] function */
431 #define FUN_ADDR                0x0000
432 #define FUN_DATA                0x4000
433 /* bit[4:0] device addr */
434
435 /* OCP_EEE_CFG */
436 #define CTAP_SHORT_EN           0x0040
437 #define EEE10_EN                0x0010
438
439 /* OCP_DOWN_SPEED */
440 #define EN_10M_BGOFF            0x0080
441
442 /* OCP_PHY_STATE */
443 #define TXDIS_STATE             0x01
444 #define ABD_STATE               0x02
445
446 /* OCP_ADC_CFG */
447 #define CKADSEL_L               0x0100
448 #define ADC_EN                  0x0080
449 #define EN_EMI_L                0x0040
450
451 /* SRAM_LPF_CFG */
452 #define LPF_AUTO_TUNE           0x8000
453
454 /* SRAM_10M_AMP1 */
455 #define GDAC_IB_UPALL           0x0008
456
457 /* SRAM_10M_AMP2 */
458 #define AMP_DN                  0x0200
459
460 /* SRAM_IMPEDANCE */
461 #define RX_DRIVING_MASK         0x6000
462
463 enum rtl_register_content {
464         _1000bps        = 0x10,
465         _100bps         = 0x08,
466         _10bps          = 0x04,
467         LINK_STATUS     = 0x02,
468         FULL_DUP        = 0x01,
469 };
470
471 #define RTL8152_MAX_TX          4
472 #define RTL8152_MAX_RX          10
473 #define INTBUFSIZE              2
474 #define CRC_SIZE                4
475 #define TX_ALIGN                4
476 #define RX_ALIGN                8
477
478 #define INTR_LINK               0x0004
479
480 #define RTL8152_REQT_READ       0xc0
481 #define RTL8152_REQT_WRITE      0x40
482 #define RTL8152_REQ_GET_REGS    0x05
483 #define RTL8152_REQ_SET_REGS    0x05
484
485 #define BYTE_EN_DWORD           0xff
486 #define BYTE_EN_WORD            0x33
487 #define BYTE_EN_BYTE            0x11
488 #define BYTE_EN_SIX_BYTES       0x3f
489 #define BYTE_EN_START_MASK      0x0f
490 #define BYTE_EN_END_MASK        0xf0
491
492 #define RTL8153_MAX_PACKET      9216 /* 9K */
493 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
494 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
495 #define RTL8153_RMS             RTL8153_MAX_PACKET
496 #define RTL8152_TX_TIMEOUT      (5 * HZ)
497 #define RTL8152_NAPI_WEIGHT     64
498
499 /* rtl8152 flags */
500 enum rtl8152_flags {
501         RTL8152_UNPLUG = 0,
502         RTL8152_SET_RX_MODE,
503         WORK_ENABLE,
504         RTL8152_LINK_CHG,
505         SELECTIVE_SUSPEND,
506         PHY_RESET,
507         SCHEDULE_NAPI,
508 };
509
510 /* Define these values to match your device */
511 #define VENDOR_ID_REALTEK               0x0bda
512 #define VENDOR_ID_SAMSUNG               0x04e8
513 #define VENDOR_ID_LENOVO                0x17ef
514 #define VENDOR_ID_NVIDIA                0x0955
515
516 #define MCU_TYPE_PLA                    0x0100
517 #define MCU_TYPE_USB                    0x0000
518
519 struct tally_counter {
520         __le64  tx_packets;
521         __le64  rx_packets;
522         __le64  tx_errors;
523         __le32  rx_errors;
524         __le16  rx_missed;
525         __le16  align_errors;
526         __le32  tx_one_collision;
527         __le32  tx_multi_collision;
528         __le64  rx_unicast;
529         __le64  rx_broadcast;
530         __le32  rx_multicast;
531         __le16  tx_aborted;
532         __le16  tx_underrun;
533 };
534
535 struct rx_desc {
536         __le32 opts1;
537 #define RX_LEN_MASK                     0x7fff
538
539         __le32 opts2;
540 #define RD_UDP_CS                       BIT(23)
541 #define RD_TCP_CS                       BIT(22)
542 #define RD_IPV6_CS                      BIT(20)
543 #define RD_IPV4_CS                      BIT(19)
544
545         __le32 opts3;
546 #define IPF                             BIT(23) /* IP checksum fail */
547 #define UDPF                            BIT(22) /* UDP checksum fail */
548 #define TCPF                            BIT(21) /* TCP checksum fail */
549 #define RX_VLAN_TAG                     BIT(16)
550
551         __le32 opts4;
552         __le32 opts5;
553         __le32 opts6;
554 };
555
556 struct tx_desc {
557         __le32 opts1;
558 #define TX_FS                   BIT(31) /* First segment of a packet */
559 #define TX_LS                   BIT(30) /* Final segment of a packet */
560 #define GTSENDV4                BIT(28)
561 #define GTSENDV6                BIT(27)
562 #define GTTCPHO_SHIFT           18
563 #define GTTCPHO_MAX             0x7fU
564 #define TX_LEN_MAX              0x3ffffU
565
566         __le32 opts2;
567 #define UDP_CS                  BIT(31) /* Calculate UDP/IP checksum */
568 #define TCP_CS                  BIT(30) /* Calculate TCP/IP checksum */
569 #define IPV4_CS                 BIT(29) /* Calculate IPv4 checksum */
570 #define IPV6_CS                 BIT(28) /* Calculate IPv6 checksum */
571 #define MSS_SHIFT               17
572 #define MSS_MAX                 0x7ffU
573 #define TCPHO_SHIFT             17
574 #define TCPHO_MAX               0x7ffU
575 #define TX_VLAN_TAG             BIT(16)
576 };
577
578 struct r8152;
579
580 struct rx_agg {
581         struct list_head list;
582         struct urb *urb;
583         struct r8152 *context;
584         void *buffer;
585         void *head;
586 };
587
588 struct tx_agg {
589         struct list_head list;
590         struct urb *urb;
591         struct r8152 *context;
592         void *buffer;
593         void *head;
594         u32 skb_num;
595         u32 skb_len;
596 };
597
598 struct r8152 {
599         unsigned long flags;
600         struct usb_device *udev;
601         struct napi_struct napi;
602         struct usb_interface *intf;
603         struct net_device *netdev;
604         struct urb *intr_urb;
605         struct tx_agg tx_info[RTL8152_MAX_TX];
606         struct rx_agg rx_info[RTL8152_MAX_RX];
607         struct list_head rx_done, tx_free;
608         struct sk_buff_head tx_queue, rx_queue;
609         spinlock_t rx_lock, tx_lock;
610         struct delayed_work schedule;
611         struct mii_if_info mii;
612         struct mutex control;   /* use for hw setting */
613 #ifdef CONFIG_PM_SLEEP
614         struct notifier_block pm_notifier;
615 #endif
616
617         struct rtl_ops {
618                 void (*init)(struct r8152 *);
619                 int (*enable)(struct r8152 *);
620                 void (*disable)(struct r8152 *);
621                 void (*up)(struct r8152 *);
622                 void (*down)(struct r8152 *);
623                 void (*unload)(struct r8152 *);
624                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
625                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
626                 bool (*in_nway)(struct r8152 *);
627         } rtl_ops;
628
629         int intr_interval;
630         u32 saved_wolopts;
631         u32 msg_enable;
632         u32 tx_qlen;
633         u32 coalesce;
634         u16 ocp_base;
635         u8 *intr_buff;
636         u8 version;
637 };
638
639 enum rtl_version {
640         RTL_VER_UNKNOWN = 0,
641         RTL_VER_01,
642         RTL_VER_02,
643         RTL_VER_03,
644         RTL_VER_04,
645         RTL_VER_05,
646         RTL_VER_06,
647         RTL_VER_MAX
648 };
649
650 enum tx_csum_stat {
651         TX_CSUM_SUCCESS = 0,
652         TX_CSUM_TSO,
653         TX_CSUM_NONE
654 };
655
656 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
657  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
658  */
659 static const int multicast_filter_limit = 32;
660 static unsigned int agg_buf_sz = 16384;
661
662 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
663                                  VLAN_ETH_HLEN - VLAN_HLEN)
664
665 static
666 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
667 {
668         int ret;
669         void *tmp;
670
671         tmp = kmalloc(size, GFP_KERNEL);
672         if (!tmp)
673                 return -ENOMEM;
674
675         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
676                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
677                               value, index, tmp, size, 500);
678
679         memcpy(data, tmp, size);
680         kfree(tmp);
681
682         return ret;
683 }
684
685 static
686 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
687 {
688         int ret;
689         void *tmp;
690
691         tmp = kmemdup(data, size, GFP_KERNEL);
692         if (!tmp)
693                 return -ENOMEM;
694
695         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
696                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
697                               value, index, tmp, size, 500);
698
699         kfree(tmp);
700
701         return ret;
702 }
703
704 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
705                             void *data, u16 type)
706 {
707         u16 limit = 64;
708         int ret = 0;
709
710         if (test_bit(RTL8152_UNPLUG, &tp->flags))
711                 return -ENODEV;
712
713         /* both size and indix must be 4 bytes align */
714         if ((size & 3) || !size || (index & 3) || !data)
715                 return -EPERM;
716
717         if ((u32)index + (u32)size > 0xffff)
718                 return -EPERM;
719
720         while (size) {
721                 if (size > limit) {
722                         ret = get_registers(tp, index, type, limit, data);
723                         if (ret < 0)
724                                 break;
725
726                         index += limit;
727                         data += limit;
728                         size -= limit;
729                 } else {
730                         ret = get_registers(tp, index, type, size, data);
731                         if (ret < 0)
732                                 break;
733
734                         index += size;
735                         data += size;
736                         size = 0;
737                         break;
738                 }
739         }
740
741         if (ret == -ENODEV)
742                 set_bit(RTL8152_UNPLUG, &tp->flags);
743
744         return ret;
745 }
746
747 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
748                              u16 size, void *data, u16 type)
749 {
750         int ret;
751         u16 byteen_start, byteen_end, byen;
752         u16 limit = 512;
753
754         if (test_bit(RTL8152_UNPLUG, &tp->flags))
755                 return -ENODEV;
756
757         /* both size and indix must be 4 bytes align */
758         if ((size & 3) || !size || (index & 3) || !data)
759                 return -EPERM;
760
761         if ((u32)index + (u32)size > 0xffff)
762                 return -EPERM;
763
764         byteen_start = byteen & BYTE_EN_START_MASK;
765         byteen_end = byteen & BYTE_EN_END_MASK;
766
767         byen = byteen_start | (byteen_start << 4);
768         ret = set_registers(tp, index, type | byen, 4, data);
769         if (ret < 0)
770                 goto error1;
771
772         index += 4;
773         data += 4;
774         size -= 4;
775
776         if (size) {
777                 size -= 4;
778
779                 while (size) {
780                         if (size > limit) {
781                                 ret = set_registers(tp, index,
782                                                     type | BYTE_EN_DWORD,
783                                                     limit, data);
784                                 if (ret < 0)
785                                         goto error1;
786
787                                 index += limit;
788                                 data += limit;
789                                 size -= limit;
790                         } else {
791                                 ret = set_registers(tp, index,
792                                                     type | BYTE_EN_DWORD,
793                                                     size, data);
794                                 if (ret < 0)
795                                         goto error1;
796
797                                 index += size;
798                                 data += size;
799                                 size = 0;
800                                 break;
801                         }
802                 }
803
804                 byen = byteen_end | (byteen_end >> 4);
805                 ret = set_registers(tp, index, type | byen, 4, data);
806                 if (ret < 0)
807                         goto error1;
808         }
809
810 error1:
811         if (ret == -ENODEV)
812                 set_bit(RTL8152_UNPLUG, &tp->flags);
813
814         return ret;
815 }
816
817 static inline
818 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
819 {
820         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
821 }
822
823 static inline
824 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
825 {
826         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
827 }
828
829 static inline
830 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
831 {
832         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
833 }
834
835 static inline
836 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
837 {
838         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
839 }
840
841 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
842 {
843         __le32 data;
844
845         generic_ocp_read(tp, index, sizeof(data), &data, type);
846
847         return __le32_to_cpu(data);
848 }
849
850 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
851 {
852         __le32 tmp = __cpu_to_le32(data);
853
854         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
855 }
856
857 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
858 {
859         u32 data;
860         __le32 tmp;
861         u8 shift = index & 2;
862
863         index &= ~3;
864
865         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
866
867         data = __le32_to_cpu(tmp);
868         data >>= (shift * 8);
869         data &= 0xffff;
870
871         return (u16)data;
872 }
873
874 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
875 {
876         u32 mask = 0xffff;
877         __le32 tmp;
878         u16 byen = BYTE_EN_WORD;
879         u8 shift = index & 2;
880
881         data &= mask;
882
883         if (index & 2) {
884                 byen <<= shift;
885                 mask <<= (shift * 8);
886                 data <<= (shift * 8);
887                 index &= ~3;
888         }
889
890         tmp = __cpu_to_le32(data);
891
892         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
893 }
894
895 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
896 {
897         u32 data;
898         __le32 tmp;
899         u8 shift = index & 3;
900
901         index &= ~3;
902
903         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
904
905         data = __le32_to_cpu(tmp);
906         data >>= (shift * 8);
907         data &= 0xff;
908
909         return (u8)data;
910 }
911
912 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
913 {
914         u32 mask = 0xff;
915         __le32 tmp;
916         u16 byen = BYTE_EN_BYTE;
917         u8 shift = index & 3;
918
919         data &= mask;
920
921         if (index & 3) {
922                 byen <<= shift;
923                 mask <<= (shift * 8);
924                 data <<= (shift * 8);
925                 index &= ~3;
926         }
927
928         tmp = __cpu_to_le32(data);
929
930         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
931 }
932
933 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
934 {
935         u16 ocp_base, ocp_index;
936
937         ocp_base = addr & 0xf000;
938         if (ocp_base != tp->ocp_base) {
939                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
940                 tp->ocp_base = ocp_base;
941         }
942
943         ocp_index = (addr & 0x0fff) | 0xb000;
944         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
945 }
946
947 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
948 {
949         u16 ocp_base, ocp_index;
950
951         ocp_base = addr & 0xf000;
952         if (ocp_base != tp->ocp_base) {
953                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
954                 tp->ocp_base = ocp_base;
955         }
956
957         ocp_index = (addr & 0x0fff) | 0xb000;
958         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
959 }
960
961 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
962 {
963         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
964 }
965
966 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
967 {
968         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
969 }
970
971 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
972 {
973         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
974         ocp_reg_write(tp, OCP_SRAM_DATA, data);
975 }
976
977 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
978 {
979         struct r8152 *tp = netdev_priv(netdev);
980         int ret;
981
982         if (test_bit(RTL8152_UNPLUG, &tp->flags))
983                 return -ENODEV;
984
985         if (phy_id != R8152_PHY_ID)
986                 return -EINVAL;
987
988         ret = r8152_mdio_read(tp, reg);
989
990         return ret;
991 }
992
993 static
994 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
995 {
996         struct r8152 *tp = netdev_priv(netdev);
997
998         if (test_bit(RTL8152_UNPLUG, &tp->flags))
999                 return;
1000
1001         if (phy_id != R8152_PHY_ID)
1002                 return;
1003
1004         r8152_mdio_write(tp, reg, val);
1005 }
1006
1007 static int
1008 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1009
1010 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1011 {
1012         struct r8152 *tp = netdev_priv(netdev);
1013         struct sockaddr *addr = p;
1014         int ret = -EADDRNOTAVAIL;
1015
1016         if (!is_valid_ether_addr(addr->sa_data))
1017                 goto out1;
1018
1019         ret = usb_autopm_get_interface(tp->intf);
1020         if (ret < 0)
1021                 goto out1;
1022
1023         mutex_lock(&tp->control);
1024
1025         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1026
1027         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1028         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1029         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1030
1031         mutex_unlock(&tp->control);
1032
1033         usb_autopm_put_interface(tp->intf);
1034 out1:
1035         return ret;
1036 }
1037
1038 static int set_ethernet_addr(struct r8152 *tp)
1039 {
1040         struct net_device *dev = tp->netdev;
1041         struct sockaddr sa;
1042         int ret;
1043
1044         if (tp->version == RTL_VER_01)
1045                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1046         else
1047                 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1048
1049         if (ret < 0) {
1050                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1051         } else if (!is_valid_ether_addr(sa.sa_data)) {
1052                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1053                           sa.sa_data);
1054                 eth_hw_addr_random(dev);
1055                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1056                 ret = rtl8152_set_mac_address(dev, &sa);
1057                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1058                            sa.sa_data);
1059         } else {
1060                 if (tp->version == RTL_VER_01)
1061                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1062                 else
1063                         ret = rtl8152_set_mac_address(dev, &sa);
1064         }
1065
1066         return ret;
1067 }
1068
1069 static void read_bulk_callback(struct urb *urb)
1070 {
1071         struct net_device *netdev;
1072         int status = urb->status;
1073         struct rx_agg *agg;
1074         struct r8152 *tp;
1075
1076         agg = urb->context;
1077         if (!agg)
1078                 return;
1079
1080         tp = agg->context;
1081         if (!tp)
1082                 return;
1083
1084         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1085                 return;
1086
1087         if (!test_bit(WORK_ENABLE, &tp->flags))
1088                 return;
1089
1090         netdev = tp->netdev;
1091
1092         /* When link down, the driver would cancel all bulks. */
1093         /* This avoid the re-submitting bulk */
1094         if (!netif_carrier_ok(netdev))
1095                 return;
1096
1097         usb_mark_last_busy(tp->udev);
1098
1099         switch (status) {
1100         case 0:
1101                 if (urb->actual_length < ETH_ZLEN)
1102                         break;
1103
1104                 spin_lock(&tp->rx_lock);
1105                 list_add_tail(&agg->list, &tp->rx_done);
1106                 spin_unlock(&tp->rx_lock);
1107                 napi_schedule(&tp->napi);
1108                 return;
1109         case -ESHUTDOWN:
1110                 set_bit(RTL8152_UNPLUG, &tp->flags);
1111                 netif_device_detach(tp->netdev);
1112                 return;
1113         case -ENOENT:
1114                 return; /* the urb is in unlink state */
1115         case -ETIME:
1116                 if (net_ratelimit())
1117                         netdev_warn(netdev, "maybe reset is needed?\n");
1118                 break;
1119         default:
1120                 if (net_ratelimit())
1121                         netdev_warn(netdev, "Rx status %d\n", status);
1122                 break;
1123         }
1124
1125         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1126 }
1127
1128 static void write_bulk_callback(struct urb *urb)
1129 {
1130         struct net_device_stats *stats;
1131         struct net_device *netdev;
1132         struct tx_agg *agg;
1133         struct r8152 *tp;
1134         int status = urb->status;
1135
1136         agg = urb->context;
1137         if (!agg)
1138                 return;
1139
1140         tp = agg->context;
1141         if (!tp)
1142                 return;
1143
1144         netdev = tp->netdev;
1145         stats = &netdev->stats;
1146         if (status) {
1147                 if (net_ratelimit())
1148                         netdev_warn(netdev, "Tx status %d\n", status);
1149                 stats->tx_errors += agg->skb_num;
1150         } else {
1151                 stats->tx_packets += agg->skb_num;
1152                 stats->tx_bytes += agg->skb_len;
1153         }
1154
1155         spin_lock(&tp->tx_lock);
1156         list_add_tail(&agg->list, &tp->tx_free);
1157         spin_unlock(&tp->tx_lock);
1158
1159         usb_autopm_put_interface_async(tp->intf);
1160
1161         if (!netif_carrier_ok(netdev))
1162                 return;
1163
1164         if (!test_bit(WORK_ENABLE, &tp->flags))
1165                 return;
1166
1167         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1168                 return;
1169
1170         if (!skb_queue_empty(&tp->tx_queue))
1171                 napi_schedule(&tp->napi);
1172 }
1173
1174 static void intr_callback(struct urb *urb)
1175 {
1176         struct r8152 *tp;
1177         __le16 *d;
1178         int status = urb->status;
1179         int res;
1180
1181         tp = urb->context;
1182         if (!tp)
1183                 return;
1184
1185         if (!test_bit(WORK_ENABLE, &tp->flags))
1186                 return;
1187
1188         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1189                 return;
1190
1191         switch (status) {
1192         case 0:                 /* success */
1193                 break;
1194         case -ECONNRESET:       /* unlink */
1195         case -ESHUTDOWN:
1196                 netif_device_detach(tp->netdev);
1197         case -ENOENT:
1198         case -EPROTO:
1199                 netif_info(tp, intr, tp->netdev,
1200                            "Stop submitting intr, status %d\n", status);
1201                 return;
1202         case -EOVERFLOW:
1203                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1204                 goto resubmit;
1205         /* -EPIPE:  should clear the halt */
1206         default:
1207                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1208                 goto resubmit;
1209         }
1210
1211         d = urb->transfer_buffer;
1212         if (INTR_LINK & __le16_to_cpu(d[0])) {
1213                 if (!netif_carrier_ok(tp->netdev)) {
1214                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1215                         schedule_delayed_work(&tp->schedule, 0);
1216                 }
1217         } else {
1218                 if (netif_carrier_ok(tp->netdev)) {
1219                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1220                         schedule_delayed_work(&tp->schedule, 0);
1221                 }
1222         }
1223
1224 resubmit:
1225         res = usb_submit_urb(urb, GFP_ATOMIC);
1226         if (res == -ENODEV) {
1227                 set_bit(RTL8152_UNPLUG, &tp->flags);
1228                 netif_device_detach(tp->netdev);
1229         } else if (res) {
1230                 netif_err(tp, intr, tp->netdev,
1231                           "can't resubmit intr, status %d\n", res);
1232         }
1233 }
1234
1235 static inline void *rx_agg_align(void *data)
1236 {
1237         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1238 }
1239
1240 static inline void *tx_agg_align(void *data)
1241 {
1242         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1243 }
1244
1245 static void free_all_mem(struct r8152 *tp)
1246 {
1247         int i;
1248
1249         for (i = 0; i < RTL8152_MAX_RX; i++) {
1250                 usb_free_urb(tp->rx_info[i].urb);
1251                 tp->rx_info[i].urb = NULL;
1252
1253                 kfree(tp->rx_info[i].buffer);
1254                 tp->rx_info[i].buffer = NULL;
1255                 tp->rx_info[i].head = NULL;
1256         }
1257
1258         for (i = 0; i < RTL8152_MAX_TX; i++) {
1259                 usb_free_urb(tp->tx_info[i].urb);
1260                 tp->tx_info[i].urb = NULL;
1261
1262                 kfree(tp->tx_info[i].buffer);
1263                 tp->tx_info[i].buffer = NULL;
1264                 tp->tx_info[i].head = NULL;
1265         }
1266
1267         usb_free_urb(tp->intr_urb);
1268         tp->intr_urb = NULL;
1269
1270         kfree(tp->intr_buff);
1271         tp->intr_buff = NULL;
1272 }
1273
1274 static int alloc_all_mem(struct r8152 *tp)
1275 {
1276         struct net_device *netdev = tp->netdev;
1277         struct usb_interface *intf = tp->intf;
1278         struct usb_host_interface *alt = intf->cur_altsetting;
1279         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1280         struct urb *urb;
1281         int node, i;
1282         u8 *buf;
1283
1284         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1285
1286         spin_lock_init(&tp->rx_lock);
1287         spin_lock_init(&tp->tx_lock);
1288         INIT_LIST_HEAD(&tp->tx_free);
1289         skb_queue_head_init(&tp->tx_queue);
1290         skb_queue_head_init(&tp->rx_queue);
1291
1292         for (i = 0; i < RTL8152_MAX_RX; i++) {
1293                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1294                 if (!buf)
1295                         goto err1;
1296
1297                 if (buf != rx_agg_align(buf)) {
1298                         kfree(buf);
1299                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1300                                            node);
1301                         if (!buf)
1302                                 goto err1;
1303                 }
1304
1305                 urb = usb_alloc_urb(0, GFP_KERNEL);
1306                 if (!urb) {
1307                         kfree(buf);
1308                         goto err1;
1309                 }
1310
1311                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1312                 tp->rx_info[i].context = tp;
1313                 tp->rx_info[i].urb = urb;
1314                 tp->rx_info[i].buffer = buf;
1315                 tp->rx_info[i].head = rx_agg_align(buf);
1316         }
1317
1318         for (i = 0; i < RTL8152_MAX_TX; i++) {
1319                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1320                 if (!buf)
1321                         goto err1;
1322
1323                 if (buf != tx_agg_align(buf)) {
1324                         kfree(buf);
1325                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1326                                            node);
1327                         if (!buf)
1328                                 goto err1;
1329                 }
1330
1331                 urb = usb_alloc_urb(0, GFP_KERNEL);
1332                 if (!urb) {
1333                         kfree(buf);
1334                         goto err1;
1335                 }
1336
1337                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1338                 tp->tx_info[i].context = tp;
1339                 tp->tx_info[i].urb = urb;
1340                 tp->tx_info[i].buffer = buf;
1341                 tp->tx_info[i].head = tx_agg_align(buf);
1342
1343                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1344         }
1345
1346         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1347         if (!tp->intr_urb)
1348                 goto err1;
1349
1350         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1351         if (!tp->intr_buff)
1352                 goto err1;
1353
1354         tp->intr_interval = (int)ep_intr->desc.bInterval;
1355         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1356                          tp->intr_buff, INTBUFSIZE, intr_callback,
1357                          tp, tp->intr_interval);
1358
1359         return 0;
1360
1361 err1:
1362         free_all_mem(tp);
1363         return -ENOMEM;
1364 }
1365
1366 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1367 {
1368         struct tx_agg *agg = NULL;
1369         unsigned long flags;
1370
1371         if (list_empty(&tp->tx_free))
1372                 return NULL;
1373
1374         spin_lock_irqsave(&tp->tx_lock, flags);
1375         if (!list_empty(&tp->tx_free)) {
1376                 struct list_head *cursor;
1377
1378                 cursor = tp->tx_free.next;
1379                 list_del_init(cursor);
1380                 agg = list_entry(cursor, struct tx_agg, list);
1381         }
1382         spin_unlock_irqrestore(&tp->tx_lock, flags);
1383
1384         return agg;
1385 }
1386
1387 /* r8152_csum_workaround()
1388  * The hw limites the value the transport offset. When the offset is out of the
1389  * range, calculate the checksum by sw.
1390  */
1391 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1392                                   struct sk_buff_head *list)
1393 {
1394         if (skb_shinfo(skb)->gso_size) {
1395                 netdev_features_t features = tp->netdev->features;
1396                 struct sk_buff_head seg_list;
1397                 struct sk_buff *segs, *nskb;
1398
1399                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1400                 segs = skb_gso_segment(skb, features);
1401                 if (IS_ERR(segs) || !segs)
1402                         goto drop;
1403
1404                 __skb_queue_head_init(&seg_list);
1405
1406                 do {
1407                         nskb = segs;
1408                         segs = segs->next;
1409                         nskb->next = NULL;
1410                         __skb_queue_tail(&seg_list, nskb);
1411                 } while (segs);
1412
1413                 skb_queue_splice(&seg_list, list);
1414                 dev_kfree_skb(skb);
1415         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1416                 if (skb_checksum_help(skb) < 0)
1417                         goto drop;
1418
1419                 __skb_queue_head(list, skb);
1420         } else {
1421                 struct net_device_stats *stats;
1422
1423 drop:
1424                 stats = &tp->netdev->stats;
1425                 stats->tx_dropped++;
1426                 dev_kfree_skb(skb);
1427         }
1428 }
1429
1430 /* msdn_giant_send_check()
1431  * According to the document of microsoft, the TCP Pseudo Header excludes the
1432  * packet length for IPv6 TCP large packets.
1433  */
1434 static int msdn_giant_send_check(struct sk_buff *skb)
1435 {
1436         const struct ipv6hdr *ipv6h;
1437         struct tcphdr *th;
1438         int ret;
1439
1440         ret = skb_cow_head(skb, 0);
1441         if (ret)
1442                 return ret;
1443
1444         ipv6h = ipv6_hdr(skb);
1445         th = tcp_hdr(skb);
1446
1447         th->check = 0;
1448         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1449
1450         return ret;
1451 }
1452
1453 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1454 {
1455         if (skb_vlan_tag_present(skb)) {
1456                 u32 opts2;
1457
1458                 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1459                 desc->opts2 |= cpu_to_le32(opts2);
1460         }
1461 }
1462
1463 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1464 {
1465         u32 opts2 = le32_to_cpu(desc->opts2);
1466
1467         if (opts2 & RX_VLAN_TAG)
1468                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1469                                        swab16(opts2 & 0xffff));
1470 }
1471
1472 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1473                          struct sk_buff *skb, u32 len, u32 transport_offset)
1474 {
1475         u32 mss = skb_shinfo(skb)->gso_size;
1476         u32 opts1, opts2 = 0;
1477         int ret = TX_CSUM_SUCCESS;
1478
1479         WARN_ON_ONCE(len > TX_LEN_MAX);
1480
1481         opts1 = len | TX_FS | TX_LS;
1482
1483         if (mss) {
1484                 if (transport_offset > GTTCPHO_MAX) {
1485                         netif_warn(tp, tx_err, tp->netdev,
1486                                    "Invalid transport offset 0x%x for TSO\n",
1487                                    transport_offset);
1488                         ret = TX_CSUM_TSO;
1489                         goto unavailable;
1490                 }
1491
1492                 switch (vlan_get_protocol(skb)) {
1493                 case htons(ETH_P_IP):
1494                         opts1 |= GTSENDV4;
1495                         break;
1496
1497                 case htons(ETH_P_IPV6):
1498                         if (msdn_giant_send_check(skb)) {
1499                                 ret = TX_CSUM_TSO;
1500                                 goto unavailable;
1501                         }
1502                         opts1 |= GTSENDV6;
1503                         break;
1504
1505                 default:
1506                         WARN_ON_ONCE(1);
1507                         break;
1508                 }
1509
1510                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1511                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1512         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1513                 u8 ip_protocol;
1514
1515                 if (transport_offset > TCPHO_MAX) {
1516                         netif_warn(tp, tx_err, tp->netdev,
1517                                    "Invalid transport offset 0x%x\n",
1518                                    transport_offset);
1519                         ret = TX_CSUM_NONE;
1520                         goto unavailable;
1521                 }
1522
1523                 switch (vlan_get_protocol(skb)) {
1524                 case htons(ETH_P_IP):
1525                         opts2 |= IPV4_CS;
1526                         ip_protocol = ip_hdr(skb)->protocol;
1527                         break;
1528
1529                 case htons(ETH_P_IPV6):
1530                         opts2 |= IPV6_CS;
1531                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1532                         break;
1533
1534                 default:
1535                         ip_protocol = IPPROTO_RAW;
1536                         break;
1537                 }
1538
1539                 if (ip_protocol == IPPROTO_TCP)
1540                         opts2 |= TCP_CS;
1541                 else if (ip_protocol == IPPROTO_UDP)
1542                         opts2 |= UDP_CS;
1543                 else
1544                         WARN_ON_ONCE(1);
1545
1546                 opts2 |= transport_offset << TCPHO_SHIFT;
1547         }
1548
1549         desc->opts2 = cpu_to_le32(opts2);
1550         desc->opts1 = cpu_to_le32(opts1);
1551
1552 unavailable:
1553         return ret;
1554 }
1555
1556 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1557 {
1558         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1559         int remain, ret;
1560         u8 *tx_data;
1561
1562         __skb_queue_head_init(&skb_head);
1563         spin_lock(&tx_queue->lock);
1564         skb_queue_splice_init(tx_queue, &skb_head);
1565         spin_unlock(&tx_queue->lock);
1566
1567         tx_data = agg->head;
1568         agg->skb_num = 0;
1569         agg->skb_len = 0;
1570         remain = agg_buf_sz;
1571
1572         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1573                 struct tx_desc *tx_desc;
1574                 struct sk_buff *skb;
1575                 unsigned int len;
1576                 u32 offset;
1577
1578                 skb = __skb_dequeue(&skb_head);
1579                 if (!skb)
1580                         break;
1581
1582                 len = skb->len + sizeof(*tx_desc);
1583
1584                 if (len > remain) {
1585                         __skb_queue_head(&skb_head, skb);
1586                         break;
1587                 }
1588
1589                 tx_data = tx_agg_align(tx_data);
1590                 tx_desc = (struct tx_desc *)tx_data;
1591
1592                 offset = (u32)skb_transport_offset(skb);
1593
1594                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1595                         r8152_csum_workaround(tp, skb, &skb_head);
1596                         continue;
1597                 }
1598
1599                 rtl_tx_vlan_tag(tx_desc, skb);
1600
1601                 tx_data += sizeof(*tx_desc);
1602
1603                 len = skb->len;
1604                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1605                         struct net_device_stats *stats = &tp->netdev->stats;
1606
1607                         stats->tx_dropped++;
1608                         dev_kfree_skb_any(skb);
1609                         tx_data -= sizeof(*tx_desc);
1610                         continue;
1611                 }
1612
1613                 tx_data += len;
1614                 agg->skb_len += len;
1615                 agg->skb_num++;
1616
1617                 dev_kfree_skb_any(skb);
1618
1619                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1620         }
1621
1622         if (!skb_queue_empty(&skb_head)) {
1623                 spin_lock(&tx_queue->lock);
1624                 skb_queue_splice(&skb_head, tx_queue);
1625                 spin_unlock(&tx_queue->lock);
1626         }
1627
1628         netif_tx_lock(tp->netdev);
1629
1630         if (netif_queue_stopped(tp->netdev) &&
1631             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1632                 netif_wake_queue(tp->netdev);
1633
1634         netif_tx_unlock(tp->netdev);
1635
1636         ret = usb_autopm_get_interface_async(tp->intf);
1637         if (ret < 0)
1638                 goto out_tx_fill;
1639
1640         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1641                           agg->head, (int)(tx_data - (u8 *)agg->head),
1642                           (usb_complete_t)write_bulk_callback, agg);
1643
1644         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1645         if (ret < 0)
1646                 usb_autopm_put_interface_async(tp->intf);
1647
1648 out_tx_fill:
1649         return ret;
1650 }
1651
1652 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1653 {
1654         u8 checksum = CHECKSUM_NONE;
1655         u32 opts2, opts3;
1656
1657         if (tp->version == RTL_VER_01)
1658                 goto return_result;
1659
1660         opts2 = le32_to_cpu(rx_desc->opts2);
1661         opts3 = le32_to_cpu(rx_desc->opts3);
1662
1663         if (opts2 & RD_IPV4_CS) {
1664                 if (opts3 & IPF)
1665                         checksum = CHECKSUM_NONE;
1666                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1667                         checksum = CHECKSUM_NONE;
1668                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1669                         checksum = CHECKSUM_NONE;
1670                 else
1671                         checksum = CHECKSUM_UNNECESSARY;
1672         } else if (RD_IPV6_CS) {
1673                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1674                         checksum = CHECKSUM_UNNECESSARY;
1675                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1676                         checksum = CHECKSUM_UNNECESSARY;
1677         }
1678
1679 return_result:
1680         return checksum;
1681 }
1682
1683 static int rx_bottom(struct r8152 *tp, int budget)
1684 {
1685         unsigned long flags;
1686         struct list_head *cursor, *next, rx_queue;
1687         int ret = 0, work_done = 0;
1688
1689         if (!skb_queue_empty(&tp->rx_queue)) {
1690                 while (work_done < budget) {
1691                         struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1692                         struct net_device *netdev = tp->netdev;
1693                         struct net_device_stats *stats = &netdev->stats;
1694                         unsigned int pkt_len;
1695
1696                         if (!skb)
1697                                 break;
1698
1699                         pkt_len = skb->len;
1700                         napi_gro_receive(&tp->napi, skb);
1701                         work_done++;
1702                         stats->rx_packets++;
1703                         stats->rx_bytes += pkt_len;
1704                 }
1705         }
1706
1707         if (list_empty(&tp->rx_done))
1708                 goto out1;
1709
1710         INIT_LIST_HEAD(&rx_queue);
1711         spin_lock_irqsave(&tp->rx_lock, flags);
1712         list_splice_init(&tp->rx_done, &rx_queue);
1713         spin_unlock_irqrestore(&tp->rx_lock, flags);
1714
1715         list_for_each_safe(cursor, next, &rx_queue) {
1716                 struct rx_desc *rx_desc;
1717                 struct rx_agg *agg;
1718                 int len_used = 0;
1719                 struct urb *urb;
1720                 u8 *rx_data;
1721
1722                 list_del_init(cursor);
1723
1724                 agg = list_entry(cursor, struct rx_agg, list);
1725                 urb = agg->urb;
1726                 if (urb->actual_length < ETH_ZLEN)
1727                         goto submit;
1728
1729                 rx_desc = agg->head;
1730                 rx_data = agg->head;
1731                 len_used += sizeof(struct rx_desc);
1732
1733                 while (urb->actual_length > len_used) {
1734                         struct net_device *netdev = tp->netdev;
1735                         struct net_device_stats *stats = &netdev->stats;
1736                         unsigned int pkt_len;
1737                         struct sk_buff *skb;
1738
1739                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1740                         if (pkt_len < ETH_ZLEN)
1741                                 break;
1742
1743                         len_used += pkt_len;
1744                         if (urb->actual_length < len_used)
1745                                 break;
1746
1747                         pkt_len -= CRC_SIZE;
1748                         rx_data += sizeof(struct rx_desc);
1749
1750                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1751                         if (!skb) {
1752                                 stats->rx_dropped++;
1753                                 goto find_next_rx;
1754                         }
1755
1756                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1757                         memcpy(skb->data, rx_data, pkt_len);
1758                         skb_put(skb, pkt_len);
1759                         skb->protocol = eth_type_trans(skb, netdev);
1760                         rtl_rx_vlan_tag(rx_desc, skb);
1761                         if (work_done < budget) {
1762                                 napi_gro_receive(&tp->napi, skb);
1763                                 work_done++;
1764                                 stats->rx_packets++;
1765                                 stats->rx_bytes += pkt_len;
1766                         } else {
1767                                 __skb_queue_tail(&tp->rx_queue, skb);
1768                         }
1769
1770 find_next_rx:
1771                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1772                         rx_desc = (struct rx_desc *)rx_data;
1773                         len_used = (int)(rx_data - (u8 *)agg->head);
1774                         len_used += sizeof(struct rx_desc);
1775                 }
1776
1777 submit:
1778                 if (!ret) {
1779                         ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1780                 } else {
1781                         urb->actual_length = 0;
1782                         list_add_tail(&agg->list, next);
1783                 }
1784         }
1785
1786         if (!list_empty(&rx_queue)) {
1787                 spin_lock_irqsave(&tp->rx_lock, flags);
1788                 list_splice_tail(&rx_queue, &tp->rx_done);
1789                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1790         }
1791
1792 out1:
1793         return work_done;
1794 }
1795
1796 static void tx_bottom(struct r8152 *tp)
1797 {
1798         int res;
1799
1800         do {
1801                 struct tx_agg *agg;
1802
1803                 if (skb_queue_empty(&tp->tx_queue))
1804                         break;
1805
1806                 agg = r8152_get_tx_agg(tp);
1807                 if (!agg)
1808                         break;
1809
1810                 res = r8152_tx_agg_fill(tp, agg);
1811                 if (res) {
1812                         struct net_device *netdev = tp->netdev;
1813
1814                         if (res == -ENODEV) {
1815                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1816                                 netif_device_detach(netdev);
1817                         } else {
1818                                 struct net_device_stats *stats = &netdev->stats;
1819                                 unsigned long flags;
1820
1821                                 netif_warn(tp, tx_err, netdev,
1822                                            "failed tx_urb %d\n", res);
1823                                 stats->tx_dropped += agg->skb_num;
1824
1825                                 spin_lock_irqsave(&tp->tx_lock, flags);
1826                                 list_add_tail(&agg->list, &tp->tx_free);
1827                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1828                         }
1829                 }
1830         } while (res == 0);
1831 }
1832
1833 static void bottom_half(struct r8152 *tp)
1834 {
1835         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1836                 return;
1837
1838         if (!test_bit(WORK_ENABLE, &tp->flags))
1839                 return;
1840
1841         /* When link down, the driver would cancel all bulks. */
1842         /* This avoid the re-submitting bulk */
1843         if (!netif_carrier_ok(tp->netdev))
1844                 return;
1845
1846         clear_bit(SCHEDULE_NAPI, &tp->flags);
1847
1848         tx_bottom(tp);
1849 }
1850
1851 static int r8152_poll(struct napi_struct *napi, int budget)
1852 {
1853         struct r8152 *tp = container_of(napi, struct r8152, napi);
1854         int work_done;
1855
1856         work_done = rx_bottom(tp, budget);
1857         bottom_half(tp);
1858
1859         if (work_done < budget) {
1860                 napi_complete(napi);
1861                 if (!list_empty(&tp->rx_done))
1862                         napi_schedule(napi);
1863         }
1864
1865         return work_done;
1866 }
1867
1868 static
1869 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1870 {
1871         int ret;
1872
1873         /* The rx would be stopped, so skip submitting */
1874         if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1875             !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1876                 return 0;
1877
1878         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1879                           agg->head, agg_buf_sz,
1880                           (usb_complete_t)read_bulk_callback, agg);
1881
1882         ret = usb_submit_urb(agg->urb, mem_flags);
1883         if (ret == -ENODEV) {
1884                 set_bit(RTL8152_UNPLUG, &tp->flags);
1885                 netif_device_detach(tp->netdev);
1886         } else if (ret) {
1887                 struct urb *urb = agg->urb;
1888                 unsigned long flags;
1889
1890                 urb->actual_length = 0;
1891                 spin_lock_irqsave(&tp->rx_lock, flags);
1892                 list_add_tail(&agg->list, &tp->rx_done);
1893                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1894
1895                 netif_err(tp, rx_err, tp->netdev,
1896                           "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1897
1898                 napi_schedule(&tp->napi);
1899         }
1900
1901         return ret;
1902 }
1903
1904 static void rtl_drop_queued_tx(struct r8152 *tp)
1905 {
1906         struct net_device_stats *stats = &tp->netdev->stats;
1907         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1908         struct sk_buff *skb;
1909
1910         if (skb_queue_empty(tx_queue))
1911                 return;
1912
1913         __skb_queue_head_init(&skb_head);
1914         spin_lock_bh(&tx_queue->lock);
1915         skb_queue_splice_init(tx_queue, &skb_head);
1916         spin_unlock_bh(&tx_queue->lock);
1917
1918         while ((skb = __skb_dequeue(&skb_head))) {
1919                 dev_kfree_skb(skb);
1920                 stats->tx_dropped++;
1921         }
1922 }
1923
1924 static void rtl8152_tx_timeout(struct net_device *netdev)
1925 {
1926         struct r8152 *tp = netdev_priv(netdev);
1927
1928         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1929
1930         usb_queue_reset_device(tp->intf);
1931 }
1932
1933 static void rtl8152_set_rx_mode(struct net_device *netdev)
1934 {
1935         struct r8152 *tp = netdev_priv(netdev);
1936
1937         if (netif_carrier_ok(netdev)) {
1938                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1939                 schedule_delayed_work(&tp->schedule, 0);
1940         }
1941 }
1942
1943 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1944 {
1945         struct r8152 *tp = netdev_priv(netdev);
1946         u32 mc_filter[2];       /* Multicast hash filter */
1947         __le32 tmp[2];
1948         u32 ocp_data;
1949
1950         netif_stop_queue(netdev);
1951         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1952         ocp_data &= ~RCR_ACPT_ALL;
1953         ocp_data |= RCR_AB | RCR_APM;
1954
1955         if (netdev->flags & IFF_PROMISC) {
1956                 /* Unconditionally log net taps. */
1957                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1958                 ocp_data |= RCR_AM | RCR_AAP;
1959                 mc_filter[1] = 0xffffffff;
1960                 mc_filter[0] = 0xffffffff;
1961         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1962                    (netdev->flags & IFF_ALLMULTI)) {
1963                 /* Too many to filter perfectly -- accept all multicasts. */
1964                 ocp_data |= RCR_AM;
1965                 mc_filter[1] = 0xffffffff;
1966                 mc_filter[0] = 0xffffffff;
1967         } else {
1968                 struct netdev_hw_addr *ha;
1969
1970                 mc_filter[1] = 0;
1971                 mc_filter[0] = 0;
1972                 netdev_for_each_mc_addr(ha, netdev) {
1973                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1974
1975                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1976                         ocp_data |= RCR_AM;
1977                 }
1978         }
1979
1980         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1981         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1982
1983         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1984         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1985         netif_wake_queue(netdev);
1986 }
1987
1988 static netdev_features_t
1989 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1990                        netdev_features_t features)
1991 {
1992         u32 mss = skb_shinfo(skb)->gso_size;
1993         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1994         int offset = skb_transport_offset(skb);
1995
1996         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1997                 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
1998         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
1999                 features &= ~NETIF_F_GSO_MASK;
2000
2001         return features;
2002 }
2003
2004 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2005                                       struct net_device *netdev)
2006 {
2007         struct r8152 *tp = netdev_priv(netdev);
2008
2009         skb_tx_timestamp(skb);
2010
2011         skb_queue_tail(&tp->tx_queue, skb);
2012
2013         if (!list_empty(&tp->tx_free)) {
2014                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2015                         set_bit(SCHEDULE_NAPI, &tp->flags);
2016                         schedule_delayed_work(&tp->schedule, 0);
2017                 } else {
2018                         usb_mark_last_busy(tp->udev);
2019                         napi_schedule(&tp->napi);
2020                 }
2021         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2022                 netif_stop_queue(netdev);
2023         }
2024
2025         return NETDEV_TX_OK;
2026 }
2027
2028 static void r8152b_reset_packet_filter(struct r8152 *tp)
2029 {
2030         u32     ocp_data;
2031
2032         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2033         ocp_data &= ~FMC_FCR_MCU_EN;
2034         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2035         ocp_data |= FMC_FCR_MCU_EN;
2036         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2037 }
2038
2039 static void rtl8152_nic_reset(struct r8152 *tp)
2040 {
2041         int     i;
2042
2043         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2044
2045         for (i = 0; i < 1000; i++) {
2046                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2047                         break;
2048                 usleep_range(100, 400);
2049         }
2050 }
2051
2052 static void set_tx_qlen(struct r8152 *tp)
2053 {
2054         struct net_device *netdev = tp->netdev;
2055
2056         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2057                                     sizeof(struct tx_desc));
2058 }
2059
2060 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2061 {
2062         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2063 }
2064
2065 static void rtl_set_eee_plus(struct r8152 *tp)
2066 {
2067         u32 ocp_data;
2068         u8 speed;
2069
2070         speed = rtl8152_get_speed(tp);
2071         if (speed & _10bps) {
2072                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2073                 ocp_data |= EEEP_CR_EEEP_TX;
2074                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2075         } else {
2076                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2077                 ocp_data &= ~EEEP_CR_EEEP_TX;
2078                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2079         }
2080 }
2081
2082 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2083 {
2084         u32 ocp_data;
2085
2086         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2087         if (enable)
2088                 ocp_data |= RXDY_GATED_EN;
2089         else
2090                 ocp_data &= ~RXDY_GATED_EN;
2091         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2092 }
2093
2094 static int rtl_start_rx(struct r8152 *tp)
2095 {
2096         int i, ret = 0;
2097
2098         INIT_LIST_HEAD(&tp->rx_done);
2099         for (i = 0; i < RTL8152_MAX_RX; i++) {
2100                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2101                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2102                 if (ret)
2103                         break;
2104         }
2105
2106         if (ret && ++i < RTL8152_MAX_RX) {
2107                 struct list_head rx_queue;
2108                 unsigned long flags;
2109
2110                 INIT_LIST_HEAD(&rx_queue);
2111
2112                 do {
2113                         struct rx_agg *agg = &tp->rx_info[i++];
2114                         struct urb *urb = agg->urb;
2115
2116                         urb->actual_length = 0;
2117                         list_add_tail(&agg->list, &rx_queue);
2118                 } while (i < RTL8152_MAX_RX);
2119
2120                 spin_lock_irqsave(&tp->rx_lock, flags);
2121                 list_splice_tail(&rx_queue, &tp->rx_done);
2122                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2123         }
2124
2125         return ret;
2126 }
2127
2128 static int rtl_stop_rx(struct r8152 *tp)
2129 {
2130         int i;
2131
2132         for (i = 0; i < RTL8152_MAX_RX; i++)
2133                 usb_kill_urb(tp->rx_info[i].urb);
2134
2135         while (!skb_queue_empty(&tp->rx_queue))
2136                 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2137
2138         return 0;
2139 }
2140
2141 static int rtl_enable(struct r8152 *tp)
2142 {
2143         u32 ocp_data;
2144
2145         r8152b_reset_packet_filter(tp);
2146
2147         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2148         ocp_data |= CR_RE | CR_TE;
2149         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2150
2151         rxdy_gated_en(tp, false);
2152
2153         return 0;
2154 }
2155
2156 static int rtl8152_enable(struct r8152 *tp)
2157 {
2158         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2159                 return -ENODEV;
2160
2161         set_tx_qlen(tp);
2162         rtl_set_eee_plus(tp);
2163
2164         return rtl_enable(tp);
2165 }
2166
2167 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2168 {
2169         u32 ocp_data = tp->coalesce / 8;
2170
2171         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2172 }
2173
2174 static void r8153_set_rx_early_size(struct r8152 *tp)
2175 {
2176         u32 mtu = tp->netdev->mtu;
2177         u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 8;
2178
2179         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2180 }
2181
2182 static int rtl8153_enable(struct r8152 *tp)
2183 {
2184         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2185                 return -ENODEV;
2186
2187         usb_disable_lpm(tp->udev);
2188         set_tx_qlen(tp);
2189         rtl_set_eee_plus(tp);
2190         r8153_set_rx_early_timeout(tp);
2191         r8153_set_rx_early_size(tp);
2192
2193         return rtl_enable(tp);
2194 }
2195
2196 static void rtl_disable(struct r8152 *tp)
2197 {
2198         u32 ocp_data;
2199         int i;
2200
2201         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2202                 rtl_drop_queued_tx(tp);
2203                 return;
2204         }
2205
2206         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2207         ocp_data &= ~RCR_ACPT_ALL;
2208         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2209
2210         rtl_drop_queued_tx(tp);
2211
2212         for (i = 0; i < RTL8152_MAX_TX; i++)
2213                 usb_kill_urb(tp->tx_info[i].urb);
2214
2215         rxdy_gated_en(tp, true);
2216
2217         for (i = 0; i < 1000; i++) {
2218                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2219                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2220                         break;
2221                 usleep_range(1000, 2000);
2222         }
2223
2224         for (i = 0; i < 1000; i++) {
2225                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2226                         break;
2227                 usleep_range(1000, 2000);
2228         }
2229
2230         rtl_stop_rx(tp);
2231
2232         rtl8152_nic_reset(tp);
2233 }
2234
2235 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2236 {
2237         u32 ocp_data;
2238
2239         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2240         if (enable)
2241                 ocp_data |= POWER_CUT;
2242         else
2243                 ocp_data &= ~POWER_CUT;
2244         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2245
2246         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2247         ocp_data &= ~RESUME_INDICATE;
2248         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2249 }
2250
2251 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2252 {
2253         u32 ocp_data;
2254
2255         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2256         if (enable)
2257                 ocp_data |= CPCR_RX_VLAN;
2258         else
2259                 ocp_data &= ~CPCR_RX_VLAN;
2260         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2261 }
2262
2263 static int rtl8152_set_features(struct net_device *dev,
2264                                 netdev_features_t features)
2265 {
2266         netdev_features_t changed = features ^ dev->features;
2267         struct r8152 *tp = netdev_priv(dev);
2268         int ret;
2269
2270         ret = usb_autopm_get_interface(tp->intf);
2271         if (ret < 0)
2272                 goto out;
2273
2274         mutex_lock(&tp->control);
2275
2276         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2277                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2278                         rtl_rx_vlan_en(tp, true);
2279                 else
2280                         rtl_rx_vlan_en(tp, false);
2281         }
2282
2283         mutex_unlock(&tp->control);
2284
2285         usb_autopm_put_interface(tp->intf);
2286
2287 out:
2288         return ret;
2289 }
2290
2291 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2292
2293 static u32 __rtl_get_wol(struct r8152 *tp)
2294 {
2295         u32 ocp_data;
2296         u32 wolopts = 0;
2297
2298         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2299         if (!(ocp_data & LAN_WAKE_EN))
2300                 return 0;
2301
2302         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2303         if (ocp_data & LINK_ON_WAKE_EN)
2304                 wolopts |= WAKE_PHY;
2305
2306         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2307         if (ocp_data & UWF_EN)
2308                 wolopts |= WAKE_UCAST;
2309         if (ocp_data & BWF_EN)
2310                 wolopts |= WAKE_BCAST;
2311         if (ocp_data & MWF_EN)
2312                 wolopts |= WAKE_MCAST;
2313
2314         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2315         if (ocp_data & MAGIC_EN)
2316                 wolopts |= WAKE_MAGIC;
2317
2318         return wolopts;
2319 }
2320
2321 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2322 {
2323         u32 ocp_data;
2324
2325         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2326
2327         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2328         ocp_data &= ~LINK_ON_WAKE_EN;
2329         if (wolopts & WAKE_PHY)
2330                 ocp_data |= LINK_ON_WAKE_EN;
2331         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2332
2333         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2334         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2335         if (wolopts & WAKE_UCAST)
2336                 ocp_data |= UWF_EN;
2337         if (wolopts & WAKE_BCAST)
2338                 ocp_data |= BWF_EN;
2339         if (wolopts & WAKE_MCAST)
2340                 ocp_data |= MWF_EN;
2341         if (wolopts & WAKE_ANY)
2342                 ocp_data |= LAN_WAKE_EN;
2343         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2344
2345         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2346
2347         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2348         ocp_data &= ~MAGIC_EN;
2349         if (wolopts & WAKE_MAGIC)
2350                 ocp_data |= MAGIC_EN;
2351         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2352
2353         if (wolopts & WAKE_ANY)
2354                 device_set_wakeup_enable(&tp->udev->dev, true);
2355         else
2356                 device_set_wakeup_enable(&tp->udev->dev, false);
2357 }
2358
2359 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2360 {
2361         u8 u1u2[8];
2362
2363         if (enable)
2364                 memset(u1u2, 0xff, sizeof(u1u2));
2365         else
2366                 memset(u1u2, 0x00, sizeof(u1u2));
2367
2368         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2369 }
2370
2371 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2372 {
2373         u32 ocp_data;
2374
2375         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2376         if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2377                 ocp_data |= U2P3_ENABLE;
2378         else
2379                 ocp_data &= ~U2P3_ENABLE;
2380         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2381 }
2382
2383 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2384 {
2385         u32 ocp_data;
2386
2387         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2388         if (enable)
2389                 ocp_data |= PWR_EN | PHASE2_EN;
2390         else
2391                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2392         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2393
2394         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2395         ocp_data &= ~PCUT_STATUS;
2396         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2397 }
2398
2399 static bool rtl_can_wakeup(struct r8152 *tp)
2400 {
2401         struct usb_device *udev = tp->udev;
2402
2403         return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2404 }
2405
2406 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2407 {
2408         if (enable) {
2409                 u32 ocp_data;
2410
2411                 r8153_u1u2en(tp, false);
2412                 r8153_u2p3en(tp, false);
2413
2414                 __rtl_set_wol(tp, WAKE_ANY);
2415
2416                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2417
2418                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2419                 ocp_data |= LINK_OFF_WAKE_EN;
2420                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2421
2422                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2423         } else {
2424                 u32 ocp_data;
2425
2426                 __rtl_set_wol(tp, tp->saved_wolopts);
2427
2428                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2429
2430                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2431                 ocp_data &= ~LINK_OFF_WAKE_EN;
2432                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2433
2434                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2435
2436                 r8153_u2p3en(tp, true);
2437                 r8153_u1u2en(tp, true);
2438         }
2439 }
2440
2441 static void rtl_phy_reset(struct r8152 *tp)
2442 {
2443         u16 data;
2444         int i;
2445
2446         data = r8152_mdio_read(tp, MII_BMCR);
2447
2448         /* don't reset again before the previous one complete */
2449         if (data & BMCR_RESET)
2450                 return;
2451
2452         data |= BMCR_RESET;
2453         r8152_mdio_write(tp, MII_BMCR, data);
2454
2455         for (i = 0; i < 50; i++) {
2456                 msleep(20);
2457                 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2458                         break;
2459         }
2460 }
2461
2462 static void r8153_teredo_off(struct r8152 *tp)
2463 {
2464         u32 ocp_data;
2465
2466         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2467         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2468         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2469
2470         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2471         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2472         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2473 }
2474
2475 static void rtl_reset_bmu(struct r8152 *tp)
2476 {
2477         u32 ocp_data;
2478
2479         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2480         ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2481         ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2482         ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2483         ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2484 }
2485
2486 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2487 {
2488         if (enable) {
2489                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2490                                                     LINKENA | DIS_SDSAVE);
2491         } else {
2492                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2493                                                     DIS_SDSAVE);
2494                 msleep(20);
2495         }
2496 }
2497
2498 static void rtl8152_disable(struct r8152 *tp)
2499 {
2500         r8152_aldps_en(tp, false);
2501         rtl_disable(tp);
2502         r8152_aldps_en(tp, true);
2503 }
2504
2505 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2506 {
2507         u16 data;
2508
2509         data = r8152_mdio_read(tp, MII_BMCR);
2510         if (data & BMCR_PDOWN) {
2511                 data &= ~BMCR_PDOWN;
2512                 r8152_mdio_write(tp, MII_BMCR, data);
2513         }
2514
2515         set_bit(PHY_RESET, &tp->flags);
2516 }
2517
2518 static void r8152b_exit_oob(struct r8152 *tp)
2519 {
2520         u32 ocp_data;
2521         int i;
2522
2523         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2524         ocp_data &= ~RCR_ACPT_ALL;
2525         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2526
2527         rxdy_gated_en(tp, true);
2528         r8153_teredo_off(tp);
2529         r8152b_hw_phy_cfg(tp);
2530
2531         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2532         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2533
2534         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2535         ocp_data &= ~NOW_IS_OOB;
2536         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2537
2538         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2539         ocp_data &= ~MCU_BORW_EN;
2540         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2541
2542         for (i = 0; i < 1000; i++) {
2543                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2544                 if (ocp_data & LINK_LIST_READY)
2545                         break;
2546                 usleep_range(1000, 2000);
2547         }
2548
2549         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2550         ocp_data |= RE_INIT_LL;
2551         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2552
2553         for (i = 0; i < 1000; i++) {
2554                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2555                 if (ocp_data & LINK_LIST_READY)
2556                         break;
2557                 usleep_range(1000, 2000);
2558         }
2559
2560         rtl8152_nic_reset(tp);
2561
2562         /* rx share fifo credit full threshold */
2563         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2564
2565         if (tp->udev->speed == USB_SPEED_FULL ||
2566             tp->udev->speed == USB_SPEED_LOW) {
2567                 /* rx share fifo credit near full threshold */
2568                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2569                                 RXFIFO_THR2_FULL);
2570                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2571                                 RXFIFO_THR3_FULL);
2572         } else {
2573                 /* rx share fifo credit near full threshold */
2574                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2575                                 RXFIFO_THR2_HIGH);
2576                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2577                                 RXFIFO_THR3_HIGH);
2578         }
2579
2580         /* TX share fifo free credit full threshold */
2581         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2582
2583         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2584         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2585         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2586                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2587
2588         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2589
2590         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2591
2592         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2593         ocp_data |= TCR0_AUTO_FIFO;
2594         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2595 }
2596
2597 static void r8152b_enter_oob(struct r8152 *tp)
2598 {
2599         u32 ocp_data;
2600         int i;
2601
2602         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2603         ocp_data &= ~NOW_IS_OOB;
2604         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2605
2606         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2607         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2608         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2609
2610         rtl_disable(tp);
2611
2612         for (i = 0; i < 1000; i++) {
2613                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2614                 if (ocp_data & LINK_LIST_READY)
2615                         break;
2616                 usleep_range(1000, 2000);
2617         }
2618
2619         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2620         ocp_data |= RE_INIT_LL;
2621         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2622
2623         for (i = 0; i < 1000; i++) {
2624                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2625                 if (ocp_data & LINK_LIST_READY)
2626                         break;
2627                 usleep_range(1000, 2000);
2628         }
2629
2630         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2631
2632         rtl_rx_vlan_en(tp, true);
2633
2634         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2635         ocp_data |= ALDPS_PROXY_MODE;
2636         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2637
2638         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2639         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2640         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2641
2642         rxdy_gated_en(tp, false);
2643
2644         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2645         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2646         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2647 }
2648
2649 static void r8153_hw_phy_cfg(struct r8152 *tp)
2650 {
2651         u32 ocp_data;
2652         u16 data;
2653
2654         if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
2655             tp->version == RTL_VER_05)
2656                 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2657
2658         data = r8152_mdio_read(tp, MII_BMCR);
2659         if (data & BMCR_PDOWN) {
2660                 data &= ~BMCR_PDOWN;
2661                 r8152_mdio_write(tp, MII_BMCR, data);
2662         }
2663
2664         if (tp->version == RTL_VER_03) {
2665                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2666                 data &= ~CTAP_SHORT_EN;
2667                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2668         }
2669
2670         data = ocp_reg_read(tp, OCP_POWER_CFG);
2671         data |= EEE_CLKDIV_EN;
2672         ocp_reg_write(tp, OCP_POWER_CFG, data);
2673
2674         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2675         data |= EN_10M_BGOFF;
2676         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2677         data = ocp_reg_read(tp, OCP_POWER_CFG);
2678         data |= EN_10M_PLLOFF;
2679         ocp_reg_write(tp, OCP_POWER_CFG, data);
2680         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2681
2682         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2683         ocp_data |= PFM_PWM_SWITCH;
2684         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2685
2686         /* Enable LPF corner auto tune */
2687         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2688
2689         /* Adjust 10M Amplitude */
2690         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2691         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2692
2693         set_bit(PHY_RESET, &tp->flags);
2694 }
2695
2696 static void r8153_first_init(struct r8152 *tp)
2697 {
2698         u32 ocp_data;
2699         int i;
2700
2701         rxdy_gated_en(tp, true);
2702         r8153_teredo_off(tp);
2703
2704         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2705         ocp_data &= ~RCR_ACPT_ALL;
2706         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2707
2708         r8153_hw_phy_cfg(tp);
2709
2710         rtl8152_nic_reset(tp);
2711         rtl_reset_bmu(tp);
2712
2713         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2714         ocp_data &= ~NOW_IS_OOB;
2715         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2716
2717         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2718         ocp_data &= ~MCU_BORW_EN;
2719         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2720
2721         for (i = 0; i < 1000; i++) {
2722                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2723                 if (ocp_data & LINK_LIST_READY)
2724                         break;
2725                 usleep_range(1000, 2000);
2726         }
2727
2728         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2729         ocp_data |= RE_INIT_LL;
2730         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2731
2732         for (i = 0; i < 1000; i++) {
2733                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2734                 if (ocp_data & LINK_LIST_READY)
2735                         break;
2736                 usleep_range(1000, 2000);
2737         }
2738
2739         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2740
2741         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2742         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2743
2744         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2745         ocp_data |= TCR0_AUTO_FIFO;
2746         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2747
2748         rtl8152_nic_reset(tp);
2749
2750         /* rx share fifo credit full threshold */
2751         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2752         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2753         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2754         /* TX share fifo free credit full threshold */
2755         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2756
2757         /* rx aggregation */
2758         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2759         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2760         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2761 }
2762
2763 static void r8153_enter_oob(struct r8152 *tp)
2764 {
2765         u32 ocp_data;
2766         int i;
2767
2768         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2769         ocp_data &= ~NOW_IS_OOB;
2770         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2771
2772         rtl_disable(tp);
2773         rtl_reset_bmu(tp);
2774
2775         for (i = 0; i < 1000; i++) {
2776                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2777                 if (ocp_data & LINK_LIST_READY)
2778                         break;
2779                 usleep_range(1000, 2000);
2780         }
2781
2782         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2783         ocp_data |= RE_INIT_LL;
2784         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2785
2786         for (i = 0; i < 1000; i++) {
2787                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2788                 if (ocp_data & LINK_LIST_READY)
2789                         break;
2790                 usleep_range(1000, 2000);
2791         }
2792
2793         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2794
2795         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2796         ocp_data &= ~TEREDO_WAKE_MASK;
2797         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2798
2799         rtl_rx_vlan_en(tp, true);
2800
2801         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2802         ocp_data |= ALDPS_PROXY_MODE;
2803         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2804
2805         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2806         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2807         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2808
2809         rxdy_gated_en(tp, false);
2810
2811         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2812         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2813         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2814 }
2815
2816 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2817 {
2818         u16 data;
2819
2820         data = ocp_reg_read(tp, OCP_POWER_CFG);
2821         if (enable) {
2822                 data |= EN_ALDPS;
2823                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2824         } else {
2825                 data &= ~EN_ALDPS;
2826                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2827                 msleep(20);
2828         }
2829 }
2830
2831 static void rtl8153_disable(struct r8152 *tp)
2832 {
2833         r8153_aldps_en(tp, false);
2834         rtl_disable(tp);
2835         rtl_reset_bmu(tp);
2836         r8153_aldps_en(tp, true);
2837         usb_enable_lpm(tp->udev);
2838 }
2839
2840 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2841 {
2842         u16 bmcr, anar, gbcr;
2843         int ret = 0;
2844
2845         cancel_delayed_work_sync(&tp->schedule);
2846         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2847         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2848                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2849         if (tp->mii.supports_gmii) {
2850                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2851                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2852         } else {
2853                 gbcr = 0;
2854         }
2855
2856         if (autoneg == AUTONEG_DISABLE) {
2857                 if (speed == SPEED_10) {
2858                         bmcr = 0;
2859                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2860                 } else if (speed == SPEED_100) {
2861                         bmcr = BMCR_SPEED100;
2862                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2863                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2864                         bmcr = BMCR_SPEED1000;
2865                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2866                 } else {
2867                         ret = -EINVAL;
2868                         goto out;
2869                 }
2870
2871                 if (duplex == DUPLEX_FULL)
2872                         bmcr |= BMCR_FULLDPLX;
2873         } else {
2874                 if (speed == SPEED_10) {
2875                         if (duplex == DUPLEX_FULL)
2876                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2877                         else
2878                                 anar |= ADVERTISE_10HALF;
2879                 } else if (speed == SPEED_100) {
2880                         if (duplex == DUPLEX_FULL) {
2881                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2882                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2883                         } else {
2884                                 anar |= ADVERTISE_10HALF;
2885                                 anar |= ADVERTISE_100HALF;
2886                         }
2887                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2888                         if (duplex == DUPLEX_FULL) {
2889                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2890                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2891                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2892                         } else {
2893                                 anar |= ADVERTISE_10HALF;
2894                                 anar |= ADVERTISE_100HALF;
2895                                 gbcr |= ADVERTISE_1000HALF;
2896                         }
2897                 } else {
2898                         ret = -EINVAL;
2899                         goto out;
2900                 }
2901
2902                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2903         }
2904
2905         if (test_bit(PHY_RESET, &tp->flags))
2906                 bmcr |= BMCR_RESET;
2907
2908         if (tp->mii.supports_gmii)
2909                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2910
2911         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2912         r8152_mdio_write(tp, MII_BMCR, bmcr);
2913
2914         if (test_and_clear_bit(PHY_RESET, &tp->flags)) {
2915                 int i;
2916
2917                 for (i = 0; i < 50; i++) {
2918                         msleep(20);
2919                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2920                                 break;
2921                 }
2922         }
2923
2924 out:
2925         return ret;
2926 }
2927
2928 static void rtl8152_up(struct r8152 *tp)
2929 {
2930         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2931                 return;
2932
2933         r8152_aldps_en(tp, false);
2934         r8152b_exit_oob(tp);
2935         r8152_aldps_en(tp, true);
2936 }
2937
2938 static void rtl8152_down(struct r8152 *tp)
2939 {
2940         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2941                 rtl_drop_queued_tx(tp);
2942                 return;
2943         }
2944
2945         r8152_power_cut_en(tp, false);
2946         r8152_aldps_en(tp, false);
2947         r8152b_enter_oob(tp);
2948         r8152_aldps_en(tp, true);
2949 }
2950
2951 static void rtl8153_up(struct r8152 *tp)
2952 {
2953         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2954                 return;
2955
2956         r8153_u1u2en(tp, false);
2957         r8153_aldps_en(tp, false);
2958         r8153_first_init(tp);
2959         r8153_aldps_en(tp, true);
2960         r8153_u2p3en(tp, true);
2961         r8153_u1u2en(tp, true);
2962         usb_enable_lpm(tp->udev);
2963 }
2964
2965 static void rtl8153_down(struct r8152 *tp)
2966 {
2967         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2968                 rtl_drop_queued_tx(tp);
2969                 return;
2970         }
2971
2972         r8153_u1u2en(tp, false);
2973         r8153_u2p3en(tp, false);
2974         r8153_power_cut_en(tp, false);
2975         r8153_aldps_en(tp, false);
2976         r8153_enter_oob(tp);
2977         r8153_aldps_en(tp, true);
2978 }
2979
2980 static bool rtl8152_in_nway(struct r8152 *tp)
2981 {
2982         u16 nway_state;
2983
2984         ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
2985         tp->ocp_base = 0x2000;
2986         ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c);         /* phy state */
2987         nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
2988
2989         /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
2990         if (nway_state & 0xc000)
2991                 return false;
2992         else
2993                 return true;
2994 }
2995
2996 static bool rtl8153_in_nway(struct r8152 *tp)
2997 {
2998         u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
2999
3000         if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3001                 return false;
3002         else
3003                 return true;
3004 }
3005
3006 static void set_carrier(struct r8152 *tp)
3007 {
3008         struct net_device *netdev = tp->netdev;
3009         u8 speed;
3010
3011         speed = rtl8152_get_speed(tp);
3012
3013         if (speed & LINK_STATUS) {
3014                 if (!netif_carrier_ok(netdev)) {
3015                         tp->rtl_ops.enable(tp);
3016                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3017                         napi_disable(&tp->napi);
3018                         netif_carrier_on(netdev);
3019                         rtl_start_rx(tp);
3020                         napi_enable(&tp->napi);
3021                 }
3022         } else {
3023                 if (netif_carrier_ok(netdev)) {
3024                         netif_carrier_off(netdev);
3025                         napi_disable(&tp->napi);
3026                         tp->rtl_ops.disable(tp);
3027                         napi_enable(&tp->napi);
3028                 }
3029         }
3030 }
3031
3032 static void rtl_work_func_t(struct work_struct *work)
3033 {
3034         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3035
3036         /* If the device is unplugged or !netif_running(), the workqueue
3037          * doesn't need to wake the device, and could return directly.
3038          */
3039         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3040                 return;
3041
3042         if (usb_autopm_get_interface(tp->intf) < 0)
3043                 return;
3044
3045         if (!test_bit(WORK_ENABLE, &tp->flags))
3046                 goto out1;
3047
3048         if (!mutex_trylock(&tp->control)) {
3049                 schedule_delayed_work(&tp->schedule, 0);
3050                 goto out1;
3051         }
3052
3053         if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3054                 set_carrier(tp);
3055
3056         if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3057                 _rtl8152_set_rx_mode(tp->netdev);
3058
3059         /* don't schedule napi before linking */
3060         if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3061             netif_carrier_ok(tp->netdev))
3062                 napi_schedule(&tp->napi);
3063
3064         if (test_and_clear_bit(PHY_RESET, &tp->flags))
3065                 rtl_phy_reset(tp);
3066
3067         mutex_unlock(&tp->control);
3068
3069 out1:
3070         usb_autopm_put_interface(tp->intf);
3071 }
3072
3073 #ifdef CONFIG_PM_SLEEP
3074 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3075                         void *data)
3076 {
3077         struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3078
3079         switch (action) {
3080         case PM_HIBERNATION_PREPARE:
3081         case PM_SUSPEND_PREPARE:
3082                 usb_autopm_get_interface(tp->intf);
3083                 break;
3084
3085         case PM_POST_HIBERNATION:
3086         case PM_POST_SUSPEND:
3087                 usb_autopm_put_interface(tp->intf);
3088                 break;
3089
3090         case PM_POST_RESTORE:
3091         case PM_RESTORE_PREPARE:
3092         default:
3093                 break;
3094         }
3095
3096         return NOTIFY_DONE;
3097 }
3098 #endif
3099
3100 static int rtl8152_open(struct net_device *netdev)
3101 {
3102         struct r8152 *tp = netdev_priv(netdev);
3103         int res = 0;
3104
3105         res = alloc_all_mem(tp);
3106         if (res)
3107                 goto out;
3108
3109         netif_carrier_off(netdev);
3110
3111         res = usb_autopm_get_interface(tp->intf);
3112         if (res < 0) {
3113                 free_all_mem(tp);
3114                 goto out;
3115         }
3116
3117         mutex_lock(&tp->control);
3118
3119         tp->rtl_ops.up(tp);
3120
3121         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3122                           tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3123                           DUPLEX_FULL);
3124         netif_carrier_off(netdev);
3125         netif_start_queue(netdev);
3126         set_bit(WORK_ENABLE, &tp->flags);
3127
3128         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3129         if (res) {
3130                 if (res == -ENODEV)
3131                         netif_device_detach(tp->netdev);
3132                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3133                            res);
3134                 free_all_mem(tp);
3135         } else {
3136                 napi_enable(&tp->napi);
3137         }
3138
3139         mutex_unlock(&tp->control);
3140
3141         usb_autopm_put_interface(tp->intf);
3142 #ifdef CONFIG_PM_SLEEP
3143         tp->pm_notifier.notifier_call = rtl_notifier;
3144         register_pm_notifier(&tp->pm_notifier);
3145 #endif
3146
3147 out:
3148         return res;
3149 }
3150
3151 static int rtl8152_close(struct net_device *netdev)
3152 {
3153         struct r8152 *tp = netdev_priv(netdev);
3154         int res = 0;
3155
3156 #ifdef CONFIG_PM_SLEEP
3157         unregister_pm_notifier(&tp->pm_notifier);
3158 #endif
3159         napi_disable(&tp->napi);
3160         clear_bit(WORK_ENABLE, &tp->flags);
3161         usb_kill_urb(tp->intr_urb);
3162         cancel_delayed_work_sync(&tp->schedule);
3163         netif_stop_queue(netdev);
3164
3165         res = usb_autopm_get_interface(tp->intf);
3166         if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3167                 rtl_drop_queued_tx(tp);
3168                 rtl_stop_rx(tp);
3169         } else {
3170                 mutex_lock(&tp->control);
3171
3172                 tp->rtl_ops.down(tp);
3173
3174                 mutex_unlock(&tp->control);
3175
3176                 usb_autopm_put_interface(tp->intf);
3177         }
3178
3179         free_all_mem(tp);
3180
3181         return res;
3182 }
3183
3184 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3185 {
3186         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3187         ocp_reg_write(tp, OCP_EEE_DATA, reg);
3188         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3189 }
3190
3191 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3192 {
3193         u16 data;
3194
3195         r8152_mmd_indirect(tp, dev, reg);
3196         data = ocp_reg_read(tp, OCP_EEE_DATA);
3197         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3198
3199         return data;
3200 }
3201
3202 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3203 {
3204         r8152_mmd_indirect(tp, dev, reg);
3205         ocp_reg_write(tp, OCP_EEE_DATA, data);
3206         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3207 }
3208
3209 static void r8152_eee_en(struct r8152 *tp, bool enable)
3210 {
3211         u16 config1, config2, config3;
3212         u32 ocp_data;
3213
3214         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3215         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3216         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3217         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3218
3219         if (enable) {
3220                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3221                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3222                 config1 |= sd_rise_time(1);
3223                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3224                 config3 |= fast_snr(42);
3225         } else {
3226                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3227                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3228                              RX_QUIET_EN);
3229                 config1 |= sd_rise_time(7);
3230                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3231                 config3 |= fast_snr(511);
3232         }
3233
3234         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3235         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3236         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3237         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3238 }
3239
3240 static void r8152b_enable_eee(struct r8152 *tp)
3241 {
3242         r8152_eee_en(tp, true);
3243         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3244 }
3245
3246 static void r8153_eee_en(struct r8152 *tp, bool enable)
3247 {
3248         u32 ocp_data;
3249         u16 config;
3250
3251         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3252         config = ocp_reg_read(tp, OCP_EEE_CFG);
3253
3254         if (enable) {
3255                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3256                 config |= EEE10_EN;
3257         } else {
3258                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3259                 config &= ~EEE10_EN;
3260         }
3261
3262         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3263         ocp_reg_write(tp, OCP_EEE_CFG, config);
3264 }
3265
3266 static void r8153_enable_eee(struct r8152 *tp)
3267 {
3268         r8153_eee_en(tp, true);
3269         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3270 }
3271
3272 static void r8152b_enable_fc(struct r8152 *tp)
3273 {
3274         u16 anar;
3275
3276         anar = r8152_mdio_read(tp, MII_ADVERTISE);
3277         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3278         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3279 }
3280
3281 static void rtl_tally_reset(struct r8152 *tp)
3282 {
3283         u32 ocp_data;
3284
3285         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3286         ocp_data |= TALLY_RESET;
3287         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3288 }
3289
3290 static void r8152b_init(struct r8152 *tp)
3291 {
3292         u32 ocp_data;
3293
3294         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3295                 return;
3296
3297         r8152_aldps_en(tp, false);
3298
3299         if (tp->version == RTL_VER_01) {
3300                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3301                 ocp_data &= ~LED_MODE_MASK;
3302                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3303         }
3304
3305         r8152_power_cut_en(tp, false);
3306
3307         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3308         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3309         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3310         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3311         ocp_data &= ~MCU_CLK_RATIO_MASK;
3312         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3313         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3314         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3315                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3316         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3317
3318         r8152b_enable_eee(tp);
3319         r8152_aldps_en(tp, true);
3320         r8152b_enable_fc(tp);
3321         rtl_tally_reset(tp);
3322
3323         /* enable rx aggregation */
3324         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3325         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3326         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3327 }
3328
3329 static void r8153_init(struct r8152 *tp)
3330 {
3331         u32 ocp_data;
3332         int i;
3333
3334         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3335                 return;
3336
3337         r8153_aldps_en(tp, false);
3338         r8153_u1u2en(tp, false);
3339
3340         for (i = 0; i < 500; i++) {
3341                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3342                     AUTOLOAD_DONE)
3343                         break;
3344                 msleep(20);
3345         }
3346
3347         for (i = 0; i < 500; i++) {
3348                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3349                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3350                         break;
3351                 msleep(20);
3352         }
3353
3354         usb_disable_lpm(tp->udev);
3355         r8153_u2p3en(tp, false);
3356
3357         if (tp->version == RTL_VER_04) {
3358                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3359                 ocp_data &= ~pwd_dn_scale_mask;
3360                 ocp_data |= pwd_dn_scale(96);
3361                 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3362
3363                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3364                 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3365                 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3366         } else if (tp->version == RTL_VER_05) {
3367                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3368                 ocp_data &= ~ECM_ALDPS;
3369                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3370
3371                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3372                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3373                         ocp_data &= ~DYNAMIC_BURST;
3374                 else
3375                         ocp_data |= DYNAMIC_BURST;
3376                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3377         } else if (tp->version == RTL_VER_06) {
3378                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3379                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3380                         ocp_data &= ~DYNAMIC_BURST;
3381                 else
3382                         ocp_data |= DYNAMIC_BURST;
3383                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3384         }
3385
3386         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3387         ocp_data |= EP4_FULL_FC;
3388         ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3389
3390         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3391         ocp_data &= ~TIMER11_EN;
3392         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3393
3394         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3395         ocp_data &= ~LED_MODE_MASK;
3396         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3397
3398         ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3399         if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3400                 ocp_data |= LPM_TIMER_500MS;
3401         else
3402                 ocp_data |= LPM_TIMER_500US;
3403         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3404
3405         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3406         ocp_data &= ~SEN_VAL_MASK;
3407         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3408         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3409
3410         ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3411
3412         r8153_power_cut_en(tp, false);
3413         r8153_u1u2en(tp, true);
3414
3415         /* MAC clock speed down */
3416         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
3417         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
3418         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
3419         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
3420
3421         r8153_enable_eee(tp);
3422         r8153_aldps_en(tp, true);
3423         r8152b_enable_fc(tp);
3424         rtl_tally_reset(tp);
3425         r8153_u2p3en(tp, true);
3426 }
3427
3428 static int rtl8152_pre_reset(struct usb_interface *intf)
3429 {
3430         struct r8152 *tp = usb_get_intfdata(intf);
3431         struct net_device *netdev;
3432
3433         if (!tp)
3434                 return 0;
3435
3436         netdev = tp->netdev;
3437         if (!netif_running(netdev))
3438                 return 0;
3439
3440         napi_disable(&tp->napi);
3441         clear_bit(WORK_ENABLE, &tp->flags);
3442         usb_kill_urb(tp->intr_urb);
3443         cancel_delayed_work_sync(&tp->schedule);
3444         if (netif_carrier_ok(netdev)) {
3445                 netif_stop_queue(netdev);
3446                 mutex_lock(&tp->control);
3447                 tp->rtl_ops.disable(tp);
3448                 mutex_unlock(&tp->control);
3449         }
3450
3451         return 0;
3452 }
3453
3454 static int rtl8152_post_reset(struct usb_interface *intf)
3455 {
3456         struct r8152 *tp = usb_get_intfdata(intf);
3457         struct net_device *netdev;
3458
3459         if (!tp)
3460                 return 0;
3461
3462         netdev = tp->netdev;
3463         if (!netif_running(netdev))
3464                 return 0;
3465
3466         set_bit(WORK_ENABLE, &tp->flags);
3467         if (netif_carrier_ok(netdev)) {
3468                 mutex_lock(&tp->control);
3469                 tp->rtl_ops.enable(tp);
3470                 rtl8152_set_rx_mode(netdev);
3471                 mutex_unlock(&tp->control);
3472                 netif_wake_queue(netdev);
3473         }
3474
3475         napi_enable(&tp->napi);
3476
3477         return 0;
3478 }
3479
3480 static bool delay_autosuspend(struct r8152 *tp)
3481 {
3482         bool sw_linking = !!netif_carrier_ok(tp->netdev);
3483         bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3484
3485         /* This means a linking change occurs and the driver doesn't detect it,
3486          * yet. If the driver has disabled tx/rx and hw is linking on, the
3487          * device wouldn't wake up by receiving any packet.
3488          */
3489         if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3490                 return true;
3491
3492         /* If the linking down is occurred by nway, the device may miss the
3493          * linking change event. And it wouldn't wake when linking on.
3494          */
3495         if (!sw_linking && tp->rtl_ops.in_nway(tp))
3496                 return true;
3497         else
3498                 return false;
3499 }
3500
3501 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3502 {
3503         struct r8152 *tp = usb_get_intfdata(intf);
3504         struct net_device *netdev = tp->netdev;
3505         int ret = 0;
3506
3507         mutex_lock(&tp->control);
3508
3509         if (PMSG_IS_AUTO(message)) {
3510                 if (netif_running(netdev) && delay_autosuspend(tp)) {
3511                         ret = -EBUSY;
3512                         goto out1;
3513                 }
3514
3515                 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3516         } else {
3517                 netif_device_detach(netdev);
3518         }
3519
3520         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3521                 clear_bit(WORK_ENABLE, &tp->flags);
3522                 usb_kill_urb(tp->intr_urb);
3523                 napi_disable(&tp->napi);
3524                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3525                         rtl_stop_rx(tp);
3526                         rtl_runtime_suspend_enable(tp, true);
3527                 } else {
3528                         cancel_delayed_work_sync(&tp->schedule);
3529                         tp->rtl_ops.down(tp);
3530                 }
3531                 napi_enable(&tp->napi);
3532         }
3533 out1:
3534         mutex_unlock(&tp->control);
3535
3536         return ret;
3537 }
3538
3539 static int rtl8152_resume(struct usb_interface *intf)
3540 {
3541         struct r8152 *tp = usb_get_intfdata(intf);
3542
3543         mutex_lock(&tp->control);
3544
3545         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3546                 tp->rtl_ops.init(tp);
3547                 netif_device_attach(tp->netdev);
3548         }
3549
3550         if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3551                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3552                         rtl_runtime_suspend_enable(tp, false);
3553                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3554                         napi_disable(&tp->napi);
3555                         set_bit(WORK_ENABLE, &tp->flags);
3556                         if (netif_carrier_ok(tp->netdev))
3557                                 rtl_start_rx(tp);
3558                         napi_enable(&tp->napi);
3559                 } else {
3560                         tp->rtl_ops.up(tp);
3561                         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3562                                           tp->mii.supports_gmii ?
3563                                           SPEED_1000 : SPEED_100,
3564                                           DUPLEX_FULL);
3565                         netif_carrier_off(tp->netdev);
3566                         set_bit(WORK_ENABLE, &tp->flags);
3567                 }
3568                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3569         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3570                 if (tp->netdev->flags & IFF_UP)
3571                         rtl_runtime_suspend_enable(tp, false);
3572                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3573         }
3574
3575         mutex_unlock(&tp->control);
3576
3577         return 0;
3578 }
3579
3580 static int rtl8152_reset_resume(struct usb_interface *intf)
3581 {
3582         struct r8152 *tp = usb_get_intfdata(intf);
3583
3584         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3585         return rtl8152_resume(intf);
3586 }
3587
3588 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3589 {
3590         struct r8152 *tp = netdev_priv(dev);
3591
3592         if (usb_autopm_get_interface(tp->intf) < 0)
3593                 return;
3594
3595         if (!rtl_can_wakeup(tp)) {
3596                 wol->supported = 0;
3597                 wol->wolopts = 0;
3598         } else {
3599                 mutex_lock(&tp->control);
3600                 wol->supported = WAKE_ANY;
3601                 wol->wolopts = __rtl_get_wol(tp);
3602                 mutex_unlock(&tp->control);
3603         }
3604
3605         usb_autopm_put_interface(tp->intf);
3606 }
3607
3608 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3609 {
3610         struct r8152 *tp = netdev_priv(dev);
3611         int ret;
3612
3613         if (!rtl_can_wakeup(tp))
3614                 return -EOPNOTSUPP;
3615
3616         ret = usb_autopm_get_interface(tp->intf);
3617         if (ret < 0)
3618                 goto out_set_wol;
3619
3620         mutex_lock(&tp->control);
3621
3622         __rtl_set_wol(tp, wol->wolopts);
3623         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3624
3625         mutex_unlock(&tp->control);
3626
3627         usb_autopm_put_interface(tp->intf);
3628
3629 out_set_wol:
3630         return ret;
3631 }
3632
3633 static u32 rtl8152_get_msglevel(struct net_device *dev)
3634 {
3635         struct r8152 *tp = netdev_priv(dev);
3636
3637         return tp->msg_enable;
3638 }
3639
3640 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3641 {
3642         struct r8152 *tp = netdev_priv(dev);
3643
3644         tp->msg_enable = value;
3645 }
3646
3647 static void rtl8152_get_drvinfo(struct net_device *netdev,
3648                                 struct ethtool_drvinfo *info)
3649 {
3650         struct r8152 *tp = netdev_priv(netdev);
3651
3652         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3653         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3654         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3655 }
3656
3657 static
3658 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3659 {
3660         struct r8152 *tp = netdev_priv(netdev);
3661         int ret;
3662
3663         if (!tp->mii.mdio_read)
3664                 return -EOPNOTSUPP;
3665
3666         ret = usb_autopm_get_interface(tp->intf);
3667         if (ret < 0)
3668                 goto out;
3669
3670         mutex_lock(&tp->control);
3671
3672         ret = mii_ethtool_gset(&tp->mii, cmd);
3673
3674         mutex_unlock(&tp->control);
3675
3676         usb_autopm_put_interface(tp->intf);
3677
3678 out:
3679         return ret;
3680 }
3681
3682 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3683 {
3684         struct r8152 *tp = netdev_priv(dev);
3685         int ret;
3686
3687         ret = usb_autopm_get_interface(tp->intf);
3688         if (ret < 0)
3689                 goto out;
3690
3691         mutex_lock(&tp->control);
3692
3693         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3694
3695         mutex_unlock(&tp->control);
3696
3697         usb_autopm_put_interface(tp->intf);
3698
3699 out:
3700         return ret;
3701 }
3702
3703 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3704         "tx_packets",
3705         "rx_packets",
3706         "tx_errors",
3707         "rx_errors",
3708         "rx_missed",
3709         "align_errors",
3710         "tx_single_collisions",
3711         "tx_multi_collisions",
3712         "rx_unicast",
3713         "rx_broadcast",
3714         "rx_multicast",
3715         "tx_aborted",
3716         "tx_underrun",
3717 };
3718
3719 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3720 {
3721         switch (sset) {
3722         case ETH_SS_STATS:
3723                 return ARRAY_SIZE(rtl8152_gstrings);
3724         default:
3725                 return -EOPNOTSUPP;
3726         }
3727 }
3728
3729 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3730                                       struct ethtool_stats *stats, u64 *data)
3731 {
3732         struct r8152 *tp = netdev_priv(dev);
3733         struct tally_counter tally;
3734
3735         if (usb_autopm_get_interface(tp->intf) < 0)
3736                 return;
3737
3738         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3739
3740         usb_autopm_put_interface(tp->intf);
3741
3742         data[0] = le64_to_cpu(tally.tx_packets);
3743         data[1] = le64_to_cpu(tally.rx_packets);
3744         data[2] = le64_to_cpu(tally.tx_errors);
3745         data[3] = le32_to_cpu(tally.rx_errors);
3746         data[4] = le16_to_cpu(tally.rx_missed);
3747         data[5] = le16_to_cpu(tally.align_errors);
3748         data[6] = le32_to_cpu(tally.tx_one_collision);
3749         data[7] = le32_to_cpu(tally.tx_multi_collision);
3750         data[8] = le64_to_cpu(tally.rx_unicast);
3751         data[9] = le64_to_cpu(tally.rx_broadcast);
3752         data[10] = le32_to_cpu(tally.rx_multicast);
3753         data[11] = le16_to_cpu(tally.tx_aborted);
3754         data[12] = le16_to_cpu(tally.tx_underrun);
3755 }
3756
3757 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3758 {
3759         switch (stringset) {
3760         case ETH_SS_STATS:
3761                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3762                 break;
3763         }
3764 }
3765
3766 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3767 {
3768         u32 ocp_data, lp, adv, supported = 0;
3769         u16 val;
3770
3771         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3772         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3773
3774         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3775         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3776
3777         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3778         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3779
3780         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3781         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3782
3783         eee->eee_enabled = !!ocp_data;
3784         eee->eee_active = !!(supported & adv & lp);
3785         eee->supported = supported;
3786         eee->advertised = adv;
3787         eee->lp_advertised = lp;
3788
3789         return 0;
3790 }
3791
3792 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3793 {
3794         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3795
3796         r8152_eee_en(tp, eee->eee_enabled);
3797
3798         if (!eee->eee_enabled)
3799                 val = 0;
3800
3801         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3802
3803         return 0;
3804 }
3805
3806 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3807 {
3808         u32 ocp_data, lp, adv, supported = 0;
3809         u16 val;
3810
3811         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3812         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3813
3814         val = ocp_reg_read(tp, OCP_EEE_ADV);
3815         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3816
3817         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3818         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3819
3820         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3821         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3822
3823         eee->eee_enabled = !!ocp_data;
3824         eee->eee_active = !!(supported & adv & lp);
3825         eee->supported = supported;
3826         eee->advertised = adv;
3827         eee->lp_advertised = lp;
3828
3829         return 0;
3830 }
3831
3832 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3833 {
3834         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3835
3836         r8153_eee_en(tp, eee->eee_enabled);
3837
3838         if (!eee->eee_enabled)
3839                 val = 0;
3840
3841         ocp_reg_write(tp, OCP_EEE_ADV, val);
3842
3843         return 0;
3844 }
3845
3846 static int
3847 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3848 {
3849         struct r8152 *tp = netdev_priv(net);
3850         int ret;
3851
3852         ret = usb_autopm_get_interface(tp->intf);
3853         if (ret < 0)
3854                 goto out;
3855
3856         mutex_lock(&tp->control);
3857
3858         ret = tp->rtl_ops.eee_get(tp, edata);
3859
3860         mutex_unlock(&tp->control);
3861
3862         usb_autopm_put_interface(tp->intf);
3863
3864 out:
3865         return ret;
3866 }
3867
3868 static int
3869 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3870 {
3871         struct r8152 *tp = netdev_priv(net);
3872         int ret;
3873
3874         ret = usb_autopm_get_interface(tp->intf);
3875         if (ret < 0)
3876                 goto out;
3877
3878         mutex_lock(&tp->control);
3879
3880         ret = tp->rtl_ops.eee_set(tp, edata);
3881         if (!ret)
3882                 ret = mii_nway_restart(&tp->mii);
3883
3884         mutex_unlock(&tp->control);
3885
3886         usb_autopm_put_interface(tp->intf);
3887
3888 out:
3889         return ret;
3890 }
3891
3892 static int rtl8152_nway_reset(struct net_device *dev)
3893 {
3894         struct r8152 *tp = netdev_priv(dev);
3895         int ret;
3896
3897         ret = usb_autopm_get_interface(tp->intf);
3898         if (ret < 0)
3899                 goto out;
3900
3901         mutex_lock(&tp->control);
3902
3903         ret = mii_nway_restart(&tp->mii);
3904
3905         mutex_unlock(&tp->control);
3906
3907         usb_autopm_put_interface(tp->intf);
3908
3909 out:
3910         return ret;
3911 }
3912
3913 static int rtl8152_get_coalesce(struct net_device *netdev,
3914                                 struct ethtool_coalesce *coalesce)
3915 {
3916         struct r8152 *tp = netdev_priv(netdev);
3917
3918         switch (tp->version) {
3919         case RTL_VER_01:
3920         case RTL_VER_02:
3921                 return -EOPNOTSUPP;
3922         default:
3923                 break;
3924         }
3925
3926         coalesce->rx_coalesce_usecs = tp->coalesce;
3927
3928         return 0;
3929 }
3930
3931 static int rtl8152_set_coalesce(struct net_device *netdev,
3932                                 struct ethtool_coalesce *coalesce)
3933 {
3934         struct r8152 *tp = netdev_priv(netdev);
3935         int ret;
3936
3937         switch (tp->version) {
3938         case RTL_VER_01:
3939         case RTL_VER_02:
3940                 return -EOPNOTSUPP;
3941         default:
3942                 break;
3943         }
3944
3945         if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
3946                 return -EINVAL;
3947
3948         ret = usb_autopm_get_interface(tp->intf);
3949         if (ret < 0)
3950                 return ret;
3951
3952         mutex_lock(&tp->control);
3953
3954         if (tp->coalesce != coalesce->rx_coalesce_usecs) {
3955                 tp->coalesce = coalesce->rx_coalesce_usecs;
3956
3957                 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
3958                         r8153_set_rx_early_timeout(tp);
3959         }
3960
3961         mutex_unlock(&tp->control);
3962
3963         usb_autopm_put_interface(tp->intf);
3964
3965         return ret;
3966 }
3967
3968 static struct ethtool_ops ops = {
3969         .get_drvinfo = rtl8152_get_drvinfo,
3970         .get_settings = rtl8152_get_settings,
3971         .set_settings = rtl8152_set_settings,
3972         .get_link = ethtool_op_get_link,
3973         .nway_reset = rtl8152_nway_reset,
3974         .get_msglevel = rtl8152_get_msglevel,
3975         .set_msglevel = rtl8152_set_msglevel,
3976         .get_wol = rtl8152_get_wol,
3977         .set_wol = rtl8152_set_wol,
3978         .get_strings = rtl8152_get_strings,
3979         .get_sset_count = rtl8152_get_sset_count,
3980         .get_ethtool_stats = rtl8152_get_ethtool_stats,
3981         .get_coalesce = rtl8152_get_coalesce,
3982         .set_coalesce = rtl8152_set_coalesce,
3983         .get_eee = rtl_ethtool_get_eee,
3984         .set_eee = rtl_ethtool_set_eee,
3985 };
3986
3987 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3988 {
3989         struct r8152 *tp = netdev_priv(netdev);
3990         struct mii_ioctl_data *data = if_mii(rq);
3991         int res;
3992
3993         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3994                 return -ENODEV;
3995
3996         res = usb_autopm_get_interface(tp->intf);
3997         if (res < 0)
3998                 goto out;
3999
4000         switch (cmd) {
4001         case SIOCGMIIPHY:
4002                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4003                 break;
4004
4005         case SIOCGMIIREG:
4006                 mutex_lock(&tp->control);
4007                 data->val_out = r8152_mdio_read(tp, data->reg_num);
4008                 mutex_unlock(&tp->control);
4009                 break;
4010
4011         case SIOCSMIIREG:
4012                 if (!capable(CAP_NET_ADMIN)) {
4013                         res = -EPERM;
4014                         break;
4015                 }
4016                 mutex_lock(&tp->control);
4017                 r8152_mdio_write(tp, data->reg_num, data->val_in);
4018                 mutex_unlock(&tp->control);
4019                 break;
4020
4021         default:
4022                 res = -EOPNOTSUPP;
4023         }
4024
4025         usb_autopm_put_interface(tp->intf);
4026
4027 out:
4028         return res;
4029 }
4030
4031 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4032 {
4033         struct r8152 *tp = netdev_priv(dev);
4034         int ret;
4035
4036         switch (tp->version) {
4037         case RTL_VER_01:
4038         case RTL_VER_02:
4039                 return eth_change_mtu(dev, new_mtu);
4040         default:
4041                 break;
4042         }
4043
4044         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4045                 return -EINVAL;
4046
4047         ret = usb_autopm_get_interface(tp->intf);
4048         if (ret < 0)
4049                 return ret;
4050
4051         mutex_lock(&tp->control);
4052
4053         dev->mtu = new_mtu;
4054
4055         if (netif_running(dev) && netif_carrier_ok(dev))
4056                 r8153_set_rx_early_size(tp);
4057
4058         mutex_unlock(&tp->control);
4059
4060         usb_autopm_put_interface(tp->intf);
4061
4062         return ret;
4063 }
4064
4065 static const struct net_device_ops rtl8152_netdev_ops = {
4066         .ndo_open               = rtl8152_open,
4067         .ndo_stop               = rtl8152_close,
4068         .ndo_do_ioctl           = rtl8152_ioctl,
4069         .ndo_start_xmit         = rtl8152_start_xmit,
4070         .ndo_tx_timeout         = rtl8152_tx_timeout,
4071         .ndo_set_features       = rtl8152_set_features,
4072         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
4073         .ndo_set_mac_address    = rtl8152_set_mac_address,
4074         .ndo_change_mtu         = rtl8152_change_mtu,
4075         .ndo_validate_addr      = eth_validate_addr,
4076         .ndo_features_check     = rtl8152_features_check,
4077 };
4078
4079 static void r8152b_get_version(struct r8152 *tp)
4080 {
4081         u32     ocp_data;
4082         u16     version;
4083
4084         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4085         version = (u16)(ocp_data & VERSION_MASK);
4086
4087         switch (version) {
4088         case 0x4c00:
4089                 tp->version = RTL_VER_01;
4090                 break;
4091         case 0x4c10:
4092                 tp->version = RTL_VER_02;
4093                 break;
4094         case 0x5c00:
4095                 tp->version = RTL_VER_03;
4096                 tp->mii.supports_gmii = 1;
4097                 break;
4098         case 0x5c10:
4099                 tp->version = RTL_VER_04;
4100                 tp->mii.supports_gmii = 1;
4101                 break;
4102         case 0x5c20:
4103                 tp->version = RTL_VER_05;
4104                 tp->mii.supports_gmii = 1;
4105                 break;
4106         case 0x5c30:
4107                 tp->version = RTL_VER_06;
4108                 tp->mii.supports_gmii = 1;
4109                 break;
4110         default:
4111                 netif_info(tp, probe, tp->netdev,
4112                            "Unknown version 0x%04x\n", version);
4113                 break;
4114         }
4115 }
4116
4117 static void rtl8152_unload(struct r8152 *tp)
4118 {
4119         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4120                 return;
4121
4122         if (tp->version != RTL_VER_01)
4123                 r8152_power_cut_en(tp, true);
4124 }
4125
4126 static void rtl8153_unload(struct r8152 *tp)
4127 {
4128         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4129                 return;
4130
4131         r8153_power_cut_en(tp, false);
4132 }
4133
4134 static int rtl_ops_init(struct r8152 *tp)
4135 {
4136         struct rtl_ops *ops = &tp->rtl_ops;
4137         int ret = 0;
4138
4139         switch (tp->version) {
4140         case RTL_VER_01:
4141         case RTL_VER_02:
4142                 ops->init               = r8152b_init;
4143                 ops->enable             = rtl8152_enable;
4144                 ops->disable            = rtl8152_disable;
4145                 ops->up                 = rtl8152_up;
4146                 ops->down               = rtl8152_down;
4147                 ops->unload             = rtl8152_unload;
4148                 ops->eee_get            = r8152_get_eee;
4149                 ops->eee_set            = r8152_set_eee;
4150                 ops->in_nway            = rtl8152_in_nway;
4151                 break;
4152
4153         case RTL_VER_03:
4154         case RTL_VER_04:
4155         case RTL_VER_05:
4156         case RTL_VER_06:
4157                 ops->init               = r8153_init;
4158                 ops->enable             = rtl8153_enable;
4159                 ops->disable            = rtl8153_disable;
4160                 ops->up                 = rtl8153_up;
4161                 ops->down               = rtl8153_down;
4162                 ops->unload             = rtl8153_unload;
4163                 ops->eee_get            = r8153_get_eee;
4164                 ops->eee_set            = r8153_set_eee;
4165                 ops->in_nway            = rtl8153_in_nway;
4166                 break;
4167
4168         default:
4169                 ret = -ENODEV;
4170                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4171                 break;
4172         }
4173
4174         return ret;
4175 }
4176
4177 static int rtl8152_probe(struct usb_interface *intf,
4178                          const struct usb_device_id *id)
4179 {
4180         struct usb_device *udev = interface_to_usbdev(intf);
4181         struct r8152 *tp;
4182         struct net_device *netdev;
4183         int ret;
4184
4185         if (udev->actconfig->desc.bConfigurationValue != 1) {
4186                 usb_driver_set_configuration(udev, 1);
4187                 return -ENODEV;
4188         }
4189
4190         usb_reset_device(udev);
4191         netdev = alloc_etherdev(sizeof(struct r8152));
4192         if (!netdev) {
4193                 dev_err(&intf->dev, "Out of memory\n");
4194                 return -ENOMEM;
4195         }
4196
4197         SET_NETDEV_DEV(netdev, &intf->dev);
4198         tp = netdev_priv(netdev);
4199         tp->msg_enable = 0x7FFF;
4200
4201         tp->udev = udev;
4202         tp->netdev = netdev;
4203         tp->intf = intf;
4204
4205         r8152b_get_version(tp);
4206         ret = rtl_ops_init(tp);
4207         if (ret)
4208                 goto out;
4209
4210         mutex_init(&tp->control);
4211         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4212
4213         netdev->netdev_ops = &rtl8152_netdev_ops;
4214         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4215
4216         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4217                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4218                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4219                             NETIF_F_HW_VLAN_CTAG_TX;
4220         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4221                               NETIF_F_TSO | NETIF_F_FRAGLIST |
4222                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4223                               NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4224         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4225                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4226                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4227
4228         netdev->ethtool_ops = &ops;
4229         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4230
4231         tp->mii.dev = netdev;
4232         tp->mii.mdio_read = read_mii_word;
4233         tp->mii.mdio_write = write_mii_word;
4234         tp->mii.phy_id_mask = 0x3f;
4235         tp->mii.reg_num_mask = 0x1f;
4236         tp->mii.phy_id = R8152_PHY_ID;
4237
4238         switch (udev->speed) {
4239         case USB_SPEED_SUPER:
4240         case USB_SPEED_SUPER_PLUS:
4241                 tp->coalesce = COALESCE_SUPER;
4242                 break;
4243         case USB_SPEED_HIGH:
4244                 tp->coalesce = COALESCE_HIGH;
4245                 break;
4246         default:
4247                 tp->coalesce = COALESCE_SLOW;
4248                 break;
4249         }
4250
4251         intf->needs_remote_wakeup = 1;
4252
4253         tp->rtl_ops.init(tp);
4254         set_ethernet_addr(tp);
4255
4256         usb_set_intfdata(intf, tp);
4257         netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4258
4259         ret = register_netdev(netdev);
4260         if (ret != 0) {
4261                 netif_err(tp, probe, netdev, "couldn't register the device\n");
4262                 goto out1;
4263         }
4264
4265         if (!rtl_can_wakeup(tp))
4266                 __rtl_set_wol(tp, 0);
4267
4268         tp->saved_wolopts = __rtl_get_wol(tp);
4269         if (tp->saved_wolopts)
4270                 device_set_wakeup_enable(&udev->dev, true);
4271         else
4272                 device_set_wakeup_enable(&udev->dev, false);
4273
4274         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4275
4276         return 0;
4277
4278 out1:
4279         netif_napi_del(&tp->napi);
4280         usb_set_intfdata(intf, NULL);
4281 out:
4282         free_netdev(netdev);
4283         return ret;
4284 }
4285
4286 static void rtl8152_disconnect(struct usb_interface *intf)
4287 {
4288         struct r8152 *tp = usb_get_intfdata(intf);
4289
4290         usb_set_intfdata(intf, NULL);
4291         if (tp) {
4292                 struct usb_device *udev = tp->udev;
4293
4294                 if (udev->state == USB_STATE_NOTATTACHED)
4295                         set_bit(RTL8152_UNPLUG, &tp->flags);
4296
4297                 netif_napi_del(&tp->napi);
4298                 unregister_netdev(tp->netdev);
4299                 tp->rtl_ops.unload(tp);
4300                 free_netdev(tp->netdev);
4301         }
4302 }
4303
4304 #define REALTEK_USB_DEVICE(vend, prod)  \
4305         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4306                        USB_DEVICE_ID_MATCH_INT_CLASS, \
4307         .idVendor = (vend), \
4308         .idProduct = (prod), \
4309         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4310 }, \
4311 { \
4312         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4313                        USB_DEVICE_ID_MATCH_DEVICE, \
4314         .idVendor = (vend), \
4315         .idProduct = (prod), \
4316         .bInterfaceClass = USB_CLASS_COMM, \
4317         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4318         .bInterfaceProtocol = USB_CDC_PROTO_NONE
4319
4320 /* table of devices that work with this driver */
4321 static struct usb_device_id rtl8152_table[] = {
4322         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4323         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4324         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4325         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7205)},
4326         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x304f)},
4327         {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA,  0x09ff)},
4328         {}
4329 };
4330
4331 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4332
4333 static struct usb_driver rtl8152_driver = {
4334         .name =         MODULENAME,
4335         .id_table =     rtl8152_table,
4336         .probe =        rtl8152_probe,
4337         .disconnect =   rtl8152_disconnect,
4338         .suspend =      rtl8152_suspend,
4339         .resume =       rtl8152_resume,
4340         .reset_resume = rtl8152_reset_resume,
4341         .pre_reset =    rtl8152_pre_reset,
4342         .post_reset =   rtl8152_post_reset,
4343         .supports_autosuspend = 1,
4344         .disable_hub_initiated_lpm = 1,
4345 };
4346
4347 module_usb_driver(rtl8152_driver);
4348
4349 MODULE_AUTHOR(DRIVER_AUTHOR);
4350 MODULE_DESCRIPTION(DRIVER_DESC);
4351 MODULE_LICENSE("GPL");