Merge tag 'cris-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/jesper...
[cascardo/linux.git] / drivers / net / usb / r8152.c
1 /*
2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * version 2 as published by the Free Software Foundation.
7  *
8  */
9
10 #include <linux/signal.h>
11 #include <linux/slab.h>
12 #include <linux/module.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/mii.h>
16 #include <linux/ethtool.h>
17 #include <linux/usb.h>
18 #include <linux/crc32.h>
19 #include <linux/if_vlan.h>
20 #include <linux/uaccess.h>
21 #include <linux/list.h>
22 #include <linux/ip.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
25 #include <uapi/linux/mdio.h>
26 #include <linux/mdio.h>
27 #include <linux/usb/cdc.h>
28
29 /* Version Information */
30 #define DRIVER_VERSION "v1.08.0 (2015/01/13)"
31 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
32 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
33 #define MODULENAME "r8152"
34
35 #define R8152_PHY_ID            32
36
37 #define PLA_IDR                 0xc000
38 #define PLA_RCR                 0xc010
39 #define PLA_RMS                 0xc016
40 #define PLA_RXFIFO_CTRL0        0xc0a0
41 #define PLA_RXFIFO_CTRL1        0xc0a4
42 #define PLA_RXFIFO_CTRL2        0xc0a8
43 #define PLA_FMC                 0xc0b4
44 #define PLA_CFG_WOL             0xc0b6
45 #define PLA_TEREDO_CFG          0xc0bc
46 #define PLA_MAR                 0xcd00
47 #define PLA_BACKUP              0xd000
48 #define PAL_BDC_CR              0xd1a0
49 #define PLA_TEREDO_TIMER        0xd2cc
50 #define PLA_REALWOW_TIMER       0xd2e8
51 #define PLA_LEDSEL              0xdd90
52 #define PLA_LED_FEATURE         0xdd92
53 #define PLA_PHYAR               0xde00
54 #define PLA_BOOT_CTRL           0xe004
55 #define PLA_GPHY_INTR_IMR       0xe022
56 #define PLA_EEE_CR              0xe040
57 #define PLA_EEEP_CR             0xe080
58 #define PLA_MAC_PWR_CTRL        0xe0c0
59 #define PLA_MAC_PWR_CTRL2       0xe0ca
60 #define PLA_MAC_PWR_CTRL3       0xe0cc
61 #define PLA_MAC_PWR_CTRL4       0xe0ce
62 #define PLA_WDT6_CTRL           0xe428
63 #define PLA_TCR0                0xe610
64 #define PLA_TCR1                0xe612
65 #define PLA_MTPS                0xe615
66 #define PLA_TXFIFO_CTRL         0xe618
67 #define PLA_RSTTALLY            0xe800
68 #define PLA_CR                  0xe813
69 #define PLA_CRWECR              0xe81c
70 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
71 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
72 #define PLA_CONFIG5             0xe822
73 #define PLA_PHY_PWR             0xe84c
74 #define PLA_OOB_CTRL            0xe84f
75 #define PLA_CPCR                0xe854
76 #define PLA_MISC_0              0xe858
77 #define PLA_MISC_1              0xe85a
78 #define PLA_OCP_GPHY_BASE       0xe86c
79 #define PLA_TALLYCNT            0xe890
80 #define PLA_SFF_STS_7           0xe8de
81 #define PLA_PHYSTATUS           0xe908
82 #define PLA_BP_BA               0xfc26
83 #define PLA_BP_0                0xfc28
84 #define PLA_BP_1                0xfc2a
85 #define PLA_BP_2                0xfc2c
86 #define PLA_BP_3                0xfc2e
87 #define PLA_BP_4                0xfc30
88 #define PLA_BP_5                0xfc32
89 #define PLA_BP_6                0xfc34
90 #define PLA_BP_7                0xfc36
91 #define PLA_BP_EN               0xfc38
92
93 #define USB_U2P3_CTRL           0xb460
94 #define USB_DEV_STAT            0xb808
95 #define USB_USB_CTRL            0xd406
96 #define USB_PHY_CTRL            0xd408
97 #define USB_TX_AGG              0xd40a
98 #define USB_RX_BUF_TH           0xd40c
99 #define USB_USB_TIMER           0xd428
100 #define USB_RX_EARLY_AGG        0xd42c
101 #define USB_PM_CTRL_STATUS      0xd432
102 #define USB_TX_DMA              0xd434
103 #define USB_TOLERANCE           0xd490
104 #define USB_LPM_CTRL            0xd41a
105 #define USB_UPS_CTRL            0xd800
106 #define USB_MISC_0              0xd81a
107 #define USB_POWER_CUT           0xd80a
108 #define USB_AFE_CTRL2           0xd824
109 #define USB_WDT11_CTRL          0xe43c
110 #define USB_BP_BA               0xfc26
111 #define USB_BP_0                0xfc28
112 #define USB_BP_1                0xfc2a
113 #define USB_BP_2                0xfc2c
114 #define USB_BP_3                0xfc2e
115 #define USB_BP_4                0xfc30
116 #define USB_BP_5                0xfc32
117 #define USB_BP_6                0xfc34
118 #define USB_BP_7                0xfc36
119 #define USB_BP_EN               0xfc38
120
121 /* OCP Registers */
122 #define OCP_ALDPS_CONFIG        0x2010
123 #define OCP_EEE_CONFIG1         0x2080
124 #define OCP_EEE_CONFIG2         0x2092
125 #define OCP_EEE_CONFIG3         0x2094
126 #define OCP_BASE_MII            0xa400
127 #define OCP_EEE_AR              0xa41a
128 #define OCP_EEE_DATA            0xa41c
129 #define OCP_PHY_STATUS          0xa420
130 #define OCP_POWER_CFG           0xa430
131 #define OCP_EEE_CFG             0xa432
132 #define OCP_SRAM_ADDR           0xa436
133 #define OCP_SRAM_DATA           0xa438
134 #define OCP_DOWN_SPEED          0xa442
135 #define OCP_EEE_ABLE            0xa5c4
136 #define OCP_EEE_ADV             0xa5d0
137 #define OCP_EEE_LPABLE          0xa5d2
138 #define OCP_ADC_CFG             0xbc06
139
140 /* SRAM Register */
141 #define SRAM_LPF_CFG            0x8012
142 #define SRAM_10M_AMP1           0x8080
143 #define SRAM_10M_AMP2           0x8082
144 #define SRAM_IMPEDANCE          0x8084
145
146 /* PLA_RCR */
147 #define RCR_AAP                 0x00000001
148 #define RCR_APM                 0x00000002
149 #define RCR_AM                  0x00000004
150 #define RCR_AB                  0x00000008
151 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
152
153 /* PLA_RXFIFO_CTRL0 */
154 #define RXFIFO_THR1_NORMAL      0x00080002
155 #define RXFIFO_THR1_OOB         0x01800003
156
157 /* PLA_RXFIFO_CTRL1 */
158 #define RXFIFO_THR2_FULL        0x00000060
159 #define RXFIFO_THR2_HIGH        0x00000038
160 #define RXFIFO_THR2_OOB         0x0000004a
161 #define RXFIFO_THR2_NORMAL      0x00a0
162
163 /* PLA_RXFIFO_CTRL2 */
164 #define RXFIFO_THR3_FULL        0x00000078
165 #define RXFIFO_THR3_HIGH        0x00000048
166 #define RXFIFO_THR3_OOB         0x0000005a
167 #define RXFIFO_THR3_NORMAL      0x0110
168
169 /* PLA_TXFIFO_CTRL */
170 #define TXFIFO_THR_NORMAL       0x00400008
171 #define TXFIFO_THR_NORMAL2      0x01000008
172
173 /* PLA_FMC */
174 #define FMC_FCR_MCU_EN          0x0001
175
176 /* PLA_EEEP_CR */
177 #define EEEP_CR_EEEP_TX         0x0002
178
179 /* PLA_WDT6_CTRL */
180 #define WDT6_SET_MODE           0x0010
181
182 /* PLA_TCR0 */
183 #define TCR0_TX_EMPTY           0x0800
184 #define TCR0_AUTO_FIFO          0x0080
185
186 /* PLA_TCR1 */
187 #define VERSION_MASK            0x7cf0
188
189 /* PLA_MTPS */
190 #define MTPS_JUMBO              (12 * 1024 / 64)
191 #define MTPS_DEFAULT            (6 * 1024 / 64)
192
193 /* PLA_RSTTALLY */
194 #define TALLY_RESET             0x0001
195
196 /* PLA_CR */
197 #define CR_RST                  0x10
198 #define CR_RE                   0x08
199 #define CR_TE                   0x04
200
201 /* PLA_CRWECR */
202 #define CRWECR_NORAML           0x00
203 #define CRWECR_CONFIG           0xc0
204
205 /* PLA_OOB_CTRL */
206 #define NOW_IS_OOB              0x80
207 #define TXFIFO_EMPTY            0x20
208 #define RXFIFO_EMPTY            0x10
209 #define LINK_LIST_READY         0x02
210 #define DIS_MCU_CLROOB          0x01
211 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
212
213 /* PLA_MISC_1 */
214 #define RXDY_GATED_EN           0x0008
215
216 /* PLA_SFF_STS_7 */
217 #define RE_INIT_LL              0x8000
218 #define MCU_BORW_EN             0x4000
219
220 /* PLA_CPCR */
221 #define CPCR_RX_VLAN            0x0040
222
223 /* PLA_CFG_WOL */
224 #define MAGIC_EN                0x0001
225
226 /* PLA_TEREDO_CFG */
227 #define TEREDO_SEL              0x8000
228 #define TEREDO_WAKE_MASK        0x7f00
229 #define TEREDO_RS_EVENT_MASK    0x00fe
230 #define OOB_TEREDO_EN           0x0001
231
232 /* PAL_BDC_CR */
233 #define ALDPS_PROXY_MODE        0x0001
234
235 /* PLA_CONFIG34 */
236 #define LINK_ON_WAKE_EN         0x0010
237 #define LINK_OFF_WAKE_EN        0x0008
238
239 /* PLA_CONFIG5 */
240 #define BWF_EN                  0x0040
241 #define MWF_EN                  0x0020
242 #define UWF_EN                  0x0010
243 #define LAN_WAKE_EN             0x0002
244
245 /* PLA_LED_FEATURE */
246 #define LED_MODE_MASK           0x0700
247
248 /* PLA_PHY_PWR */
249 #define TX_10M_IDLE_EN          0x0080
250 #define PFM_PWM_SWITCH          0x0040
251
252 /* PLA_MAC_PWR_CTRL */
253 #define D3_CLK_GATED_EN         0x00004000
254 #define MCU_CLK_RATIO           0x07010f07
255 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
256 #define ALDPS_SPDWN_RATIO       0x0f87
257
258 /* PLA_MAC_PWR_CTRL2 */
259 #define EEE_SPDWN_RATIO         0x8007
260
261 /* PLA_MAC_PWR_CTRL3 */
262 #define PKT_AVAIL_SPDWN_EN      0x0100
263 #define SUSPEND_SPDWN_EN        0x0004
264 #define U1U2_SPDWN_EN           0x0002
265 #define L1_SPDWN_EN             0x0001
266
267 /* PLA_MAC_PWR_CTRL4 */
268 #define PWRSAVE_SPDWN_EN        0x1000
269 #define RXDV_SPDWN_EN           0x0800
270 #define TX10MIDLE_EN            0x0100
271 #define TP100_SPDWN_EN          0x0020
272 #define TP500_SPDWN_EN          0x0010
273 #define TP1000_SPDWN_EN         0x0008
274 #define EEE_SPDWN_EN            0x0001
275
276 /* PLA_GPHY_INTR_IMR */
277 #define GPHY_STS_MSK            0x0001
278 #define SPEED_DOWN_MSK          0x0002
279 #define SPDWN_RXDV_MSK          0x0004
280 #define SPDWN_LINKCHG_MSK       0x0008
281
282 /* PLA_PHYAR */
283 #define PHYAR_FLAG              0x80000000
284
285 /* PLA_EEE_CR */
286 #define EEE_RX_EN               0x0001
287 #define EEE_TX_EN               0x0002
288
289 /* PLA_BOOT_CTRL */
290 #define AUTOLOAD_DONE           0x0002
291
292 /* USB_DEV_STAT */
293 #define STAT_SPEED_MASK         0x0006
294 #define STAT_SPEED_HIGH         0x0000
295 #define STAT_SPEED_FULL         0x0002
296
297 /* USB_TX_AGG */
298 #define TX_AGG_MAX_THRESHOLD    0x03
299
300 /* USB_RX_BUF_TH */
301 #define RX_THR_SUPPER           0x0c350180
302 #define RX_THR_HIGH             0x7a120180
303 #define RX_THR_SLOW             0xffff0180
304
305 /* USB_TX_DMA */
306 #define TEST_MODE_DISABLE       0x00000001
307 #define TX_SIZE_ADJUST1         0x00000100
308
309 /* USB_UPS_CTRL */
310 #define POWER_CUT               0x0100
311
312 /* USB_PM_CTRL_STATUS */
313 #define RESUME_INDICATE         0x0001
314
315 /* USB_USB_CTRL */
316 #define RX_AGG_DISABLE          0x0010
317
318 /* USB_U2P3_CTRL */
319 #define U2P3_ENABLE             0x0001
320
321 /* USB_POWER_CUT */
322 #define PWR_EN                  0x0001
323 #define PHASE2_EN               0x0008
324
325 /* USB_MISC_0 */
326 #define PCUT_STATUS             0x0001
327
328 /* USB_RX_EARLY_AGG */
329 #define EARLY_AGG_SUPPER        0x0e832981
330 #define EARLY_AGG_HIGH          0x0e837a12
331 #define EARLY_AGG_SLOW          0x0e83ffff
332
333 /* USB_WDT11_CTRL */
334 #define TIMER11_EN              0x0001
335
336 /* USB_LPM_CTRL */
337 #define LPM_TIMER_MASK          0x0c
338 #define LPM_TIMER_500MS         0x04    /* 500 ms */
339 #define LPM_TIMER_500US         0x0c    /* 500 us */
340
341 /* USB_AFE_CTRL2 */
342 #define SEN_VAL_MASK            0xf800
343 #define SEN_VAL_NORMAL          0xa000
344 #define SEL_RXIDLE              0x0100
345
346 /* OCP_ALDPS_CONFIG */
347 #define ENPWRSAVE               0x8000
348 #define ENPDNPS                 0x0200
349 #define LINKENA                 0x0100
350 #define DIS_SDSAVE              0x0010
351
352 /* OCP_PHY_STATUS */
353 #define PHY_STAT_MASK           0x0007
354 #define PHY_STAT_LAN_ON         3
355 #define PHY_STAT_PWRDN          5
356
357 /* OCP_POWER_CFG */
358 #define EEE_CLKDIV_EN           0x8000
359 #define EN_ALDPS                0x0004
360 #define EN_10M_PLLOFF           0x0001
361
362 /* OCP_EEE_CONFIG1 */
363 #define RG_TXLPI_MSK_HFDUP      0x8000
364 #define RG_MATCLR_EN            0x4000
365 #define EEE_10_CAP              0x2000
366 #define EEE_NWAY_EN             0x1000
367 #define TX_QUIET_EN             0x0200
368 #define RX_QUIET_EN             0x0100
369 #define sd_rise_time_mask       0x0070
370 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
371 #define RG_RXLPI_MSK_HFDUP      0x0008
372 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
373
374 /* OCP_EEE_CONFIG2 */
375 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
376 #define RG_DACQUIET_EN          0x0400
377 #define RG_LDVQUIET_EN          0x0200
378 #define RG_CKRSEL               0x0020
379 #define RG_EEEPRG_EN            0x0010
380
381 /* OCP_EEE_CONFIG3 */
382 #define fast_snr_mask           0xff80
383 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
384 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
385 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
386
387 /* OCP_EEE_AR */
388 /* bit[15:14] function */
389 #define FUN_ADDR                0x0000
390 #define FUN_DATA                0x4000
391 /* bit[4:0] device addr */
392
393 /* OCP_EEE_CFG */
394 #define CTAP_SHORT_EN           0x0040
395 #define EEE10_EN                0x0010
396
397 /* OCP_DOWN_SPEED */
398 #define EN_10M_BGOFF            0x0080
399
400 /* OCP_ADC_CFG */
401 #define CKADSEL_L               0x0100
402 #define ADC_EN                  0x0080
403 #define EN_EMI_L                0x0040
404
405 /* SRAM_LPF_CFG */
406 #define LPF_AUTO_TUNE           0x8000
407
408 /* SRAM_10M_AMP1 */
409 #define GDAC_IB_UPALL           0x0008
410
411 /* SRAM_10M_AMP2 */
412 #define AMP_DN                  0x0200
413
414 /* SRAM_IMPEDANCE */
415 #define RX_DRIVING_MASK         0x6000
416
417 enum rtl_register_content {
418         _1000bps        = 0x10,
419         _100bps         = 0x08,
420         _10bps          = 0x04,
421         LINK_STATUS     = 0x02,
422         FULL_DUP        = 0x01,
423 };
424
425 #define RTL8152_MAX_TX          4
426 #define RTL8152_MAX_RX          10
427 #define INTBUFSIZE              2
428 #define CRC_SIZE                4
429 #define TX_ALIGN                4
430 #define RX_ALIGN                8
431
432 #define INTR_LINK               0x0004
433
434 #define RTL8152_REQT_READ       0xc0
435 #define RTL8152_REQT_WRITE      0x40
436 #define RTL8152_REQ_GET_REGS    0x05
437 #define RTL8152_REQ_SET_REGS    0x05
438
439 #define BYTE_EN_DWORD           0xff
440 #define BYTE_EN_WORD            0x33
441 #define BYTE_EN_BYTE            0x11
442 #define BYTE_EN_SIX_BYTES       0x3f
443 #define BYTE_EN_START_MASK      0x0f
444 #define BYTE_EN_END_MASK        0xf0
445
446 #define RTL8153_MAX_PACKET      9216 /* 9K */
447 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
448 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
449 #define RTL8153_RMS             RTL8153_MAX_PACKET
450 #define RTL8152_TX_TIMEOUT      (5 * HZ)
451 #define RTL8152_NAPI_WEIGHT     64
452
453 /* rtl8152 flags */
454 enum rtl8152_flags {
455         RTL8152_UNPLUG = 0,
456         RTL8152_SET_RX_MODE,
457         WORK_ENABLE,
458         RTL8152_LINK_CHG,
459         SELECTIVE_SUSPEND,
460         PHY_RESET,
461         SCHEDULE_NAPI,
462 };
463
464 /* Define these values to match your device */
465 #define VENDOR_ID_REALTEK               0x0bda
466 #define VENDOR_ID_SAMSUNG               0x04e8
467
468 #define MCU_TYPE_PLA                    0x0100
469 #define MCU_TYPE_USB                    0x0000
470
471 struct tally_counter {
472         __le64  tx_packets;
473         __le64  rx_packets;
474         __le64  tx_errors;
475         __le32  rx_errors;
476         __le16  rx_missed;
477         __le16  align_errors;
478         __le32  tx_one_collision;
479         __le32  tx_multi_collision;
480         __le64  rx_unicast;
481         __le64  rx_broadcast;
482         __le32  rx_multicast;
483         __le16  tx_aborted;
484         __le16  tx_underrun;
485 };
486
487 struct rx_desc {
488         __le32 opts1;
489 #define RX_LEN_MASK                     0x7fff
490
491         __le32 opts2;
492 #define RD_UDP_CS                       BIT(23)
493 #define RD_TCP_CS                       BIT(22)
494 #define RD_IPV6_CS                      BIT(20)
495 #define RD_IPV4_CS                      BIT(19)
496
497         __le32 opts3;
498 #define IPF                             BIT(23) /* IP checksum fail */
499 #define UDPF                            BIT(22) /* UDP checksum fail */
500 #define TCPF                            BIT(21) /* TCP checksum fail */
501 #define RX_VLAN_TAG                     BIT(16)
502
503         __le32 opts4;
504         __le32 opts5;
505         __le32 opts6;
506 };
507
508 struct tx_desc {
509         __le32 opts1;
510 #define TX_FS                   BIT(31) /* First segment of a packet */
511 #define TX_LS                   BIT(30) /* Final segment of a packet */
512 #define GTSENDV4                BIT(28)
513 #define GTSENDV6                BIT(27)
514 #define GTTCPHO_SHIFT           18
515 #define GTTCPHO_MAX             0x7fU
516 #define TX_LEN_MAX              0x3ffffU
517
518         __le32 opts2;
519 #define UDP_CS                  BIT(31) /* Calculate UDP/IP checksum */
520 #define TCP_CS                  BIT(30) /* Calculate TCP/IP checksum */
521 #define IPV4_CS                 BIT(29) /* Calculate IPv4 checksum */
522 #define IPV6_CS                 BIT(28) /* Calculate IPv6 checksum */
523 #define MSS_SHIFT               17
524 #define MSS_MAX                 0x7ffU
525 #define TCPHO_SHIFT             17
526 #define TCPHO_MAX               0x7ffU
527 #define TX_VLAN_TAG             BIT(16)
528 };
529
530 struct r8152;
531
532 struct rx_agg {
533         struct list_head list;
534         struct urb *urb;
535         struct r8152 *context;
536         void *buffer;
537         void *head;
538 };
539
540 struct tx_agg {
541         struct list_head list;
542         struct urb *urb;
543         struct r8152 *context;
544         void *buffer;
545         void *head;
546         u32 skb_num;
547         u32 skb_len;
548 };
549
550 struct r8152 {
551         unsigned long flags;
552         struct usb_device *udev;
553         struct napi_struct napi;
554         struct usb_interface *intf;
555         struct net_device *netdev;
556         struct urb *intr_urb;
557         struct tx_agg tx_info[RTL8152_MAX_TX];
558         struct rx_agg rx_info[RTL8152_MAX_RX];
559         struct list_head rx_done, tx_free;
560         struct sk_buff_head tx_queue, rx_queue;
561         spinlock_t rx_lock, tx_lock;
562         struct delayed_work schedule;
563         struct mii_if_info mii;
564         struct mutex control;   /* use for hw setting */
565
566         struct rtl_ops {
567                 void (*init)(struct r8152 *);
568                 int (*enable)(struct r8152 *);
569                 void (*disable)(struct r8152 *);
570                 void (*up)(struct r8152 *);
571                 void (*down)(struct r8152 *);
572                 void (*unload)(struct r8152 *);
573                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
574                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
575         } rtl_ops;
576
577         int intr_interval;
578         u32 saved_wolopts;
579         u32 msg_enable;
580         u32 tx_qlen;
581         u16 ocp_base;
582         u8 *intr_buff;
583         u8 version;
584 };
585
586 enum rtl_version {
587         RTL_VER_UNKNOWN = 0,
588         RTL_VER_01,
589         RTL_VER_02,
590         RTL_VER_03,
591         RTL_VER_04,
592         RTL_VER_05,
593         RTL_VER_MAX
594 };
595
596 enum tx_csum_stat {
597         TX_CSUM_SUCCESS = 0,
598         TX_CSUM_TSO,
599         TX_CSUM_NONE
600 };
601
602 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
603  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
604  */
605 static const int multicast_filter_limit = 32;
606 static unsigned int agg_buf_sz = 16384;
607
608 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
609                                  VLAN_ETH_HLEN - VLAN_HLEN)
610
611 static
612 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
613 {
614         int ret;
615         void *tmp;
616
617         tmp = kmalloc(size, GFP_KERNEL);
618         if (!tmp)
619                 return -ENOMEM;
620
621         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
622                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
623                               value, index, tmp, size, 500);
624
625         memcpy(data, tmp, size);
626         kfree(tmp);
627
628         return ret;
629 }
630
631 static
632 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
633 {
634         int ret;
635         void *tmp;
636
637         tmp = kmemdup(data, size, GFP_KERNEL);
638         if (!tmp)
639                 return -ENOMEM;
640
641         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
642                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
643                               value, index, tmp, size, 500);
644
645         kfree(tmp);
646
647         return ret;
648 }
649
650 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
651                             void *data, u16 type)
652 {
653         u16 limit = 64;
654         int ret = 0;
655
656         if (test_bit(RTL8152_UNPLUG, &tp->flags))
657                 return -ENODEV;
658
659         /* both size and indix must be 4 bytes align */
660         if ((size & 3) || !size || (index & 3) || !data)
661                 return -EPERM;
662
663         if ((u32)index + (u32)size > 0xffff)
664                 return -EPERM;
665
666         while (size) {
667                 if (size > limit) {
668                         ret = get_registers(tp, index, type, limit, data);
669                         if (ret < 0)
670                                 break;
671
672                         index += limit;
673                         data += limit;
674                         size -= limit;
675                 } else {
676                         ret = get_registers(tp, index, type, size, data);
677                         if (ret < 0)
678                                 break;
679
680                         index += size;
681                         data += size;
682                         size = 0;
683                         break;
684                 }
685         }
686
687         if (ret == -ENODEV)
688                 set_bit(RTL8152_UNPLUG, &tp->flags);
689
690         return ret;
691 }
692
693 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
694                              u16 size, void *data, u16 type)
695 {
696         int ret;
697         u16 byteen_start, byteen_end, byen;
698         u16 limit = 512;
699
700         if (test_bit(RTL8152_UNPLUG, &tp->flags))
701                 return -ENODEV;
702
703         /* both size and indix must be 4 bytes align */
704         if ((size & 3) || !size || (index & 3) || !data)
705                 return -EPERM;
706
707         if ((u32)index + (u32)size > 0xffff)
708                 return -EPERM;
709
710         byteen_start = byteen & BYTE_EN_START_MASK;
711         byteen_end = byteen & BYTE_EN_END_MASK;
712
713         byen = byteen_start | (byteen_start << 4);
714         ret = set_registers(tp, index, type | byen, 4, data);
715         if (ret < 0)
716                 goto error1;
717
718         index += 4;
719         data += 4;
720         size -= 4;
721
722         if (size) {
723                 size -= 4;
724
725                 while (size) {
726                         if (size > limit) {
727                                 ret = set_registers(tp, index,
728                                                     type | BYTE_EN_DWORD,
729                                                     limit, data);
730                                 if (ret < 0)
731                                         goto error1;
732
733                                 index += limit;
734                                 data += limit;
735                                 size -= limit;
736                         } else {
737                                 ret = set_registers(tp, index,
738                                                     type | BYTE_EN_DWORD,
739                                                     size, data);
740                                 if (ret < 0)
741                                         goto error1;
742
743                                 index += size;
744                                 data += size;
745                                 size = 0;
746                                 break;
747                         }
748                 }
749
750                 byen = byteen_end | (byteen_end >> 4);
751                 ret = set_registers(tp, index, type | byen, 4, data);
752                 if (ret < 0)
753                         goto error1;
754         }
755
756 error1:
757         if (ret == -ENODEV)
758                 set_bit(RTL8152_UNPLUG, &tp->flags);
759
760         return ret;
761 }
762
763 static inline
764 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
765 {
766         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
767 }
768
769 static inline
770 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
771 {
772         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
773 }
774
775 static inline
776 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
777 {
778         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
779 }
780
781 static inline
782 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
783 {
784         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
785 }
786
787 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
788 {
789         __le32 data;
790
791         generic_ocp_read(tp, index, sizeof(data), &data, type);
792
793         return __le32_to_cpu(data);
794 }
795
796 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
797 {
798         __le32 tmp = __cpu_to_le32(data);
799
800         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
801 }
802
803 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
804 {
805         u32 data;
806         __le32 tmp;
807         u8 shift = index & 2;
808
809         index &= ~3;
810
811         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
812
813         data = __le32_to_cpu(tmp);
814         data >>= (shift * 8);
815         data &= 0xffff;
816
817         return (u16)data;
818 }
819
820 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
821 {
822         u32 mask = 0xffff;
823         __le32 tmp;
824         u16 byen = BYTE_EN_WORD;
825         u8 shift = index & 2;
826
827         data &= mask;
828
829         if (index & 2) {
830                 byen <<= shift;
831                 mask <<= (shift * 8);
832                 data <<= (shift * 8);
833                 index &= ~3;
834         }
835
836         tmp = __cpu_to_le32(data);
837
838         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
839 }
840
841 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
842 {
843         u32 data;
844         __le32 tmp;
845         u8 shift = index & 3;
846
847         index &= ~3;
848
849         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
850
851         data = __le32_to_cpu(tmp);
852         data >>= (shift * 8);
853         data &= 0xff;
854
855         return (u8)data;
856 }
857
858 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
859 {
860         u32 mask = 0xff;
861         __le32 tmp;
862         u16 byen = BYTE_EN_BYTE;
863         u8 shift = index & 3;
864
865         data &= mask;
866
867         if (index & 3) {
868                 byen <<= shift;
869                 mask <<= (shift * 8);
870                 data <<= (shift * 8);
871                 index &= ~3;
872         }
873
874         tmp = __cpu_to_le32(data);
875
876         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
877 }
878
879 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
880 {
881         u16 ocp_base, ocp_index;
882
883         ocp_base = addr & 0xf000;
884         if (ocp_base != tp->ocp_base) {
885                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
886                 tp->ocp_base = ocp_base;
887         }
888
889         ocp_index = (addr & 0x0fff) | 0xb000;
890         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
891 }
892
893 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
894 {
895         u16 ocp_base, ocp_index;
896
897         ocp_base = addr & 0xf000;
898         if (ocp_base != tp->ocp_base) {
899                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
900                 tp->ocp_base = ocp_base;
901         }
902
903         ocp_index = (addr & 0x0fff) | 0xb000;
904         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
905 }
906
907 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
908 {
909         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
910 }
911
912 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
913 {
914         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
915 }
916
917 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
918 {
919         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
920         ocp_reg_write(tp, OCP_SRAM_DATA, data);
921 }
922
923 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
924 {
925         struct r8152 *tp = netdev_priv(netdev);
926         int ret;
927
928         if (test_bit(RTL8152_UNPLUG, &tp->flags))
929                 return -ENODEV;
930
931         if (phy_id != R8152_PHY_ID)
932                 return -EINVAL;
933
934         ret = r8152_mdio_read(tp, reg);
935
936         return ret;
937 }
938
939 static
940 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
941 {
942         struct r8152 *tp = netdev_priv(netdev);
943
944         if (test_bit(RTL8152_UNPLUG, &tp->flags))
945                 return;
946
947         if (phy_id != R8152_PHY_ID)
948                 return;
949
950         r8152_mdio_write(tp, reg, val);
951 }
952
953 static int
954 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
955
956 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
957 {
958         struct r8152 *tp = netdev_priv(netdev);
959         struct sockaddr *addr = p;
960         int ret = -EADDRNOTAVAIL;
961
962         if (!is_valid_ether_addr(addr->sa_data))
963                 goto out1;
964
965         ret = usb_autopm_get_interface(tp->intf);
966         if (ret < 0)
967                 goto out1;
968
969         mutex_lock(&tp->control);
970
971         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
972
973         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
974         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
975         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
976
977         mutex_unlock(&tp->control);
978
979         usb_autopm_put_interface(tp->intf);
980 out1:
981         return ret;
982 }
983
984 static int set_ethernet_addr(struct r8152 *tp)
985 {
986         struct net_device *dev = tp->netdev;
987         struct sockaddr sa;
988         int ret;
989
990         if (tp->version == RTL_VER_01)
991                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
992         else
993                 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
994
995         if (ret < 0) {
996                 netif_err(tp, probe, dev, "Get ether addr fail\n");
997         } else if (!is_valid_ether_addr(sa.sa_data)) {
998                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
999                           sa.sa_data);
1000                 eth_hw_addr_random(dev);
1001                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1002                 ret = rtl8152_set_mac_address(dev, &sa);
1003                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1004                            sa.sa_data);
1005         } else {
1006                 if (tp->version == RTL_VER_01)
1007                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1008                 else
1009                         ret = rtl8152_set_mac_address(dev, &sa);
1010         }
1011
1012         return ret;
1013 }
1014
1015 static void read_bulk_callback(struct urb *urb)
1016 {
1017         struct net_device *netdev;
1018         int status = urb->status;
1019         struct rx_agg *agg;
1020         struct r8152 *tp;
1021
1022         agg = urb->context;
1023         if (!agg)
1024                 return;
1025
1026         tp = agg->context;
1027         if (!tp)
1028                 return;
1029
1030         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1031                 return;
1032
1033         if (!test_bit(WORK_ENABLE, &tp->flags))
1034                 return;
1035
1036         netdev = tp->netdev;
1037
1038         /* When link down, the driver would cancel all bulks. */
1039         /* This avoid the re-submitting bulk */
1040         if (!netif_carrier_ok(netdev))
1041                 return;
1042
1043         usb_mark_last_busy(tp->udev);
1044
1045         switch (status) {
1046         case 0:
1047                 if (urb->actual_length < ETH_ZLEN)
1048                         break;
1049
1050                 spin_lock(&tp->rx_lock);
1051                 list_add_tail(&agg->list, &tp->rx_done);
1052                 spin_unlock(&tp->rx_lock);
1053                 napi_schedule(&tp->napi);
1054                 return;
1055         case -ESHUTDOWN:
1056                 set_bit(RTL8152_UNPLUG, &tp->flags);
1057                 netif_device_detach(tp->netdev);
1058                 return;
1059         case -ENOENT:
1060                 return; /* the urb is in unlink state */
1061         case -ETIME:
1062                 if (net_ratelimit())
1063                         netdev_warn(netdev, "maybe reset is needed?\n");
1064                 break;
1065         default:
1066                 if (net_ratelimit())
1067                         netdev_warn(netdev, "Rx status %d\n", status);
1068                 break;
1069         }
1070
1071         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1072 }
1073
1074 static void write_bulk_callback(struct urb *urb)
1075 {
1076         struct net_device_stats *stats;
1077         struct net_device *netdev;
1078         struct tx_agg *agg;
1079         struct r8152 *tp;
1080         int status = urb->status;
1081
1082         agg = urb->context;
1083         if (!agg)
1084                 return;
1085
1086         tp = agg->context;
1087         if (!tp)
1088                 return;
1089
1090         netdev = tp->netdev;
1091         stats = &netdev->stats;
1092         if (status) {
1093                 if (net_ratelimit())
1094                         netdev_warn(netdev, "Tx status %d\n", status);
1095                 stats->tx_errors += agg->skb_num;
1096         } else {
1097                 stats->tx_packets += agg->skb_num;
1098                 stats->tx_bytes += agg->skb_len;
1099         }
1100
1101         spin_lock(&tp->tx_lock);
1102         list_add_tail(&agg->list, &tp->tx_free);
1103         spin_unlock(&tp->tx_lock);
1104
1105         usb_autopm_put_interface_async(tp->intf);
1106
1107         if (!netif_carrier_ok(netdev))
1108                 return;
1109
1110         if (!test_bit(WORK_ENABLE, &tp->flags))
1111                 return;
1112
1113         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1114                 return;
1115
1116         if (!skb_queue_empty(&tp->tx_queue))
1117                 napi_schedule(&tp->napi);
1118 }
1119
1120 static void intr_callback(struct urb *urb)
1121 {
1122         struct r8152 *tp;
1123         __le16 *d;
1124         int status = urb->status;
1125         int res;
1126
1127         tp = urb->context;
1128         if (!tp)
1129                 return;
1130
1131         if (!test_bit(WORK_ENABLE, &tp->flags))
1132                 return;
1133
1134         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1135                 return;
1136
1137         switch (status) {
1138         case 0:                 /* success */
1139                 break;
1140         case -ECONNRESET:       /* unlink */
1141         case -ESHUTDOWN:
1142                 netif_device_detach(tp->netdev);
1143         case -ENOENT:
1144         case -EPROTO:
1145                 netif_info(tp, intr, tp->netdev,
1146                            "Stop submitting intr, status %d\n", status);
1147                 return;
1148         case -EOVERFLOW:
1149                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1150                 goto resubmit;
1151         /* -EPIPE:  should clear the halt */
1152         default:
1153                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1154                 goto resubmit;
1155         }
1156
1157         d = urb->transfer_buffer;
1158         if (INTR_LINK & __le16_to_cpu(d[0])) {
1159                 if (!netif_carrier_ok(tp->netdev)) {
1160                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1161                         schedule_delayed_work(&tp->schedule, 0);
1162                 }
1163         } else {
1164                 if (netif_carrier_ok(tp->netdev)) {
1165                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1166                         schedule_delayed_work(&tp->schedule, 0);
1167                 }
1168         }
1169
1170 resubmit:
1171         res = usb_submit_urb(urb, GFP_ATOMIC);
1172         if (res == -ENODEV) {
1173                 set_bit(RTL8152_UNPLUG, &tp->flags);
1174                 netif_device_detach(tp->netdev);
1175         } else if (res) {
1176                 netif_err(tp, intr, tp->netdev,
1177                           "can't resubmit intr, status %d\n", res);
1178         }
1179 }
1180
1181 static inline void *rx_agg_align(void *data)
1182 {
1183         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1184 }
1185
1186 static inline void *tx_agg_align(void *data)
1187 {
1188         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1189 }
1190
1191 static void free_all_mem(struct r8152 *tp)
1192 {
1193         int i;
1194
1195         for (i = 0; i < RTL8152_MAX_RX; i++) {
1196                 usb_free_urb(tp->rx_info[i].urb);
1197                 tp->rx_info[i].urb = NULL;
1198
1199                 kfree(tp->rx_info[i].buffer);
1200                 tp->rx_info[i].buffer = NULL;
1201                 tp->rx_info[i].head = NULL;
1202         }
1203
1204         for (i = 0; i < RTL8152_MAX_TX; i++) {
1205                 usb_free_urb(tp->tx_info[i].urb);
1206                 tp->tx_info[i].urb = NULL;
1207
1208                 kfree(tp->tx_info[i].buffer);
1209                 tp->tx_info[i].buffer = NULL;
1210                 tp->tx_info[i].head = NULL;
1211         }
1212
1213         usb_free_urb(tp->intr_urb);
1214         tp->intr_urb = NULL;
1215
1216         kfree(tp->intr_buff);
1217         tp->intr_buff = NULL;
1218 }
1219
1220 static int alloc_all_mem(struct r8152 *tp)
1221 {
1222         struct net_device *netdev = tp->netdev;
1223         struct usb_interface *intf = tp->intf;
1224         struct usb_host_interface *alt = intf->cur_altsetting;
1225         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1226         struct urb *urb;
1227         int node, i;
1228         u8 *buf;
1229
1230         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1231
1232         spin_lock_init(&tp->rx_lock);
1233         spin_lock_init(&tp->tx_lock);
1234         INIT_LIST_HEAD(&tp->tx_free);
1235         skb_queue_head_init(&tp->tx_queue);
1236         skb_queue_head_init(&tp->rx_queue);
1237
1238         for (i = 0; i < RTL8152_MAX_RX; i++) {
1239                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1240                 if (!buf)
1241                         goto err1;
1242
1243                 if (buf != rx_agg_align(buf)) {
1244                         kfree(buf);
1245                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1246                                            node);
1247                         if (!buf)
1248                                 goto err1;
1249                 }
1250
1251                 urb = usb_alloc_urb(0, GFP_KERNEL);
1252                 if (!urb) {
1253                         kfree(buf);
1254                         goto err1;
1255                 }
1256
1257                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1258                 tp->rx_info[i].context = tp;
1259                 tp->rx_info[i].urb = urb;
1260                 tp->rx_info[i].buffer = buf;
1261                 tp->rx_info[i].head = rx_agg_align(buf);
1262         }
1263
1264         for (i = 0; i < RTL8152_MAX_TX; i++) {
1265                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1266                 if (!buf)
1267                         goto err1;
1268
1269                 if (buf != tx_agg_align(buf)) {
1270                         kfree(buf);
1271                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1272                                            node);
1273                         if (!buf)
1274                                 goto err1;
1275                 }
1276
1277                 urb = usb_alloc_urb(0, GFP_KERNEL);
1278                 if (!urb) {
1279                         kfree(buf);
1280                         goto err1;
1281                 }
1282
1283                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1284                 tp->tx_info[i].context = tp;
1285                 tp->tx_info[i].urb = urb;
1286                 tp->tx_info[i].buffer = buf;
1287                 tp->tx_info[i].head = tx_agg_align(buf);
1288
1289                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1290         }
1291
1292         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1293         if (!tp->intr_urb)
1294                 goto err1;
1295
1296         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1297         if (!tp->intr_buff)
1298                 goto err1;
1299
1300         tp->intr_interval = (int)ep_intr->desc.bInterval;
1301         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1302                          tp->intr_buff, INTBUFSIZE, intr_callback,
1303                          tp, tp->intr_interval);
1304
1305         return 0;
1306
1307 err1:
1308         free_all_mem(tp);
1309         return -ENOMEM;
1310 }
1311
1312 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1313 {
1314         struct tx_agg *agg = NULL;
1315         unsigned long flags;
1316
1317         if (list_empty(&tp->tx_free))
1318                 return NULL;
1319
1320         spin_lock_irqsave(&tp->tx_lock, flags);
1321         if (!list_empty(&tp->tx_free)) {
1322                 struct list_head *cursor;
1323
1324                 cursor = tp->tx_free.next;
1325                 list_del_init(cursor);
1326                 agg = list_entry(cursor, struct tx_agg, list);
1327         }
1328         spin_unlock_irqrestore(&tp->tx_lock, flags);
1329
1330         return agg;
1331 }
1332
1333 /* r8152_csum_workaround()
1334  * The hw limites the value the transport offset. When the offset is out of the
1335  * range, calculate the checksum by sw.
1336  */
1337 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1338                                   struct sk_buff_head *list)
1339 {
1340         if (skb_shinfo(skb)->gso_size) {
1341                 netdev_features_t features = tp->netdev->features;
1342                 struct sk_buff_head seg_list;
1343                 struct sk_buff *segs, *nskb;
1344
1345                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1346                 segs = skb_gso_segment(skb, features);
1347                 if (IS_ERR(segs) || !segs)
1348                         goto drop;
1349
1350                 __skb_queue_head_init(&seg_list);
1351
1352                 do {
1353                         nskb = segs;
1354                         segs = segs->next;
1355                         nskb->next = NULL;
1356                         __skb_queue_tail(&seg_list, nskb);
1357                 } while (segs);
1358
1359                 skb_queue_splice(&seg_list, list);
1360                 dev_kfree_skb(skb);
1361         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1362                 if (skb_checksum_help(skb) < 0)
1363                         goto drop;
1364
1365                 __skb_queue_head(list, skb);
1366         } else {
1367                 struct net_device_stats *stats;
1368
1369 drop:
1370                 stats = &tp->netdev->stats;
1371                 stats->tx_dropped++;
1372                 dev_kfree_skb(skb);
1373         }
1374 }
1375
1376 /* msdn_giant_send_check()
1377  * According to the document of microsoft, the TCP Pseudo Header excludes the
1378  * packet length for IPv6 TCP large packets.
1379  */
1380 static int msdn_giant_send_check(struct sk_buff *skb)
1381 {
1382         const struct ipv6hdr *ipv6h;
1383         struct tcphdr *th;
1384         int ret;
1385
1386         ret = skb_cow_head(skb, 0);
1387         if (ret)
1388                 return ret;
1389
1390         ipv6h = ipv6_hdr(skb);
1391         th = tcp_hdr(skb);
1392
1393         th->check = 0;
1394         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1395
1396         return ret;
1397 }
1398
1399 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1400 {
1401         if (skb_vlan_tag_present(skb)) {
1402                 u32 opts2;
1403
1404                 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1405                 desc->opts2 |= cpu_to_le32(opts2);
1406         }
1407 }
1408
1409 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1410 {
1411         u32 opts2 = le32_to_cpu(desc->opts2);
1412
1413         if (opts2 & RX_VLAN_TAG)
1414                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1415                                        swab16(opts2 & 0xffff));
1416 }
1417
1418 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1419                          struct sk_buff *skb, u32 len, u32 transport_offset)
1420 {
1421         u32 mss = skb_shinfo(skb)->gso_size;
1422         u32 opts1, opts2 = 0;
1423         int ret = TX_CSUM_SUCCESS;
1424
1425         WARN_ON_ONCE(len > TX_LEN_MAX);
1426
1427         opts1 = len | TX_FS | TX_LS;
1428
1429         if (mss) {
1430                 if (transport_offset > GTTCPHO_MAX) {
1431                         netif_warn(tp, tx_err, tp->netdev,
1432                                    "Invalid transport offset 0x%x for TSO\n",
1433                                    transport_offset);
1434                         ret = TX_CSUM_TSO;
1435                         goto unavailable;
1436                 }
1437
1438                 switch (vlan_get_protocol(skb)) {
1439                 case htons(ETH_P_IP):
1440                         opts1 |= GTSENDV4;
1441                         break;
1442
1443                 case htons(ETH_P_IPV6):
1444                         if (msdn_giant_send_check(skb)) {
1445                                 ret = TX_CSUM_TSO;
1446                                 goto unavailable;
1447                         }
1448                         opts1 |= GTSENDV6;
1449                         break;
1450
1451                 default:
1452                         WARN_ON_ONCE(1);
1453                         break;
1454                 }
1455
1456                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1457                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1458         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1459                 u8 ip_protocol;
1460
1461                 if (transport_offset > TCPHO_MAX) {
1462                         netif_warn(tp, tx_err, tp->netdev,
1463                                    "Invalid transport offset 0x%x\n",
1464                                    transport_offset);
1465                         ret = TX_CSUM_NONE;
1466                         goto unavailable;
1467                 }
1468
1469                 switch (vlan_get_protocol(skb)) {
1470                 case htons(ETH_P_IP):
1471                         opts2 |= IPV4_CS;
1472                         ip_protocol = ip_hdr(skb)->protocol;
1473                         break;
1474
1475                 case htons(ETH_P_IPV6):
1476                         opts2 |= IPV6_CS;
1477                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1478                         break;
1479
1480                 default:
1481                         ip_protocol = IPPROTO_RAW;
1482                         break;
1483                 }
1484
1485                 if (ip_protocol == IPPROTO_TCP)
1486                         opts2 |= TCP_CS;
1487                 else if (ip_protocol == IPPROTO_UDP)
1488                         opts2 |= UDP_CS;
1489                 else
1490                         WARN_ON_ONCE(1);
1491
1492                 opts2 |= transport_offset << TCPHO_SHIFT;
1493         }
1494
1495         desc->opts2 = cpu_to_le32(opts2);
1496         desc->opts1 = cpu_to_le32(opts1);
1497
1498 unavailable:
1499         return ret;
1500 }
1501
1502 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1503 {
1504         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1505         int remain, ret;
1506         u8 *tx_data;
1507
1508         __skb_queue_head_init(&skb_head);
1509         spin_lock(&tx_queue->lock);
1510         skb_queue_splice_init(tx_queue, &skb_head);
1511         spin_unlock(&tx_queue->lock);
1512
1513         tx_data = agg->head;
1514         agg->skb_num = 0;
1515         agg->skb_len = 0;
1516         remain = agg_buf_sz;
1517
1518         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1519                 struct tx_desc *tx_desc;
1520                 struct sk_buff *skb;
1521                 unsigned int len;
1522                 u32 offset;
1523
1524                 skb = __skb_dequeue(&skb_head);
1525                 if (!skb)
1526                         break;
1527
1528                 len = skb->len + sizeof(*tx_desc);
1529
1530                 if (len > remain) {
1531                         __skb_queue_head(&skb_head, skb);
1532                         break;
1533                 }
1534
1535                 tx_data = tx_agg_align(tx_data);
1536                 tx_desc = (struct tx_desc *)tx_data;
1537
1538                 offset = (u32)skb_transport_offset(skb);
1539
1540                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1541                         r8152_csum_workaround(tp, skb, &skb_head);
1542                         continue;
1543                 }
1544
1545                 rtl_tx_vlan_tag(tx_desc, skb);
1546
1547                 tx_data += sizeof(*tx_desc);
1548
1549                 len = skb->len;
1550                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1551                         struct net_device_stats *stats = &tp->netdev->stats;
1552
1553                         stats->tx_dropped++;
1554                         dev_kfree_skb_any(skb);
1555                         tx_data -= sizeof(*tx_desc);
1556                         continue;
1557                 }
1558
1559                 tx_data += len;
1560                 agg->skb_len += len;
1561                 agg->skb_num++;
1562
1563                 dev_kfree_skb_any(skb);
1564
1565                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1566         }
1567
1568         if (!skb_queue_empty(&skb_head)) {
1569                 spin_lock(&tx_queue->lock);
1570                 skb_queue_splice(&skb_head, tx_queue);
1571                 spin_unlock(&tx_queue->lock);
1572         }
1573
1574         netif_tx_lock(tp->netdev);
1575
1576         if (netif_queue_stopped(tp->netdev) &&
1577             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1578                 netif_wake_queue(tp->netdev);
1579
1580         netif_tx_unlock(tp->netdev);
1581
1582         ret = usb_autopm_get_interface_async(tp->intf);
1583         if (ret < 0)
1584                 goto out_tx_fill;
1585
1586         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1587                           agg->head, (int)(tx_data - (u8 *)agg->head),
1588                           (usb_complete_t)write_bulk_callback, agg);
1589
1590         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1591         if (ret < 0)
1592                 usb_autopm_put_interface_async(tp->intf);
1593
1594 out_tx_fill:
1595         return ret;
1596 }
1597
1598 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1599 {
1600         u8 checksum = CHECKSUM_NONE;
1601         u32 opts2, opts3;
1602
1603         if (tp->version == RTL_VER_01)
1604                 goto return_result;
1605
1606         opts2 = le32_to_cpu(rx_desc->opts2);
1607         opts3 = le32_to_cpu(rx_desc->opts3);
1608
1609         if (opts2 & RD_IPV4_CS) {
1610                 if (opts3 & IPF)
1611                         checksum = CHECKSUM_NONE;
1612                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1613                         checksum = CHECKSUM_NONE;
1614                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1615                         checksum = CHECKSUM_NONE;
1616                 else
1617                         checksum = CHECKSUM_UNNECESSARY;
1618         } else if (RD_IPV6_CS) {
1619                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1620                         checksum = CHECKSUM_UNNECESSARY;
1621                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1622                         checksum = CHECKSUM_UNNECESSARY;
1623         }
1624
1625 return_result:
1626         return checksum;
1627 }
1628
1629 static int rx_bottom(struct r8152 *tp, int budget)
1630 {
1631         unsigned long flags;
1632         struct list_head *cursor, *next, rx_queue;
1633         int ret = 0, work_done = 0;
1634
1635         if (!skb_queue_empty(&tp->rx_queue)) {
1636                 while (work_done < budget) {
1637                         struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1638                         struct net_device *netdev = tp->netdev;
1639                         struct net_device_stats *stats = &netdev->stats;
1640                         unsigned int pkt_len;
1641
1642                         if (!skb)
1643                                 break;
1644
1645                         pkt_len = skb->len;
1646                         napi_gro_receive(&tp->napi, skb);
1647                         work_done++;
1648                         stats->rx_packets++;
1649                         stats->rx_bytes += pkt_len;
1650                 }
1651         }
1652
1653         if (list_empty(&tp->rx_done))
1654                 goto out1;
1655
1656         INIT_LIST_HEAD(&rx_queue);
1657         spin_lock_irqsave(&tp->rx_lock, flags);
1658         list_splice_init(&tp->rx_done, &rx_queue);
1659         spin_unlock_irqrestore(&tp->rx_lock, flags);
1660
1661         list_for_each_safe(cursor, next, &rx_queue) {
1662                 struct rx_desc *rx_desc;
1663                 struct rx_agg *agg;
1664                 int len_used = 0;
1665                 struct urb *urb;
1666                 u8 *rx_data;
1667
1668                 list_del_init(cursor);
1669
1670                 agg = list_entry(cursor, struct rx_agg, list);
1671                 urb = agg->urb;
1672                 if (urb->actual_length < ETH_ZLEN)
1673                         goto submit;
1674
1675                 rx_desc = agg->head;
1676                 rx_data = agg->head;
1677                 len_used += sizeof(struct rx_desc);
1678
1679                 while (urb->actual_length > len_used) {
1680                         struct net_device *netdev = tp->netdev;
1681                         struct net_device_stats *stats = &netdev->stats;
1682                         unsigned int pkt_len;
1683                         struct sk_buff *skb;
1684
1685                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1686                         if (pkt_len < ETH_ZLEN)
1687                                 break;
1688
1689                         len_used += pkt_len;
1690                         if (urb->actual_length < len_used)
1691                                 break;
1692
1693                         pkt_len -= CRC_SIZE;
1694                         rx_data += sizeof(struct rx_desc);
1695
1696                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1697                         if (!skb) {
1698                                 stats->rx_dropped++;
1699                                 goto find_next_rx;
1700                         }
1701
1702                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1703                         memcpy(skb->data, rx_data, pkt_len);
1704                         skb_put(skb, pkt_len);
1705                         skb->protocol = eth_type_trans(skb, netdev);
1706                         rtl_rx_vlan_tag(rx_desc, skb);
1707                         if (work_done < budget) {
1708                                 napi_gro_receive(&tp->napi, skb);
1709                                 work_done++;
1710                                 stats->rx_packets++;
1711                                 stats->rx_bytes += pkt_len;
1712                         } else {
1713                                 __skb_queue_tail(&tp->rx_queue, skb);
1714                         }
1715
1716 find_next_rx:
1717                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1718                         rx_desc = (struct rx_desc *)rx_data;
1719                         len_used = (int)(rx_data - (u8 *)agg->head);
1720                         len_used += sizeof(struct rx_desc);
1721                 }
1722
1723 submit:
1724                 if (!ret) {
1725                         ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1726                 } else {
1727                         urb->actual_length = 0;
1728                         list_add_tail(&agg->list, next);
1729                 }
1730         }
1731
1732         if (!list_empty(&rx_queue)) {
1733                 spin_lock_irqsave(&tp->rx_lock, flags);
1734                 list_splice_tail(&rx_queue, &tp->rx_done);
1735                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1736         }
1737
1738 out1:
1739         return work_done;
1740 }
1741
1742 static void tx_bottom(struct r8152 *tp)
1743 {
1744         int res;
1745
1746         do {
1747                 struct tx_agg *agg;
1748
1749                 if (skb_queue_empty(&tp->tx_queue))
1750                         break;
1751
1752                 agg = r8152_get_tx_agg(tp);
1753                 if (!agg)
1754                         break;
1755
1756                 res = r8152_tx_agg_fill(tp, agg);
1757                 if (res) {
1758                         struct net_device *netdev = tp->netdev;
1759
1760                         if (res == -ENODEV) {
1761                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1762                                 netif_device_detach(netdev);
1763                         } else {
1764                                 struct net_device_stats *stats = &netdev->stats;
1765                                 unsigned long flags;
1766
1767                                 netif_warn(tp, tx_err, netdev,
1768                                            "failed tx_urb %d\n", res);
1769                                 stats->tx_dropped += agg->skb_num;
1770
1771                                 spin_lock_irqsave(&tp->tx_lock, flags);
1772                                 list_add_tail(&agg->list, &tp->tx_free);
1773                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1774                         }
1775                 }
1776         } while (res == 0);
1777 }
1778
1779 static void bottom_half(struct r8152 *tp)
1780 {
1781         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1782                 return;
1783
1784         if (!test_bit(WORK_ENABLE, &tp->flags))
1785                 return;
1786
1787         /* When link down, the driver would cancel all bulks. */
1788         /* This avoid the re-submitting bulk */
1789         if (!netif_carrier_ok(tp->netdev))
1790                 return;
1791
1792         clear_bit(SCHEDULE_NAPI, &tp->flags);
1793
1794         tx_bottom(tp);
1795 }
1796
1797 static int r8152_poll(struct napi_struct *napi, int budget)
1798 {
1799         struct r8152 *tp = container_of(napi, struct r8152, napi);
1800         int work_done;
1801
1802         work_done = rx_bottom(tp, budget);
1803         bottom_half(tp);
1804
1805         if (work_done < budget) {
1806                 napi_complete(napi);
1807                 if (!list_empty(&tp->rx_done))
1808                         napi_schedule(napi);
1809         }
1810
1811         return work_done;
1812 }
1813
1814 static
1815 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1816 {
1817         int ret;
1818
1819         /* The rx would be stopped, so skip submitting */
1820         if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1821             !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1822                 return 0;
1823
1824         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1825                           agg->head, agg_buf_sz,
1826                           (usb_complete_t)read_bulk_callback, agg);
1827
1828         ret = usb_submit_urb(agg->urb, mem_flags);
1829         if (ret == -ENODEV) {
1830                 set_bit(RTL8152_UNPLUG, &tp->flags);
1831                 netif_device_detach(tp->netdev);
1832         } else if (ret) {
1833                 struct urb *urb = agg->urb;
1834                 unsigned long flags;
1835
1836                 urb->actual_length = 0;
1837                 spin_lock_irqsave(&tp->rx_lock, flags);
1838                 list_add_tail(&agg->list, &tp->rx_done);
1839                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1840
1841                 netif_err(tp, rx_err, tp->netdev,
1842                           "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1843
1844                 napi_schedule(&tp->napi);
1845         }
1846
1847         return ret;
1848 }
1849
1850 static void rtl_drop_queued_tx(struct r8152 *tp)
1851 {
1852         struct net_device_stats *stats = &tp->netdev->stats;
1853         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1854         struct sk_buff *skb;
1855
1856         if (skb_queue_empty(tx_queue))
1857                 return;
1858
1859         __skb_queue_head_init(&skb_head);
1860         spin_lock_bh(&tx_queue->lock);
1861         skb_queue_splice_init(tx_queue, &skb_head);
1862         spin_unlock_bh(&tx_queue->lock);
1863
1864         while ((skb = __skb_dequeue(&skb_head))) {
1865                 dev_kfree_skb(skb);
1866                 stats->tx_dropped++;
1867         }
1868 }
1869
1870 static void rtl8152_tx_timeout(struct net_device *netdev)
1871 {
1872         struct r8152 *tp = netdev_priv(netdev);
1873         int i;
1874
1875         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1876         for (i = 0; i < RTL8152_MAX_TX; i++)
1877                 usb_unlink_urb(tp->tx_info[i].urb);
1878 }
1879
1880 static void rtl8152_set_rx_mode(struct net_device *netdev)
1881 {
1882         struct r8152 *tp = netdev_priv(netdev);
1883
1884         if (netif_carrier_ok(netdev)) {
1885                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1886                 schedule_delayed_work(&tp->schedule, 0);
1887         }
1888 }
1889
1890 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1891 {
1892         struct r8152 *tp = netdev_priv(netdev);
1893         u32 mc_filter[2];       /* Multicast hash filter */
1894         __le32 tmp[2];
1895         u32 ocp_data;
1896
1897         clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1898         netif_stop_queue(netdev);
1899         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1900         ocp_data &= ~RCR_ACPT_ALL;
1901         ocp_data |= RCR_AB | RCR_APM;
1902
1903         if (netdev->flags & IFF_PROMISC) {
1904                 /* Unconditionally log net taps. */
1905                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1906                 ocp_data |= RCR_AM | RCR_AAP;
1907                 mc_filter[1] = 0xffffffff;
1908                 mc_filter[0] = 0xffffffff;
1909         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1910                    (netdev->flags & IFF_ALLMULTI)) {
1911                 /* Too many to filter perfectly -- accept all multicasts. */
1912                 ocp_data |= RCR_AM;
1913                 mc_filter[1] = 0xffffffff;
1914                 mc_filter[0] = 0xffffffff;
1915         } else {
1916                 struct netdev_hw_addr *ha;
1917
1918                 mc_filter[1] = 0;
1919                 mc_filter[0] = 0;
1920                 netdev_for_each_mc_addr(ha, netdev) {
1921                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1922
1923                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1924                         ocp_data |= RCR_AM;
1925                 }
1926         }
1927
1928         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1929         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1930
1931         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1932         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1933         netif_wake_queue(netdev);
1934 }
1935
1936 static netdev_features_t
1937 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1938                        netdev_features_t features)
1939 {
1940         u32 mss = skb_shinfo(skb)->gso_size;
1941         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1942         int offset = skb_transport_offset(skb);
1943
1944         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1945                 features &= ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
1946         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
1947                 features &= ~NETIF_F_GSO_MASK;
1948
1949         return features;
1950 }
1951
1952 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1953                                       struct net_device *netdev)
1954 {
1955         struct r8152 *tp = netdev_priv(netdev);
1956
1957         skb_tx_timestamp(skb);
1958
1959         skb_queue_tail(&tp->tx_queue, skb);
1960
1961         if (!list_empty(&tp->tx_free)) {
1962                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
1963                         set_bit(SCHEDULE_NAPI, &tp->flags);
1964                         schedule_delayed_work(&tp->schedule, 0);
1965                 } else {
1966                         usb_mark_last_busy(tp->udev);
1967                         napi_schedule(&tp->napi);
1968                 }
1969         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
1970                 netif_stop_queue(netdev);
1971         }
1972
1973         return NETDEV_TX_OK;
1974 }
1975
1976 static void r8152b_reset_packet_filter(struct r8152 *tp)
1977 {
1978         u32     ocp_data;
1979
1980         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1981         ocp_data &= ~FMC_FCR_MCU_EN;
1982         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1983         ocp_data |= FMC_FCR_MCU_EN;
1984         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1985 }
1986
1987 static void rtl8152_nic_reset(struct r8152 *tp)
1988 {
1989         int     i;
1990
1991         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1992
1993         for (i = 0; i < 1000; i++) {
1994                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1995                         break;
1996                 usleep_range(100, 400);
1997         }
1998 }
1999
2000 static void set_tx_qlen(struct r8152 *tp)
2001 {
2002         struct net_device *netdev = tp->netdev;
2003
2004         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2005                                     sizeof(struct tx_desc));
2006 }
2007
2008 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2009 {
2010         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2011 }
2012
2013 static void rtl_set_eee_plus(struct r8152 *tp)
2014 {
2015         u32 ocp_data;
2016         u8 speed;
2017
2018         speed = rtl8152_get_speed(tp);
2019         if (speed & _10bps) {
2020                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2021                 ocp_data |= EEEP_CR_EEEP_TX;
2022                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2023         } else {
2024                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2025                 ocp_data &= ~EEEP_CR_EEEP_TX;
2026                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2027         }
2028 }
2029
2030 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2031 {
2032         u32 ocp_data;
2033
2034         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2035         if (enable)
2036                 ocp_data |= RXDY_GATED_EN;
2037         else
2038                 ocp_data &= ~RXDY_GATED_EN;
2039         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2040 }
2041
2042 static int rtl_start_rx(struct r8152 *tp)
2043 {
2044         int i, ret = 0;
2045
2046         napi_disable(&tp->napi);
2047         INIT_LIST_HEAD(&tp->rx_done);
2048         for (i = 0; i < RTL8152_MAX_RX; i++) {
2049                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2050                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2051                 if (ret)
2052                         break;
2053         }
2054         napi_enable(&tp->napi);
2055
2056         if (ret && ++i < RTL8152_MAX_RX) {
2057                 struct list_head rx_queue;
2058                 unsigned long flags;
2059
2060                 INIT_LIST_HEAD(&rx_queue);
2061
2062                 do {
2063                         struct rx_agg *agg = &tp->rx_info[i++];
2064                         struct urb *urb = agg->urb;
2065
2066                         urb->actual_length = 0;
2067                         list_add_tail(&agg->list, &rx_queue);
2068                 } while (i < RTL8152_MAX_RX);
2069
2070                 spin_lock_irqsave(&tp->rx_lock, flags);
2071                 list_splice_tail(&rx_queue, &tp->rx_done);
2072                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2073         }
2074
2075         return ret;
2076 }
2077
2078 static int rtl_stop_rx(struct r8152 *tp)
2079 {
2080         int i;
2081
2082         for (i = 0; i < RTL8152_MAX_RX; i++)
2083                 usb_kill_urb(tp->rx_info[i].urb);
2084
2085         while (!skb_queue_empty(&tp->rx_queue))
2086                 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2087
2088         return 0;
2089 }
2090
2091 static int rtl_enable(struct r8152 *tp)
2092 {
2093         u32 ocp_data;
2094
2095         r8152b_reset_packet_filter(tp);
2096
2097         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2098         ocp_data |= CR_RE | CR_TE;
2099         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2100
2101         rxdy_gated_en(tp, false);
2102
2103         return 0;
2104 }
2105
2106 static int rtl8152_enable(struct r8152 *tp)
2107 {
2108         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2109                 return -ENODEV;
2110
2111         set_tx_qlen(tp);
2112         rtl_set_eee_plus(tp);
2113
2114         return rtl_enable(tp);
2115 }
2116
2117 static void r8153_set_rx_agg(struct r8152 *tp)
2118 {
2119         u8 speed;
2120
2121         speed = rtl8152_get_speed(tp);
2122         if (speed & _1000bps) {
2123                 if (tp->udev->speed == USB_SPEED_SUPER) {
2124                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2125                                         RX_THR_SUPPER);
2126                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2127                                         EARLY_AGG_SUPPER);
2128                 } else {
2129                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2130                                         RX_THR_HIGH);
2131                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2132                                         EARLY_AGG_HIGH);
2133                 }
2134         } else {
2135                 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_SLOW);
2136                 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2137                                 EARLY_AGG_SLOW);
2138         }
2139 }
2140
2141 static int rtl8153_enable(struct r8152 *tp)
2142 {
2143         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2144                 return -ENODEV;
2145
2146         set_tx_qlen(tp);
2147         rtl_set_eee_plus(tp);
2148         r8153_set_rx_agg(tp);
2149
2150         return rtl_enable(tp);
2151 }
2152
2153 static void rtl_disable(struct r8152 *tp)
2154 {
2155         u32 ocp_data;
2156         int i;
2157
2158         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2159                 rtl_drop_queued_tx(tp);
2160                 return;
2161         }
2162
2163         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2164         ocp_data &= ~RCR_ACPT_ALL;
2165         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2166
2167         rtl_drop_queued_tx(tp);
2168
2169         for (i = 0; i < RTL8152_MAX_TX; i++)
2170                 usb_kill_urb(tp->tx_info[i].urb);
2171
2172         rxdy_gated_en(tp, true);
2173
2174         for (i = 0; i < 1000; i++) {
2175                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2176                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2177                         break;
2178                 usleep_range(1000, 2000);
2179         }
2180
2181         for (i = 0; i < 1000; i++) {
2182                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2183                         break;
2184                 usleep_range(1000, 2000);
2185         }
2186
2187         rtl_stop_rx(tp);
2188
2189         rtl8152_nic_reset(tp);
2190 }
2191
2192 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2193 {
2194         u32 ocp_data;
2195
2196         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2197         if (enable)
2198                 ocp_data |= POWER_CUT;
2199         else
2200                 ocp_data &= ~POWER_CUT;
2201         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2202
2203         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2204         ocp_data &= ~RESUME_INDICATE;
2205         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2206 }
2207
2208 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2209 {
2210         u32 ocp_data;
2211
2212         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2213         if (enable)
2214                 ocp_data |= CPCR_RX_VLAN;
2215         else
2216                 ocp_data &= ~CPCR_RX_VLAN;
2217         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2218 }
2219
2220 static int rtl8152_set_features(struct net_device *dev,
2221                                 netdev_features_t features)
2222 {
2223         netdev_features_t changed = features ^ dev->features;
2224         struct r8152 *tp = netdev_priv(dev);
2225         int ret;
2226
2227         ret = usb_autopm_get_interface(tp->intf);
2228         if (ret < 0)
2229                 goto out;
2230
2231         mutex_lock(&tp->control);
2232
2233         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2234                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2235                         rtl_rx_vlan_en(tp, true);
2236                 else
2237                         rtl_rx_vlan_en(tp, false);
2238         }
2239
2240         mutex_unlock(&tp->control);
2241
2242         usb_autopm_put_interface(tp->intf);
2243
2244 out:
2245         return ret;
2246 }
2247
2248 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2249
2250 static u32 __rtl_get_wol(struct r8152 *tp)
2251 {
2252         u32 ocp_data;
2253         u32 wolopts = 0;
2254
2255         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2256         if (!(ocp_data & LAN_WAKE_EN))
2257                 return 0;
2258
2259         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2260         if (ocp_data & LINK_ON_WAKE_EN)
2261                 wolopts |= WAKE_PHY;
2262
2263         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2264         if (ocp_data & UWF_EN)
2265                 wolopts |= WAKE_UCAST;
2266         if (ocp_data & BWF_EN)
2267                 wolopts |= WAKE_BCAST;
2268         if (ocp_data & MWF_EN)
2269                 wolopts |= WAKE_MCAST;
2270
2271         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2272         if (ocp_data & MAGIC_EN)
2273                 wolopts |= WAKE_MAGIC;
2274
2275         return wolopts;
2276 }
2277
2278 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2279 {
2280         u32 ocp_data;
2281
2282         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2283
2284         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2285         ocp_data &= ~LINK_ON_WAKE_EN;
2286         if (wolopts & WAKE_PHY)
2287                 ocp_data |= LINK_ON_WAKE_EN;
2288         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2289
2290         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2291         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2292         if (wolopts & WAKE_UCAST)
2293                 ocp_data |= UWF_EN;
2294         if (wolopts & WAKE_BCAST)
2295                 ocp_data |= BWF_EN;
2296         if (wolopts & WAKE_MCAST)
2297                 ocp_data |= MWF_EN;
2298         if (wolopts & WAKE_ANY)
2299                 ocp_data |= LAN_WAKE_EN;
2300         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2301
2302         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2303
2304         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2305         ocp_data &= ~MAGIC_EN;
2306         if (wolopts & WAKE_MAGIC)
2307                 ocp_data |= MAGIC_EN;
2308         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2309
2310         if (wolopts & WAKE_ANY)
2311                 device_set_wakeup_enable(&tp->udev->dev, true);
2312         else
2313                 device_set_wakeup_enable(&tp->udev->dev, false);
2314 }
2315
2316 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2317 {
2318         if (enable) {
2319                 u32 ocp_data;
2320
2321                 __rtl_set_wol(tp, WAKE_ANY);
2322
2323                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2324
2325                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2326                 ocp_data |= LINK_OFF_WAKE_EN;
2327                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2328
2329                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2330         } else {
2331                 __rtl_set_wol(tp, tp->saved_wolopts);
2332         }
2333 }
2334
2335 static void rtl_phy_reset(struct r8152 *tp)
2336 {
2337         u16 data;
2338         int i;
2339
2340         clear_bit(PHY_RESET, &tp->flags);
2341
2342         data = r8152_mdio_read(tp, MII_BMCR);
2343
2344         /* don't reset again before the previous one complete */
2345         if (data & BMCR_RESET)
2346                 return;
2347
2348         data |= BMCR_RESET;
2349         r8152_mdio_write(tp, MII_BMCR, data);
2350
2351         for (i = 0; i < 50; i++) {
2352                 msleep(20);
2353                 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2354                         break;
2355         }
2356 }
2357
2358 static void r8153_teredo_off(struct r8152 *tp)
2359 {
2360         u32 ocp_data;
2361
2362         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2363         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2364         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2365
2366         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2367         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2368         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2369 }
2370
2371 static void r8152b_disable_aldps(struct r8152 *tp)
2372 {
2373         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2374         msleep(20);
2375 }
2376
2377 static inline void r8152b_enable_aldps(struct r8152 *tp)
2378 {
2379         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2380                                             LINKENA | DIS_SDSAVE);
2381 }
2382
2383 static void rtl8152_disable(struct r8152 *tp)
2384 {
2385         r8152b_disable_aldps(tp);
2386         rtl_disable(tp);
2387         r8152b_enable_aldps(tp);
2388 }
2389
2390 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2391 {
2392         u16 data;
2393
2394         data = r8152_mdio_read(tp, MII_BMCR);
2395         if (data & BMCR_PDOWN) {
2396                 data &= ~BMCR_PDOWN;
2397                 r8152_mdio_write(tp, MII_BMCR, data);
2398         }
2399
2400         set_bit(PHY_RESET, &tp->flags);
2401 }
2402
2403 static void r8152b_exit_oob(struct r8152 *tp)
2404 {
2405         u32 ocp_data;
2406         int i;
2407
2408         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2409         ocp_data &= ~RCR_ACPT_ALL;
2410         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2411
2412         rxdy_gated_en(tp, true);
2413         r8153_teredo_off(tp);
2414         r8152b_hw_phy_cfg(tp);
2415
2416         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2417         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2418
2419         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2420         ocp_data &= ~NOW_IS_OOB;
2421         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2422
2423         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2424         ocp_data &= ~MCU_BORW_EN;
2425         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2426
2427         for (i = 0; i < 1000; i++) {
2428                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2429                 if (ocp_data & LINK_LIST_READY)
2430                         break;
2431                 usleep_range(1000, 2000);
2432         }
2433
2434         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2435         ocp_data |= RE_INIT_LL;
2436         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2437
2438         for (i = 0; i < 1000; i++) {
2439                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2440                 if (ocp_data & LINK_LIST_READY)
2441                         break;
2442                 usleep_range(1000, 2000);
2443         }
2444
2445         rtl8152_nic_reset(tp);
2446
2447         /* rx share fifo credit full threshold */
2448         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2449
2450         if (tp->udev->speed == USB_SPEED_FULL ||
2451             tp->udev->speed == USB_SPEED_LOW) {
2452                 /* rx share fifo credit near full threshold */
2453                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2454                                 RXFIFO_THR2_FULL);
2455                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2456                                 RXFIFO_THR3_FULL);
2457         } else {
2458                 /* rx share fifo credit near full threshold */
2459                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2460                                 RXFIFO_THR2_HIGH);
2461                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2462                                 RXFIFO_THR3_HIGH);
2463         }
2464
2465         /* TX share fifo free credit full threshold */
2466         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2467
2468         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2469         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2470         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2471                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2472
2473         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2474
2475         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2476
2477         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2478         ocp_data |= TCR0_AUTO_FIFO;
2479         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2480 }
2481
2482 static void r8152b_enter_oob(struct r8152 *tp)
2483 {
2484         u32 ocp_data;
2485         int i;
2486
2487         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2488         ocp_data &= ~NOW_IS_OOB;
2489         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2490
2491         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2492         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2493         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2494
2495         rtl_disable(tp);
2496
2497         for (i = 0; i < 1000; i++) {
2498                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2499                 if (ocp_data & LINK_LIST_READY)
2500                         break;
2501                 usleep_range(1000, 2000);
2502         }
2503
2504         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2505         ocp_data |= RE_INIT_LL;
2506         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2507
2508         for (i = 0; i < 1000; i++) {
2509                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2510                 if (ocp_data & LINK_LIST_READY)
2511                         break;
2512                 usleep_range(1000, 2000);
2513         }
2514
2515         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2516
2517         rtl_rx_vlan_en(tp, true);
2518
2519         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2520         ocp_data |= ALDPS_PROXY_MODE;
2521         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2522
2523         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2524         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2525         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2526
2527         rxdy_gated_en(tp, false);
2528
2529         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2530         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2531         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2532 }
2533
2534 static void r8153_hw_phy_cfg(struct r8152 *tp)
2535 {
2536         u32 ocp_data;
2537         u16 data;
2538
2539         ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2540         data = r8152_mdio_read(tp, MII_BMCR);
2541         if (data & BMCR_PDOWN) {
2542                 data &= ~BMCR_PDOWN;
2543                 r8152_mdio_write(tp, MII_BMCR, data);
2544         }
2545
2546         if (tp->version == RTL_VER_03) {
2547                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2548                 data &= ~CTAP_SHORT_EN;
2549                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2550         }
2551
2552         data = ocp_reg_read(tp, OCP_POWER_CFG);
2553         data |= EEE_CLKDIV_EN;
2554         ocp_reg_write(tp, OCP_POWER_CFG, data);
2555
2556         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2557         data |= EN_10M_BGOFF;
2558         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2559         data = ocp_reg_read(tp, OCP_POWER_CFG);
2560         data |= EN_10M_PLLOFF;
2561         ocp_reg_write(tp, OCP_POWER_CFG, data);
2562         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2563
2564         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2565         ocp_data |= PFM_PWM_SWITCH;
2566         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2567
2568         /* Enable LPF corner auto tune */
2569         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2570
2571         /* Adjust 10M Amplitude */
2572         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2573         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2574
2575         set_bit(PHY_RESET, &tp->flags);
2576 }
2577
2578 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2579 {
2580         u8 u1u2[8];
2581
2582         if (enable)
2583                 memset(u1u2, 0xff, sizeof(u1u2));
2584         else
2585                 memset(u1u2, 0x00, sizeof(u1u2));
2586
2587         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2588 }
2589
2590 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2591 {
2592         u32 ocp_data;
2593
2594         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2595         if (enable)
2596                 ocp_data |= U2P3_ENABLE;
2597         else
2598                 ocp_data &= ~U2P3_ENABLE;
2599         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2600 }
2601
2602 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2603 {
2604         u32 ocp_data;
2605
2606         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2607         if (enable)
2608                 ocp_data |= PWR_EN | PHASE2_EN;
2609         else
2610                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2611         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2612
2613         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2614         ocp_data &= ~PCUT_STATUS;
2615         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2616 }
2617
2618 static void r8153_first_init(struct r8152 *tp)
2619 {
2620         u32 ocp_data;
2621         int i;
2622
2623         rxdy_gated_en(tp, true);
2624         r8153_teredo_off(tp);
2625
2626         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2627         ocp_data &= ~RCR_ACPT_ALL;
2628         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2629
2630         r8153_hw_phy_cfg(tp);
2631
2632         rtl8152_nic_reset(tp);
2633
2634         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2635         ocp_data &= ~NOW_IS_OOB;
2636         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2637
2638         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2639         ocp_data &= ~MCU_BORW_EN;
2640         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2641
2642         for (i = 0; i < 1000; i++) {
2643                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2644                 if (ocp_data & LINK_LIST_READY)
2645                         break;
2646                 usleep_range(1000, 2000);
2647         }
2648
2649         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2650         ocp_data |= RE_INIT_LL;
2651         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2652
2653         for (i = 0; i < 1000; i++) {
2654                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2655                 if (ocp_data & LINK_LIST_READY)
2656                         break;
2657                 usleep_range(1000, 2000);
2658         }
2659
2660         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2661
2662         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2663         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2664
2665         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2666         ocp_data |= TCR0_AUTO_FIFO;
2667         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2668
2669         rtl8152_nic_reset(tp);
2670
2671         /* rx share fifo credit full threshold */
2672         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2673         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2674         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2675         /* TX share fifo free credit full threshold */
2676         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2677
2678         /* rx aggregation */
2679         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2680         ocp_data &= ~RX_AGG_DISABLE;
2681         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2682 }
2683
2684 static void r8153_enter_oob(struct r8152 *tp)
2685 {
2686         u32 ocp_data;
2687         int i;
2688
2689         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2690         ocp_data &= ~NOW_IS_OOB;
2691         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2692
2693         rtl_disable(tp);
2694
2695         for (i = 0; i < 1000; i++) {
2696                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2697                 if (ocp_data & LINK_LIST_READY)
2698                         break;
2699                 usleep_range(1000, 2000);
2700         }
2701
2702         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2703         ocp_data |= RE_INIT_LL;
2704         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2705
2706         for (i = 0; i < 1000; i++) {
2707                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2708                 if (ocp_data & LINK_LIST_READY)
2709                         break;
2710                 usleep_range(1000, 2000);
2711         }
2712
2713         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2714
2715         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2716         ocp_data &= ~TEREDO_WAKE_MASK;
2717         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2718
2719         rtl_rx_vlan_en(tp, true);
2720
2721         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2722         ocp_data |= ALDPS_PROXY_MODE;
2723         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2724
2725         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2726         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2727         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2728
2729         rxdy_gated_en(tp, false);
2730
2731         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2732         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2733         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2734 }
2735
2736 static void r8153_disable_aldps(struct r8152 *tp)
2737 {
2738         u16 data;
2739
2740         data = ocp_reg_read(tp, OCP_POWER_CFG);
2741         data &= ~EN_ALDPS;
2742         ocp_reg_write(tp, OCP_POWER_CFG, data);
2743         msleep(20);
2744 }
2745
2746 static void r8153_enable_aldps(struct r8152 *tp)
2747 {
2748         u16 data;
2749
2750         data = ocp_reg_read(tp, OCP_POWER_CFG);
2751         data |= EN_ALDPS;
2752         ocp_reg_write(tp, OCP_POWER_CFG, data);
2753 }
2754
2755 static void rtl8153_disable(struct r8152 *tp)
2756 {
2757         r8153_disable_aldps(tp);
2758         rtl_disable(tp);
2759         r8153_enable_aldps(tp);
2760 }
2761
2762 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2763 {
2764         u16 bmcr, anar, gbcr;
2765         int ret = 0;
2766
2767         cancel_delayed_work_sync(&tp->schedule);
2768         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2769         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2770                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2771         if (tp->mii.supports_gmii) {
2772                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2773                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2774         } else {
2775                 gbcr = 0;
2776         }
2777
2778         if (autoneg == AUTONEG_DISABLE) {
2779                 if (speed == SPEED_10) {
2780                         bmcr = 0;
2781                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2782                 } else if (speed == SPEED_100) {
2783                         bmcr = BMCR_SPEED100;
2784                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2785                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2786                         bmcr = BMCR_SPEED1000;
2787                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2788                 } else {
2789                         ret = -EINVAL;
2790                         goto out;
2791                 }
2792
2793                 if (duplex == DUPLEX_FULL)
2794                         bmcr |= BMCR_FULLDPLX;
2795         } else {
2796                 if (speed == SPEED_10) {
2797                         if (duplex == DUPLEX_FULL)
2798                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2799                         else
2800                                 anar |= ADVERTISE_10HALF;
2801                 } else if (speed == SPEED_100) {
2802                         if (duplex == DUPLEX_FULL) {
2803                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2804                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2805                         } else {
2806                                 anar |= ADVERTISE_10HALF;
2807                                 anar |= ADVERTISE_100HALF;
2808                         }
2809                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2810                         if (duplex == DUPLEX_FULL) {
2811                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2812                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2813                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2814                         } else {
2815                                 anar |= ADVERTISE_10HALF;
2816                                 anar |= ADVERTISE_100HALF;
2817                                 gbcr |= ADVERTISE_1000HALF;
2818                         }
2819                 } else {
2820                         ret = -EINVAL;
2821                         goto out;
2822                 }
2823
2824                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2825         }
2826
2827         if (test_bit(PHY_RESET, &tp->flags))
2828                 bmcr |= BMCR_RESET;
2829
2830         if (tp->mii.supports_gmii)
2831                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2832
2833         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2834         r8152_mdio_write(tp, MII_BMCR, bmcr);
2835
2836         if (test_bit(PHY_RESET, &tp->flags)) {
2837                 int i;
2838
2839                 clear_bit(PHY_RESET, &tp->flags);
2840                 for (i = 0; i < 50; i++) {
2841                         msleep(20);
2842                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2843                                 break;
2844                 }
2845         }
2846
2847 out:
2848
2849         return ret;
2850 }
2851
2852 static void rtl8152_up(struct r8152 *tp)
2853 {
2854         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2855                 return;
2856
2857         r8152b_disable_aldps(tp);
2858         r8152b_exit_oob(tp);
2859         r8152b_enable_aldps(tp);
2860 }
2861
2862 static void rtl8152_down(struct r8152 *tp)
2863 {
2864         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2865                 rtl_drop_queued_tx(tp);
2866                 return;
2867         }
2868
2869         r8152_power_cut_en(tp, false);
2870         r8152b_disable_aldps(tp);
2871         r8152b_enter_oob(tp);
2872         r8152b_enable_aldps(tp);
2873 }
2874
2875 static void rtl8153_up(struct r8152 *tp)
2876 {
2877         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2878                 return;
2879
2880         r8153_disable_aldps(tp);
2881         r8153_first_init(tp);
2882         r8153_enable_aldps(tp);
2883 }
2884
2885 static void rtl8153_down(struct r8152 *tp)
2886 {
2887         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2888                 rtl_drop_queued_tx(tp);
2889                 return;
2890         }
2891
2892         r8153_u1u2en(tp, false);
2893         r8153_power_cut_en(tp, false);
2894         r8153_disable_aldps(tp);
2895         r8153_enter_oob(tp);
2896         r8153_enable_aldps(tp);
2897 }
2898
2899 static void set_carrier(struct r8152 *tp)
2900 {
2901         struct net_device *netdev = tp->netdev;
2902         u8 speed;
2903
2904         clear_bit(RTL8152_LINK_CHG, &tp->flags);
2905         speed = rtl8152_get_speed(tp);
2906
2907         if (speed & LINK_STATUS) {
2908                 if (!netif_carrier_ok(netdev)) {
2909                         tp->rtl_ops.enable(tp);
2910                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2911                         netif_carrier_on(netdev);
2912                         rtl_start_rx(tp);
2913                 }
2914         } else {
2915                 if (netif_carrier_ok(netdev)) {
2916                         netif_carrier_off(netdev);
2917                         napi_disable(&tp->napi);
2918                         tp->rtl_ops.disable(tp);
2919                         napi_enable(&tp->napi);
2920                 }
2921         }
2922 }
2923
2924 static void rtl_work_func_t(struct work_struct *work)
2925 {
2926         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
2927
2928         /* If the device is unplugged or !netif_running(), the workqueue
2929          * doesn't need to wake the device, and could return directly.
2930          */
2931         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
2932                 return;
2933
2934         if (usb_autopm_get_interface(tp->intf) < 0)
2935                 return;
2936
2937         if (!test_bit(WORK_ENABLE, &tp->flags))
2938                 goto out1;
2939
2940         if (!mutex_trylock(&tp->control)) {
2941                 schedule_delayed_work(&tp->schedule, 0);
2942                 goto out1;
2943         }
2944
2945         if (test_bit(RTL8152_LINK_CHG, &tp->flags))
2946                 set_carrier(tp);
2947
2948         if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
2949                 _rtl8152_set_rx_mode(tp->netdev);
2950
2951         /* don't schedule napi before linking */
2952         if (test_bit(SCHEDULE_NAPI, &tp->flags) &&
2953             netif_carrier_ok(tp->netdev)) {
2954                 clear_bit(SCHEDULE_NAPI, &tp->flags);
2955                 napi_schedule(&tp->napi);
2956         }
2957
2958         if (test_bit(PHY_RESET, &tp->flags))
2959                 rtl_phy_reset(tp);
2960
2961         mutex_unlock(&tp->control);
2962
2963 out1:
2964         usb_autopm_put_interface(tp->intf);
2965 }
2966
2967 static int rtl8152_open(struct net_device *netdev)
2968 {
2969         struct r8152 *tp = netdev_priv(netdev);
2970         int res = 0;
2971
2972         res = alloc_all_mem(tp);
2973         if (res)
2974                 goto out;
2975
2976         netif_carrier_off(netdev);
2977
2978         res = usb_autopm_get_interface(tp->intf);
2979         if (res < 0) {
2980                 free_all_mem(tp);
2981                 goto out;
2982         }
2983
2984         mutex_lock(&tp->control);
2985
2986         /* The WORK_ENABLE may be set when autoresume occurs */
2987         if (test_bit(WORK_ENABLE, &tp->flags)) {
2988                 clear_bit(WORK_ENABLE, &tp->flags);
2989                 usb_kill_urb(tp->intr_urb);
2990                 cancel_delayed_work_sync(&tp->schedule);
2991
2992                 /* disable the tx/rx, if the workqueue has enabled them. */
2993                 if (netif_carrier_ok(netdev))
2994                         tp->rtl_ops.disable(tp);
2995         }
2996
2997         tp->rtl_ops.up(tp);
2998
2999         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3000                           tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3001                           DUPLEX_FULL);
3002         netif_carrier_off(netdev);
3003         netif_start_queue(netdev);
3004         set_bit(WORK_ENABLE, &tp->flags);
3005
3006         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3007         if (res) {
3008                 if (res == -ENODEV)
3009                         netif_device_detach(tp->netdev);
3010                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3011                            res);
3012                 free_all_mem(tp);
3013         } else {
3014                 napi_enable(&tp->napi);
3015         }
3016
3017         mutex_unlock(&tp->control);
3018
3019         usb_autopm_put_interface(tp->intf);
3020
3021 out:
3022         return res;
3023 }
3024
3025 static int rtl8152_close(struct net_device *netdev)
3026 {
3027         struct r8152 *tp = netdev_priv(netdev);
3028         int res = 0;
3029
3030         napi_disable(&tp->napi);
3031         clear_bit(WORK_ENABLE, &tp->flags);
3032         usb_kill_urb(tp->intr_urb);
3033         cancel_delayed_work_sync(&tp->schedule);
3034         netif_stop_queue(netdev);
3035
3036         res = usb_autopm_get_interface(tp->intf);
3037         if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3038                 rtl_drop_queued_tx(tp);
3039                 rtl_stop_rx(tp);
3040         } else {
3041                 mutex_lock(&tp->control);
3042
3043                 /* The autosuspend may have been enabled and wouldn't
3044                  * be disable when autoresume occurs, because the
3045                  * netif_running() would be false.
3046                  */
3047                 rtl_runtime_suspend_enable(tp, false);
3048
3049                 tp->rtl_ops.down(tp);
3050
3051                 mutex_unlock(&tp->control);
3052
3053                 usb_autopm_put_interface(tp->intf);
3054         }
3055
3056         free_all_mem(tp);
3057
3058         return res;
3059 }
3060
3061 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3062 {
3063         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3064         ocp_reg_write(tp, OCP_EEE_DATA, reg);
3065         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3066 }
3067
3068 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3069 {
3070         u16 data;
3071
3072         r8152_mmd_indirect(tp, dev, reg);
3073         data = ocp_reg_read(tp, OCP_EEE_DATA);
3074         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3075
3076         return data;
3077 }
3078
3079 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3080 {
3081         r8152_mmd_indirect(tp, dev, reg);
3082         ocp_reg_write(tp, OCP_EEE_DATA, data);
3083         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3084 }
3085
3086 static void r8152_eee_en(struct r8152 *tp, bool enable)
3087 {
3088         u16 config1, config2, config3;
3089         u32 ocp_data;
3090
3091         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3092         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3093         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3094         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3095
3096         if (enable) {
3097                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3098                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3099                 config1 |= sd_rise_time(1);
3100                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3101                 config3 |= fast_snr(42);
3102         } else {
3103                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3104                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3105                              RX_QUIET_EN);
3106                 config1 |= sd_rise_time(7);
3107                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3108                 config3 |= fast_snr(511);
3109         }
3110
3111         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3112         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3113         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3114         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3115 }
3116
3117 static void r8152b_enable_eee(struct r8152 *tp)
3118 {
3119         r8152_eee_en(tp, true);
3120         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3121 }
3122
3123 static void r8153_eee_en(struct r8152 *tp, bool enable)
3124 {
3125         u32 ocp_data;
3126         u16 config;
3127
3128         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3129         config = ocp_reg_read(tp, OCP_EEE_CFG);
3130
3131         if (enable) {
3132                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3133                 config |= EEE10_EN;
3134         } else {
3135                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3136                 config &= ~EEE10_EN;
3137         }
3138
3139         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3140         ocp_reg_write(tp, OCP_EEE_CFG, config);
3141 }
3142
3143 static void r8153_enable_eee(struct r8152 *tp)
3144 {
3145         r8153_eee_en(tp, true);
3146         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3147 }
3148
3149 static void r8152b_enable_fc(struct r8152 *tp)
3150 {
3151         u16 anar;
3152
3153         anar = r8152_mdio_read(tp, MII_ADVERTISE);
3154         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3155         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3156 }
3157
3158 static void rtl_tally_reset(struct r8152 *tp)
3159 {
3160         u32 ocp_data;
3161
3162         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3163         ocp_data |= TALLY_RESET;
3164         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3165 }
3166
3167 static void r8152b_init(struct r8152 *tp)
3168 {
3169         u32 ocp_data;
3170
3171         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3172                 return;
3173
3174         r8152b_disable_aldps(tp);
3175
3176         if (tp->version == RTL_VER_01) {
3177                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3178                 ocp_data &= ~LED_MODE_MASK;
3179                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3180         }
3181
3182         r8152_power_cut_en(tp, false);
3183
3184         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3185         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3186         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3187         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3188         ocp_data &= ~MCU_CLK_RATIO_MASK;
3189         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3190         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3191         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3192                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3193         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3194
3195         r8152b_enable_eee(tp);
3196         r8152b_enable_aldps(tp);
3197         r8152b_enable_fc(tp);
3198         rtl_tally_reset(tp);
3199
3200         /* enable rx aggregation */
3201         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3202         ocp_data &= ~RX_AGG_DISABLE;
3203         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3204 }
3205
3206 static void r8153_init(struct r8152 *tp)
3207 {
3208         u32 ocp_data;
3209         int i;
3210
3211         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3212                 return;
3213
3214         r8153_disable_aldps(tp);
3215         r8153_u1u2en(tp, false);
3216
3217         for (i = 0; i < 500; i++) {
3218                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3219                     AUTOLOAD_DONE)
3220                         break;
3221                 msleep(20);
3222         }
3223
3224         for (i = 0; i < 500; i++) {
3225                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3226                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3227                         break;
3228                 msleep(20);
3229         }
3230
3231         r8153_u2p3en(tp, false);
3232
3233         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3234         ocp_data &= ~TIMER11_EN;
3235         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3236
3237         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3238         ocp_data &= ~LED_MODE_MASK;
3239         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3240
3241         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL);
3242         ocp_data &= ~LPM_TIMER_MASK;
3243         if (tp->version == RTL_VER_04 && tp->udev->speed != USB_SPEED_SUPER)
3244                 ocp_data |= LPM_TIMER_500MS;
3245         else
3246                 ocp_data |= LPM_TIMER_500US;
3247         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3248
3249         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3250         ocp_data &= ~SEN_VAL_MASK;
3251         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3252         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3253
3254         r8153_power_cut_en(tp, false);
3255         r8153_u1u2en(tp, true);
3256
3257         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3258         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3259         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3260                        PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3261                        U1U2_SPDWN_EN | L1_SPDWN_EN);
3262         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3263                        PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3264                        TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3265                        EEE_SPDWN_EN);
3266
3267         r8153_enable_eee(tp);
3268         r8153_enable_aldps(tp);
3269         r8152b_enable_fc(tp);
3270         rtl_tally_reset(tp);
3271 }
3272
3273 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3274 {
3275         struct r8152 *tp = usb_get_intfdata(intf);
3276         struct net_device *netdev = tp->netdev;
3277         int ret = 0;
3278
3279         mutex_lock(&tp->control);
3280
3281         if (PMSG_IS_AUTO(message)) {
3282                 if (netif_running(netdev) && work_busy(&tp->schedule.work)) {
3283                         ret = -EBUSY;
3284                         goto out1;
3285                 }
3286
3287                 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3288         } else {
3289                 netif_device_detach(netdev);
3290         }
3291
3292         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3293                 clear_bit(WORK_ENABLE, &tp->flags);
3294                 usb_kill_urb(tp->intr_urb);
3295                 napi_disable(&tp->napi);
3296                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3297                         rtl_stop_rx(tp);
3298                         rtl_runtime_suspend_enable(tp, true);
3299                 } else {
3300                         cancel_delayed_work_sync(&tp->schedule);
3301                         tp->rtl_ops.down(tp);
3302                 }
3303                 napi_enable(&tp->napi);
3304         }
3305 out1:
3306         mutex_unlock(&tp->control);
3307
3308         return ret;
3309 }
3310
3311 static int rtl8152_resume(struct usb_interface *intf)
3312 {
3313         struct r8152 *tp = usb_get_intfdata(intf);
3314
3315         mutex_lock(&tp->control);
3316
3317         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3318                 tp->rtl_ops.init(tp);
3319                 netif_device_attach(tp->netdev);
3320         }
3321
3322         if (netif_running(tp->netdev)) {
3323                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3324                         rtl_runtime_suspend_enable(tp, false);
3325                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3326                         set_bit(WORK_ENABLE, &tp->flags);
3327                         if (netif_carrier_ok(tp->netdev))
3328                                 rtl_start_rx(tp);
3329                 } else {
3330                         tp->rtl_ops.up(tp);
3331                         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3332                                           tp->mii.supports_gmii ?
3333                                           SPEED_1000 : SPEED_100,
3334                                           DUPLEX_FULL);
3335                         netif_carrier_off(tp->netdev);
3336                         set_bit(WORK_ENABLE, &tp->flags);
3337                 }
3338                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3339         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3340                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3341         }
3342
3343         mutex_unlock(&tp->control);
3344
3345         return 0;
3346 }
3347
3348 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3349 {
3350         struct r8152 *tp = netdev_priv(dev);
3351
3352         if (usb_autopm_get_interface(tp->intf) < 0)
3353                 return;
3354
3355         mutex_lock(&tp->control);
3356
3357         wol->supported = WAKE_ANY;
3358         wol->wolopts = __rtl_get_wol(tp);
3359
3360         mutex_unlock(&tp->control);
3361
3362         usb_autopm_put_interface(tp->intf);
3363 }
3364
3365 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3366 {
3367         struct r8152 *tp = netdev_priv(dev);
3368         int ret;
3369
3370         ret = usb_autopm_get_interface(tp->intf);
3371         if (ret < 0)
3372                 goto out_set_wol;
3373
3374         mutex_lock(&tp->control);
3375
3376         __rtl_set_wol(tp, wol->wolopts);
3377         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3378
3379         mutex_unlock(&tp->control);
3380
3381         usb_autopm_put_interface(tp->intf);
3382
3383 out_set_wol:
3384         return ret;
3385 }
3386
3387 static u32 rtl8152_get_msglevel(struct net_device *dev)
3388 {
3389         struct r8152 *tp = netdev_priv(dev);
3390
3391         return tp->msg_enable;
3392 }
3393
3394 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3395 {
3396         struct r8152 *tp = netdev_priv(dev);
3397
3398         tp->msg_enable = value;
3399 }
3400
3401 static void rtl8152_get_drvinfo(struct net_device *netdev,
3402                                 struct ethtool_drvinfo *info)
3403 {
3404         struct r8152 *tp = netdev_priv(netdev);
3405
3406         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3407         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3408         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3409 }
3410
3411 static
3412 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3413 {
3414         struct r8152 *tp = netdev_priv(netdev);
3415         int ret;
3416
3417         if (!tp->mii.mdio_read)
3418                 return -EOPNOTSUPP;
3419
3420         ret = usb_autopm_get_interface(tp->intf);
3421         if (ret < 0)
3422                 goto out;
3423
3424         mutex_lock(&tp->control);
3425
3426         ret = mii_ethtool_gset(&tp->mii, cmd);
3427
3428         mutex_unlock(&tp->control);
3429
3430         usb_autopm_put_interface(tp->intf);
3431
3432 out:
3433         return ret;
3434 }
3435
3436 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3437 {
3438         struct r8152 *tp = netdev_priv(dev);
3439         int ret;
3440
3441         ret = usb_autopm_get_interface(tp->intf);
3442         if (ret < 0)
3443                 goto out;
3444
3445         mutex_lock(&tp->control);
3446
3447         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3448
3449         mutex_unlock(&tp->control);
3450
3451         usb_autopm_put_interface(tp->intf);
3452
3453 out:
3454         return ret;
3455 }
3456
3457 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3458         "tx_packets",
3459         "rx_packets",
3460         "tx_errors",
3461         "rx_errors",
3462         "rx_missed",
3463         "align_errors",
3464         "tx_single_collisions",
3465         "tx_multi_collisions",
3466         "rx_unicast",
3467         "rx_broadcast",
3468         "rx_multicast",
3469         "tx_aborted",
3470         "tx_underrun",
3471 };
3472
3473 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3474 {
3475         switch (sset) {
3476         case ETH_SS_STATS:
3477                 return ARRAY_SIZE(rtl8152_gstrings);
3478         default:
3479                 return -EOPNOTSUPP;
3480         }
3481 }
3482
3483 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3484                                       struct ethtool_stats *stats, u64 *data)
3485 {
3486         struct r8152 *tp = netdev_priv(dev);
3487         struct tally_counter tally;
3488
3489         if (usb_autopm_get_interface(tp->intf) < 0)
3490                 return;
3491
3492         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3493
3494         usb_autopm_put_interface(tp->intf);
3495
3496         data[0] = le64_to_cpu(tally.tx_packets);
3497         data[1] = le64_to_cpu(tally.rx_packets);
3498         data[2] = le64_to_cpu(tally.tx_errors);
3499         data[3] = le32_to_cpu(tally.rx_errors);
3500         data[4] = le16_to_cpu(tally.rx_missed);
3501         data[5] = le16_to_cpu(tally.align_errors);
3502         data[6] = le32_to_cpu(tally.tx_one_collision);
3503         data[7] = le32_to_cpu(tally.tx_multi_collision);
3504         data[8] = le64_to_cpu(tally.rx_unicast);
3505         data[9] = le64_to_cpu(tally.rx_broadcast);
3506         data[10] = le32_to_cpu(tally.rx_multicast);
3507         data[11] = le16_to_cpu(tally.tx_aborted);
3508         data[12] = le16_to_cpu(tally.tx_underrun);
3509 }
3510
3511 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3512 {
3513         switch (stringset) {
3514         case ETH_SS_STATS:
3515                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3516                 break;
3517         }
3518 }
3519
3520 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3521 {
3522         u32 ocp_data, lp, adv, supported = 0;
3523         u16 val;
3524
3525         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3526         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3527
3528         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3529         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3530
3531         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3532         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3533
3534         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3535         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3536
3537         eee->eee_enabled = !!ocp_data;
3538         eee->eee_active = !!(supported & adv & lp);
3539         eee->supported = supported;
3540         eee->advertised = adv;
3541         eee->lp_advertised = lp;
3542
3543         return 0;
3544 }
3545
3546 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3547 {
3548         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3549
3550         r8152_eee_en(tp, eee->eee_enabled);
3551
3552         if (!eee->eee_enabled)
3553                 val = 0;
3554
3555         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3556
3557         return 0;
3558 }
3559
3560 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3561 {
3562         u32 ocp_data, lp, adv, supported = 0;
3563         u16 val;
3564
3565         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3566         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3567
3568         val = ocp_reg_read(tp, OCP_EEE_ADV);
3569         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3570
3571         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3572         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3573
3574         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3575         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3576
3577         eee->eee_enabled = !!ocp_data;
3578         eee->eee_active = !!(supported & adv & lp);
3579         eee->supported = supported;
3580         eee->advertised = adv;
3581         eee->lp_advertised = lp;
3582
3583         return 0;
3584 }
3585
3586 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3587 {
3588         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3589
3590         r8153_eee_en(tp, eee->eee_enabled);
3591
3592         if (!eee->eee_enabled)
3593                 val = 0;
3594
3595         ocp_reg_write(tp, OCP_EEE_ADV, val);
3596
3597         return 0;
3598 }
3599
3600 static int
3601 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3602 {
3603         struct r8152 *tp = netdev_priv(net);
3604         int ret;
3605
3606         ret = usb_autopm_get_interface(tp->intf);
3607         if (ret < 0)
3608                 goto out;
3609
3610         mutex_lock(&tp->control);
3611
3612         ret = tp->rtl_ops.eee_get(tp, edata);
3613
3614         mutex_unlock(&tp->control);
3615
3616         usb_autopm_put_interface(tp->intf);
3617
3618 out:
3619         return ret;
3620 }
3621
3622 static int
3623 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3624 {
3625         struct r8152 *tp = netdev_priv(net);
3626         int ret;
3627
3628         ret = usb_autopm_get_interface(tp->intf);
3629         if (ret < 0)
3630                 goto out;
3631
3632         mutex_lock(&tp->control);
3633
3634         ret = tp->rtl_ops.eee_set(tp, edata);
3635         if (!ret)
3636                 ret = mii_nway_restart(&tp->mii);
3637
3638         mutex_unlock(&tp->control);
3639
3640         usb_autopm_put_interface(tp->intf);
3641
3642 out:
3643         return ret;
3644 }
3645
3646 static int rtl8152_nway_reset(struct net_device *dev)
3647 {
3648         struct r8152 *tp = netdev_priv(dev);
3649         int ret;
3650
3651         ret = usb_autopm_get_interface(tp->intf);
3652         if (ret < 0)
3653                 goto out;
3654
3655         mutex_lock(&tp->control);
3656
3657         ret = mii_nway_restart(&tp->mii);
3658
3659         mutex_unlock(&tp->control);
3660
3661         usb_autopm_put_interface(tp->intf);
3662
3663 out:
3664         return ret;
3665 }
3666
3667 static struct ethtool_ops ops = {
3668         .get_drvinfo = rtl8152_get_drvinfo,
3669         .get_settings = rtl8152_get_settings,
3670         .set_settings = rtl8152_set_settings,
3671         .get_link = ethtool_op_get_link,
3672         .nway_reset = rtl8152_nway_reset,
3673         .get_msglevel = rtl8152_get_msglevel,
3674         .set_msglevel = rtl8152_set_msglevel,
3675         .get_wol = rtl8152_get_wol,
3676         .set_wol = rtl8152_set_wol,
3677         .get_strings = rtl8152_get_strings,
3678         .get_sset_count = rtl8152_get_sset_count,
3679         .get_ethtool_stats = rtl8152_get_ethtool_stats,
3680         .get_eee = rtl_ethtool_get_eee,
3681         .set_eee = rtl_ethtool_set_eee,
3682 };
3683
3684 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3685 {
3686         struct r8152 *tp = netdev_priv(netdev);
3687         struct mii_ioctl_data *data = if_mii(rq);
3688         int res;
3689
3690         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3691                 return -ENODEV;
3692
3693         res = usb_autopm_get_interface(tp->intf);
3694         if (res < 0)
3695                 goto out;
3696
3697         switch (cmd) {
3698         case SIOCGMIIPHY:
3699                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3700                 break;
3701
3702         case SIOCGMIIREG:
3703                 mutex_lock(&tp->control);
3704                 data->val_out = r8152_mdio_read(tp, data->reg_num);
3705                 mutex_unlock(&tp->control);
3706                 break;
3707
3708         case SIOCSMIIREG:
3709                 if (!capable(CAP_NET_ADMIN)) {
3710                         res = -EPERM;
3711                         break;
3712                 }
3713                 mutex_lock(&tp->control);
3714                 r8152_mdio_write(tp, data->reg_num, data->val_in);
3715                 mutex_unlock(&tp->control);
3716                 break;
3717
3718         default:
3719                 res = -EOPNOTSUPP;
3720         }
3721
3722         usb_autopm_put_interface(tp->intf);
3723
3724 out:
3725         return res;
3726 }
3727
3728 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3729 {
3730         struct r8152 *tp = netdev_priv(dev);
3731
3732         switch (tp->version) {
3733         case RTL_VER_01:
3734         case RTL_VER_02:
3735                 return eth_change_mtu(dev, new_mtu);
3736         default:
3737                 break;
3738         }
3739
3740         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3741                 return -EINVAL;
3742
3743         dev->mtu = new_mtu;
3744
3745         return 0;
3746 }
3747
3748 static const struct net_device_ops rtl8152_netdev_ops = {
3749         .ndo_open               = rtl8152_open,
3750         .ndo_stop               = rtl8152_close,
3751         .ndo_do_ioctl           = rtl8152_ioctl,
3752         .ndo_start_xmit         = rtl8152_start_xmit,
3753         .ndo_tx_timeout         = rtl8152_tx_timeout,
3754         .ndo_set_features       = rtl8152_set_features,
3755         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
3756         .ndo_set_mac_address    = rtl8152_set_mac_address,
3757         .ndo_change_mtu         = rtl8152_change_mtu,
3758         .ndo_validate_addr      = eth_validate_addr,
3759         .ndo_features_check     = rtl8152_features_check,
3760 };
3761
3762 static void r8152b_get_version(struct r8152 *tp)
3763 {
3764         u32     ocp_data;
3765         u16     version;
3766
3767         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
3768         version = (u16)(ocp_data & VERSION_MASK);
3769
3770         switch (version) {
3771         case 0x4c00:
3772                 tp->version = RTL_VER_01;
3773                 break;
3774         case 0x4c10:
3775                 tp->version = RTL_VER_02;
3776                 break;
3777         case 0x5c00:
3778                 tp->version = RTL_VER_03;
3779                 tp->mii.supports_gmii = 1;
3780                 break;
3781         case 0x5c10:
3782                 tp->version = RTL_VER_04;
3783                 tp->mii.supports_gmii = 1;
3784                 break;
3785         case 0x5c20:
3786                 tp->version = RTL_VER_05;
3787                 tp->mii.supports_gmii = 1;
3788                 break;
3789         default:
3790                 netif_info(tp, probe, tp->netdev,
3791                            "Unknown version 0x%04x\n", version);
3792                 break;
3793         }
3794 }
3795
3796 static void rtl8152_unload(struct r8152 *tp)
3797 {
3798         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3799                 return;
3800
3801         if (tp->version != RTL_VER_01)
3802                 r8152_power_cut_en(tp, true);
3803 }
3804
3805 static void rtl8153_unload(struct r8152 *tp)
3806 {
3807         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3808                 return;
3809
3810         r8153_power_cut_en(tp, false);
3811 }
3812
3813 static int rtl_ops_init(struct r8152 *tp)
3814 {
3815         struct rtl_ops *ops = &tp->rtl_ops;
3816         int ret = 0;
3817
3818         switch (tp->version) {
3819         case RTL_VER_01:
3820         case RTL_VER_02:
3821                 ops->init               = r8152b_init;
3822                 ops->enable             = rtl8152_enable;
3823                 ops->disable            = rtl8152_disable;
3824                 ops->up                 = rtl8152_up;
3825                 ops->down               = rtl8152_down;
3826                 ops->unload             = rtl8152_unload;
3827                 ops->eee_get            = r8152_get_eee;
3828                 ops->eee_set            = r8152_set_eee;
3829                 break;
3830
3831         case RTL_VER_03:
3832         case RTL_VER_04:
3833         case RTL_VER_05:
3834                 ops->init               = r8153_init;
3835                 ops->enable             = rtl8153_enable;
3836                 ops->disable            = rtl8153_disable;
3837                 ops->up                 = rtl8153_up;
3838                 ops->down               = rtl8153_down;
3839                 ops->unload             = rtl8153_unload;
3840                 ops->eee_get            = r8153_get_eee;
3841                 ops->eee_set            = r8153_set_eee;
3842                 break;
3843
3844         default:
3845                 ret = -ENODEV;
3846                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
3847                 break;
3848         }
3849
3850         return ret;
3851 }
3852
3853 static int rtl8152_probe(struct usb_interface *intf,
3854                          const struct usb_device_id *id)
3855 {
3856         struct usb_device *udev = interface_to_usbdev(intf);
3857         struct r8152 *tp;
3858         struct net_device *netdev;
3859         int ret;
3860
3861         if (udev->actconfig->desc.bConfigurationValue != 1) {
3862                 usb_driver_set_configuration(udev, 1);
3863                 return -ENODEV;
3864         }
3865
3866         usb_reset_device(udev);
3867         netdev = alloc_etherdev(sizeof(struct r8152));
3868         if (!netdev) {
3869                 dev_err(&intf->dev, "Out of memory\n");
3870                 return -ENOMEM;
3871         }
3872
3873         SET_NETDEV_DEV(netdev, &intf->dev);
3874         tp = netdev_priv(netdev);
3875         tp->msg_enable = 0x7FFF;
3876
3877         tp->udev = udev;
3878         tp->netdev = netdev;
3879         tp->intf = intf;
3880
3881         r8152b_get_version(tp);
3882         ret = rtl_ops_init(tp);
3883         if (ret)
3884                 goto out;
3885
3886         mutex_init(&tp->control);
3887         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
3888
3889         netdev->netdev_ops = &rtl8152_netdev_ops;
3890         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
3891
3892         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3893                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
3894                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
3895                             NETIF_F_HW_VLAN_CTAG_TX;
3896         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3897                               NETIF_F_TSO | NETIF_F_FRAGLIST |
3898                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
3899                               NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
3900         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
3901                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
3902                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
3903
3904         netdev->ethtool_ops = &ops;
3905         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
3906
3907         tp->mii.dev = netdev;
3908         tp->mii.mdio_read = read_mii_word;
3909         tp->mii.mdio_write = write_mii_word;
3910         tp->mii.phy_id_mask = 0x3f;
3911         tp->mii.reg_num_mask = 0x1f;
3912         tp->mii.phy_id = R8152_PHY_ID;
3913
3914         intf->needs_remote_wakeup = 1;
3915
3916         tp->rtl_ops.init(tp);
3917         set_ethernet_addr(tp);
3918
3919         usb_set_intfdata(intf, tp);
3920         netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
3921
3922         ret = register_netdev(netdev);
3923         if (ret != 0) {
3924                 netif_err(tp, probe, netdev, "couldn't register the device\n");
3925                 goto out1;
3926         }
3927
3928         tp->saved_wolopts = __rtl_get_wol(tp);
3929         if (tp->saved_wolopts)
3930                 device_set_wakeup_enable(&udev->dev, true);
3931         else
3932                 device_set_wakeup_enable(&udev->dev, false);
3933
3934         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
3935
3936         return 0;
3937
3938 out1:
3939         netif_napi_del(&tp->napi);
3940         usb_set_intfdata(intf, NULL);
3941 out:
3942         free_netdev(netdev);
3943         return ret;
3944 }
3945
3946 static void rtl8152_disconnect(struct usb_interface *intf)
3947 {
3948         struct r8152 *tp = usb_get_intfdata(intf);
3949
3950         usb_set_intfdata(intf, NULL);
3951         if (tp) {
3952                 struct usb_device *udev = tp->udev;
3953
3954                 if (udev->state == USB_STATE_NOTATTACHED)
3955                         set_bit(RTL8152_UNPLUG, &tp->flags);
3956
3957                 netif_napi_del(&tp->napi);
3958                 unregister_netdev(tp->netdev);
3959                 tp->rtl_ops.unload(tp);
3960                 free_netdev(tp->netdev);
3961         }
3962 }
3963
3964 #define REALTEK_USB_DEVICE(vend, prod)  \
3965         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
3966                        USB_DEVICE_ID_MATCH_INT_CLASS, \
3967         .idVendor = (vend), \
3968         .idProduct = (prod), \
3969         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
3970 }, \
3971 { \
3972         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
3973                        USB_DEVICE_ID_MATCH_DEVICE, \
3974         .idVendor = (vend), \
3975         .idProduct = (prod), \
3976         .bInterfaceClass = USB_CLASS_COMM, \
3977         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
3978         .bInterfaceProtocol = USB_CDC_PROTO_NONE
3979
3980 /* table of devices that work with this driver */
3981 static struct usb_device_id rtl8152_table[] = {
3982         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
3983         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
3984         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
3985         {}
3986 };
3987
3988 MODULE_DEVICE_TABLE(usb, rtl8152_table);
3989
3990 static struct usb_driver rtl8152_driver = {
3991         .name =         MODULENAME,
3992         .id_table =     rtl8152_table,
3993         .probe =        rtl8152_probe,
3994         .disconnect =   rtl8152_disconnect,
3995         .suspend =      rtl8152_suspend,
3996         .resume =       rtl8152_resume,
3997         .reset_resume = rtl8152_resume,
3998         .supports_autosuspend = 1,
3999         .disable_hub_initiated_lpm = 1,
4000 };
4001
4002 module_usb_driver(rtl8152_driver);
4003
4004 MODULE_AUTHOR(DRIVER_AUTHOR);
4005 MODULE_DESCRIPTION(DRIVER_DESC);
4006 MODULE_LICENSE("GPL");