ath: Convert ath_dbg(bar, ATH_DBG_<FOO>, to ath_dbg(bar, FOO
[cascardo/linux.git] / drivers / net / wireless / ath / ath9k / btcoex.c
1 /*
2  * Copyright (c) 2009-2011 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/export.h>
18 #include "hw.h"
19
20 enum ath_bt_mode {
21         ATH_BT_COEX_MODE_LEGACY,        /* legacy rx_clear mode */
22         ATH_BT_COEX_MODE_UNSLOTTED,     /* untimed/unslotted mode */
23         ATH_BT_COEX_MODE_SLOTTED,       /* slotted mode */
24         ATH_BT_COEX_MODE_DISABLED,      /* coexistence disabled */
25 };
26
27 struct ath_btcoex_config {
28         u8 bt_time_extend;
29         bool bt_txstate_extend;
30         bool bt_txframe_extend;
31         enum ath_bt_mode bt_mode; /* coexistence mode */
32         bool bt_quiet_collision;
33         bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
34         u8 bt_priority_time;
35         u8 bt_first_slot_time;
36         bool bt_hold_rx_clear;
37 };
38
39 static const u32 ar9003_wlan_weights[ATH_BTCOEX_STOMP_MAX]
40                                     [AR9300_NUM_WLAN_WEIGHTS] = {
41         { 0xfffffff0, 0xfffffff0, 0xfffffff0, 0xfffffff0 }, /* STOMP_ALL */
42         { 0x88888880, 0x88888880, 0x88888880, 0x88888880 }, /* STOMP_LOW */
43         { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* STOMP_NONE */
44 };
45
46 static const u32 ar9462_wlan_weights[ATH_BTCOEX_STOMP_MAX]
47                                     [AR9300_NUM_WLAN_WEIGHTS] = {
48         { 0x01017d01, 0x41414101, 0x41414101, 0x41414141 }, /* STOMP_ALL */
49         { 0x01017d01, 0x3b3b3b01, 0x3b3b3b01, 0x3b3b3b3b }, /* STOMP_LOW */
50         { 0x01017d01, 0x01010101, 0x01010101, 0x01010101 }, /* STOMP_NONE */
51         { 0x01017d01, 0x013b0101, 0x3b3b0101, 0x3b3b013b }, /* STOMP_LOW_FTP */
52 };
53
54 void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
55 {
56         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
57         const struct ath_btcoex_config ath_bt_config = {
58                 .bt_time_extend = 0,
59                 .bt_txstate_extend = true,
60                 .bt_txframe_extend = true,
61                 .bt_mode = ATH_BT_COEX_MODE_SLOTTED,
62                 .bt_quiet_collision = true,
63                 .bt_rxclear_polarity = true,
64                 .bt_priority_time = 2,
65                 .bt_first_slot_time = 5,
66                 .bt_hold_rx_clear = true,
67         };
68         u32 i, idx;
69         bool rxclear_polarity = ath_bt_config.bt_rxclear_polarity;
70
71         if (AR_SREV_9300_20_OR_LATER(ah))
72                 rxclear_polarity = !ath_bt_config.bt_rxclear_polarity;
73
74         btcoex_hw->bt_coex_mode =
75                 (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
76                 SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
77                 SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
78                 SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
79                 SM(ath_bt_config.bt_mode, AR_BT_MODE) |
80                 SM(ath_bt_config.bt_quiet_collision, AR_BT_QUIET) |
81                 SM(rxclear_polarity, AR_BT_RX_CLEAR_POLARITY) |
82                 SM(ath_bt_config.bt_priority_time, AR_BT_PRIORITY_TIME) |
83                 SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
84                 SM(qnum, AR_BT_QCU_THRESH);
85
86         btcoex_hw->bt_coex_mode2 =
87                 SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
88                 SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
89                 AR_BT_DISABLE_BT_ANT;
90
91         for (i = 0; i < 32; i++) {
92                 idx = (debruijn32 << i) >> 27;
93                 ah->hw_gen_timers.gen_timer_index[idx] = i;
94         }
95 }
96 EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
97
98 void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
99 {
100         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
101
102         /* connect bt_active to baseband */
103         REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
104                     (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
105                      AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
106
107         REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
108                     AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
109
110         /* Set input mux for bt_active to gpio pin */
111         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
112                       AR_GPIO_INPUT_MUX1_BT_ACTIVE,
113                       btcoex_hw->btactive_gpio);
114
115         /* Configure the desired gpio port for input */
116         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
117 }
118 EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
119
120 void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
121 {
122         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
123
124         /* btcoex 3-wire */
125         REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
126                         (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
127                          AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
128
129         /* Set input mux for bt_prority_async and
130          *                  bt_active_async to GPIO pins */
131         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
132                         AR_GPIO_INPUT_MUX1_BT_ACTIVE,
133                         btcoex_hw->btactive_gpio);
134
135         REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
136                         AR_GPIO_INPUT_MUX1_BT_PRIORITY,
137                         btcoex_hw->btpriority_gpio);
138
139         /* Configure the desired GPIO ports for input */
140
141         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
142         ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
143 }
144 EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
145
146 static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
147 {
148         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
149
150         /* Configure the desired GPIO port for TX_FRAME output */
151         ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
152                             AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
153 }
154
155 void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
156                                 u32 bt_weight,
157                                 u32 wlan_weight)
158 {
159         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
160
161         btcoex_hw->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) |
162                                      SM(wlan_weight, AR_BTCOEX_WL_WGHT);
163 }
164 EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
165
166
167 static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
168 {
169         struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
170         u32  val;
171         int i;
172
173         /*
174          * Program coex mode and weight registers to
175          * enable coex 3-wire
176          */
177         REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode);
178         REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2);
179
180
181         if (AR_SREV_9300_20_OR_LATER(ah)) {
182                 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]);
183                 REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]);
184                 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
185                         REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i),
186                                   btcoex->bt_weight[i]);
187         } else
188                 REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights);
189
190
191
192         if (AR_SREV_9271(ah)) {
193                 val = REG_READ(ah, 0x50040);
194                 val &= 0xFFFFFEFF;
195                 REG_WRITE(ah, 0x50040, val);
196         }
197
198         REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
199         REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
200
201         ath9k_hw_cfg_output(ah, btcoex->wlanactive_gpio,
202                             AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
203 }
204
205 static void ath9k_hw_btcoex_enable_mci(struct ath_hw *ah)
206 {
207         struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
208         int i;
209
210         for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
211                 REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
212                           btcoex->wlan_weight[i]);
213
214         REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
215         btcoex->enabled = true;
216 }
217
218 void ath9k_hw_btcoex_enable(struct ath_hw *ah)
219 {
220         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
221
222         switch (btcoex_hw->scheme) {
223         case ATH_BTCOEX_CFG_NONE:
224                 break;
225         case ATH_BTCOEX_CFG_2WIRE:
226                 ath9k_hw_btcoex_enable_2wire(ah);
227                 break;
228         case ATH_BTCOEX_CFG_3WIRE:
229                 ath9k_hw_btcoex_enable_3wire(ah);
230                 break;
231         case ATH_BTCOEX_CFG_MCI:
232                 ath9k_hw_btcoex_enable_mci(ah);
233                 return;
234         }
235
236         REG_RMW(ah, AR_GPIO_PDPU,
237                 (0x2 << (btcoex_hw->btactive_gpio * 2)),
238                 (0x3 << (btcoex_hw->btactive_gpio * 2)));
239
240         ah->btcoex_hw.enabled = true;
241 }
242 EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
243
244 void ath9k_hw_btcoex_disable(struct ath_hw *ah)
245 {
246         struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
247         int i;
248
249         btcoex_hw->enabled = false;
250         if (btcoex_hw->scheme == ATH_BTCOEX_CFG_MCI) {
251                 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
252                 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
253                         REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i),
254                                   btcoex_hw->wlan_weight[i]);
255         }
256         ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
257
258         ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
259                         AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
260
261         if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
262                 REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
263                 REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
264
265                 if (AR_SREV_9300_20_OR_LATER(ah)) {
266                         REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0);
267                         REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0);
268                         for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
269                                 REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0);
270                 } else
271                         REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
272
273         }
274 }
275 EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
276
277 static void ar9003_btcoex_bt_stomp(struct ath_hw *ah,
278                          enum ath_stomp_type stomp_type)
279 {
280         struct ath_btcoex_hw *btcoex = &ah->btcoex_hw;
281         const u32 *weight = AR_SREV_9462(ah) ? ar9003_wlan_weights[stomp_type] :
282                                                ar9462_wlan_weights[stomp_type];
283         int i;
284
285         for (i = 0; i < AR9300_NUM_WLAN_WEIGHTS; i++) {
286                 btcoex->bt_weight[i] = AR9300_BT_WGHT;
287                 btcoex->wlan_weight[i] = weight[i];
288         }
289 }
290
291 /*
292  * Configures appropriate weight based on stomp type.
293  */
294 void ath9k_hw_btcoex_bt_stomp(struct ath_hw *ah,
295                               enum ath_stomp_type stomp_type)
296 {
297         if (AR_SREV_9300_20_OR_LATER(ah)) {
298                 ar9003_btcoex_bt_stomp(ah, stomp_type);
299                 return;
300         }
301
302         switch (stomp_type) {
303         case ATH_BTCOEX_STOMP_ALL:
304                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
305                                 AR_STOMP_ALL_WLAN_WGHT);
306                 break;
307         case ATH_BTCOEX_STOMP_LOW:
308                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
309                                 AR_STOMP_LOW_WLAN_WGHT);
310                 break;
311         case ATH_BTCOEX_STOMP_NONE:
312                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
313                                 AR_STOMP_NONE_WLAN_WGHT);
314                 break;
315         default:
316                 ath_dbg(ath9k_hw_common(ah), BTCOEX, "Invalid Stomptype\n");
317                 break;
318         }
319 }
320 EXPORT_SYMBOL(ath9k_hw_btcoex_bt_stomp);