drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  68 {
  69         unsigned long flags;
  70         bool ret;
  71
  72         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  73         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  74         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  75
  76         return ret;
  77 }
  78
  79 void ath9k_ps_wakeup(struct ath_softc *sc)
  80 {
  81         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  82         unsigned long flags;
  83         enum ath9k_power_mode power_mode;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         if (++sc->ps_usecount != 1)
  87                 goto unlock;
  88
  89         power_mode = sc->sc_ah->power_mode;
  90         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  91
  92         /*
  93          * While the hardware is asleep, the cycle counters contain no
  94          * useful data. Better clear them now so that they don't mess up
  95          * survey data results.
  96          */
  97         if (power_mode != ATH9K_PM_AWAKE) {
  98                 spin_lock(&common->cc_lock);
  99                 ath_hw_cycle_counters_update(common);
 100                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 101                 spin_unlock(&common->cc_lock);
 102         }
 103
 104  unlock:
 105         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 106 }
 107
 108 void ath9k_ps_restore(struct ath_softc *sc)
 109 {
 110         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 111         unsigned long flags;
 112
 113         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 114         if (--sc->ps_usecount != 0)
 115                 goto unlock;
 116
 117         spin_lock(&common->cc_lock);
 118         ath_hw_cycle_counters_update(common);
 119         spin_unlock(&common->cc_lock);
 120
 121         if (sc->ps_idle)
 122                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 123         else if (sc->ps_enabled &&
 124                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 125                               PS_WAIT_FOR_CAB |
 126                               PS_WAIT_FOR_PSPOLL_DATA |
 127                               PS_WAIT_FOR_TX_ACK)))
 128                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 129
 130  unlock:
 131         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 132 }
 133
 134 static void ath_start_ani(struct ath_common *common)
 135 {
 136         struct ath_hw *ah = common->ah;
 137         unsigned long timestamp = jiffies_to_msecs(jiffies);
 138         struct ath_softc *sc = (struct ath_softc *) common->priv;
 139
 140         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 141                 return;
 142
 143         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 144                 return;
 145
 146         common->ani.longcal_timer = timestamp;
 147         common->ani.shortcal_timer = timestamp;
 148         common->ani.checkani_timer = timestamp;
 149
 150         mod_timer(&common->ani.timer,
 151                   jiffies +
 152                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 153 }
 154
 155 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 156 {
 157         struct ath_hw *ah = sc->sc_ah;
 158         struct ath9k_channel *chan = &ah->channels[channel];
 159         struct survey_info *survey = &sc->survey[channel];
 160
 161         if (chan->noisefloor) {
 162                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 163                 survey->noise = chan->noisefloor;
 164         }
 165 }
 166
 167 static void ath_update_survey_stats(struct ath_softc *sc)
 168 {
 169         struct ath_hw *ah = sc->sc_ah;
 170         struct ath_common *common = ath9k_hw_common(ah);
 171         int pos = ah->curchan - &ah->channels[0];
 172         struct survey_info *survey = &sc->survey[pos];
 173         struct ath_cycle_counters *cc = &common->cc_survey;
 174         unsigned int div = common->clockrate * 1000;
 175
 176         if (!ah->curchan)
 177                 return;
 178
 179         if (ah->power_mode == ATH9K_PM_AWAKE)
 180                 ath_hw_cycle_counters_update(common);
 181
 182         if (cc->cycles > 0) {
 183                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 184                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 185                         SURVEY_INFO_CHANNEL_TIME_RX |
 186                         SURVEY_INFO_CHANNEL_TIME_TX;
 187                 survey->channel_time += cc->cycles / div;
 188                 survey->channel_time_busy += cc->rx_busy / div;
 189                 survey->channel_time_rx += cc->rx_frame / div;
 190                 survey->channel_time_tx += cc->tx_frame / div;
 191         }
 192         memset(cc, 0, sizeof(*cc));
 193
 194         ath_update_survey_nf(sc, pos);
 195 }
 196
 197 /*
 198  * Set/change channels.  If the channel is really being changed, it's done
 199  * by reseting the chip.  To accomplish this we must first cleanup any pending
 200  * DMA, then restart stuff.
 201 */
 202 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 203                     struct ath9k_channel *hchan)
 204 {
 205         struct ath_hw *ah = sc->sc_ah;
 206         struct ath_common *common = ath9k_hw_common(ah);
 207         struct ieee80211_conf *conf = &common->hw->conf;
 208         bool fastcc = true, stopped;
 209         struct ieee80211_channel *channel = hw->conf.channel;
 210         struct ath9k_hw_cal_data *caldata = NULL;
 211         int r;
 212
 213         if (sc->sc_flags & SC_OP_INVALID)
 214                 return -EIO;
 215
 216         del_timer_sync(&common->ani.timer);
 217         cancel_work_sync(&sc->paprd_work);
 218         cancel_work_sync(&sc->hw_check_work);
 219         cancel_delayed_work_sync(&sc->tx_complete_work);
 220         cancel_delayed_work_sync(&sc->hw_pll_work);
 221
 222         ath9k_ps_wakeup(sc);
 223
 224         spin_lock_bh(&sc->sc_pcu_lock);
 225
 226         /*
 227          * This is only performed if the channel settings have
 228          * actually changed.
 229          *
 230          * To switch channels clear any pending DMA operations;
 231          * wait long enough for the RX fifo to drain, reset the
 232          * hardware at the new frequency, and then re-enable
 233          * the relevant bits of the h/w.
 234          */
 235         ath9k_hw_disable_interrupts(ah);
 236         stopped = ath_drain_all_txq(sc, false);
 237
 238         if (!ath_stoprecv(sc))
 239                 stopped = false;
 240
 241         if (!ath9k_hw_check_alive(ah))
 242                 stopped = false;
 243
 244         /* XXX: do not flush receive queue here. We don't want
 245          * to flush data frames already in queue because of
 246          * changing channel. */
 247
 248         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 249                 fastcc = false;
 250
 251         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 252                 caldata = &sc->caldata;
 253
 254         ath_dbg(common, ATH_DBG_CONFIG,
 255                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 256                 sc->sc_ah->curchan->channel,
 257                 channel->center_freq, conf_is_ht40(conf),
 258                 fastcc);
 259
 260         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 261         if (r) {
 262                 ath_err(common,
 263                         "Unable to reset channel (%u MHz), reset status %d\n",
 264                         channel->center_freq, r);
 265                 goto ps_restore;
 266         }
 267
 268         if (ath_startrecv(sc) != 0) {
 269                 ath_err(common, "Unable to restart recv logic\n");
 270                 r = -EIO;
 271                 goto ps_restore;
 272         }
 273
 274         ath_update_txpow(sc);
 275         ath9k_hw_set_interrupts(ah, ah->imask);
 276
 277         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 278                 if (sc->sc_flags & SC_OP_BEACONS)
 279                         ath_beacon_config(sc, NULL);
 280                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 281                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 282                 ath_start_ani(common);
 283         }
 284
 285  ps_restore:
 286         ieee80211_wake_queues(hw);
 287
 288         spin_unlock_bh(&sc->sc_pcu_lock);
 289
 290         ath9k_ps_restore(sc);
 291         return r;
 292 }
 293
 294 static void ath_paprd_activate(struct ath_softc *sc)
 295 {
 296         struct ath_hw *ah = sc->sc_ah;
 297         struct ath9k_hw_cal_data *caldata = ah->caldata;
 298         struct ath_common *common = ath9k_hw_common(ah);
 299         int chain;
 300
 301         if (!caldata || !caldata->paprd_done)
 302                 return;
 303
 304         ath9k_ps_wakeup(sc);
 305         ar9003_paprd_enable(ah, false);
 306         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 307                 if (!(common->tx_chainmask & BIT(chain)))
 308                         continue;
 309
 310                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 311         }
 312
 313         ar9003_paprd_enable(ah, true);
 314         ath9k_ps_restore(sc);
 315 }
 316
 317 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
 318 {
 319         struct ieee80211_hw *hw = sc->hw;
 320         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
 321         struct ath_hw *ah = sc->sc_ah;
 322         struct ath_common *common = ath9k_hw_common(ah);
 323         struct ath_tx_control txctl;
 324         int time_left;
 325
 326         memset(&txctl, 0, sizeof(txctl));
 327         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 328
 329         memset(tx_info, 0, sizeof(*tx_info));
 330         tx_info->band = hw->conf.channel->band;
 331         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
 332         tx_info->control.rates[0].idx = 0;
 333         tx_info->control.rates[0].count = 1;
 334         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
 335         tx_info->control.rates[1].idx = -1;
 336
 337         init_completion(&sc->paprd_complete);
 338         sc->paprd_pending = true;
 339         txctl.paprd = BIT(chain);
 340
 341         if (ath_tx_start(hw, skb, &txctl) != 0) {
 342                 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
 343                 dev_kfree_skb_any(skb);
 344                 return false;
 345         }
 346
 347         time_left = wait_for_completion_timeout(&sc->paprd_complete,
 348                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 349         sc->paprd_pending = false;
 350
 351         if (!time_left)
 352                 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
 353                         "Timeout waiting for paprd training on TX chain %d\n",
 354                         chain);
 355
 356         return !!time_left;
 357 }
 358
 359 void ath_paprd_calibrate(struct work_struct *work)
 360 {
 361         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 362         struct ieee80211_hw *hw = sc->hw;
 363         struct ath_hw *ah = sc->sc_ah;
 364         struct ieee80211_hdr *hdr;
 365         struct sk_buff *skb = NULL;
 366         struct ath9k_hw_cal_data *caldata = ah->caldata;
 367         struct ath_common *common = ath9k_hw_common(ah);
 368         int ftype;
 369         int chain_ok = 0;
 370         int chain;
 371         int len = 1800;
 372
 373         if (!caldata)
 374                 return;
 375
 376         if (ar9003_paprd_init_table(ah) < 0)
 377                 return;
 378
 379         skb = alloc_skb(len, GFP_KERNEL);
 380         if (!skb)
 381                 return;
 382
 383         skb_put(skb, len);
 384         memset(skb->data, 0, len);
 385         hdr = (struct ieee80211_hdr *)skb->data;
 386         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 387         hdr->frame_control = cpu_to_le16(ftype);
 388         hdr->duration_id = cpu_to_le16(10);
 389         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 390         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 391         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 392
 393         ath9k_ps_wakeup(sc);
 394         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 395                 if (!(common->tx_chainmask & BIT(chain)))
 396                         continue;
 397
 398                 chain_ok = 0;
 399
 400                 ath_dbg(common, ATH_DBG_CALIBRATE,
 401                         "Sending PAPRD frame for thermal measurement "
 402                         "on chain %d\n", chain);
 403                 if (!ath_paprd_send_frame(sc, skb, chain))
 404                         goto fail_paprd;
 405
 406                 ar9003_paprd_setup_gain_table(ah, chain);
 407
 408                 ath_dbg(common, ATH_DBG_CALIBRATE,
 409                         "Sending PAPRD training frame on chain %d\n", chain);
 410                 if (!ath_paprd_send_frame(sc, skb, chain))
 411                         goto fail_paprd;
 412
 413                 if (!ar9003_paprd_is_done(ah))
 414                         break;
 415
 416                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 417                         break;
 418
 419                 chain_ok = 1;
 420         }
 421         kfree_skb(skb);
 422
 423         if (chain_ok) {
 424                 caldata->paprd_done = true;
 425                 ath_paprd_activate(sc);
 426         }
 427
 428 fail_paprd:
 429         ath9k_ps_restore(sc);
 430 }
 431
 432 /*
 433  *  This routine performs the periodic noise floor calibration function
 434  *  that is used to adjust and optimize the chip performance.  This
 435  *  takes environmental changes (location, temperature) into account.
 436  *  When the task is complete, it reschedules itself depending on the
 437  *  appropriate interval that was calculated.
 438  */
 439 void ath_ani_calibrate(unsigned long data)
 440 {
 441         struct ath_softc *sc = (struct ath_softc *)data;
 442         struct ath_hw *ah = sc->sc_ah;
 443         struct ath_common *common = ath9k_hw_common(ah);
 444         bool longcal = false;
 445         bool shortcal = false;
 446         bool aniflag = false;
 447         unsigned int timestamp = jiffies_to_msecs(jiffies);
 448         u32 cal_interval, short_cal_interval, long_cal_interval;
 449         unsigned long flags;
 450
 451         if (ah->caldata && ah->caldata->nfcal_interference)
 452                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 453         else
 454                 long_cal_interval = ATH_LONG_CALINTERVAL;
 455
 456         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 457                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 458
 459         /* Only calibrate if awake */
 460         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 461                 goto set_timer;
 462
 463         ath9k_ps_wakeup(sc);
 464
 465         /* Long calibration runs independently of short calibration. */
 466         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 467                 longcal = true;
 468                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 469                 common->ani.longcal_timer = timestamp;
 470         }
 471
 472         /* Short calibration applies only while caldone is false */
 473         if (!common->ani.caldone) {
 474                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 475                         shortcal = true;
 476                         ath_dbg(common, ATH_DBG_ANI,
 477                                 "shortcal @%lu\n", jiffies);
 478                         common->ani.shortcal_timer = timestamp;
 479                         common->ani.resetcal_timer = timestamp;
 480                 }
 481         } else {
 482                 if ((timestamp - common->ani.resetcal_timer) >=
 483                     ATH_RESTART_CALINTERVAL) {
 484                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 485                         if (common->ani.caldone)
 486                                 common->ani.resetcal_timer = timestamp;
 487                 }
 488         }
 489
 490         /* Verify whether we must check ANI */
 491         if ((timestamp - common->ani.checkani_timer) >=
 492              ah->config.ani_poll_interval) {
 493                 aniflag = true;
 494                 common->ani.checkani_timer = timestamp;
 495         }
 496
 497         /* Skip all processing if there's nothing to do. */
 498         if (longcal || shortcal || aniflag) {
 499                 /* Call ANI routine if necessary */
 500                 if (aniflag) {
 501                         spin_lock_irqsave(&common->cc_lock, flags);
 502                         ath9k_hw_ani_monitor(ah, ah->curchan);
 503                         ath_update_survey_stats(sc);
 504                         spin_unlock_irqrestore(&common->cc_lock, flags);
 505                 }
 506
 507                 /* Perform calibration if necessary */
 508                 if (longcal || shortcal) {
 509                         common->ani.caldone =
 510                                 ath9k_hw_calibrate(ah,
 511                                                    ah->curchan,
 512                                                    common->rx_chainmask,
 513                                                    longcal);
 514                 }
 515         }
 516
 517         ath9k_ps_restore(sc);
 518
 519 set_timer:
 520         /*
 521         * Set timer interval based on previous results.
 522         * The interval must be the shortest necessary to satisfy ANI,
 523         * short calibration and long calibration.
 524         */
 525         cal_interval = ATH_LONG_CALINTERVAL;
 526         if (sc->sc_ah->config.enable_ani)
 527                 cal_interval = min(cal_interval,
 528                                    (u32)ah->config.ani_poll_interval);
 529         if (!common->ani.caldone)
 530                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 531
 532         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 533         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 534                 if (!ah->caldata->paprd_done)
 535                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 536                 else if (!ah->paprd_table_write_done)
 537                         ath_paprd_activate(sc);
 538         }
 539 }
 540
 541 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 542 {
 543         struct ath_node *an;
 544         struct ath_hw *ah = sc->sc_ah;
 545         an = (struct ath_node *)sta->drv_priv;
 546
 547 #ifdef CONFIG_ATH9K_DEBUGFS
 548         spin_lock(&sc->nodes_lock);
 549         list_add(&an->list, &sc->nodes);
 550         spin_unlock(&sc->nodes_lock);
 551         an->sta = sta;
 552 #endif
 553         if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
 554                 sc->sc_flags |= SC_OP_ENABLE_APM;
 555
 556         if (sc->sc_flags & SC_OP_TXAGGR) {
 557                 ath_tx_node_init(sc, an);
 558                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 559                                      sta->ht_cap.ampdu_factor);
 560                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 561         }
 562 }
 563
 564 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 565 {
 566         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 567
 568 #ifdef CONFIG_ATH9K_DEBUGFS
 569         spin_lock(&sc->nodes_lock);
 570         list_del(&an->list);
 571         spin_unlock(&sc->nodes_lock);
 572         an->sta = NULL;
 573 #endif
 574
 575         if (sc->sc_flags & SC_OP_TXAGGR)
 576                 ath_tx_node_cleanup(sc, an);
 577 }
 578
 579 void ath_hw_check(struct work_struct *work)
 580 {
 581         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 582         int i;
 583
 584         ath9k_ps_wakeup(sc);
 585
 586         for (i = 0; i < 3; i++) {
 587                 if (ath9k_hw_check_alive(sc->sc_ah))
 588                         goto out;
 589
 590                 msleep(1);
 591         }
 592         ath_reset(sc, true);
 593
 594 out:
 595         ath9k_ps_restore(sc);
 596 }
 597
 598 void ath9k_tasklet(unsigned long data)
 599 {
 600         struct ath_softc *sc = (struct ath_softc *)data;
 601         struct ath_hw *ah = sc->sc_ah;
 602         struct ath_common *common = ath9k_hw_common(ah);
 603
 604         u32 status = sc->intrstatus;
 605         u32 rxmask;
 606
 607         if (status & ATH9K_INT_FATAL) {
 608                 ath_reset(sc, true);
 609                 return;
 610         }
 611
 612         ath9k_ps_wakeup(sc);
 613         spin_lock(&sc->sc_pcu_lock);
 614
 615         /*
 616          * Only run the baseband hang check if beacons stop working in AP or
 617          * IBSS mode, because it has a high false positive rate. For station
 618          * mode it should not be necessary, since the upper layers will detect
 619          * this through a beacon miss automatically and the following channel
 620          * change will trigger a hardware reset anyway
 621          */
 622         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
 623             !ath9k_hw_check_alive(ah))
 624                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 625
 626         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 627                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 628                           ATH9K_INT_RXORN);
 629         else
 630                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 631
 632         if (status & rxmask) {
 633                 /* Check for high priority Rx first */
 634                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 635                     (status & ATH9K_INT_RXHP))
 636                         ath_rx_tasklet(sc, 0, true);
 637
 638                 ath_rx_tasklet(sc, 0, false);
 639         }
 640
 641         if (status & ATH9K_INT_TX) {
 642                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 643                         ath_tx_edma_tasklet(sc);
 644                 else
 645                         ath_tx_tasklet(sc);
 646         }
 647
 648         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 649                 /*
 650                  * TSF sync does not look correct; remain awake to sync with
 651                  * the next Beacon.
 652                  */
 653                 ath_dbg(common, ATH_DBG_PS,
 654                         "TSFOOR - Sync with next Beacon\n");
 655                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 656         }
 657
 658         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 659                 if (status & ATH9K_INT_GENTIMER)
 660                         ath_gen_timer_isr(sc->sc_ah);
 661
 662         /* re-enable hardware interrupt */
 663         ath9k_hw_enable_interrupts(ah);
 664
 665         spin_unlock(&sc->sc_pcu_lock);
 666         ath9k_ps_restore(sc);
 667 }
 668
 669 irqreturn_t ath_isr(int irq, void *dev)
 670 {
 671 #define SCHED_INTR (                            \
 672                 ATH9K_INT_FATAL |               \
 673                 ATH9K_INT_RXORN |               \
 674                 ATH9K_INT_RXEOL |               \
 675                 ATH9K_INT_RX |                  \
 676                 ATH9K_INT_RXLP |                \
 677                 ATH9K_INT_RXHP |                \
 678                 ATH9K_INT_TX |                  \
 679                 ATH9K_INT_BMISS |               \
 680                 ATH9K_INT_CST |                 \
 681                 ATH9K_INT_TSFOOR |              \
 682                 ATH9K_INT_GENTIMER)
 683
 684         struct ath_softc *sc = dev;
 685         struct ath_hw *ah = sc->sc_ah;
 686         struct ath_common *common = ath9k_hw_common(ah);
 687         enum ath9k_int status;
 688         bool sched = false;
 689
 690         /*
 691          * The hardware is not ready/present, don't
 692          * touch anything. Note this can happen early
 693          * on if the IRQ is shared.
 694          */
 695         if (sc->sc_flags & SC_OP_INVALID)
 696                 return IRQ_NONE;
 697
 698
 699         /* shared irq, not for us */
 700
 701         if (!ath9k_hw_intrpend(ah))
 702                 return IRQ_NONE;
 703
 704         /*
 705          * Figure out the reason(s) for the interrupt.  Note
 706          * that the hal returns a pseudo-ISR that may include
 707          * bits we haven't explicitly enabled so we mask the
 708          * value to insure we only process bits we requested.
 709          */
 710         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 711         status &= ah->imask;    /* discard unasked-for bits */
 712
 713         /*
 714          * If there are no status bits set, then this interrupt was not
 715          * for me (should have been caught above).
 716          */
 717         if (!status)
 718                 return IRQ_NONE;
 719
 720         /* Cache the status */
 721         sc->intrstatus = status;
 722
 723         if (status & SCHED_INTR)
 724                 sched = true;
 725
 726         /*
 727          * If a FATAL or RXORN interrupt is received, we have to reset the
 728          * chip immediately.
 729          */
 730         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 731             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 732                 goto chip_reset;
 733
 734         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 735             (status & ATH9K_INT_BB_WATCHDOG)) {
 736
 737                 spin_lock(&common->cc_lock);
 738                 ath_hw_cycle_counters_update(common);
 739                 ar9003_hw_bb_watchdog_dbg_info(ah);
 740                 spin_unlock(&common->cc_lock);
 741
 742                 goto chip_reset;
 743         }
 744
 745         if (status & ATH9K_INT_SWBA)
 746                 tasklet_schedule(&sc->bcon_tasklet);
 747
 748         if (status & ATH9K_INT_TXURN)
 749                 ath9k_hw_updatetxtriglevel(ah, true);
 750
 751         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 752                 if (status & ATH9K_INT_RXEOL) {
 753                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 754                         ath9k_hw_set_interrupts(ah, ah->imask);
 755                 }
 756         }
 757
 758         if (status & ATH9K_INT_MIB) {
 759                 /*
 760                  * Disable interrupts until we service the MIB
 761                  * interrupt; otherwise it will continue to
 762                  * fire.
 763                  */
 764                 ath9k_hw_disable_interrupts(ah);
 765                 /*
 766                  * Let the hal handle the event. We assume
 767                  * it will clear whatever condition caused
 768                  * the interrupt.
 769                  */
 770                 spin_lock(&common->cc_lock);
 771                 ath9k_hw_proc_mib_event(ah);
 772                 spin_unlock(&common->cc_lock);
 773                 ath9k_hw_enable_interrupts(ah);
 774         }
 775
 776         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 777                 if (status & ATH9K_INT_TIM_TIMER) {
 778                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 779                                 goto chip_reset;
 780                         /* Clear RxAbort bit so that we can
 781                          * receive frames */
 782                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 783                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 784                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 785                 }
 786
 787 chip_reset:
 788
 789         ath_debug_stat_interrupt(sc, status);
 790
 791         if (sched) {
 792                 /* turn off every interrupt */
 793                 ath9k_hw_disable_interrupts(ah);
 794                 tasklet_schedule(&sc->intr_tq);
 795         }
 796
 797         return IRQ_HANDLED;
 798
 799 #undef SCHED_INTR
 800 }
 801
 802 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 803                                  struct ieee80211_hw *hw,
 804                                  struct ieee80211_vif *vif,
 805                                  struct ieee80211_bss_conf *bss_conf)
 806 {
 807         struct ath_hw *ah = sc->sc_ah;
 808         struct ath_common *common = ath9k_hw_common(ah);
 809
 810         if (bss_conf->assoc) {
 811                 ath_dbg(common, ATH_DBG_CONFIG,
 812                         "Bss Info ASSOC %d, bssid: %pM\n",
 813                         bss_conf->aid, common->curbssid);
 814
 815                 /* New association, store aid */
 816                 common->curaid = bss_conf->aid;
 817                 ath9k_hw_write_associd(ah);
 818
 819                 /*
 820                  * Request a re-configuration of Beacon related timers
 821                  * on the receipt of the first Beacon frame (i.e.,
 822                  * after time sync with the AP).
 823                  */
 824                 sc->ps_flags |= PS_BEACON_SYNC;
 825
 826                 /* Configure the beacon */
 827                 ath_beacon_config(sc, vif);
 828
 829                 /* Reset rssi stats */
 830                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
 831                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 832
 833                 sc->sc_flags |= SC_OP_ANI_RUN;
 834                 ath_start_ani(common);
 835         } else {
 836                 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 837                 common->curaid = 0;
 838                 /* Stop ANI */
 839                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 840                 del_timer_sync(&common->ani.timer);
 841         }
 842 }
 843
 844 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 845 {
 846         struct ath_hw *ah = sc->sc_ah;
 847         struct ath_common *common = ath9k_hw_common(ah);
 848         struct ieee80211_channel *channel = hw->conf.channel;
 849         int r;
 850
 851         ath9k_ps_wakeup(sc);
 852         spin_lock_bh(&sc->sc_pcu_lock);
 853
 854         ath9k_hw_configpcipowersave(ah, 0, 0);
 855
 856         if (!ah->curchan)
 857                 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
 858
 859         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 860         if (r) {
 861                 ath_err(common,
 862                         "Unable to reset channel (%u MHz), reset status %d\n",
 863                         channel->center_freq, r);
 864         }
 865
 866         ath_update_txpow(sc);
 867         if (ath_startrecv(sc) != 0) {
 868                 ath_err(common, "Unable to restart recv logic\n");
 869                 goto out;
 870         }
 871         if (sc->sc_flags & SC_OP_BEACONS)
 872                 ath_beacon_config(sc, NULL);    /* restart beacons */
 873
 874         /* Re-Enable  interrupts */
 875         ath9k_hw_set_interrupts(ah, ah->imask);
 876
 877         /* Enable LED */
 878         ath9k_hw_cfg_output(ah, ah->led_pin,
 879                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 880         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 881
 882         ieee80211_wake_queues(hw);
 883 out:
 884         spin_unlock_bh(&sc->sc_pcu_lock);
 885
 886         ath9k_ps_restore(sc);
 887 }
 888
 889 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 890 {
 891         struct ath_hw *ah = sc->sc_ah;
 892         struct ieee80211_channel *channel = hw->conf.channel;
 893         int r;
 894
 895         ath9k_ps_wakeup(sc);
 896         spin_lock_bh(&sc->sc_pcu_lock);
 897
 898         ieee80211_stop_queues(hw);
 899
 900         /*
 901          * Keep the LED on when the radio is disabled
 902          * during idle unassociated state.
 903          */
 904         if (!sc->ps_idle) {
 905                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 906                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 907         }
 908
 909         /* Disable interrupts */
 910         ath9k_hw_disable_interrupts(ah);
 911
 912         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 913
 914         ath_stoprecv(sc);               /* turn off frame recv */
 915         ath_flushrecv(sc);              /* flush recv queue */
 916
 917         if (!ah->curchan)
 918                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
 919
 920         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 921         if (r) {
 922                 ath_err(ath9k_hw_common(sc->sc_ah),
 923                         "Unable to reset channel (%u MHz), reset status %d\n",
 924                         channel->center_freq, r);
 925         }
 926
 927         ath9k_hw_phy_disable(ah);
 928
 929         ath9k_hw_configpcipowersave(ah, 1, 1);
 930
 931         spin_unlock_bh(&sc->sc_pcu_lock);
 932         ath9k_ps_restore(sc);
 933 }
 934
 935 int ath_reset(struct ath_softc *sc, bool retry_tx)
 936 {
 937         struct ath_hw *ah = sc->sc_ah;
 938         struct ath_common *common = ath9k_hw_common(ah);
 939         struct ieee80211_hw *hw = sc->hw;
 940         int r;
 941
 942         /* Stop ANI */
 943         del_timer_sync(&common->ani.timer);
 944
 945         ath9k_ps_wakeup(sc);
 946         spin_lock_bh(&sc->sc_pcu_lock);
 947
 948         ieee80211_stop_queues(hw);
 949
 950         ath9k_hw_disable_interrupts(ah);
 951         ath_drain_all_txq(sc, retry_tx);
 952
 953         ath_stoprecv(sc);
 954         ath_flushrecv(sc);
 955
 956         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 957         if (r)
 958                 ath_err(common,
 959                         "Unable to reset hardware; reset status %d\n", r);
 960
 961         if (ath_startrecv(sc) != 0)
 962                 ath_err(common, "Unable to start recv logic\n");
 963
 964         /*
 965          * We may be doing a reset in response to a request
 966          * that changes the channel so update any state that
 967          * might change as a result.
 968          */
 969         ath_update_txpow(sc);
 970
 971         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
 972                 ath_beacon_config(sc, NULL);    /* restart beacons */
 973
 974         ath9k_hw_set_interrupts(ah, ah->imask);
 975
 976         if (retry_tx) {
 977                 int i;
 978                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 979                         if (ATH_TXQ_SETUP(sc, i)) {
 980                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 981                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 982                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 983                         }
 984                 }
 985         }
 986
 987         ieee80211_wake_queues(hw);
 988         spin_unlock_bh(&sc->sc_pcu_lock);
 989
 990         /* Start ANI */
 991         ath_start_ani(common);
 992         ath9k_ps_restore(sc);
 993
 994         return r;
 995 }
 996
 997 /**********************/
 998 /* mac80211 callbacks */
 999 /**********************/
1000
1001 static int ath9k_start(struct ieee80211_hw *hw)
1002 {
1003         struct ath_softc *sc = hw->priv;
1004         struct ath_hw *ah = sc->sc_ah;
1005         struct ath_common *common = ath9k_hw_common(ah);
1006         struct ieee80211_channel *curchan = hw->conf.channel;
1007         struct ath9k_channel *init_channel;
1008         int r;
1009
1010         ath_dbg(common, ATH_DBG_CONFIG,
1011                 "Starting driver with initial channel: %d MHz\n",
1012                 curchan->center_freq);
1013
1014         mutex_lock(&sc->mutex);
1015
1016         /* setup initial channel */
1017         sc->chan_idx = curchan->hw_value;
1018
1019         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1020
1021         /* Reset SERDES registers */
1022         ath9k_hw_configpcipowersave(ah, 0, 0);
1023
1024         /*
1025          * The basic interface to setting the hardware in a good
1026          * state is ``reset''.  On return the hardware is known to
1027          * be powered up and with interrupts disabled.  This must
1028          * be followed by initialization of the appropriate bits
1029          * and then setup of the interrupt mask.
1030          */
1031         spin_lock_bh(&sc->sc_pcu_lock);
1032         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1033         if (r) {
1034                 ath_err(common,
1035                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1036                         r, curchan->center_freq);
1037                 spin_unlock_bh(&sc->sc_pcu_lock);
1038                 goto mutex_unlock;
1039         }
1040
1041         /*
1042          * This is needed only to setup initial state
1043          * but it's best done after a reset.
1044          */
1045         ath_update_txpow(sc);
1046
1047         /*
1048          * Setup the hardware after reset:
1049          * The receive engine is set going.
1050          * Frame transmit is handled entirely
1051          * in the frame output path; there's nothing to do
1052          * here except setup the interrupt mask.
1053          */
1054         if (ath_startrecv(sc) != 0) {
1055                 ath_err(common, "Unable to start recv logic\n");
1056                 r = -EIO;
1057                 spin_unlock_bh(&sc->sc_pcu_lock);
1058                 goto mutex_unlock;
1059         }
1060         spin_unlock_bh(&sc->sc_pcu_lock);
1061
1062         /* Setup our intr mask. */
1063         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1064                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1065                     ATH9K_INT_GLOBAL;
1066
1067         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1068                 ah->imask |= ATH9K_INT_RXHP |
1069                              ATH9K_INT_RXLP |
1070                              ATH9K_INT_BB_WATCHDOG;
1071         else
1072                 ah->imask |= ATH9K_INT_RX;
1073
1074         ah->imask |= ATH9K_INT_GTT;
1075
1076         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1077                 ah->imask |= ATH9K_INT_CST;
1078
1079         sc->sc_flags &= ~SC_OP_INVALID;
1080         sc->sc_ah->is_monitoring = false;
1081
1082         /* Disable BMISS interrupt when we're not associated */
1083         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1084         ath9k_hw_set_interrupts(ah, ah->imask);
1085
1086         ieee80211_wake_queues(hw);
1087
1088         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1089
1090         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1091             !ah->btcoex_hw.enabled) {
1092                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1093                                            AR_STOMP_LOW_WLAN_WGHT);
1094                 ath9k_hw_btcoex_enable(ah);
1095
1096                 if (common->bus_ops->bt_coex_prep)
1097                         common->bus_ops->bt_coex_prep(common);
1098                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1099                         ath9k_btcoex_timer_resume(sc);
1100         }
1101
1102         /* User has the option to provide pm-qos value as a module
1103          * parameter rather than using the default value of
1104          * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1105          */
1106         pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1107
1108         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1109                 common->bus_ops->extn_synch_en(common);
1110
1111 mutex_unlock:
1112         mutex_unlock(&sc->mutex);
1113
1114         return r;
1115 }
1116
1117 static int ath9k_tx(struct ieee80211_hw *hw,
1118                     struct sk_buff *skb)
1119 {
1120         struct ath_softc *sc = hw->priv;
1121         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1122         struct ath_tx_control txctl;
1123         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1124
1125         if (sc->ps_enabled) {
1126                 /*
1127                  * mac80211 does not set PM field for normal data frames, so we
1128                  * need to update that based on the current PS mode.
1129                  */
1130                 if (ieee80211_is_data(hdr->frame_control) &&
1131                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1132                     !ieee80211_has_pm(hdr->frame_control)) {
1133                         ath_dbg(common, ATH_DBG_PS,
1134                                 "Add PM=1 for a TX frame while in PS mode\n");
1135                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1136                 }
1137         }
1138
1139         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1140                 /*
1141                  * We are using PS-Poll and mac80211 can request TX while in
1142                  * power save mode. Need to wake up hardware for the TX to be
1143                  * completed and if needed, also for RX of buffered frames.
1144                  */
1145                 ath9k_ps_wakeup(sc);
1146                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1147                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1148                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1149                         ath_dbg(common, ATH_DBG_PS,
1150                                 "Sending PS-Poll to pick a buffered frame\n");
1151                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1152                 } else {
1153                         ath_dbg(common, ATH_DBG_PS,
1154                                 "Wake up to complete TX\n");
1155                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1156                 }
1157                 /*
1158                  * The actual restore operation will happen only after
1159                  * the sc_flags bit is cleared. We are just dropping
1160                  * the ps_usecount here.
1161                  */
1162                 ath9k_ps_restore(sc);
1163         }
1164
1165         memset(&txctl, 0, sizeof(struct ath_tx_control));
1166         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1167
1168         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1169
1170         if (ath_tx_start(hw, skb, &txctl) != 0) {
1171                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1172                 goto exit;
1173         }
1174
1175         return 0;
1176 exit:
1177         dev_kfree_skb_any(skb);
1178         return 0;
1179 }
1180
1181 static void ath9k_stop(struct ieee80211_hw *hw)
1182 {
1183         struct ath_softc *sc = hw->priv;
1184         struct ath_hw *ah = sc->sc_ah;
1185         struct ath_common *common = ath9k_hw_common(ah);
1186
1187         mutex_lock(&sc->mutex);
1188
1189         if (led_blink)
1190                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1191
1192         cancel_delayed_work_sync(&sc->tx_complete_work);
1193         cancel_delayed_work_sync(&sc->hw_pll_work);
1194         cancel_work_sync(&sc->paprd_work);
1195         cancel_work_sync(&sc->hw_check_work);
1196
1197         if (sc->sc_flags & SC_OP_INVALID) {
1198                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1199                 mutex_unlock(&sc->mutex);
1200                 return;
1201         }
1202
1203         /* Ensure HW is awake when we try to shut it down. */
1204         ath9k_ps_wakeup(sc);
1205
1206         if (ah->btcoex_hw.enabled) {
1207                 ath9k_hw_btcoex_disable(ah);
1208                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1209                         ath9k_btcoex_timer_pause(sc);
1210         }
1211
1212         spin_lock_bh(&sc->sc_pcu_lock);
1213
1214         /* prevent tasklets to enable interrupts once we disable them */
1215         ah->imask &= ~ATH9K_INT_GLOBAL;
1216
1217         /* make sure h/w will not generate any interrupt
1218          * before setting the invalid flag. */
1219         ath9k_hw_disable_interrupts(ah);
1220
1221         if (!(sc->sc_flags & SC_OP_INVALID)) {
1222                 ath_drain_all_txq(sc, false);
1223                 ath_stoprecv(sc);
1224                 ath9k_hw_phy_disable(ah);
1225         } else
1226                 sc->rx.rxlink = NULL;
1227
1228         if (sc->rx.frag) {
1229                 dev_kfree_skb_any(sc->rx.frag);
1230                 sc->rx.frag = NULL;
1231         }
1232
1233         /* disable HAL and put h/w to sleep */
1234         ath9k_hw_disable(ah);
1235         ath9k_hw_configpcipowersave(ah, 1, 1);
1236
1237         spin_unlock_bh(&sc->sc_pcu_lock);
1238
1239         /* we can now sync irq and kill any running tasklets, since we already
1240          * disabled interrupts and not holding a spin lock */
1241         synchronize_irq(sc->irq);
1242         tasklet_kill(&sc->intr_tq);
1243         tasklet_kill(&sc->bcon_tasklet);
1244
1245         ath9k_ps_restore(sc);
1246
1247         sc->ps_idle = true;
1248         ath_radio_disable(sc, hw);
1249
1250         sc->sc_flags |= SC_OP_INVALID;
1251
1252         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1253
1254         mutex_unlock(&sc->mutex);
1255
1256         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1257 }
1258
1259 bool ath9k_uses_beacons(int type)
1260 {
1261         switch (type) {
1262         case NL80211_IFTYPE_AP:
1263         case NL80211_IFTYPE_ADHOC:
1264         case NL80211_IFTYPE_MESH_POINT:
1265                 return true;
1266         default:
1267                 return false;
1268         }
1269 }
1270
1271 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1272                                  struct ieee80211_vif *vif)
1273 {
1274         struct ath_vif *avp = (void *)vif->drv_priv;
1275
1276         /* Disable SWBA interrupt */
1277         sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1278         ath9k_ps_wakeup(sc);
1279         ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1280         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1281         tasklet_kill(&sc->bcon_tasklet);
1282         ath9k_ps_restore(sc);
1283
1284         ath_beacon_return(sc, avp);
1285         sc->sc_flags &= ~SC_OP_BEACONS;
1286
1287         if (sc->nbcnvifs > 0) {
1288                 /* Re-enable beaconing */
1289                 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1290                 ath9k_ps_wakeup(sc);
1291                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1292                 ath9k_ps_restore(sc);
1293         }
1294 }
1295
1296 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1297 {
1298         struct ath9k_vif_iter_data *iter_data = data;
1299         int i;
1300
1301         if (iter_data->hw_macaddr)
1302                 for (i = 0; i < ETH_ALEN; i++)
1303                         iter_data->mask[i] &=
1304                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1305
1306         switch (vif->type) {
1307         case NL80211_IFTYPE_AP:
1308                 iter_data->naps++;
1309                 break;
1310         case NL80211_IFTYPE_STATION:
1311                 iter_data->nstations++;
1312                 break;
1313         case NL80211_IFTYPE_ADHOC:
1314                 iter_data->nadhocs++;
1315                 break;
1316         case NL80211_IFTYPE_MESH_POINT:
1317                 iter_data->nmeshes++;
1318                 break;
1319         case NL80211_IFTYPE_WDS:
1320                 iter_data->nwds++;
1321                 break;
1322         default:
1323                 iter_data->nothers++;
1324                 break;
1325         }
1326 }
1327
1328 /* Called with sc->mutex held. */
1329 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1330                                struct ieee80211_vif *vif,
1331                                struct ath9k_vif_iter_data *iter_data)
1332 {
1333         struct ath_softc *sc = hw->priv;
1334         struct ath_hw *ah = sc->sc_ah;
1335         struct ath_common *common = ath9k_hw_common(ah);
1336
1337         /*
1338          * Use the hardware MAC address as reference, the hardware uses it
1339          * together with the BSSID mask when matching addresses.
1340          */
1341         memset(iter_data, 0, sizeof(*iter_data));
1342         iter_data->hw_macaddr = common->macaddr;
1343         memset(&iter_data->mask, 0xff, ETH_ALEN);
1344
1345         if (vif)
1346                 ath9k_vif_iter(iter_data, vif->addr, vif);
1347
1348         /* Get list of all active MAC addresses */
1349         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1350                                                    iter_data);
1351 }
1352
1353 /* Called with sc->mutex held. */
1354 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1355                                           struct ieee80211_vif *vif)
1356 {
1357         struct ath_softc *sc = hw->priv;
1358         struct ath_hw *ah = sc->sc_ah;
1359         struct ath_common *common = ath9k_hw_common(ah);
1360         struct ath9k_vif_iter_data iter_data;
1361
1362         ath9k_calculate_iter_data(hw, vif, &iter_data);
1363
1364         /* Set BSSID mask. */
1365         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1366         ath_hw_setbssidmask(common);
1367
1368         /* Set op-mode & TSF */
1369         if (iter_data.naps > 0) {
1370                 ath9k_hw_set_tsfadjust(ah, 1);
1371                 sc->sc_flags |= SC_OP_TSF_RESET;
1372                 ah->opmode = NL80211_IFTYPE_AP;
1373         } else {
1374                 ath9k_hw_set_tsfadjust(ah, 0);
1375                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1376
1377                 if (iter_data.nwds + iter_data.nmeshes)
1378                         ah->opmode = NL80211_IFTYPE_AP;
1379                 else if (iter_data.nadhocs)
1380                         ah->opmode = NL80211_IFTYPE_ADHOC;
1381                 else
1382                         ah->opmode = NL80211_IFTYPE_STATION;
1383         }
1384
1385         /*
1386          * Enable MIB interrupts when there are hardware phy counters.
1387          */
1388         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1389                 if (ah->config.enable_ani)
1390                         ah->imask |= ATH9K_INT_MIB;
1391                 ah->imask |= ATH9K_INT_TSFOOR;
1392         } else {
1393                 ah->imask &= ~ATH9K_INT_MIB;
1394                 ah->imask &= ~ATH9K_INT_TSFOOR;
1395         }
1396
1397         ath9k_hw_set_interrupts(ah, ah->imask);
1398
1399         /* Set up ANI */
1400         if ((iter_data.naps + iter_data.nadhocs) > 0) {
1401                 sc->sc_flags |= SC_OP_ANI_RUN;
1402                 ath_start_ani(common);
1403         } else {
1404                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1405                 del_timer_sync(&common->ani.timer);
1406         }
1407 }
1408
1409 /* Called with sc->mutex held, vif counts set up properly. */
1410 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1411                                    struct ieee80211_vif *vif)
1412 {
1413         struct ath_softc *sc = hw->priv;
1414
1415         ath9k_calculate_summary_state(hw, vif);
1416
1417         if (ath9k_uses_beacons(vif->type)) {
1418                 int error;
1419                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1420                 /* This may fail because upper levels do not have beacons
1421                  * properly configured yet.  That's OK, we assume it
1422                  * will be properly configured and then we will be notified
1423                  * in the info_changed method and set up beacons properly
1424                  * there.
1425                  */
1426                 error = ath_beacon_alloc(sc, vif);
1427                 if (error)
1428                         ath9k_reclaim_beacon(sc, vif);
1429                 else
1430                         ath_beacon_config(sc, vif);
1431         }
1432 }
1433
1434
1435 static int ath9k_add_interface(struct ieee80211_hw *hw,
1436                                struct ieee80211_vif *vif)
1437 {
1438         struct ath_softc *sc = hw->priv;
1439         struct ath_hw *ah = sc->sc_ah;
1440         struct ath_common *common = ath9k_hw_common(ah);
1441         struct ath_vif *avp = (void *)vif->drv_priv;
1442         int ret = 0;
1443
1444         mutex_lock(&sc->mutex);
1445
1446         switch (vif->type) {
1447         case NL80211_IFTYPE_STATION:
1448         case NL80211_IFTYPE_WDS:
1449         case NL80211_IFTYPE_ADHOC:
1450         case NL80211_IFTYPE_AP:
1451         case NL80211_IFTYPE_MESH_POINT:
1452                 break;
1453         default:
1454                 ath_err(common, "Interface type %d not yet supported\n",
1455                         vif->type);
1456                 ret = -EOPNOTSUPP;
1457                 goto out;
1458         }
1459
1460         if (ath9k_uses_beacons(vif->type)) {
1461                 if (sc->nbcnvifs >= ATH_BCBUF) {
1462                         ath_err(common, "Not enough beacon buffers when adding"
1463                                 " new interface of type: %i\n",
1464                                 vif->type);
1465                         ret = -ENOBUFS;
1466                         goto out;
1467                 }
1468         }
1469
1470         if ((vif->type == NL80211_IFTYPE_ADHOC) &&
1471             sc->nvifs > 0) {
1472                 ath_err(common, "Cannot create ADHOC interface when other"
1473                         " interfaces already exist.\n");
1474                 ret = -EINVAL;
1475                 goto out;
1476         }
1477
1478         ath_dbg(common, ATH_DBG_CONFIG,
1479                 "Attach a VIF of type: %d\n", vif->type);
1480
1481         /* Set the VIF opmode */
1482         avp->av_opmode = vif->type;
1483         avp->av_bslot = -1;
1484
1485         sc->nvifs++;
1486
1487         ath9k_do_vif_add_setup(hw, vif);
1488 out:
1489         mutex_unlock(&sc->mutex);
1490         return ret;
1491 }
1492
1493 static int ath9k_change_interface(struct ieee80211_hw *hw,
1494                                   struct ieee80211_vif *vif,
1495                                   enum nl80211_iftype new_type,
1496                                   bool p2p)
1497 {
1498         struct ath_softc *sc = hw->priv;
1499         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1500         int ret = 0;
1501
1502         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1503         mutex_lock(&sc->mutex);
1504
1505         /* See if new interface type is valid. */
1506         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1507             (sc->nvifs > 1)) {
1508                 ath_err(common, "When using ADHOC, it must be the only"
1509                         " interface.\n");
1510                 ret = -EINVAL;
1511                 goto out;
1512         }
1513
1514         if (ath9k_uses_beacons(new_type) &&
1515             !ath9k_uses_beacons(vif->type)) {
1516                 if (sc->nbcnvifs >= ATH_BCBUF) {
1517                         ath_err(common, "No beacon slot available\n");
1518                         ret = -ENOBUFS;
1519                         goto out;
1520                 }
1521         }
1522
1523         /* Clean up old vif stuff */
1524         if (ath9k_uses_beacons(vif->type))
1525                 ath9k_reclaim_beacon(sc, vif);
1526
1527         /* Add new settings */
1528         vif->type = new_type;
1529         vif->p2p = p2p;
1530
1531         ath9k_do_vif_add_setup(hw, vif);
1532 out:
1533         mutex_unlock(&sc->mutex);
1534         return ret;
1535 }
1536
1537 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1538                                    struct ieee80211_vif *vif)
1539 {
1540         struct ath_softc *sc = hw->priv;
1541         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1542
1543         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1544
1545         mutex_lock(&sc->mutex);
1546
1547         sc->nvifs--;
1548
1549         /* Reclaim beacon resources */
1550         if (ath9k_uses_beacons(vif->type))
1551                 ath9k_reclaim_beacon(sc, vif);
1552
1553         ath9k_calculate_summary_state(hw, NULL);
1554
1555         mutex_unlock(&sc->mutex);
1556 }
1557
1558 static void ath9k_enable_ps(struct ath_softc *sc)
1559 {
1560         struct ath_hw *ah = sc->sc_ah;
1561
1562         sc->ps_enabled = true;
1563         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1564                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1565                         ah->imask |= ATH9K_INT_TIM_TIMER;
1566                         ath9k_hw_set_interrupts(ah, ah->imask);
1567                 }
1568                 ath9k_hw_setrxabort(ah, 1);
1569         }
1570 }
1571
1572 static void ath9k_disable_ps(struct ath_softc *sc)
1573 {
1574         struct ath_hw *ah = sc->sc_ah;
1575
1576         sc->ps_enabled = false;
1577         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1578         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1579                 ath9k_hw_setrxabort(ah, 0);
1580                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1581                                   PS_WAIT_FOR_CAB |
1582                                   PS_WAIT_FOR_PSPOLL_DATA |
1583                                   PS_WAIT_FOR_TX_ACK);
1584                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1585                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1586                         ath9k_hw_set_interrupts(ah, ah->imask);
1587                 }
1588         }
1589
1590 }
1591
1592 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1593 {
1594         struct ath_softc *sc = hw->priv;
1595         struct ath_hw *ah = sc->sc_ah;
1596         struct ath_common *common = ath9k_hw_common(ah);
1597         struct ieee80211_conf *conf = &hw->conf;
1598         bool disable_radio = false;
1599
1600         mutex_lock(&sc->mutex);
1601
1602         /*
1603          * Leave this as the first check because we need to turn on the
1604          * radio if it was disabled before prior to processing the rest
1605          * of the changes. Likewise we must only disable the radio towards
1606          * the end.
1607          */
1608         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1609                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1610                 if (!sc->ps_idle) {
1611                         ath_radio_enable(sc, hw);
1612                         ath_dbg(common, ATH_DBG_CONFIG,
1613                                 "not-idle: enabling radio\n");
1614                 } else {
1615                         disable_radio = true;
1616                 }
1617         }
1618
1619         /*
1620          * We just prepare to enable PS. We have to wait until our AP has
1621          * ACK'd our null data frame to disable RX otherwise we'll ignore
1622          * those ACKs and end up retransmitting the same null data frames.
1623          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1624          */
1625         if (changed & IEEE80211_CONF_CHANGE_PS) {
1626                 unsigned long flags;
1627                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1628                 if (conf->flags & IEEE80211_CONF_PS)
1629                         ath9k_enable_ps(sc);
1630                 else
1631                         ath9k_disable_ps(sc);
1632                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1633         }
1634
1635         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1636                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1637                         ath_dbg(common, ATH_DBG_CONFIG,
1638                                 "Monitor mode is enabled\n");
1639                         sc->sc_ah->is_monitoring = true;
1640                 } else {
1641                         ath_dbg(common, ATH_DBG_CONFIG,
1642                                 "Monitor mode is disabled\n");
1643                         sc->sc_ah->is_monitoring = false;
1644                 }
1645         }
1646
1647         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1648                 struct ieee80211_channel *curchan = hw->conf.channel;
1649                 int pos = curchan->hw_value;
1650                 int old_pos = -1;
1651                 unsigned long flags;
1652
1653                 if (ah->curchan)
1654                         old_pos = ah->curchan - &ah->channels[0];
1655
1656                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1657                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1658                 else
1659                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1660
1661                 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1662                         curchan->center_freq);
1663
1664                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1665                                           curchan, conf->channel_type);
1666
1667                 /* update survey stats for the old channel before switching */
1668                 spin_lock_irqsave(&common->cc_lock, flags);
1669                 ath_update_survey_stats(sc);
1670                 spin_unlock_irqrestore(&common->cc_lock, flags);
1671
1672                 /*
1673                  * If the operating channel changes, change the survey in-use flags
1674                  * along with it.
1675                  * Reset the survey data for the new channel, unless we're switching
1676                  * back to the operating channel from an off-channel operation.
1677                  */
1678                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1679                     sc->cur_survey != &sc->survey[pos]) {
1680
1681                         if (sc->cur_survey)
1682                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1683
1684                         sc->cur_survey = &sc->survey[pos];
1685
1686                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1687                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1688                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1689                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1690                 }
1691
1692                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1693                         ath_err(common, "Unable to set channel\n");
1694                         mutex_unlock(&sc->mutex);
1695                         return -EINVAL;
1696                 }
1697
1698                 /*
1699                  * The most recent snapshot of channel->noisefloor for the old
1700                  * channel is only available after the hardware reset. Copy it to
1701                  * the survey stats now.
1702                  */
1703                 if (old_pos >= 0)
1704                         ath_update_survey_nf(sc, old_pos);
1705         }
1706
1707         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1708                 sc->config.txpowlimit = 2 * conf->power_level;
1709                 ath9k_ps_wakeup(sc);
1710                 ath_update_txpow(sc);
1711                 ath9k_ps_restore(sc);
1712         }
1713
1714         if (disable_radio) {
1715                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1716                 ath_radio_disable(sc, hw);
1717         }
1718
1719         mutex_unlock(&sc->mutex);
1720
1721         return 0;
1722 }
1723
1724 #define SUPPORTED_FILTERS                       \
1725         (FIF_PROMISC_IN_BSS |                   \
1726         FIF_ALLMULTI |                          \
1727         FIF_CONTROL |                           \
1728         FIF_PSPOLL |                            \
1729         FIF_OTHER_BSS |                         \
1730         FIF_BCN_PRBRESP_PROMISC |               \
1731         FIF_PROBE_REQ |                         \
1732         FIF_FCSFAIL)
1733
1734 /* FIXME: sc->sc_full_reset ? */
1735 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1736                                    unsigned int changed_flags,
1737                                    unsigned int *total_flags,
1738                                    u64 multicast)
1739 {
1740         struct ath_softc *sc = hw->priv;
1741         u32 rfilt;
1742
1743         changed_flags &= SUPPORTED_FILTERS;
1744         *total_flags &= SUPPORTED_FILTERS;
1745
1746         sc->rx.rxfilter = *total_flags;
1747         ath9k_ps_wakeup(sc);
1748         rfilt = ath_calcrxfilter(sc);
1749         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1750         ath9k_ps_restore(sc);
1751
1752         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1753                 "Set HW RX filter: 0x%x\n", rfilt);
1754 }
1755
1756 static int ath9k_sta_add(struct ieee80211_hw *hw,
1757                          struct ieee80211_vif *vif,
1758                          struct ieee80211_sta *sta)
1759 {
1760         struct ath_softc *sc = hw->priv;
1761
1762         ath_node_attach(sc, sta);
1763
1764         return 0;
1765 }
1766
1767 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1768                             struct ieee80211_vif *vif,
1769                             struct ieee80211_sta *sta)
1770 {
1771         struct ath_softc *sc = hw->priv;
1772
1773         ath_node_detach(sc, sta);
1774
1775         return 0;
1776 }
1777
1778 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1779                          const struct ieee80211_tx_queue_params *params)
1780 {
1781         struct ath_softc *sc = hw->priv;
1782         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1783         struct ath_txq *txq;
1784         struct ath9k_tx_queue_info qi;
1785         int ret = 0;
1786
1787         if (queue >= WME_NUM_AC)
1788                 return 0;
1789
1790         txq = sc->tx.txq_map[queue];
1791
1792         mutex_lock(&sc->mutex);
1793
1794         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1795
1796         qi.tqi_aifs = params->aifs;
1797         qi.tqi_cwmin = params->cw_min;
1798         qi.tqi_cwmax = params->cw_max;
1799         qi.tqi_burstTime = params->txop;
1800
1801         ath_dbg(common, ATH_DBG_CONFIG,
1802                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1803                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1804                 params->cw_max, params->txop);
1805
1806         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1807         if (ret)
1808                 ath_err(common, "TXQ Update failed\n");
1809
1810         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1811                 if (queue == WME_AC_BE && !ret)
1812                         ath_beaconq_config(sc);
1813
1814         mutex_unlock(&sc->mutex);
1815
1816         return ret;
1817 }
1818
1819 static int ath9k_set_key(struct ieee80211_hw *hw,
1820                          enum set_key_cmd cmd,
1821                          struct ieee80211_vif *vif,
1822                          struct ieee80211_sta *sta,
1823                          struct ieee80211_key_conf *key)
1824 {
1825         struct ath_softc *sc = hw->priv;
1826         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1827         int ret = 0;
1828
1829         if (ath9k_modparam_nohwcrypt)
1830                 return -ENOSPC;
1831
1832         mutex_lock(&sc->mutex);
1833         ath9k_ps_wakeup(sc);
1834         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1835
1836         switch (cmd) {
1837         case SET_KEY:
1838                 ret = ath_key_config(common, vif, sta, key);
1839                 if (ret >= 0) {
1840                         key->hw_key_idx = ret;
1841                         /* push IV and Michael MIC generation to stack */
1842                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1843                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1844                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1845                         if (sc->sc_ah->sw_mgmt_crypto &&
1846                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1847                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1848                         ret = 0;
1849                 }
1850                 break;
1851         case DISABLE_KEY:
1852                 ath_key_delete(common, key);
1853                 break;
1854         default:
1855                 ret = -EINVAL;
1856         }
1857
1858         ath9k_ps_restore(sc);
1859         mutex_unlock(&sc->mutex);
1860
1861         return ret;
1862 }
1863
1864 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1865                                    struct ieee80211_vif *vif,
1866                                    struct ieee80211_bss_conf *bss_conf,
1867                                    u32 changed)
1868 {
1869         struct ath_softc *sc = hw->priv;
1870         struct ath_hw *ah = sc->sc_ah;
1871         struct ath_common *common = ath9k_hw_common(ah);
1872         struct ath_vif *avp = (void *)vif->drv_priv;
1873         int slottime;
1874         int error;
1875
1876         mutex_lock(&sc->mutex);
1877
1878         if (changed & BSS_CHANGED_BSSID) {
1879                 /* Set BSSID */
1880                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1881                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1882                 common->curaid = 0;
1883                 ath9k_hw_write_associd(ah);
1884
1885                 /* Set aggregation protection mode parameters */
1886                 sc->config.ath_aggr_prot = 0;
1887
1888                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1889                         common->curbssid, common->curaid);
1890
1891                 /* need to reconfigure the beacon */
1892                 sc->sc_flags &= ~SC_OP_BEACONS ;
1893         }
1894
1895         /* Enable transmission of beacons (AP, IBSS, MESH) */
1896         if ((changed & BSS_CHANGED_BEACON) ||
1897             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1898                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1899                 error = ath_beacon_alloc(sc, vif);
1900                 if (!error)
1901                         ath_beacon_config(sc, vif);
1902         }
1903
1904         if (changed & BSS_CHANGED_ERP_SLOT) {
1905                 if (bss_conf->use_short_slot)
1906                         slottime = 9;
1907                 else
1908                         slottime = 20;
1909                 if (vif->type == NL80211_IFTYPE_AP) {
1910                         /*
1911                          * Defer update, so that connected stations can adjust
1912                          * their settings at the same time.
1913                          * See beacon.c for more details
1914                          */
1915                         sc->beacon.slottime = slottime;
1916                         sc->beacon.updateslot = UPDATE;
1917                 } else {
1918                         ah->slottime = slottime;
1919                         ath9k_hw_init_global_settings(ah);
1920                 }
1921         }
1922
1923         /* Disable transmission of beacons */
1924         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1925                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1926
1927         if (changed & BSS_CHANGED_BEACON_INT) {
1928                 sc->beacon_interval = bss_conf->beacon_int;
1929                 /*
1930                  * In case of AP mode, the HW TSF has to be reset
1931                  * when the beacon interval changes.
1932                  */
1933                 if (vif->type == NL80211_IFTYPE_AP) {
1934                         sc->sc_flags |= SC_OP_TSF_RESET;
1935                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1936                         error = ath_beacon_alloc(sc, vif);
1937                         if (!error)
1938                                 ath_beacon_config(sc, vif);
1939                 } else {
1940                         ath_beacon_config(sc, vif);
1941                 }
1942         }
1943
1944         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1945                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1946                         bss_conf->use_short_preamble);
1947                 if (bss_conf->use_short_preamble)
1948                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1949                 else
1950                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1951         }
1952
1953         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1954                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1955                         bss_conf->use_cts_prot);
1956                 if (bss_conf->use_cts_prot &&
1957                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1958                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1959                 else
1960                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1961         }
1962
1963         if (changed & BSS_CHANGED_ASSOC) {
1964                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1965                         bss_conf->assoc);
1966                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1967         }
1968
1969         mutex_unlock(&sc->mutex);
1970 }
1971
1972 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1973 {
1974         struct ath_softc *sc = hw->priv;
1975         u64 tsf;
1976
1977         mutex_lock(&sc->mutex);
1978         ath9k_ps_wakeup(sc);
1979         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1980         ath9k_ps_restore(sc);
1981         mutex_unlock(&sc->mutex);
1982
1983         return tsf;
1984 }
1985
1986 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1987 {
1988         struct ath_softc *sc = hw->priv;
1989
1990         mutex_lock(&sc->mutex);
1991         ath9k_ps_wakeup(sc);
1992         ath9k_hw_settsf64(sc->sc_ah, tsf);
1993         ath9k_ps_restore(sc);
1994         mutex_unlock(&sc->mutex);
1995 }
1996
1997 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1998 {
1999         struct ath_softc *sc = hw->priv;
2000
2001         mutex_lock(&sc->mutex);
2002
2003         ath9k_ps_wakeup(sc);
2004         ath9k_hw_reset_tsf(sc->sc_ah);
2005         ath9k_ps_restore(sc);
2006
2007         mutex_unlock(&sc->mutex);
2008 }
2009
2010 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2011                               struct ieee80211_vif *vif,
2012                               enum ieee80211_ampdu_mlme_action action,
2013                               struct ieee80211_sta *sta,
2014                               u16 tid, u16 *ssn, u8 buf_size)
2015 {
2016         struct ath_softc *sc = hw->priv;
2017         int ret = 0;
2018
2019         local_bh_disable();
2020
2021         switch (action) {
2022         case IEEE80211_AMPDU_RX_START:
2023                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2024                         ret = -ENOTSUPP;
2025                 break;
2026         case IEEE80211_AMPDU_RX_STOP:
2027                 break;
2028         case IEEE80211_AMPDU_TX_START:
2029                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2030                         return -EOPNOTSUPP;
2031
2032                 ath9k_ps_wakeup(sc);
2033                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2034                 if (!ret)
2035                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2036                 ath9k_ps_restore(sc);
2037                 break;
2038         case IEEE80211_AMPDU_TX_STOP:
2039                 ath9k_ps_wakeup(sc);
2040                 ath_tx_aggr_stop(sc, sta, tid);
2041                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2042                 ath9k_ps_restore(sc);
2043                 break;
2044         case IEEE80211_AMPDU_TX_OPERATIONAL:
2045                 ath9k_ps_wakeup(sc);
2046                 ath_tx_aggr_resume(sc, sta, tid);
2047                 ath9k_ps_restore(sc);
2048                 break;
2049         default:
2050                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2051         }
2052
2053         local_bh_enable();
2054
2055         return ret;
2056 }
2057
2058 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2059                              struct survey_info *survey)
2060 {
2061         struct ath_softc *sc = hw->priv;
2062         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2063         struct ieee80211_supported_band *sband;
2064         struct ieee80211_channel *chan;
2065         unsigned long flags;
2066         int pos;
2067
2068         spin_lock_irqsave(&common->cc_lock, flags);
2069         if (idx == 0)
2070                 ath_update_survey_stats(sc);
2071
2072         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2073         if (sband && idx >= sband->n_channels) {
2074                 idx -= sband->n_channels;
2075                 sband = NULL;
2076         }
2077
2078         if (!sband)
2079                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2080
2081         if (!sband || idx >= sband->n_channels) {
2082                 spin_unlock_irqrestore(&common->cc_lock, flags);
2083                 return -ENOENT;
2084         }
2085
2086         chan = &sband->channels[idx];
2087         pos = chan->hw_value;
2088         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2089         survey->channel = chan;
2090         spin_unlock_irqrestore(&common->cc_lock, flags);
2091
2092         return 0;
2093 }
2094
2095 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2096 {
2097         struct ath_softc *sc = hw->priv;
2098         struct ath_hw *ah = sc->sc_ah;
2099
2100         mutex_lock(&sc->mutex);
2101         ah->coverage_class = coverage_class;
2102         ath9k_hw_init_global_settings(ah);
2103         mutex_unlock(&sc->mutex);
2104 }
2105
2106 struct ieee80211_ops ath9k_ops = {
2107         .tx                 = ath9k_tx,
2108         .start              = ath9k_start,
2109         .stop               = ath9k_stop,
2110         .add_interface      = ath9k_add_interface,
2111         .change_interface   = ath9k_change_interface,
2112         .remove_interface   = ath9k_remove_interface,
2113         .config             = ath9k_config,
2114         .configure_filter   = ath9k_configure_filter,
2115         .sta_add            = ath9k_sta_add,
2116         .sta_remove         = ath9k_sta_remove,
2117         .conf_tx            = ath9k_conf_tx,
2118         .bss_info_changed   = ath9k_bss_info_changed,
2119         .set_key            = ath9k_set_key,
2120         .get_tsf            = ath9k_get_tsf,
2121         .set_tsf            = ath9k_set_tsf,
2122         .reset_tsf          = ath9k_reset_tsf,
2123         .ampdu_action       = ath9k_ampdu_action,
2124         .get_survey         = ath9k_get_survey,
2125         .rfkill_poll        = ath9k_rfkill_poll_state,
2126         .set_coverage_class = ath9k_set_coverage_class,
2127 };