2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 static u8 parse_mpdudensity(u8 mpdudensity)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
61 spin_lock_bh(&txq->axq_lock);
63 if (txq->axq_depth || !list_empty(&txq->axq_acq))
66 spin_unlock_bh(&txq->axq_lock);
70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
75 spin_lock_irqsave(&sc->sc_pm_lock, flags);
76 ret = ath9k_hw_setpower(sc->sc_ah, mode);
77 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
82 void ath9k_ps_wakeup(struct ath_softc *sc)
84 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
86 enum ath9k_power_mode power_mode;
88 spin_lock_irqsave(&sc->sc_pm_lock, flags);
89 if (++sc->ps_usecount != 1)
92 power_mode = sc->sc_ah->power_mode;
93 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
96 * While the hardware is asleep, the cycle counters contain no
97 * useful data. Better clear them now so that they don't mess up
98 * survey data results.
100 if (power_mode != ATH9K_PM_AWAKE) {
101 spin_lock(&common->cc_lock);
102 ath_hw_cycle_counters_update(common);
103 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104 spin_unlock(&common->cc_lock);
108 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
111 void ath9k_ps_restore(struct ath_softc *sc)
113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114 enum ath9k_power_mode mode;
117 spin_lock_irqsave(&sc->sc_pm_lock, flags);
118 if (--sc->ps_usecount != 0)
121 if (sc->ps_idle && (sc->ps_flags & PS_WAIT_FOR_TX_ACK))
122 mode = ATH9K_PM_FULL_SLEEP;
123 else if (sc->ps_enabled &&
124 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
126 PS_WAIT_FOR_PSPOLL_DATA |
127 PS_WAIT_FOR_TX_ACK)))
128 mode = ATH9K_PM_NETWORK_SLEEP;
132 spin_lock(&common->cc_lock);
133 ath_hw_cycle_counters_update(common);
134 spin_unlock(&common->cc_lock);
136 ath9k_hw_setpower(sc->sc_ah, mode);
139 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
142 void ath_start_ani(struct ath_common *common)
144 struct ath_hw *ah = common->ah;
145 unsigned long timestamp = jiffies_to_msecs(jiffies);
146 struct ath_softc *sc = (struct ath_softc *) common->priv;
148 if (!(sc->sc_flags & SC_OP_ANI_RUN))
151 if (sc->sc_flags & SC_OP_OFFCHANNEL)
154 common->ani.longcal_timer = timestamp;
155 common->ani.shortcal_timer = timestamp;
156 common->ani.checkani_timer = timestamp;
158 mod_timer(&common->ani.timer,
160 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
163 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
165 struct ath_hw *ah = sc->sc_ah;
166 struct ath9k_channel *chan = &ah->channels[channel];
167 struct survey_info *survey = &sc->survey[channel];
169 if (chan->noisefloor) {
170 survey->filled |= SURVEY_INFO_NOISE_DBM;
171 survey->noise = ath9k_hw_getchan_noise(ah, chan);
176 * Updates the survey statistics and returns the busy time since last
177 * update in %, if the measurement duration was long enough for the
178 * result to be useful, -1 otherwise.
180 static int ath_update_survey_stats(struct ath_softc *sc)
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
193 if (ah->power_mode == ATH9K_PM_AWAKE)
194 ath_hw_cycle_counters_update(common);
196 if (cc->cycles > 0) {
197 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
198 SURVEY_INFO_CHANNEL_TIME_BUSY |
199 SURVEY_INFO_CHANNEL_TIME_RX |
200 SURVEY_INFO_CHANNEL_TIME_TX;
201 survey->channel_time += cc->cycles / div;
202 survey->channel_time_busy += cc->rx_busy / div;
203 survey->channel_time_rx += cc->rx_frame / div;
204 survey->channel_time_tx += cc->tx_frame / div;
207 if (cc->cycles < div)
211 ret = cc->rx_busy * 100 / cc->cycles;
213 memset(cc, 0, sizeof(*cc));
215 ath_update_survey_nf(sc, pos);
220 static void __ath_cancel_work(struct ath_softc *sc)
222 cancel_work_sync(&sc->paprd_work);
223 cancel_work_sync(&sc->hw_check_work);
224 cancel_delayed_work_sync(&sc->tx_complete_work);
225 cancel_delayed_work_sync(&sc->hw_pll_work);
228 static void ath_cancel_work(struct ath_softc *sc)
230 __ath_cancel_work(sc);
231 cancel_work_sync(&sc->hw_reset_work);
234 static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
236 struct ath_hw *ah = sc->sc_ah;
237 struct ath_common *common = ath9k_hw_common(ah);
240 ieee80211_stop_queues(sc->hw);
242 sc->hw_busy_count = 0;
243 del_timer_sync(&common->ani.timer);
245 ath9k_debug_samp_bb_mac(sc);
246 ath9k_hw_disable_interrupts(ah);
248 ret = ath_drain_all_txq(sc, retry_tx);
250 if (!ath_stoprecv(sc))
254 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
255 ath_rx_tasklet(sc, 1, true);
256 ath_rx_tasklet(sc, 1, false);
264 static bool ath_complete_reset(struct ath_softc *sc, bool start)
266 struct ath_hw *ah = sc->sc_ah;
267 struct ath_common *common = ath9k_hw_common(ah);
269 if (ath_startrecv(sc) != 0) {
270 ath_err(common, "Unable to restart recv logic\n");
274 ath9k_cmn_update_txpow(ah, sc->curtxpow,
275 sc->config.txpowlimit, &sc->curtxpow);
276 ath9k_hw_set_interrupts(ah);
277 ath9k_hw_enable_interrupts(ah);
279 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL)) && start) {
280 if (sc->sc_flags & SC_OP_BEACONS)
283 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
284 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
285 if (!common->disable_ani)
286 ath_start_ani(common);
289 if (ath9k_hw_ops(ah)->antdiv_comb_conf_get && sc->ant_rx != 3) {
290 struct ath_hw_antcomb_conf div_ant_conf;
293 ath9k_hw_antdiv_comb_conf_get(ah, &div_ant_conf);
296 lna_conf = ATH_ANT_DIV_COMB_LNA1;
298 lna_conf = ATH_ANT_DIV_COMB_LNA2;
299 div_ant_conf.main_lna_conf = lna_conf;
300 div_ant_conf.alt_lna_conf = lna_conf;
302 ath9k_hw_antdiv_comb_conf_set(ah, &div_ant_conf);
305 ieee80211_wake_queues(sc->hw);
310 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
313 struct ath_hw *ah = sc->sc_ah;
314 struct ath_common *common = ath9k_hw_common(ah);
315 struct ath9k_hw_cal_data *caldata = NULL;
320 __ath_cancel_work(sc);
322 spin_lock_bh(&sc->sc_pcu_lock);
324 if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
326 caldata = &sc->caldata;
335 if (fastcc && (ah->chip_fullsleep ||
336 !ath9k_hw_check_alive(ah)))
339 if (!ath_prepare_reset(sc, retry_tx, flush))
342 ath_dbg(common, ATH_DBG_CONFIG,
343 "Reset to %u MHz, HT40: %d fastcc: %d\n",
344 hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
348 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
351 "Unable to reset channel, reset status %d\n", r);
355 if (!ath_complete_reset(sc, true))
359 spin_unlock_bh(&sc->sc_pcu_lock);
365 * Set/change channels. If the channel is really being changed, it's done
366 * by reseting the chip. To accomplish this we must first cleanup any pending
367 * DMA, then restart stuff.
369 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
370 struct ath9k_channel *hchan)
374 if (sc->sc_flags & SC_OP_INVALID)
379 r = ath_reset_internal(sc, hchan, false);
381 ath9k_ps_restore(sc);
386 static void ath_paprd_activate(struct ath_softc *sc)
388 struct ath_hw *ah = sc->sc_ah;
389 struct ath9k_hw_cal_data *caldata = ah->caldata;
392 if (!caldata || !caldata->paprd_done)
396 ar9003_paprd_enable(ah, false);
397 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
398 if (!(ah->txchainmask & BIT(chain)))
401 ar9003_paprd_populate_single_table(ah, caldata, chain);
404 ar9003_paprd_enable(ah, true);
405 ath9k_ps_restore(sc);
408 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
410 struct ieee80211_hw *hw = sc->hw;
411 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
412 struct ath_hw *ah = sc->sc_ah;
413 struct ath_common *common = ath9k_hw_common(ah);
414 struct ath_tx_control txctl;
417 memset(&txctl, 0, sizeof(txctl));
418 txctl.txq = sc->tx.txq_map[WME_AC_BE];
420 memset(tx_info, 0, sizeof(*tx_info));
421 tx_info->band = hw->conf.channel->band;
422 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
423 tx_info->control.rates[0].idx = 0;
424 tx_info->control.rates[0].count = 1;
425 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
426 tx_info->control.rates[1].idx = -1;
428 init_completion(&sc->paprd_complete);
429 txctl.paprd = BIT(chain);
431 if (ath_tx_start(hw, skb, &txctl) != 0) {
432 ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
433 dev_kfree_skb_any(skb);
437 time_left = wait_for_completion_timeout(&sc->paprd_complete,
438 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
441 ath_dbg(common, ATH_DBG_CALIBRATE,
442 "Timeout waiting for paprd training on TX chain %d\n",
448 void ath_paprd_calibrate(struct work_struct *work)
450 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
451 struct ieee80211_hw *hw = sc->hw;
452 struct ath_hw *ah = sc->sc_ah;
453 struct ieee80211_hdr *hdr;
454 struct sk_buff *skb = NULL;
455 struct ath9k_hw_cal_data *caldata = ah->caldata;
456 struct ath_common *common = ath9k_hw_common(ah);
467 if (ar9003_paprd_init_table(ah) < 0)
470 skb = alloc_skb(len, GFP_KERNEL);
475 memset(skb->data, 0, len);
476 hdr = (struct ieee80211_hdr *)skb->data;
477 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
478 hdr->frame_control = cpu_to_le16(ftype);
479 hdr->duration_id = cpu_to_le16(10);
480 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
481 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
482 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
484 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
485 if (!(ah->txchainmask & BIT(chain)))
490 ath_dbg(common, ATH_DBG_CALIBRATE,
491 "Sending PAPRD frame for thermal measurement "
492 "on chain %d\n", chain);
493 if (!ath_paprd_send_frame(sc, skb, chain))
496 ar9003_paprd_setup_gain_table(ah, chain);
498 ath_dbg(common, ATH_DBG_CALIBRATE,
499 "Sending PAPRD training frame on chain %d\n", chain);
500 if (!ath_paprd_send_frame(sc, skb, chain))
503 if (!ar9003_paprd_is_done(ah)) {
504 ath_dbg(common, ATH_DBG_CALIBRATE,
505 "PAPRD not yet done on chain %d\n", chain);
509 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
510 ath_dbg(common, ATH_DBG_CALIBRATE,
511 "PAPRD create curve failed on chain %d\n",
521 caldata->paprd_done = true;
522 ath_paprd_activate(sc);
526 ath9k_ps_restore(sc);
530 * This routine performs the periodic noise floor calibration function
531 * that is used to adjust and optimize the chip performance. This
532 * takes environmental changes (location, temperature) into account.
533 * When the task is complete, it reschedules itself depending on the
534 * appropriate interval that was calculated.
536 void ath_ani_calibrate(unsigned long data)
538 struct ath_softc *sc = (struct ath_softc *)data;
539 struct ath_hw *ah = sc->sc_ah;
540 struct ath_common *common = ath9k_hw_common(ah);
541 bool longcal = false;
542 bool shortcal = false;
543 bool aniflag = false;
544 unsigned int timestamp = jiffies_to_msecs(jiffies);
545 u32 cal_interval, short_cal_interval, long_cal_interval;
548 if (ah->caldata && ah->caldata->nfcal_interference)
549 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
551 long_cal_interval = ATH_LONG_CALINTERVAL;
553 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
554 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
556 /* Only calibrate if awake */
557 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
562 /* Long calibration runs independently of short calibration. */
563 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
565 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
566 common->ani.longcal_timer = timestamp;
569 /* Short calibration applies only while caldone is false */
570 if (!common->ani.caldone) {
571 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
573 ath_dbg(common, ATH_DBG_ANI,
574 "shortcal @%lu\n", jiffies);
575 common->ani.shortcal_timer = timestamp;
576 common->ani.resetcal_timer = timestamp;
579 if ((timestamp - common->ani.resetcal_timer) >=
580 ATH_RESTART_CALINTERVAL) {
581 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
582 if (common->ani.caldone)
583 common->ani.resetcal_timer = timestamp;
587 /* Verify whether we must check ANI */
588 if ((timestamp - common->ani.checkani_timer) >=
589 ah->config.ani_poll_interval) {
591 common->ani.checkani_timer = timestamp;
594 /* Call ANI routine if necessary */
596 spin_lock_irqsave(&common->cc_lock, flags);
597 ath9k_hw_ani_monitor(ah, ah->curchan);
598 ath_update_survey_stats(sc);
599 spin_unlock_irqrestore(&common->cc_lock, flags);
602 /* Perform calibration if necessary */
603 if (longcal || shortcal) {
604 common->ani.caldone =
605 ath9k_hw_calibrate(ah, ah->curchan,
606 ah->rxchainmask, longcal);
609 ath9k_ps_restore(sc);
613 * Set timer interval based on previous results.
614 * The interval must be the shortest necessary to satisfy ANI,
615 * short calibration and long calibration.
617 ath9k_debug_samp_bb_mac(sc);
618 cal_interval = ATH_LONG_CALINTERVAL;
619 if (sc->sc_ah->config.enable_ani)
620 cal_interval = min(cal_interval,
621 (u32)ah->config.ani_poll_interval);
622 if (!common->ani.caldone)
623 cal_interval = min(cal_interval, (u32)short_cal_interval);
625 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
626 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
627 if (!ah->caldata->paprd_done)
628 ieee80211_queue_work(sc->hw, &sc->paprd_work);
629 else if (!ah->paprd_table_write_done)
630 ath_paprd_activate(sc);
634 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
635 struct ieee80211_vif *vif)
638 an = (struct ath_node *)sta->drv_priv;
640 #ifdef CONFIG_ATH9K_DEBUGFS
641 spin_lock(&sc->nodes_lock);
642 list_add(&an->list, &sc->nodes);
643 spin_unlock(&sc->nodes_lock);
647 if (sc->sc_flags & SC_OP_TXAGGR) {
648 ath_tx_node_init(sc, an);
649 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
650 sta->ht_cap.ampdu_factor);
651 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
655 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
657 struct ath_node *an = (struct ath_node *)sta->drv_priv;
659 #ifdef CONFIG_ATH9K_DEBUGFS
660 spin_lock(&sc->nodes_lock);
662 spin_unlock(&sc->nodes_lock);
666 if (sc->sc_flags & SC_OP_TXAGGR)
667 ath_tx_node_cleanup(sc, an);
671 void ath9k_tasklet(unsigned long data)
673 struct ath_softc *sc = (struct ath_softc *)data;
674 struct ath_hw *ah = sc->sc_ah;
675 struct ath_common *common = ath9k_hw_common(ah);
677 u32 status = sc->intrstatus;
681 spin_lock(&sc->sc_pcu_lock);
683 if ((status & ATH9K_INT_FATAL) ||
684 (status & ATH9K_INT_BB_WATCHDOG)) {
685 #ifdef CONFIG_ATH9K_DEBUGFS
686 enum ath_reset_type type;
688 if (status & ATH9K_INT_FATAL)
689 type = RESET_TYPE_FATAL_INT;
691 type = RESET_TYPE_BB_WATCHDOG;
693 RESET_STAT_INC(sc, type);
695 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
700 * Only run the baseband hang check if beacons stop working in AP or
701 * IBSS mode, because it has a high false positive rate. For station
702 * mode it should not be necessary, since the upper layers will detect
703 * this through a beacon miss automatically and the following channel
704 * change will trigger a hardware reset anyway
706 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
707 !ath9k_hw_check_alive(ah))
708 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
710 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
712 * TSF sync does not look correct; remain awake to sync with
715 ath_dbg(common, ATH_DBG_PS,
716 "TSFOOR - Sync with next Beacon\n");
717 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
720 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
721 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
724 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
726 if (status & rxmask) {
727 /* Check for high priority Rx first */
728 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
729 (status & ATH9K_INT_RXHP))
730 ath_rx_tasklet(sc, 0, true);
732 ath_rx_tasklet(sc, 0, false);
735 if (status & ATH9K_INT_TX) {
736 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
737 ath_tx_edma_tasklet(sc);
742 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
743 if (status & ATH9K_INT_GENTIMER)
744 ath_gen_timer_isr(sc->sc_ah);
746 if (status & ATH9K_INT_MCI)
750 /* re-enable hardware interrupt */
751 ath9k_hw_enable_interrupts(ah);
753 spin_unlock(&sc->sc_pcu_lock);
754 ath9k_ps_restore(sc);
757 irqreturn_t ath_isr(int irq, void *dev)
759 #define SCHED_INTR ( \
761 ATH9K_INT_BB_WATCHDOG | \
771 ATH9K_INT_GENTIMER | \
774 struct ath_softc *sc = dev;
775 struct ath_hw *ah = sc->sc_ah;
776 struct ath_common *common = ath9k_hw_common(ah);
777 enum ath9k_int status;
781 * The hardware is not ready/present, don't
782 * touch anything. Note this can happen early
783 * on if the IRQ is shared.
785 if (sc->sc_flags & SC_OP_INVALID)
789 /* shared irq, not for us */
791 if (!ath9k_hw_intrpend(ah))
795 * Figure out the reason(s) for the interrupt. Note
796 * that the hal returns a pseudo-ISR that may include
797 * bits we haven't explicitly enabled so we mask the
798 * value to insure we only process bits we requested.
800 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
801 status &= ah->imask; /* discard unasked-for bits */
804 * If there are no status bits set, then this interrupt was not
805 * for me (should have been caught above).
810 /* Cache the status */
811 sc->intrstatus = status;
813 if (status & SCHED_INTR)
817 * If a FATAL or RXORN interrupt is received, we have to reset the
820 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
821 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
824 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
825 (status & ATH9K_INT_BB_WATCHDOG)) {
827 spin_lock(&common->cc_lock);
828 ath_hw_cycle_counters_update(common);
829 ar9003_hw_bb_watchdog_dbg_info(ah);
830 spin_unlock(&common->cc_lock);
835 if (status & ATH9K_INT_SWBA)
836 tasklet_schedule(&sc->bcon_tasklet);
838 if (status & ATH9K_INT_TXURN)
839 ath9k_hw_updatetxtriglevel(ah, true);
841 if (status & ATH9K_INT_RXEOL) {
842 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
843 ath9k_hw_set_interrupts(ah);
846 if (status & ATH9K_INT_MIB) {
848 * Disable interrupts until we service the MIB
849 * interrupt; otherwise it will continue to
852 ath9k_hw_disable_interrupts(ah);
854 * Let the hal handle the event. We assume
855 * it will clear whatever condition caused
858 spin_lock(&common->cc_lock);
859 ath9k_hw_proc_mib_event(ah);
860 spin_unlock(&common->cc_lock);
861 ath9k_hw_enable_interrupts(ah);
864 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
865 if (status & ATH9K_INT_TIM_TIMER) {
866 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
868 /* Clear RxAbort bit so that we can
870 ath9k_setpower(sc, ATH9K_PM_AWAKE);
871 ath9k_hw_setrxabort(sc->sc_ah, 0);
872 sc->ps_flags |= PS_WAIT_FOR_BEACON;
877 ath_debug_stat_interrupt(sc, status);
880 /* turn off every interrupt */
881 ath9k_hw_disable_interrupts(ah);
882 tasklet_schedule(&sc->intr_tq);
890 static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
892 struct ath_hw *ah = sc->sc_ah;
893 struct ath_common *common = ath9k_hw_common(ah);
894 struct ieee80211_channel *channel = hw->conf.channel;
898 spin_lock_bh(&sc->sc_pcu_lock);
899 atomic_set(&ah->intr_ref_cnt, -1);
901 ath9k_hw_configpcipowersave(ah, false);
904 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
906 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
909 "Unable to reset channel (%u MHz), reset status %d\n",
910 channel->center_freq, r);
913 ath_complete_reset(sc, true);
916 ath9k_hw_cfg_output(ah, ah->led_pin,
917 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
918 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
920 spin_unlock_bh(&sc->sc_pcu_lock);
922 ath9k_ps_restore(sc);
925 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
927 struct ath_hw *ah = sc->sc_ah;
928 struct ieee80211_channel *channel = hw->conf.channel;
935 spin_lock_bh(&sc->sc_pcu_lock);
938 * Keep the LED on when the radio is disabled
939 * during idle unassociated state.
942 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
943 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
946 ath_prepare_reset(sc, false, true);
949 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
951 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
953 ath_err(ath9k_hw_common(sc->sc_ah),
954 "Unable to reset channel (%u MHz), reset status %d\n",
955 channel->center_freq, r);
958 ath9k_hw_phy_disable(ah);
960 ath9k_hw_configpcipowersave(ah, true);
962 spin_unlock_bh(&sc->sc_pcu_lock);
963 ath9k_ps_restore(sc);
966 static int ath_reset(struct ath_softc *sc, bool retry_tx)
972 r = ath_reset_internal(sc, NULL, retry_tx);
976 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
977 if (ATH_TXQ_SETUP(sc, i)) {
978 spin_lock_bh(&sc->tx.txq[i].axq_lock);
979 ath_txq_schedule(sc, &sc->tx.txq[i]);
980 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
985 ath9k_ps_restore(sc);
990 void ath_reset_work(struct work_struct *work)
992 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
997 void ath_hw_check(struct work_struct *work)
999 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
1000 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1001 unsigned long flags;
1004 ath9k_ps_wakeup(sc);
1005 if (ath9k_hw_check_alive(sc->sc_ah))
1008 spin_lock_irqsave(&common->cc_lock, flags);
1009 busy = ath_update_survey_stats(sc);
1010 spin_unlock_irqrestore(&common->cc_lock, flags);
1012 ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
1013 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
1015 if (++sc->hw_busy_count >= 3) {
1016 RESET_STAT_INC(sc, RESET_TYPE_BB_HANG);
1017 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
1020 } else if (busy >= 0)
1021 sc->hw_busy_count = 0;
1024 ath9k_ps_restore(sc);
1027 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
1030 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1032 if (pll_sqsum >= 0x40000) {
1035 /* Rx is hung for more than 500ms. Reset it */
1036 ath_dbg(common, ATH_DBG_RESET,
1037 "Possible RX hang, resetting");
1038 RESET_STAT_INC(sc, RESET_TYPE_PLL_HANG);
1039 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
1046 void ath_hw_pll_work(struct work_struct *work)
1048 struct ath_softc *sc = container_of(work, struct ath_softc,
1052 if (AR_SREV_9485(sc->sc_ah)) {
1054 ath9k_ps_wakeup(sc);
1055 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
1056 ath9k_ps_restore(sc);
1058 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
1060 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
1064 /**********************/
1065 /* mac80211 callbacks */
1066 /**********************/
1068 static int ath9k_start(struct ieee80211_hw *hw)
1070 struct ath_softc *sc = hw->priv;
1071 struct ath_hw *ah = sc->sc_ah;
1072 struct ath_common *common = ath9k_hw_common(ah);
1073 struct ieee80211_channel *curchan = hw->conf.channel;
1074 struct ath9k_channel *init_channel;
1077 ath_dbg(common, ATH_DBG_CONFIG,
1078 "Starting driver with initial channel: %d MHz\n",
1079 curchan->center_freq);
1081 ath9k_ps_wakeup(sc);
1083 mutex_lock(&sc->mutex);
1085 /* setup initial channel */
1086 sc->chan_idx = curchan->hw_value;
1088 init_channel = ath9k_cmn_get_curchannel(hw, ah);
1090 /* Reset SERDES registers */
1091 ath9k_hw_configpcipowersave(ah, false);
1094 * The basic interface to setting the hardware in a good
1095 * state is ``reset''. On return the hardware is known to
1096 * be powered up and with interrupts disabled. This must
1097 * be followed by initialization of the appropriate bits
1098 * and then setup of the interrupt mask.
1100 spin_lock_bh(&sc->sc_pcu_lock);
1101 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1104 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1105 r, curchan->center_freq);
1106 spin_unlock_bh(&sc->sc_pcu_lock);
1110 /* Setup our intr mask. */
1111 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1112 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1115 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1116 ah->imask |= ATH9K_INT_RXHP |
1118 ATH9K_INT_BB_WATCHDOG;
1120 ah->imask |= ATH9K_INT_RX;
1122 ah->imask |= ATH9K_INT_GTT;
1124 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1125 ah->imask |= ATH9K_INT_CST;
1127 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
1128 ah->imask |= ATH9K_INT_MCI;
1130 sc->sc_flags &= ~SC_OP_INVALID;
1131 sc->sc_ah->is_monitoring = false;
1133 /* Disable BMISS interrupt when we're not associated */
1134 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1136 if (!ath_complete_reset(sc, false)) {
1138 spin_unlock_bh(&sc->sc_pcu_lock);
1142 spin_unlock_bh(&sc->sc_pcu_lock);
1144 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1145 !ah->btcoex_hw.enabled) {
1146 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
1147 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1148 AR_STOMP_LOW_WLAN_WGHT);
1149 ath9k_hw_btcoex_enable(ah);
1151 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1152 ath9k_btcoex_timer_resume(sc);
1155 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1156 common->bus_ops->extn_synch_en(common);
1159 mutex_unlock(&sc->mutex);
1161 ath9k_ps_restore(sc);
1166 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1168 struct ath_softc *sc = hw->priv;
1169 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1170 struct ath_tx_control txctl;
1171 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1173 if (sc->ps_enabled) {
1175 * mac80211 does not set PM field for normal data frames, so we
1176 * need to update that based on the current PS mode.
1178 if (ieee80211_is_data(hdr->frame_control) &&
1179 !ieee80211_is_nullfunc(hdr->frame_control) &&
1180 !ieee80211_has_pm(hdr->frame_control)) {
1181 ath_dbg(common, ATH_DBG_PS,
1182 "Add PM=1 for a TX frame while in PS mode\n");
1183 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1188 * Cannot tx while the hardware is in full sleep, it first needs a full
1189 * chip reset to recover from that
1191 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP))
1194 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1196 * We are using PS-Poll and mac80211 can request TX while in
1197 * power save mode. Need to wake up hardware for the TX to be
1198 * completed and if needed, also for RX of buffered frames.
1200 ath9k_ps_wakeup(sc);
1201 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1202 ath9k_hw_setrxabort(sc->sc_ah, 0);
1203 if (ieee80211_is_pspoll(hdr->frame_control)) {
1204 ath_dbg(common, ATH_DBG_PS,
1205 "Sending PS-Poll to pick a buffered frame\n");
1206 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1208 ath_dbg(common, ATH_DBG_PS,
1209 "Wake up to complete TX\n");
1210 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1213 * The actual restore operation will happen only after
1214 * the sc_flags bit is cleared. We are just dropping
1215 * the ps_usecount here.
1217 ath9k_ps_restore(sc);
1220 memset(&txctl, 0, sizeof(struct ath_tx_control));
1221 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1223 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1225 if (ath_tx_start(hw, skb, &txctl) != 0) {
1226 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1232 dev_kfree_skb_any(skb);
1235 static void ath9k_stop(struct ieee80211_hw *hw)
1237 struct ath_softc *sc = hw->priv;
1238 struct ath_hw *ah = sc->sc_ah;
1239 struct ath_common *common = ath9k_hw_common(ah);
1241 mutex_lock(&sc->mutex);
1243 ath_cancel_work(sc);
1245 if (sc->sc_flags & SC_OP_INVALID) {
1246 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1247 mutex_unlock(&sc->mutex);
1251 /* Ensure HW is awake when we try to shut it down. */
1252 ath9k_ps_wakeup(sc);
1254 if (ah->btcoex_hw.enabled) {
1255 ath9k_hw_btcoex_disable(ah);
1256 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1257 ath9k_btcoex_timer_pause(sc);
1258 ath_mci_flush_profile(&sc->btcoex.mci);
1261 spin_lock_bh(&sc->sc_pcu_lock);
1263 /* prevent tasklets to enable interrupts once we disable them */
1264 ah->imask &= ~ATH9K_INT_GLOBAL;
1266 /* make sure h/w will not generate any interrupt
1267 * before setting the invalid flag. */
1268 ath9k_hw_disable_interrupts(ah);
1270 if (!(sc->sc_flags & SC_OP_INVALID)) {
1271 ath_drain_all_txq(sc, false);
1273 ath9k_hw_phy_disable(ah);
1275 sc->rx.rxlink = NULL;
1278 dev_kfree_skb_any(sc->rx.frag);
1282 /* disable HAL and put h/w to sleep */
1283 ath9k_hw_disable(ah);
1285 spin_unlock_bh(&sc->sc_pcu_lock);
1287 /* we can now sync irq and kill any running tasklets, since we already
1288 * disabled interrupts and not holding a spin lock */
1289 synchronize_irq(sc->irq);
1290 tasklet_kill(&sc->intr_tq);
1291 tasklet_kill(&sc->bcon_tasklet);
1293 ath9k_ps_restore(sc);
1296 ath_radio_disable(sc, hw);
1298 sc->sc_flags |= SC_OP_INVALID;
1300 mutex_unlock(&sc->mutex);
1302 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1305 bool ath9k_uses_beacons(int type)
1308 case NL80211_IFTYPE_AP:
1309 case NL80211_IFTYPE_ADHOC:
1310 case NL80211_IFTYPE_MESH_POINT:
1317 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1318 struct ieee80211_vif *vif)
1320 struct ath_vif *avp = (void *)vif->drv_priv;
1322 ath9k_set_beaconing_status(sc, false);
1323 ath_beacon_return(sc, avp);
1324 ath9k_set_beaconing_status(sc, true);
1325 sc->sc_flags &= ~SC_OP_BEACONS;
1328 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1330 struct ath9k_vif_iter_data *iter_data = data;
1333 if (iter_data->hw_macaddr)
1334 for (i = 0; i < ETH_ALEN; i++)
1335 iter_data->mask[i] &=
1336 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1338 switch (vif->type) {
1339 case NL80211_IFTYPE_AP:
1342 case NL80211_IFTYPE_STATION:
1343 iter_data->nstations++;
1345 case NL80211_IFTYPE_ADHOC:
1346 iter_data->nadhocs++;
1348 case NL80211_IFTYPE_MESH_POINT:
1349 iter_data->nmeshes++;
1351 case NL80211_IFTYPE_WDS:
1355 iter_data->nothers++;
1360 /* Called with sc->mutex held. */
1361 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1362 struct ieee80211_vif *vif,
1363 struct ath9k_vif_iter_data *iter_data)
1365 struct ath_softc *sc = hw->priv;
1366 struct ath_hw *ah = sc->sc_ah;
1367 struct ath_common *common = ath9k_hw_common(ah);
1370 * Use the hardware MAC address as reference, the hardware uses it
1371 * together with the BSSID mask when matching addresses.
1373 memset(iter_data, 0, sizeof(*iter_data));
1374 iter_data->hw_macaddr = common->macaddr;
1375 memset(&iter_data->mask, 0xff, ETH_ALEN);
1378 ath9k_vif_iter(iter_data, vif->addr, vif);
1380 /* Get list of all active MAC addresses */
1381 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1385 /* Called with sc->mutex held. */
1386 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1387 struct ieee80211_vif *vif)
1389 struct ath_softc *sc = hw->priv;
1390 struct ath_hw *ah = sc->sc_ah;
1391 struct ath_common *common = ath9k_hw_common(ah);
1392 struct ath9k_vif_iter_data iter_data;
1394 ath9k_calculate_iter_data(hw, vif, &iter_data);
1396 /* Set BSSID mask. */
1397 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1398 ath_hw_setbssidmask(common);
1400 /* Set op-mode & TSF */
1401 if (iter_data.naps > 0) {
1402 ath9k_hw_set_tsfadjust(ah, 1);
1403 sc->sc_flags |= SC_OP_TSF_RESET;
1404 ah->opmode = NL80211_IFTYPE_AP;
1406 ath9k_hw_set_tsfadjust(ah, 0);
1407 sc->sc_flags &= ~SC_OP_TSF_RESET;
1409 if (iter_data.nmeshes)
1410 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1411 else if (iter_data.nwds)
1412 ah->opmode = NL80211_IFTYPE_AP;
1413 else if (iter_data.nadhocs)
1414 ah->opmode = NL80211_IFTYPE_ADHOC;
1416 ah->opmode = NL80211_IFTYPE_STATION;
1420 * Enable MIB interrupts when there are hardware phy counters.
1422 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1423 if (ah->config.enable_ani)
1424 ah->imask |= ATH9K_INT_MIB;
1425 ah->imask |= ATH9K_INT_TSFOOR;
1427 ah->imask &= ~ATH9K_INT_MIB;
1428 ah->imask &= ~ATH9K_INT_TSFOOR;
1431 ath9k_hw_set_interrupts(ah);
1434 if (iter_data.naps > 0) {
1435 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1437 if (!common->disable_ani) {
1438 sc->sc_flags |= SC_OP_ANI_RUN;
1439 ath_start_ani(common);
1443 sc->sc_flags &= ~SC_OP_ANI_RUN;
1444 del_timer_sync(&common->ani.timer);
1448 /* Called with sc->mutex held, vif counts set up properly. */
1449 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1450 struct ieee80211_vif *vif)
1452 struct ath_softc *sc = hw->priv;
1454 ath9k_calculate_summary_state(hw, vif);
1456 if (ath9k_uses_beacons(vif->type)) {
1458 /* This may fail because upper levels do not have beacons
1459 * properly configured yet. That's OK, we assume it
1460 * will be properly configured and then we will be notified
1461 * in the info_changed method and set up beacons properly
1464 ath9k_set_beaconing_status(sc, false);
1465 error = ath_beacon_alloc(sc, vif);
1467 ath_beacon_config(sc, vif);
1468 ath9k_set_beaconing_status(sc, true);
1473 static int ath9k_add_interface(struct ieee80211_hw *hw,
1474 struct ieee80211_vif *vif)
1476 struct ath_softc *sc = hw->priv;
1477 struct ath_hw *ah = sc->sc_ah;
1478 struct ath_common *common = ath9k_hw_common(ah);
1481 ath9k_ps_wakeup(sc);
1482 mutex_lock(&sc->mutex);
1484 switch (vif->type) {
1485 case NL80211_IFTYPE_STATION:
1486 case NL80211_IFTYPE_WDS:
1487 case NL80211_IFTYPE_ADHOC:
1488 case NL80211_IFTYPE_AP:
1489 case NL80211_IFTYPE_MESH_POINT:
1492 ath_err(common, "Interface type %d not yet supported\n",
1498 if (ath9k_uses_beacons(vif->type)) {
1499 if (sc->nbcnvifs >= ATH_BCBUF) {
1500 ath_err(common, "Not enough beacon buffers when adding"
1501 " new interface of type: %i\n",
1508 if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1509 ((vif->type == NL80211_IFTYPE_ADHOC) &&
1511 ath_err(common, "Cannot create ADHOC interface when other"
1512 " interfaces already exist.\n");
1517 ath_dbg(common, ATH_DBG_CONFIG,
1518 "Attach a VIF of type: %d\n", vif->type);
1522 ath9k_do_vif_add_setup(hw, vif);
1524 mutex_unlock(&sc->mutex);
1525 ath9k_ps_restore(sc);
1529 static int ath9k_change_interface(struct ieee80211_hw *hw,
1530 struct ieee80211_vif *vif,
1531 enum nl80211_iftype new_type,
1534 struct ath_softc *sc = hw->priv;
1535 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1538 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1539 mutex_lock(&sc->mutex);
1540 ath9k_ps_wakeup(sc);
1542 /* See if new interface type is valid. */
1543 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1545 ath_err(common, "When using ADHOC, it must be the only"
1551 if (ath9k_uses_beacons(new_type) &&
1552 !ath9k_uses_beacons(vif->type)) {
1553 if (sc->nbcnvifs >= ATH_BCBUF) {
1554 ath_err(common, "No beacon slot available\n");
1560 /* Clean up old vif stuff */
1561 if (ath9k_uses_beacons(vif->type))
1562 ath9k_reclaim_beacon(sc, vif);
1564 /* Add new settings */
1565 vif->type = new_type;
1568 ath9k_do_vif_add_setup(hw, vif);
1570 ath9k_ps_restore(sc);
1571 mutex_unlock(&sc->mutex);
1575 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1576 struct ieee80211_vif *vif)
1578 struct ath_softc *sc = hw->priv;
1579 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1581 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1583 ath9k_ps_wakeup(sc);
1584 mutex_lock(&sc->mutex);
1588 /* Reclaim beacon resources */
1589 if (ath9k_uses_beacons(vif->type))
1590 ath9k_reclaim_beacon(sc, vif);
1592 ath9k_calculate_summary_state(hw, NULL);
1594 mutex_unlock(&sc->mutex);
1595 ath9k_ps_restore(sc);
1598 static void ath9k_enable_ps(struct ath_softc *sc)
1600 struct ath_hw *ah = sc->sc_ah;
1602 sc->ps_enabled = true;
1603 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1604 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1605 ah->imask |= ATH9K_INT_TIM_TIMER;
1606 ath9k_hw_set_interrupts(ah);
1608 ath9k_hw_setrxabort(ah, 1);
1612 static void ath9k_disable_ps(struct ath_softc *sc)
1614 struct ath_hw *ah = sc->sc_ah;
1616 sc->ps_enabled = false;
1617 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1618 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1619 ath9k_hw_setrxabort(ah, 0);
1620 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1622 PS_WAIT_FOR_PSPOLL_DATA |
1623 PS_WAIT_FOR_TX_ACK);
1624 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1625 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1626 ath9k_hw_set_interrupts(ah);
1632 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1634 struct ath_softc *sc = hw->priv;
1635 struct ath_hw *ah = sc->sc_ah;
1636 struct ath_common *common = ath9k_hw_common(ah);
1637 struct ieee80211_conf *conf = &hw->conf;
1638 bool disable_radio = false;
1640 mutex_lock(&sc->mutex);
1643 * Leave this as the first check because we need to turn on the
1644 * radio if it was disabled before prior to processing the rest
1645 * of the changes. Likewise we must only disable the radio towards
1648 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1649 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1651 ath_radio_enable(sc, hw);
1652 ath_dbg(common, ATH_DBG_CONFIG,
1653 "not-idle: enabling radio\n");
1655 disable_radio = true;
1660 * We just prepare to enable PS. We have to wait until our AP has
1661 * ACK'd our null data frame to disable RX otherwise we'll ignore
1662 * those ACKs and end up retransmitting the same null data frames.
1663 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1665 if (changed & IEEE80211_CONF_CHANGE_PS) {
1666 unsigned long flags;
1667 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1668 if (conf->flags & IEEE80211_CONF_PS)
1669 ath9k_enable_ps(sc);
1671 ath9k_disable_ps(sc);
1672 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1675 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1676 if (conf->flags & IEEE80211_CONF_MONITOR) {
1677 ath_dbg(common, ATH_DBG_CONFIG,
1678 "Monitor mode is enabled\n");
1679 sc->sc_ah->is_monitoring = true;
1681 ath_dbg(common, ATH_DBG_CONFIG,
1682 "Monitor mode is disabled\n");
1683 sc->sc_ah->is_monitoring = false;
1687 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1688 struct ieee80211_channel *curchan = hw->conf.channel;
1689 struct ath9k_channel old_chan;
1690 int pos = curchan->hw_value;
1692 unsigned long flags;
1695 old_pos = ah->curchan - &ah->channels[0];
1697 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1698 sc->sc_flags |= SC_OP_OFFCHANNEL;
1700 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1702 ath_dbg(common, ATH_DBG_CONFIG,
1703 "Set channel: %d MHz type: %d\n",
1704 curchan->center_freq, conf->channel_type);
1706 /* update survey stats for the old channel before switching */
1707 spin_lock_irqsave(&common->cc_lock, flags);
1708 ath_update_survey_stats(sc);
1709 spin_unlock_irqrestore(&common->cc_lock, flags);
1712 * Preserve the current channel values, before updating
1715 if (old_pos == pos) {
1716 memcpy(&old_chan, &sc->sc_ah->channels[pos],
1717 sizeof(struct ath9k_channel));
1718 ah->curchan = &old_chan;
1721 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1722 curchan, conf->channel_type);
1725 * If the operating channel changes, change the survey in-use flags
1727 * Reset the survey data for the new channel, unless we're switching
1728 * back to the operating channel from an off-channel operation.
1730 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1731 sc->cur_survey != &sc->survey[pos]) {
1734 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1736 sc->cur_survey = &sc->survey[pos];
1738 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1739 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1740 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1741 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1744 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1745 ath_err(common, "Unable to set channel\n");
1746 mutex_unlock(&sc->mutex);
1751 * The most recent snapshot of channel->noisefloor for the old
1752 * channel is only available after the hardware reset. Copy it to
1753 * the survey stats now.
1756 ath_update_survey_nf(sc, old_pos);
1759 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1760 ath_dbg(common, ATH_DBG_CONFIG,
1761 "Set power: %d\n", conf->power_level);
1762 sc->config.txpowlimit = 2 * conf->power_level;
1763 ath9k_ps_wakeup(sc);
1764 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1765 sc->config.txpowlimit, &sc->curtxpow);
1766 ath9k_ps_restore(sc);
1769 if (disable_radio) {
1770 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1771 ath_radio_disable(sc, hw);
1774 mutex_unlock(&sc->mutex);
1779 #define SUPPORTED_FILTERS \
1780 (FIF_PROMISC_IN_BSS | \
1785 FIF_BCN_PRBRESP_PROMISC | \
1789 /* FIXME: sc->sc_full_reset ? */
1790 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1791 unsigned int changed_flags,
1792 unsigned int *total_flags,
1795 struct ath_softc *sc = hw->priv;
1798 changed_flags &= SUPPORTED_FILTERS;
1799 *total_flags &= SUPPORTED_FILTERS;
1801 sc->rx.rxfilter = *total_flags;
1802 ath9k_ps_wakeup(sc);
1803 rfilt = ath_calcrxfilter(sc);
1804 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1805 ath9k_ps_restore(sc);
1807 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1808 "Set HW RX filter: 0x%x\n", rfilt);
1811 static int ath9k_sta_add(struct ieee80211_hw *hw,
1812 struct ieee80211_vif *vif,
1813 struct ieee80211_sta *sta)
1815 struct ath_softc *sc = hw->priv;
1816 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1817 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1818 struct ieee80211_key_conf ps_key = { };
1820 ath_node_attach(sc, sta, vif);
1822 if (vif->type != NL80211_IFTYPE_AP &&
1823 vif->type != NL80211_IFTYPE_AP_VLAN)
1826 an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1831 static void ath9k_del_ps_key(struct ath_softc *sc,
1832 struct ieee80211_vif *vif,
1833 struct ieee80211_sta *sta)
1835 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1836 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1837 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1842 ath_key_delete(common, &ps_key);
1845 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1846 struct ieee80211_vif *vif,
1847 struct ieee80211_sta *sta)
1849 struct ath_softc *sc = hw->priv;
1851 ath9k_del_ps_key(sc, vif, sta);
1852 ath_node_detach(sc, sta);
1857 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1858 struct ieee80211_vif *vif,
1859 enum sta_notify_cmd cmd,
1860 struct ieee80211_sta *sta)
1862 struct ath_softc *sc = hw->priv;
1863 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1866 case STA_NOTIFY_SLEEP:
1867 an->sleeping = true;
1868 ath_tx_aggr_sleep(sta, sc, an);
1870 case STA_NOTIFY_AWAKE:
1871 an->sleeping = false;
1872 ath_tx_aggr_wakeup(sc, an);
1877 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1878 struct ieee80211_vif *vif, u16 queue,
1879 const struct ieee80211_tx_queue_params *params)
1881 struct ath_softc *sc = hw->priv;
1882 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1883 struct ath_txq *txq;
1884 struct ath9k_tx_queue_info qi;
1887 if (queue >= WME_NUM_AC)
1890 txq = sc->tx.txq_map[queue];
1892 ath9k_ps_wakeup(sc);
1893 mutex_lock(&sc->mutex);
1895 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1897 qi.tqi_aifs = params->aifs;
1898 qi.tqi_cwmin = params->cw_min;
1899 qi.tqi_cwmax = params->cw_max;
1900 qi.tqi_burstTime = params->txop;
1902 ath_dbg(common, ATH_DBG_CONFIG,
1903 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1904 queue, txq->axq_qnum, params->aifs, params->cw_min,
1905 params->cw_max, params->txop);
1907 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1909 ath_err(common, "TXQ Update failed\n");
1911 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1912 if (queue == WME_AC_BE && !ret)
1913 ath_beaconq_config(sc);
1915 mutex_unlock(&sc->mutex);
1916 ath9k_ps_restore(sc);
1921 static int ath9k_set_key(struct ieee80211_hw *hw,
1922 enum set_key_cmd cmd,
1923 struct ieee80211_vif *vif,
1924 struct ieee80211_sta *sta,
1925 struct ieee80211_key_conf *key)
1927 struct ath_softc *sc = hw->priv;
1928 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1931 if (ath9k_modparam_nohwcrypt)
1934 if (vif->type == NL80211_IFTYPE_ADHOC &&
1935 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1936 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1937 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1939 * For now, disable hw crypto for the RSN IBSS group keys. This
1940 * could be optimized in the future to use a modified key cache
1941 * design to support per-STA RX GTK, but until that gets
1942 * implemented, use of software crypto for group addressed
1943 * frames is a acceptable to allow RSN IBSS to be used.
1948 mutex_lock(&sc->mutex);
1949 ath9k_ps_wakeup(sc);
1950 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1955 ath9k_del_ps_key(sc, vif, sta);
1957 ret = ath_key_config(common, vif, sta, key);
1959 key->hw_key_idx = ret;
1960 /* push IV and Michael MIC generation to stack */
1961 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1962 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1963 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1964 if (sc->sc_ah->sw_mgmt_crypto &&
1965 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1966 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1971 ath_key_delete(common, key);
1977 ath9k_ps_restore(sc);
1978 mutex_unlock(&sc->mutex);
1982 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1984 struct ath_softc *sc = data;
1985 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1986 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1987 struct ath_vif *avp = (void *)vif->drv_priv;
1990 * Skip iteration if primary station vif's bss info
1993 if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1996 if (bss_conf->assoc) {
1997 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1998 avp->primary_sta_vif = true;
1999 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2000 common->curaid = bss_conf->aid;
2001 ath9k_hw_write_associd(sc->sc_ah);
2002 ath_dbg(common, ATH_DBG_CONFIG,
2003 "Bss Info ASSOC %d, bssid: %pM\n",
2004 bss_conf->aid, common->curbssid);
2005 ath_beacon_config(sc, vif);
2007 * Request a re-configuration of Beacon related timers
2008 * on the receipt of the first Beacon frame (i.e.,
2009 * after time sync with the AP).
2011 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
2012 /* Reset rssi stats */
2013 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
2014 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2016 if (!common->disable_ani) {
2017 sc->sc_flags |= SC_OP_ANI_RUN;
2018 ath_start_ani(common);
2024 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
2026 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2027 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2028 struct ath_vif *avp = (void *)vif->drv_priv;
2030 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
2033 /* Reconfigure bss info */
2034 if (avp->primary_sta_vif && !bss_conf->assoc) {
2035 ath_dbg(common, ATH_DBG_CONFIG,
2036 "Bss Info DISASSOC %d, bssid %pM\n",
2037 common->curaid, common->curbssid);
2038 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
2039 avp->primary_sta_vif = false;
2040 memset(common->curbssid, 0, ETH_ALEN);
2044 ieee80211_iterate_active_interfaces_atomic(
2045 sc->hw, ath9k_bss_iter, sc);
2048 * None of station vifs are associated.
2051 if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
2052 ath9k_hw_write_associd(sc->sc_ah);
2054 sc->sc_flags &= ~SC_OP_ANI_RUN;
2055 del_timer_sync(&common->ani.timer);
2056 memset(&sc->caldata, 0, sizeof(sc->caldata));
2060 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2061 struct ieee80211_vif *vif,
2062 struct ieee80211_bss_conf *bss_conf,
2065 struct ath_softc *sc = hw->priv;
2066 struct ath_hw *ah = sc->sc_ah;
2067 struct ath_common *common = ath9k_hw_common(ah);
2068 struct ath_vif *avp = (void *)vif->drv_priv;
2072 ath9k_ps_wakeup(sc);
2073 mutex_lock(&sc->mutex);
2075 if (changed & BSS_CHANGED_BSSID) {
2076 ath9k_config_bss(sc, vif);
2078 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2079 common->curbssid, common->curaid);
2082 if (changed & BSS_CHANGED_IBSS) {
2083 /* There can be only one vif available */
2084 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2085 common->curaid = bss_conf->aid;
2086 ath9k_hw_write_associd(sc->sc_ah);
2088 if (bss_conf->ibss_joined) {
2089 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2091 if (!common->disable_ani) {
2092 sc->sc_flags |= SC_OP_ANI_RUN;
2093 ath_start_ani(common);
2097 sc->sc_flags &= ~SC_OP_ANI_RUN;
2098 del_timer_sync(&common->ani.timer);
2102 /* Enable transmission of beacons (AP, IBSS, MESH) */
2103 if ((changed & BSS_CHANGED_BEACON) ||
2104 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2105 ath9k_set_beaconing_status(sc, false);
2106 error = ath_beacon_alloc(sc, vif);
2108 ath_beacon_config(sc, vif);
2109 ath9k_set_beaconing_status(sc, true);
2112 if (changed & BSS_CHANGED_ERP_SLOT) {
2113 if (bss_conf->use_short_slot)
2117 if (vif->type == NL80211_IFTYPE_AP) {
2119 * Defer update, so that connected stations can adjust
2120 * their settings at the same time.
2121 * See beacon.c for more details
2123 sc->beacon.slottime = slottime;
2124 sc->beacon.updateslot = UPDATE;
2126 ah->slottime = slottime;
2127 ath9k_hw_init_global_settings(ah);
2131 /* Disable transmission of beacons */
2132 if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2133 !bss_conf->enable_beacon) {
2134 ath9k_set_beaconing_status(sc, false);
2135 avp->is_bslot_active = false;
2136 ath9k_set_beaconing_status(sc, true);
2139 if (changed & BSS_CHANGED_BEACON_INT) {
2141 * In case of AP mode, the HW TSF has to be reset
2142 * when the beacon interval changes.
2144 if (vif->type == NL80211_IFTYPE_AP) {
2145 sc->sc_flags |= SC_OP_TSF_RESET;
2146 ath9k_set_beaconing_status(sc, false);
2147 error = ath_beacon_alloc(sc, vif);
2149 ath_beacon_config(sc, vif);
2150 ath9k_set_beaconing_status(sc, true);
2152 ath_beacon_config(sc, vif);
2155 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2156 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2157 bss_conf->use_short_preamble);
2158 if (bss_conf->use_short_preamble)
2159 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2161 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2164 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2165 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2166 bss_conf->use_cts_prot);
2167 if (bss_conf->use_cts_prot &&
2168 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2169 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2171 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2174 mutex_unlock(&sc->mutex);
2175 ath9k_ps_restore(sc);
2178 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2180 struct ath_softc *sc = hw->priv;
2183 mutex_lock(&sc->mutex);
2184 ath9k_ps_wakeup(sc);
2185 tsf = ath9k_hw_gettsf64(sc->sc_ah);
2186 ath9k_ps_restore(sc);
2187 mutex_unlock(&sc->mutex);
2192 static void ath9k_set_tsf(struct ieee80211_hw *hw,
2193 struct ieee80211_vif *vif,
2196 struct ath_softc *sc = hw->priv;
2198 mutex_lock(&sc->mutex);
2199 ath9k_ps_wakeup(sc);
2200 ath9k_hw_settsf64(sc->sc_ah, tsf);
2201 ath9k_ps_restore(sc);
2202 mutex_unlock(&sc->mutex);
2205 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2207 struct ath_softc *sc = hw->priv;
2209 mutex_lock(&sc->mutex);
2211 ath9k_ps_wakeup(sc);
2212 ath9k_hw_reset_tsf(sc->sc_ah);
2213 ath9k_ps_restore(sc);
2215 mutex_unlock(&sc->mutex);
2218 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2219 struct ieee80211_vif *vif,
2220 enum ieee80211_ampdu_mlme_action action,
2221 struct ieee80211_sta *sta,
2222 u16 tid, u16 *ssn, u8 buf_size)
2224 struct ath_softc *sc = hw->priv;
2230 case IEEE80211_AMPDU_RX_START:
2231 if (!(sc->sc_flags & SC_OP_RXAGGR))
2234 case IEEE80211_AMPDU_RX_STOP:
2236 case IEEE80211_AMPDU_TX_START:
2237 if (!(sc->sc_flags & SC_OP_TXAGGR))
2240 ath9k_ps_wakeup(sc);
2241 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2243 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2244 ath9k_ps_restore(sc);
2246 case IEEE80211_AMPDU_TX_STOP:
2247 ath9k_ps_wakeup(sc);
2248 ath_tx_aggr_stop(sc, sta, tid);
2249 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2250 ath9k_ps_restore(sc);
2252 case IEEE80211_AMPDU_TX_OPERATIONAL:
2253 ath9k_ps_wakeup(sc);
2254 ath_tx_aggr_resume(sc, sta, tid);
2255 ath9k_ps_restore(sc);
2258 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2266 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2267 struct survey_info *survey)
2269 struct ath_softc *sc = hw->priv;
2270 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2271 struct ieee80211_supported_band *sband;
2272 struct ieee80211_channel *chan;
2273 unsigned long flags;
2276 spin_lock_irqsave(&common->cc_lock, flags);
2278 ath_update_survey_stats(sc);
2280 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2281 if (sband && idx >= sband->n_channels) {
2282 idx -= sband->n_channels;
2287 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2289 if (!sband || idx >= sband->n_channels) {
2290 spin_unlock_irqrestore(&common->cc_lock, flags);
2294 chan = &sband->channels[idx];
2295 pos = chan->hw_value;
2296 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2297 survey->channel = chan;
2298 spin_unlock_irqrestore(&common->cc_lock, flags);
2303 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2305 struct ath_softc *sc = hw->priv;
2306 struct ath_hw *ah = sc->sc_ah;
2308 mutex_lock(&sc->mutex);
2309 ah->coverage_class = coverage_class;
2311 ath9k_ps_wakeup(sc);
2312 ath9k_hw_init_global_settings(ah);
2313 ath9k_ps_restore(sc);
2315 mutex_unlock(&sc->mutex);
2318 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2320 struct ath_softc *sc = hw->priv;
2321 struct ath_hw *ah = sc->sc_ah;
2322 struct ath_common *common = ath9k_hw_common(ah);
2323 int timeout = 200; /* ms */
2327 mutex_lock(&sc->mutex);
2328 cancel_delayed_work_sync(&sc->tx_complete_work);
2330 if (ah->ah_flags & AH_UNPLUGGED) {
2331 ath_dbg(common, ATH_DBG_ANY, "Device has been unplugged!\n");
2332 mutex_unlock(&sc->mutex);
2336 if (sc->sc_flags & SC_OP_INVALID) {
2337 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2338 mutex_unlock(&sc->mutex);
2345 for (j = 0; j < timeout; j++) {
2349 usleep_range(1000, 2000);
2351 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2352 if (!ATH_TXQ_SETUP(sc, i))
2355 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2365 ath9k_ps_wakeup(sc);
2366 spin_lock_bh(&sc->sc_pcu_lock);
2367 drain_txq = ath_drain_all_txq(sc, false);
2368 spin_unlock_bh(&sc->sc_pcu_lock);
2371 ath_reset(sc, false);
2373 ath9k_ps_restore(sc);
2374 ieee80211_wake_queues(hw);
2377 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2378 mutex_unlock(&sc->mutex);
2381 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2383 struct ath_softc *sc = hw->priv;
2386 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2387 if (!ATH_TXQ_SETUP(sc, i))
2390 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2396 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2398 struct ath_softc *sc = hw->priv;
2399 struct ath_hw *ah = sc->sc_ah;
2400 struct ieee80211_vif *vif;
2401 struct ath_vif *avp;
2403 struct ath_tx_status ts;
2406 vif = sc->beacon.bslot[0];
2410 avp = (void *)vif->drv_priv;
2411 if (!avp->is_bslot_active)
2414 if (!sc->beacon.tx_processed) {
2415 tasklet_disable(&sc->bcon_tasklet);
2418 if (!bf || !bf->bf_mpdu)
2421 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2422 if (status == -EINPROGRESS)
2425 sc->beacon.tx_processed = true;
2426 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2429 tasklet_enable(&sc->bcon_tasklet);
2432 return sc->beacon.tx_last;
2435 static int ath9k_get_stats(struct ieee80211_hw *hw,
2436 struct ieee80211_low_level_stats *stats)
2438 struct ath_softc *sc = hw->priv;
2439 struct ath_hw *ah = sc->sc_ah;
2440 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2442 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2443 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2444 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2445 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2449 static u32 fill_chainmask(u32 cap, u32 new)
2454 for (i = 0; cap && new; i++, cap >>= 1) {
2455 if (!(cap & BIT(0)))
2467 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2469 struct ath_softc *sc = hw->priv;
2470 struct ath_hw *ah = sc->sc_ah;
2472 if (!rx_ant || !tx_ant)
2475 sc->ant_rx = rx_ant;
2476 sc->ant_tx = tx_ant;
2478 if (ah->caps.rx_chainmask == 1)
2481 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2482 if (AR_SREV_9100(ah))
2483 ah->rxchainmask = 0x7;
2485 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2487 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2488 ath9k_reload_chainmask_settings(sc);
2493 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2495 struct ath_softc *sc = hw->priv;
2497 *tx_ant = sc->ant_tx;
2498 *rx_ant = sc->ant_rx;
2502 struct ieee80211_ops ath9k_ops = {
2504 .start = ath9k_start,
2506 .add_interface = ath9k_add_interface,
2507 .change_interface = ath9k_change_interface,
2508 .remove_interface = ath9k_remove_interface,
2509 .config = ath9k_config,
2510 .configure_filter = ath9k_configure_filter,
2511 .sta_add = ath9k_sta_add,
2512 .sta_remove = ath9k_sta_remove,
2513 .sta_notify = ath9k_sta_notify,
2514 .conf_tx = ath9k_conf_tx,
2515 .bss_info_changed = ath9k_bss_info_changed,
2516 .set_key = ath9k_set_key,
2517 .get_tsf = ath9k_get_tsf,
2518 .set_tsf = ath9k_set_tsf,
2519 .reset_tsf = ath9k_reset_tsf,
2520 .ampdu_action = ath9k_ampdu_action,
2521 .get_survey = ath9k_get_survey,
2522 .rfkill_poll = ath9k_rfkill_poll_state,
2523 .set_coverage_class = ath9k_set_coverage_class,
2524 .flush = ath9k_flush,
2525 .tx_frames_pending = ath9k_tx_frames_pending,
2526 .tx_last_beacon = ath9k_tx_last_beacon,
2527 .get_stats = ath9k_get_stats,
2528 .set_antenna = ath9k_set_antenna,
2529 .get_antenna = ath9k_get_antenna,