2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/kthread.h>
20 #include <linux/printk.h>
21 #include <linux/pci_ids.h>
22 #include <linux/netdevice.h>
23 #include <linux/interrupt.h>
24 #include <linux/sched.h>
25 #include <linux/mmc/sdio.h>
26 #include <linux/mmc/sdio_func.h>
27 #include <linux/mmc/card.h>
28 #include <linux/semaphore.h>
29 #include <linux/firmware.h>
30 #include <linux/module.h>
31 #include <linux/bcma/bcma.h>
32 #include <asm/unaligned.h>
34 #include <brcmu_wifi.h>
35 #include <brcmu_utils.h>
36 #include <brcm_hw_ids.h>
38 #include "sdio_host.h"
39 #include "sdio_chip.h"
41 #define DCMD_RESP_TIMEOUT 2000 /* In milli second */
45 #define BRCMF_TRAP_INFO_SIZE 80
47 #define CBUF_LEN (128)
50 __le32 buf; /* Can't be pointer on (64-bit) hosts */
53 char *_buf_compat; /* Redundant pointer for backward compat. */
58 * When there is no UART (e.g. Quickturn),
59 * the host should write a complete
60 * input line directly into cbuf and then write
61 * the length into vcons_in.
62 * This may also be used when there is a real UART
63 * (at risk of conflicting with
64 * the real UART). vcons_out is currently unused.
69 /* Output (logging) buffer
70 * Console output is written to a ring buffer log_buf at index log_idx.
71 * The host may read the output when it sees log_idx advance.
72 * Output will be lost if the output wraps around faster than the host
75 struct rte_log_le log_le;
77 /* Console input line buffer
78 * Characters are read one at a time into cbuf
79 * until <CR> is received, then
80 * the buffer is processed as a command line.
81 * Also used for virtual UART.
88 #include <chipcommon.h>
93 #define TXQLEN 2048 /* bulk tx queue length */
94 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
95 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
98 #define TXRETRIES 2 /* # of retries for tx frames */
100 #define BRCMF_RXBOUND 50 /* Default for max rx frames in
103 #define BRCMF_TXBOUND 20 /* Default for max tx frames in
106 #define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */
108 #define MEMBLOCK 2048 /* Block size used for downloading
110 #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold
111 biggest possible glom */
113 #define BRCMF_FIRSTREAD (1 << 6)
116 /* SBSDIO_DEVICE_CTL */
118 /* 1: device will assert busy signal when receiving CMD53 */
119 #define SBSDIO_DEVCTL_SETBUSY 0x01
120 /* 1: assertion of sdio interrupt is synchronous to the sdio clock */
121 #define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
122 /* 1: mask all interrupts to host except the chipActive (rev 8) */
123 #define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
124 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
125 * sdio bus power cycle to clear (rev 9) */
126 #define SBSDIO_DEVCTL_PADS_ISO 0x08
127 /* Force SD->SB reset mapping (rev 11) */
128 #define SBSDIO_DEVCTL_SB_RST_CTL 0x30
129 /* Determined by CoreControl bit */
130 #define SBSDIO_DEVCTL_RST_CORECTL 0x00
131 /* Force backplane reset */
132 #define SBSDIO_DEVCTL_RST_BPRESET 0x10
133 /* Force no backplane reset */
134 #define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
136 /* direct(mapped) cis space */
138 /* MAPPED common CIS address */
139 #define SBSDIO_CIS_BASE_COMMON 0x1000
140 /* maximum bytes in one CIS */
141 #define SBSDIO_CIS_SIZE_LIMIT 0x200
142 /* cis offset addr is < 17 bits */
143 #define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
145 /* manfid tuple length, include tuple, link bytes */
146 #define SBSDIO_CIS_MANFID_TUPLE_LEN 6
149 #define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */
150 #define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */
151 #define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */
152 #define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */
153 #define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */
154 #define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */
155 #define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */
156 #define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */
157 #define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */
158 #define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */
159 #define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */
160 #define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */
161 #define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */
162 #define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */
163 #define I_PC (1 << 10) /* descriptor error */
164 #define I_PD (1 << 11) /* data error */
165 #define I_DE (1 << 12) /* Descriptor protocol Error */
166 #define I_RU (1 << 13) /* Receive descriptor Underflow */
167 #define I_RO (1 << 14) /* Receive fifo Overflow */
168 #define I_XU (1 << 15) /* Transmit fifo Underflow */
169 #define I_RI (1 << 16) /* Receive Interrupt */
170 #define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */
171 #define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */
172 #define I_XI (1 << 24) /* Transmit Interrupt */
173 #define I_RF_TERM (1 << 25) /* Read Frame Terminate */
174 #define I_WF_TERM (1 << 26) /* Write Frame Terminate */
175 #define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */
176 #define I_SBINT (1 << 28) /* sbintstatus Interrupt */
177 #define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */
178 #define I_SRESET (1 << 30) /* CCCR RES interrupt */
179 #define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */
180 #define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
181 #define I_DMA (I_RI | I_XI | I_ERRORS)
184 #define CC_CISRDY (1 << 0) /* CIS Ready */
185 #define CC_BPRESEN (1 << 1) /* CCCR RES signal */
186 #define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */
187 #define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */
188 #define CC_XMTDATAAVAIL_MODE (1 << 4)
189 #define CC_XMTDATAAVAIL_CTRL (1 << 5)
192 #define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */
193 #define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */
194 #define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */
195 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
198 #define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */
200 /* Total length of frame header for dongle protocol */
201 #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN)
202 #define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN)
205 * Software allocation of To SB Mailbox resources
208 /* tosbmailbox bits corresponding to intstatus bits */
209 #define SMB_NAK (1 << 0) /* Frame NAK */
210 #define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */
211 #define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */
212 #define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */
214 /* tosbmailboxdata */
215 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */
218 * Software allocation of To Host Mailbox resources
222 #define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */
223 #define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */
224 #define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */
225 #define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */
227 /* tohostmailboxdata */
228 #define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */
229 #define HMB_DATA_DEVREADY 2 /* talk to host after enable */
230 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag */
231 #define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */
233 #define HMB_DATA_FCDATA_MASK 0xff000000
234 #define HMB_DATA_FCDATA_SHIFT 24
236 #define HMB_DATA_VERSION_MASK 0x00ff0000
237 #define HMB_DATA_VERSION_SHIFT 16
240 * Software-defined protocol header
243 /* Current protocol version */
244 #define SDPCM_PROT_VERSION 4
246 /* SW frame header */
247 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff)
249 #define SDPCM_CHANNEL_MASK 0x00000f00
250 #define SDPCM_CHANNEL_SHIFT 8
251 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f)
253 #define SDPCM_NEXTLEN_OFFSET 2
255 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */
256 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */
257 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff)
258 #define SDPCM_DOFFSET_MASK 0xff000000
259 #define SDPCM_DOFFSET_SHIFT 24
260 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */
261 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff)
262 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */
263 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff)
265 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */
267 /* logical channel numbers */
268 #define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */
269 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */
270 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */
271 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */
272 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */
274 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */
276 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
279 * Shared structure between dongle and the host.
280 * The structure contains pointers to trap or assert information.
282 #define SDPCM_SHARED_VERSION 0x0002
283 #define SDPCM_SHARED_VERSION_MASK 0x00FF
284 #define SDPCM_SHARED_ASSERT_BUILT 0x0100
285 #define SDPCM_SHARED_ASSERT 0x0200
286 #define SDPCM_SHARED_TRAP 0x0400
288 /* Space for header read, limit for data packets */
289 #define MAX_HDR_READ (1 << 6)
290 #define MAX_RX_DATASZ 2048
292 /* Maximum milliseconds to wait for F2 to come up */
293 #define BRCMF_WAIT_F2RDY 3000
295 /* Bump up limit on waiting for HT to account for first startup;
296 * if the image is doing a CRC calculation before programming the PMU
297 * for HT availability, it could take a couple hundred ms more, so
298 * max out at a 1 second (1000000us).
300 #undef PMU_MAX_TRANSITION_DLY
301 #define PMU_MAX_TRANSITION_DLY 1000000
303 /* Value for ChipClockCSR during initial setup */
304 #define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
305 SBSDIO_ALP_AVAIL_REQ)
307 /* Flags for SDH calls */
308 #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
310 #define BRCMFMAC_FW_NAME "brcm/brcmfmac.bin"
311 #define BRCMFMAC_NV_NAME "brcm/brcmfmac.txt"
312 MODULE_FIRMWARE(BRCMFMAC_FW_NAME);
313 MODULE_FIRMWARE(BRCMFMAC_NV_NAME);
315 #define BRCMF_IDLE_IMMEDIATE (-1) /* Enter idle immediately */
316 #define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change
319 #define BRCMF_IDLE_INTERVAL 1
322 * Conversion of 802.1D priority to precedence level
324 static uint prio2prec(u32 prio)
326 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
332 u32 corecontrol; /* 0x00, rev8 */
333 u32 corestatus; /* rev8 */
335 u32 biststatus; /* rev8 */
338 u16 pcmciamesportaladdr; /* 0x010, rev8 */
340 u16 pcmciamesportalmask; /* rev8 */
342 u16 pcmciawrframebc; /* rev8 */
344 u16 pcmciaunderflowtimer; /* rev8 */
348 u32 intstatus; /* 0x020, rev8 */
349 u32 hostintmask; /* rev8 */
350 u32 intmask; /* rev8 */
351 u32 sbintstatus; /* rev8 */
352 u32 sbintmask; /* rev8 */
353 u32 funcintmask; /* rev4 */
355 u32 tosbmailbox; /* 0x040, rev8 */
356 u32 tohostmailbox; /* rev8 */
357 u32 tosbmailboxdata; /* rev8 */
358 u32 tohostmailboxdata; /* rev8 */
360 /* synchronized access to registers in SDIO clock domain */
361 u32 sdioaccess; /* 0x050, rev8 */
364 /* PCMCIA frame control */
365 u8 pcmciaframectrl; /* 0x060, rev8 */
367 u8 pcmciawatermark; /* rev8 */
370 /* interrupt batching control */
371 u32 intrcvlazy; /* 0x100, rev8 */
375 u32 cmd52rd; /* 0x110, rev8 */
376 u32 cmd52wr; /* rev8 */
377 u32 cmd53rd; /* rev8 */
378 u32 cmd53wr; /* rev8 */
379 u32 abort; /* rev8 */
380 u32 datacrcerror; /* rev8 */
381 u32 rdoutofsync; /* rev8 */
382 u32 wroutofsync; /* rev8 */
383 u32 writebusy; /* rev8 */
384 u32 readwait; /* rev8 */
385 u32 readterm; /* rev8 */
386 u32 writeterm; /* rev8 */
388 u32 clockctlstatus; /* rev8 */
391 u32 PAD[128]; /* DMA engines */
393 /* SDIO/PCMCIA CIS region */
394 char cis[512]; /* 0x400-0x5ff, rev6 */
396 /* PCMCIA function control registers */
397 char pcmciafcr[256]; /* 0x600-6ff, rev6 */
400 /* PCMCIA backplane access */
401 u16 backplanecsr; /* 0x76E, rev6 */
402 u16 backplaneaddr0; /* rev6 */
403 u16 backplaneaddr1; /* rev6 */
404 u16 backplaneaddr2; /* rev6 */
405 u16 backplaneaddr3; /* rev6 */
406 u16 backplanedata0; /* rev6 */
407 u16 backplanedata1; /* rev6 */
408 u16 backplanedata2; /* rev6 */
409 u16 backplanedata3; /* rev6 */
412 /* sprom "size" & "blank" info */
413 u16 spromstatus; /* 0x7BE, rev2 */
420 /* Device console log buffer state */
421 struct brcmf_console {
422 uint count; /* Poll interval msec counter */
423 uint log_addr; /* Log struct address (fixed) */
424 struct rte_log_le log_le; /* Log struct (host copy) */
425 uint bufsize; /* Size of log buffer */
426 u8 *buf; /* Log buffer (host copy) */
427 uint last; /* Last buffer read index */
431 struct sdpcm_shared {
435 u32 assert_file_addr;
437 u32 console_addr; /* Address of struct rte_console */
442 struct sdpcm_shared_le {
445 __le32 assert_exp_addr;
446 __le32 assert_file_addr;
448 __le32 console_addr; /* Address of struct rte_console */
449 __le32 msgtrace_addr;
454 /* misc chip info needed by some of the routines */
455 /* Private data for SDIO bus interaction */
457 struct brcmf_sdio_dev *sdiodev; /* sdio device handler */
458 struct chip_info *ci; /* Chip info struct */
459 char *vars; /* Variables (from CIS and/or other) */
460 uint varsz; /* Size of variables buffer */
462 u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
464 u32 hostintmask; /* Copy of Host Interrupt Mask */
465 u32 intstatus; /* Intstatus bits (events) pending */
466 bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */
467 bool fcstate; /* State of dongle flow-control */
469 uint blocksize; /* Block size of SDIO transfers */
470 uint roundup; /* Max roundup limit */
472 struct pktq txq; /* Queue length used for flow-control */
473 u8 flowcontrol; /* per prio flow control bitmask */
474 u8 tx_seq; /* Transmit sequence number (next) */
475 u8 tx_max; /* Maximum transmit sequence allowed */
477 u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN];
478 u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */
479 u16 nextlen; /* Next Read Len from last header */
480 u8 rx_seq; /* Receive sequence number (expected) */
481 bool rxskip; /* Skip receive (awaiting NAK ACK) */
483 uint rxbound; /* Rx frames to read before resched */
484 uint txbound; /* Tx frames to send before resched */
487 struct sk_buff *glomd; /* Packet containing glomming descriptor */
488 struct sk_buff_head glom; /* Packet list for glommed superframe */
489 uint glomerr; /* Glom packet read errors */
491 u8 *rxbuf; /* Buffer for receiving control packets */
492 uint rxblen; /* Allocated length of rxbuf */
493 u8 *rxctl; /* Aligned pointer into rxbuf */
494 u8 *databuf; /* Buffer for receiving big glom packet */
495 u8 *dataptr; /* Aligned pointer into databuf */
496 uint rxlen; /* Length of valid data in buffer */
498 u8 sdpcm_ver; /* Bus protocol reported by dongle */
500 bool intr; /* Use interrupts */
501 bool poll; /* Use polling */
502 bool ipend; /* Device interrupt is pending */
503 uint intrcount; /* Count of device interrupt callbacks */
504 uint lastintrs; /* Count as of last watchdog timer */
505 uint spurious; /* Count of spurious interrupts */
506 uint pollrate; /* Ticks between device polls */
507 uint polltick; /* Tick counter */
508 uint pollcnt; /* Count of active polls */
511 uint console_interval;
512 struct brcmf_console console; /* Console output polling support */
513 uint console_addr; /* Console address from shared struct */
516 uint regfails; /* Count of R_REG failures */
518 uint clkstate; /* State of sd and backplane clock(s) */
519 bool activity; /* Activity flag for clock down */
520 s32 idletime; /* Control for activity timeout */
521 s32 idlecount; /* Activity timeout counter */
522 s32 idleclock; /* How to set bus driver when idle */
524 bool use_rxchain; /* If brcmf should use PKT chains */
525 bool sleeping; /* Is SDIO bus sleeping? */
526 bool rxflow_mode; /* Rx flow control mode */
527 bool rxflow; /* Is rx flow control on */
528 bool alp_only; /* Don't use HT clock (ALP only) */
529 /* Field to decide if rx of control frames happen in rxbuf or lb-pool */
532 /* Some additional counters */
533 uint tx_sderrs; /* Count of tx attempts with sd errors */
534 uint fcqueued; /* Tx packets that got queued */
535 uint rxrtx; /* Count of rtx requests (NAK to dongle) */
536 uint rx_toolong; /* Receive frames too long to receive */
537 uint rxc_errors; /* SDIO errors when reading control frames */
538 uint rx_hdrfail; /* SDIO errors on header reads */
539 uint rx_badhdr; /* Bad received headers (roosync?) */
540 uint rx_badseq; /* Mismatched rx sequence number */
541 uint fc_rcvd; /* Number of flow-control events received */
542 uint fc_xoff; /* Number which turned on flow-control */
543 uint fc_xon; /* Number which turned off flow-control */
544 uint rxglomfail; /* Failed deglom attempts */
545 uint rxglomframes; /* Number of glom frames (superframes) */
546 uint rxglompkts; /* Number of packets from glom frames */
547 uint f2rxhdrs; /* Number of header reads */
548 uint f2rxdata; /* Number of frame data reads */
549 uint f2txdata; /* Number of f2 frame writes */
550 uint f1regdata; /* Number of f1 register accesses */
551 uint tickcnt; /* Number of watchdog been schedule */
552 unsigned long tx_ctlerrs; /* Err of sending ctrl frames */
553 unsigned long tx_ctlpkts; /* Ctrl frames sent to dongle */
554 unsigned long rx_ctlerrs; /* Err of processing rx ctrl frames */
555 unsigned long rx_ctlpkts; /* Ctrl frames processed from dongle */
556 unsigned long rx_readahead_cnt; /* Number of packets where header
557 * read-ahead was used. */
561 bool ctrl_frame_stat;
564 wait_queue_head_t ctrl_wait;
565 wait_queue_head_t dcmd_resp_wait;
567 struct timer_list timer;
568 struct completion watchdog_wait;
569 struct task_struct *watchdog_tsk;
573 struct task_struct *dpc_tsk;
574 struct completion dpc_wait;
576 struct semaphore sdsem;
578 const struct firmware *firmware;
581 bool txoff; /* Transmit flow-controlled */
587 #define CLK_PENDING 2 /* Not used yet */
591 static int qcount[NUMPRIO];
592 static int tx_packets[NUMPRIO];
595 #define SDIO_DRIVE_STRENGTH 6 /* in milliamps */
597 #define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
599 /* Retry count for register access failures */
600 static const uint retry_limit = 2;
602 /* Limit on rounding up frames */
603 static const uint max_roundup = 512;
607 static void pkt_align(struct sk_buff *p, int len, int align)
610 datalign = (unsigned long)(p->data);
611 datalign = roundup(datalign, (align)) - datalign;
613 skb_pull(p, datalign);
617 /* To check if there's window offered */
618 static bool data_ok(struct brcmf_sdio *bus)
620 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
621 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
625 * Reads a register in the SDIO hardware block. This block occupies a series of
626 * adresses on the 32 bit backplane bus.
629 r_sdreg32(struct brcmf_sdio *bus, u32 *regvar, u32 reg_offset, u32 *retryvar)
631 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
634 *regvar = brcmf_sdcard_reg_read(bus->sdiodev,
635 bus->ci->c_inf[idx].base + reg_offset,
637 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
638 (++(*retryvar) <= retry_limit));
640 bus->regfails += (*retryvar-1);
641 if (*retryvar > retry_limit) {
642 brcmf_dbg(ERROR, "FAILED READ %Xh\n", reg_offset);
649 w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset, u32 *retryvar)
651 u8 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
654 brcmf_sdcard_reg_write(bus->sdiodev,
655 bus->ci->c_inf[idx].base + reg_offset,
656 sizeof(u32), regval);
657 } while (brcmf_sdcard_regfail(bus->sdiodev) &&
658 (++(*retryvar) <= retry_limit));
660 bus->regfails += (*retryvar-1);
661 if (*retryvar > retry_limit)
662 brcmf_dbg(ERROR, "FAILED REGISTER WRITE %Xh\n",
667 #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND)
669 #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
671 /* Packet free applicable unconditionally for sdio and sdspi.
672 * Conditional if bufpool was present for gspi bus.
674 static void brcmf_sdbrcm_pktfree2(struct brcmf_sdio *bus, struct sk_buff *pkt)
677 brcmu_pkt_buf_free_skb(pkt);
680 /* Turn backplane clock on or off */
681 static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
684 u8 clkctl, clkreq, devctl;
685 unsigned long timeout;
687 brcmf_dbg(TRACE, "Enter\n");
692 /* Request HT Avail */
694 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
696 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
697 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
699 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
703 /* Check current status */
704 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
705 SBSDIO_FUNC1_CHIPCLKCSR, &err);
707 brcmf_dbg(ERROR, "HT Avail read error: %d\n", err);
711 /* Go to pending and await interrupt if appropriate */
712 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
713 /* Allow only clock-available interrupt */
714 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
716 SBSDIO_DEVICE_CTL, &err);
718 brcmf_dbg(ERROR, "Devctl error setting CA: %d\n",
723 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
724 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
725 SBSDIO_DEVICE_CTL, devctl, &err);
726 brcmf_dbg(INFO, "CLKCTL: set PENDING\n");
727 bus->clkstate = CLK_PENDING;
730 } else if (bus->clkstate == CLK_PENDING) {
731 /* Cancel CA-only interrupt filter */
733 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
734 SBSDIO_DEVICE_CTL, &err);
735 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
736 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
737 SBSDIO_DEVICE_CTL, devctl, &err);
740 /* Otherwise, wait here (polling) for HT Avail */
742 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
743 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
744 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev,
746 SBSDIO_FUNC1_CHIPCLKCSR,
748 if (time_after(jiffies, timeout))
751 usleep_range(5000, 10000);
754 brcmf_dbg(ERROR, "HT Avail request error: %d\n", err);
757 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
758 brcmf_dbg(ERROR, "HT Avail timeout (%d): clkctl 0x%02x\n",
759 PMU_MAX_TRANSITION_DLY, clkctl);
763 /* Mark clock available */
764 bus->clkstate = CLK_AVAIL;
765 brcmf_dbg(INFO, "CLKCTL: turned ON\n");
768 if (bus->alp_only != true) {
769 if (SBSDIO_ALPONLY(clkctl))
770 brcmf_dbg(ERROR, "HT Clock should be on\n");
772 #endif /* defined (DEBUG) */
774 bus->activity = true;
778 if (bus->clkstate == CLK_PENDING) {
779 /* Cancel CA-only interrupt filter */
780 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
782 SBSDIO_DEVICE_CTL, &err);
783 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
784 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
785 SBSDIO_DEVICE_CTL, devctl, &err);
788 bus->clkstate = CLK_SDONLY;
789 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
790 SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err);
791 brcmf_dbg(INFO, "CLKCTL: turned OFF\n");
793 brcmf_dbg(ERROR, "Failed access turning clock off: %d\n",
801 /* Change idle/active SD state */
802 static int brcmf_sdbrcm_sdclk(struct brcmf_sdio *bus, bool on)
804 brcmf_dbg(TRACE, "Enter\n");
807 bus->clkstate = CLK_SDONLY;
809 bus->clkstate = CLK_NONE;
814 /* Transition SD and backplane clock readiness */
815 static int brcmf_sdbrcm_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
818 uint oldstate = bus->clkstate;
821 brcmf_dbg(TRACE, "Enter\n");
823 /* Early exit if we're already there */
824 if (bus->clkstate == target) {
825 if (target == CLK_AVAIL) {
826 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
827 bus->activity = true;
834 /* Make sure SD clock is available */
835 if (bus->clkstate == CLK_NONE)
836 brcmf_sdbrcm_sdclk(bus, true);
837 /* Now request HT Avail on the backplane */
838 brcmf_sdbrcm_htclk(bus, true, pendok);
839 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
840 bus->activity = true;
844 /* Remove HT request, or bring up SD clock */
845 if (bus->clkstate == CLK_NONE)
846 brcmf_sdbrcm_sdclk(bus, true);
847 else if (bus->clkstate == CLK_AVAIL)
848 brcmf_sdbrcm_htclk(bus, false, false);
850 brcmf_dbg(ERROR, "request for %d -> %d\n",
851 bus->clkstate, target);
852 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
856 /* Make sure to remove HT request */
857 if (bus->clkstate == CLK_AVAIL)
858 brcmf_sdbrcm_htclk(bus, false, false);
859 /* Now remove the SD clock */
860 brcmf_sdbrcm_sdclk(bus, false);
861 brcmf_sdbrcm_wd_timer(bus, 0);
865 brcmf_dbg(INFO, "%d -> %d\n", oldstate, bus->clkstate);
871 static int brcmf_sdbrcm_bussleep(struct brcmf_sdio *bus, bool sleep)
875 brcmf_dbg(INFO, "request %s (currently %s)\n",
876 sleep ? "SLEEP" : "WAKE",
877 bus->sleeping ? "SLEEP" : "WAKE");
879 /* Done if we're already in the requested state */
880 if (sleep == bus->sleeping)
883 /* Going to sleep: set the alarm and turn off the lights... */
885 /* Don't sleep if something is pending */
886 if (bus->dpc_sched || bus->rxskip || pktq_len(&bus->txq))
889 /* Make sure the controller has the bus up */
890 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
892 /* Tell device to start using OOB wakeup */
893 w_sdreg32(bus, SMB_USE_OOB,
894 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
895 if (retries > retry_limit)
896 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n");
898 /* Turn off our contribution to the HT clock request */
899 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
901 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
902 SBSDIO_FUNC1_CHIPCLKCSR,
903 SBSDIO_FORCE_HW_CLKREQ_OFF, NULL);
905 /* Isolate the bus */
906 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
908 SBSDIO_DEVCTL_PADS_ISO, NULL);
911 bus->sleeping = true;
914 /* Waking up: bus power up is ok, set local state */
916 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
917 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
919 /* Make sure the controller has the bus up */
920 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
922 /* Send misc interrupt to indicate OOB not needed */
923 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata),
925 if (retries <= retry_limit)
926 w_sdreg32(bus, SMB_DEV_INT,
927 offsetof(struct sdpcmd_regs, tosbmailbox),
930 if (retries > retry_limit)
931 brcmf_dbg(ERROR, "CANNOT SIGNAL CHIP TO CLEAR OOB!!\n");
933 /* Make sure we have SD bus access */
934 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
937 bus->sleeping = false;
943 static void bus_wake(struct brcmf_sdio *bus)
946 brcmf_sdbrcm_bussleep(bus, false);
949 static u32 brcmf_sdbrcm_hostmail(struct brcmf_sdio *bus)
956 brcmf_dbg(TRACE, "Enter\n");
958 /* Read mailbox data and ack that we did so */
959 r_sdreg32(bus, &hmb_data,
960 offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries);
962 if (retries <= retry_limit)
963 w_sdreg32(bus, SMB_INT_ACK,
964 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
967 /* Dongle recomposed rx frames, accept them again */
968 if (hmb_data & HMB_DATA_NAKHANDLED) {
969 brcmf_dbg(INFO, "Dongle reports NAK handled, expect rtx of %d\n",
972 brcmf_dbg(ERROR, "unexpected NAKHANDLED!\n");
975 intstatus |= I_HMB_FRAME_IND;
979 * DEVREADY does not occur with gSPI.
981 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
983 (hmb_data & HMB_DATA_VERSION_MASK) >>
984 HMB_DATA_VERSION_SHIFT;
985 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
986 brcmf_dbg(ERROR, "Version mismatch, dongle reports %d, "
988 bus->sdpcm_ver, SDPCM_PROT_VERSION);
990 brcmf_dbg(INFO, "Dongle ready, protocol version %d\n",
995 * Flow Control has been moved into the RX headers and this out of band
996 * method isn't used any more.
997 * remaining backward compatible with older dongles.
999 if (hmb_data & HMB_DATA_FC) {
1000 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1001 HMB_DATA_FCDATA_SHIFT;
1003 if (fcbits & ~bus->flowcontrol)
1006 if (bus->flowcontrol & ~fcbits)
1010 bus->flowcontrol = fcbits;
1013 /* Shouldn't be any others */
1014 if (hmb_data & ~(HMB_DATA_DEVREADY |
1015 HMB_DATA_NAKHANDLED |
1018 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1019 brcmf_dbg(ERROR, "Unknown mailbox data content: 0x%02x\n",
1025 static void brcmf_sdbrcm_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1032 brcmf_dbg(ERROR, "%sterminate frame%s\n",
1033 abort ? "abort command, " : "",
1034 rtx ? ", send NAK" : "");
1037 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
1039 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
1040 SBSDIO_FUNC1_FRAMECTRL,
1044 /* Wait until the packet has been flushed (device/FIFO stable) */
1045 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1046 hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1047 SBSDIO_FUNC1_RFRAMEBCHI, NULL);
1048 lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
1049 SBSDIO_FUNC1_RFRAMEBCLO, NULL);
1050 bus->f1regdata += 2;
1052 if ((hi == 0) && (lo == 0))
1055 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1056 brcmf_dbg(ERROR, "count growing: last 0x%04x now 0x%04x\n",
1057 lastrbc, (hi << 8) + lo);
1059 lastrbc = (hi << 8) + lo;
1063 brcmf_dbg(ERROR, "count never zeroed: last 0x%04x\n", lastrbc);
1065 brcmf_dbg(INFO, "flush took %d iterations\n", 0xffff - retries);
1069 w_sdreg32(bus, SMB_NAK,
1070 offsetof(struct sdpcmd_regs, tosbmailbox), &retries);
1073 if (retries <= retry_limit)
1077 /* Clear partial in any case */
1080 /* If we can't reach the device, signal failure */
1081 if (err || brcmf_sdcard_regfail(bus->sdiodev))
1082 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
1085 /* copy a buffer into a pkt buffer chain */
1086 static uint brcmf_sdbrcm_glom_from_buf(struct brcmf_sdio *bus, uint len)
1095 skb_queue_walk(&bus->glom, p) {
1096 n = min_t(uint, p->len, len);
1097 memcpy(p->data, buf, n);
1108 /* return total length of buffer chain */
1109 static uint brcmf_sdbrcm_glom_len(struct brcmf_sdio *bus)
1115 skb_queue_walk(&bus->glom, p)
1120 static void brcmf_sdbrcm_free_glom(struct brcmf_sdio *bus)
1122 struct sk_buff *cur, *next;
1124 skb_queue_walk_safe(&bus->glom, cur, next) {
1125 skb_unlink(cur, &bus->glom);
1126 brcmu_pkt_buf_free_skb(cur);
1130 static u8 brcmf_sdbrcm_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1136 struct sk_buff *pfirst, *pnext;
1139 u8 chan, seq, doff, sfdoff;
1143 bool usechain = bus->use_rxchain;
1145 /* If packets, issue read(s) and send up packet chain */
1146 /* Return sequence numbers consumed? */
1148 brcmf_dbg(TRACE, "start: glomd %p glom %p\n",
1149 bus->glomd, skb_peek(&bus->glom));
1151 /* If there's a descriptor, generate the packet chain */
1153 pfirst = pnext = NULL;
1154 dlen = (u16) (bus->glomd->len);
1155 dptr = bus->glomd->data;
1156 if (!dlen || (dlen & 1)) {
1157 brcmf_dbg(ERROR, "bad glomd len(%d), ignore descriptor\n",
1162 for (totlen = num = 0; dlen; num++) {
1163 /* Get (and move past) next length */
1164 sublen = get_unaligned_le16(dptr);
1165 dlen -= sizeof(u16);
1166 dptr += sizeof(u16);
1167 if ((sublen < SDPCM_HDRLEN) ||
1168 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1169 brcmf_dbg(ERROR, "descriptor len %d bad: %d\n",
1174 if (sublen % BRCMF_SDALIGN) {
1175 brcmf_dbg(ERROR, "sublen %d not multiple of %d\n",
1176 sublen, BRCMF_SDALIGN);
1181 /* For last frame, adjust read len so total
1182 is a block multiple */
1185 (roundup(totlen, bus->blocksize) - totlen);
1186 totlen = roundup(totlen, bus->blocksize);
1189 /* Allocate/chain packet for next subframe */
1190 pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN);
1191 if (pnext == NULL) {
1192 brcmf_dbg(ERROR, "bcm_pkt_buf_get_skb failed, num %d len %d\n",
1196 skb_queue_tail(&bus->glom, pnext);
1198 /* Adhere to start alignment requirements */
1199 pkt_align(pnext, sublen, BRCMF_SDALIGN);
1202 /* If all allocations succeeded, save packet chain
1205 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1207 if (BRCMF_GLOM_ON() && bus->nextlen &&
1208 totlen != bus->nextlen) {
1209 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1210 bus->nextlen, totlen, rxseq);
1212 pfirst = pnext = NULL;
1214 brcmf_sdbrcm_free_glom(bus);
1218 /* Done with descriptor packet */
1219 brcmu_pkt_buf_free_skb(bus->glomd);
1224 /* Ok -- either we just generated a packet chain,
1225 or had one from before */
1226 if (!skb_queue_empty(&bus->glom)) {
1227 if (BRCMF_GLOM_ON()) {
1228 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1229 skb_queue_walk(&bus->glom, pnext) {
1230 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1231 pnext, (u8 *) (pnext->data),
1232 pnext->len, pnext->len);
1236 pfirst = skb_peek(&bus->glom);
1237 dlen = (u16) brcmf_sdbrcm_glom_len(bus);
1239 /* Do an SDIO read for the superframe. Configurable iovar to
1240 * read directly into the chained packet, or allocate a large
1241 * packet and and copy into the chain.
1244 errcode = brcmf_sdcard_recv_chain(bus->sdiodev,
1245 bus->sdiodev->sbwad,
1246 SDIO_FUNC_2, F2SYNC, &bus->glom);
1247 } else if (bus->dataptr) {
1248 errcode = brcmf_sdcard_recv_buf(bus->sdiodev,
1249 bus->sdiodev->sbwad,
1250 SDIO_FUNC_2, F2SYNC,
1251 bus->dataptr, dlen);
1252 sublen = (u16) brcmf_sdbrcm_glom_from_buf(bus, dlen);
1253 if (sublen != dlen) {
1254 brcmf_dbg(ERROR, "FAILED TO COPY, dlen %d sublen %d\n",
1260 brcmf_dbg(ERROR, "COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n",
1266 /* On failure, kill the superframe, allow a couple retries */
1268 brcmf_dbg(ERROR, "glom read of %d bytes failed: %d\n",
1270 bus->sdiodev->bus_if->dstats.rx_errors++;
1272 if (bus->glomerr++ < 3) {
1273 brcmf_sdbrcm_rxfail(bus, true, true);
1276 brcmf_sdbrcm_rxfail(bus, true, false);
1278 brcmf_sdbrcm_free_glom(bus);
1283 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1284 pfirst->data, min_t(int, pfirst->len, 48),
1287 /* Validate the superframe header */
1288 dptr = (u8 *) (pfirst->data);
1289 sublen = get_unaligned_le16(dptr);
1290 check = get_unaligned_le16(dptr + sizeof(u16));
1292 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1293 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1294 bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1295 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1296 brcmf_dbg(INFO, "nextlen too large (%d) seq %d\n",
1300 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1301 txmax = SDPCM_WINDOW_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1304 if ((u16)~(sublen ^ check)) {
1305 brcmf_dbg(ERROR, "(superframe): HW hdr error: len/check 0x%04x/0x%04x\n",
1308 } else if (roundup(sublen, bus->blocksize) != dlen) {
1309 brcmf_dbg(ERROR, "(superframe): len 0x%04x, rounded 0x%04x, expect 0x%04x\n",
1310 sublen, roundup(sublen, bus->blocksize),
1313 } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) !=
1314 SDPCM_GLOM_CHANNEL) {
1315 brcmf_dbg(ERROR, "(superframe): bad channel %d\n",
1316 SDPCM_PACKET_CHANNEL(
1317 &dptr[SDPCM_FRAMETAG_LEN]));
1319 } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) {
1320 brcmf_dbg(ERROR, "(superframe): got 2nd descriptor?\n");
1322 } else if ((doff < SDPCM_HDRLEN) ||
1323 (doff > (pfirst->len - SDPCM_HDRLEN))) {
1324 brcmf_dbg(ERROR, "(superframe): Bad data offset %d: HW %d pkt %d min %d\n",
1325 doff, sublen, pfirst->len, SDPCM_HDRLEN);
1329 /* Check sequence number of superframe SW header */
1331 brcmf_dbg(INFO, "(superframe) rx_seq %d, expected %d\n",
1337 /* Check window for sanity */
1338 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1339 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1340 txmax, bus->tx_seq);
1341 txmax = bus->tx_seq + 2;
1343 bus->tx_max = txmax;
1345 /* Remove superframe header, remember offset */
1346 skb_pull(pfirst, doff);
1350 /* Validate all the subframe headers */
1351 skb_queue_walk(&bus->glom, pnext) {
1352 /* leave when invalid subframe is found */
1356 dptr = (u8 *) (pnext->data);
1357 dlen = (u16) (pnext->len);
1358 sublen = get_unaligned_le16(dptr);
1359 check = get_unaligned_le16(dptr + sizeof(u16));
1360 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1361 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1362 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1363 dptr, 32, "subframe:\n");
1365 if ((u16)~(sublen ^ check)) {
1366 brcmf_dbg(ERROR, "(subframe %d): HW hdr error: len/check 0x%04x/0x%04x\n",
1367 num, sublen, check);
1369 } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) {
1370 brcmf_dbg(ERROR, "(subframe %d): length mismatch: len 0x%04x, expect 0x%04x\n",
1373 } else if ((chan != SDPCM_DATA_CHANNEL) &&
1374 (chan != SDPCM_EVENT_CHANNEL)) {
1375 brcmf_dbg(ERROR, "(subframe %d): bad channel %d\n",
1378 } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) {
1379 brcmf_dbg(ERROR, "(subframe %d): Bad data offset %d: HW %d min %d\n",
1380 num, doff, sublen, SDPCM_HDRLEN);
1383 /* increase the subframe count */
1388 /* Terminate frame on error, request
1390 if (bus->glomerr++ < 3) {
1391 /* Restore superframe header space */
1392 skb_push(pfirst, sfdoff);
1393 brcmf_sdbrcm_rxfail(bus, true, true);
1396 brcmf_sdbrcm_rxfail(bus, true, false);
1398 brcmf_sdbrcm_free_glom(bus);
1404 /* Basic SD framing looks ok - process each packet (header) */
1406 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1407 dptr = (u8 *) (pfirst->data);
1408 sublen = get_unaligned_le16(dptr);
1409 chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]);
1410 seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]);
1411 doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]);
1413 brcmf_dbg(GLOM, "Get subframe %d, %p(%p/%d), sublen %d chan %d seq %d\n",
1414 num, pfirst, pfirst->data,
1415 pfirst->len, sublen, chan, seq);
1417 /* precondition: chan == SDPCM_DATA_CHANNEL ||
1418 chan == SDPCM_EVENT_CHANNEL */
1421 brcmf_dbg(GLOM, "rx_seq %d, expected %d\n",
1428 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1429 dptr, dlen, "Rx Subframe Data:\n");
1431 __skb_trim(pfirst, sublen);
1432 skb_pull(pfirst, doff);
1434 if (pfirst->len == 0) {
1435 skb_unlink(pfirst, &bus->glom);
1436 brcmu_pkt_buf_free_skb(pfirst);
1438 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev,
1439 &ifidx, pfirst) != 0) {
1440 brcmf_dbg(ERROR, "rx protocol error\n");
1441 bus->sdiodev->bus_if->dstats.rx_errors++;
1442 skb_unlink(pfirst, &bus->glom);
1443 brcmu_pkt_buf_free_skb(pfirst);
1447 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1449 min_t(int, pfirst->len, 32),
1450 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1451 bus->glom.qlen, pfirst, pfirst->data,
1452 pfirst->len, pfirst->next,
1455 /* sent any remaining packets up */
1456 if (bus->glom.qlen) {
1458 brcmf_rx_frame(bus->sdiodev->dev, ifidx, &bus->glom);
1462 bus->rxglomframes++;
1463 bus->rxglompkts += bus->glom.qlen;
1468 static int brcmf_sdbrcm_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1471 DECLARE_WAITQUEUE(wait, current);
1472 int timeout = msecs_to_jiffies(DCMD_RESP_TIMEOUT);
1474 /* Wait until control frame is available */
1475 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1476 set_current_state(TASK_INTERRUPTIBLE);
1478 while (!(*condition) && (!signal_pending(current) && timeout))
1479 timeout = schedule_timeout(timeout);
1481 if (signal_pending(current))
1484 set_current_state(TASK_RUNNING);
1485 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1490 static int brcmf_sdbrcm_dcmd_resp_wake(struct brcmf_sdio *bus)
1492 if (waitqueue_active(&bus->dcmd_resp_wait))
1493 wake_up_interruptible(&bus->dcmd_resp_wait);
1498 brcmf_sdbrcm_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1504 brcmf_dbg(TRACE, "Enter\n");
1506 /* Set rxctl for frame (w/optional alignment) */
1507 bus->rxctl = bus->rxbuf;
1508 bus->rxctl += BRCMF_FIRSTREAD;
1509 pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN);
1511 bus->rxctl += (BRCMF_SDALIGN - pad);
1512 bus->rxctl -= BRCMF_FIRSTREAD;
1514 /* Copy the already-read portion over */
1515 memcpy(bus->rxctl, hdr, BRCMF_FIRSTREAD);
1516 if (len <= BRCMF_FIRSTREAD)
1519 /* Raise rdlen to next SDIO block to avoid tail command */
1520 rdlen = len - BRCMF_FIRSTREAD;
1521 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1522 pad = bus->blocksize - (rdlen % bus->blocksize);
1523 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1524 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1526 } else if (rdlen % BRCMF_SDALIGN) {
1527 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1530 /* Satisfy length-alignment requirements */
1531 if (rdlen & (ALIGNMENT - 1))
1532 rdlen = roundup(rdlen, ALIGNMENT);
1534 /* Drop if the read is too big or it exceeds our maximum */
1535 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1536 brcmf_dbg(ERROR, "%d-byte control read exceeds %d-byte buffer\n",
1537 rdlen, bus->sdiodev->bus_if->maxctl);
1538 bus->sdiodev->bus_if->dstats.rx_errors++;
1539 brcmf_sdbrcm_rxfail(bus, false, false);
1543 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1544 brcmf_dbg(ERROR, "%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1545 len, len - doff, bus->sdiodev->bus_if->maxctl);
1546 bus->sdiodev->bus_if->dstats.rx_errors++;
1548 brcmf_sdbrcm_rxfail(bus, false, false);
1552 /* Read remainder of frame body into the rxctl buffer */
1553 sdret = brcmf_sdcard_recv_buf(bus->sdiodev,
1554 bus->sdiodev->sbwad,
1556 F2SYNC, (bus->rxctl + BRCMF_FIRSTREAD), rdlen);
1559 /* Control frame failures need retransmission */
1561 brcmf_dbg(ERROR, "read %d control bytes failed: %d\n",
1564 brcmf_sdbrcm_rxfail(bus, true, true);
1570 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1571 bus->rxctl, len, "RxCtrl:\n");
1573 /* Point to valid data and indicate its length */
1575 bus->rxlen = len - doff;
1578 /* Awake any waiters */
1579 brcmf_sdbrcm_dcmd_resp_wake(bus);
1582 /* Pad read to blocksize for efficiency */
1583 static void brcmf_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1585 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1586 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1587 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1588 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1590 } else if (*rdlen % BRCMF_SDALIGN) {
1591 *rdlen += BRCMF_SDALIGN - (*rdlen % BRCMF_SDALIGN);
1596 brcmf_alloc_pkt_and_read(struct brcmf_sdio *bus, u16 rdlen,
1597 struct sk_buff **pkt, u8 **rxbuf)
1599 int sdret; /* Return code from calls */
1601 *pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN);
1605 pkt_align(*pkt, rdlen, BRCMF_SDALIGN);
1606 *rxbuf = (u8 *) ((*pkt)->data);
1607 /* Read the entire frame */
1608 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1609 SDIO_FUNC_2, F2SYNC, *pkt);
1613 brcmf_dbg(ERROR, "(nextlen): read %d bytes failed: %d\n",
1615 brcmu_pkt_buf_free_skb(*pkt);
1616 bus->sdiodev->bus_if->dstats.rx_errors++;
1617 /* Force retry w/normal header read.
1618 * Don't attempt NAK for
1621 brcmf_sdbrcm_rxfail(bus, true, true);
1626 /* Checks the header */
1628 brcmf_check_rxbuf(struct brcmf_sdio *bus, struct sk_buff *pkt, u8 *rxbuf,
1629 u8 rxseq, u16 nextlen, u16 *len)
1632 bool len_consistent; /* Result of comparing readahead len and
1635 memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN);
1637 /* Extract hardware header fields */
1638 *len = get_unaligned_le16(bus->rxhdr);
1639 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1641 /* All zeros means readahead info was bad */
1642 if (!(*len | check)) {
1643 brcmf_dbg(INFO, "(nextlen): read zeros in HW header???\n");
1647 /* Validate check bytes */
1648 if ((u16)~(*len ^ check)) {
1649 brcmf_dbg(ERROR, "(nextlen): HW hdr error: nextlen/len/check 0x%04x/0x%04x/0x%04x\n",
1650 nextlen, *len, check);
1652 brcmf_sdbrcm_rxfail(bus, false, false);
1656 /* Validate frame length */
1657 if (*len < SDPCM_HDRLEN) {
1658 brcmf_dbg(ERROR, "(nextlen): HW hdr length invalid: %d\n",
1663 /* Check for consistency with readahead info */
1664 len_consistent = (nextlen != (roundup(*len, 16) >> 4));
1665 if (len_consistent) {
1666 /* Mismatch, force retry w/normal
1667 header (may be >4K) */
1668 brcmf_dbg(ERROR, "(nextlen): mismatch, nextlen %d len %d rnd %d; expected rxseq %d\n",
1669 nextlen, *len, roundup(*len, 16),
1671 brcmf_sdbrcm_rxfail(bus, true, true);
1678 brcmf_sdbrcm_pktfree2(bus, pkt);
1682 /* Return true if there may be more frames to read */
1684 brcmf_sdbrcm_readframes(struct brcmf_sdio *bus, uint maxframes, bool *finished)
1686 u16 len, check; /* Extracted hardware header fields */
1687 u8 chan, seq, doff; /* Extracted software header fields */
1688 u8 fcbits; /* Extracted fcbits from software header */
1690 struct sk_buff *pkt; /* Packet for event or data frames */
1691 u16 pad; /* Number of pad bytes to read */
1692 u16 rdlen; /* Total number of bytes to read */
1693 u8 rxseq; /* Next sequence number to expect */
1694 uint rxleft = 0; /* Remaining number of frames allowed */
1695 int sdret; /* Return code from calls */
1696 u8 txmax; /* Maximum tx sequence offered */
1699 uint rxcount = 0; /* Total frames read */
1701 brcmf_dbg(TRACE, "Enter\n");
1703 /* Not finished unless we encounter no more frames indication */
1706 for (rxseq = bus->rx_seq, rxleft = maxframes;
1707 !bus->rxskip && rxleft &&
1708 bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN;
1709 rxseq++, rxleft--) {
1711 /* Handle glomming separately */
1712 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1714 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1715 bus->glomd, skb_peek(&bus->glom));
1716 cnt = brcmf_sdbrcm_rxglom(bus, rxseq);
1717 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1719 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1723 /* Try doing single read if we can */
1725 u16 nextlen = bus->nextlen;
1728 rdlen = len = nextlen << 4;
1729 brcmf_pad(bus, &pad, &rdlen);
1732 * After the frame is received we have to
1733 * distinguish whether it is data
1734 * or non-data frame.
1736 brcmf_alloc_pkt_and_read(bus, rdlen, &pkt, &rxbuf);
1738 /* Give up on data, request rtx of events */
1739 brcmf_dbg(ERROR, "(nextlen): brcmf_alloc_pkt_and_read failed: len %d rdlen %d expected rxseq %d\n",
1744 if (brcmf_check_rxbuf(bus, pkt, rxbuf, rxseq, nextlen,
1748 /* Extract software header fields */
1749 chan = SDPCM_PACKET_CHANNEL(
1750 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1751 seq = SDPCM_PACKET_SEQUENCE(
1752 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1753 doff = SDPCM_DOFFSET_VALUE(
1754 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1755 txmax = SDPCM_WINDOW_VALUE(
1756 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1759 bus->rxhdr[SDPCM_FRAMETAG_LEN +
1760 SDPCM_NEXTLEN_OFFSET];
1761 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1762 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1767 bus->rx_readahead_cnt++;
1769 /* Handle Flow Control */
1770 fcbits = SDPCM_FCMASK_VALUE(
1771 &bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1773 if (bus->flowcontrol != fcbits) {
1774 if (~bus->flowcontrol & fcbits)
1777 if (bus->flowcontrol & ~fcbits)
1781 bus->flowcontrol = fcbits;
1784 /* Check and update sequence number */
1786 brcmf_dbg(INFO, "(nextlen): rx_seq %d, expected %d\n",
1792 /* Check window for sanity */
1793 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1794 brcmf_dbg(ERROR, "got unlikely tx max %d with tx_seq %d\n",
1795 txmax, bus->tx_seq);
1796 txmax = bus->tx_seq + 2;
1798 bus->tx_max = txmax;
1800 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1801 rxbuf, len, "Rx Data:\n");
1802 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1805 bus->rxhdr, SDPCM_HDRLEN,
1808 if (chan == SDPCM_CONTROL_CHANNEL) {
1809 brcmf_dbg(ERROR, "(nextlen): readahead on control packet %d?\n",
1811 /* Force retry w/normal header read */
1813 brcmf_sdbrcm_rxfail(bus, false, true);
1814 brcmf_sdbrcm_pktfree2(bus, pkt);
1818 /* Validate data offset */
1819 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1820 brcmf_dbg(ERROR, "(nextlen): bad data offset %d: HW len %d min %d\n",
1821 doff, len, SDPCM_HDRLEN);
1822 brcmf_sdbrcm_rxfail(bus, false, false);
1823 brcmf_sdbrcm_pktfree2(bus, pkt);
1827 /* All done with this one -- now deliver the packet */
1831 /* Read frame header (hardware and software) */
1832 sdret = brcmf_sdcard_recv_buf(bus->sdiodev, bus->sdiodev->sbwad,
1833 SDIO_FUNC_2, F2SYNC, bus->rxhdr,
1838 brcmf_dbg(ERROR, "RXHEADER FAILED: %d\n", sdret);
1840 brcmf_sdbrcm_rxfail(bus, true, true);
1843 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1844 bus->rxhdr, SDPCM_HDRLEN, "RxHdr:\n");
1847 /* Extract hardware header fields */
1848 len = get_unaligned_le16(bus->rxhdr);
1849 check = get_unaligned_le16(bus->rxhdr + sizeof(u16));
1851 /* All zeros means no more frames */
1852 if (!(len | check)) {
1857 /* Validate check bytes */
1858 if ((u16) ~(len ^ check)) {
1859 brcmf_dbg(ERROR, "HW hdr err: len/check 0x%04x/0x%04x\n",
1862 brcmf_sdbrcm_rxfail(bus, false, false);
1866 /* Validate frame length */
1867 if (len < SDPCM_HDRLEN) {
1868 brcmf_dbg(ERROR, "HW hdr length invalid: %d\n", len);
1872 /* Extract software header fields */
1873 chan = SDPCM_PACKET_CHANNEL(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1874 seq = SDPCM_PACKET_SEQUENCE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1875 doff = SDPCM_DOFFSET_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1876 txmax = SDPCM_WINDOW_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1878 /* Validate data offset */
1879 if ((doff < SDPCM_HDRLEN) || (doff > len)) {
1880 brcmf_dbg(ERROR, "Bad data offset %d: HW len %d, min %d seq %d\n",
1881 doff, len, SDPCM_HDRLEN, seq);
1883 brcmf_sdbrcm_rxfail(bus, false, false);
1887 /* Save the readahead length if there is one */
1889 bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET];
1890 if ((bus->nextlen << 4) > MAX_RX_DATASZ) {
1891 brcmf_dbg(INFO, "(nextlen): got frame w/nextlen too large (%d), seq %d\n",
1896 /* Handle Flow Control */
1897 fcbits = SDPCM_FCMASK_VALUE(&bus->rxhdr[SDPCM_FRAMETAG_LEN]);
1899 if (bus->flowcontrol != fcbits) {
1900 if (~bus->flowcontrol & fcbits)
1903 if (bus->flowcontrol & ~fcbits)
1907 bus->flowcontrol = fcbits;
1910 /* Check and update sequence number */
1912 brcmf_dbg(INFO, "rx_seq %d, expected %d\n", seq, rxseq);
1917 /* Check window for sanity */
1918 if ((u8) (txmax - bus->tx_seq) > 0x40) {
1919 brcmf_dbg(ERROR, "unlikely tx max %d with tx_seq %d\n",
1920 txmax, bus->tx_seq);
1921 txmax = bus->tx_seq + 2;
1923 bus->tx_max = txmax;
1925 /* Call a separate function for control frames */
1926 if (chan == SDPCM_CONTROL_CHANNEL) {
1927 brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff);
1931 /* precondition: chan is either SDPCM_DATA_CHANNEL,
1932 SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or
1933 SDPCM_GLOM_CHANNEL */
1935 /* Length to read */
1936 rdlen = (len > BRCMF_FIRSTREAD) ? (len - BRCMF_FIRSTREAD) : 0;
1938 /* May pad read to blocksize for efficiency */
1939 if (bus->roundup && bus->blocksize &&
1940 (rdlen > bus->blocksize)) {
1941 pad = bus->blocksize - (rdlen % bus->blocksize);
1942 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1943 ((rdlen + pad + BRCMF_FIRSTREAD) < MAX_RX_DATASZ))
1945 } else if (rdlen % BRCMF_SDALIGN) {
1946 rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN);
1949 /* Satisfy length-alignment requirements */
1950 if (rdlen & (ALIGNMENT - 1))
1951 rdlen = roundup(rdlen, ALIGNMENT);
1953 if ((rdlen + BRCMF_FIRSTREAD) > MAX_RX_DATASZ) {
1954 /* Too long -- skip this frame */
1955 brcmf_dbg(ERROR, "too long: len %d rdlen %d\n",
1957 bus->sdiodev->bus_if->dstats.rx_errors++;
1959 brcmf_sdbrcm_rxfail(bus, false, false);
1963 pkt = brcmu_pkt_buf_get_skb(rdlen +
1964 BRCMF_FIRSTREAD + BRCMF_SDALIGN);
1966 /* Give up on data, request rtx of events */
1967 brcmf_dbg(ERROR, "brcmu_pkt_buf_get_skb failed: rdlen %d chan %d\n",
1969 bus->sdiodev->bus_if->dstats.rx_dropped++;
1970 brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan));
1974 /* Leave room for what we already read, and align remainder */
1975 skb_pull(pkt, BRCMF_FIRSTREAD);
1976 pkt_align(pkt, rdlen, BRCMF_SDALIGN);
1978 /* Read the remaining frame data */
1979 sdret = brcmf_sdcard_recv_pkt(bus->sdiodev, bus->sdiodev->sbwad,
1980 SDIO_FUNC_2, F2SYNC, pkt);
1984 brcmf_dbg(ERROR, "read %d %s bytes failed: %d\n", rdlen,
1985 ((chan == SDPCM_EVENT_CHANNEL) ? "event"
1986 : ((chan == SDPCM_DATA_CHANNEL) ? "data"
1988 brcmu_pkt_buf_free_skb(pkt);
1989 bus->sdiodev->bus_if->dstats.rx_errors++;
1990 brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan));
1994 /* Copy the already-read portion */
1995 skb_push(pkt, BRCMF_FIRSTREAD);
1996 memcpy(pkt->data, bus->rxhdr, BRCMF_FIRSTREAD);
1998 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1999 pkt->data, len, "Rx Data:\n");
2002 /* Save superframe descriptor and allocate packet frame */
2003 if (chan == SDPCM_GLOM_CHANNEL) {
2004 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) {
2005 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
2007 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
2010 __skb_trim(pkt, len);
2011 skb_pull(pkt, SDPCM_HDRLEN);
2014 brcmf_dbg(ERROR, "%s: glom superframe w/o "
2015 "descriptor!\n", __func__);
2016 brcmf_sdbrcm_rxfail(bus, false, false);
2021 /* Fill in packet len and prio, deliver upward */
2022 __skb_trim(pkt, len);
2023 skb_pull(pkt, doff);
2025 if (pkt->len == 0) {
2026 brcmu_pkt_buf_free_skb(pkt);
2028 } else if (brcmf_proto_hdrpull(bus->sdiodev->dev, &ifidx,
2030 brcmf_dbg(ERROR, "rx protocol error\n");
2031 brcmu_pkt_buf_free_skb(pkt);
2032 bus->sdiodev->bus_if->dstats.rx_errors++;
2036 /* Unlock during rx call */
2038 brcmf_rx_packet(bus->sdiodev->dev, ifidx, pkt);
2041 rxcount = maxframes - rxleft;
2042 /* Message if we hit the limit */
2044 brcmf_dbg(DATA, "hit rx limit of %d frames\n",
2047 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2048 /* Back off rxseq if awaiting rtx, update rx_seq */
2051 bus->rx_seq = rxseq;
2057 brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
2060 wait_event_interruptible_timeout(bus->ctrl_wait,
2061 (*lockvar == false), HZ * 2);
2067 brcmf_sdbrcm_wait_event_wakeup(struct brcmf_sdio *bus)
2069 if (waitqueue_active(&bus->ctrl_wait))
2070 wake_up_interruptible(&bus->ctrl_wait);
2074 /* Writes a HW/SW header into the packet and sends it. */
2075 /* Assumes: (a) header space already there, (b) caller holds lock */
2076 static int brcmf_sdbrcm_txpkt(struct brcmf_sdio *bus, struct sk_buff *pkt,
2077 uint chan, bool free_pkt)
2083 struct sk_buff *new;
2086 brcmf_dbg(TRACE, "Enter\n");
2088 frame = (u8 *) (pkt->data);
2090 /* Add alignment padding, allocate new packet if needed */
2091 pad = ((unsigned long)frame % BRCMF_SDALIGN);
2093 if (skb_headroom(pkt) < pad) {
2094 brcmf_dbg(INFO, "insufficient headroom %d for %d pad\n",
2095 skb_headroom(pkt), pad);
2096 bus->sdiodev->bus_if->tx_realloc++;
2097 new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN);
2099 brcmf_dbg(ERROR, "couldn't allocate new %d-byte packet\n",
2100 pkt->len + BRCMF_SDALIGN);
2105 pkt_align(new, pkt->len, BRCMF_SDALIGN);
2106 memcpy(new->data, pkt->data, pkt->len);
2108 brcmu_pkt_buf_free_skb(pkt);
2109 /* free the pkt if canned one is not used */
2112 frame = (u8 *) (pkt->data);
2113 /* precondition: (frame % BRCMF_SDALIGN) == 0) */
2117 frame = (u8 *) (pkt->data);
2118 /* precondition: pad + SDPCM_HDRLEN <= pkt->len */
2119 memset(frame, 0, pad + SDPCM_HDRLEN);
2122 /* precondition: pad < BRCMF_SDALIGN */
2124 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2125 len = (u16) (pkt->len);
2126 *(__le16 *) frame = cpu_to_le16(len);
2127 *(((__le16 *) frame) + 1) = cpu_to_le16(~len);
2129 /* Software tag: channel, sequence number, data offset */
2131 ((chan << SDPCM_CHANNEL_SHIFT) & SDPCM_CHANNEL_MASK) | bus->tx_seq |
2133 SDPCM_HDRLEN) << SDPCM_DOFFSET_SHIFT) & SDPCM_DOFFSET_MASK);
2135 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2136 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2139 tx_packets[pkt->priority]++;
2142 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() &&
2143 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2144 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)),
2145 frame, len, "Tx Frame:\n");
2146 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
2148 chan == SDPCM_CONTROL_CHANNEL) ||
2150 chan != SDPCM_CONTROL_CHANNEL))) &&
2152 frame, min_t(u16, len, 16), "TxHdr:\n");
2154 /* Raise len to next SDIO block to eliminate tail command */
2155 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2156 u16 pad = bus->blocksize - (len % bus->blocksize);
2157 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2159 } else if (len % BRCMF_SDALIGN) {
2160 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2163 /* Some controllers have trouble with odd bytes -- round to even */
2164 if (len & (ALIGNMENT - 1))
2165 len = roundup(len, ALIGNMENT);
2167 ret = brcmf_sdcard_send_pkt(bus->sdiodev, bus->sdiodev->sbwad,
2168 SDIO_FUNC_2, F2SYNC, pkt);
2172 /* On failure, abort the command and terminate the frame */
2173 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2177 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2178 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2179 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2183 for (i = 0; i < 3; i++) {
2185 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
2187 SBSDIO_FUNC1_WFRAMEBCHI,
2189 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
2191 SBSDIO_FUNC1_WFRAMEBCLO,
2193 bus->f1regdata += 2;
2194 if ((hi == 0) && (lo == 0))
2200 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2203 /* restore pkt buffer pointer before calling tx complete routine */
2204 skb_pull(pkt, SDPCM_HDRLEN + pad);
2206 brcmf_txcomplete(bus->sdiodev->dev, pkt, ret != 0);
2210 brcmu_pkt_buf_free_skb(pkt);
2215 static uint brcmf_sdbrcm_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2217 struct sk_buff *pkt;
2220 int ret = 0, prec_out;
2225 brcmf_dbg(TRACE, "Enter\n");
2227 tx_prec_map = ~bus->flowcontrol;
2229 /* Send frames until the limit or some other event */
2230 for (cnt = 0; (cnt < maxframes) && data_ok(bus); cnt++) {
2231 spin_lock_bh(&bus->txqlock);
2232 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out);
2234 spin_unlock_bh(&bus->txqlock);
2237 spin_unlock_bh(&bus->txqlock);
2238 datalen = pkt->len - SDPCM_HDRLEN;
2240 ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true);
2242 bus->sdiodev->bus_if->dstats.tx_errors++;
2244 bus->sdiodev->bus_if->dstats.tx_bytes += datalen;
2246 /* In poll mode, need to check for other events */
2247 if (!bus->intr && cnt) {
2248 /* Check device status, signal pending interrupt */
2249 r_sdreg32(bus, &intstatus,
2250 offsetof(struct sdpcmd_regs, intstatus),
2253 if (brcmf_sdcard_regfail(bus->sdiodev))
2255 if (intstatus & bus->hostintmask)
2260 /* Deflow-control stack if needed */
2261 if (bus->sdiodev->bus_if->drvr_up &&
2262 (bus->sdiodev->bus_if->state == BRCMF_BUS_DATA) &&
2263 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2265 brcmf_txflowcontrol(bus->sdiodev->dev, 0, OFF);
2271 static void brcmf_sdbrcm_bus_stop(struct device *dev)
2273 u32 local_hostintmask;
2277 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2278 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
2279 struct brcmf_sdio *bus = sdiodev->bus;
2281 brcmf_dbg(TRACE, "Enter\n");
2283 if (bus->watchdog_tsk) {
2284 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2285 kthread_stop(bus->watchdog_tsk);
2286 bus->watchdog_tsk = NULL;
2289 if (bus->dpc_tsk && bus->dpc_tsk != current) {
2290 send_sig(SIGTERM, bus->dpc_tsk, 1);
2291 kthread_stop(bus->dpc_tsk);
2292 bus->dpc_tsk = NULL;
2299 /* Enable clock for device interrupts */
2300 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2302 /* Disable and clear interrupts at the chip level also */
2303 w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries);
2304 local_hostintmask = bus->hostintmask;
2305 bus->hostintmask = 0;
2307 /* Change our idea of bus state */
2308 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2310 /* Force clocks on backplane to be sure F2 interrupt propagates */
2311 saveclk = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2312 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2314 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2315 SBSDIO_FUNC1_CHIPCLKCSR,
2316 (saveclk | SBSDIO_FORCE_HT), &err);
2319 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
2321 /* Turn off the bus (F2), free any pending packets */
2322 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2323 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
2324 SDIO_FUNC_ENABLE_1, NULL);
2326 /* Clear any pending interrupts now that F2 is disabled */
2327 w_sdreg32(bus, local_hostintmask,
2328 offsetof(struct sdpcmd_regs, intstatus), &retries);
2330 /* Turn off the backplane clock (only) */
2331 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
2333 /* Clear the data packet queues */
2334 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2336 /* Clear any held glomming stuff */
2338 brcmu_pkt_buf_free_skb(bus->glomd);
2339 brcmf_sdbrcm_free_glom(bus);
2341 /* Clear rx control and wake any waiters */
2343 brcmf_sdbrcm_dcmd_resp_wake(bus);
2345 /* Reset some F2 state stuff */
2346 bus->rxskip = false;
2347 bus->tx_seq = bus->rx_seq = 0;
2352 static bool brcmf_sdbrcm_dpc(struct brcmf_sdio *bus)
2354 u32 intstatus, newstatus = 0;
2356 uint rxlimit = bus->rxbound; /* Rx frames to read before resched */
2357 uint txlimit = bus->txbound; /* Tx frames to send before resched */
2358 uint framecnt = 0; /* Temporary counter of tx/rx frames */
2359 bool rxdone = true; /* Flag for no more read data */
2360 bool resched = false; /* Flag indicating resched wanted */
2362 brcmf_dbg(TRACE, "Enter\n");
2364 /* Start with leftover status bits */
2365 intstatus = bus->intstatus;
2369 /* If waiting for HTAVAIL, check status */
2370 if (bus->clkstate == CLK_PENDING) {
2372 u8 clkctl, devctl = 0;
2375 /* Check for inconsistent device control */
2376 devctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2377 SBSDIO_DEVICE_CTL, &err);
2379 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n", err);
2380 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2384 /* Read CSR, if clock on switch to AVAIL, else ignore */
2385 clkctl = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2386 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2388 brcmf_dbg(ERROR, "error reading CSR: %d\n",
2390 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2393 brcmf_dbg(INFO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2396 if (SBSDIO_HTAV(clkctl)) {
2397 devctl = brcmf_sdcard_cfg_read(bus->sdiodev,
2399 SBSDIO_DEVICE_CTL, &err);
2401 brcmf_dbg(ERROR, "error reading DEVCTL: %d\n",
2403 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2405 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2406 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2407 SBSDIO_DEVICE_CTL, devctl, &err);
2409 brcmf_dbg(ERROR, "error writing DEVCTL: %d\n",
2411 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2413 bus->clkstate = CLK_AVAIL;
2421 /* Make sure backplane clock is on */
2422 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true);
2423 if (bus->clkstate == CLK_PENDING)
2426 /* Pending interrupt indicates new device status */
2429 r_sdreg32(bus, &newstatus,
2430 offsetof(struct sdpcmd_regs, intstatus), &retries);
2432 if (brcmf_sdcard_regfail(bus->sdiodev))
2434 newstatus &= bus->hostintmask;
2435 bus->fcstate = !!(newstatus & I_HMB_FC_STATE);
2437 w_sdreg32(bus, newstatus,
2438 offsetof(struct sdpcmd_regs, intstatus),
2444 /* Merge new bits with previous */
2445 intstatus |= newstatus;
2448 /* Handle flow-control change: read new state in case our ack
2449 * crossed another change interrupt. If change still set, assume
2450 * FC ON for safety, let next loop through do the debounce.
2452 if (intstatus & I_HMB_FC_CHANGE) {
2453 intstatus &= ~I_HMB_FC_CHANGE;
2454 w_sdreg32(bus, I_HMB_FC_CHANGE,
2455 offsetof(struct sdpcmd_regs, intstatus), &retries);
2457 r_sdreg32(bus, &newstatus,
2458 offsetof(struct sdpcmd_regs, intstatus), &retries);
2459 bus->f1regdata += 2;
2461 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE));
2462 intstatus |= (newstatus & bus->hostintmask);
2465 /* Handle host mailbox indication */
2466 if (intstatus & I_HMB_HOST_INT) {
2467 intstatus &= ~I_HMB_HOST_INT;
2468 intstatus |= brcmf_sdbrcm_hostmail(bus);
2471 /* Generally don't ask for these, can get CRC errors... */
2472 if (intstatus & I_WR_OOSYNC) {
2473 brcmf_dbg(ERROR, "Dongle reports WR_OOSYNC\n");
2474 intstatus &= ~I_WR_OOSYNC;
2477 if (intstatus & I_RD_OOSYNC) {
2478 brcmf_dbg(ERROR, "Dongle reports RD_OOSYNC\n");
2479 intstatus &= ~I_RD_OOSYNC;
2482 if (intstatus & I_SBINT) {
2483 brcmf_dbg(ERROR, "Dongle reports SBINT\n");
2484 intstatus &= ~I_SBINT;
2487 /* Would be active due to wake-wlan in gSPI */
2488 if (intstatus & I_CHIPACTIVE) {
2489 brcmf_dbg(INFO, "Dongle reports CHIPACTIVE\n");
2490 intstatus &= ~I_CHIPACTIVE;
2493 /* Ignore frame indications if rxskip is set */
2495 intstatus &= ~I_HMB_FRAME_IND;
2497 /* On frame indication, read available frames */
2498 if (PKT_AVAILABLE()) {
2499 framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone);
2500 if (rxdone || bus->rxskip)
2501 intstatus &= ~I_HMB_FRAME_IND;
2502 rxlimit -= min(framecnt, rxlimit);
2505 /* Keep still-pending events for next scheduling */
2506 bus->intstatus = intstatus;
2509 if (data_ok(bus) && bus->ctrl_frame_stat &&
2510 (bus->clkstate == CLK_AVAIL)) {
2513 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2514 SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf,
2515 (u32) bus->ctrl_frame_len);
2518 /* On failure, abort the command and
2519 terminate the frame */
2520 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2524 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2526 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2527 SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM,
2531 for (i = 0; i < 3; i++) {
2533 hi = brcmf_sdcard_cfg_read(bus->sdiodev,
2535 SBSDIO_FUNC1_WFRAMEBCHI,
2537 lo = brcmf_sdcard_cfg_read(bus->sdiodev,
2539 SBSDIO_FUNC1_WFRAMEBCLO,
2541 bus->f1regdata += 2;
2542 if ((hi == 0) && (lo == 0))
2548 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2550 brcmf_dbg(INFO, "Return_dpc value is : %d\n", ret);
2551 bus->ctrl_frame_stat = false;
2552 brcmf_sdbrcm_wait_event_wakeup(bus);
2554 /* Send queued frames (limit 1 if rx may still be pending) */
2555 else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate &&
2556 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit
2558 framecnt = rxdone ? txlimit : min(txlimit, bus->txminmax);
2559 framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt);
2560 txlimit -= framecnt;
2563 /* Resched if events or tx frames are pending,
2564 else await next interrupt */
2565 /* On failed register access, all bets are off:
2566 no resched or interrupts */
2567 if ((bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) ||
2568 brcmf_sdcard_regfail(bus->sdiodev)) {
2569 brcmf_dbg(ERROR, "failed backplane access over SDIO, halting operation %d\n",
2570 brcmf_sdcard_regfail(bus->sdiodev));
2571 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
2573 } else if (bus->clkstate == CLK_PENDING) {
2574 brcmf_dbg(INFO, "rescheduled due to CLK_PENDING awaiting I_CHIPACTIVE interrupt\n");
2576 } else if (bus->intstatus || bus->ipend ||
2577 (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol)
2578 && data_ok(bus)) || PKT_AVAILABLE()) {
2582 bus->dpc_sched = resched;
2584 /* If we're done for now, turn off clock request. */
2585 if ((bus->clkstate != CLK_PENDING)
2586 && bus->idletime == BRCMF_IDLE_IMMEDIATE) {
2587 bus->activity = false;
2588 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
2596 static int brcmf_sdbrcm_dpc_thread(void *data)
2598 struct brcmf_sdio *bus = (struct brcmf_sdio *) data;
2600 allow_signal(SIGTERM);
2601 /* Run until signal received */
2603 if (kthread_should_stop())
2605 if (!wait_for_completion_interruptible(&bus->dpc_wait)) {
2606 /* Call bus dpc unless it indicated down
2607 (then clean stop) */
2608 if (bus->sdiodev->bus_if->state != BRCMF_BUS_DOWN) {
2609 if (brcmf_sdbrcm_dpc(bus))
2610 complete(&bus->dpc_wait);
2612 /* after stopping the bus, exit thread */
2613 brcmf_sdbrcm_bus_stop(bus->sdiodev->dev);
2614 bus->dpc_tsk = NULL;
2623 static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
2627 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2628 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
2629 struct brcmf_sdio *bus = sdiodev->bus;
2631 brcmf_dbg(TRACE, "Enter\n");
2635 /* Add space for the header */
2636 skb_push(pkt, SDPCM_HDRLEN);
2637 /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */
2639 prec = prio2prec((pkt->priority & PRIOMASK));
2641 /* Check for existing queue, current flow-control,
2642 pending event, or pending clock */
2643 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2646 /* Priority based enq */
2647 spin_lock_bh(&bus->txqlock);
2648 if (brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec) ==
2650 skb_pull(pkt, SDPCM_HDRLEN);
2651 brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
2652 brcmu_pkt_buf_free_skb(pkt);
2653 brcmf_dbg(ERROR, "out of bus->txq !!!\n");
2658 spin_unlock_bh(&bus->txqlock);
2660 if (pktq_len(&bus->txq) >= TXHI) {
2662 brcmf_txflowcontrol(bus->sdiodev->dev, 0, ON);
2666 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2667 qcount[prec] = pktq_plen(&bus->txq, prec);
2669 /* Schedule DPC if needed to send queued packet(s) */
2670 if (!bus->dpc_sched) {
2671 bus->dpc_sched = true;
2673 complete(&bus->dpc_wait);
2680 brcmf_sdbrcm_membytes(struct brcmf_sdio *bus, bool write, u32 address, u8 *data,
2687 /* Determine initial transfer parameters */
2688 sdaddr = address & SBSDIO_SB_OFT_ADDR_MASK;
2689 if ((sdaddr + size) & SBSDIO_SBWINDOW_MASK)
2690 dsize = (SBSDIO_SB_OFT_ADDR_LIMIT - sdaddr);
2694 /* Set the backplane window to include the start address */
2695 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev, address);
2697 brcmf_dbg(ERROR, "window change failed\n");
2701 /* Do the transfer(s) */
2703 brcmf_dbg(INFO, "%s %d bytes at offset 0x%08x in window 0x%08x\n",
2704 write ? "write" : "read", dsize,
2705 sdaddr, address & SBSDIO_SBWINDOW_MASK);
2706 bcmerror = brcmf_sdcard_rwdata(bus->sdiodev, write,
2707 sdaddr, data, dsize);
2709 brcmf_dbg(ERROR, "membytes transfer failed\n");
2713 /* Adjust for next transfer (if any) */
2718 bcmerror = brcmf_sdcard_set_sbaddr_window(bus->sdiodev,
2721 brcmf_dbg(ERROR, "window change failed\n");
2725 dsize = min_t(uint, SBSDIO_SB_OFT_ADDR_LIMIT, size);
2730 /* Return the window to backplane enumeration space for core access */
2731 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, bus->sdiodev->sbwad))
2732 brcmf_dbg(ERROR, "FAILED to set window back to 0x%x\n",
2733 bus->sdiodev->sbwad);
2739 #define CONSOLE_LINE_MAX 192
2741 static int brcmf_sdbrcm_readconsole(struct brcmf_sdio *bus)
2743 struct brcmf_console *c = &bus->console;
2744 u8 line[CONSOLE_LINE_MAX], ch;
2748 /* Don't do anything until FWREADY updates console address */
2749 if (bus->console_addr == 0)
2752 /* Read console log struct */
2753 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2754 rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log_le,
2759 /* Allocate console buffer (one time only) */
2760 if (c->buf == NULL) {
2761 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2762 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2767 idx = le32_to_cpu(c->log_le.idx);
2769 /* Protect against corrupt value */
2770 if (idx > c->bufsize)
2773 /* Skip reading the console buffer if the index pointer
2778 /* Read the console buffer */
2779 addr = le32_to_cpu(c->log_le.buf);
2780 rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize);
2784 while (c->last != idx) {
2785 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2786 if (c->last == idx) {
2787 /* This would output a partial line.
2789 * the buffer pointer and output this
2790 * line next time around.
2795 c->last = c->bufsize - n;
2798 ch = c->buf[c->last];
2799 c->last = (c->last + 1) % c->bufsize;
2806 if (line[n - 1] == '\r')
2809 pr_debug("CONSOLE: %s\n", line);
2818 static int brcmf_tx_frame(struct brcmf_sdio *bus, u8 *frame, u16 len)
2823 bus->ctrl_frame_stat = false;
2824 ret = brcmf_sdcard_send_buf(bus->sdiodev, bus->sdiodev->sbwad,
2825 SDIO_FUNC_2, F2SYNC, frame, len);
2828 /* On failure, abort the command and terminate the frame */
2829 brcmf_dbg(INFO, "sdio error %d, abort command and terminate frame\n",
2833 brcmf_sdcard_abort(bus->sdiodev, SDIO_FUNC_2);
2835 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
2836 SBSDIO_FUNC1_FRAMECTRL,
2840 for (i = 0; i < 3; i++) {
2842 hi = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2843 SBSDIO_FUNC1_WFRAMEBCHI,
2845 lo = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
2846 SBSDIO_FUNC1_WFRAMEBCLO,
2848 bus->f1regdata += 2;
2849 if (hi == 0 && lo == 0)
2855 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP;
2861 brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2869 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2870 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
2871 struct brcmf_sdio *bus = sdiodev->bus;
2873 brcmf_dbg(TRACE, "Enter\n");
2875 /* Back the pointer to make a room for bus header */
2876 frame = msg - SDPCM_HDRLEN;
2877 len = (msglen += SDPCM_HDRLEN);
2879 /* Add alignment padding (optional for ctl frames) */
2880 doff = ((unsigned long)frame % BRCMF_SDALIGN);
2885 memset(frame, 0, doff + SDPCM_HDRLEN);
2887 /* precondition: doff < BRCMF_SDALIGN */
2888 doff += SDPCM_HDRLEN;
2890 /* Round send length to next SDIO block */
2891 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2892 u16 pad = bus->blocksize - (len % bus->blocksize);
2893 if ((pad <= bus->roundup) && (pad < bus->blocksize))
2895 } else if (len % BRCMF_SDALIGN) {
2896 len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN);
2899 /* Satisfy length-alignment requirements */
2900 if (len & (ALIGNMENT - 1))
2901 len = roundup(len, ALIGNMENT);
2903 /* precondition: IS_ALIGNED((unsigned long)frame, 2) */
2905 /* Need to lock here to protect txseq and SDIO tx calls */
2910 /* Make sure backplane clock is on */
2911 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
2913 /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */
2914 *(__le16 *) frame = cpu_to_le16((u16) msglen);
2915 *(((__le16 *) frame) + 1) = cpu_to_le16(~msglen);
2917 /* Software tag: channel, sequence number, data offset */
2919 ((SDPCM_CONTROL_CHANNEL << SDPCM_CHANNEL_SHIFT) &
2921 | bus->tx_seq | ((doff << SDPCM_DOFFSET_SHIFT) &
2922 SDPCM_DOFFSET_MASK);
2923 put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN);
2924 put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader));
2926 if (!data_ok(bus)) {
2927 brcmf_dbg(INFO, "No bus credit bus->tx_max %d, bus->tx_seq %d\n",
2928 bus->tx_max, bus->tx_seq);
2929 bus->ctrl_frame_stat = true;
2931 bus->ctrl_frame_buf = frame;
2932 bus->ctrl_frame_len = len;
2934 brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
2936 if (bus->ctrl_frame_stat == false) {
2937 brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
2940 brcmf_dbg(INFO, "ctrl_frame_stat == true\n");
2946 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2947 frame, len, "Tx Frame:\n");
2948 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2950 frame, min_t(u16, len, 16), "TxHdr:\n");
2953 ret = brcmf_tx_frame(bus, frame, len);
2954 } while (ret < 0 && retries++ < TXRETRIES);
2957 if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) {
2958 bus->activity = false;
2959 brcmf_sdbrcm_clkctl(bus, CLK_NONE, true);
2969 return ret ? -EIO : 0;
2973 brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
2978 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2979 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
2980 struct brcmf_sdio *bus = sdiodev->bus;
2982 brcmf_dbg(TRACE, "Enter\n");
2984 /* Wait until control frame is available */
2985 timeleft = brcmf_sdbrcm_dcmd_resp_wait(bus, &bus->rxlen, &pending);
2989 memcpy(msg, bus->rxctl, min(msglen, rxlen));
2994 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
2996 } else if (timeleft == 0) {
2997 brcmf_dbg(ERROR, "resumed on timeout\n");
2998 } else if (pending == true) {
2999 brcmf_dbg(CTL, "cancelled\n");
3000 return -ERESTARTSYS;
3002 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3010 return rxlen ? (int)rxlen : -ETIMEDOUT;
3013 static int brcmf_sdbrcm_downloadvars(struct brcmf_sdio *bus, void *arg, int len)
3017 brcmf_dbg(TRACE, "Enter\n");
3019 /* Basic sanity checks */
3020 if (bus->sdiodev->bus_if->drvr_up) {
3021 bcmerror = -EISCONN;
3025 bcmerror = -EOVERFLOW;
3029 /* Free the old ones and replace with passed variables */
3032 bus->vars = kmalloc(len, GFP_ATOMIC);
3033 bus->varsz = bus->vars ? len : 0;
3034 if (bus->vars == NULL) {
3039 /* Copy the passed variables, which should include the
3040 terminating double-null */
3041 memcpy(bus->vars, arg, bus->varsz);
3046 static int brcmf_sdbrcm_write_vars(struct brcmf_sdio *bus)
3055 char *nvram_ularray;
3058 /* Even if there are no vars are to be written, we still
3059 need to set the ramsize. */
3060 varsize = bus->varsz ? roundup(bus->varsz, 4) : 0;
3061 varaddr = (bus->ramsize - 4) - varsize;
3064 vbuffer = kzalloc(varsize, GFP_ATOMIC);
3068 memcpy(vbuffer, bus->vars, bus->varsz);
3070 /* Write the vars list */
3072 brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize);
3074 /* Verify NVRAM bytes */
3075 brcmf_dbg(INFO, "Compare NVRAM dl & ul; varsize=%d\n", varsize);
3076 nvram_ularray = kmalloc(varsize, GFP_ATOMIC);
3077 if (!nvram_ularray) {
3082 /* Upload image to verify downloaded contents. */
3083 memset(nvram_ularray, 0xaa, varsize);
3085 /* Read the vars list to temp buffer for comparison */
3087 brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray,
3090 brcmf_dbg(ERROR, "error %d on reading %d nvram bytes at 0x%08x\n",
3091 bcmerror, varsize, varaddr);
3093 /* Compare the org NVRAM with the one read from RAM */
3094 if (memcmp(vbuffer, nvram_ularray, varsize))
3095 brcmf_dbg(ERROR, "Downloaded NVRAM image is corrupted\n");
3097 brcmf_dbg(ERROR, "Download/Upload/Compare of NVRAM ok\n");
3099 kfree(nvram_ularray);
3105 /* adjust to the user specified RAM */
3106 brcmf_dbg(INFO, "Physical memory size: %d\n", bus->ramsize);
3107 brcmf_dbg(INFO, "Vars are at %d, orig varsize is %d\n",
3109 varsize = ((bus->ramsize - 4) - varaddr);
3112 * Determine the length token:
3113 * Varsize, converted to words, in lower 16-bits, checksum
3118 varsizew_le = cpu_to_le32(0);
3120 varsizew = varsize / 4;
3121 varsizew = (~varsizew << 16) | (varsizew & 0x0000FFFF);
3122 varsizew_le = cpu_to_le32(varsizew);
3125 brcmf_dbg(INFO, "New varsize is %d, length token=0x%08x\n",
3128 /* Write the length token to the last word */
3129 bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->ramsize - 4),
3130 (u8 *)&varsizew_le, 4);
3135 static int brcmf_sdbrcm_download_state(struct brcmf_sdio *bus, bool enter)
3139 struct chip_info *ci = bus->ci;
3141 /* To enter download state, disable ARM and reset SOCRAM.
3142 * To exit download state, simply reset ARM (default is RAM boot).
3145 bus->alp_only = true;
3147 ci->coredisable(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3149 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM);
3151 /* Clear the top bit of memory */
3154 brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4,
3158 if (!ci->iscoreup(bus->sdiodev, ci, BCMA_CORE_INTERNAL_MEM)) {
3159 brcmf_dbg(ERROR, "SOCRAM core is down after reset?\n");
3164 bcmerror = brcmf_sdbrcm_write_vars(bus);
3166 brcmf_dbg(ERROR, "no vars written to RAM\n");
3170 w_sdreg32(bus, 0xFFFFFFFF,
3171 offsetof(struct sdpcmd_regs, intstatus), &retries);
3173 ci->resetcore(bus->sdiodev, ci, BCMA_CORE_ARM_CM3);
3175 /* Allow HT Clock now that the ARM is running. */
3176 bus->alp_only = false;
3178 bus->sdiodev->bus_if->state = BRCMF_BUS_LOAD;
3184 static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_sdio *bus)
3186 if (bus->firmware->size < bus->fw_ptr + len)
3187 len = bus->firmware->size - bus->fw_ptr;
3189 memcpy(buf, &bus->firmware->data[bus->fw_ptr], len);
3194 static int brcmf_sdbrcm_download_code_file(struct brcmf_sdio *bus)
3198 u8 *memblock = NULL, *memptr;
3201 brcmf_dbg(INFO, "Enter\n");
3203 ret = request_firmware(&bus->firmware, BRCMFMAC_FW_NAME,
3204 &bus->sdiodev->func[2]->dev);
3206 brcmf_dbg(ERROR, "Fail to request firmware %d\n", ret);
3211 memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC);
3212 if (memblock == NULL) {
3216 if ((u32)(unsigned long)memblock % BRCMF_SDALIGN)
3217 memptr += (BRCMF_SDALIGN -
3218 ((u32)(unsigned long)memblock % BRCMF_SDALIGN));
3220 /* Download image */
3222 brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) {
3223 ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len);
3225 brcmf_dbg(ERROR, "error %d on writing %d membytes at 0x%08x\n",
3226 ret, MEMBLOCK, offset);
3236 release_firmware(bus->firmware);
3243 * ProcessVars:Takes a buffer of "<var>=<value>\n" lines read from a file
3244 * and ending in a NUL.
3245 * Removes carriage returns, empty lines, comment lines, and converts
3247 * Shortens buffer as needed and pads with NULs. End of buffer is marked
3251 static uint brcmf_process_nvram_vars(char *varbuf, uint len)
3260 findNewline = false;
3263 for (n = 0; n < len; n++) {
3266 if (varbuf[n] == '\r')
3268 if (findNewline && varbuf[n] != '\n')
3270 findNewline = false;
3271 if (varbuf[n] == '#') {
3275 if (varbuf[n] == '\n') {
3285 buf_len = dp - varbuf;
3287 while (dp < varbuf + n)
3293 static int brcmf_sdbrcm_download_nvram(struct brcmf_sdio *bus)
3296 char *memblock = NULL;
3300 ret = request_firmware(&bus->firmware, BRCMFMAC_NV_NAME,
3301 &bus->sdiodev->func[2]->dev);
3303 brcmf_dbg(ERROR, "Fail to request nvram %d\n", ret);
3308 memblock = kmalloc(MEMBLOCK, GFP_ATOMIC);
3309 if (memblock == NULL) {
3314 len = brcmf_sdbrcm_get_image(memblock, MEMBLOCK, bus);
3316 if (len > 0 && len < MEMBLOCK) {
3317 bufp = (char *)memblock;
3319 len = brcmf_process_nvram_vars(bufp, len);
3323 ret = brcmf_sdbrcm_downloadvars(bus, memblock, len + 1);
3325 brcmf_dbg(ERROR, "error downloading vars: %d\n", ret);
3327 brcmf_dbg(ERROR, "error reading nvram file: %d\n", len);
3334 release_firmware(bus->firmware);
3340 static int _brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3344 /* Keep arm in reset */
3345 if (brcmf_sdbrcm_download_state(bus, true)) {
3346 brcmf_dbg(ERROR, "error placing ARM core in reset\n");
3350 /* External image takes precedence if specified */
3351 if (brcmf_sdbrcm_download_code_file(bus)) {
3352 brcmf_dbg(ERROR, "dongle image file download failed\n");
3356 /* External nvram takes precedence if specified */
3357 if (brcmf_sdbrcm_download_nvram(bus))
3358 brcmf_dbg(ERROR, "dongle nvram file download failed\n");
3360 /* Take arm out of reset */
3361 if (brcmf_sdbrcm_download_state(bus, false)) {
3362 brcmf_dbg(ERROR, "error getting out of ARM core reset\n");
3373 brcmf_sdbrcm_download_firmware(struct brcmf_sdio *bus)
3377 /* Download the firmware */
3378 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3380 ret = _brcmf_sdbrcm_download_firmware(bus) == 0;
3382 brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false);
3387 static int brcmf_sdbrcm_bus_init(struct device *dev)
3389 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3390 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv;
3391 struct brcmf_sdio *bus = sdiodev->bus;
3392 unsigned long timeout;
3398 brcmf_dbg(TRACE, "Enter\n");
3400 /* try to download image and nvram to the dongle */
3401 if (bus_if->state == BRCMF_BUS_DOWN) {
3402 if (!(brcmf_sdbrcm_download_firmware(bus)))
3406 if (!bus->sdiodev->bus_if->drvr)
3409 /* Start the watchdog timer */
3411 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3415 /* Make sure backplane clock is on, needed to generate F2 interrupt */
3416 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3417 if (bus->clkstate != CLK_AVAIL)
3420 /* Force clocks on backplane to be sure F2 interrupt propagates */
3422 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3423 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3425 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3426 SBSDIO_FUNC1_CHIPCLKCSR,
3427 (saveclk | SBSDIO_FORCE_HT), &err);
3430 brcmf_dbg(ERROR, "Failed to force clock for F2: err %d\n", err);
3434 /* Enable function 2 (frame transfers) */
3435 w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT,
3436 offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries);
3437 enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2);
3439 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3442 timeout = jiffies + msecs_to_jiffies(BRCMF_WAIT_F2RDY);
3444 while (enable != ready) {
3445 ready = brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_0,
3446 SDIO_CCCR_IORx, NULL);
3447 if (time_after(jiffies, timeout))
3449 else if (time_after(jiffies, timeout - BRCMF_WAIT_F2RDY + 50))
3450 /* prevent busy waiting if it takes too long */
3451 msleep_interruptible(20);
3454 brcmf_dbg(INFO, "enable 0x%02x, ready 0x%02x\n", enable, ready);
3456 /* If F2 successfully enabled, set core and enable interrupts */
3457 if (ready == enable) {
3458 /* Set up the interrupt mask and enable interrupts */
3459 bus->hostintmask = HOSTINTMASK;
3460 w_sdreg32(bus, bus->hostintmask,
3461 offsetof(struct sdpcmd_regs, hostintmask), &retries);
3463 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3464 SBSDIO_WATERMARK, 8, &err);
3466 /* Set bus state according to enable result */
3467 bus_if->state = BRCMF_BUS_DATA;
3471 /* Disable F2 again */
3472 enable = SDIO_FUNC_ENABLE_1;
3473 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0,
3474 SDIO_CCCR_IOEx, enable, NULL);
3477 /* Restore previous clock setting */
3478 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3479 SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err);
3481 /* If we didn't come up, turn off backplane clock */
3482 if (bus_if->state != BRCMF_BUS_DATA)
3483 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3491 void brcmf_sdbrcm_isr(void *arg)
3493 struct brcmf_sdio *bus = (struct brcmf_sdio *) arg;
3495 brcmf_dbg(TRACE, "Enter\n");
3498 brcmf_dbg(ERROR, "bus is null pointer, exiting\n");
3502 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN) {
3503 brcmf_dbg(ERROR, "bus is down. we have nothing to do\n");
3506 /* Count the interrupt call */
3510 /* Shouldn't get this interrupt if we're sleeping? */
3511 if (bus->sleeping) {
3512 brcmf_dbg(ERROR, "INTERRUPT WHILE SLEEPING??\n");
3516 /* Disable additional interrupts (is this needed now)? */
3518 brcmf_dbg(ERROR, "isr w/o interrupt configured!\n");
3520 bus->dpc_sched = true;
3522 complete(&bus->dpc_wait);
3525 static bool brcmf_sdbrcm_bus_watchdog(struct brcmf_sdio *bus)
3528 struct brcmf_bus *bus_if = dev_get_drvdata(bus->sdiodev->dev);
3531 brcmf_dbg(TIMER, "Enter\n");
3533 /* Ignore the timer if simulating bus down */
3539 /* Poll period: check device if appropriate. */
3540 if (bus->poll && (++bus->polltick >= bus->pollrate)) {
3543 /* Reset poll tick */
3546 /* Check device if no interrupts */
3547 if (!bus->intr || (bus->intrcount == bus->lastintrs)) {
3549 if (!bus->dpc_sched) {
3551 devpend = brcmf_sdcard_cfg_read(bus->sdiodev,
3552 SDIO_FUNC_0, SDIO_CCCR_INTx,
3555 devpend & (INTR_STATUS_FUNC1 |
3559 /* If there is something, make like the ISR and
3565 bus->dpc_sched = true;
3567 complete(&bus->dpc_wait);
3571 /* Update interrupt tracking */
3572 bus->lastintrs = bus->intrcount;
3575 /* Poll for console output periodically */
3576 if (bus_if->state == BRCMF_BUS_DATA &&
3577 bus->console_interval != 0) {
3578 bus->console.count += BRCMF_WD_POLL_MS;
3579 if (bus->console.count >= bus->console_interval) {
3580 bus->console.count -= bus->console_interval;
3581 /* Make sure backplane clock is on */
3582 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3583 if (brcmf_sdbrcm_readconsole(bus) < 0)
3585 bus->console_interval = 0;
3590 /* On idle timeout clear activity flag and/or turn off clock */
3591 if ((bus->idletime > 0) && (bus->clkstate == CLK_AVAIL)) {
3592 if (++bus->idlecount >= bus->idletime) {
3594 if (bus->activity) {
3595 bus->activity = false;
3596 brcmf_sdbrcm_wd_timer(bus, BRCMF_WD_POLL_MS);
3598 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3608 static bool brcmf_sdbrcm_chipmatch(u16 chipid)
3610 if (chipid == BCM4329_CHIP_ID)
3612 if (chipid == BCM4330_CHIP_ID)
3617 static void brcmf_sdbrcm_release_malloc(struct brcmf_sdio *bus)
3619 brcmf_dbg(TRACE, "Enter\n");
3622 bus->rxctl = bus->rxbuf = NULL;
3625 kfree(bus->databuf);
3626 bus->databuf = NULL;
3629 static bool brcmf_sdbrcm_probe_malloc(struct brcmf_sdio *bus)
3631 brcmf_dbg(TRACE, "Enter\n");
3633 if (bus->sdiodev->bus_if->maxctl) {
3635 roundup((bus->sdiodev->bus_if->maxctl + SDPCM_HDRLEN),
3636 ALIGNMENT) + BRCMF_SDALIGN;
3637 bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC);
3642 /* Allocate buffer to receive glomed packet */
3643 bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC);
3644 if (!(bus->databuf)) {
3645 /* release rxbuf which was already located as above */
3651 /* Align the buffer */
3652 if ((unsigned long)bus->databuf % BRCMF_SDALIGN)
3653 bus->dataptr = bus->databuf + (BRCMF_SDALIGN -
3654 ((unsigned long)bus->databuf % BRCMF_SDALIGN));
3656 bus->dataptr = bus->databuf;
3665 brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
3673 bus->alp_only = true;
3675 /* Return the window to backplane enumeration space for core access */
3676 if (brcmf_sdcard_set_sbaddr_window(bus->sdiodev, SI_ENUM_BASE))
3677 brcmf_dbg(ERROR, "FAILED to return to SI_ENUM_BASE\n");
3679 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3680 brcmf_sdcard_reg_read(bus->sdiodev, SI_ENUM_BASE, 4));
3683 * Force PLL off until brcmf_sdio_chip_attach()
3684 * programs PLL control regs
3687 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3688 SBSDIO_FUNC1_CHIPCLKCSR,
3689 BRCMF_INIT_CLKCTL1, &err);
3692 brcmf_sdcard_cfg_read(bus->sdiodev, SDIO_FUNC_1,
3693 SBSDIO_FUNC1_CHIPCLKCSR, &err);
3695 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3696 brcmf_dbg(ERROR, "ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3697 err, BRCMF_INIT_CLKCTL1, clkctl);
3701 if (brcmf_sdio_chip_attach(bus->sdiodev, &bus->ci, regsva)) {
3702 brcmf_dbg(ERROR, "brcmf_sdio_chip_attach failed!\n");
3706 if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) {
3707 brcmf_dbg(ERROR, "unsupported chip: 0x%04x\n", bus->ci->chip);
3711 brcmf_sdio_chip_drivestrengthinit(bus->sdiodev, bus->ci,
3712 SDIO_DRIVE_STRENGTH);
3714 /* Get info on the SOCRAM cores... */
3715 bus->ramsize = bus->ci->ramsize;
3716 if (!(bus->ramsize)) {
3717 brcmf_dbg(ERROR, "failed to find SOCRAM memory!\n");
3721 /* Set core control so an SDIO reset does a backplane reset */
3722 idx = brcmf_sdio_chip_getinfidx(bus->ci, BCMA_CORE_SDIO_DEV);
3723 reg_addr = bus->ci->c_inf[idx].base +
3724 offsetof(struct sdpcmd_regs, corecontrol);
3725 reg_val = brcmf_sdcard_reg_read(bus->sdiodev, reg_addr, sizeof(u32));
3726 brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, sizeof(u32),
3727 reg_val | CC_BPRESEN);
3729 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
3731 /* Locate an appropriately-aligned portion of hdrbuf */
3732 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
3735 /* Set the poll and/or interrupt flags */
3747 static bool brcmf_sdbrcm_probe_init(struct brcmf_sdio *bus)
3749 brcmf_dbg(TRACE, "Enter\n");
3751 /* Disable F2 to clear any intermediate frame state on the dongle */
3752 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_0, SDIO_CCCR_IOEx,
3753 SDIO_FUNC_ENABLE_1, NULL);
3755 bus->sdiodev->bus_if->state = BRCMF_BUS_DOWN;
3756 bus->sleeping = false;
3757 bus->rxflow = false;
3759 /* Done with backplane-dependent accesses, can drop clock... */
3760 brcmf_sdcard_cfg_write(bus->sdiodev, SDIO_FUNC_1,
3761 SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
3763 /* ...and initialize clock/power states */
3764 bus->clkstate = CLK_SDONLY;
3765 bus->idletime = BRCMF_IDLE_INTERVAL;
3766 bus->idleclock = BRCMF_IDLE_ACTIVE;
3768 /* Query the F2 block size, set roundup accordingly */
3769 bus->blocksize = bus->sdiodev->func[2]->cur_blksize;
3770 bus->roundup = min(max_roundup, bus->blocksize);
3772 /* bus module does not support packet chaining */
3773 bus->use_rxchain = false;
3774 bus->sd_rxchain = false;
3780 brcmf_sdbrcm_watchdog_thread(void *data)
3782 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3784 allow_signal(SIGTERM);
3785 /* Run until signal received */
3787 if (kthread_should_stop())
3789 if (!wait_for_completion_interruptible(&bus->watchdog_wait)) {
3790 brcmf_sdbrcm_bus_watchdog(bus);
3791 /* Count the tick for reference */
3800 brcmf_sdbrcm_watchdog(unsigned long data)
3802 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
3804 if (bus->watchdog_tsk) {
3805 complete(&bus->watchdog_wait);
3806 /* Reschedule the watchdog */
3807 if (bus->wd_timer_valid)
3808 mod_timer(&bus->timer,
3809 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
3813 static void brcmf_sdbrcm_release_dongle(struct brcmf_sdio *bus)
3815 brcmf_dbg(TRACE, "Enter\n");
3818 brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false);
3819 brcmf_sdbrcm_clkctl(bus, CLK_NONE, false);
3820 brcmf_sdio_chip_detach(&bus->ci);
3821 if (bus->vars && bus->varsz)
3826 brcmf_dbg(TRACE, "Disconnected\n");
3829 /* Detach and free everything */
3830 static void brcmf_sdbrcm_release(struct brcmf_sdio *bus)
3832 brcmf_dbg(TRACE, "Enter\n");
3835 /* De-register interrupt handler */
3836 brcmf_sdcard_intr_dereg(bus->sdiodev);
3838 if (bus->sdiodev->bus_if->drvr) {
3839 brcmf_detach(bus->sdiodev->dev);
3840 brcmf_sdbrcm_release_dongle(bus);
3843 brcmf_sdbrcm_release_malloc(bus);
3848 brcmf_dbg(TRACE, "Disconnected\n");
3851 void *brcmf_sdbrcm_probe(u32 regsva, struct brcmf_sdio_dev *sdiodev)
3854 struct brcmf_sdio *bus;
3856 brcmf_dbg(TRACE, "Enter\n");
3858 /* We make an assumption about address window mappings:
3859 * regsva == SI_ENUM_BASE*/
3861 /* Allocate private bus interface state */
3862 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
3866 bus->sdiodev = sdiodev;
3868 skb_queue_head_init(&bus->glom);
3869 bus->txbound = BRCMF_TXBOUND;
3870 bus->rxbound = BRCMF_RXBOUND;
3871 bus->txminmax = BRCMF_TXMINMAX;
3872 bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1;
3873 bus->usebufpool = false; /* Use bufpool if allocated,
3874 else use locally malloced rxbuf */
3876 /* attempt to attach to the dongle */
3877 if (!(brcmf_sdbrcm_probe_attach(bus, regsva))) {
3878 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_attach failed\n");
3882 spin_lock_init(&bus->txqlock);
3883 init_waitqueue_head(&bus->ctrl_wait);
3884 init_waitqueue_head(&bus->dcmd_resp_wait);
3886 /* Set up the watchdog timer */
3887 init_timer(&bus->timer);
3888 bus->timer.data = (unsigned long)bus;
3889 bus->timer.function = brcmf_sdbrcm_watchdog;
3891 /* Initialize thread based operation and lock */
3892 sema_init(&bus->sdsem, 1);
3894 /* Initialize watchdog thread */
3895 init_completion(&bus->watchdog_wait);
3896 bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread,
3897 bus, "brcmf_watchdog");
3898 if (IS_ERR(bus->watchdog_tsk)) {
3900 "brcmf_watchdog thread failed to start\n");
3901 bus->watchdog_tsk = NULL;
3903 /* Initialize DPC thread */
3904 init_completion(&bus->dpc_wait);
3905 bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread,
3907 if (IS_ERR(bus->dpc_tsk)) {
3909 "brcmf_dpc thread failed to start\n");
3910 bus->dpc_tsk = NULL;
3913 /* Assign bus interface call back */
3914 bus->sdiodev->bus_if->brcmf_bus_stop = brcmf_sdbrcm_bus_stop;
3915 bus->sdiodev->bus_if->brcmf_bus_init = brcmf_sdbrcm_bus_init;
3916 bus->sdiodev->bus_if->brcmf_bus_txdata = brcmf_sdbrcm_bus_txdata;
3917 bus->sdiodev->bus_if->brcmf_bus_txctl = brcmf_sdbrcm_bus_txctl;
3918 bus->sdiodev->bus_if->brcmf_bus_rxctl = brcmf_sdbrcm_bus_rxctl;
3919 /* Attach to the brcmf/OS/network interface */
3920 ret = brcmf_attach(SDPCM_RESERVE, bus->sdiodev->dev);
3922 brcmf_dbg(ERROR, "brcmf_attach failed\n");
3926 /* Allocate buffers */
3927 if (!(brcmf_sdbrcm_probe_malloc(bus))) {
3928 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_malloc failed\n");
3932 if (!(brcmf_sdbrcm_probe_init(bus))) {
3933 brcmf_dbg(ERROR, "brcmf_sdbrcm_probe_init failed\n");
3937 /* Register interrupt callback, but mask it (not operational yet). */
3938 brcmf_dbg(INTR, "disable SDIO interrupts (not interested yet)\n");
3939 ret = brcmf_sdcard_intr_reg(bus->sdiodev);
3941 brcmf_dbg(ERROR, "FAILED: sdcard_intr_reg returned %d\n", ret);
3944 brcmf_dbg(INTR, "registered SDIO interrupt function ok\n");
3946 brcmf_dbg(INFO, "completed!!\n");
3948 /* if firmware path present try to download and bring up bus */
3949 ret = brcmf_bus_start(bus->sdiodev->dev);
3951 if (ret == -ENOLINK) {
3952 brcmf_dbg(ERROR, "dongle is not responding\n");
3957 /* add interface and open for business */
3958 if (brcmf_add_if(bus->sdiodev->dev, 0, "wlan%d", NULL)) {
3959 brcmf_dbg(ERROR, "Add primary net device interface failed!!\n");
3966 brcmf_sdbrcm_release(bus);
3970 void brcmf_sdbrcm_disconnect(void *ptr)
3972 struct brcmf_sdio *bus = (struct brcmf_sdio *)ptr;
3974 brcmf_dbg(TRACE, "Enter\n");
3977 brcmf_sdbrcm_release(bus);
3979 brcmf_dbg(TRACE, "Disconnected\n");
3983 brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
3985 /* Totally stop the timer */
3986 if (!wdtick && bus->wd_timer_valid == true) {
3987 del_timer_sync(&bus->timer);
3988 bus->wd_timer_valid = false;
3989 bus->save_ms = wdtick;
3993 /* don't start the wd until fw is loaded */
3994 if (bus->sdiodev->bus_if->state == BRCMF_BUS_DOWN)
3998 if (bus->save_ms != BRCMF_WD_POLL_MS) {
3999 if (bus->wd_timer_valid == true)
4000 /* Stop timer and restart at new value */
4001 del_timer_sync(&bus->timer);
4003 /* Create timer again when watchdog period is
4004 dynamically changed or in the first instance
4006 bus->timer.expires =
4007 jiffies + BRCMF_WD_POLL_MS * HZ / 1000;
4008 add_timer(&bus->timer);
4011 /* Re arm the timer, at last watchdog period */
4012 mod_timer(&bus->timer,
4013 jiffies + BRCMF_WD_POLL_MS * HZ / 1000);
4016 bus->wd_timer_valid = true;
4017 bus->save_ms = wdtick;
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