1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 Intel Deutschland GmbH
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
26 * The full GNU General Public License is included in this distribution
27 * in the file called COPYING.
29 * Contact Information:
30 * Intel Linux Wireless <linuxwifi@intel.com>
31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
36 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
37 * All rights reserved.
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
43 * * Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * * Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
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50 * contributors may be used to endorse or promote products derived
51 * from this software without specific prior written permission.
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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59 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
63 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
65 *****************************************************************************/
66 #include <net/mac80211.h>
67 #include <linux/netdevice.h>
68 #include <linux/acpi.h>
70 #include "iwl-trans.h"
71 #include "iwl-op-mode.h"
73 #include "iwl-debug.h"
74 #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
75 #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
77 #include "iwl-eeprom-parse.h"
81 #include "iwl-phy-db.h"
83 #define MVM_UCODE_ALIVE_TIMEOUT HZ
84 #define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
86 #define UCODE_VALID_OK cpu_to_le32(0x1)
88 struct iwl_mvm_alive_data {
93 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
95 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
96 .valid = cpu_to_le32(valid_tx_ant),
99 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
100 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
101 sizeof(tx_ant_cmd), &tx_ant_cmd);
104 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
107 struct iwl_rss_config_cmd cmd = {
108 .flags = cpu_to_le32(IWL_RSS_ENABLE),
109 .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP |
110 IWL_RSS_HASH_TYPE_IPV4_UDP |
111 IWL_RSS_HASH_TYPE_IPV4_PAYLOAD |
112 IWL_RSS_HASH_TYPE_IPV6_TCP |
113 IWL_RSS_HASH_TYPE_IPV6_UDP |
114 IWL_RSS_HASH_TYPE_IPV6_PAYLOAD,
117 if (mvm->trans->num_rx_queues == 1)
120 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
121 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
122 cmd.indirection_table[i] =
123 1 + (i % (mvm->trans->num_rx_queues - 1));
124 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
126 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
129 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
131 struct iwl_dqa_enable_cmd dqa_cmd = {
132 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
134 u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
137 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
139 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
141 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
146 void iwl_free_fw_paging(struct iwl_mvm *mvm)
150 if (!mvm->fw_paging_db[0].fw_paging_block)
153 for (i = 0; i < NUM_OF_FW_PAGING_BLOCKS; i++) {
154 struct iwl_fw_paging *paging = &mvm->fw_paging_db[i];
156 if (!paging->fw_paging_block) {
158 "Paging: block %d already freed, continue to next page\n",
163 dma_unmap_page(mvm->trans->dev, paging->fw_paging_phys,
164 paging->fw_paging_size, DMA_BIDIRECTIONAL);
166 __free_pages(paging->fw_paging_block,
167 get_order(paging->fw_paging_size));
168 paging->fw_paging_block = NULL;
170 kfree(mvm->trans->paging_download_buf);
171 mvm->trans->paging_download_buf = NULL;
172 mvm->trans->paging_db = NULL;
174 memset(mvm->fw_paging_db, 0, sizeof(mvm->fw_paging_db));
177 static int iwl_fill_paging_mem(struct iwl_mvm *mvm, const struct fw_img *image)
183 * find where is the paging image start point:
184 * if CPU2 exist and it's in paging format, then the image looks like:
185 * CPU1 sections (2 or more)
186 * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2
187 * CPU2 sections (not paged)
188 * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2
189 * non paged to CPU2 paging sec
191 * CPU2 paging image (including instruction and data)
193 for (sec_idx = 0; sec_idx < IWL_UCODE_SECTION_MAX; sec_idx++) {
194 if (image->sec[sec_idx].offset == PAGING_SEPARATOR_SECTION) {
201 * If paging is enabled there should be at least 2 more sections left
202 * (one for CSS and one for Paging data)
204 if (sec_idx >= ARRAY_SIZE(image->sec) - 1) {
205 IWL_ERR(mvm, "Paging: Missing CSS and/or paging sections\n");
206 iwl_free_fw_paging(mvm);
210 /* copy the CSS block to the dram */
211 IWL_DEBUG_FW(mvm, "Paging: load paging CSS to FW, sec = %d\n",
214 memcpy(page_address(mvm->fw_paging_db[0].fw_paging_block),
215 image->sec[sec_idx].data,
216 mvm->fw_paging_db[0].fw_paging_size);
219 "Paging: copied %d CSS bytes to first block\n",
220 mvm->fw_paging_db[0].fw_paging_size);
225 * copy the paging blocks to the dram
226 * loop index start from 1 since that CSS block already copied to dram
227 * and CSS index is 0.
228 * loop stop at num_of_paging_blk since that last block is not full.
230 for (idx = 1; idx < mvm->num_of_paging_blk; idx++) {
231 memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block),
232 image->sec[sec_idx].data + offset,
233 mvm->fw_paging_db[idx].fw_paging_size);
236 "Paging: copied %d paging bytes to block %d\n",
237 mvm->fw_paging_db[idx].fw_paging_size,
240 offset += mvm->fw_paging_db[idx].fw_paging_size;
243 /* copy the last paging block */
244 if (mvm->num_of_pages_in_last_blk > 0) {
245 memcpy(page_address(mvm->fw_paging_db[idx].fw_paging_block),
246 image->sec[sec_idx].data + offset,
247 FW_PAGING_SIZE * mvm->num_of_pages_in_last_blk);
250 "Paging: copied %d pages in the last block %d\n",
251 mvm->num_of_pages_in_last_blk, idx);
257 static int iwl_alloc_fw_paging_mem(struct iwl_mvm *mvm,
258 const struct fw_img *image)
263 int order, num_of_pages;
266 if (mvm->fw_paging_db[0].fw_paging_block)
269 dma_enabled = is_device_dma_capable(mvm->trans->dev);
271 /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */
272 BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE) != PAGING_BLOCK_SIZE);
274 num_of_pages = image->paging_mem_size / FW_PAGING_SIZE;
275 mvm->num_of_paging_blk = ((num_of_pages - 1) /
276 NUM_OF_PAGE_PER_GROUP) + 1;
278 mvm->num_of_pages_in_last_blk =
280 NUM_OF_PAGE_PER_GROUP * (mvm->num_of_paging_blk - 1);
283 "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n",
284 mvm->num_of_paging_blk,
285 mvm->num_of_pages_in_last_blk);
287 /* allocate block of 4Kbytes for paging CSS */
288 order = get_order(FW_PAGING_SIZE);
289 block = alloc_pages(GFP_KERNEL, order);
291 /* free all the previous pages since we failed */
292 iwl_free_fw_paging(mvm);
296 mvm->fw_paging_db[blk_idx].fw_paging_block = block;
297 mvm->fw_paging_db[blk_idx].fw_paging_size = FW_PAGING_SIZE;
300 phys = dma_map_page(mvm->trans->dev, block, 0,
301 PAGE_SIZE << order, DMA_BIDIRECTIONAL);
302 if (dma_mapping_error(mvm->trans->dev, phys)) {
304 * free the previous pages and the current one since
305 * we failed to map_page.
307 iwl_free_fw_paging(mvm);
310 mvm->fw_paging_db[blk_idx].fw_paging_phys = phys;
312 mvm->fw_paging_db[blk_idx].fw_paging_phys = PAGING_ADDR_SIG |
313 blk_idx << BLOCK_2_EXP_SIZE;
317 "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n",
321 * allocate blocks in dram.
322 * since that CSS allocated in fw_paging_db[0] loop start from index 1
324 for (blk_idx = 1; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) {
325 /* allocate block of PAGING_BLOCK_SIZE (32K) */
326 order = get_order(PAGING_BLOCK_SIZE);
327 block = alloc_pages(GFP_KERNEL, order);
329 /* free all the previous pages since we failed */
330 iwl_free_fw_paging(mvm);
334 mvm->fw_paging_db[blk_idx].fw_paging_block = block;
335 mvm->fw_paging_db[blk_idx].fw_paging_size = PAGING_BLOCK_SIZE;
338 phys = dma_map_page(mvm->trans->dev, block, 0,
341 if (dma_mapping_error(mvm->trans->dev, phys)) {
343 * free the previous pages and the current one
344 * since we failed to map_page.
346 iwl_free_fw_paging(mvm);
349 mvm->fw_paging_db[blk_idx].fw_paging_phys = phys;
351 mvm->fw_paging_db[blk_idx].fw_paging_phys =
353 blk_idx << BLOCK_2_EXP_SIZE;
357 "Paging: allocated 32K bytes (order %d) for firmware paging.\n",
364 static int iwl_save_fw_paging(struct iwl_mvm *mvm,
365 const struct fw_img *fw)
369 ret = iwl_alloc_fw_paging_mem(mvm, fw);
373 return iwl_fill_paging_mem(mvm, fw);
376 /* send paging cmd to FW in case CPU2 has paging image */
377 static int iwl_send_paging_cmd(struct iwl_mvm *mvm, const struct fw_img *fw)
379 struct iwl_fw_paging_cmd paging_cmd = {
381 cpu_to_le32(PAGING_CMD_IS_SECURED |
382 PAGING_CMD_IS_ENABLED |
383 (mvm->num_of_pages_in_last_blk <<
384 PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS)),
385 .block_size = cpu_to_le32(BLOCK_2_EXP_SIZE),
386 .block_num = cpu_to_le32(mvm->num_of_paging_blk),
388 int blk_idx, size = sizeof(paging_cmd);
390 /* A bit hard coded - but this is the old API and will be deprecated */
391 if (!iwl_mvm_has_new_tx_api(mvm))
392 size -= NUM_OF_FW_PAGING_BLOCKS * 4;
394 /* loop for for all paging blocks + CSS block */
395 for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) {
396 dma_addr_t addr = mvm->fw_paging_db[blk_idx].fw_paging_phys;
398 addr = addr >> PAGE_2_EXP_SIZE;
400 if (iwl_mvm_has_new_tx_api(mvm)) {
401 __le64 phy_addr = cpu_to_le64(addr);
403 paging_cmd.device_phy_addr.addr64[blk_idx] = phy_addr;
405 __le32 phy_addr = cpu_to_le32(addr);
407 paging_cmd.device_phy_addr.addr32[blk_idx] = phy_addr;
411 return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(FW_PAGING_BLOCK_CMD,
412 IWL_ALWAYS_LONG_GROUP, 0),
413 0, size, &paging_cmd);
417 * Send paging item cmd to FW in case CPU2 has paging image
419 static int iwl_trans_get_paging_item(struct iwl_mvm *mvm)
422 struct iwl_fw_get_item_cmd fw_get_item_cmd = {
423 .item_id = cpu_to_le32(IWL_FW_ITEM_ID_PAGING),
426 struct iwl_fw_get_item_resp *item_resp;
427 struct iwl_host_cmd cmd = {
428 .id = iwl_cmd_id(FW_GET_ITEM_CMD, IWL_ALWAYS_LONG_GROUP, 0),
429 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
430 .data = { &fw_get_item_cmd, },
433 cmd.len[0] = sizeof(struct iwl_fw_get_item_cmd);
435 ret = iwl_mvm_send_cmd(mvm, &cmd);
438 "Paging: Failed to send FW_GET_ITEM_CMD cmd (err = %d)\n",
443 item_resp = (void *)((struct iwl_rx_packet *)cmd.resp_pkt)->data;
444 if (item_resp->item_id != cpu_to_le32(IWL_FW_ITEM_ID_PAGING)) {
446 "Paging: got wrong item in FW_GET_ITEM_CMD resp (item_id = %u)\n",
447 le32_to_cpu(item_resp->item_id));
452 /* Add an extra page for headers */
453 mvm->trans->paging_download_buf = kzalloc(PAGING_BLOCK_SIZE +
456 if (!mvm->trans->paging_download_buf) {
460 mvm->trans->paging_req_addr = le32_to_cpu(item_resp->item_val);
461 mvm->trans->paging_db = mvm->fw_paging_db;
463 "Paging: got paging request address (paging_req_addr 0x%08x)\n",
464 mvm->trans->paging_req_addr);
472 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
473 struct iwl_rx_packet *pkt, void *data)
475 struct iwl_mvm *mvm =
476 container_of(notif_wait, struct iwl_mvm, notif_wait);
477 struct iwl_mvm_alive_data *alive_data = data;
478 struct mvm_alive_resp_ver1 *palive1;
479 struct mvm_alive_resp_ver2 *palive2;
480 struct mvm_alive_resp *palive;
482 if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive1)) {
483 palive1 = (void *)pkt->data;
485 mvm->support_umac_log = false;
486 mvm->error_event_table =
487 le32_to_cpu(palive1->error_event_table_ptr);
488 mvm->log_event_table =
489 le32_to_cpu(palive1->log_event_table_ptr);
490 alive_data->scd_base_addr = le32_to_cpu(palive1->scd_base_ptr);
492 alive_data->valid = le16_to_cpu(palive1->status) ==
495 "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
496 le16_to_cpu(palive1->status), palive1->ver_type,
497 palive1->ver_subtype, palive1->flags);
498 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive2)) {
499 palive2 = (void *)pkt->data;
501 mvm->error_event_table =
502 le32_to_cpu(palive2->error_event_table_ptr);
503 mvm->log_event_table =
504 le32_to_cpu(palive2->log_event_table_ptr);
505 alive_data->scd_base_addr = le32_to_cpu(palive2->scd_base_ptr);
506 mvm->umac_error_event_table =
507 le32_to_cpu(palive2->error_info_addr);
508 mvm->sf_space.addr = le32_to_cpu(palive2->st_fwrd_addr);
509 mvm->sf_space.size = le32_to_cpu(palive2->st_fwrd_size);
511 alive_data->valid = le16_to_cpu(palive2->status) ==
513 if (mvm->umac_error_event_table)
514 mvm->support_umac_log = true;
517 "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
518 le16_to_cpu(palive2->status), palive2->ver_type,
519 palive2->ver_subtype, palive2->flags);
522 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
523 palive2->umac_major, palive2->umac_minor);
524 } else if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
525 palive = (void *)pkt->data;
527 mvm->error_event_table =
528 le32_to_cpu(palive->error_event_table_ptr);
529 mvm->log_event_table =
530 le32_to_cpu(palive->log_event_table_ptr);
531 alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr);
532 mvm->umac_error_event_table =
533 le32_to_cpu(palive->error_info_addr);
534 mvm->sf_space.addr = le32_to_cpu(palive->st_fwrd_addr);
535 mvm->sf_space.size = le32_to_cpu(palive->st_fwrd_size);
537 alive_data->valid = le16_to_cpu(palive->status) ==
539 if (mvm->umac_error_event_table)
540 mvm->support_umac_log = true;
543 "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
544 le16_to_cpu(palive->status), palive->ver_type,
545 palive->ver_subtype, palive->flags);
548 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
549 le32_to_cpu(palive->umac_major),
550 le32_to_cpu(palive->umac_minor));
556 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
557 struct iwl_rx_packet *pkt, void *data)
559 struct iwl_phy_db *phy_db = data;
561 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
562 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
566 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
571 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
572 enum iwl_ucode_type ucode_type)
574 struct iwl_notification_wait alive_wait;
575 struct iwl_mvm_alive_data alive_data;
576 const struct fw_img *fw;
578 enum iwl_ucode_type old_type = mvm->cur_ucode;
579 static const u16 alive_cmd[] = { MVM_ALIVE };
580 struct iwl_sf_region st_fwrd_space;
582 if (ucode_type == IWL_UCODE_REGULAR &&
583 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
584 !(fw_has_capa(&mvm->fw->ucode_capa,
585 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
586 fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
588 fw = iwl_get_ucode_image(mvm->fw, ucode_type);
591 mvm->cur_ucode = ucode_type;
592 mvm->ucode_loaded = false;
594 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
595 alive_cmd, ARRAY_SIZE(alive_cmd),
596 iwl_alive_fn, &alive_data);
598 ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
600 mvm->cur_ucode = old_type;
601 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
606 * Some things may run in the background now, but we
607 * just wait for the ALIVE notification here.
609 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
610 MVM_UCODE_ALIVE_TIMEOUT);
612 if (mvm->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
614 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
615 iwl_read_prph(mvm->trans, SB_CPU_1_STATUS),
616 iwl_read_prph(mvm->trans, SB_CPU_2_STATUS));
617 mvm->cur_ucode = old_type;
621 if (!alive_data.valid) {
622 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
623 mvm->cur_ucode = old_type;
628 * update the sdio allocation according to the pointer we get in the
629 * alive notification.
631 st_fwrd_space.addr = mvm->sf_space.addr;
632 st_fwrd_space.size = mvm->sf_space.size;
633 ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space);
635 IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret);
639 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
642 * configure and operate fw paging mechanism.
643 * driver configures the paging flow only once, CPU2 paging image
644 * included in the IWL_UCODE_INIT image.
646 if (fw->paging_mem_size) {
648 * When dma is not enabled, the driver needs to copy / write
649 * the downloaded / uploaded page to / from the smem.
650 * This gets the location of the place were the pages are
653 if (!is_device_dma_capable(mvm->trans->dev)) {
654 ret = iwl_trans_get_paging_item(mvm);
656 IWL_ERR(mvm, "failed to get FW paging item\n");
661 ret = iwl_save_fw_paging(mvm, fw);
663 IWL_ERR(mvm, "failed to save the FW paging image\n");
667 ret = iwl_send_paging_cmd(mvm, fw);
669 IWL_ERR(mvm, "failed to send the paging cmd\n");
670 iwl_free_fw_paging(mvm);
676 * Note: all the queues are enabled as part of the interface
677 * initialization, but in firmware restart scenarios they
678 * could be stopped, so wake them up. In firmware restart,
679 * mac80211 will have the queues stopped as well until the
680 * reconfiguration completes. During normal startup, they
684 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
685 if (iwl_mvm_is_dqa_supported(mvm))
686 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1;
688 mvm->queue_info[IWL_MVM_CMD_QUEUE].hw_queue_refcount = 1;
690 for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
691 atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
693 mvm->ucode_loaded = true;
698 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
700 struct iwl_phy_cfg_cmd phy_cfg_cmd;
701 enum iwl_ucode_type ucode_type = mvm->cur_ucode;
704 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
705 phy_cfg_cmd.calib_control.event_trigger =
706 mvm->fw->default_calib[ucode_type].event_trigger;
707 phy_cfg_cmd.calib_control.flow_trigger =
708 mvm->fw->default_calib[ucode_type].flow_trigger;
710 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
711 phy_cfg_cmd.phy_cfg);
713 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
714 sizeof(phy_cfg_cmd), &phy_cfg_cmd);
717 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
719 struct iwl_notification_wait calib_wait;
720 static const u16 init_complete[] = {
722 CALIB_RES_NOTIF_PHY_DB
726 lockdep_assert_held(&mvm->mutex);
728 if (WARN_ON_ONCE(mvm->calibrating))
731 iwl_init_notification_wait(&mvm->notif_wait,
734 ARRAY_SIZE(init_complete),
735 iwl_wait_phy_db_entry,
738 /* Will also start the device */
739 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
741 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
745 ret = iwl_send_bt_init_conf(mvm);
749 /* Read the NVM only at driver load time, no need to do this twice */
752 ret = iwl_nvm_init(mvm, true);
754 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
759 /* In case we read the NVM from external file, load it to the NIC */
760 if (mvm->nvm_file_name)
761 iwl_mvm_load_nvm_to_nic(mvm);
763 ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans);
767 * abort after reading the nvm in case RF Kill is on, we will complete
768 * the init seq later when RF kill will switch to off
770 if (iwl_mvm_is_radio_hw_killed(mvm)) {
771 IWL_DEBUG_RF_KILL(mvm,
772 "jump over all phy activities due to RF kill\n");
773 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
778 mvm->calibrating = true;
780 /* Send TX valid antennas before triggering calibrations */
781 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
786 * Send phy configurations command to init uCode
787 * to start the 16.0 uCode init image internal calibrations.
789 ret = iwl_send_phy_cfg_cmd(mvm);
791 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
797 * Some things may run in the background now, but we
798 * just wait for the calibration complete notification.
800 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
801 MVM_UCODE_CALIB_TIMEOUT);
803 if (ret && iwl_mvm_is_radio_hw_killed(mvm)) {
804 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
810 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
812 mvm->calibrating = false;
813 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
814 /* we want to debug INIT and we have no NVM - fake */
815 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
816 sizeof(struct ieee80211_channel) +
817 sizeof(struct ieee80211_rate),
821 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
822 mvm->nvm_data->bands[0].n_channels = 1;
823 mvm->nvm_data->bands[0].n_bitrates = 1;
824 mvm->nvm_data->bands[0].bitrates =
825 (void *)mvm->nvm_data->channels + 1;
826 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
832 static void iwl_mvm_parse_shared_mem_a000(struct iwl_mvm *mvm,
833 struct iwl_rx_packet *pkt)
835 struct iwl_shared_mem_cfg *mem_cfg = (void *)pkt->data;
838 mvm->shared_mem_cfg.num_txfifo_entries =
839 ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size);
840 for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++)
841 mvm->shared_mem_cfg.txfifo_size[i] =
842 le32_to_cpu(mem_cfg->txfifo_size[i]);
843 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++)
844 mvm->shared_mem_cfg.rxfifo_size[i] =
845 le32_to_cpu(mem_cfg->rxfifo_size[i]);
847 BUILD_BUG_ON(sizeof(mvm->shared_mem_cfg.internal_txfifo_size) !=
848 sizeof(mem_cfg->internal_txfifo_size));
850 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.internal_txfifo_size);
852 mvm->shared_mem_cfg.internal_txfifo_size[i] =
853 le32_to_cpu(mem_cfg->internal_txfifo_size[i]);
856 static void iwl_mvm_parse_shared_mem(struct iwl_mvm *mvm,
857 struct iwl_rx_packet *pkt)
859 struct iwl_shared_mem_cfg_v1 *mem_cfg = (void *)pkt->data;
862 mvm->shared_mem_cfg.num_txfifo_entries =
863 ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size);
864 for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++)
865 mvm->shared_mem_cfg.txfifo_size[i] =
866 le32_to_cpu(mem_cfg->txfifo_size[i]);
867 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++)
868 mvm->shared_mem_cfg.rxfifo_size[i] =
869 le32_to_cpu(mem_cfg->rxfifo_size[i]);
871 /* new API has more data, from rxfifo_addr field and on */
872 if (fw_has_capa(&mvm->fw->ucode_capa,
873 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
874 BUILD_BUG_ON(sizeof(mvm->shared_mem_cfg.internal_txfifo_size) !=
875 sizeof(mem_cfg->internal_txfifo_size));
878 i < ARRAY_SIZE(mvm->shared_mem_cfg.internal_txfifo_size);
880 mvm->shared_mem_cfg.internal_txfifo_size[i] =
881 le32_to_cpu(mem_cfg->internal_txfifo_size[i]);
885 static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm)
887 struct iwl_host_cmd cmd = {
888 .flags = CMD_WANT_SKB,
892 struct iwl_rx_packet *pkt;
894 lockdep_assert_held(&mvm->mutex);
896 if (fw_has_capa(&mvm->fw->ucode_capa,
897 IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG))
898 cmd.id = iwl_cmd_id(SHARED_MEM_CFG_CMD, SYSTEM_GROUP, 0);
900 cmd.id = SHARED_MEM_CFG;
902 if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd)))
906 if (iwl_mvm_has_new_tx_api(mvm))
907 iwl_mvm_parse_shared_mem_a000(mvm, pkt);
909 iwl_mvm_parse_shared_mem(mvm, pkt);
911 IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n");
916 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
918 struct iwl_ltr_config_cmd cmd = {
919 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
922 if (!mvm->trans->ltr_enabled)
925 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
929 #define ACPI_WRDS_METHOD "WRDS"
930 #define ACPI_WRDS_WIFI (0x07)
931 #define ACPI_WRDS_TABLE_SIZE 10
933 struct iwl_mvm_sar_table {
935 u8 values[ACPI_WRDS_TABLE_SIZE];
939 static int iwl_mvm_sar_get_wrds(struct iwl_mvm *mvm, union acpi_object *wrds,
940 struct iwl_mvm_sar_table *sar_table)
942 union acpi_object *data_pkg;
945 /* We need at least two packages, one for the revision and one
946 * for the data itself. Also check that the revision is valid
947 * (i.e. it is an integer set to 0).
949 if (wrds->type != ACPI_TYPE_PACKAGE ||
950 wrds->package.count < 2 ||
951 wrds->package.elements[0].type != ACPI_TYPE_INTEGER ||
952 wrds->package.elements[0].integer.value != 0) {
953 IWL_DEBUG_RADIO(mvm, "Unsupported wrds structure\n");
957 /* loop through all the packages to find the one for WiFi */
958 for (i = 1; i < wrds->package.count; i++) {
959 union acpi_object *domain;
961 data_pkg = &wrds->package.elements[i];
963 /* Skip anything that is not a package with the right
964 * amount of elements (i.e. domain_type,
965 * enabled/disabled plus the sar table size.
967 if (data_pkg->type != ACPI_TYPE_PACKAGE ||
968 data_pkg->package.count != ACPI_WRDS_TABLE_SIZE + 2)
971 domain = &data_pkg->package.elements[0];
972 if (domain->type == ACPI_TYPE_INTEGER &&
973 domain->integer.value == ACPI_WRDS_WIFI)
982 if (data_pkg->package.elements[1].type != ACPI_TYPE_INTEGER)
985 sar_table->enabled = !!(data_pkg->package.elements[1].integer.value);
987 for (i = 0; i < ACPI_WRDS_TABLE_SIZE; i++) {
988 union acpi_object *entry;
990 entry = &data_pkg->package.elements[i + 2];
991 if ((entry->type != ACPI_TYPE_INTEGER) ||
992 (entry->integer.value > U8_MAX))
995 sar_table->values[i] = entry->integer.value;
1001 static int iwl_mvm_sar_get_table(struct iwl_mvm *mvm,
1002 struct iwl_mvm_sar_table *sar_table)
1004 acpi_handle root_handle;
1006 struct acpi_buffer wrds = {ACPI_ALLOCATE_BUFFER, NULL};
1010 root_handle = ACPI_HANDLE(mvm->dev);
1012 IWL_DEBUG_RADIO(mvm,
1013 "Could not retrieve root port ACPI handle\n");
1017 /* Get the method's handle */
1018 status = acpi_get_handle(root_handle, (acpi_string)ACPI_WRDS_METHOD,
1020 if (ACPI_FAILURE(status)) {
1021 IWL_DEBUG_RADIO(mvm, "WRDS method not found\n");
1025 /* Call WRDS with no arguments */
1026 status = acpi_evaluate_object(handle, NULL, NULL, &wrds);
1027 if (ACPI_FAILURE(status)) {
1028 IWL_DEBUG_RADIO(mvm, "WRDS invocation failed (0x%x)\n", status);
1032 ret = iwl_mvm_sar_get_wrds(mvm, wrds.pointer, sar_table);
1033 kfree(wrds.pointer);
1037 #else /* CONFIG_ACPI */
1038 static int iwl_mvm_sar_get_table(struct iwl_mvm *mvm,
1039 struct iwl_mvm_sar_table *sar_table)
1043 #endif /* CONFIG_ACPI */
1045 static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1047 struct iwl_mvm_sar_table sar_table;
1048 struct iwl_dev_tx_power_cmd cmd = {
1049 .v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
1052 int len = sizeof(cmd);
1054 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
1055 len = sizeof(cmd.v3);
1057 ret = iwl_mvm_sar_get_table(mvm, &sar_table);
1059 IWL_DEBUG_RADIO(mvm,
1060 "SAR BIOS table invalid or unavailable. (%d)\n",
1062 /* we don't fail if the table is not available */
1066 if (!sar_table.enabled)
1069 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
1071 BUILD_BUG_ON(IWL_NUM_CHAIN_LIMITS * IWL_NUM_SUB_BANDS !=
1072 ACPI_WRDS_TABLE_SIZE);
1074 for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
1075 IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i);
1076 for (j = 0; j < IWL_NUM_SUB_BANDS; j++) {
1077 idx = (i * IWL_NUM_SUB_BANDS) + j;
1078 cmd.v3.per_chain_restriction[i][j] =
1079 cpu_to_le16(sar_table.values[idx]);
1080 IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n",
1081 j, sar_table.values[idx]);
1085 ret = iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
1087 IWL_ERR(mvm, "failed to set per-chain TX power: %d\n", ret);
1092 int iwl_mvm_up(struct iwl_mvm *mvm)
1095 struct ieee80211_channel *chan;
1096 struct cfg80211_chan_def chandef;
1098 lockdep_assert_held(&mvm->mutex);
1100 ret = iwl_trans_start_hw(mvm->trans);
1105 * If we haven't completed the run of the init ucode during
1106 * module loading, load init ucode now
1107 * (for example, if we were in RFKILL)
1109 ret = iwl_run_init_mvm_ucode(mvm, false);
1111 if (iwlmvm_mod_params.init_dbg)
1115 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1116 /* this can't happen */
1117 if (WARN_ON(ret > 0))
1123 * Stop and start the transport without entering low power
1124 * mode. This will save the state of other components on the
1125 * device that are triggered by the INIT firwmare (MFUART).
1127 _iwl_trans_stop_device(mvm->trans, false);
1128 ret = _iwl_trans_start_hw(mvm->trans, false);
1132 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1134 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1138 iwl_mvm_get_shared_mem_conf(mvm);
1140 ret = iwl_mvm_sf_update(mvm, NULL, false);
1142 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1144 mvm->fw_dbg_conf = FW_DBG_INVALID;
1145 /* if we have a destination, assume EARLY START */
1146 if (mvm->fw->dbg_dest_tlv)
1147 mvm->fw_dbg_conf = FW_DBG_START_FROM_ALIVE;
1148 iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_START_FROM_ALIVE);
1150 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1154 ret = iwl_send_bt_init_conf(mvm);
1158 /* Send phy db control command and then phy db calibration*/
1159 ret = iwl_send_phy_db_data(mvm->phy_db);
1163 ret = iwl_send_phy_cfg_cmd(mvm);
1167 /* Init RSS configuration */
1168 if (iwl_mvm_has_new_rx_api(mvm)) {
1169 ret = iwl_send_rss_cfg_cmd(mvm);
1171 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1177 /* init the fw <-> mac80211 STA mapping */
1178 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
1179 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1181 mvm->tdls_cs.peer.sta_id = IWL_MVM_STATION_COUNT;
1183 /* reset quota debouncing buffer - 0xff will yield invalid data */
1184 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1186 /* Enable DQA-mode if required */
1187 if (iwl_mvm_is_dqa_supported(mvm)) {
1188 ret = iwl_mvm_send_dqa_cmd(mvm);
1192 IWL_DEBUG_FW(mvm, "Working in non-DQA mode\n");
1195 /* Add auxiliary station for scanning */
1196 ret = iwl_mvm_add_aux_sta(mvm);
1200 /* Add all the PHY contexts */
1201 chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0];
1202 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
1203 for (i = 0; i < NUM_PHY_CTX; i++) {
1205 * The channel used here isn't relevant as it's
1206 * going to be overwritten in the other flows.
1207 * For now use the first channel we have.
1209 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
1215 #ifdef CONFIG_THERMAL
1216 if (iwl_mvm_is_tt_in_fw(mvm)) {
1217 /* in order to give the responsibility of ct-kill and
1218 * TX backoff to FW we need to send empty temperature reporting
1219 * cmd during init time
1221 iwl_mvm_send_temp_report_ths_cmd(mvm);
1223 /* Initialize tx backoffs to the minimal possible */
1224 iwl_mvm_tt_tx_backoff(mvm, 0);
1227 /* TODO: read the budget from BIOS / Platform NVM */
1228 if (iwl_mvm_is_ctdp_supported(mvm) && mvm->cooling_dev.cur_state > 0) {
1229 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1230 mvm->cooling_dev.cur_state);
1235 /* Initialize tx backoffs to the minimal possible */
1236 iwl_mvm_tt_tx_backoff(mvm, 0);
1239 WARN_ON(iwl_mvm_config_ltr(mvm));
1241 ret = iwl_mvm_power_update_device(mvm);
1246 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1247 * anyway, so don't init MCC.
1249 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1250 ret = iwl_mvm_init_mcc(mvm);
1255 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1256 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1257 ret = iwl_mvm_config_scan(mvm);
1262 if (iwl_mvm_is_csum_supported(mvm) &&
1263 mvm->cfg->features & NETIF_F_RXCSUM)
1264 iwl_trans_write_prph(mvm->trans, RX_EN_CSUM, 0x3);
1266 /* allow FW/transport low power modes if not during restart */
1267 if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
1268 iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
1270 ret = iwl_mvm_sar_init(mvm);
1274 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1277 iwl_mvm_stop_device(mvm);
1281 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1285 lockdep_assert_held(&mvm->mutex);
1287 ret = iwl_trans_start_hw(mvm->trans);
1291 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1293 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1297 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1301 /* Send phy db control command and then phy db calibration*/
1302 ret = iwl_send_phy_db_data(mvm->phy_db);
1306 ret = iwl_send_phy_cfg_cmd(mvm);
1310 /* init the fw <-> mac80211 STA mapping */
1311 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
1312 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1314 /* Add auxiliary station for scanning */
1315 ret = iwl_mvm_add_aux_sta(mvm);
1321 iwl_mvm_stop_device(mvm);
1325 void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
1326 struct iwl_rx_cmd_buffer *rxb)
1328 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1329 struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
1330 u32 flags = le32_to_cpu(card_state_notif->flags);
1332 IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
1333 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
1334 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
1335 (flags & CT_KILL_CARD_DISABLED) ?
1336 "Reached" : "Not reached");
1339 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1340 struct iwl_rx_cmd_buffer *rxb)
1342 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1343 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1346 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1347 le32_to_cpu(mfuart_notif->installed_ver),
1348 le32_to_cpu(mfuart_notif->external_ver),
1349 le32_to_cpu(mfuart_notif->status),
1350 le32_to_cpu(mfuart_notif->duration));