drivers/net/wireless/realtek/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include "wifi.h"
  31 #include "core.h"
  32 #include "pci.h"
  33 #include "base.h"
  34 #include "ps.h"
  35 #include "efuse.h"
  36 #include <linux/interrupt.h>
  37 #include <linux/export.h>
  38 #include <linux/kmemleak.h>
  39 #include <linux/module.h>
  40
  41 MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
  42 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
  43 MODULE_AUTHOR("Larry Finger     <Larry.FInger@lwfinger.net>");
  44 MODULE_LICENSE("GPL");
  45 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
  46
  47 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  48         INTEL_VENDOR_ID,
  49         ATI_VENDOR_ID,
  50         AMD_VENDOR_ID,
  51         SIS_VENDOR_ID
  52 };
  53
  54 static const u8 ac_to_hwq[] = {
  55         VO_QUEUE,
  56         VI_QUEUE,
  57         BE_QUEUE,
  58         BK_QUEUE
  59 };
  60
  61 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  62                        struct sk_buff *skb)
  63 {
  64         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  65         __le16 fc = rtl_get_fc(skb);
  66         u8 queue_index = skb_get_queue_mapping(skb);
  67
  68         if (unlikely(ieee80211_is_beacon(fc)))
  69                 return BEACON_QUEUE;
  70         if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  71                 return MGNT_QUEUE;
  72         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  73                 if (ieee80211_is_nullfunc(fc))
  74                         return HIGH_QUEUE;
  75
  76         return ac_to_hwq[queue_index];
  77 }
  78
  79 /* Update PCI dependent default settings*/
  80 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  81 {
  82         struct rtl_priv *rtlpriv = rtl_priv(hw);
  83         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  84         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  85         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  86         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  87         u8 init_aspm;
  88
  89         ppsc->reg_rfps_level = 0;
  90         ppsc->support_aspm = false;
  91
  92         /*Update PCI ASPM setting */
  93         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  94         switch (rtlpci->const_pci_aspm) {
  95         case 0:
  96                 /*No ASPM */
  97                 break;
  98
  99         case 1:
 100                 /*ASPM dynamically enabled/disable. */
 101                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
 102                 break;
 103
 104         case 2:
 105                 /*ASPM with Clock Req dynamically enabled/disable. */
 106                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
 107                                          RT_RF_OFF_LEVL_CLK_REQ);
 108                 break;
 109
 110         case 3:
 111                 /*
 112                  * Always enable ASPM and Clock Req
 113                  * from initialization to halt.
 114                  * */
 115                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 116                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 117                                          RT_RF_OFF_LEVL_CLK_REQ);
 118                 break;
 119
 120         case 4:
 121                 /*
 122                  * Always enable ASPM without Clock Req
 123                  * from initialization to halt.
 124                  * */
 125                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 126                                           RT_RF_OFF_LEVL_CLK_REQ);
 127                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 128                 break;
 129         }
 130
 131         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 132
 133         /*Update Radio OFF setting */
 134         switch (rtlpci->const_hwsw_rfoff_d3) {
 135         case 1:
 136                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 137                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 138                 break;
 139
 140         case 2:
 141                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 142                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 143                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 144                 break;
 145
 146         case 3:
 147                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 148                 break;
 149         }
 150
 151         /*Set HW definition to determine if it supports ASPM. */
 152         switch (rtlpci->const_support_pciaspm) {
 153         case 0:{
 154                         /*Not support ASPM. */
 155                         bool support_aspm = false;
 156                         ppsc->support_aspm = support_aspm;
 157                         break;
 158                 }
 159         case 1:{
 160                         /*Support ASPM. */
 161                         bool support_aspm = true;
 162                         bool support_backdoor = true;
 163                         ppsc->support_aspm = support_aspm;
 164
 165                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 166                            !priv->ndis_adapter.amd_l1_patch)
 167                            support_backdoor = false; */
 168
 169                         ppsc->support_backdoor = support_backdoor;
 170
 171                         break;
 172                 }
 173         case 2:
 174                 /*ASPM value set by chipset. */
 175                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 176                         bool support_aspm = true;
 177                         ppsc->support_aspm = support_aspm;
 178                 }
 179                 break;
 180         default:
 181                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
 182                          "switch case %#x not processed\n",
 183                          rtlpci->const_support_pciaspm);
 184                 break;
 185         }
 186
 187         /* toshiba aspm issue, toshiba will set aspm selfly
 188          * so we should not set aspm in driver */
 189         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 190         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 191                 init_aspm == 0x43)
 192                 ppsc->support_aspm = false;
 193 }
 194
 195 static bool _rtl_pci_platform_switch_device_pci_aspm(
 196                         struct ieee80211_hw *hw,
 197                         u8 value)
 198 {
 199         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 200         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 201
 202         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 203                 value |= 0x40;
 204
 205         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 206
 207         return false;
 208 }
 209
 210 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 211 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 212 {
 213         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 214         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 215
 216         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 217
 218         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 219                 udelay(100);
 220 }
 221
 222 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 223 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 224 {
 225         struct rtl_priv *rtlpriv = rtl_priv(hw);
 226         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 227         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 228         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 229         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 230         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 231         /*Retrieve original configuration settings. */
 232         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 233         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 234                                 pcibridge_linkctrlreg;
 235         u16 aspmlevel = 0;
 236         u8 tmp_u1b = 0;
 237
 238         if (!ppsc->support_aspm)
 239                 return;
 240
 241         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 242                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 243                          "PCI(Bridge) UNKNOWN\n");
 244
 245                 return;
 246         }
 247
 248         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 249                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 250                 _rtl_pci_switch_clk_req(hw, 0x0);
 251         }
 252
 253         /*for promising device will in L0 state after an I/O. */
 254         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 255
 256         /*Set corresponding value. */
 257         aspmlevel |= BIT(0) | BIT(1);
 258         linkctrl_reg &= ~aspmlevel;
 259         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 260
 261         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 262         udelay(50);
 263
 264         /*4 Disable Pci Bridge ASPM */
 265         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 266                               pcibridge_linkctrlreg);
 267
 268         udelay(50);
 269 }
 270
 271 /*
 272  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 273  *power saving We should follow the sequence to enable
 274  *RTL8192SE first then enable Pci Bridge ASPM
 275  *or the system will show bluescreen.
 276  */
 277 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 278 {
 279         struct rtl_priv *rtlpriv = rtl_priv(hw);
 280         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 281         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 282         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 283         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 284         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 285         u16 aspmlevel;
 286         u8 u_pcibridge_aspmsetting;
 287         u8 u_device_aspmsetting;
 288
 289         if (!ppsc->support_aspm)
 290                 return;
 291
 292         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 293                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 294                          "PCI(Bridge) UNKNOWN\n");
 295                 return;
 296         }
 297
 298         /*4 Enable Pci Bridge ASPM */
 299
 300         u_pcibridge_aspmsetting =
 301             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 302             rtlpci->const_hostpci_aspm_setting;
 303
 304         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 305                 u_pcibridge_aspmsetting &= ~BIT(0);
 306
 307         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 308                               u_pcibridge_aspmsetting);
 309
 310         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 311                  "PlatformEnableASPM(): Write reg[%x] = %x\n",
 312                  (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 313                  u_pcibridge_aspmsetting);
 314
 315         udelay(50);
 316
 317         /*Get ASPM level (with/without Clock Req) */
 318         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 319         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 320
 321         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 322         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 323
 324         u_device_aspmsetting |= aspmlevel;
 325
 326         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 327
 328         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 329                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 330                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 331                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 332         }
 333         udelay(100);
 334 }
 335
 336 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 337 {
 338         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 339
 340         bool status = false;
 341         u8 offset_e0;
 342         unsigned offset_e4;
 343
 344         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 345
 346         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 347
 348         if (offset_e0 == 0xA0) {
 349                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 350                 if (offset_e4 & BIT(23))
 351                         status = true;
 352         }
 353
 354         return status;
 355 }
 356
 357 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
 358                                      struct rtl_priv **buddy_priv)
 359 {
 360         struct rtl_priv *rtlpriv = rtl_priv(hw);
 361         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 362         bool find_buddy_priv = false;
 363         struct rtl_priv *tpriv;
 364         struct rtl_pci_priv *tpcipriv = NULL;
 365
 366         if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
 367                 list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
 368                                     list) {
 369                         tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
 370                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 371                                  "pcipriv->ndis_adapter.funcnumber %x\n",
 372                                 pcipriv->ndis_adapter.funcnumber);
 373                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 374                                  "tpcipriv->ndis_adapter.funcnumber %x\n",
 375                                 tpcipriv->ndis_adapter.funcnumber);
 376
 377                         if ((pcipriv->ndis_adapter.busnumber ==
 378                              tpcipriv->ndis_adapter.busnumber) &&
 379                             (pcipriv->ndis_adapter.devnumber ==
 380                             tpcipriv->ndis_adapter.devnumber) &&
 381                             (pcipriv->ndis_adapter.funcnumber !=
 382                             tpcipriv->ndis_adapter.funcnumber)) {
 383                                 find_buddy_priv = true;
 384                                 break;
 385                         }
 386                 }
 387         }
 388
 389         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 390                  "find_buddy_priv %d\n", find_buddy_priv);
 391
 392         if (find_buddy_priv)
 393                 *buddy_priv = tpriv;
 394
 395         return find_buddy_priv;
 396 }
 397
 398 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 399 {
 400         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 401         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 402         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 403         u8 linkctrl_reg;
 404         u8 num4bbytes;
 405
 406         num4bbytes = (capabilityoffset + 0x10) / 4;
 407
 408         /*Read  Link Control Register */
 409         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 410
 411         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 412 }
 413
 414 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 415                 struct ieee80211_hw *hw)
 416 {
 417         struct rtl_priv *rtlpriv = rtl_priv(hw);
 418         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 419
 420         u8 tmp;
 421         u16 linkctrl_reg;
 422
 423         /*Link Control Register */
 424         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
 425         pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 426
 427         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
 428                  pcipriv->ndis_adapter.linkctrl_reg);
 429
 430         pci_read_config_byte(pdev, 0x98, &tmp);
 431         tmp |= BIT(4);
 432         pci_write_config_byte(pdev, 0x98, tmp);
 433
 434         tmp = 0x17;
 435         pci_write_config_byte(pdev, 0x70f, tmp);
 436 }
 437
 438 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 439 {
 440         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 441
 442         _rtl_pci_update_default_setting(hw);
 443
 444         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 445                 /*Always enable ASPM & Clock Req. */
 446                 rtl_pci_enable_aspm(hw);
 447                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 448         }
 449
 450 }
 451
 452 static void _rtl_pci_io_handler_init(struct device *dev,
 453                                      struct ieee80211_hw *hw)
 454 {
 455         struct rtl_priv *rtlpriv = rtl_priv(hw);
 456
 457         rtlpriv->io.dev = dev;
 458
 459         rtlpriv->io.write8_async = pci_write8_async;
 460         rtlpriv->io.write16_async = pci_write16_async;
 461         rtlpriv->io.write32_async = pci_write32_async;
 462
 463         rtlpriv->io.read8_sync = pci_read8_sync;
 464         rtlpriv->io.read16_sync = pci_read16_sync;
 465         rtlpriv->io.read32_sync = pci_read32_sync;
 466
 467 }
 468
 469 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 470                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 471 {
 472         struct rtl_priv *rtlpriv = rtl_priv(hw);
 473         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 474         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 475         struct sk_buff *next_skb;
 476         u8 additionlen = FCS_LEN;
 477
 478         /* here open is 4, wep/tkip is 8, aes is 12*/
 479         if (info->control.hw_key)
 480                 additionlen += info->control.hw_key->icv_len;
 481
 482         /* The most skb num is 6 */
 483         tcb_desc->empkt_num = 0;
 484         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 485         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 486                 struct ieee80211_tx_info *next_info;
 487
 488                 next_info = IEEE80211_SKB_CB(next_skb);
 489                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 490                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 491                                 next_skb->len + additionlen;
 492                         tcb_desc->empkt_num++;
 493                 } else {
 494                         break;
 495                 }
 496
 497                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 498                                       next_skb))
 499                         break;
 500
 501                 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
 502                         break;
 503         }
 504         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 505
 506         return true;
 507 }
 508
 509 /* just for early mode now */
 510 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 511 {
 512         struct rtl_priv *rtlpriv = rtl_priv(hw);
 513         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 514         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 515         struct sk_buff *skb = NULL;
 516         struct ieee80211_tx_info *info = NULL;
 517         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 518         int tid;
 519
 520         if (!rtlpriv->rtlhal.earlymode_enable)
 521                 return;
 522
 523         if (rtlpriv->dm.supp_phymode_switch &&
 524             (rtlpriv->easy_concurrent_ctl.switch_in_process ||
 525             (rtlpriv->buddy_priv &&
 526             rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
 527                 return;
 528         /* we juse use em for BE/BK/VI/VO */
 529         for (tid = 7; tid >= 0; tid--) {
 530                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
 531                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 532                 while (!mac->act_scanning &&
 533                        rtlpriv->psc.rfpwr_state == ERFON) {
 534                         struct rtl_tcb_desc tcb_desc;
 535                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 536
 537                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 538                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 539                             (ring->entries - skb_queue_len(&ring->queue) >
 540                              rtlhal->max_earlymode_num)) {
 541                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 542                         } else {
 543                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 544                                 break;
 545                         }
 546                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 547
 548                         /* Some macaddr can't do early mode. like
 549                          * multicast/broadcast/no_qos data */
 550                         info = IEEE80211_SKB_CB(skb);
 551                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 552                                 _rtl_update_earlymode_info(hw, skb,
 553                                                            &tcb_desc, tid);
 554
 555                         rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
 556                 }
 557         }
 558 }
 559
 560
 561 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 562 {
 563         struct rtl_priv *rtlpriv = rtl_priv(hw);
 564         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 565
 566         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 567
 568         while (skb_queue_len(&ring->queue)) {
 569                 struct sk_buff *skb;
 570                 struct ieee80211_tx_info *info;
 571                 __le16 fc;
 572                 u8 tid;
 573                 u8 *entry;
 574
 575                 if (rtlpriv->use_new_trx_flow)
 576                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
 577                 else
 578                         entry = (u8 *)(&ring->desc[ring->idx]);
 579
 580                 if (rtlpriv->cfg->ops->get_available_desc &&
 581                     rtlpriv->cfg->ops->get_available_desc(hw, prio) <= 1) {
 582                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_DMESG,
 583                                  "no available desc!\n");
 584                         return;
 585                 }
 586
 587                 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
 588                         return;
 589                 ring->idx = (ring->idx + 1) % ring->entries;
 590
 591                 skb = __skb_dequeue(&ring->queue);
 592                 pci_unmap_single(rtlpci->pdev,
 593                                  rtlpriv->cfg->ops->
 594                                              get_desc((u8 *)entry, true,
 595                                                       HW_DESC_TXBUFF_ADDR),
 596                                  skb->len, PCI_DMA_TODEVICE);
 597
 598                 /* remove early mode header */
 599                 if (rtlpriv->rtlhal.earlymode_enable)
 600                         skb_pull(skb, EM_HDR_LEN);
 601
 602                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 603                          "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
 604                          ring->idx,
 605                          skb_queue_len(&ring->queue),
 606                          *(u16 *)(skb->data + 22));
 607
 608                 if (prio == TXCMD_QUEUE) {
 609                         dev_kfree_skb(skb);
 610                         goto tx_status_ok;
 611
 612                 }
 613
 614                 /* for sw LPS, just after NULL skb send out, we can
 615                  * sure AP knows we are sleeping, we should not let
 616                  * rf sleep
 617                  */
 618                 fc = rtl_get_fc(skb);
 619                 if (ieee80211_is_nullfunc(fc)) {
 620                         if (ieee80211_has_pm(fc)) {
 621                                 rtlpriv->mac80211.offchan_delay = true;
 622                                 rtlpriv->psc.state_inap = true;
 623                         } else {
 624                                 rtlpriv->psc.state_inap = false;
 625                         }
 626                 }
 627                 if (ieee80211_is_action(fc)) {
 628                         struct ieee80211_mgmt *action_frame =
 629                                 (struct ieee80211_mgmt *)skb->data;
 630                         if (action_frame->u.action.u.ht_smps.action ==
 631                             WLAN_HT_ACTION_SMPS) {
 632                                 dev_kfree_skb(skb);
 633                                 goto tx_status_ok;
 634                         }
 635                 }
 636
 637                 /* update tid tx pkt num */
 638                 tid = rtl_get_tid(skb);
 639                 if (tid <= 7)
 640                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 641
 642                 info = IEEE80211_SKB_CB(skb);
 643                 ieee80211_tx_info_clear_status(info);
 644
 645                 info->flags |= IEEE80211_TX_STAT_ACK;
 646                 /*info->status.rates[0].count = 1; */
 647
 648                 ieee80211_tx_status_irqsafe(hw, skb);
 649
 650                 if ((ring->entries - skb_queue_len(&ring->queue)) <= 4) {
 651
 652                         RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG,
 653                                  "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
 654                                  prio, ring->idx,
 655                                  skb_queue_len(&ring->queue));
 656
 657                         ieee80211_wake_queue(hw,
 658                                         skb_get_queue_mapping
 659                                         (skb));
 660                 }
 661 tx_status_ok:
 662                 skb = NULL;
 663         }
 664
 665         if (((rtlpriv->link_info.num_rx_inperiod +
 666                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
 667                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
 668                 rtlpriv->enter_ps = false;
 669                 schedule_work(&rtlpriv->works.lps_change_work);
 670         }
 671 }
 672
 673 static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
 674                                     struct sk_buff *new_skb, u8 *entry,
 675                                     int rxring_idx, int desc_idx)
 676 {
 677         struct rtl_priv *rtlpriv = rtl_priv(hw);
 678         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 679         u32 bufferaddress;
 680         u8 tmp_one = 1;
 681         struct sk_buff *skb;
 682
 683         if (likely(new_skb)) {
 684                 skb = new_skb;
 685                 goto remap;
 686         }
 687         skb = dev_alloc_skb(rtlpci->rxbuffersize);
 688         if (!skb)
 689                 return 0;
 690
 691 remap:
 692         /* just set skb->cb to mapping addr for pci_unmap_single use */
 693         *((dma_addr_t *)skb->cb) =
 694                 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 695                                rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 696         bufferaddress = *((dma_addr_t *)skb->cb);
 697         if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
 698                 return 0;
 699         rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
 700         if (rtlpriv->use_new_trx_flow) {
 701                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 702                                             HW_DESC_RX_PREPARE,
 703                                             (u8 *)&bufferaddress);
 704         } else {
 705                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 706                                             HW_DESC_RXBUFF_ADDR,
 707                                             (u8 *)&bufferaddress);
 708                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 709                                             HW_DESC_RXPKT_LEN,
 710                                             (u8 *)&rtlpci->rxbuffersize);
 711                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 712                                             HW_DESC_RXOWN,
 713                                             (u8 *)&tmp_one);
 714         }
 715         return 1;
 716 }
 717
 718 /* inorder to receive 8K AMSDU we have set skb to
 719  * 9100bytes in init rx ring, but if this packet is
 720  * not a AMSDU, this large packet will be sent to
 721  * TCP/IP directly, this cause big packet ping fail
 722  * like: "ping -s 65507", so here we will realloc skb
 723  * based on the true size of packet, Mac80211
 724  * Probably will do it better, but does not yet.
 725  *
 726  * Some platform will fail when alloc skb sometimes.
 727  * in this condition, we will send the old skb to
 728  * mac80211 directly, this will not cause any other
 729  * issues, but only this packet will be lost by TCP/IP
 730  */
 731 static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
 732                                     struct sk_buff *skb,
 733                                     struct ieee80211_rx_status rx_status)
 734 {
 735         if (unlikely(!rtl_action_proc(hw, skb, false))) {
 736                 dev_kfree_skb_any(skb);
 737         } else {
 738                 struct sk_buff *uskb = NULL;
 739                 u8 *pdata;
 740
 741                 uskb = dev_alloc_skb(skb->len + 128);
 742                 if (likely(uskb)) {
 743                         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
 744                                sizeof(rx_status));
 745                         pdata = (u8 *)skb_put(uskb, skb->len);
 746                         memcpy(pdata, skb->data, skb->len);
 747                         dev_kfree_skb_any(skb);
 748                         ieee80211_rx_irqsafe(hw, uskb);
 749                 } else {
 750                         ieee80211_rx_irqsafe(hw, skb);
 751                 }
 752         }
 753 }
 754
 755 /*hsisr interrupt handler*/
 756 static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
 757 {
 758         struct rtl_priv *rtlpriv = rtl_priv(hw);
 759         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 760
 761         rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
 762                        rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
 763                        rtlpci->sys_irq_mask);
 764 }
 765
 766 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 767 {
 768         struct rtl_priv *rtlpriv = rtl_priv(hw);
 769         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 770         int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
 771         struct ieee80211_rx_status rx_status = { 0 };
 772         unsigned int count = rtlpci->rxringcount;
 773         u8 own;
 774         u8 tmp_one;
 775         bool unicast = false;
 776         u8 hw_queue = 0;
 777         unsigned int rx_remained_cnt;
 778         struct rtl_stats stats = {
 779                 .signal = 0,
 780                 .rate = 0,
 781         };
 782
 783         /*RX NORMAL PKT */
 784         while (count--) {
 785                 struct ieee80211_hdr *hdr;
 786                 __le16 fc;
 787                 u16 len;
 788                 /*rx buffer descriptor */
 789                 struct rtl_rx_buffer_desc *buffer_desc = NULL;
 790                 /*if use new trx flow, it means wifi info */
 791                 struct rtl_rx_desc *pdesc = NULL;
 792                 /*rx pkt */
 793                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
 794                                       rtlpci->rx_ring[rxring_idx].idx];
 795                 struct sk_buff *new_skb;
 796
 797                 if (rtlpriv->use_new_trx_flow) {
 798                         rx_remained_cnt =
 799                                 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
 800                                                                       hw_queue);
 801                         if (rx_remained_cnt == 0)
 802                                 return;
 803                         buffer_desc = &rtlpci->rx_ring[rxring_idx].buffer_desc[
 804                                 rtlpci->rx_ring[rxring_idx].idx];
 805                         pdesc = (struct rtl_rx_desc *)skb->data;
 806                 } else {        /* rx descriptor */
 807                         pdesc = &rtlpci->rx_ring[rxring_idx].desc[
 808                                 rtlpci->rx_ring[rxring_idx].idx];
 809
 810                         own = (u8)rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
 811                                                               false,
 812                                                               HW_DESC_OWN);
 813                         if (own) /* wait data to be filled by hardware */
 814                                 return;
 815                 }
 816
 817                 /* Reaching this point means: data is filled already
 818                  * AAAAAAttention !!!
 819                  * We can NOT access 'skb' before 'pci_unmap_single'
 820                  */
 821                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
 822                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 823
 824                 /* get a new skb - if fail, old one will be reused */
 825                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 826                 if (unlikely(!new_skb))
 827                         goto no_new;
 828                 memset(&rx_status , 0 , sizeof(rx_status));
 829                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 830                                                  &rx_status, (u8 *)pdesc, skb);
 831
 832                 if (rtlpriv->use_new_trx_flow)
 833                         rtlpriv->cfg->ops->rx_check_dma_ok(hw,
 834                                                            (u8 *)buffer_desc,
 835                                                            hw_queue);
 836
 837                 len = rtlpriv->cfg->ops->get_desc((u8 *)pdesc, false,
 838                                                   HW_DESC_RXPKT_LEN);
 839
 840                 if (skb->end - skb->tail > len) {
 841                         skb_put(skb, len);
 842                         if (rtlpriv->use_new_trx_flow)
 843                                 skb_reserve(skb, stats.rx_drvinfo_size +
 844                                             stats.rx_bufshift + 24);
 845                         else
 846                                 skb_reserve(skb, stats.rx_drvinfo_size +
 847                                             stats.rx_bufshift);
 848                 } else {
 849                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 850                                  "skb->end - skb->tail = %d, len is %d\n",
 851                                  skb->end - skb->tail, len);
 852                         dev_kfree_skb_any(skb);
 853                         goto new_trx_end;
 854                 }
 855                 /* handle command packet here */
 856                 if (rtlpriv->cfg->ops->rx_command_packet &&
 857                     rtlpriv->cfg->ops->rx_command_packet(hw, &stats, skb)) {
 858                                 dev_kfree_skb_any(skb);
 859                                 goto new_trx_end;
 860                 }
 861
 862                 /*
 863                  * NOTICE This can not be use for mac80211,
 864                  * this is done in mac80211 code,
 865                  * if done here sec DHCP will fail
 866                  * skb_trim(skb, skb->len - 4);
 867                  */
 868
 869                 hdr = rtl_get_hdr(skb);
 870                 fc = rtl_get_fc(skb);
 871
 872                 if (!stats.crc && !stats.hwerror) {
 873                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 874                                sizeof(rx_status));
 875
 876                         if (is_broadcast_ether_addr(hdr->addr1)) {
 877                                 ;/*TODO*/
 878                         } else if (is_multicast_ether_addr(hdr->addr1)) {
 879                                 ;/*TODO*/
 880                         } else {
 881                                 unicast = true;
 882                                 rtlpriv->stats.rxbytesunicast += skb->len;
 883                         }
 884                         rtl_is_special_data(hw, skb, false, true);
 885
 886                         if (ieee80211_is_data(fc)) {
 887                                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 888                                 if (unicast)
 889                                         rtlpriv->link_info.num_rx_inperiod++;
 890                         }
 891                         /* static bcn for roaming */
 892                         rtl_beacon_statistic(hw, skb);
 893                         rtl_p2p_info(hw, (void *)skb->data, skb->len);
 894                         /* for sw lps */
 895                         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 896                         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 897                         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 898                             (rtlpriv->rtlhal.current_bandtype ==
 899                              BAND_ON_2_4G) &&
 900                             (ieee80211_is_beacon(fc) ||
 901                              ieee80211_is_probe_resp(fc))) {
 902                                 dev_kfree_skb_any(skb);
 903                         } else {
 904                                 _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
 905                         }
 906                 } else {
 907                         dev_kfree_skb_any(skb);
 908                 }
 909 new_trx_end:
 910                 if (rtlpriv->use_new_trx_flow) {
 911                         rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
 912                         rtlpci->rx_ring[hw_queue].next_rx_rp %=
 913                                         RTL_PCI_MAX_RX_COUNT;
 914
 915                         rx_remained_cnt--;
 916                         rtl_write_word(rtlpriv, 0x3B4,
 917                                        rtlpci->rx_ring[hw_queue].next_rx_rp);
 918                 }
 919                 if (((rtlpriv->link_info.num_rx_inperiod +
 920                       rtlpriv->link_info.num_tx_inperiod) > 8) ||
 921                       (rtlpriv->link_info.num_rx_inperiod > 2)) {
 922                         rtlpriv->enter_ps = false;
 923                         schedule_work(&rtlpriv->works.lps_change_work);
 924                 }
 925                 skb = new_skb;
 926 no_new:
 927                 if (rtlpriv->use_new_trx_flow) {
 928                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)buffer_desc,
 929                                                  rxring_idx,
 930                                                  rtlpci->rx_ring[rxring_idx].idx);
 931                 } else {
 932                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)pdesc,
 933                                                  rxring_idx,
 934                                                  rtlpci->rx_ring[rxring_idx].idx);
 935                         if (rtlpci->rx_ring[rxring_idx].idx ==
 936                             rtlpci->rxringcount - 1)
 937                                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
 938                                                             false,
 939                                                             HW_DESC_RXERO,
 940                                                             (u8 *)&tmp_one);
 941                 }
 942                 rtlpci->rx_ring[rxring_idx].idx =
 943                                 (rtlpci->rx_ring[rxring_idx].idx + 1) %
 944                                 rtlpci->rxringcount;
 945         }
 946 }
 947
 948 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 949 {
 950         struct ieee80211_hw *hw = dev_id;
 951         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 952         struct rtl_priv *rtlpriv = rtl_priv(hw);
 953         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 954         unsigned long flags;
 955         u32 inta = 0;
 956         u32 intb = 0;
 957         irqreturn_t ret = IRQ_HANDLED;
 958
 959         if (rtlpci->irq_enabled == 0)
 960                 return ret;
 961
 962         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock , flags);
 963         rtlpriv->cfg->ops->disable_interrupt(hw);
 964
 965         /*read ISR: 4/8bytes */
 966         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 967
 968         /*Shared IRQ or HW disappared */
 969         if (!inta || inta == 0xffff)
 970                 goto done;
 971
 972         /*<1> beacon related */
 973         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 974                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 975                          "beacon ok interrupt!\n");
 976         }
 977
 978         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 979                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 980                          "beacon err interrupt!\n");
 981         }
 982
 983         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 984                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
 985         }
 986
 987         if (inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
 988                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 989                          "prepare beacon for interrupt!\n");
 990                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 991         }
 992
 993         /*<2> Tx related */
 994         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 995                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
 996
 997         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 998                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 999                          "Manage ok interrupt!\n");
1000                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
1001         }
1002
1003         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
1004                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1005                          "HIGH_QUEUE ok interrupt!\n");
1006                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
1007         }
1008
1009         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
1010                 rtlpriv->link_info.num_tx_inperiod++;
1011
1012                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1013                          "BK Tx OK interrupt!\n");
1014                 _rtl_pci_tx_isr(hw, BK_QUEUE);
1015         }
1016
1017         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
1018                 rtlpriv->link_info.num_tx_inperiod++;
1019
1020                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1021                          "BE TX OK interrupt!\n");
1022                 _rtl_pci_tx_isr(hw, BE_QUEUE);
1023         }
1024
1025         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
1026                 rtlpriv->link_info.num_tx_inperiod++;
1027
1028                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1029                          "VI TX OK interrupt!\n");
1030                 _rtl_pci_tx_isr(hw, VI_QUEUE);
1031         }
1032
1033         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
1034                 rtlpriv->link_info.num_tx_inperiod++;
1035
1036                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1037                          "Vo TX OK interrupt!\n");
1038                 _rtl_pci_tx_isr(hw, VO_QUEUE);
1039         }
1040
1041         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1042                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1043                         rtlpriv->link_info.num_tx_inperiod++;
1044
1045                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1046                                  "CMD TX OK interrupt!\n");
1047                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1048                 }
1049         }
1050
1051         /*<3> Rx related */
1052         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1053                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1054                 _rtl_pci_rx_interrupt(hw);
1055         }
1056
1057         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1058                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1059                          "rx descriptor unavailable!\n");
1060                 _rtl_pci_rx_interrupt(hw);
1061         }
1062
1063         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1064                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1065                 _rtl_pci_rx_interrupt(hw);
1066         }
1067
1068         /*<4> fw related*/
1069         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1070                 if (inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1071                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1072                                  "firmware interrupt!\n");
1073                         queue_delayed_work(rtlpriv->works.rtl_wq,
1074                                            &rtlpriv->works.fwevt_wq, 0);
1075                 }
1076         }
1077
1078         /*<5> hsisr related*/
1079         /* Only 8188EE & 8723BE Supported.
1080          * If Other ICs Come in, System will corrupt,
1081          * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1082          * are not initialized
1083          */
1084         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1085             rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1086                 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1087                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1088                                  "hsisr interrupt!\n");
1089                         _rtl_pci_hs_interrupt(hw);
1090                 }
1091         }
1092
1093         if (rtlpriv->rtlhal.earlymode_enable)
1094                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1095
1096 done:
1097         rtlpriv->cfg->ops->enable_interrupt(hw);
1098         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1099         return ret;
1100 }
1101
1102 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
1103 {
1104         _rtl_pci_tx_chk_waitq(hw);
1105 }
1106
1107 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
1108 {
1109         struct rtl_priv *rtlpriv = rtl_priv(hw);
1110         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1111         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1112         struct rtl8192_tx_ring *ring = NULL;
1113         struct ieee80211_hdr *hdr = NULL;
1114         struct ieee80211_tx_info *info = NULL;
1115         struct sk_buff *pskb = NULL;
1116         struct rtl_tx_desc *pdesc = NULL;
1117         struct rtl_tcb_desc tcb_desc;
1118         /*This is for new trx flow*/
1119         struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1120         u8 temp_one = 1;
1121         u8 *entry;
1122
1123         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1124         ring = &rtlpci->tx_ring[BEACON_QUEUE];
1125         pskb = __skb_dequeue(&ring->queue);
1126         if (rtlpriv->use_new_trx_flow)
1127                 entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1128         else
1129                 entry = (u8 *)(&ring->desc[ring->idx]);
1130         if (pskb) {
1131                 pci_unmap_single(rtlpci->pdev,
1132                                  rtlpriv->cfg->ops->get_desc(
1133                                  (u8 *)entry, true, HW_DESC_TXBUFF_ADDR),
1134                                  pskb->len, PCI_DMA_TODEVICE);
1135                 kfree_skb(pskb);
1136         }
1137
1138         /*NB: the beacon data buffer must be 32-bit aligned. */
1139         pskb = ieee80211_beacon_get(hw, mac->vif);
1140         if (pskb == NULL)
1141                 return;
1142         hdr = rtl_get_hdr(pskb);
1143         info = IEEE80211_SKB_CB(pskb);
1144         pdesc = &ring->desc[0];
1145         if (rtlpriv->use_new_trx_flow)
1146                 pbuffer_desc = &ring->buffer_desc[0];
1147
1148         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1149                                         (u8 *)pbuffer_desc, info, NULL, pskb,
1150                                         BEACON_QUEUE, &tcb_desc);
1151
1152         __skb_queue_tail(&ring->queue, pskb);
1153
1154         if (rtlpriv->use_new_trx_flow) {
1155                 temp_one = 4;
1156                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
1157                                             HW_DESC_OWN, (u8 *)&temp_one);
1158         } else {
1159                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1160                                             &temp_one);
1161         }
1162         return;
1163 }
1164
1165 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1166 {
1167         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1168         struct rtl_priv *rtlpriv = rtl_priv(hw);
1169         struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1170         u8 i;
1171         u16 desc_num;
1172
1173         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1174                 desc_num = TX_DESC_NUM_92E;
1175         else
1176                 desc_num = RT_TXDESC_NUM;
1177
1178         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1179                 rtlpci->txringcount[i] = desc_num;
1180
1181         /*
1182          *we just alloc 2 desc for beacon queue,
1183          *because we just need first desc in hw beacon.
1184          */
1185         rtlpci->txringcount[BEACON_QUEUE] = 2;
1186
1187         /*BE queue need more descriptor for performance
1188          *consideration or, No more tx desc will happen,
1189          *and may cause mac80211 mem leakage.
1190          */
1191         if (!rtl_priv(hw)->use_new_trx_flow)
1192                 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1193
1194         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1195         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1196 }
1197
1198 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1199                 struct pci_dev *pdev)
1200 {
1201         struct rtl_priv *rtlpriv = rtl_priv(hw);
1202         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1203         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1204         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1205
1206         rtlpci->up_first_time = true;
1207         rtlpci->being_init_adapter = false;
1208
1209         rtlhal->hw = hw;
1210         rtlpci->pdev = pdev;
1211
1212         /*Tx/Rx related var */
1213         _rtl_pci_init_trx_var(hw);
1214
1215         /*IBSS*/
1216         mac->beacon_interval = 100;
1217
1218         /*AMPDU*/
1219         mac->min_space_cfg = 0;
1220         mac->max_mss_density = 0;
1221         /*set sane AMPDU defaults */
1222         mac->current_ampdu_density = 7;
1223         mac->current_ampdu_factor = 3;
1224
1225         /*QOS*/
1226         rtlpci->acm_method = EACMWAY2_SW;
1227
1228         /*task */
1229         tasklet_init(&rtlpriv->works.irq_tasklet,
1230                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1231                      (unsigned long)hw);
1232         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1233                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1234                      (unsigned long)hw);
1235         INIT_WORK(&rtlpriv->works.lps_change_work,
1236                   rtl_lps_change_work_callback);
1237 }
1238
1239 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1240                                  unsigned int prio, unsigned int entries)
1241 {
1242         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1243         struct rtl_priv *rtlpriv = rtl_priv(hw);
1244         struct rtl_tx_buffer_desc *buffer_desc;
1245         struct rtl_tx_desc *desc;
1246         dma_addr_t buffer_desc_dma, desc_dma;
1247         u32 nextdescaddress;
1248         int i;
1249
1250         /* alloc tx buffer desc for new trx flow*/
1251         if (rtlpriv->use_new_trx_flow) {
1252                 buffer_desc =
1253                    pci_zalloc_consistent(rtlpci->pdev,
1254                                          sizeof(*buffer_desc) * entries,
1255                                          &buffer_desc_dma);
1256
1257                 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1258                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1259                                  "Cannot allocate TX ring (prio = %d)\n",
1260                                  prio);
1261                         return -ENOMEM;
1262                 }
1263
1264                 rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1265                 rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1266
1267                 rtlpci->tx_ring[prio].cur_tx_rp = 0;
1268                 rtlpci->tx_ring[prio].cur_tx_wp = 0;
1269                 rtlpci->tx_ring[prio].avl_desc = entries;
1270         }
1271
1272         /* alloc dma for this ring */
1273         desc = pci_zalloc_consistent(rtlpci->pdev,
1274                                      sizeof(*desc) * entries, &desc_dma);
1275
1276         if (!desc || (unsigned long)desc & 0xFF) {
1277                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1278                          "Cannot allocate TX ring (prio = %d)\n", prio);
1279                 return -ENOMEM;
1280         }
1281
1282         rtlpci->tx_ring[prio].desc = desc;
1283         rtlpci->tx_ring[prio].dma = desc_dma;
1284
1285         rtlpci->tx_ring[prio].idx = 0;
1286         rtlpci->tx_ring[prio].entries = entries;
1287         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1288
1289         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1290                  prio, desc);
1291
1292         /* init every desc in this ring */
1293         if (!rtlpriv->use_new_trx_flow) {
1294                 for (i = 0; i < entries; i++) {
1295                         nextdescaddress = (u32)desc_dma +
1296                                           ((i + 1) % entries) *
1297                                           sizeof(*desc);
1298
1299                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1300                                                     true,
1301                                                     HW_DESC_TX_NEXTDESC_ADDR,
1302                                                     (u8 *)&nextdescaddress);
1303                 }
1304         }
1305         return 0;
1306 }
1307
1308 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1309 {
1310         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1311         struct rtl_priv *rtlpriv = rtl_priv(hw);
1312         int i;
1313
1314         if (rtlpriv->use_new_trx_flow) {
1315                 struct rtl_rx_buffer_desc *entry = NULL;
1316                 /* alloc dma for this ring */
1317                 rtlpci->rx_ring[rxring_idx].buffer_desc =
1318                     pci_zalloc_consistent(rtlpci->pdev,
1319                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1320                                                  buffer_desc) *
1321                                                  rtlpci->rxringcount,
1322                                           &rtlpci->rx_ring[rxring_idx].dma);
1323                 if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1324                     (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1325                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1326                                  "Cannot allocate RX ring\n");
1327                         return -ENOMEM;
1328                 }
1329
1330                 /* init every desc in this ring */
1331                 rtlpci->rx_ring[rxring_idx].idx = 0;
1332                 for (i = 0; i < rtlpci->rxringcount; i++) {
1333                         entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1334                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1335                                                       rxring_idx, i))
1336                                 return -ENOMEM;
1337                 }
1338         } else {
1339                 struct rtl_rx_desc *entry = NULL;
1340                 u8 tmp_one = 1;
1341                 /* alloc dma for this ring */
1342                 rtlpci->rx_ring[rxring_idx].desc =
1343                     pci_zalloc_consistent(rtlpci->pdev,
1344                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1345                                           desc) * rtlpci->rxringcount,
1346                                           &rtlpci->rx_ring[rxring_idx].dma);
1347                 if (!rtlpci->rx_ring[rxring_idx].desc ||
1348                     (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1349                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1350                                  "Cannot allocate RX ring\n");
1351                         return -ENOMEM;
1352                 }
1353
1354                 /* init every desc in this ring */
1355                 rtlpci->rx_ring[rxring_idx].idx = 0;
1356
1357                 for (i = 0; i < rtlpci->rxringcount; i++) {
1358                         entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1359                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1360                                                       rxring_idx, i))
1361                                 return -ENOMEM;
1362                 }
1363
1364                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1365                                             HW_DESC_RXERO, &tmp_one);
1366         }
1367         return 0;
1368 }
1369
1370 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1371                 unsigned int prio)
1372 {
1373         struct rtl_priv *rtlpriv = rtl_priv(hw);
1374         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1375         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1376
1377         /* free every desc in this ring */
1378         while (skb_queue_len(&ring->queue)) {
1379                 u8 *entry;
1380                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1381
1382                 if (rtlpriv->use_new_trx_flow)
1383                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1384                 else
1385                         entry = (u8 *)(&ring->desc[ring->idx]);
1386
1387                 pci_unmap_single(rtlpci->pdev,
1388                                  rtlpriv->cfg->
1389                                              ops->get_desc((u8 *)entry, true,
1390                                                    HW_DESC_TXBUFF_ADDR),
1391                                  skb->len, PCI_DMA_TODEVICE);
1392                 kfree_skb(skb);
1393                 ring->idx = (ring->idx + 1) % ring->entries;
1394         }
1395
1396         /* free dma of this ring */
1397         pci_free_consistent(rtlpci->pdev,
1398                             sizeof(*ring->desc) * ring->entries,
1399                             ring->desc, ring->dma);
1400         ring->desc = NULL;
1401         if (rtlpriv->use_new_trx_flow) {
1402                 pci_free_consistent(rtlpci->pdev,
1403                                     sizeof(*ring->buffer_desc) * ring->entries,
1404                                     ring->buffer_desc, ring->buffer_desc_dma);
1405                 ring->buffer_desc = NULL;
1406         }
1407 }
1408
1409 static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1410 {
1411         struct rtl_priv *rtlpriv = rtl_priv(hw);
1412         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1413         int i;
1414
1415         /* free every desc in this ring */
1416         for (i = 0; i < rtlpci->rxringcount; i++) {
1417                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1418
1419                 if (!skb)
1420                         continue;
1421                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
1422                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
1423                 kfree_skb(skb);
1424         }
1425
1426         /* free dma of this ring */
1427         if (rtlpriv->use_new_trx_flow) {
1428                 pci_free_consistent(rtlpci->pdev,
1429                                     sizeof(*rtlpci->rx_ring[rxring_idx].
1430                                     buffer_desc) * rtlpci->rxringcount,
1431                                     rtlpci->rx_ring[rxring_idx].buffer_desc,
1432                                     rtlpci->rx_ring[rxring_idx].dma);
1433                 rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1434         } else {
1435                 pci_free_consistent(rtlpci->pdev,
1436                                     sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1437                                     rtlpci->rxringcount,
1438                                     rtlpci->rx_ring[rxring_idx].desc,
1439                                     rtlpci->rx_ring[rxring_idx].dma);
1440                 rtlpci->rx_ring[rxring_idx].desc = NULL;
1441         }
1442 }
1443
1444 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1445 {
1446         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1447         int ret;
1448         int i, rxring_idx;
1449
1450         /* rxring_idx 0:RX_MPDU_QUEUE
1451          * rxring_idx 1:RX_CMD_QUEUE
1452          */
1453         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1454                 ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1455                 if (ret)
1456                         return ret;
1457         }
1458
1459         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1460                 ret = _rtl_pci_init_tx_ring(hw, i,
1461                                  rtlpci->txringcount[i]);
1462                 if (ret)
1463                         goto err_free_rings;
1464         }
1465
1466         return 0;
1467
1468 err_free_rings:
1469         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1470                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1471
1472         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1473                 if (rtlpci->tx_ring[i].desc ||
1474                     rtlpci->tx_ring[i].buffer_desc)
1475                         _rtl_pci_free_tx_ring(hw, i);
1476
1477         return 1;
1478 }
1479
1480 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1481 {
1482         u32 i, rxring_idx;
1483
1484         /*free rx rings */
1485         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1486                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1487
1488         /*free tx rings */
1489         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1490                 _rtl_pci_free_tx_ring(hw, i);
1491
1492         return 0;
1493 }
1494
1495 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1496 {
1497         struct rtl_priv *rtlpriv = rtl_priv(hw);
1498         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1499         int i, rxring_idx;
1500         unsigned long flags;
1501         u8 tmp_one = 1;
1502         u32 bufferaddress;
1503         /* rxring_idx 0:RX_MPDU_QUEUE */
1504         /* rxring_idx 1:RX_CMD_QUEUE */
1505         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1506                 /* force the rx_ring[RX_MPDU_QUEUE/
1507                  * RX_CMD_QUEUE].idx to the first one
1508                  *new trx flow, do nothing
1509                 */
1510                 if (!rtlpriv->use_new_trx_flow &&
1511                     rtlpci->rx_ring[rxring_idx].desc) {
1512                         struct rtl_rx_desc *entry = NULL;
1513
1514                         rtlpci->rx_ring[rxring_idx].idx = 0;
1515                         for (i = 0; i < rtlpci->rxringcount; i++) {
1516                                 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1517                                 bufferaddress =
1518                                   rtlpriv->cfg->ops->get_desc((u8 *)entry,
1519                                   false , HW_DESC_RXBUFF_ADDR);
1520                                 memset((u8 *)entry , 0 ,
1521                                        sizeof(*rtlpci->rx_ring
1522                                        [rxring_idx].desc));/*clear one entry*/
1523                                 if (rtlpriv->use_new_trx_flow) {
1524                                         rtlpriv->cfg->ops->set_desc(hw,
1525                                             (u8 *)entry, false,
1526                                             HW_DESC_RX_PREPARE,
1527                                             (u8 *)&bufferaddress);
1528                                 } else {
1529                                         rtlpriv->cfg->ops->set_desc(hw,
1530                                             (u8 *)entry, false,
1531                                             HW_DESC_RXBUFF_ADDR,
1532                                             (u8 *)&bufferaddress);
1533                                         rtlpriv->cfg->ops->set_desc(hw,
1534                                             (u8 *)entry, false,
1535                                             HW_DESC_RXPKT_LEN,
1536                                             (u8 *)&rtlpci->rxbuffersize);
1537                                         rtlpriv->cfg->ops->set_desc(hw,
1538                                             (u8 *)entry, false,
1539                                             HW_DESC_RXOWN,
1540                                             (u8 *)&tmp_one);
1541                                 }
1542                         }
1543                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1544                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1545                 }
1546                 rtlpci->rx_ring[rxring_idx].idx = 0;
1547         }
1548
1549         /*
1550          *after reset, release previous pending packet,
1551          *and force the  tx idx to the first one
1552          */
1553         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1554         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1555                 if (rtlpci->tx_ring[i].desc ||
1556                     rtlpci->tx_ring[i].buffer_desc) {
1557                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1558
1559                         while (skb_queue_len(&ring->queue)) {
1560                                 u8 *entry;
1561                                 struct sk_buff *skb =
1562                                         __skb_dequeue(&ring->queue);
1563                                 if (rtlpriv->use_new_trx_flow)
1564                                         entry = (u8 *)(&ring->buffer_desc
1565                                                                 [ring->idx]);
1566                                 else
1567                                         entry = (u8 *)(&ring->desc[ring->idx]);
1568
1569                                 pci_unmap_single(rtlpci->pdev,
1570                                                  rtlpriv->cfg->ops->
1571                                                          get_desc((u8 *)
1572                                                          entry,
1573                                                          true,
1574                                                          HW_DESC_TXBUFF_ADDR),
1575                                                  skb->len, PCI_DMA_TODEVICE);
1576                                 dev_kfree_skb_irq(skb);
1577                                 ring->idx = (ring->idx + 1) % ring->entries;
1578                         }
1579                         ring->idx = 0;
1580                 }
1581         }
1582         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1583
1584         return 0;
1585 }
1586
1587 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1588                                         struct ieee80211_sta *sta,
1589                                         struct sk_buff *skb)
1590 {
1591         struct rtl_priv *rtlpriv = rtl_priv(hw);
1592         struct rtl_sta_info *sta_entry = NULL;
1593         u8 tid = rtl_get_tid(skb);
1594         __le16 fc = rtl_get_fc(skb);
1595
1596         if (!sta)
1597                 return false;
1598         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1599
1600         if (!rtlpriv->rtlhal.earlymode_enable)
1601                 return false;
1602         if (ieee80211_is_nullfunc(fc))
1603                 return false;
1604         if (ieee80211_is_qos_nullfunc(fc))
1605                 return false;
1606         if (ieee80211_is_pspoll(fc))
1607                 return false;
1608         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1609                 return false;
1610         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1611                 return false;
1612         if (tid > 7)
1613                 return false;
1614
1615         /* maybe every tid should be checked */
1616         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1617                 return false;
1618
1619         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1620         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1621         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1622
1623         return true;
1624 }
1625
1626 static int rtl_pci_tx(struct ieee80211_hw *hw,
1627                       struct ieee80211_sta *sta,
1628                       struct sk_buff *skb,
1629                       struct rtl_tcb_desc *ptcb_desc)
1630 {
1631         struct rtl_priv *rtlpriv = rtl_priv(hw);
1632         struct rtl_sta_info *sta_entry = NULL;
1633         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1634         struct rtl8192_tx_ring *ring;
1635         struct rtl_tx_desc *pdesc;
1636         struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1637         u16 idx;
1638         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1639         unsigned long flags;
1640         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1641         __le16 fc = rtl_get_fc(skb);
1642         u8 *pda_addr = hdr->addr1;
1643         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1644         /*ssn */
1645         u8 tid = 0;
1646         u16 seq_number = 0;
1647         u8 own;
1648         u8 temp_one = 1;
1649
1650         if (ieee80211_is_mgmt(fc))
1651                 rtl_tx_mgmt_proc(hw, skb);
1652
1653         if (rtlpriv->psc.sw_ps_enabled) {
1654                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1655                         !ieee80211_has_pm(fc))
1656                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1657         }
1658
1659         rtl_action_proc(hw, skb, true);
1660
1661         if (is_multicast_ether_addr(pda_addr))
1662                 rtlpriv->stats.txbytesmulticast += skb->len;
1663         else if (is_broadcast_ether_addr(pda_addr))
1664                 rtlpriv->stats.txbytesbroadcast += skb->len;
1665         else
1666                 rtlpriv->stats.txbytesunicast += skb->len;
1667
1668         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1669         ring = &rtlpci->tx_ring[hw_queue];
1670         if (hw_queue != BEACON_QUEUE) {
1671                 if (rtlpriv->use_new_trx_flow)
1672                         idx = ring->cur_tx_wp;
1673                 else
1674                         idx = (ring->idx + skb_queue_len(&ring->queue)) %
1675                               ring->entries;
1676         } else {
1677                 idx = 0;
1678         }
1679
1680         pdesc = &ring->desc[idx];
1681         if (rtlpriv->use_new_trx_flow) {
1682                 ptx_bd_desc = &ring->buffer_desc[idx];
1683         } else {
1684                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
1685                                 true, HW_DESC_OWN);
1686
1687                 if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1688                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1689                                  "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1690                                  hw_queue, ring->idx, idx,
1691                                  skb_queue_len(&ring->queue));
1692
1693                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1694                                                flags);
1695                         return skb->len;
1696                 }
1697         }
1698
1699         if (rtlpriv->cfg->ops->get_available_desc &&
1700             rtlpriv->cfg->ops->get_available_desc(hw, hw_queue) == 0) {
1701                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1702                                  "get_available_desc fail\n");
1703                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1704                                                flags);
1705                         return skb->len;
1706         }
1707
1708         if (ieee80211_is_data_qos(fc)) {
1709                 tid = rtl_get_tid(skb);
1710                 if (sta) {
1711                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1712                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1713                                       IEEE80211_SCTL_SEQ) >> 4;
1714                         seq_number += 1;
1715
1716                         if (!ieee80211_has_morefrags(hdr->frame_control))
1717                                 sta_entry->tids[tid].seq_number = seq_number;
1718                 }
1719         }
1720
1721         if (ieee80211_is_data(fc))
1722                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1723
1724         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1725                         (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1726
1727         __skb_queue_tail(&ring->queue, skb);
1728
1729         if (rtlpriv->use_new_trx_flow) {
1730                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1731                                             HW_DESC_OWN, &hw_queue);
1732         } else {
1733                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1734                                             HW_DESC_OWN, &temp_one);
1735         }
1736
1737         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1738             hw_queue != BEACON_QUEUE) {
1739                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1740                          "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1741                          hw_queue, ring->idx, idx,
1742                          skb_queue_len(&ring->queue));
1743
1744                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1745         }
1746
1747         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1748
1749         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1750
1751         return 0;
1752 }
1753
1754 static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1755 {
1756         struct rtl_priv *rtlpriv = rtl_priv(hw);
1757         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1758         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1759         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1760         u16 i = 0;
1761         int queue_id;
1762         struct rtl8192_tx_ring *ring;
1763
1764         if (mac->skip_scan)
1765                 return;
1766
1767         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1768                 u32 queue_len;
1769
1770                 if (((queues >> queue_id) & 0x1) == 0) {
1771                         queue_id--;
1772                         continue;
1773                 }
1774                 ring = &pcipriv->dev.tx_ring[queue_id];
1775                 queue_len = skb_queue_len(&ring->queue);
1776                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1777                         queue_id == TXCMD_QUEUE) {
1778                         queue_id--;
1779                         continue;
1780                 } else {
1781                         msleep(20);
1782                         i++;
1783                 }
1784
1785                 /* we just wait 1s for all queues */
1786                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1787                         is_hal_stop(rtlhal) || i >= 200)
1788                         return;
1789         }
1790 }
1791
1792 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1793 {
1794         struct rtl_priv *rtlpriv = rtl_priv(hw);
1795         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1796
1797         _rtl_pci_deinit_trx_ring(hw);
1798
1799         synchronize_irq(rtlpci->pdev->irq);
1800         tasklet_kill(&rtlpriv->works.irq_tasklet);
1801         cancel_work_sync(&rtlpriv->works.lps_change_work);
1802
1803         flush_workqueue(rtlpriv->works.rtl_wq);
1804         destroy_workqueue(rtlpriv->works.rtl_wq);
1805
1806 }
1807
1808 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1809 {
1810         struct rtl_priv *rtlpriv = rtl_priv(hw);
1811         int err;
1812
1813         _rtl_pci_init_struct(hw, pdev);
1814
1815         err = _rtl_pci_init_trx_ring(hw);
1816         if (err) {
1817                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1818                          "tx ring initialization failed\n");
1819                 return err;
1820         }
1821
1822         return 0;
1823 }
1824
1825 static int rtl_pci_start(struct ieee80211_hw *hw)
1826 {
1827         struct rtl_priv *rtlpriv = rtl_priv(hw);
1828         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1829         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1830         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1831
1832         int err;
1833
1834         rtl_pci_reset_trx_ring(hw);
1835
1836         rtlpci->driver_is_goingto_unload = false;
1837         if (rtlpriv->cfg->ops->get_btc_status &&
1838             rtlpriv->cfg->ops->get_btc_status()) {
1839                 rtlpriv->btcoexist.btc_ops->btc_init_variables(rtlpriv);
1840                 rtlpriv->btcoexist.btc_ops->btc_init_hal_vars(rtlpriv);
1841         }
1842         err = rtlpriv->cfg->ops->hw_init(hw);
1843         if (err) {
1844                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1845                          "Failed to config hardware!\n");
1846                 return err;
1847         }
1848
1849         rtlpriv->cfg->ops->enable_interrupt(hw);
1850         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1851
1852         rtl_init_rx_config(hw);
1853
1854         /*should be after adapter start and interrupt enable. */
1855         set_hal_start(rtlhal);
1856
1857         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1858
1859         rtlpci->up_first_time = false;
1860
1861         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "rtl_pci_start OK\n");
1862         return 0;
1863 }
1864
1865 static void rtl_pci_stop(struct ieee80211_hw *hw)
1866 {
1867         struct rtl_priv *rtlpriv = rtl_priv(hw);
1868         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1869         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1870         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1871         unsigned long flags;
1872         u8 RFInProgressTimeOut = 0;
1873
1874         if (rtlpriv->cfg->ops->get_btc_status())
1875                 rtlpriv->btcoexist.btc_ops->btc_halt_notify();
1876
1877         /*
1878          *should be before disable interrupt&adapter
1879          *and will do it immediately.
1880          */
1881         set_hal_stop(rtlhal);
1882
1883         rtlpci->driver_is_goingto_unload = true;
1884         rtlpriv->cfg->ops->disable_interrupt(hw);
1885         cancel_work_sync(&rtlpriv->works.lps_change_work);
1886
1887         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1888         while (ppsc->rfchange_inprogress) {
1889                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1890                 if (RFInProgressTimeOut > 100) {
1891                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1892                         break;
1893                 }
1894                 mdelay(1);
1895                 RFInProgressTimeOut++;
1896                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1897         }
1898         ppsc->rfchange_inprogress = true;
1899         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1900
1901         rtlpriv->cfg->ops->hw_disable(hw);
1902         /* some things are not needed if firmware not available */
1903         if (!rtlpriv->max_fw_size)
1904                 return;
1905         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1906
1907         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1908         ppsc->rfchange_inprogress = false;
1909         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1910
1911         rtl_pci_enable_aspm(hw);
1912 }
1913
1914 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1915                 struct ieee80211_hw *hw)
1916 {
1917         struct rtl_priv *rtlpriv = rtl_priv(hw);
1918         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1919         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1920         struct pci_dev *bridge_pdev = pdev->bus->self;
1921         u16 venderid;
1922         u16 deviceid;
1923         u8 revisionid;
1924         u16 irqline;
1925         u8 tmp;
1926
1927         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1928         venderid = pdev->vendor;
1929         deviceid = pdev->device;
1930         pci_read_config_byte(pdev, 0x8, &revisionid);
1931         pci_read_config_word(pdev, 0x3C, &irqline);
1932
1933         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1934          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1935          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1936          * the correct driver is r8192e_pci, thus this routine should
1937          * return false.
1938          */
1939         if (deviceid == RTL_PCI_8192SE_DID &&
1940             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1941                 return false;
1942
1943         if (deviceid == RTL_PCI_8192_DID ||
1944             deviceid == RTL_PCI_0044_DID ||
1945             deviceid == RTL_PCI_0047_DID ||
1946             deviceid == RTL_PCI_8192SE_DID ||
1947             deviceid == RTL_PCI_8174_DID ||
1948             deviceid == RTL_PCI_8173_DID ||
1949             deviceid == RTL_PCI_8172_DID ||
1950             deviceid == RTL_PCI_8171_DID) {
1951                 switch (revisionid) {
1952                 case RTL_PCI_REVISION_ID_8192PCIE:
1953                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1954                                  "8192 PCI-E is found - vid/did=%x/%x\n",
1955                                  venderid, deviceid);
1956                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1957                         return false;
1958                 case RTL_PCI_REVISION_ID_8192SE:
1959                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1960                                  "8192SE is found - vid/did=%x/%x\n",
1961                                  venderid, deviceid);
1962                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1963                         break;
1964                 default:
1965                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1966                                  "Err: Unknown device - vid/did=%x/%x\n",
1967                                  venderid, deviceid);
1968                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1969                         break;
1970
1971                 }
1972         } else if (deviceid == RTL_PCI_8723AE_DID) {
1973                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1974                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1975                          "8723AE PCI-E is found - "
1976                          "vid/did=%x/%x\n", venderid, deviceid);
1977         } else if (deviceid == RTL_PCI_8192CET_DID ||
1978                    deviceid == RTL_PCI_8192CE_DID ||
1979                    deviceid == RTL_PCI_8191CE_DID ||
1980                    deviceid == RTL_PCI_8188CE_DID) {
1981                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1982                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1983                          "8192C PCI-E is found - vid/did=%x/%x\n",
1984                          venderid, deviceid);
1985         } else if (deviceid == RTL_PCI_8192DE_DID ||
1986                    deviceid == RTL_PCI_8192DE_DID2) {
1987                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1988                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1989                          "8192D PCI-E is found - vid/did=%x/%x\n",
1990                          venderid, deviceid);
1991         } else if (deviceid == RTL_PCI_8188EE_DID) {
1992                 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1993                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1994                          "Find adapter, Hardware type is 8188EE\n");
1995         } else if (deviceid == RTL_PCI_8723BE_DID) {
1996                         rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
1997                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1998                                  "Find adapter, Hardware type is 8723BE\n");
1999         } else if (deviceid == RTL_PCI_8192EE_DID) {
2000                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
2001                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2002                                  "Find adapter, Hardware type is 8192EE\n");
2003         } else if (deviceid == RTL_PCI_8821AE_DID) {
2004                         rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
2005                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2006                                  "Find adapter, Hardware type is 8821AE\n");
2007         } else if (deviceid == RTL_PCI_8812AE_DID) {
2008                         rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
2009                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2010                                  "Find adapter, Hardware type is 8812AE\n");
2011         } else {
2012                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
2013                          "Err: Unknown device - vid/did=%x/%x\n",
2014                          venderid, deviceid);
2015
2016                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
2017         }
2018
2019         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
2020                 if (revisionid == 0 || revisionid == 1) {
2021                         if (revisionid == 0) {
2022                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2023                                          "Find 92DE MAC0\n");
2024                                 rtlhal->interfaceindex = 0;
2025                         } else if (revisionid == 1) {
2026                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2027                                          "Find 92DE MAC1\n");
2028                                 rtlhal->interfaceindex = 1;
2029                         }
2030                 } else {
2031                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2032                                  "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
2033                                  venderid, deviceid, revisionid);
2034                         rtlhal->interfaceindex = 0;
2035                 }
2036         }
2037
2038         /* 92ee use new trx flow */
2039         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
2040                 rtlpriv->use_new_trx_flow = true;
2041         else
2042                 rtlpriv->use_new_trx_flow = false;
2043
2044         /*find bus info */
2045         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2046         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2047         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2048
2049         /*find bridge info */
2050         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2051         /* some ARM have no bridge_pdev and will crash here
2052          * so we should check if bridge_pdev is NULL
2053          */
2054         if (bridge_pdev) {
2055                 /*find bridge info if available */
2056                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2057                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2058                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2059                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2060                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2061                                          "Pci Bridge Vendor is found index: %d\n",
2062                                          tmp);
2063                                 break;
2064                         }
2065                 }
2066         }
2067
2068         if (pcipriv->ndis_adapter.pcibridge_vendor !=
2069                 PCI_BRIDGE_VENDOR_UNKNOWN) {
2070                 pcipriv->ndis_adapter.pcibridge_busnum =
2071                     bridge_pdev->bus->number;
2072                 pcipriv->ndis_adapter.pcibridge_devnum =
2073                     PCI_SLOT(bridge_pdev->devfn);
2074                 pcipriv->ndis_adapter.pcibridge_funcnum =
2075                     PCI_FUNC(bridge_pdev->devfn);
2076                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2077                     pci_pcie_cap(bridge_pdev);
2078                 pcipriv->ndis_adapter.num4bytes =
2079                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2080
2081                 rtl_pci_get_linkcontrol_field(hw);
2082
2083                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
2084                     PCI_BRIDGE_VENDOR_AMD) {
2085                         pcipriv->ndis_adapter.amd_l1_patch =
2086                             rtl_pci_get_amd_l1_patch(hw);
2087                 }
2088         }
2089
2090         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2091                  "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2092                  pcipriv->ndis_adapter.busnumber,
2093                  pcipriv->ndis_adapter.devnumber,
2094                  pcipriv->ndis_adapter.funcnumber,
2095                  pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2096
2097         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2098                  "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2099                  pcipriv->ndis_adapter.pcibridge_busnum,
2100                  pcipriv->ndis_adapter.pcibridge_devnum,
2101                  pcipriv->ndis_adapter.pcibridge_funcnum,
2102                  pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2103                  pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2104                  pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2105                  pcipriv->ndis_adapter.amd_l1_patch);
2106
2107         rtl_pci_parse_configuration(pdev, hw);
2108         list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2109
2110         return true;
2111 }
2112
2113 static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2114 {
2115         struct rtl_priv *rtlpriv = rtl_priv(hw);
2116         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2117         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2118         int ret;
2119
2120         ret = pci_enable_msi(rtlpci->pdev);
2121         if (ret < 0)
2122                 return ret;
2123
2124         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2125                           IRQF_SHARED, KBUILD_MODNAME, hw);
2126         if (ret < 0) {
2127                 pci_disable_msi(rtlpci->pdev);
2128                 return ret;
2129         }
2130
2131         rtlpci->using_msi = true;
2132
2133         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2134                  "MSI Interrupt Mode!\n");
2135         return 0;
2136 }
2137
2138 static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2139 {
2140         struct rtl_priv *rtlpriv = rtl_priv(hw);
2141         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2142         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2143         int ret;
2144
2145         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2146                           IRQF_SHARED, KBUILD_MODNAME, hw);
2147         if (ret < 0)
2148                 return ret;
2149
2150         rtlpci->using_msi = false;
2151         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2152                  "Pin-based Interrupt Mode!\n");
2153         return 0;
2154 }
2155
2156 static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2157 {
2158         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2159         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2160         int ret;
2161
2162         if (rtlpci->msi_support) {
2163                 ret = rtl_pci_intr_mode_msi(hw);
2164                 if (ret < 0)
2165                         ret = rtl_pci_intr_mode_legacy(hw);
2166         } else {
2167                 ret = rtl_pci_intr_mode_legacy(hw);
2168         }
2169         return ret;
2170 }
2171
2172 int rtl_pci_probe(struct pci_dev *pdev,
2173                             const struct pci_device_id *id)
2174 {
2175         struct ieee80211_hw *hw = NULL;
2176
2177         struct rtl_priv *rtlpriv = NULL;
2178         struct rtl_pci_priv *pcipriv = NULL;
2179         struct rtl_pci *rtlpci;
2180         unsigned long pmem_start, pmem_len, pmem_flags;
2181         int err;
2182
2183         err = pci_enable_device(pdev);
2184         if (err) {
2185                 RT_ASSERT(false, "%s : Cannot enable new PCI device\n",
2186                           pci_name(pdev));
2187                 return err;
2188         }
2189
2190         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
2191                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
2192                         RT_ASSERT(false,
2193                                   "Unable to obtain 32bit DMA for consistent allocations\n");
2194                         err = -ENOMEM;
2195                         goto fail1;
2196                 }
2197         }
2198
2199         pci_set_master(pdev);
2200
2201         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2202                                 sizeof(struct rtl_priv), &rtl_ops);
2203         if (!hw) {
2204                 RT_ASSERT(false,
2205                           "%s : ieee80211 alloc failed\n", pci_name(pdev));
2206                 err = -ENOMEM;
2207                 goto fail1;
2208         }
2209
2210         SET_IEEE80211_DEV(hw, &pdev->dev);
2211         pci_set_drvdata(pdev, hw);
2212
2213         rtlpriv = hw->priv;
2214         rtlpriv->hw = hw;
2215         pcipriv = (void *)rtlpriv->priv;
2216         pcipriv->dev.pdev = pdev;
2217         init_completion(&rtlpriv->firmware_loading_complete);
2218         /*proximity init here*/
2219         rtlpriv->proximity.proxim_on = false;
2220
2221         pcipriv = (void *)rtlpriv->priv;
2222         pcipriv->dev.pdev = pdev;
2223
2224         /* init cfg & intf_ops */
2225         rtlpriv->rtlhal.interface = INTF_PCI;
2226         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2227         rtlpriv->intf_ops = &rtl_pci_ops;
2228         rtlpriv->glb_var = &rtl_global_var;
2229
2230         /*
2231          *init dbgp flags before all
2232          *other functions, because we will
2233          *use it in other funtions like
2234          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
2235          *you can not use these macro
2236          *before this
2237          */
2238         rtl_dbgp_flag_init(hw);
2239
2240         /* MEM map */
2241         err = pci_request_regions(pdev, KBUILD_MODNAME);
2242         if (err) {
2243                 RT_ASSERT(false, "Can't obtain PCI resources\n");
2244                 goto fail1;
2245         }
2246
2247         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2248         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2249         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2250
2251         /*shared mem start */
2252         rtlpriv->io.pci_mem_start =
2253                         (unsigned long)pci_iomap(pdev,
2254                         rtlpriv->cfg->bar_id, pmem_len);
2255         if (rtlpriv->io.pci_mem_start == 0) {
2256                 RT_ASSERT(false, "Can't map PCI mem\n");
2257                 err = -ENOMEM;
2258                 goto fail2;
2259         }
2260
2261         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2262                  "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2263                  pmem_start, pmem_len, pmem_flags,
2264                  rtlpriv->io.pci_mem_start);
2265
2266         /* Disable Clk Request */
2267         pci_write_config_byte(pdev, 0x81, 0);
2268         /* leave D3 mode */
2269         pci_write_config_byte(pdev, 0x44, 0);
2270         pci_write_config_byte(pdev, 0x04, 0x06);
2271         pci_write_config_byte(pdev, 0x04, 0x07);
2272
2273         /* find adapter */
2274         if (!_rtl_pci_find_adapter(pdev, hw)) {
2275                 err = -ENODEV;
2276                 goto fail3;
2277         }
2278
2279         /* Init IO handler */
2280         _rtl_pci_io_handler_init(&pdev->dev, hw);
2281
2282         /*like read eeprom and so on */
2283         rtlpriv->cfg->ops->read_eeprom_info(hw);
2284
2285         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2286                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");
2287                 err = -ENODEV;
2288                 goto fail3;
2289         }
2290         rtlpriv->cfg->ops->init_sw_leds(hw);
2291
2292         /*aspm */
2293         rtl_pci_init_aspm(hw);
2294
2295         /* Init mac80211 sw */
2296         err = rtl_init_core(hw);
2297         if (err) {
2298                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2299                          "Can't allocate sw for mac80211\n");
2300                 goto fail3;
2301         }
2302
2303         /* Init PCI sw */
2304         err = rtl_pci_init(hw, pdev);
2305         if (err) {
2306                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Failed to init PCI\n");
2307                 goto fail3;
2308         }
2309
2310         err = ieee80211_register_hw(hw);
2311         if (err) {
2312                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2313                          "Can't register mac80211 hw.\n");
2314                 err = -ENODEV;
2315                 goto fail3;
2316         }
2317         rtlpriv->mac80211.mac80211_registered = 1;
2318
2319         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
2320         if (err) {
2321                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
2322                          "failed to create sysfs device attributes\n");
2323                 goto fail3;
2324         }
2325
2326         /*init rfkill */
2327         rtl_init_rfkill(hw);    /* Init PCI sw */
2328
2329         rtlpci = rtl_pcidev(pcipriv);
2330         err = rtl_pci_intr_mode_decide(hw);
2331         if (err) {
2332                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2333                          "%s: failed to register IRQ handler\n",
2334                          wiphy_name(hw->wiphy));
2335                 goto fail3;
2336         }
2337         rtlpci->irq_alloc = 1;
2338
2339         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2340         return 0;
2341
2342 fail3:
2343         pci_set_drvdata(pdev, NULL);
2344         rtl_deinit_core(hw);
2345
2346         if (rtlpriv->io.pci_mem_start != 0)
2347                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2348
2349 fail2:
2350         pci_release_regions(pdev);
2351         complete(&rtlpriv->firmware_loading_complete);
2352
2353 fail1:
2354         if (hw)
2355                 ieee80211_free_hw(hw);
2356         pci_disable_device(pdev);
2357
2358         return err;
2359
2360 }
2361 EXPORT_SYMBOL(rtl_pci_probe);
2362
2363 void rtl_pci_disconnect(struct pci_dev *pdev)
2364 {
2365         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2366         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2367         struct rtl_priv *rtlpriv = rtl_priv(hw);
2368         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2369         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2370
2371         /* just in case driver is removed before firmware callback */
2372         wait_for_completion(&rtlpriv->firmware_loading_complete);
2373         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2374
2375         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
2376
2377         /*ieee80211_unregister_hw will call ops_stop */
2378         if (rtlmac->mac80211_registered == 1) {
2379                 ieee80211_unregister_hw(hw);
2380                 rtlmac->mac80211_registered = 0;
2381         } else {
2382                 rtl_deinit_deferred_work(hw);
2383                 rtlpriv->intf_ops->adapter_stop(hw);
2384         }
2385         rtlpriv->cfg->ops->disable_interrupt(hw);
2386
2387         /*deinit rfkill */
2388         rtl_deinit_rfkill(hw);
2389
2390         rtl_pci_deinit(hw);
2391         rtl_deinit_core(hw);
2392         rtlpriv->cfg->ops->deinit_sw_vars(hw);
2393
2394         if (rtlpci->irq_alloc) {
2395                 free_irq(rtlpci->pdev->irq, hw);
2396                 rtlpci->irq_alloc = 0;
2397         }
2398
2399         if (rtlpci->using_msi)
2400                 pci_disable_msi(rtlpci->pdev);
2401
2402         list_del(&rtlpriv->list);
2403         if (rtlpriv->io.pci_mem_start != 0) {
2404                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2405                 pci_release_regions(pdev);
2406         }
2407
2408         pci_disable_device(pdev);
2409
2410         rtl_pci_disable_aspm(hw);
2411
2412         pci_set_drvdata(pdev, NULL);
2413
2414         ieee80211_free_hw(hw);
2415 }
2416 EXPORT_SYMBOL(rtl_pci_disconnect);
2417
2418 #ifdef CONFIG_PM_SLEEP
2419 /***************************************
2420 kernel pci power state define:
2421 PCI_D0         ((pci_power_t __force) 0)
2422 PCI_D1         ((pci_power_t __force) 1)
2423 PCI_D2         ((pci_power_t __force) 2)
2424 PCI_D3hot      ((pci_power_t __force) 3)
2425 PCI_D3cold     ((pci_power_t __force) 4)
2426 PCI_UNKNOWN    ((pci_power_t __force) 5)
2427
2428 This function is called when system
2429 goes into suspend state mac80211 will
2430 call rtl_mac_stop() from the mac80211
2431 suspend function first, So there is
2432 no need to call hw_disable here.
2433 ****************************************/
2434 int rtl_pci_suspend(struct device *dev)
2435 {
2436         struct pci_dev *pdev = to_pci_dev(dev);
2437         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2438         struct rtl_priv *rtlpriv = rtl_priv(hw);
2439
2440         rtlpriv->cfg->ops->hw_suspend(hw);
2441         rtl_deinit_rfkill(hw);
2442
2443         return 0;
2444 }
2445 EXPORT_SYMBOL(rtl_pci_suspend);
2446
2447 int rtl_pci_resume(struct device *dev)
2448 {
2449         struct pci_dev *pdev = to_pci_dev(dev);
2450         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2451         struct rtl_priv *rtlpriv = rtl_priv(hw);
2452
2453         rtlpriv->cfg->ops->hw_resume(hw);
2454         rtl_init_rfkill(hw);
2455         return 0;
2456 }
2457 EXPORT_SYMBOL(rtl_pci_resume);
2458 #endif /* CONFIG_PM_SLEEP */
2459
2460 const struct rtl_intf_ops rtl_pci_ops = {
2461         .read_efuse_byte = read_efuse_byte,
2462         .adapter_start = rtl_pci_start,
2463         .adapter_stop = rtl_pci_stop,
2464         .check_buddy_priv = rtl_pci_check_buddy_priv,
2465         .adapter_tx = rtl_pci_tx,
2466         .flush = rtl_pci_flush,
2467         .reset_trx_ring = rtl_pci_reset_trx_ring,
2468         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2469
2470         .disable_aspm = rtl_pci_disable_aspm,
2471         .enable_aspm = rtl_pci_enable_aspm,
2472 };