drivers/nvme/host/nvme.h

   1 /*
   2  * Copyright (c) 2011-2014, Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  */
  13
  14 #ifndef _NVME_H
  15 #define _NVME_H
  16
  17 #include <linux/nvme.h>
  18 #include <linux/pci.h>
  19 #include <linux/kref.h>
  20 #include <linux/blk-mq.h>
  21
  22 enum {
  23         /*
  24          * Driver internal status code for commands that were cancelled due
  25          * to timeouts or controller shutdown.  The value is negative so
  26          * that it a) doesn't overlap with the unsigned hardware error codes,
  27          * and b) can easily be tested for.
  28          */
  29         NVME_SC_CANCELLED               = -EINTR,
  30 };
  31
  32 extern unsigned char nvme_io_timeout;
  33 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  34
  35 extern unsigned char admin_timeout;
  36 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
  37
  38 extern unsigned char shutdown_timeout;
  39 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
  40
  41 enum {
  42         NVME_NS_LBA             = 0,
  43         NVME_NS_LIGHTNVM        = 1,
  44 };
  45
  46 /*
  47  * List of workarounds for devices that required behavior not specified in
  48  * the standard.
  49  */
  50 enum nvme_quirks {
  51         /*
  52          * Prefers I/O aligned to a stripe size specified in a vendor
  53          * specific Identify field.
  54          */
  55         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
  56
  57         /*
  58          * The controller doesn't handle Identify value others than 0 or 1
  59          * correctly.
  60          */
  61         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
  62
  63         /*
  64          * The controller deterministically returns O's on reads to discarded
  65          * logical blocks.
  66          */
  67         NVME_QUIRK_DISCARD_ZEROES               = (1 << 2),
  68 };
  69
  70 struct nvme_ctrl {
  71         const struct nvme_ctrl_ops *ops;
  72         struct request_queue *admin_q;
  73         struct device *dev;
  74         struct kref kref;
  75         int instance;
  76         struct blk_mq_tag_set *tagset;
  77         struct list_head namespaces;
  78         struct mutex namespaces_mutex;
  79         struct device *device;  /* char device */
  80         struct list_head node;
  81         struct ida ns_ida;
  82
  83         char name[12];
  84         char serial[20];
  85         char model[40];
  86         char firmware_rev[8];
  87         int cntlid;
  88
  89         u32 ctrl_config;
  90
  91         u32 page_size;
  92         u32 max_hw_sectors;
  93         u32 stripe_size;
  94         u16 oncs;
  95         u16 vid;
  96         atomic_t abort_limit;
  97         u8 event_limit;
  98         u8 vwc;
  99         u32 vs;
 100         bool subsystem;
 101         unsigned long quirks;
 102 };
 103
 104 /*
 105  * An NVM Express namespace is equivalent to a SCSI LUN
 106  */
 107 struct nvme_ns {
 108         struct list_head list;
 109
 110         struct nvme_ctrl *ctrl;
 111         struct request_queue *queue;
 112         struct gendisk *disk;
 113         struct kref kref;
 114         int instance;
 115
 116         u8 eui[8];
 117         u8 uuid[16];
 118
 119         unsigned ns_id;
 120         int lba_shift;
 121         u16 ms;
 122         bool ext;
 123         u8 pi_type;
 124         int type;
 125         unsigned long flags;
 126
 127 #define NVME_NS_REMOVING 0
 128 #define NVME_NS_DEAD     1
 129
 130         u64 mode_select_num_blocks;
 131         u32 mode_select_block_len;
 132 };
 133
 134 struct nvme_ctrl_ops {
 135         struct module *module;
 136         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
 137         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
 138         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
 139         bool (*io_incapable)(struct nvme_ctrl *ctrl);
 140         int (*reset_ctrl)(struct nvme_ctrl *ctrl);
 141         void (*free_ctrl)(struct nvme_ctrl *ctrl);
 142 };
 143
 144 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
 145 {
 146         u32 val = 0;
 147
 148         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
 149                 return false;
 150         return val & NVME_CSTS_RDY;
 151 }
 152
 153 static inline bool nvme_io_incapable(struct nvme_ctrl *ctrl)
 154 {
 155         u32 val = 0;
 156
 157         if (ctrl->ops->io_incapable(ctrl))
 158                 return true;
 159         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
 160                 return true;
 161         return val & NVME_CSTS_CFS;
 162 }
 163
 164 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
 165 {
 166         if (!ctrl->subsystem)
 167                 return -ENOTTY;
 168         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
 169 }
 170
 171 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
 172 {
 173         return (sector >> (ns->lba_shift - 9));
 174 }
 175
 176 static inline void nvme_setup_flush(struct nvme_ns *ns,
 177                 struct nvme_command *cmnd)
 178 {
 179         memset(cmnd, 0, sizeof(*cmnd));
 180         cmnd->common.opcode = nvme_cmd_flush;
 181         cmnd->common.nsid = cpu_to_le32(ns->ns_id);
 182 }
 183
 184 static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
 185                 struct nvme_command *cmnd)
 186 {
 187         u16 control = 0;
 188         u32 dsmgmt = 0;
 189
 190         if (req->cmd_flags & REQ_FUA)
 191                 control |= NVME_RW_FUA;
 192         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 193                 control |= NVME_RW_LR;
 194
 195         if (req->cmd_flags & REQ_RAHEAD)
 196                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 197
 198         memset(cmnd, 0, sizeof(*cmnd));
 199         cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
 200         cmnd->rw.command_id = req->tag;
 201         cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
 202         cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 203         cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
 204
 205         if (ns->ms) {
 206                 switch (ns->pi_type) {
 207                 case NVME_NS_DPS_PI_TYPE3:
 208                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
 209                         break;
 210                 case NVME_NS_DPS_PI_TYPE1:
 211                 case NVME_NS_DPS_PI_TYPE2:
 212                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
 213                                         NVME_RW_PRINFO_PRCHK_REF;
 214                         cmnd->rw.reftag = cpu_to_le32(
 215                                         nvme_block_nr(ns, blk_rq_pos(req)));
 216                         break;
 217                 }
 218                 if (!blk_integrity_rq(req))
 219                         control |= NVME_RW_PRINFO_PRACT;
 220         }
 221
 222         cmnd->rw.control = cpu_to_le16(control);
 223         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
 224 }
 225
 226
 227 static inline int nvme_error_status(u16 status)
 228 {
 229         switch (status & 0x7ff) {
 230         case NVME_SC_SUCCESS:
 231                 return 0;
 232         case NVME_SC_CAP_EXCEEDED:
 233                 return -ENOSPC;
 234         default:
 235                 return -EIO;
 236         }
 237 }
 238
 239 static inline bool nvme_req_needs_retry(struct request *req, u16 status)
 240 {
 241         return !(status & NVME_SC_DNR || blk_noretry_request(req)) &&
 242                 (jiffies - req->start_time) < req->timeout;
 243 }
 244
 245 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
 246 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
 247 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
 248 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
 249                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
 250 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
 251 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
 252 int nvme_init_identify(struct nvme_ctrl *ctrl);
 253
 254 void nvme_scan_namespaces(struct nvme_ctrl *ctrl);
 255 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
 256
 257 void nvme_stop_queues(struct nvme_ctrl *ctrl);
 258 void nvme_start_queues(struct nvme_ctrl *ctrl);
 259 void nvme_kill_queues(struct nvme_ctrl *ctrl);
 260
 261 struct request *nvme_alloc_request(struct request_queue *q,
 262                 struct nvme_command *cmd, unsigned int flags);
 263 void nvme_requeue_req(struct request *req);
 264 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 265                 void *buf, unsigned bufflen);
 266 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 267                 struct nvme_completion *cqe, void *buffer, unsigned bufflen,
 268                 unsigned timeout);
 269 int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
 270                 void __user *ubuffer, unsigned bufflen, u32 *result,
 271                 unsigned timeout);
 272 int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
 273                 void __user *ubuffer, unsigned bufflen,
 274                 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
 275                 u32 *result, unsigned timeout);
 276 int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id);
 277 int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
 278                 struct nvme_id_ns **id);
 279 int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log);
 280 int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
 281                         dma_addr_t dma_addr, u32 *result);
 282 int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
 283                         dma_addr_t dma_addr, u32 *result);
 284 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
 285
 286 struct sg_io_hdr;
 287
 288 int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
 289 int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
 290 int nvme_sg_get_version_num(int __user *ip);
 291
 292 #ifdef CONFIG_NVM
 293 int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id);
 294 int nvme_nvm_register(struct request_queue *q, char *disk_name);
 295 void nvme_nvm_unregister(struct request_queue *q, char *disk_name);
 296 #else
 297 static inline int nvme_nvm_register(struct request_queue *q, char *disk_name)
 298 {
 299         return 0;
 300 }
 301
 302 static inline void nvme_nvm_unregister(struct request_queue *q, char *disk_name) {};
 303
 304 static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id)
 305 {
 306         return 0;
 307 }
 308 #endif /* CONFIG_NVM */
 309
 310 int __init nvme_core_init(void);
 311 void nvme_core_exit(void);
 312
 313 #endif /* _NVME_H */