2 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/export.h>
16 #include <linux/mfd/syscon.h>
17 #include <linux/pinctrl/pinconf.h>
18 #include <linux/pinctrl/pinconf-generic.h>
19 #include <linux/pinctrl/pinctrl.h>
20 #include <linux/pinctrl/pinmux.h>
21 #include <linux/platform_device.h>
22 #include <linux/regmap.h>
25 #include "../pinctrl-utils.h"
26 #include "pinctrl-uniphier.h"
28 struct uniphier_pinctrl_priv {
29 struct pinctrl_desc pctldesc;
30 struct pinctrl_dev *pctldev;
31 struct regmap *regmap;
32 struct uniphier_pinctrl_socdata *socdata;
35 static int uniphier_pctl_get_groups_count(struct pinctrl_dev *pctldev)
37 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
39 return priv->socdata->groups_count;
42 static const char *uniphier_pctl_get_group_name(struct pinctrl_dev *pctldev,
45 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
47 return priv->socdata->groups[selector].name;
50 static int uniphier_pctl_get_group_pins(struct pinctrl_dev *pctldev,
52 const unsigned **pins,
55 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
57 *pins = priv->socdata->groups[selector].pins;
58 *num_pins = priv->socdata->groups[selector].num_pins;
63 #ifdef CONFIG_DEBUG_FS
64 static void uniphier_pctl_pin_dbg_show(struct pinctrl_dev *pctldev,
65 struct seq_file *s, unsigned offset)
67 const struct pinctrl_pin_desc *pin = &pctldev->desc->pins[offset];
68 const char *pull_dir, *drv_type;
70 switch (uniphier_pin_get_pull_dir(pin->drv_data)) {
71 case UNIPHIER_PIN_PULL_UP:
74 case UNIPHIER_PIN_PULL_DOWN:
77 case UNIPHIER_PIN_PULL_UP_FIXED:
78 pull_dir = "UP(FIXED)";
80 case UNIPHIER_PIN_PULL_DOWN_FIXED:
81 pull_dir = "DOWN(FIXED)";
83 case UNIPHIER_PIN_PULL_NONE:
90 switch (uniphier_pin_get_drv_type(pin->drv_data)) {
91 case UNIPHIER_PIN_DRV_1BIT:
94 case UNIPHIER_PIN_DRV_2BIT:
95 drv_type = "8/12/16/20(mA)";
97 case UNIPHIER_PIN_DRV_3BIT:
98 drv_type = "4/5/7/9/11/12/14/16(mA)";
100 case UNIPHIER_PIN_DRV_FIXED4:
103 case UNIPHIER_PIN_DRV_FIXED5:
106 case UNIPHIER_PIN_DRV_FIXED8:
109 case UNIPHIER_PIN_DRV_NONE:
116 seq_printf(s, " PULL_DIR=%s DRV_TYPE=%s", pull_dir, drv_type);
120 static const struct pinctrl_ops uniphier_pctlops = {
121 .get_groups_count = uniphier_pctl_get_groups_count,
122 .get_group_name = uniphier_pctl_get_group_name,
123 .get_group_pins = uniphier_pctl_get_group_pins,
124 #ifdef CONFIG_DEBUG_FS
125 .pin_dbg_show = uniphier_pctl_pin_dbg_show,
127 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
128 .dt_free_map = pinctrl_utils_free_map,
131 static int uniphier_conf_pin_bias_get(struct pinctrl_dev *pctldev,
132 const struct pinctrl_pin_desc *pin,
133 enum pin_config_param param)
135 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
136 enum uniphier_pin_pull_dir pull_dir =
137 uniphier_pin_get_pull_dir(pin->drv_data);
138 unsigned int pupdctrl, reg, shift, val;
139 unsigned int expected = 1;
143 case PIN_CONFIG_BIAS_DISABLE:
144 if (pull_dir == UNIPHIER_PIN_PULL_NONE)
146 if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED ||
147 pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED)
151 case PIN_CONFIG_BIAS_PULL_UP:
152 if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED)
154 if (pull_dir != UNIPHIER_PIN_PULL_UP)
157 case PIN_CONFIG_BIAS_PULL_DOWN:
158 if (pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED)
160 if (pull_dir != UNIPHIER_PIN_PULL_DOWN)
167 pupdctrl = uniphier_pin_get_pupdctrl(pin->drv_data);
169 reg = UNIPHIER_PINCTRL_PUPDCTRL_BASE + pupdctrl / 32 * 4;
170 shift = pupdctrl % 32;
172 ret = regmap_read(priv->regmap, reg, &val);
176 val = (val >> shift) & 1;
178 return (val == expected) ? 0 : -EINVAL;
181 static int uniphier_conf_pin_drive_get(struct pinctrl_dev *pctldev,
182 const struct pinctrl_pin_desc *pin,
185 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
186 enum uniphier_pin_drv_type type =
187 uniphier_pin_get_drv_type(pin->drv_data);
188 const unsigned int strength_1bit[] = {4, 8};
189 const unsigned int strength_2bit[] = {8, 12, 16, 20};
190 const unsigned int strength_3bit[] = {4, 5, 7, 9, 11, 12, 14, 16};
191 const unsigned int *supported_strength;
192 unsigned int drvctrl, reg, shift, mask, width, val;
196 case UNIPHIER_PIN_DRV_1BIT:
197 supported_strength = strength_1bit;
198 reg = UNIPHIER_PINCTRL_DRVCTRL_BASE;
201 case UNIPHIER_PIN_DRV_2BIT:
202 supported_strength = strength_2bit;
203 reg = UNIPHIER_PINCTRL_DRV2CTRL_BASE;
206 case UNIPHIER_PIN_DRV_3BIT:
207 supported_strength = strength_3bit;
208 reg = UNIPHIER_PINCTRL_DRV3CTRL_BASE;
211 case UNIPHIER_PIN_DRV_FIXED4:
214 case UNIPHIER_PIN_DRV_FIXED5:
217 case UNIPHIER_PIN_DRV_FIXED8:
221 /* drive strength control is not supported for this pin */
225 drvctrl = uniphier_pin_get_drvctrl(pin->drv_data);
228 reg += drvctrl / 32 * 4;
229 shift = drvctrl % 32;
230 mask = (1U << width) - 1;
232 ret = regmap_read(priv->regmap, reg, &val);
236 *strength = supported_strength[(val >> shift) & mask];
241 static int uniphier_conf_pin_input_enable_get(struct pinctrl_dev *pctldev,
242 const struct pinctrl_pin_desc *pin)
244 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
245 unsigned int iectrl = uniphier_pin_get_iectrl(pin->drv_data);
249 if (iectrl == UNIPHIER_PIN_IECTRL_NONE)
250 /* This pin is always input-enabled. */
253 ret = regmap_read(priv->regmap, UNIPHIER_PINCTRL_IECTRL, &val);
257 return val & BIT(iectrl) ? 0 : -EINVAL;
260 static int uniphier_conf_pin_config_get(struct pinctrl_dev *pctldev,
262 unsigned long *configs)
264 const struct pinctrl_pin_desc *pin_desc = &pctldev->desc->pins[pin];
265 enum pin_config_param param = pinconf_to_config_param(*configs);
266 bool has_arg = false;
271 case PIN_CONFIG_BIAS_DISABLE:
272 case PIN_CONFIG_BIAS_PULL_UP:
273 case PIN_CONFIG_BIAS_PULL_DOWN:
274 ret = uniphier_conf_pin_bias_get(pctldev, pin_desc, param);
276 case PIN_CONFIG_DRIVE_STRENGTH:
277 ret = uniphier_conf_pin_drive_get(pctldev, pin_desc, &arg);
280 case PIN_CONFIG_INPUT_ENABLE:
281 ret = uniphier_conf_pin_input_enable_get(pctldev, pin_desc);
284 /* unsupported parameter */
289 if (ret == 0 && has_arg)
290 *configs = pinconf_to_config_packed(param, arg);
295 static int uniphier_conf_pin_bias_set(struct pinctrl_dev *pctldev,
296 const struct pinctrl_pin_desc *pin,
297 enum pin_config_param param,
300 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
301 enum uniphier_pin_pull_dir pull_dir =
302 uniphier_pin_get_pull_dir(pin->drv_data);
303 unsigned int pupdctrl, reg, shift;
304 unsigned int val = 1;
307 case PIN_CONFIG_BIAS_DISABLE:
308 if (pull_dir == UNIPHIER_PIN_PULL_NONE)
310 if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED ||
311 pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED) {
312 dev_err(pctldev->dev,
313 "can not disable pull register for pin %u (%s)\n",
314 pin->number, pin->name);
319 case PIN_CONFIG_BIAS_PULL_UP:
320 if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED && arg != 0)
322 if (pull_dir != UNIPHIER_PIN_PULL_UP) {
323 dev_err(pctldev->dev,
324 "pull-up is unsupported for pin %u (%s)\n",
325 pin->number, pin->name);
329 dev_err(pctldev->dev, "pull-up can not be total\n");
333 case PIN_CONFIG_BIAS_PULL_DOWN:
334 if (pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED && arg != 0)
336 if (pull_dir != UNIPHIER_PIN_PULL_DOWN) {
337 dev_err(pctldev->dev,
338 "pull-down is unsupported for pin %u (%s)\n",
339 pin->number, pin->name);
343 dev_err(pctldev->dev, "pull-down can not be total\n");
347 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
348 if (pull_dir == UNIPHIER_PIN_PULL_NONE) {
349 dev_err(pctldev->dev,
350 "pull-up/down is unsupported for pin %u (%s)\n",
351 pin->number, pin->name);
356 return 0; /* configuration ingored */
362 pupdctrl = uniphier_pin_get_pupdctrl(pin->drv_data);
364 reg = UNIPHIER_PINCTRL_PUPDCTRL_BASE + pupdctrl / 32 * 4;
365 shift = pupdctrl % 32;
367 return regmap_update_bits(priv->regmap, reg, 1 << shift, val << shift);
370 static int uniphier_conf_pin_drive_set(struct pinctrl_dev *pctldev,
371 const struct pinctrl_pin_desc *pin,
374 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
375 enum uniphier_pin_drv_type type =
376 uniphier_pin_get_drv_type(pin->drv_data);
377 const unsigned int strength_1bit[] = {4, 8, -1};
378 const unsigned int strength_2bit[] = {8, 12, 16, 20, -1};
379 const unsigned int strength_3bit[] = {4, 5, 7, 9, 11, 12, 14, 16, -1};
380 const unsigned int *supported_strength;
381 unsigned int drvctrl, reg, shift, mask, width, val;
384 case UNIPHIER_PIN_DRV_1BIT:
385 supported_strength = strength_1bit;
386 reg = UNIPHIER_PINCTRL_DRVCTRL_BASE;
389 case UNIPHIER_PIN_DRV_2BIT:
390 supported_strength = strength_2bit;
391 reg = UNIPHIER_PINCTRL_DRV2CTRL_BASE;
394 case UNIPHIER_PIN_DRV_3BIT:
395 supported_strength = strength_3bit;
396 reg = UNIPHIER_PINCTRL_DRV3CTRL_BASE;
400 dev_err(pctldev->dev,
401 "cannot change drive strength for pin %u (%s)\n",
402 pin->number, pin->name);
406 for (val = 0; supported_strength[val] > 0; val++) {
407 if (supported_strength[val] > strength)
412 dev_err(pctldev->dev,
413 "unsupported drive strength %u mA for pin %u (%s)\n",
414 strength, pin->number, pin->name);
420 drvctrl = uniphier_pin_get_drvctrl(pin->drv_data);
423 reg += drvctrl / 32 * 4;
424 shift = drvctrl % 32;
425 mask = (1U << width) - 1;
427 return regmap_update_bits(priv->regmap, reg,
428 mask << shift, val << shift);
431 static int uniphier_conf_pin_input_enable(struct pinctrl_dev *pctldev,
432 const struct pinctrl_pin_desc *pin,
435 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
436 unsigned int iectrl = uniphier_pin_get_iectrl(pin->drv_data);
440 * Multiple pins share one input enable, so per-pin disabling
443 dev_err(pctldev->dev, "unable to disable input\n");
447 if (iectrl == UNIPHIER_PIN_IECTRL_NONE)
448 /* This pin is always input-enabled. nothing to do. */
451 return regmap_update_bits(priv->regmap, UNIPHIER_PINCTRL_IECTRL,
452 BIT(iectrl), BIT(iectrl));
455 static int uniphier_conf_pin_config_set(struct pinctrl_dev *pctldev,
457 unsigned long *configs,
458 unsigned num_configs)
460 const struct pinctrl_pin_desc *pin_desc = &pctldev->desc->pins[pin];
463 for (i = 0; i < num_configs; i++) {
464 enum pin_config_param param =
465 pinconf_to_config_param(configs[i]);
466 u16 arg = pinconf_to_config_argument(configs[i]);
469 case PIN_CONFIG_BIAS_DISABLE:
470 case PIN_CONFIG_BIAS_PULL_UP:
471 case PIN_CONFIG_BIAS_PULL_DOWN:
472 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
473 ret = uniphier_conf_pin_bias_set(pctldev, pin_desc,
476 case PIN_CONFIG_DRIVE_STRENGTH:
477 ret = uniphier_conf_pin_drive_set(pctldev, pin_desc,
480 case PIN_CONFIG_INPUT_ENABLE:
481 ret = uniphier_conf_pin_input_enable(pctldev,
485 dev_err(pctldev->dev,
486 "unsupported configuration parameter %u\n",
498 static int uniphier_conf_pin_config_group_set(struct pinctrl_dev *pctldev,
500 unsigned long *configs,
501 unsigned num_configs)
503 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
504 const unsigned *pins = priv->socdata->groups[selector].pins;
505 unsigned num_pins = priv->socdata->groups[selector].num_pins;
508 for (i = 0; i < num_pins; i++) {
509 ret = uniphier_conf_pin_config_set(pctldev, pins[i],
510 configs, num_configs);
518 static const struct pinconf_ops uniphier_confops = {
520 .pin_config_get = uniphier_conf_pin_config_get,
521 .pin_config_set = uniphier_conf_pin_config_set,
522 .pin_config_group_set = uniphier_conf_pin_config_group_set,
525 static int uniphier_pmx_get_functions_count(struct pinctrl_dev *pctldev)
527 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
529 return priv->socdata->functions_count;
532 static const char *uniphier_pmx_get_function_name(struct pinctrl_dev *pctldev,
535 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
537 return priv->socdata->functions[selector].name;
540 static int uniphier_pmx_get_function_groups(struct pinctrl_dev *pctldev,
542 const char * const **groups,
543 unsigned *num_groups)
545 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
547 *groups = priv->socdata->functions[selector].groups;
548 *num_groups = priv->socdata->functions[selector].num_groups;
553 static int uniphier_pmx_set_one_mux(struct pinctrl_dev *pctldev, unsigned pin,
556 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
557 unsigned mux_bits = priv->socdata->mux_bits;
558 unsigned reg_stride = priv->socdata->reg_stride;
559 unsigned reg, reg_end, shift, mask;
562 /* some pins need input-enabling */
563 ret = uniphier_conf_pin_input_enable(pctldev,
564 &pctldev->desc->pins[pin], 1);
568 reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride;
569 reg_end = reg + reg_stride;
570 shift = pin * mux_bits % 32;
571 mask = (1U << mux_bits) - 1;
574 * If reg_stride is greater than 4, the MSB of each pinsel shall be
575 * stored in the offset+4.
577 for (; reg < reg_end; reg += 4) {
578 ret = regmap_update_bits(priv->regmap, reg,
579 mask << shift, muxval << shift);
585 if (priv->socdata->load_pinctrl) {
586 ret = regmap_write(priv->regmap,
587 UNIPHIER_PINCTRL_LOAD_PINMUX, 1);
595 static int uniphier_pmx_set_mux(struct pinctrl_dev *pctldev,
596 unsigned func_selector,
597 unsigned group_selector)
599 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
600 const struct uniphier_pinctrl_group *grp =
601 &priv->socdata->groups[group_selector];
605 for (i = 0; i < grp->num_pins; i++) {
606 ret = uniphier_pmx_set_one_mux(pctldev, grp->pins[i],
615 static int uniphier_pmx_gpio_request_enable(struct pinctrl_dev *pctldev,
616 struct pinctrl_gpio_range *range,
619 struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
620 const struct uniphier_pinctrl_group *groups = priv->socdata->groups;
621 int groups_count = priv->socdata->groups_count;
622 enum uniphier_pinmux_gpio_range_type range_type;
625 if (strstr(range->name, "irq"))
626 range_type = UNIPHIER_PINMUX_GPIO_RANGE_IRQ;
628 range_type = UNIPHIER_PINMUX_GPIO_RANGE_PORT;
630 for (i = 0; i < groups_count; i++) {
631 if (groups[i].range_type != range_type)
634 for (j = 0; j < groups[i].num_pins; j++)
635 if (groups[i].pins[j] == offset)
639 dev_err(pctldev->dev, "pin %u does not support GPIO\n", offset);
643 return uniphier_pmx_set_one_mux(pctldev, offset, groups[i].muxvals[j]);
646 static const struct pinmux_ops uniphier_pmxops = {
647 .get_functions_count = uniphier_pmx_get_functions_count,
648 .get_function_name = uniphier_pmx_get_function_name,
649 .get_function_groups = uniphier_pmx_get_function_groups,
650 .set_mux = uniphier_pmx_set_mux,
651 .gpio_request_enable = uniphier_pmx_gpio_request_enable,
655 int uniphier_pinctrl_probe(struct platform_device *pdev,
656 struct uniphier_pinctrl_socdata *socdata)
658 struct device *dev = &pdev->dev;
659 struct uniphier_pinctrl_priv *priv;
662 !socdata->pins || !socdata->npins ||
664 !socdata->groups_count ||
665 !socdata->functions ||
666 !socdata->functions_count ||
667 !socdata->mux_bits ||
668 !socdata->reg_stride) {
669 dev_err(dev, "pinctrl socdata lacks necessary members\n");
673 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
677 priv->regmap = syscon_node_to_regmap(dev->of_node);
678 if (IS_ERR(priv->regmap)) {
679 dev_err(dev, "failed to get regmap\n");
680 return PTR_ERR(priv->regmap);
683 priv->socdata = socdata;
684 priv->pctldesc.name = dev->driver->name;
685 priv->pctldesc.pins = socdata->pins;
686 priv->pctldesc.npins = socdata->npins;
687 priv->pctldesc.pctlops = &uniphier_pctlops;
688 priv->pctldesc.pmxops = &uniphier_pmxops;
689 priv->pctldesc.confops = &uniphier_confops;
690 priv->pctldesc.owner = dev->driver->owner;
692 priv->pctldev = devm_pinctrl_register(dev, &priv->pctldesc, priv);
693 if (IS_ERR(priv->pctldev)) {
694 dev_err(dev, "failed to register UniPhier pinctrl driver\n");
695 return PTR_ERR(priv->pctldev);
698 platform_set_drvdata(pdev, priv);
702 EXPORT_SYMBOL_GPL(uniphier_pinctrl_probe);