drivers/regulator/ab8500.c

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2010
   3  *
   4  * License Terms: GNU General Public License v2
   5  *
   6  * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
   7  *          Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
   8  *          Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
   9  *
  10  * AB8500 peripheral regulators
  11  *
  12  * AB8500 supports the following regulators:
  13  *   VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  14  *
  15  * AB8505 supports the following regulators:
  16  *   VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  17  */
  18 #include <linux/init.h>
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/err.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/mfd/abx500.h>
  24 #include <linux/mfd/abx500/ab8500.h>
  25 #include <linux/of.h>
  26 #include <linux/regulator/of_regulator.h>
  27 #include <linux/regulator/driver.h>
  28 #include <linux/regulator/machine.h>
  29 #include <linux/regulator/ab8500.h>
  30 #include <linux/slab.h>
  31
  32 /**
  33  * struct ab8500_regulator_info - ab8500 regulator information
  34  * @dev: device pointer
  35  * @desc: regulator description
  36  * @regulator_dev: regulator device
  37  * @is_enabled: status of regulator (on/off)
  38  * @load_lp_uA: maximum load in idle (low power) mode
  39  * @update_bank: bank to control on/off
  40  * @update_reg: register to control on/off
  41  * @update_mask: mask to enable/disable and set mode of regulator
  42  * @update_val: bits holding the regulator current mode
  43  * @update_val_idle: bits to enable the regulator in idle (low power) mode
  44  * @update_val_normal: bits to enable the regulator in normal (high power) mode
  45  * @voltage_bank: bank to control regulator voltage
  46  * @voltage_reg: register to control regulator voltage
  47  * @voltage_mask: mask to control regulator voltage
  48  * @voltage_shift: shift to control regulator voltage
  49  */
  50 struct ab8500_regulator_info {
  51         struct device           *dev;
  52         struct regulator_desc   desc;
  53         struct regulator_dev    *regulator;
  54         bool is_enabled;
  55         int load_lp_uA;
  56         u8 update_bank;
  57         u8 update_reg;
  58         u8 update_mask;
  59         u8 update_val;
  60         u8 update_val_idle;
  61         u8 update_val_normal;
  62         u8 voltage_bank;
  63         u8 voltage_reg;
  64         u8 voltage_mask;
  65         u8 voltage_shift;
  66         struct {
  67                 u8 voltage_limit;
  68                 u8 voltage_bank;
  69                 u8 voltage_reg;
  70                 u8 voltage_mask;
  71                 u8 voltage_shift;
  72         } expand_register;
  73 };
  74
  75 /* voltage tables for the vauxn/vintcore supplies */
  76 static const unsigned int ldo_vauxn_voltages[] = {
  77         1100000,
  78         1200000,
  79         1300000,
  80         1400000,
  81         1500000,
  82         1800000,
  83         1850000,
  84         1900000,
  85         2500000,
  86         2650000,
  87         2700000,
  88         2750000,
  89         2800000,
  90         2900000,
  91         3000000,
  92         3300000,
  93 };
  94
  95 static const unsigned int ldo_vaux3_voltages[] = {
  96         1200000,
  97         1500000,
  98         1800000,
  99         2100000,
 100         2500000,
 101         2750000,
 102         2790000,
 103         2910000,
 104 };
 105
 106 static const unsigned int ldo_vaux56_voltages[] = {
 107         1800000,
 108         1050000,
 109         1100000,
 110         1200000,
 111         1500000,
 112         2200000,
 113         2500000,
 114         2790000,
 115 };
 116
 117 static const unsigned int ldo_vaux3_ab8540_voltages[] = {
 118         1200000,
 119         1500000,
 120         1800000,
 121         2100000,
 122         2500000,
 123         2750000,
 124         2790000,
 125         2910000,
 126         3050000,
 127 };
 128
 129 static const unsigned int ldo_vintcore_voltages[] = {
 130         1200000,
 131         1225000,
 132         1250000,
 133         1275000,
 134         1300000,
 135         1325000,
 136         1350000,
 137 };
 138
 139 static const unsigned int ldo_sdio_voltages[] = {
 140         1160000,
 141         1050000,
 142         1100000,
 143         1500000,
 144         1800000,
 145         2200000,
 146         2910000,
 147         3050000,
 148 };
 149
 150 static const unsigned int fixed_1200000_voltage[] = {
 151         1200000,
 152 };
 153
 154 static const unsigned int fixed_1800000_voltage[] = {
 155         1800000,
 156 };
 157
 158 static const unsigned int fixed_2000000_voltage[] = {
 159         2000000,
 160 };
 161
 162 static const unsigned int fixed_2050000_voltage[] = {
 163         2050000,
 164 };
 165
 166 static const unsigned int fixed_3300000_voltage[] = {
 167         3300000,
 168 };
 169
 170 static const unsigned int ldo_vana_voltages[] = {
 171         1050000,
 172         1075000,
 173         1100000,
 174         1125000,
 175         1150000,
 176         1175000,
 177         1200000,
 178         1225000,
 179 };
 180
 181 static const unsigned int ldo_vaudio_voltages[] = {
 182         2000000,
 183         2100000,
 184         2200000,
 185         2300000,
 186         2400000,
 187         2500000,
 188         2600000,
 189         2600000,        /* Duplicated in Vaudio and IsoUicc Control register. */
 190 };
 191
 192 static int ab8500_regulator_enable(struct regulator_dev *rdev)
 193 {
 194         int ret;
 195         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 196
 197         if (info == NULL) {
 198                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 199                 return -EINVAL;
 200         }
 201
 202         ret = abx500_mask_and_set_register_interruptible(info->dev,
 203                 info->update_bank, info->update_reg,
 204                 info->update_mask, info->update_val);
 205         if (ret < 0) {
 206                 dev_err(rdev_get_dev(rdev),
 207                         "couldn't set enable bits for regulator\n");
 208                 return ret;
 209         }
 210
 211         info->is_enabled = true;
 212
 213         dev_vdbg(rdev_get_dev(rdev),
 214                 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 215                 info->desc.name, info->update_bank, info->update_reg,
 216                 info->update_mask, info->update_val);
 217
 218         return ret;
 219 }
 220
 221 static int ab8500_regulator_disable(struct regulator_dev *rdev)
 222 {
 223         int ret;
 224         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 225
 226         if (info == NULL) {
 227                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 228                 return -EINVAL;
 229         }
 230
 231         ret = abx500_mask_and_set_register_interruptible(info->dev,
 232                 info->update_bank, info->update_reg,
 233                 info->update_mask, 0x0);
 234         if (ret < 0) {
 235                 dev_err(rdev_get_dev(rdev),
 236                         "couldn't set disable bits for regulator\n");
 237                 return ret;
 238         }
 239
 240         info->is_enabled = false;
 241
 242         dev_vdbg(rdev_get_dev(rdev),
 243                 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 244                 info->desc.name, info->update_bank, info->update_reg,
 245                 info->update_mask, 0x0);
 246
 247         return ret;
 248 }
 249
 250 static unsigned int ab8500_regulator_get_optimum_mode(
 251                 struct regulator_dev *rdev, int input_uV,
 252                 int output_uV, int load_uA)
 253 {
 254         unsigned int mode;
 255
 256         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 257
 258         if (info == NULL) {
 259                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 260                 return -EINVAL;
 261         }
 262
 263         if (load_uA <= info->load_lp_uA)
 264                 mode = REGULATOR_MODE_IDLE;
 265         else
 266                 mode = REGULATOR_MODE_NORMAL;
 267
 268         return mode;
 269 }
 270
 271 static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
 272                                      unsigned int mode)
 273 {
 274         int ret;
 275         u8 update_val;
 276         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 277
 278         if (info == NULL) {
 279                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 280                 return -EINVAL;
 281         }
 282
 283         switch (mode) {
 284         case REGULATOR_MODE_NORMAL:
 285                 update_val = info->update_val_normal;
 286                 break;
 287         case REGULATOR_MODE_IDLE:
 288                 update_val = info->update_val_idle;
 289                 break;
 290         default:
 291                 return -EINVAL;
 292         }
 293
 294         /* ab8500 regulators share mode and enable in the same register bits.
 295            off = 0b00
 296            low power mode= 0b11
 297            full powermode = 0b01
 298            (HW control mode = 0b10)
 299            Thus we don't write to the register when regulator is disabled.
 300         */
 301         if (info->is_enabled) {
 302                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 303                         info->update_bank, info->update_reg,
 304                         info->update_mask, update_val);
 305                 if (ret < 0) {
 306                         dev_err(rdev_get_dev(rdev),
 307                                 "couldn't set regulator mode\n");
 308                         return ret;
 309                 }
 310
 311                 dev_vdbg(rdev_get_dev(rdev),
 312                         "%s-set_mode (bank, reg, mask, value): "
 313                         "0x%x, 0x%x, 0x%x, 0x%x\n",
 314                         info->desc.name, info->update_bank, info->update_reg,
 315                         info->update_mask, update_val);
 316         }
 317
 318         info->update_val = update_val;
 319
 320         return 0;
 321 }
 322
 323 static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
 324 {
 325         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 326         int ret;
 327
 328         if (info == NULL) {
 329                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 330                 return -EINVAL;
 331         }
 332
 333         if (info->update_val == info->update_val_normal)
 334                 ret = REGULATOR_MODE_NORMAL;
 335         else if (info->update_val == info->update_val_idle)
 336                 ret = REGULATOR_MODE_IDLE;
 337         else
 338                 ret = -EINVAL;
 339
 340         return ret;
 341 }
 342
 343 static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
 344 {
 345         int ret;
 346         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 347         u8 regval;
 348
 349         if (info == NULL) {
 350                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 351                 return -EINVAL;
 352         }
 353
 354         ret = abx500_get_register_interruptible(info->dev,
 355                 info->update_bank, info->update_reg, &regval);
 356         if (ret < 0) {
 357                 dev_err(rdev_get_dev(rdev),
 358                         "couldn't read 0x%x register\n", info->update_reg);
 359                 return ret;
 360         }
 361
 362         dev_vdbg(rdev_get_dev(rdev),
 363                 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 364                 " 0x%x\n",
 365                 info->desc.name, info->update_bank, info->update_reg,
 366                 info->update_mask, regval);
 367
 368         if (regval & info->update_mask)
 369                 info->is_enabled = true;
 370         else
 371                 info->is_enabled = false;
 372
 373         return info->is_enabled;
 374 }
 375
 376 static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
 377 {
 378         int ret, val;
 379         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 380         u8 regval;
 381
 382         if (info == NULL) {
 383                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 384                 return -EINVAL;
 385         }
 386
 387         ret = abx500_get_register_interruptible(info->dev,
 388                         info->voltage_bank, info->voltage_reg, &regval);
 389         if (ret < 0) {
 390                 dev_err(rdev_get_dev(rdev),
 391                         "couldn't read voltage reg for regulator\n");
 392                 return ret;
 393         }
 394
 395         dev_vdbg(rdev_get_dev(rdev),
 396                 "%s-get_voltage (bank, reg, mask, shift, value): "
 397                 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
 398                 info->desc.name, info->voltage_bank,
 399                 info->voltage_reg, info->voltage_mask,
 400                 info->voltage_shift, regval);
 401
 402         val = regval & info->voltage_mask;
 403         return val >> info->voltage_shift;
 404 }
 405
 406 static int ab8540_aux3_regulator_get_voltage_sel(struct regulator_dev *rdev)
 407 {
 408         int ret, val;
 409         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 410         u8 regval, regval_expand;
 411
 412         if (info == NULL) {
 413                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 414                 return -EINVAL;
 415         }
 416
 417         ret = abx500_get_register_interruptible(info->dev,
 418                         info->voltage_bank, info->voltage_reg, &regval);
 419
 420         if (ret < 0) {
 421                 dev_err(rdev_get_dev(rdev),
 422                         "couldn't read voltage reg for regulator\n");
 423                 return ret;
 424         }
 425
 426         ret = abx500_get_register_interruptible(info->dev,
 427                         info->expand_register.voltage_bank,
 428                         info->expand_register.voltage_reg, &regval_expand);
 429
 430         if (ret < 0) {
 431                 dev_err(rdev_get_dev(rdev),
 432                         "couldn't read voltage reg for regulator\n");
 433                 return ret;
 434         }
 435
 436         dev_vdbg(rdev_get_dev(rdev),
 437                 "%s-get_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 438                 " 0x%x\n",
 439                 info->desc.name, info->voltage_bank, info->voltage_reg,
 440                 info->voltage_mask, regval);
 441         dev_vdbg(rdev_get_dev(rdev),
 442                 "%s-get_voltage expand (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 443                 " 0x%x\n",
 444                 info->desc.name, info->expand_register.voltage_bank,
 445                 info->expand_register.voltage_reg,
 446                 info->expand_register.voltage_mask, regval_expand);
 447
 448         if (regval_expand&(info->expand_register.voltage_mask))
 449                 /* Vaux3 has a different layout */
 450                 val = info->expand_register.voltage_limit;
 451         else
 452                 val = (regval & info->voltage_mask) >> info->voltage_shift;
 453
 454         return val;
 455 }
 456
 457 static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
 458                                             unsigned selector)
 459 {
 460         int ret;
 461         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 462         u8 regval;
 463
 464         if (info == NULL) {
 465                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 466                 return -EINVAL;
 467         }
 468
 469         /* set the registers for the request */
 470         regval = (u8)selector << info->voltage_shift;
 471         ret = abx500_mask_and_set_register_interruptible(info->dev,
 472                         info->voltage_bank, info->voltage_reg,
 473                         info->voltage_mask, regval);
 474         if (ret < 0)
 475                 dev_err(rdev_get_dev(rdev),
 476                 "couldn't set voltage reg for regulator\n");
 477
 478         dev_vdbg(rdev_get_dev(rdev),
 479                 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 480                 " 0x%x\n",
 481                 info->desc.name, info->voltage_bank, info->voltage_reg,
 482                 info->voltage_mask, regval);
 483
 484         return ret;
 485 }
 486
 487 static int ab8540_aux3_regulator_set_voltage_sel(struct regulator_dev *rdev,
 488                                                 unsigned selector)
 489 {
 490         int ret;
 491         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 492         u8 regval;
 493
 494         if (info == NULL) {
 495                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 496                 return -EINVAL;
 497         }
 498
 499         if (selector >= info->expand_register.voltage_limit) {
 500                 /* Vaux3 bit4 has different layout */
 501                 regval = (u8)selector << info->expand_register.voltage_shift;
 502                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 503                                         info->expand_register.voltage_bank,
 504                                         info->expand_register.voltage_reg,
 505                                         info->expand_register.voltage_mask,
 506                                         regval);
 507         } else {
 508                 /* set the registers for the request */
 509                 regval = (u8)selector << info->voltage_shift;
 510                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 511                                 info->voltage_bank, info->voltage_reg,
 512                                 info->voltage_mask, regval);
 513         }
 514         if (ret < 0)
 515                 dev_err(rdev_get_dev(rdev),
 516                         "couldn't set voltage reg for regulator\n");
 517
 518         dev_vdbg(rdev_get_dev(rdev),
 519                         "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 520                         " 0x%x\n",
 521                         info->desc.name, info->voltage_bank, info->voltage_reg,
 522                         info->voltage_mask, regval);
 523
 524         return ret;
 525 }
 526
 527 static int ab8500_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
 528                                              unsigned int old_sel,
 529                                              unsigned int new_sel)
 530 {
 531         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 532
 533         return info->delay;
 534 }
 535
 536 static struct regulator_ops ab8500_regulator_volt_mode_ops = {
 537         .enable                 = ab8500_regulator_enable,
 538         .disable                = ab8500_regulator_disable,
 539         .is_enabled             = ab8500_regulator_is_enabled,
 540         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 541         .set_mode               = ab8500_regulator_set_mode,
 542         .get_mode               = ab8500_regulator_get_mode,
 543         .get_voltage_sel        = ab8500_regulator_get_voltage_sel,
 544         .set_voltage_sel        = ab8500_regulator_set_voltage_sel,
 545         .list_voltage           = regulator_list_voltage_table,
 546 };
 547
 548 static struct regulator_ops ab8540_aux3_regulator_volt_mode_ops = {
 549         .enable         = ab8500_regulator_enable,
 550         .disable        = ab8500_regulator_disable,
 551         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 552         .set_mode       = ab8500_regulator_set_mode,
 553         .get_mode       = ab8500_regulator_get_mode,
 554         .is_enabled     = ab8500_regulator_is_enabled,
 555         .get_voltage_sel = ab8540_aux3_regulator_get_voltage_sel,
 556         .set_voltage_sel = ab8540_aux3_regulator_set_voltage_sel,
 557         .list_voltage   = regulator_list_voltage_table,
 558         .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
 559 };
 560
 561 static struct regulator_ops ab8500_regulator_volt_ops = {
 562         .enable         = ab8500_regulator_enable,
 563         .disable        = ab8500_regulator_disable,
 564         .is_enabled     = ab8500_regulator_is_enabled,
 565         .get_voltage_sel = ab8500_regulator_get_voltage_sel,
 566         .set_voltage_sel = ab8500_regulator_set_voltage_sel,
 567         .list_voltage   = regulator_list_voltage_table,
 568         .set_voltage_time_sel = ab8500_regulator_set_voltage_time_sel,
 569 };
 570
 571 static struct regulator_ops ab8500_regulator_mode_ops = {
 572         .enable                 = ab8500_regulator_enable,
 573         .disable                = ab8500_regulator_disable,
 574         .is_enabled             = ab8500_regulator_is_enabled,
 575         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 576         .set_mode               = ab8500_regulator_set_mode,
 577         .get_mode               = ab8500_regulator_get_mode,
 578         .list_voltage           = regulator_list_voltage_linear,
 579 };
 580
 581 static struct regulator_ops ab8500_regulator_ops = {
 582         .enable                 = ab8500_regulator_enable,
 583         .disable                = ab8500_regulator_disable,
 584         .is_enabled             = ab8500_regulator_is_enabled,
 585         .list_voltage           = regulator_list_voltage_linear,
 586 };
 587
 588 /* AB8500 regulator information */
 589 static struct ab8500_regulator_info
 590                 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
 591         /*
 592          * Variable Voltage Regulators
 593          *   name, min mV, max mV,
 594          *   update bank, reg, mask, enable val
 595          *   volt bank, reg, mask
 596          */
 597         [AB8500_LDO_AUX1] = {
 598                 .desc = {
 599                         .name           = "LDO-AUX1",
 600                         .ops            = &ab8500_regulator_volt_mode_ops,
 601                         .type           = REGULATOR_VOLTAGE,
 602                         .id             = AB8500_LDO_AUX1,
 603                         .owner          = THIS_MODULE,
 604                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 605                         .volt_table     = ldo_vauxn_voltages,
 606                         .enable_time    = 200,
 607                 },
 608                 .load_lp_uA             = 5000,
 609                 .update_bank            = 0x04,
 610                 .update_reg             = 0x09,
 611                 .update_mask            = 0x03,
 612                 .update_val             = 0x01,
 613                 .update_val_idle        = 0x03,
 614                 .update_val_normal      = 0x01,
 615                 .voltage_bank           = 0x04,
 616                 .voltage_reg            = 0x1f,
 617                 .voltage_mask           = 0x0f,
 618         },
 619         [AB8500_LDO_AUX2] = {
 620                 .desc = {
 621                         .name           = "LDO-AUX2",
 622                         .ops            = &ab8500_regulator_volt_mode_ops,
 623                         .type           = REGULATOR_VOLTAGE,
 624                         .id             = AB8500_LDO_AUX2,
 625                         .owner          = THIS_MODULE,
 626                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 627                         .volt_table     = ldo_vauxn_voltages,
 628                         .enable_time    = 200,
 629                 },
 630                 .load_lp_uA             = 5000,
 631                 .update_bank            = 0x04,
 632                 .update_reg             = 0x09,
 633                 .update_mask            = 0x0c,
 634                 .update_val             = 0x04,
 635                 .update_val_idle        = 0x0c,
 636                 .update_val_normal      = 0x04,
 637                 .voltage_bank           = 0x04,
 638                 .voltage_reg            = 0x20,
 639                 .voltage_mask           = 0x0f,
 640         },
 641         [AB8500_LDO_AUX3] = {
 642                 .desc = {
 643                         .name           = "LDO-AUX3",
 644                         .ops            = &ab8500_regulator_volt_mode_ops,
 645                         .type           = REGULATOR_VOLTAGE,
 646                         .id             = AB8500_LDO_AUX3,
 647                         .owner          = THIS_MODULE,
 648                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 649                         .volt_table     = ldo_vaux3_voltages,
 650                         .enable_time    = 450,
 651                 },
 652                 .load_lp_uA             = 5000,
 653                 .update_bank            = 0x04,
 654                 .update_reg             = 0x0a,
 655                 .update_mask            = 0x03,
 656                 .update_val             = 0x01,
 657                 .update_val_idle        = 0x03,
 658                 .update_val_normal      = 0x01,
 659                 .voltage_bank           = 0x04,
 660                 .voltage_reg            = 0x21,
 661                 .voltage_mask           = 0x07,
 662         },
 663         [AB8500_LDO_INTCORE] = {
 664                 .desc = {
 665                         .name           = "LDO-INTCORE",
 666                         .ops            = &ab8500_regulator_volt_mode_ops,
 667                         .type           = REGULATOR_VOLTAGE,
 668                         .id             = AB8500_LDO_INTCORE,
 669                         .owner          = THIS_MODULE,
 670                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 671                         .volt_table     = ldo_vintcore_voltages,
 672                         .enable_time    = 750,
 673                 },
 674                 .load_lp_uA             = 5000,
 675                 .update_bank            = 0x03,
 676                 .update_reg             = 0x80,
 677                 .update_mask            = 0x44,
 678                 .update_val             = 0x44,
 679                 .update_val_idle        = 0x44,
 680                 .update_val_normal      = 0x04,
 681                 .voltage_bank           = 0x03,
 682                 .voltage_reg            = 0x80,
 683                 .voltage_mask           = 0x38,
 684                 .voltage_shift          = 3,
 685         },
 686
 687         /*
 688          * Fixed Voltage Regulators
 689          *   name, fixed mV,
 690          *   update bank, reg, mask, enable val
 691          */
 692         [AB8500_LDO_TVOUT] = {
 693                 .desc = {
 694                         .name           = "LDO-TVOUT",
 695                         .ops            = &ab8500_regulator_mode_ops,
 696                         .type           = REGULATOR_VOLTAGE,
 697                         .id             = AB8500_LDO_TVOUT,
 698                         .owner          = THIS_MODULE,
 699                         .n_voltages     = 1,
 700                         .volt_table     = fixed_2000000_voltage,
 701                         .enable_time    = 500,
 702                 },
 703                 .load_lp_uA             = 1000,
 704                 .update_bank            = 0x03,
 705                 .update_reg             = 0x80,
 706                 .update_mask            = 0x82,
 707                 .update_val             = 0x02,
 708                 .update_val_idle        = 0x82,
 709                 .update_val_normal      = 0x02,
 710         },
 711         [AB8500_LDO_AUDIO] = {
 712                 .desc = {
 713                         .name           = "LDO-AUDIO",
 714                         .ops            = &ab8500_regulator_ops,
 715                         .type           = REGULATOR_VOLTAGE,
 716                         .id             = AB8500_LDO_AUDIO,
 717                         .owner          = THIS_MODULE,
 718                         .n_voltages     = 1,
 719                         .enable_time    = 140,
 720                         .volt_table     = fixed_2000000_voltage,
 721                 },
 722                 .update_bank            = 0x03,
 723                 .update_reg             = 0x83,
 724                 .update_mask            = 0x02,
 725                 .update_val             = 0x02,
 726         },
 727         [AB8500_LDO_ANAMIC1] = {
 728                 .desc = {
 729                         .name           = "LDO-ANAMIC1",
 730                         .ops            = &ab8500_regulator_ops,
 731                         .type           = REGULATOR_VOLTAGE,
 732                         .id             = AB8500_LDO_ANAMIC1,
 733                         .owner          = THIS_MODULE,
 734                         .n_voltages     = 1,
 735                         .enable_time    = 500,
 736                         .volt_table     = fixed_2050000_voltage,
 737                 },
 738                 .update_bank            = 0x03,
 739                 .update_reg             = 0x83,
 740                 .update_mask            = 0x08,
 741                 .update_val             = 0x08,
 742         },
 743         [AB8500_LDO_ANAMIC2] = {
 744                 .desc = {
 745                         .name           = "LDO-ANAMIC2",
 746                         .ops            = &ab8500_regulator_ops,
 747                         .type           = REGULATOR_VOLTAGE,
 748                         .id             = AB8500_LDO_ANAMIC2,
 749                         .owner          = THIS_MODULE,
 750                         .n_voltages     = 1,
 751                         .enable_time    = 500,
 752                         .volt_table     = fixed_2050000_voltage,
 753                 },
 754                 .update_bank            = 0x03,
 755                 .update_reg             = 0x83,
 756                 .update_mask            = 0x10,
 757                 .update_val             = 0x10,
 758         },
 759         [AB8500_LDO_DMIC] = {
 760                 .desc = {
 761                         .name           = "LDO-DMIC",
 762                         .ops            = &ab8500_regulator_ops,
 763                         .type           = REGULATOR_VOLTAGE,
 764                         .id             = AB8500_LDO_DMIC,
 765                         .owner          = THIS_MODULE,
 766                         .n_voltages     = 1,
 767                         .enable_time    = 420,
 768                         .volt_table     = fixed_1800000_voltage,
 769                 },
 770                 .update_bank            = 0x03,
 771                 .update_reg             = 0x83,
 772                 .update_mask            = 0x04,
 773                 .update_val             = 0x04,
 774         },
 775
 776         /*
 777          * Regulators with fixed voltage and normal/idle modes
 778          */
 779         [AB8500_LDO_ANA] = {
 780                 .desc = {
 781                         .name           = "LDO-ANA",
 782                         .ops            = &ab8500_regulator_mode_ops,
 783                         .type           = REGULATOR_VOLTAGE,
 784                         .id             = AB8500_LDO_ANA,
 785                         .owner          = THIS_MODULE,
 786                         .n_voltages     = 1,
 787                         .enable_time    = 140,
 788                         .volt_table     = fixed_1200000_voltage,
 789                 },
 790                 .load_lp_uA             = 1000,
 791                 .update_bank            = 0x04,
 792                 .update_reg             = 0x06,
 793                 .update_mask            = 0x0c,
 794                 .update_val             = 0x04,
 795                 .update_val_idle        = 0x0c,
 796                 .update_val_normal      = 0x04,
 797         },
 798 };
 799
 800 /* AB8505 regulator information */
 801 static struct ab8500_regulator_info
 802                 ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
 803         /*
 804          * Variable Voltage Regulators
 805          *   name, min mV, max mV,
 806          *   update bank, reg, mask, enable val
 807          *   volt bank, reg, mask, table, table length
 808          */
 809         [AB8505_LDO_AUX1] = {
 810                 .desc = {
 811                         .name           = "LDO-AUX1",
 812                         .ops            = &ab8500_regulator_volt_mode_ops,
 813                         .type           = REGULATOR_VOLTAGE,
 814                         .id             = AB8505_LDO_AUX1,
 815                         .owner          = THIS_MODULE,
 816                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 817                         .volt_table     = ldo_vauxn_voltages,
 818                 },
 819                 .load_lp_uA             = 5000,
 820                 .update_bank            = 0x04,
 821                 .update_reg             = 0x09,
 822                 .update_mask            = 0x03,
 823                 .update_val             = 0x01,
 824                 .update_val_idle        = 0x03,
 825                 .update_val_normal      = 0x01,
 826                 .voltage_bank           = 0x04,
 827                 .voltage_reg            = 0x1f,
 828                 .voltage_mask           = 0x0f,
 829         },
 830         [AB8505_LDO_AUX2] = {
 831                 .desc = {
 832                         .name           = "LDO-AUX2",
 833                         .ops            = &ab8500_regulator_volt_mode_ops,
 834                         .type           = REGULATOR_VOLTAGE,
 835                         .id             = AB8505_LDO_AUX2,
 836                         .owner          = THIS_MODULE,
 837                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 838                         .volt_table     = ldo_vauxn_voltages,
 839                 },
 840                 .load_lp_uA             = 5000,
 841                 .update_bank            = 0x04,
 842                 .update_reg             = 0x09,
 843                 .update_mask            = 0x0c,
 844                 .update_val             = 0x04,
 845                 .update_val_idle        = 0x0c,
 846                 .update_val_normal      = 0x04,
 847                 .voltage_bank           = 0x04,
 848                 .voltage_reg            = 0x20,
 849                 .voltage_mask           = 0x0f,
 850         },
 851         [AB8505_LDO_AUX3] = {
 852                 .desc = {
 853                         .name           = "LDO-AUX3",
 854                         .ops            = &ab8500_regulator_volt_mode_ops,
 855                         .type           = REGULATOR_VOLTAGE,
 856                         .id             = AB8505_LDO_AUX3,
 857                         .owner          = THIS_MODULE,
 858                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 859                         .volt_table     = ldo_vaux3_voltages,
 860                 },
 861                 .load_lp_uA             = 5000,
 862                 .update_bank            = 0x04,
 863                 .update_reg             = 0x0a,
 864                 .update_mask            = 0x03,
 865                 .update_val             = 0x01,
 866                 .update_val_idle        = 0x03,
 867                 .update_val_normal      = 0x01,
 868                 .voltage_bank           = 0x04,
 869                 .voltage_reg            = 0x21,
 870                 .voltage_mask           = 0x07,
 871         },
 872         [AB8505_LDO_AUX4] = {
 873                 .desc = {
 874                         .name           = "LDO-AUX4",
 875                         .ops            = &ab8500_regulator_volt_mode_ops,
 876                         .type           = REGULATOR_VOLTAGE,
 877                         .id             = AB8505_LDO_AUX4,
 878                         .owner          = THIS_MODULE,
 879                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 880                         .volt_table     = ldo_vauxn_voltages,
 881                 },
 882                 .load_lp_uA             = 5000,
 883                 /* values for Vaux4Regu register */
 884                 .update_bank            = 0x04,
 885                 .update_reg             = 0x2e,
 886                 .update_mask            = 0x03,
 887                 .update_val             = 0x01,
 888                 .update_val_idle        = 0x03,
 889                 .update_val_normal      = 0x01,
 890                 /* values for Vaux4SEL register */
 891                 .voltage_bank           = 0x04,
 892                 .voltage_reg            = 0x2f,
 893                 .voltage_mask           = 0x0f,
 894         },
 895         [AB8505_LDO_AUX5] = {
 896                 .desc = {
 897                         .name           = "LDO-AUX5",
 898                         .ops            = &ab8500_regulator_volt_mode_ops,
 899                         .type           = REGULATOR_VOLTAGE,
 900                         .id             = AB8505_LDO_AUX5,
 901                         .owner          = THIS_MODULE,
 902                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
 903                         .volt_table     = ldo_vaux56_voltages,
 904                 },
 905                 .load_lp_uA             = 2000,
 906                 /* values for CtrlVaux5 register */
 907                 .update_bank            = 0x01,
 908                 .update_reg             = 0x55,
 909                 .update_mask            = 0x18,
 910                 .update_val             = 0x10,
 911                 .update_val_idle        = 0x18,
 912                 .update_val_normal      = 0x10,
 913                 .voltage_bank           = 0x01,
 914                 .voltage_reg            = 0x55,
 915                 .voltage_mask           = 0x07,
 916         },
 917         [AB8505_LDO_AUX6] = {
 918                 .desc = {
 919                         .name           = "LDO-AUX6",
 920                         .ops            = &ab8500_regulator_volt_mode_ops,
 921                         .type           = REGULATOR_VOLTAGE,
 922                         .id             = AB8505_LDO_AUX6,
 923                         .owner          = THIS_MODULE,
 924                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
 925                         .volt_table     = ldo_vaux56_voltages,
 926                 },
 927                 .load_lp_uA             = 2000,
 928                 /* values for CtrlVaux6 register */
 929                 .update_bank            = 0x01,
 930                 .update_reg             = 0x56,
 931                 .update_mask            = 0x18,
 932                 .update_val             = 0x10,
 933                 .update_val_idle        = 0x18,
 934                 .update_val_normal      = 0x10,
 935                 .voltage_bank           = 0x01,
 936                 .voltage_reg            = 0x56,
 937                 .voltage_mask           = 0x07,
 938         },
 939         [AB8505_LDO_INTCORE] = {
 940                 .desc = {
 941                         .name           = "LDO-INTCORE",
 942                         .ops            = &ab8500_regulator_volt_mode_ops,
 943                         .type           = REGULATOR_VOLTAGE,
 944                         .id             = AB8505_LDO_INTCORE,
 945                         .owner          = THIS_MODULE,
 946                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 947                         .volt_table     = ldo_vintcore_voltages,
 948                 },
 949                 .load_lp_uA             = 5000,
 950                 .update_bank            = 0x03,
 951                 .update_reg             = 0x80,
 952                 .update_mask            = 0x44,
 953                 .update_val             = 0x04,
 954                 .update_val_idle        = 0x44,
 955                 .update_val_normal      = 0x04,
 956                 .voltage_bank           = 0x03,
 957                 .voltage_reg            = 0x80,
 958                 .voltage_mask           = 0x38,
 959                 .voltage_shift          = 3,
 960         },
 961
 962         /*
 963          * Fixed Voltage Regulators
 964          *   name, fixed mV,
 965          *   update bank, reg, mask, enable val
 966          */
 967         [AB8505_LDO_ADC] = {
 968                 .desc = {
 969                         .name           = "LDO-ADC",
 970                         .ops            = &ab8500_regulator_mode_ops,
 971                         .type           = REGULATOR_VOLTAGE,
 972                         .id             = AB8505_LDO_ADC,
 973                         .owner          = THIS_MODULE,
 974                         .n_voltages     = 1,
 975                         .volt_table     = fixed_2000000_voltage,
 976                 },
 977                 .delay                  = 10000,
 978                 .load_lp_uA             = 1000,
 979                 .update_bank            = 0x03,
 980                 .update_reg             = 0x80,
 981                 .update_mask            = 0x82,
 982                 .update_val             = 0x02,
 983                 .update_val_idle        = 0x82,
 984                 .update_val_normal      = 0x02,
 985         },
 986         [AB8505_LDO_USB] = {
 987                 .desc = {
 988                         .name           = "LDO-USB",
 989                         .ops            = &ab8500_regulator_mode_ops,
 990                         .type           = REGULATOR_VOLTAGE,
 991                         .id             = AB8505_LDO_USB,
 992                         .owner          = THIS_MODULE,
 993                         .n_voltages     = 1,
 994                         .volt_table     = fixed_3300000_voltage,
 995                 },
 996                 .update_bank            = 0x03,
 997                 .update_reg             = 0x82,
 998                 .update_mask            = 0x03,
 999                 .update_val             = 0x01,
1000                 .update_val_idle        = 0x03,
1001                 .update_val_normal      = 0x01,
1002         },
1003         [AB8505_LDO_AUDIO] = {
1004                 .desc = {
1005                         .name           = "LDO-AUDIO",
1006                         .ops            = &ab8500_regulator_volt_ops,
1007                         .type           = REGULATOR_VOLTAGE,
1008                         .id             = AB8505_LDO_AUDIO,
1009                         .owner          = THIS_MODULE,
1010                         .n_voltages     = ARRAY_SIZE(ldo_vaudio_voltages),
1011                         .volt_table     = ldo_vaudio_voltages,
1012                 },
1013                 .update_bank            = 0x03,
1014                 .update_reg             = 0x83,
1015                 .update_mask            = 0x02,
1016                 .update_val             = 0x02,
1017                 .voltage_bank           = 0x01,
1018                 .voltage_reg            = 0x57,
1019                 .voltage_mask           = 0x7,
1020                 .voltage_shift          = 4,
1021                 .voltages               = ldo_vaudio_voltages,
1022                 .voltages_len           = ARRAY_SIZE(ldo_vaudio_voltages),
1023         },
1024         [AB8505_LDO_ANAMIC1] = {
1025                 .desc = {
1026                         .name           = "LDO-ANAMIC1",
1027                         .ops            = &ab8500_regulator_ops,
1028                         .type           = REGULATOR_VOLTAGE,
1029                         .id             = AB8505_LDO_ANAMIC1,
1030                         .owner          = THIS_MODULE,
1031                         .n_voltages     = 1,
1032                         .volt_table     = fixed_2050000_voltage,
1033                 },
1034                 .update_bank            = 0x03,
1035                 .update_reg             = 0x83,
1036                 .update_mask            = 0x08,
1037                 .update_val             = 0x08,
1038         },
1039         [AB8505_LDO_ANAMIC2] = {
1040                 .desc = {
1041                         .name           = "LDO-ANAMIC2",
1042                         .ops            = &ab8500_regulator_ops,
1043                         .type           = REGULATOR_VOLTAGE,
1044                         .id             = AB8505_LDO_ANAMIC2,
1045                         .owner          = THIS_MODULE,
1046                         .n_voltages     = 1,
1047                         .volt_table     = fixed_2050000_voltage,
1048                 },
1049                 .update_bank            = 0x03,
1050                 .update_reg             = 0x83,
1051                 .update_mask            = 0x10,
1052                 .update_val             = 0x10,
1053         },
1054         [AB8505_LDO_AUX8] = {
1055                 .desc = {
1056                         .name           = "LDO-AUX8",
1057                         .ops            = &ab8500_regulator_ops,
1058                         .type           = REGULATOR_VOLTAGE,
1059                         .id             = AB8505_LDO_AUX8,
1060                         .owner          = THIS_MODULE,
1061                         .n_voltages     = 1,
1062                         .volt_table     = fixed_1800000_voltage,
1063                 },
1064                 .update_bank            = 0x03,
1065                 .update_reg             = 0x83,
1066                 .update_mask            = 0x04,
1067                 .update_val             = 0x04,
1068         },
1069         /*
1070          * Regulators with fixed voltage and normal/idle modes
1071          */
1072         [AB8505_LDO_ANA] = {
1073                 .desc = {
1074                         .name           = "LDO-ANA",
1075                         .ops            = &ab8500_regulator_volt_mode_ops,
1076                         .type           = REGULATOR_VOLTAGE,
1077                         .id             = AB8505_LDO_ANA,
1078                         .owner          = THIS_MODULE,
1079                         .n_voltages     = ARRAY_SIZE(ldo_vana_voltages),
1080                         .volt_table     = ldo_vana_voltages,
1081                 },
1082                 .load_lp_uA             = 1000,
1083                 .update_bank            = 0x04,
1084                 .update_reg             = 0x06,
1085                 .update_mask            = 0x0c,
1086                 .update_val             = 0x04,
1087                 .update_val_idle        = 0x0c,
1088                 .update_val_normal      = 0x04,
1089                 .voltage_bank           = 0x04,
1090                 .voltage_reg            = 0x29,
1091                 .voltage_mask           = 0x7,
1092                 .voltages               = ldo_vana_voltages,
1093                 .voltages_len           = ARRAY_SIZE(ldo_vana_voltages),
1094         },
1095 };
1096
1097 /* AB9540 regulator information */
1098 static struct ab8500_regulator_info
1099                 ab9540_regulator_info[AB9540_NUM_REGULATORS] = {
1100         /*
1101          * Variable Voltage Regulators
1102          *   name, min mV, max mV,
1103          *   update bank, reg, mask, enable val
1104          *   volt bank, reg, mask, table, table length
1105          */
1106         [AB9540_LDO_AUX1] = {
1107                 .desc = {
1108                         .name           = "LDO-AUX1",
1109                         .ops            = &ab8500_regulator_volt_mode_ops,
1110                         .type           = REGULATOR_VOLTAGE,
1111                         .id             = AB9540_LDO_AUX1,
1112                         .owner          = THIS_MODULE,
1113                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1114                         .volt_table     = ldo_vauxn_voltages,
1115                 },
1116                 .load_lp_uA             = 5000,
1117                 .update_bank            = 0x04,
1118                 .update_reg             = 0x09,
1119                 .update_mask            = 0x03,
1120                 .update_val             = 0x01,
1121                 .update_val_idle        = 0x03,
1122                 .update_val_normal      = 0x01,
1123                 .voltage_bank           = 0x04,
1124                 .voltage_reg            = 0x1f,
1125                 .voltage_mask           = 0x0f,
1126         },
1127         [AB9540_LDO_AUX2] = {
1128                 .desc = {
1129                         .name           = "LDO-AUX2",
1130                         .ops            = &ab8500_regulator_volt_mode_ops,
1131                         .type           = REGULATOR_VOLTAGE,
1132                         .id             = AB9540_LDO_AUX2,
1133                         .owner          = THIS_MODULE,
1134                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1135                         .volt_table     = ldo_vauxn_voltages,
1136                 },
1137                 .load_lp_uA             = 5000,
1138                 .update_bank            = 0x04,
1139                 .update_reg             = 0x09,
1140                 .update_mask            = 0x0c,
1141                 .update_val             = 0x04,
1142                 .update_val_idle        = 0x0c,
1143                 .update_val_normal      = 0x04,
1144                 .voltage_bank           = 0x04,
1145                 .voltage_reg            = 0x20,
1146                 .voltage_mask           = 0x0f,
1147         },
1148         [AB9540_LDO_AUX3] = {
1149                 .desc = {
1150                         .name           = "LDO-AUX3",
1151                         .ops            = &ab8500_regulator_volt_mode_ops,
1152                         .type           = REGULATOR_VOLTAGE,
1153                         .id             = AB9540_LDO_AUX3,
1154                         .owner          = THIS_MODULE,
1155                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
1156                         .volt_table     = ldo_vaux3_voltages,
1157                 },
1158                 .load_lp_uA             = 5000,
1159                 .update_bank            = 0x04,
1160                 .update_reg             = 0x0a,
1161                 .update_mask            = 0x03,
1162                 .update_val             = 0x01,
1163                 .update_val_idle        = 0x03,
1164                 .update_val_normal      = 0x01,
1165                 .voltage_bank           = 0x04,
1166                 .voltage_reg            = 0x21,
1167                 .voltage_mask           = 0x07,
1168         },
1169         [AB9540_LDO_AUX4] = {
1170                 .desc = {
1171                         .name           = "LDO-AUX4",
1172                         .ops            = &ab8500_regulator_volt_mode_ops,
1173                         .type           = REGULATOR_VOLTAGE,
1174                         .id             = AB9540_LDO_AUX4,
1175                         .owner          = THIS_MODULE,
1176                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1177                         .volt_table     = ldo_vauxn_voltages,
1178                 },
1179                 .load_lp_uA             = 5000,
1180                 /* values for Vaux4Regu register */
1181                 .update_bank            = 0x04,
1182                 .update_reg             = 0x2e,
1183                 .update_mask            = 0x03,
1184                 .update_val             = 0x01,
1185                 .update_val_idle        = 0x03,
1186                 .update_val_normal      = 0x01,
1187                 /* values for Vaux4SEL register */
1188                 .voltage_bank           = 0x04,
1189                 .voltage_reg            = 0x2f,
1190                 .voltage_mask           = 0x0f,
1191         },
1192         [AB9540_LDO_INTCORE] = {
1193                 .desc = {
1194                         .name           = "LDO-INTCORE",
1195                         .ops            = &ab8500_regulator_volt_mode_ops,
1196                         .type           = REGULATOR_VOLTAGE,
1197                         .id             = AB9540_LDO_INTCORE,
1198                         .owner          = THIS_MODULE,
1199                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1200                         .volt_table     = ldo_vintcore_voltages,
1201                 },
1202                 .load_lp_uA             = 5000,
1203                 .update_bank            = 0x03,
1204                 .update_reg             = 0x80,
1205                 .update_mask            = 0x44,
1206                 .update_val             = 0x44,
1207                 .update_val_idle        = 0x44,
1208                 .update_val_normal      = 0x04,
1209                 .voltage_bank           = 0x03,
1210                 .voltage_reg            = 0x80,
1211                 .voltage_mask           = 0x38,
1212                 .voltage_shift          = 3,
1213         },
1214
1215         /*
1216          * Fixed Voltage Regulators
1217          *   name, fixed mV,
1218          *   update bank, reg, mask, enable val
1219          */
1220         [AB9540_LDO_TVOUT] = {
1221                 .desc = {
1222                         .name           = "LDO-TVOUT",
1223                         .ops            = &ab8500_regulator_mode_ops,
1224                         .type           = REGULATOR_VOLTAGE,
1225                         .id             = AB9540_LDO_TVOUT,
1226                         .owner          = THIS_MODULE,
1227                         .n_voltages     = 1,
1228                         .volt_table     = fixed_2000000_voltage,
1229                 },
1230                 .delay                  = 10000,
1231                 .load_lp_uA             = 1000,
1232                 .update_bank            = 0x03,
1233                 .update_reg             = 0x80,
1234                 .update_mask            = 0x82,
1235                 .update_val             = 0x02,
1236                 .update_val_idle        = 0x82,
1237                 .update_val_normal      = 0x02,
1238         },
1239         [AB9540_LDO_USB] = {
1240                 .desc = {
1241                         .name           = "LDO-USB",
1242                         .ops            = &ab8500_regulator_ops,
1243                         .type           = REGULATOR_VOLTAGE,
1244                         .id             = AB9540_LDO_USB,
1245                         .owner          = THIS_MODULE,
1246                         .n_voltages     = 1,
1247                         .volt_table     = fixed_3300000_voltage,
1248                 },
1249                 .update_bank            = 0x03,
1250                 .update_reg             = 0x82,
1251                 .update_mask            = 0x03,
1252                 .update_val             = 0x01,
1253                 .update_val_idle        = 0x03,
1254                 .update_val_normal      = 0x01,
1255         },
1256         [AB9540_LDO_AUDIO] = {
1257                 .desc = {
1258                         .name           = "LDO-AUDIO",
1259                         .ops            = &ab8500_regulator_ops,
1260                         .type           = REGULATOR_VOLTAGE,
1261                         .id             = AB9540_LDO_AUDIO,
1262                         .owner          = THIS_MODULE,
1263                         .n_voltages     = 1,
1264                         .volt_table     = fixed_2000000_voltage,
1265                 },
1266                 .update_bank            = 0x03,
1267                 .update_reg             = 0x83,
1268                 .update_mask            = 0x02,
1269                 .update_val             = 0x02,
1270         },
1271         [AB9540_LDO_ANAMIC1] = {
1272                 .desc = {
1273                         .name           = "LDO-ANAMIC1",
1274                         .ops            = &ab8500_regulator_ops,
1275                         .type           = REGULATOR_VOLTAGE,
1276                         .id             = AB9540_LDO_ANAMIC1,
1277                         .owner          = THIS_MODULE,
1278                         .n_voltages     = 1,
1279                         .volt_table     = fixed_2050000_voltage,
1280                 },
1281                 .update_bank            = 0x03,
1282                 .update_reg             = 0x83,
1283                 .update_mask            = 0x08,
1284                 .update_val             = 0x08,
1285         },
1286         [AB9540_LDO_ANAMIC2] = {
1287                 .desc = {
1288                         .name           = "LDO-ANAMIC2",
1289                         .ops            = &ab8500_regulator_ops,
1290                         .type           = REGULATOR_VOLTAGE,
1291                         .id             = AB9540_LDO_ANAMIC2,
1292                         .owner          = THIS_MODULE,
1293                         .n_voltages     = 1,
1294                         .volt_table     = fixed_2050000_voltage,
1295                 },
1296                 .update_bank            = 0x03,
1297                 .update_reg             = 0x83,
1298                 .update_mask            = 0x10,
1299                 .update_val             = 0x10,
1300         },
1301         [AB9540_LDO_DMIC] = {
1302                 .desc = {
1303                         .name           = "LDO-DMIC",
1304                         .ops            = &ab8500_regulator_ops,
1305                         .type           = REGULATOR_VOLTAGE,
1306                         .id             = AB9540_LDO_DMIC,
1307                         .owner          = THIS_MODULE,
1308                         .n_voltages     = 1,
1309                         .volt_table     = fixed_1800000_voltage,
1310                 },
1311                 .update_bank            = 0x03,
1312                 .update_reg             = 0x83,
1313                 .update_mask            = 0x04,
1314                 .update_val             = 0x04,
1315         },
1316
1317         /*
1318          * Regulators with fixed voltage and normal/idle modes
1319          */
1320         [AB9540_LDO_ANA] = {
1321                 .desc = {
1322                         .name           = "LDO-ANA",
1323                         .ops            = &ab8500_regulator_mode_ops,
1324                         .type           = REGULATOR_VOLTAGE,
1325                         .id             = AB9540_LDO_ANA,
1326                         .owner          = THIS_MODULE,
1327                         .n_voltages     = 1,
1328                         .volt_table     = fixed_1200000_voltage,
1329                 },
1330                 .load_lp_uA             = 1000,
1331                 .update_bank            = 0x04,
1332                 .update_reg             = 0x06,
1333                 .update_mask            = 0x0c,
1334                 .update_val             = 0x08,
1335                 .update_val_idle        = 0x0c,
1336                 .update_val_normal      = 0x08,
1337         },
1338 };
1339
1340 /* AB8540 regulator information */
1341 static struct ab8500_regulator_info
1342                 ab8540_regulator_info[AB8540_NUM_REGULATORS] = {
1343         /*
1344          * Variable Voltage Regulators
1345          *   name, min mV, max mV,
1346          *   update bank, reg, mask, enable val
1347          *   volt bank, reg, mask, table, table length
1348          */
1349         [AB8540_LDO_AUX1] = {
1350                 .desc = {
1351                         .name           = "LDO-AUX1",
1352                         .ops            = &ab8500_regulator_volt_mode_ops,
1353                         .type           = REGULATOR_VOLTAGE,
1354                         .id             = AB8540_LDO_AUX1,
1355                         .owner          = THIS_MODULE,
1356                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1357                         .volt_table     = ldo_vauxn_voltages,
1358                 },
1359                 .load_lp_uA             = 5000,
1360                 .update_bank            = 0x04,
1361                 .update_reg             = 0x09,
1362                 .update_mask            = 0x03,
1363                 .update_val             = 0x01,
1364                 .update_val_idle        = 0x03,
1365                 .update_val_normal      = 0x01,
1366                 .voltage_bank           = 0x04,
1367                 .voltage_reg            = 0x1f,
1368                 .voltage_mask           = 0x0f,
1369         },
1370         [AB8540_LDO_AUX2] = {
1371                 .desc = {
1372                         .name           = "LDO-AUX2",
1373                         .ops            = &ab8500_regulator_volt_mode_ops,
1374                         .type           = REGULATOR_VOLTAGE,
1375                         .id             = AB8540_LDO_AUX2,
1376                         .owner          = THIS_MODULE,
1377                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1378                         .volt_table     = ldo_vauxn_voltages,
1379                 },
1380                 .load_lp_uA             = 5000,
1381                 .update_bank            = 0x04,
1382                 .update_reg             = 0x09,
1383                 .update_mask            = 0x0c,
1384                 .update_val             = 0x04,
1385                 .update_val_idle        = 0x0c,
1386                 .update_val_normal      = 0x04,
1387                 .voltage_bank           = 0x04,
1388                 .voltage_reg            = 0x20,
1389                 .voltage_mask           = 0x0f,
1390         },
1391         [AB8540_LDO_AUX3] = {
1392                 .desc = {
1393                         .name           = "LDO-AUX3",
1394                         .ops            = &ab8540_aux3_regulator_volt_mode_ops,
1395                         .type           = REGULATOR_VOLTAGE,
1396                         .id             = AB8540_LDO_AUX3,
1397                         .owner          = THIS_MODULE,
1398                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_ab8540_voltages),
1399                         .volt_table     = ldo_vaux3_ab8540_voltages,
1400                 },
1401                 .load_lp_uA             = 5000,
1402                 .update_bank            = 0x04,
1403                 .update_reg             = 0x0a,
1404                 .update_mask            = 0x03,
1405                 .update_val             = 0x01,
1406                 .update_val_idle        = 0x03,
1407                 .update_val_normal      = 0x01,
1408                 .voltage_bank           = 0x04,
1409                 .voltage_reg            = 0x21,
1410                 .voltage_mask           = 0x07,
1411                 .expand_register = {
1412                         .voltage_limit          = 8,
1413                         .voltage_bank           = 0x04,
1414                         .voltage_reg            = 0x01,
1415                         .voltage_mask           = 0x10,
1416                         .voltage_shift          = 1,
1417                 }
1418         },
1419         [AB8540_LDO_AUX4] = {
1420                 .desc = {
1421                         .name           = "LDO-AUX4",
1422                         .ops            = &ab8500_regulator_volt_mode_ops,
1423                         .type           = REGULATOR_VOLTAGE,
1424                         .id             = AB8540_LDO_AUX4,
1425                         .owner          = THIS_MODULE,
1426                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
1427                         .volt_table     = ldo_vauxn_voltages,
1428                 },
1429                 .load_lp_uA             = 5000,
1430                 /* values for Vaux4Regu register */
1431                 .update_bank            = 0x04,
1432                 .update_reg             = 0x2e,
1433                 .update_mask            = 0x03,
1434                 .update_val             = 0x01,
1435                 .update_val_idle        = 0x03,
1436                 .update_val_normal      = 0x01,
1437                 /* values for Vaux4SEL register */
1438                 .voltage_bank           = 0x04,
1439                 .voltage_reg            = 0x2f,
1440                 .voltage_mask           = 0x0f,
1441         },
1442         [AB8540_LDO_INTCORE] = {
1443                 .desc = {
1444                         .name           = "LDO-INTCORE",
1445                         .ops            = &ab8500_regulator_volt_mode_ops,
1446                         .type           = REGULATOR_VOLTAGE,
1447                         .id             = AB8540_LDO_INTCORE,
1448                         .owner          = THIS_MODULE,
1449                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
1450                         .volt_table     = ldo_vintcore_voltages,
1451                 },
1452                 .load_lp_uA             = 5000,
1453                 .update_bank            = 0x03,
1454                 .update_reg             = 0x80,
1455                 .update_mask            = 0x44,
1456                 .update_val             = 0x44,
1457                 .update_val_idle        = 0x44,
1458                 .update_val_normal      = 0x04,
1459                 .voltage_bank           = 0x03,
1460                 .voltage_reg            = 0x80,
1461                 .voltage_mask           = 0x38,
1462                 .voltage_shift          = 3,
1463         },
1464
1465         /*
1466          * Fixed Voltage Regulators
1467          *   name, fixed mV,
1468          *   update bank, reg, mask, enable val
1469          */
1470         [AB8540_LDO_TVOUT] = {
1471                 .desc = {
1472                         .name           = "LDO-TVOUT",
1473                         .ops            = &ab8500_regulator_mode_ops,
1474                         .type           = REGULATOR_VOLTAGE,
1475                         .id             = AB8540_LDO_TVOUT,
1476                         .owner          = THIS_MODULE,
1477                         .n_voltages     = 1,
1478                 },
1479                 .delay                  = 10000,
1480                 .load_lp_uA             = 1000,
1481                 .update_bank            = 0x03,
1482                 .update_reg             = 0x80,
1483                 .update_mask            = 0x82,
1484                 .update_val             = 0x02,
1485                 .update_val_idle        = 0x82,
1486                 .update_val_normal      = 0x02,
1487         },
1488         [AB8540_LDO_AUDIO] = {
1489                 .desc = {
1490                         .name           = "LDO-AUDIO",
1491                         .ops            = &ab8500_regulator_ops,
1492                         .type           = REGULATOR_VOLTAGE,
1493                         .id             = AB8540_LDO_AUDIO,
1494                         .owner          = THIS_MODULE,
1495                         .n_voltages     = 1,
1496                         .volt_table     = fixed_2000000_voltage,
1497                 },
1498                 .update_bank            = 0x03,
1499                 .update_reg             = 0x83,
1500                 .update_mask            = 0x02,
1501                 .update_val             = 0x02,
1502         },
1503         [AB8540_LDO_ANAMIC1] = {
1504                 .desc = {
1505                         .name           = "LDO-ANAMIC1",
1506                         .ops            = &ab8500_regulator_ops,
1507                         .type           = REGULATOR_VOLTAGE,
1508                         .id             = AB8540_LDO_ANAMIC1,
1509                         .owner          = THIS_MODULE,
1510                         .n_voltages     = 1,
1511                         .volt_table     = fixed_2050000_voltage,
1512                 },
1513                 .update_bank            = 0x03,
1514                 .update_reg             = 0x83,
1515                 .update_mask            = 0x08,
1516                 .update_val             = 0x08,
1517         },
1518         [AB8540_LDO_ANAMIC2] = {
1519                 .desc = {
1520                         .name           = "LDO-ANAMIC2",
1521                         .ops            = &ab8500_regulator_ops,
1522                         .type           = REGULATOR_VOLTAGE,
1523                         .id             = AB8540_LDO_ANAMIC2,
1524                         .owner          = THIS_MODULE,
1525                         .n_voltages     = 1,
1526                         .volt_table     = fixed_2050000_voltage,
1527                 },
1528                 .update_bank            = 0x03,
1529                 .update_reg             = 0x83,
1530                 .update_mask            = 0x10,
1531                 .update_val             = 0x10,
1532         },
1533         [AB8540_LDO_DMIC] = {
1534                 .desc = {
1535                         .name           = "LDO-DMIC",
1536                         .ops            = &ab8500_regulator_ops,
1537                         .type           = REGULATOR_VOLTAGE,
1538                         .id             = AB8540_LDO_DMIC,
1539                         .owner          = THIS_MODULE,
1540                         .n_voltages     = 1,
1541                 },
1542                 .update_bank            = 0x03,
1543                 .update_reg             = 0x83,
1544                 .update_mask            = 0x04,
1545                 .update_val             = 0x04,
1546         },
1547
1548         /*
1549          * Regulators with fixed voltage and normal/idle modes
1550          */
1551         [AB8540_LDO_ANA] = {
1552                 .desc = {
1553                         .name           = "LDO-ANA",
1554                         .ops            = &ab8500_regulator_mode_ops,
1555                         .type           = REGULATOR_VOLTAGE,
1556                         .id             = AB8540_LDO_ANA,
1557                         .owner          = THIS_MODULE,
1558                         .n_voltages     = 1,
1559                         .volt_table     = fixed_1200000_voltage,
1560                 },
1561                 .load_lp_uA             = 1000,
1562                 .update_bank            = 0x04,
1563                 .update_reg             = 0x06,
1564                 .update_mask            = 0x0c,
1565                 .update_val             = 0x04,
1566                 .update_val_idle        = 0x0c,
1567                 .update_val_normal      = 0x04,
1568         },
1569         [AB8540_LDO_SDIO] = {
1570                 .desc = {
1571                         .name           = "LDO-SDIO",
1572                         .ops            = &ab8500_regulator_volt_mode_ops,
1573                         .type           = REGULATOR_VOLTAGE,
1574                         .id             = AB8540_LDO_SDIO,
1575                         .owner          = THIS_MODULE,
1576                         .n_voltages     = ARRAY_SIZE(ldo_sdio_voltages),
1577                         .volt_table     = ldo_sdio_voltages,
1578                 },
1579                 .load_lp_uA             = 5000,
1580                 .update_bank            = 0x03,
1581                 .update_reg             = 0x88,
1582                 .update_mask            = 0x30,
1583                 .update_val             = 0x10,
1584                 .update_val_idle        = 0x30,
1585                 .update_val_normal      = 0x10,
1586                 .voltage_bank           = 0x03,
1587                 .voltage_reg            = 0x88,
1588                 .voltage_mask           = 0x07,
1589         },
1590 };
1591
1592 struct ab8500_reg_init {
1593         u8 bank;
1594         u8 addr;
1595         u8 mask;
1596 };
1597
1598 #define REG_INIT(_id, _bank, _addr, _mask)      \
1599         [_id] = {                               \
1600                 .bank = _bank,                  \
1601                 .addr = _addr,                  \
1602                 .mask = _mask,                  \
1603         }
1604
1605 /* AB8500 register init */
1606 static struct ab8500_reg_init ab8500_reg_init[] = {
1607         /*
1608          * 0x30, VanaRequestCtrl
1609          * 0xc0, VextSupply1RequestCtrl
1610          */
1611         REG_INIT(AB8500_REGUREQUESTCTRL2,       0x03, 0x04, 0xf0),
1612         /*
1613          * 0x03, VextSupply2RequestCtrl
1614          * 0x0c, VextSupply3RequestCtrl
1615          * 0x30, Vaux1RequestCtrl
1616          * 0xc0, Vaux2RequestCtrl
1617          */
1618         REG_INIT(AB8500_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
1619         /*
1620          * 0x03, Vaux3RequestCtrl
1621          * 0x04, SwHPReq
1622          */
1623         REG_INIT(AB8500_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1624         /*
1625          * 0x08, VanaSysClkReq1HPValid
1626          * 0x20, Vaux1SysClkReq1HPValid
1627          * 0x40, Vaux2SysClkReq1HPValid
1628          * 0x80, Vaux3SysClkReq1HPValid
1629          */
1630         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
1631         /*
1632          * 0x10, VextSupply1SysClkReq1HPValid
1633          * 0x20, VextSupply2SysClkReq1HPValid
1634          * 0x40, VextSupply3SysClkReq1HPValid
1635          */
1636         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
1637         /*
1638          * 0x08, VanaHwHPReq1Valid
1639          * 0x20, Vaux1HwHPReq1Valid
1640          * 0x40, Vaux2HwHPReq1Valid
1641          * 0x80, Vaux3HwHPReq1Valid
1642          */
1643         REG_INIT(AB8500_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xe8),
1644         /*
1645          * 0x01, VextSupply1HwHPReq1Valid
1646          * 0x02, VextSupply2HwHPReq1Valid
1647          * 0x04, VextSupply3HwHPReq1Valid
1648          */
1649         REG_INIT(AB8500_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
1650         /*
1651          * 0x08, VanaHwHPReq2Valid
1652          * 0x20, Vaux1HwHPReq2Valid
1653          * 0x40, Vaux2HwHPReq2Valid
1654          * 0x80, Vaux3HwHPReq2Valid
1655          */
1656         REG_INIT(AB8500_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xe8),
1657         /*
1658          * 0x01, VextSupply1HwHPReq2Valid
1659          * 0x02, VextSupply2HwHPReq2Valid
1660          * 0x04, VextSupply3HwHPReq2Valid
1661          */
1662         REG_INIT(AB8500_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
1663         /*
1664          * 0x20, VanaSwHPReqValid
1665          * 0x80, Vaux1SwHPReqValid
1666          */
1667         REG_INIT(AB8500_REGUSWHPREQVALID1,      0x03, 0x0d, 0xa0),
1668         /*
1669          * 0x01, Vaux2SwHPReqValid
1670          * 0x02, Vaux3SwHPReqValid
1671          * 0x04, VextSupply1SwHPReqValid
1672          * 0x08, VextSupply2SwHPReqValid
1673          * 0x10, VextSupply3SwHPReqValid
1674          */
1675         REG_INIT(AB8500_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
1676         /*
1677          * 0x02, SysClkReq2Valid1
1678          * 0x04, SysClkReq3Valid1
1679          * 0x08, SysClkReq4Valid1
1680          * 0x10, SysClkReq5Valid1
1681          * 0x20, SysClkReq6Valid1
1682          * 0x40, SysClkReq7Valid1
1683          * 0x80, SysClkReq8Valid1
1684          */
1685         REG_INIT(AB8500_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
1686         /*
1687          * 0x02, SysClkReq2Valid2
1688          * 0x04, SysClkReq3Valid2
1689          * 0x08, SysClkReq4Valid2
1690          * 0x10, SysClkReq5Valid2
1691          * 0x20, SysClkReq6Valid2
1692          * 0x40, SysClkReq7Valid2
1693          * 0x80, SysClkReq8Valid2
1694          */
1695         REG_INIT(AB8500_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
1696         /*
1697          * 0x02, VTVoutEna
1698          * 0x04, Vintcore12Ena
1699          * 0x38, Vintcore12Sel
1700          * 0x40, Vintcore12LP
1701          * 0x80, VTVoutLP
1702          */
1703         REG_INIT(AB8500_REGUMISC1,              0x03, 0x80, 0xfe),
1704         /*
1705          * 0x02, VaudioEna
1706          * 0x04, VdmicEna
1707          * 0x08, Vamic1Ena
1708          * 0x10, Vamic2Ena
1709          */
1710         REG_INIT(AB8500_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1711         /*
1712          * 0x01, Vamic1_dzout
1713          * 0x02, Vamic2_dzout
1714          */
1715         REG_INIT(AB8500_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1716         /*
1717          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1718          * 0x0c, VanaRegu
1719          */
1720         REG_INIT(AB8500_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1721         /*
1722          * 0x01, VrefDDREna
1723          * 0x02, VrefDDRSleepMode
1724          */
1725         REG_INIT(AB8500_VREFDDR,                0x04, 0x07, 0x03),
1726         /*
1727          * 0x03, VextSupply1Regu
1728          * 0x0c, VextSupply2Regu
1729          * 0x30, VextSupply3Regu
1730          * 0x40, ExtSupply2Bypass
1731          * 0x80, ExtSupply3Bypass
1732          */
1733         REG_INIT(AB8500_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1734         /*
1735          * 0x03, Vaux1Regu
1736          * 0x0c, Vaux2Regu
1737          */
1738         REG_INIT(AB8500_VAUX12REGU,             0x04, 0x09, 0x0f),
1739         /*
1740          * 0x03, Vaux3Regu
1741          */
1742         REG_INIT(AB8500_VRF1VAUX3REGU,          0x04, 0x0a, 0x03),
1743         /*
1744          * 0x0f, Vaux1Sel
1745          */
1746         REG_INIT(AB8500_VAUX1SEL,               0x04, 0x1f, 0x0f),
1747         /*
1748          * 0x0f, Vaux2Sel
1749          */
1750         REG_INIT(AB8500_VAUX2SEL,               0x04, 0x20, 0x0f),
1751         /*
1752          * 0x07, Vaux3Sel
1753          */
1754         REG_INIT(AB8500_VRF1VAUX3SEL,           0x04, 0x21, 0x07),
1755         /*
1756          * 0x01, VextSupply12LP
1757          */
1758         REG_INIT(AB8500_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
1759         /*
1760          * 0x04, Vaux1Disch
1761          * 0x08, Vaux2Disch
1762          * 0x10, Vaux3Disch
1763          * 0x20, Vintcore12Disch
1764          * 0x40, VTVoutDisch
1765          * 0x80, VaudioDisch
1766          */
1767         REG_INIT(AB8500_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1768         /*
1769          * 0x02, VanaDisch
1770          * 0x04, VdmicPullDownEna
1771          * 0x10, VdmicDisch
1772          */
1773         REG_INIT(AB8500_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1774 };
1775
1776 /* AB8505 register init */
1777 static struct ab8500_reg_init ab8505_reg_init[] = {
1778         /*
1779          * 0x03, VarmRequestCtrl
1780          * 0x0c, VsmpsCRequestCtrl
1781          * 0x30, VsmpsARequestCtrl
1782          * 0xc0, VsmpsBRequestCtrl
1783          */
1784         REG_INIT(AB8505_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
1785         /*
1786          * 0x03, VsafeRequestCtrl
1787          * 0x0c, VpllRequestCtrl
1788          * 0x30, VanaRequestCtrl
1789          */
1790         REG_INIT(AB8505_REGUREQUESTCTRL2,       0x03, 0x04, 0x3f),
1791         /*
1792          * 0x30, Vaux1RequestCtrl
1793          * 0xc0, Vaux2RequestCtrl
1794          */
1795         REG_INIT(AB8505_REGUREQUESTCTRL3,       0x03, 0x05, 0xf0),
1796         /*
1797          * 0x03, Vaux3RequestCtrl
1798          * 0x04, SwHPReq
1799          */
1800         REG_INIT(AB8505_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1801         /*
1802          * 0x01, VsmpsASysClkReq1HPValid
1803          * 0x02, VsmpsBSysClkReq1HPValid
1804          * 0x04, VsafeSysClkReq1HPValid
1805          * 0x08, VanaSysClkReq1HPValid
1806          * 0x10, VpllSysClkReq1HPValid
1807          * 0x20, Vaux1SysClkReq1HPValid
1808          * 0x40, Vaux2SysClkReq1HPValid
1809          * 0x80, Vaux3SysClkReq1HPValid
1810          */
1811         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
1812         /*
1813          * 0x01, VsmpsCSysClkReq1HPValid
1814          * 0x02, VarmSysClkReq1HPValid
1815          * 0x04, VbbSysClkReq1HPValid
1816          * 0x08, VsmpsMSysClkReq1HPValid
1817          */
1818         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
1819         /*
1820          * 0x01, VsmpsAHwHPReq1Valid
1821          * 0x02, VsmpsBHwHPReq1Valid
1822          * 0x04, VsafeHwHPReq1Valid
1823          * 0x08, VanaHwHPReq1Valid
1824          * 0x10, VpllHwHPReq1Valid
1825          * 0x20, Vaux1HwHPReq1Valid
1826          * 0x40, Vaux2HwHPReq1Valid
1827          * 0x80, Vaux3HwHPReq1Valid
1828          */
1829         REG_INIT(AB8505_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
1830         /*
1831          * 0x08, VsmpsMHwHPReq1Valid
1832          */
1833         REG_INIT(AB8505_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x08),
1834         /*
1835          * 0x01, VsmpsAHwHPReq2Valid
1836          * 0x02, VsmpsBHwHPReq2Valid
1837          * 0x04, VsafeHwHPReq2Valid
1838          * 0x08, VanaHwHPReq2Valid
1839          * 0x10, VpllHwHPReq2Valid
1840          * 0x20, Vaux1HwHPReq2Valid
1841          * 0x40, Vaux2HwHPReq2Valid
1842          * 0x80, Vaux3HwHPReq2Valid
1843          */
1844         REG_INIT(AB8505_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
1845         /*
1846          * 0x08, VsmpsMHwHPReq2Valid
1847          */
1848         REG_INIT(AB8505_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x08),
1849         /*
1850          * 0x01, VsmpsCSwHPReqValid
1851          * 0x02, VarmSwHPReqValid
1852          * 0x04, VsmpsASwHPReqValid
1853          * 0x08, VsmpsBSwHPReqValid
1854          * 0x10, VsafeSwHPReqValid
1855          * 0x20, VanaSwHPReqValid
1856          * 0x40, VpllSwHPReqValid
1857          * 0x80, Vaux1SwHPReqValid
1858          */
1859         REG_INIT(AB8505_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
1860         /*
1861          * 0x01, Vaux2SwHPReqValid
1862          * 0x02, Vaux3SwHPReqValid
1863          * 0x20, VsmpsMSwHPReqValid
1864          */
1865         REG_INIT(AB8505_REGUSWHPREQVALID2,      0x03, 0x0e, 0x23),
1866         /*
1867          * 0x02, SysClkReq2Valid1
1868          * 0x04, SysClkReq3Valid1
1869          * 0x08, SysClkReq4Valid1
1870          */
1871         REG_INIT(AB8505_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0x0e),
1872         /*
1873          * 0x02, SysClkReq2Valid2
1874          * 0x04, SysClkReq3Valid2
1875          * 0x08, SysClkReq4Valid2
1876          */
1877         REG_INIT(AB8505_REGUSYSCLKREQVALID2,    0x03, 0x10, 0x0e),
1878         /*
1879          * 0x01, Vaux4SwHPReqValid
1880          * 0x02, Vaux4HwHPReq2Valid
1881          * 0x04, Vaux4HwHPReq1Valid
1882          * 0x08, Vaux4SysClkReq1HPValid
1883          */
1884         REG_INIT(AB8505_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
1885         /*
1886          * 0x02, VadcEna
1887          * 0x04, VintCore12Ena
1888          * 0x38, VintCore12Sel
1889          * 0x40, VintCore12LP
1890          * 0x80, VadcLP
1891          */
1892         REG_INIT(AB8505_REGUMISC1,              0x03, 0x80, 0xfe),
1893         /*
1894          * 0x02, VaudioEna
1895          * 0x04, VdmicEna
1896          * 0x08, Vamic1Ena
1897          * 0x10, Vamic2Ena
1898          */
1899         REG_INIT(AB8505_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1900         /*
1901          * 0x01, Vamic1_dzout
1902          * 0x02, Vamic2_dzout
1903          */
1904         REG_INIT(AB8505_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1905         /*
1906          * 0x03, VsmpsARegu
1907          * 0x0c, VsmpsASelCtrl
1908          * 0x10, VsmpsAAutoMode
1909          * 0x20, VsmpsAPWMMode
1910          */
1911         REG_INIT(AB8505_VSMPSAREGU,             0x04, 0x03, 0x3f),
1912         /*
1913          * 0x03, VsmpsBRegu
1914          * 0x0c, VsmpsBSelCtrl
1915          * 0x10, VsmpsBAutoMode
1916          * 0x20, VsmpsBPWMMode
1917          */
1918         REG_INIT(AB8505_VSMPSBREGU,             0x04, 0x04, 0x3f),
1919         /*
1920          * 0x03, VsafeRegu
1921          * 0x0c, VsafeSelCtrl
1922          * 0x10, VsafeAutoMode
1923          * 0x20, VsafePWMMode
1924          */
1925         REG_INIT(AB8505_VSAFEREGU,              0x04, 0x05, 0x3f),
1926         /*
1927          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1928          * 0x0c, VanaRegu
1929          */
1930         REG_INIT(AB8505_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1931         /*
1932          * 0x03, VextSupply1Regu
1933          * 0x0c, VextSupply2Regu
1934          * 0x30, VextSupply3Regu
1935          * 0x40, ExtSupply2Bypass
1936          * 0x80, ExtSupply3Bypass
1937          */
1938         REG_INIT(AB8505_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1939         /*
1940          * 0x03, Vaux1Regu
1941          * 0x0c, Vaux2Regu
1942          */
1943         REG_INIT(AB8505_VAUX12REGU,             0x04, 0x09, 0x0f),
1944         /*
1945          * 0x0f, Vaux3Regu
1946          */
1947         REG_INIT(AB8505_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
1948         /*
1949          * 0x3f, VsmpsASel1
1950          */
1951         REG_INIT(AB8505_VSMPSASEL1,             0x04, 0x13, 0x3f),
1952         /*
1953          * 0x3f, VsmpsASel2
1954          */
1955         REG_INIT(AB8505_VSMPSASEL2,             0x04, 0x14, 0x3f),
1956         /*
1957          * 0x3f, VsmpsASel3
1958          */
1959         REG_INIT(AB8505_VSMPSASEL3,             0x04, 0x15, 0x3f),
1960         /*
1961          * 0x3f, VsmpsBSel1
1962          */
1963         REG_INIT(AB8505_VSMPSBSEL1,             0x04, 0x17, 0x3f),
1964         /*
1965          * 0x3f, VsmpsBSel2
1966          */
1967         REG_INIT(AB8505_VSMPSBSEL2,             0x04, 0x18, 0x3f),
1968         /*
1969          * 0x3f, VsmpsBSel3
1970          */
1971         REG_INIT(AB8505_VSMPSBSEL3,             0x04, 0x19, 0x3f),
1972         /*
1973          * 0x7f, VsafeSel1
1974          */
1975         REG_INIT(AB8505_VSAFESEL1,              0x04, 0x1b, 0x7f),
1976         /*
1977          * 0x3f, VsafeSel2
1978          */
1979         REG_INIT(AB8505_VSAFESEL2,              0x04, 0x1c, 0x7f),
1980         /*
1981          * 0x3f, VsafeSel3
1982          */
1983         REG_INIT(AB8505_VSAFESEL3,              0x04, 0x1d, 0x7f),
1984         /*
1985          * 0x0f, Vaux1Sel
1986          */
1987         REG_INIT(AB8505_VAUX1SEL,               0x04, 0x1f, 0x0f),
1988         /*
1989          * 0x0f, Vaux2Sel
1990          */
1991         REG_INIT(AB8505_VAUX2SEL,               0x04, 0x20, 0x0f),
1992         /*
1993          * 0x07, Vaux3Sel
1994          * 0x30, VRF1Sel
1995          */
1996         REG_INIT(AB8505_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
1997         /*
1998          * 0x03, Vaux4RequestCtrl
1999          */
2000         REG_INIT(AB8505_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2001         /*
2002          * 0x03, Vaux4Regu
2003          */
2004         REG_INIT(AB8505_VAUX4REGU,              0x04, 0x2e, 0x03),
2005         /*
2006          * 0x0f, Vaux4Sel
2007          */
2008         REG_INIT(AB8505_VAUX4SEL,               0x04, 0x2f, 0x0f),
2009         /*
2010          * 0x04, Vaux1Disch
2011          * 0x08, Vaux2Disch
2012          * 0x10, Vaux3Disch
2013          * 0x20, Vintcore12Disch
2014          * 0x40, VTVoutDisch
2015          * 0x80, VaudioDisch
2016          */
2017         REG_INIT(AB8505_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
2018         /*
2019          * 0x02, VanaDisch
2020          * 0x04, VdmicPullDownEna
2021          * 0x10, VdmicDisch
2022          */
2023         REG_INIT(AB8505_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
2024         /*
2025          * 0x01, Vaux4Disch
2026          */
2027         REG_INIT(AB8505_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2028         /*
2029          * 0x07, Vaux5Sel
2030          * 0x08, Vaux5LP
2031          * 0x10, Vaux5Ena
2032          * 0x20, Vaux5Disch
2033          * 0x40, Vaux5DisSfst
2034          * 0x80, Vaux5DisPulld
2035          */
2036         REG_INIT(AB8505_CTRLVAUX5,              0x01, 0x55, 0xff),
2037         /*
2038          * 0x07, Vaux6Sel
2039          * 0x08, Vaux6LP
2040          * 0x10, Vaux6Ena
2041          * 0x80, Vaux6DisPulld
2042          */
2043         REG_INIT(AB8505_CTRLVAUX6,              0x01, 0x56, 0x9f),
2044 };
2045
2046 /* AB9540 register init */
2047 static struct ab8500_reg_init ab9540_reg_init[] = {
2048         /*
2049          * 0x03, VarmRequestCtrl
2050          * 0x0c, VapeRequestCtrl
2051          * 0x30, Vsmps1RequestCtrl
2052          * 0xc0, Vsmps2RequestCtrl
2053          */
2054         REG_INIT(AB9540_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
2055         /*
2056          * 0x03, Vsmps3RequestCtrl
2057          * 0x0c, VpllRequestCtrl
2058          * 0x30, VanaRequestCtrl
2059          * 0xc0, VextSupply1RequestCtrl
2060          */
2061         REG_INIT(AB9540_REGUREQUESTCTRL2,       0x03, 0x04, 0xff),
2062         /*
2063          * 0x03, VextSupply2RequestCtrl
2064          * 0x0c, VextSupply3RequestCtrl
2065          * 0x30, Vaux1RequestCtrl
2066          * 0xc0, Vaux2RequestCtrl
2067          */
2068         REG_INIT(AB9540_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
2069         /*
2070          * 0x03, Vaux3RequestCtrl
2071          * 0x04, SwHPReq
2072          */
2073         REG_INIT(AB9540_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2074         /*
2075          * 0x01, Vsmps1SysClkReq1HPValid
2076          * 0x02, Vsmps2SysClkReq1HPValid
2077          * 0x04, Vsmps3SysClkReq1HPValid
2078          * 0x08, VanaSysClkReq1HPValid
2079          * 0x10, VpllSysClkReq1HPValid
2080          * 0x20, Vaux1SysClkReq1HPValid
2081          * 0x40, Vaux2SysClkReq1HPValid
2082          * 0x80, Vaux3SysClkReq1HPValid
2083          */
2084         REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2085         /*
2086          * 0x01, VapeSysClkReq1HPValid
2087          * 0x02, VarmSysClkReq1HPValid
2088          * 0x04, VbbSysClkReq1HPValid
2089          * 0x08, VmodSysClkReq1HPValid
2090          * 0x10, VextSupply1SysClkReq1HPValid
2091          * 0x20, VextSupply2SysClkReq1HPValid
2092          * 0x40, VextSupply3SysClkReq1HPValid
2093          */
2094         REG_INIT(AB9540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x7f),
2095         /*
2096          * 0x01, Vsmps1HwHPReq1Valid
2097          * 0x02, Vsmps2HwHPReq1Valid
2098          * 0x04, Vsmps3HwHPReq1Valid
2099          * 0x08, VanaHwHPReq1Valid
2100          * 0x10, VpllHwHPReq1Valid
2101          * 0x20, Vaux1HwHPReq1Valid
2102          * 0x40, Vaux2HwHPReq1Valid
2103          * 0x80, Vaux3HwHPReq1Valid
2104          */
2105         REG_INIT(AB9540_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2106         /*
2107          * 0x01, VextSupply1HwHPReq1Valid
2108          * 0x02, VextSupply2HwHPReq1Valid
2109          * 0x04, VextSupply3HwHPReq1Valid
2110          * 0x08, VmodHwHPReq1Valid
2111          */
2112         REG_INIT(AB9540_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x0f),
2113         /*
2114          * 0x01, Vsmps1HwHPReq2Valid
2115          * 0x02, Vsmps2HwHPReq2Valid
2116          * 0x03, Vsmps3HwHPReq2Valid
2117          * 0x08, VanaHwHPReq2Valid
2118          * 0x10, VpllHwHPReq2Valid
2119          * 0x20, Vaux1HwHPReq2Valid
2120          * 0x40, Vaux2HwHPReq2Valid
2121          * 0x80, Vaux3HwHPReq2Valid
2122          */
2123         REG_INIT(AB9540_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2124         /*
2125          * 0x01, VextSupply1HwHPReq2Valid
2126          * 0x02, VextSupply2HwHPReq2Valid
2127          * 0x04, VextSupply3HwHPReq2Valid
2128          * 0x08, VmodHwHPReq2Valid
2129          */
2130         REG_INIT(AB9540_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x0f),
2131         /*
2132          * 0x01, VapeSwHPReqValid
2133          * 0x02, VarmSwHPReqValid
2134          * 0x04, Vsmps1SwHPReqValid
2135          * 0x08, Vsmps2SwHPReqValid
2136          * 0x10, Vsmps3SwHPReqValid
2137          * 0x20, VanaSwHPReqValid
2138          * 0x40, VpllSwHPReqValid
2139          * 0x80, Vaux1SwHPReqValid
2140          */
2141         REG_INIT(AB9540_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2142         /*
2143          * 0x01, Vaux2SwHPReqValid
2144          * 0x02, Vaux3SwHPReqValid
2145          * 0x04, VextSupply1SwHPReqValid
2146          * 0x08, VextSupply2SwHPReqValid
2147          * 0x10, VextSupply3SwHPReqValid
2148          * 0x20, VmodSwHPReqValid
2149          */
2150         REG_INIT(AB9540_REGUSWHPREQVALID2,      0x03, 0x0e, 0x3f),
2151         /*
2152          * 0x02, SysClkReq2Valid1
2153          * ...
2154          * 0x80, SysClkReq8Valid1
2155          */
2156         REG_INIT(AB9540_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
2157         /*
2158          * 0x02, SysClkReq2Valid2
2159          * ...
2160          * 0x80, SysClkReq8Valid2
2161          */
2162         REG_INIT(AB9540_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
2163         /*
2164          * 0x01, Vaux4SwHPReqValid
2165          * 0x02, Vaux4HwHPReq2Valid
2166          * 0x04, Vaux4HwHPReq1Valid
2167          * 0x08, Vaux4SysClkReq1HPValid
2168          */
2169         REG_INIT(AB9540_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2170         /*
2171          * 0x02, VTVoutEna
2172          * 0x04, Vintcore12Ena
2173          * 0x38, Vintcore12Sel
2174          * 0x40, Vintcore12LP
2175          * 0x80, VTVoutLP
2176          */
2177         REG_INIT(AB9540_REGUMISC1,              0x03, 0x80, 0xfe),
2178         /*
2179          * 0x02, VaudioEna
2180          * 0x04, VdmicEna
2181          * 0x08, Vamic1Ena
2182          * 0x10, Vamic2Ena
2183          */
2184         REG_INIT(AB9540_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
2185         /*
2186          * 0x01, Vamic1_dzout
2187          * 0x02, Vamic2_dzout
2188          */
2189         REG_INIT(AB9540_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2190         /*
2191          * 0x03, Vsmps1Regu
2192          * 0x0c, Vsmps1SelCtrl
2193          * 0x10, Vsmps1AutoMode
2194          * 0x20, Vsmps1PWMMode
2195          */
2196         REG_INIT(AB9540_VSMPS1REGU,             0x04, 0x03, 0x3f),
2197         /*
2198          * 0x03, Vsmps2Regu
2199          * 0x0c, Vsmps2SelCtrl
2200          * 0x10, Vsmps2AutoMode
2201          * 0x20, Vsmps2PWMMode
2202          */
2203         REG_INIT(AB9540_VSMPS2REGU,             0x04, 0x04, 0x3f),
2204         /*
2205          * 0x03, Vsmps3Regu
2206          * 0x0c, Vsmps3SelCtrl
2207          * NOTE! PRCMU register
2208          */
2209         REG_INIT(AB9540_VSMPS3REGU,             0x04, 0x05, 0x0f),
2210         /*
2211          * 0x03, VpllRegu
2212          * 0x0c, VanaRegu
2213          */
2214         REG_INIT(AB9540_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2215         /*
2216          * 0x03, VextSupply1Regu
2217          * 0x0c, VextSupply2Regu
2218          * 0x30, VextSupply3Regu
2219          * 0x40, ExtSupply2Bypass
2220          * 0x80, ExtSupply3Bypass
2221          */
2222         REG_INIT(AB9540_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2223         /*
2224          * 0x03, Vaux1Regu
2225          * 0x0c, Vaux2Regu
2226          */
2227         REG_INIT(AB9540_VAUX12REGU,             0x04, 0x09, 0x0f),
2228         /*
2229          * 0x0c, Vrf1Regu
2230          * 0x03, Vaux3Regu
2231          */
2232         REG_INIT(AB9540_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2233         /*
2234          * 0x3f, Vsmps1Sel1
2235          */
2236         REG_INIT(AB9540_VSMPS1SEL1,             0x04, 0x13, 0x3f),
2237         /*
2238          * 0x3f, Vsmps1Sel2
2239          */
2240         REG_INIT(AB9540_VSMPS1SEL2,             0x04, 0x14, 0x3f),
2241         /*
2242          * 0x3f, Vsmps1Sel3
2243          */
2244         REG_INIT(AB9540_VSMPS1SEL3,             0x04, 0x15, 0x3f),
2245         /*
2246          * 0x3f, Vsmps2Sel1
2247          */
2248         REG_INIT(AB9540_VSMPS2SEL1,             0x04, 0x17, 0x3f),
2249         /*
2250          * 0x3f, Vsmps2Sel2
2251          */
2252         REG_INIT(AB9540_VSMPS2SEL2,             0x04, 0x18, 0x3f),
2253         /*
2254          * 0x3f, Vsmps2Sel3
2255          */
2256         REG_INIT(AB9540_VSMPS2SEL3,             0x04, 0x19, 0x3f),
2257         /*
2258          * 0x7f, Vsmps3Sel1
2259          * NOTE! PRCMU register
2260          */
2261         REG_INIT(AB9540_VSMPS3SEL1,             0x04, 0x1b, 0x7f),
2262         /*
2263          * 0x7f, Vsmps3Sel2
2264          * NOTE! PRCMU register
2265          */
2266         REG_INIT(AB9540_VSMPS3SEL2,             0x04, 0x1c, 0x7f),
2267         /*
2268          * 0x0f, Vaux1Sel
2269          */
2270         REG_INIT(AB9540_VAUX1SEL,               0x04, 0x1f, 0x0f),
2271         /*
2272          * 0x0f, Vaux2Sel
2273          */
2274         REG_INIT(AB9540_VAUX2SEL,               0x04, 0x20, 0x0f),
2275         /*
2276          * 0x07, Vaux3Sel
2277          * 0x30, Vrf1Sel
2278          */
2279         REG_INIT(AB9540_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
2280         /*
2281          * 0x01, VextSupply12LP
2282          */
2283         REG_INIT(AB9540_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
2284         /*
2285          * 0x03, Vaux4RequestCtrl
2286          */
2287         REG_INIT(AB9540_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2288         /*
2289          * 0x03, Vaux4Regu
2290          */
2291         REG_INIT(AB9540_VAUX4REGU,              0x04, 0x2e, 0x03),
2292         /*
2293          * 0x08, Vaux4Sel
2294          */
2295         REG_INIT(AB9540_VAUX4SEL,               0x04, 0x2f, 0x0f),
2296         /*
2297          * 0x01, VpllDisch
2298          * 0x02, Vrf1Disch
2299          * 0x04, Vaux1Disch
2300          * 0x08, Vaux2Disch
2301          * 0x10, Vaux3Disch
2302          * 0x20, Vintcore12Disch
2303          * 0x40, VTVoutDisch
2304          * 0x80, VaudioDisch
2305          */
2306         REG_INIT(AB9540_REGUCTRLDISCH,          0x04, 0x43, 0xff),
2307         /*
2308          * 0x01, VsimDisch
2309          * 0x02, VanaDisch
2310          * 0x04, VdmicPullDownEna
2311          * 0x08, VpllPullDownEna
2312          * 0x10, VdmicDisch
2313          */
2314         REG_INIT(AB9540_REGUCTRLDISCH2,         0x04, 0x44, 0x1f),
2315         /*
2316          * 0x01, Vaux4Disch
2317          */
2318         REG_INIT(AB9540_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2319 };
2320
2321 /* AB8540 register init */
2322 static struct ab8500_reg_init ab8540_reg_init[] = {
2323         /*
2324          * 0x01, VSimSycClkReq1Valid
2325          * 0x02, VSimSycClkReq2Valid
2326          * 0x04, VSimSycClkReq3Valid
2327          * 0x08, VSimSycClkReq4Valid
2328          * 0x10, VSimSycClkReq5Valid
2329          * 0x20, VSimSycClkReq6Valid
2330          * 0x40, VSimSycClkReq7Valid
2331          * 0x80, VSimSycClkReq8Valid
2332          */
2333         REG_INIT(AB8540_VSIMSYSCLKCTRL,         0x02, 0x33, 0xff),
2334         /*
2335          * 0x03, VarmRequestCtrl
2336          * 0x0c, VapeRequestCtrl
2337          * 0x30, Vsmps1RequestCtrl
2338          * 0xc0, Vsmps2RequestCtrl
2339          */
2340         REG_INIT(AB8540_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
2341         /*
2342          * 0x03, Vsmps3RequestCtrl
2343          * 0x0c, VpllRequestCtrl
2344          * 0x30, VanaRequestCtrl
2345          * 0xc0, VextSupply1RequestCtrl
2346          */
2347         REG_INIT(AB8540_REGUREQUESTCTRL2,       0x03, 0x04, 0xff),
2348         /*
2349          * 0x03, VextSupply2RequestCtrl
2350          * 0x0c, VextSupply3RequestCtrl
2351          * 0x30, Vaux1RequestCtrl
2352          * 0xc0, Vaux2RequestCtrl
2353          */
2354         REG_INIT(AB8540_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
2355         /*
2356          * 0x03, Vaux3RequestCtrl
2357          * 0x04, SwHPReq
2358          */
2359         REG_INIT(AB8540_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
2360         /*
2361          * 0x01, Vsmps1SysClkReq1HPValid
2362          * 0x02, Vsmps2SysClkReq1HPValid
2363          * 0x04, Vsmps3SysClkReq1HPValid
2364          * 0x08, VanaSysClkReq1HPValid
2365          * 0x10, VpllSysClkReq1HPValid
2366          * 0x20, Vaux1SysClkReq1HPValid
2367          * 0x40, Vaux2SysClkReq1HPValid
2368          * 0x80, Vaux3SysClkReq1HPValid
2369          */
2370         REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
2371         /*
2372          * 0x01, VapeSysClkReq1HPValid
2373          * 0x02, VarmSysClkReq1HPValid
2374          * 0x04, VbbSysClkReq1HPValid
2375          * 0x10, VextSupply1SysClkReq1HPValid
2376          * 0x20, VextSupply2SysClkReq1HPValid
2377          * 0x40, VextSupply3SysClkReq1HPValid
2378          */
2379         REG_INIT(AB8540_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x77),
2380         /*
2381          * 0x01, Vsmps1HwHPReq1Valid
2382          * 0x02, Vsmps2HwHPReq1Valid
2383          * 0x04, Vsmps3HwHPReq1Valid
2384          * 0x08, VanaHwHPReq1Valid
2385          * 0x10, VpllHwHPReq1Valid
2386          * 0x20, Vaux1HwHPReq1Valid
2387          * 0x40, Vaux2HwHPReq1Valid
2388          * 0x80, Vaux3HwHPReq1Valid
2389          */
2390         REG_INIT(AB8540_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
2391         /*
2392          * 0x01, VextSupply1HwHPReq1Valid
2393          * 0x02, VextSupply2HwHPReq1Valid
2394          * 0x04, VextSupply3HwHPReq1Valid
2395          */
2396         REG_INIT(AB8540_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
2397         /*
2398          * 0x01, Vsmps1HwHPReq2Valid
2399          * 0x02, Vsmps2HwHPReq2Valid
2400          * 0x03, Vsmps3HwHPReq2Valid
2401          * 0x08, VanaHwHPReq2Valid
2402          * 0x10, VpllHwHPReq2Valid
2403          * 0x20, Vaux1HwHPReq2Valid
2404          * 0x40, Vaux2HwHPReq2Valid
2405          * 0x80, Vaux3HwHPReq2Valid
2406          */
2407         REG_INIT(AB8540_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
2408         /*
2409          * 0x01, VextSupply1HwHPReq2Valid
2410          * 0x02, VextSupply2HwHPReq2Valid
2411          * 0x04, VextSupply3HwHPReq2Valid
2412          */
2413         REG_INIT(AB8540_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
2414         /*
2415          * 0x01, VapeSwHPReqValid
2416          * 0x02, VarmSwHPReqValid
2417          * 0x04, Vsmps1SwHPReqValid
2418          * 0x08, Vsmps2SwHPReqValid
2419          * 0x10, Vsmps3SwHPReqValid
2420          * 0x20, VanaSwHPReqValid
2421          * 0x40, VpllSwHPReqValid
2422          * 0x80, Vaux1SwHPReqValid
2423          */
2424         REG_INIT(AB8540_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
2425         /*
2426          * 0x01, Vaux2SwHPReqValid
2427          * 0x02, Vaux3SwHPReqValid
2428          * 0x04, VextSupply1SwHPReqValid
2429          * 0x08, VextSupply2SwHPReqValid
2430          * 0x10, VextSupply3SwHPReqValid
2431          */
2432         REG_INIT(AB8540_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
2433         /*
2434          * 0x02, SysClkReq2Valid1
2435          * ...
2436          * 0x80, SysClkReq8Valid1
2437          */
2438         REG_INIT(AB8540_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xff),
2439         /*
2440          * 0x02, SysClkReq2Valid2
2441          * ...
2442          * 0x80, SysClkReq8Valid2
2443          */
2444         REG_INIT(AB8540_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xff),
2445         /*
2446          * 0x01, Vaux4SwHPReqValid
2447          * 0x02, Vaux4HwHPReq2Valid
2448          * 0x04, Vaux4HwHPReq1Valid
2449          * 0x08, Vaux4SysClkReq1HPValid
2450          */
2451         REG_INIT(AB8540_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
2452         /*
2453          * 0x01, Vaux5SwHPReqValid
2454          * 0x02, Vaux5HwHPReq2Valid
2455          * 0x04, Vaux5HwHPReq1Valid
2456          * 0x08, Vaux5SysClkReq1HPValid
2457          */
2458         REG_INIT(AB8540_REGUVAUX5REQVALID,      0x03, 0x12, 0x0f),
2459         /*
2460          * 0x01, Vaux6SwHPReqValid
2461          * 0x02, Vaux6HwHPReq2Valid
2462          * 0x04, Vaux6HwHPReq1Valid
2463          * 0x08, Vaux6SysClkReq1HPValid
2464          */
2465         REG_INIT(AB8540_REGUVAUX6REQVALID,      0x03, 0x13, 0x0f),
2466         /*
2467          * 0x01, VclkbSwHPReqValid
2468          * 0x02, VclkbHwHPReq2Valid
2469          * 0x04, VclkbHwHPReq1Valid
2470          * 0x08, VclkbSysClkReq1HPValid
2471          */
2472         REG_INIT(AB8540_REGUVCLKBREQVALID,      0x03, 0x14, 0x0f),
2473         /*
2474          * 0x01, Vrf1SwHPReqValid
2475          * 0x02, Vrf1HwHPReq2Valid
2476          * 0x04, Vrf1HwHPReq1Valid
2477          * 0x08, Vrf1SysClkReq1HPValid
2478          */
2479         REG_INIT(AB8540_REGUVRF1REQVALID,       0x03, 0x15, 0x0f),
2480         /*
2481          * 0x02, VTVoutEna
2482          * 0x04, Vintcore12Ena
2483          * 0x38, Vintcore12Sel
2484          * 0x40, Vintcore12LP
2485          * 0x80, VTVoutLP
2486          */
2487         REG_INIT(AB8540_REGUMISC1,              0x03, 0x80, 0xfe),
2488         /*
2489          * 0x02, VaudioEna
2490          * 0x04, VdmicEna
2491          * 0x08, Vamic1Ena
2492          * 0x10, Vamic2Ena
2493          * 0x20, Vamic12LP
2494          * 0xC0, VdmicSel
2495          */
2496         REG_INIT(AB8540_VAUDIOSUPPLY,           0x03, 0x83, 0xfe),
2497         /*
2498          * 0x01, Vamic1_dzout
2499          * 0x02, Vamic2_dzout
2500          */
2501         REG_INIT(AB8540_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
2502         /*
2503          * 0x07, VHSICSel
2504          * 0x08, VHSICOffState
2505          * 0x10, VHSIEna
2506          * 0x20, VHSICLP
2507          */
2508         REG_INIT(AB8540_VHSIC,                  0x03, 0x87, 0x3f),
2509         /*
2510          * 0x07, VSDIOSel
2511          * 0x08, VSDIOOffState
2512          * 0x10, VSDIOEna
2513          * 0x20, VSDIOLP
2514          */
2515         REG_INIT(AB8540_VSDIO,                  0x03, 0x88, 0x3f),
2516         /*
2517          * 0x03, Vsmps1Regu
2518          * 0x0c, Vsmps1SelCtrl
2519          * 0x10, Vsmps1AutoMode
2520          * 0x20, Vsmps1PWMMode
2521          */
2522         REG_INIT(AB8540_VSMPS1REGU,             0x04, 0x03, 0x3f),
2523         /*
2524          * 0x03, Vsmps2Regu
2525          * 0x0c, Vsmps2SelCtrl
2526          * 0x10, Vsmps2AutoMode
2527          * 0x20, Vsmps2PWMMode
2528          */
2529         REG_INIT(AB8540_VSMPS2REGU,             0x04, 0x04, 0x3f),
2530         /*
2531          * 0x03, Vsmps3Regu
2532          * 0x0c, Vsmps3SelCtrl
2533          * 0x10, Vsmps3AutoMode
2534          * 0x20, Vsmps3PWMMode
2535          * NOTE! PRCMU register
2536          */
2537         REG_INIT(AB8540_VSMPS3REGU,             0x04, 0x05, 0x0f),
2538         /*
2539          * 0x03, VpllRegu
2540          * 0x0c, VanaRegu
2541          */
2542         REG_INIT(AB8540_VPLLVANAREGU,           0x04, 0x06, 0x0f),
2543         /*
2544          * 0x03, VextSupply1Regu
2545          * 0x0c, VextSupply2Regu
2546          * 0x30, VextSupply3Regu
2547          * 0x40, ExtSupply2Bypass
2548          * 0x80, ExtSupply3Bypass
2549          */
2550         REG_INIT(AB8540_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
2551         /*
2552          * 0x03, Vaux1Regu
2553          * 0x0c, Vaux2Regu
2554          */
2555         REG_INIT(AB8540_VAUX12REGU,             0x04, 0x09, 0x0f),
2556         /*
2557          * 0x0c, VRF1Regu
2558          * 0x03, Vaux3Regu
2559          */
2560         REG_INIT(AB8540_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
2561         /*
2562          * 0x3f, Vsmps1Sel1
2563          */
2564         REG_INIT(AB8540_VSMPS1SEL1,             0x04, 0x13, 0x3f),
2565         /*
2566          * 0x3f, Vsmps1Sel2
2567          */
2568         REG_INIT(AB8540_VSMPS1SEL2,             0x04, 0x14, 0x3f),
2569         /*
2570          * 0x3f, Vsmps1Sel3
2571          */
2572         REG_INIT(AB8540_VSMPS1SEL3,             0x04, 0x15, 0x3f),
2573         /*
2574          * 0x3f, Vsmps2Sel1
2575          */
2576         REG_INIT(AB8540_VSMPS2SEL1,             0x04, 0x17, 0x3f),
2577         /*
2578          * 0x3f, Vsmps2Sel2
2579          */
2580         REG_INIT(AB8540_VSMPS2SEL2,             0x04, 0x18, 0x3f),
2581         /*
2582          * 0x3f, Vsmps2Sel3
2583          */
2584         REG_INIT(AB8540_VSMPS2SEL3,             0x04, 0x19, 0x3f),
2585         /*
2586          * 0x7f, Vsmps3Sel1
2587          * NOTE! PRCMU register
2588          */
2589         REG_INIT(AB8540_VSMPS3SEL1,             0x04, 0x1b, 0x7f),
2590         /*
2591          * 0x7f, Vsmps3Sel2
2592          * NOTE! PRCMU register
2593          */
2594         REG_INIT(AB8540_VSMPS3SEL2,             0x04, 0x1c, 0x7f),
2595         /*
2596          * 0x0f, Vaux1Sel
2597          */
2598         REG_INIT(AB8540_VAUX1SEL,               0x04, 0x1f, 0x0f),
2599         /*
2600          * 0x0f, Vaux2Sel
2601          */
2602         REG_INIT(AB8540_VAUX2SEL,               0x04, 0x20, 0x0f),
2603         /*
2604          * 0x07, Vaux3Sel
2605          * 0x70, Vrf1Sel
2606          */
2607         REG_INIT(AB8540_VRF1VAUX3SEL,           0x04, 0x21, 0x77),
2608         /*
2609          * 0x01, VextSupply12LP
2610          */
2611         REG_INIT(AB8540_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
2612         /*
2613          * 0x07, Vanasel
2614          * 0x30, Vpllsel
2615          */
2616         REG_INIT(AB8540_VANAVPLLSEL,            0x04, 0x29, 0x37),
2617         /*
2618          * 0x03, Vaux4RequestCtrl
2619          */
2620         REG_INIT(AB8540_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
2621         /*
2622          * 0x03, Vaux4Regu
2623          */
2624         REG_INIT(AB8540_VAUX4REGU,              0x04, 0x2e, 0x03),
2625         /*
2626          * 0x0f, Vaux4Sel
2627          */
2628         REG_INIT(AB8540_VAUX4SEL,               0x04, 0x2f, 0x0f),
2629         /*
2630          * 0x03, Vaux5RequestCtrl
2631          */
2632         REG_INIT(AB8540_VAUX5REQCTRL,           0x04, 0x31, 0x03),
2633         /*
2634          * 0x03, Vaux5Regu
2635          */
2636         REG_INIT(AB8540_VAUX5REGU,              0x04, 0x32, 0x03),
2637         /*
2638          * 0x3f, Vaux5Sel
2639          */
2640         REG_INIT(AB8540_VAUX5SEL,               0x04, 0x33, 0x3f),
2641         /*
2642          * 0x03, Vaux6RequestCtrl
2643          */
2644         REG_INIT(AB8540_VAUX6REQCTRL,           0x04, 0x34, 0x03),
2645         /*
2646          * 0x03, Vaux6Regu
2647          */
2648         REG_INIT(AB8540_VAUX6REGU,              0x04, 0x35, 0x03),
2649         /*
2650          * 0x3f, Vaux6Sel
2651          */
2652         REG_INIT(AB8540_VAUX6SEL,               0x04, 0x36, 0x3f),
2653         /*
2654          * 0x03, VCLKBRequestCtrl
2655          */
2656         REG_INIT(AB8540_VCLKBREQCTRL,           0x04, 0x37, 0x03),
2657         /*
2658          * 0x03, VCLKBRegu
2659          */
2660         REG_INIT(AB8540_VCLKBREGU,              0x04, 0x38, 0x03),
2661         /*
2662          * 0x07, VCLKBSel
2663          */
2664         REG_INIT(AB8540_VCLKBSEL,               0x04, 0x39, 0x07),
2665         /*
2666          * 0x03, Vrf1RequestCtrl
2667          */
2668         REG_INIT(AB8540_VRF1REQCTRL,            0x04, 0x3a, 0x03),
2669         /*
2670          * 0x01, VpllDisch
2671          * 0x02, Vrf1Disch
2672          * 0x04, Vaux1Disch
2673          * 0x08, Vaux2Disch
2674          * 0x10, Vaux3Disch
2675          * 0x20, Vintcore12Disch
2676          * 0x40, VTVoutDisch
2677          * 0x80, VaudioDisch
2678          */
2679         REG_INIT(AB8540_REGUCTRLDISCH,          0x04, 0x43, 0xff),
2680         /*
2681          * 0x02, VanaDisch
2682          * 0x04, VdmicPullDownEna
2683          * 0x08, VpllPullDownEna
2684          * 0x10, VdmicDisch
2685          */
2686         REG_INIT(AB8540_REGUCTRLDISCH2,         0x04, 0x44, 0x1e),
2687         /*
2688          * 0x01, Vaux4Disch
2689          */
2690         REG_INIT(AB8540_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
2691         /*
2692          * 0x01, Vaux5Disch
2693          * 0x02, Vaux6Disch
2694          * 0x04, VCLKBDisch
2695          */
2696         REG_INIT(AB8540_REGUCTRLDISCH4,         0x04, 0x49, 0x07),
2697 };
2698
2699 static int ab8500_regulator_init_registers(struct platform_device *pdev,
2700                                            struct ab8500_reg_init *reg_init,
2701                                            int id, int mask, int value)
2702 {
2703         int err;
2704
2705         BUG_ON(value & ~mask);
2706         BUG_ON(mask & ~reg_init[id].mask);
2707
2708         /* initialize register */
2709         err = abx500_mask_and_set_register_interruptible(
2710                 &pdev->dev,
2711                 reg_init[id].bank,
2712                 reg_init[id].addr,
2713                 mask, value);
2714         if (err < 0) {
2715                 dev_err(&pdev->dev,
2716                         "Failed to initialize 0x%02x, 0x%02x.\n",
2717                         reg_init[id].bank,
2718                         reg_init[id].addr);
2719                 return err;
2720         }
2721         dev_vdbg(&pdev->dev,
2722                  "  init: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",
2723                  reg_init[id].bank,
2724                  reg_init[id].addr,
2725                  mask, value);
2726
2727         return 0;
2728 }
2729
2730 static int ab8500_regulator_register(struct platform_device *pdev,
2731                                      struct regulator_init_data *init_data,
2732                                      struct ab8500_regulator_info *regulator_info,
2733                                      int id, struct device_node *np)
2734 {
2735         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
2736         struct ab8500_regulator_info *info = NULL;
2737         struct regulator_config config = { };
2738         int err;
2739
2740         /* assign per-regulator data */
2741         info = &regulator_info[id];
2742         info->dev = &pdev->dev;
2743
2744         config.dev = &pdev->dev;
2745         config.init_data = init_data;
2746         config.driver_data = info;
2747         config.of_node = np;
2748
2749         /* fix for hardware before ab8500v2.0 */
2750         if (is_ab8500_1p1_or_earlier(ab8500)) {
2751                 if (info->desc.id == AB8500_LDO_AUX3) {
2752                         info->desc.n_voltages =
2753                                 ARRAY_SIZE(ldo_vauxn_voltages);
2754                         info->desc.volt_table = ldo_vauxn_voltages;
2755                         info->voltage_mask = 0xf;
2756                 }
2757         }
2758
2759         /* register regulator with framework */
2760         info->regulator = regulator_register(&info->desc, &config);
2761         if (IS_ERR(info->regulator)) {
2762                 err = PTR_ERR(info->regulator);
2763                 dev_err(&pdev->dev, "failed to register regulator %s\n",
2764                         info->desc.name);
2765                 /* when we fail, un-register all earlier regulators */
2766                 while (--id >= 0) {
2767                         info = &regulator_info[id];
2768                         regulator_unregister(info->regulator);
2769                 }
2770                 return err;
2771         }
2772
2773         return 0;
2774 }
2775
2776 static struct of_regulator_match ab8500_regulator_match[] = {
2777         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8500_LDO_AUX1, },
2778         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8500_LDO_AUX2, },
2779         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8500_LDO_AUX3, },
2780         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
2781         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8500_LDO_TVOUT, },
2782         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8500_LDO_AUDIO, },
2783         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
2784         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
2785         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8500_LDO_DMIC, },
2786         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8500_LDO_ANA, },
2787 };
2788
2789 static struct of_regulator_match ab8505_regulator_match[] = {
2790         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8505_LDO_AUX1, },
2791         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8505_LDO_AUX2, },
2792         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8505_LDO_AUX3, },
2793         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8505_LDO_AUX4, },
2794         { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8505_LDO_AUX5, },
2795         { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8505_LDO_AUX6, },
2796         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
2797         { .name = "ab8500_ldo_adc",     .driver_data = (void *) AB8505_LDO_ADC, },
2798         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8505_LDO_AUDIO, },
2799         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
2800         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
2801         { .name = "ab8500_ldo_aux8",    .driver_data = (void *) AB8505_LDO_AUX8, },
2802         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8505_LDO_ANA, },
2803 };
2804
2805 static struct of_regulator_match ab8540_regulator_match[] = {
2806         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8540_LDO_AUX1, },
2807         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8540_LDO_AUX2, },
2808         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8540_LDO_AUX3, },
2809         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8540_LDO_AUX4, },
2810         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8540_LDO_INTCORE, },
2811         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8540_LDO_TVOUT, },
2812         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8540_LDO_AUDIO, },
2813         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8540_LDO_ANAMIC1, },
2814         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB8540_LDO_ANAMIC2, },
2815         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8540_LDO_DMIC, },
2816         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8540_LDO_ANA, },
2817         { .name = "ab8500_ldo_sdio",    .driver_data = (void *) AB8540_LDO_SDIO, },
2818 };
2819
2820 static struct of_regulator_match ab9540_regulator_match[] = {
2821         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB9540_LDO_AUX1, },
2822         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB9540_LDO_AUX2, },
2823         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB9540_LDO_AUX3, },
2824         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB9540_LDO_AUX4, },
2825         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB9540_LDO_INTCORE, },
2826         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB9540_LDO_TVOUT, },
2827         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB9540_LDO_AUDIO, },
2828         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB9540_LDO_ANAMIC1, },
2829         { .name = "ab8500_ldo_amamic2", .driver_data = (void *) AB9540_LDO_ANAMIC2, },
2830         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB9540_LDO_DMIC, },
2831         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB9540_LDO_ANA, },
2832 };
2833
2834 static int
2835 ab8500_regulator_of_probe(struct platform_device *pdev,
2836                           struct ab8500_regulator_info *regulator_info,
2837                           int regulator_info_size,
2838                           struct of_regulator_match *match,
2839                           struct device_node *np)
2840 {
2841         int err, i;
2842
2843         for (i = 0; i < regulator_info_size; i++) {
2844                 err = ab8500_regulator_register(
2845                         pdev, match[i].init_data, regulator_info,
2846                         i, match[i].of_node);
2847                 if (err)
2848                         return err;
2849         }
2850
2851         return 0;
2852 }
2853
2854 static int ab8500_regulator_probe(struct platform_device *pdev)
2855 {
2856         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
2857         struct device_node *np = pdev->dev.of_node;
2858         struct of_regulator_match *match;
2859         struct ab8500_platform_data *ppdata;
2860         struct ab8500_regulator_platform_data *pdata;
2861         int i, err;
2862         struct ab8500_regulator_info *regulator_info;
2863         int regulator_info_size;
2864         struct ab8500_reg_init *reg_init;
2865         int reg_init_size;
2866
2867         if (is_ab9540(ab8500)) {
2868                 regulator_info = ab9540_regulator_info;
2869                 regulator_info_size = ARRAY_SIZE(ab9540_regulator_info);
2870                 reg_init = ab9540_reg_init;
2871                 reg_init_size = AB9540_NUM_REGULATOR_REGISTERS;
2872                 match = ab9540_regulator_match;
2873                 match_size = ARRAY_SIZE(ab9540_regulator_match)
2874         } else if (is_ab8505(ab8500)) {
2875                 regulator_info = ab8505_regulator_info;
2876                 regulator_info_size = ARRAY_SIZE(ab8505_regulator_info);
2877                 reg_init = ab8505_reg_init;
2878                 reg_init_size = AB8505_NUM_REGULATOR_REGISTERS;
2879         } else if (is_ab8540(ab8500)) {
2880                 regulator_info = ab8540_regulator_info;
2881                 regulator_info_size = ARRAY_SIZE(ab8540_regulator_info);
2882                 reg_init = ab8540_reg_init;
2883                 reg_init_size = AB8540_NUM_REGULATOR_REGISTERS;
2884         } else {
2885                 regulator_info = ab8500_regulator_info;
2886                 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
2887                 reg_init = ab8500_reg_init;
2888                 reg_init_size = AB8500_NUM_REGULATOR_REGISTERS;
2889                 match = ab8500_regulator_match;
2890                 match_size = ARRAY_SIZE(ab8500_regulator_match)
2891         }
2892
2893         if (np) {
2894                 err = of_regulator_match(&pdev->dev, np, match, match_size);
2895                 if (err < 0) {
2896                         dev_err(&pdev->dev,
2897                                 "Error parsing regulator init data: %d\n", err);
2898                         return err;
2899                 }
2900
2901                 err = ab8500_regulator_of_probe(pdev, regulator_info,
2902                                                 regulator_info_size, match, np);
2903                 return err;
2904         }
2905
2906         if (!ab8500) {
2907                 dev_err(&pdev->dev, "null mfd parent\n");
2908                 return -EINVAL;
2909         }
2910
2911         ppdata = dev_get_platdata(ab8500->dev);
2912         if (!ppdata) {
2913                 dev_err(&pdev->dev, "null parent pdata\n");
2914                 return -EINVAL;
2915         }
2916
2917         pdata = ppdata->regulator;
2918         if (!pdata) {
2919                 dev_err(&pdev->dev, "null pdata\n");
2920                 return -EINVAL;
2921         }
2922
2923         /* make sure the platform data has the correct size */
2924         if (pdata->num_regulator != regulator_info_size) {
2925                 dev_err(&pdev->dev, "Configuration error: size mismatch.\n");
2926                 return -EINVAL;
2927         }
2928
2929         /* initialize debug (initial state is recorded with this call) */
2930         err = ab8500_regulator_debug_init(pdev);
2931         if (err)
2932                 return err;
2933
2934         /* initialize registers */
2935         for (i = 0; i < pdata->num_reg_init; i++) {
2936                 int id, mask, value;
2937
2938                 id = pdata->reg_init[i].id;
2939                 mask = pdata->reg_init[i].mask;
2940                 value = pdata->reg_init[i].value;
2941
2942                 /* check for configuration errors */
2943                 BUG_ON(id >= AB8500_NUM_REGULATOR_REGISTERS);
2944
2945                 err = ab8500_regulator_init_registers(pdev, reg_init, id, mask, value);
2946                 if (err < 0)
2947                         return err;
2948         }
2949
2950         if (!is_ab8505(ab8500)) {
2951                 /* register external regulators (before Vaux1, 2 and 3) */
2952                 err = ab8500_ext_regulator_init(pdev);
2953                 if (err)
2954                         return err;
2955         }
2956
2957         /* register all regulators */
2958         for (i = 0; i < regulator_info_size; i++) {
2959                 err = ab8500_regulator_register(pdev, &pdata->regulator[i],
2960                                                 regulator_info, i, NULL);
2961                 if (err < 0)
2962                         return err;
2963         }
2964
2965         return 0;
2966 }
2967
2968 static int ab8500_regulator_remove(struct platform_device *pdev)
2969 {
2970         int i, err;
2971         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
2972         struct ab8500_regulator_info *regulator_info;
2973         int regulator_info_size;
2974
2975
2976         if (is_ab9540(ab8500)) {
2977                 regulator_info = ab9540_regulator_info;
2978                 regulator_info_size = ARRAY_SIZE(ab9540_regulator_info);
2979         } else if (is_ab8505(ab8500)) {
2980                 regulator_info = ab8505_regulator_info;
2981                 regulator_info_size = ARRAY_SIZE(ab8505_regulator_info);
2982         } else if (is_ab8540(ab8500)) {
2983                 regulator_info = ab8540_regulator_info;
2984                 regulator_info_size = ARRAY_SIZE(ab8540_regulator_info);
2985         } else {
2986                 regulator_info = ab8500_regulator_info;
2987                 regulator_info_size = ARRAY_SIZE(ab8500_regulator_info);
2988         }
2989
2990         for (i = 0; i < regulator_info_size; i++) {
2991                 struct ab8500_regulator_info *info = NULL;
2992                 info = &regulator_info[i];
2993
2994                 dev_vdbg(rdev_get_dev(info->regulator),
2995                         "%s-remove\n", info->desc.name);
2996
2997                 regulator_unregister(info->regulator);
2998         }
2999
3000         if (!is_ab8505(ab8500)) {
3001                 /* remove external regulators (after Vaux1, 2 and 3) */
3002                 err = ab8500_ext_regulator_exit(pdev);
3003                 if (err)
3004                         return err;
3005         }
3006
3007         /* remove regulator debug */
3008         err = ab8500_regulator_debug_exit(pdev);
3009         if (err)
3010                 return err;
3011
3012         return 0;
3013 }
3014
3015 static struct platform_driver ab8500_regulator_driver = {
3016         .probe = ab8500_regulator_probe,
3017         .remove = ab8500_regulator_remove,
3018         .driver         = {
3019                 .name   = "ab8500-regulator",
3020                 .owner  = THIS_MODULE,
3021         },
3022 };
3023
3024 static int __init ab8500_regulator_init(void)
3025 {
3026         int ret;
3027
3028         ret = platform_driver_register(&ab8500_regulator_driver);
3029         if (ret != 0)
3030                 pr_err("Failed to register ab8500 regulator: %d\n", ret);
3031
3032         return ret;
3033 }
3034 subsys_initcall(ab8500_regulator_init);
3035
3036 static void __exit ab8500_regulator_exit(void)
3037 {
3038         platform_driver_unregister(&ab8500_regulator_driver);
3039 }
3040 module_exit(ab8500_regulator_exit);
3041
3042 MODULE_LICENSE("GPL v2");
3043 MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
3044 MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
3045 MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
3046 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
3047 MODULE_ALIAS("platform:ab8500-regulator");