2 * Copyright (c) 2015, Sony Mobile Communications AB.
3 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 and
7 * only version 2 as published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/platform_device.h>
19 #include <linux/regulator/driver.h>
20 #include <linux/regulator/machine.h>
21 #include <linux/regulator/of_regulator.h>
22 #include <linux/soc/qcom/smd-rpm.h>
27 struct qcom_smd_rpm *rpm;
32 struct regulator_desc desc;
38 struct rpm_regulator_req {
44 #define RPM_KEY_SWEN 0x6e657773 /* "swen" */
45 #define RPM_KEY_UV 0x00007675 /* "uv" */
46 #define RPM_KEY_MA 0x0000616d /* "ma" */
48 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg,
49 struct rpm_regulator_req *req,
52 return qcom_rpm_smd_write(vreg->rpm,
53 QCOM_SMD_RPM_ACTIVE_STATE,
59 static int rpm_reg_enable(struct regulator_dev *rdev)
61 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
62 struct rpm_regulator_req req;
65 req.key = cpu_to_le32(RPM_KEY_SWEN);
66 req.nbytes = cpu_to_le32(sizeof(u32));
67 req.value = cpu_to_le32(1);
69 ret = rpm_reg_write_active(vreg, &req, sizeof(req));
76 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
78 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
80 return vreg->is_enabled;
83 static int rpm_reg_disable(struct regulator_dev *rdev)
85 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
86 struct rpm_regulator_req req;
89 req.key = cpu_to_le32(RPM_KEY_SWEN);
90 req.nbytes = cpu_to_le32(sizeof(u32));
93 ret = rpm_reg_write_active(vreg, &req, sizeof(req));
100 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
102 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
107 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
112 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
113 struct rpm_regulator_req req;
116 req.key = cpu_to_le32(RPM_KEY_UV);
117 req.nbytes = cpu_to_le32(sizeof(u32));
118 req.value = cpu_to_le32(min_uV);
120 ret = rpm_reg_write_active(vreg, &req, sizeof(req));
127 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
129 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
130 struct rpm_regulator_req req;
132 req.key = cpu_to_le32(RPM_KEY_MA);
133 req.nbytes = cpu_to_le32(sizeof(u32));
134 req.value = cpu_to_le32(load_uA / 1000);
136 return rpm_reg_write_active(vreg, &req, sizeof(req));
139 static const struct regulator_ops rpm_smps_ldo_ops = {
140 .enable = rpm_reg_enable,
141 .disable = rpm_reg_disable,
142 .is_enabled = rpm_reg_is_enabled,
143 .list_voltage = regulator_list_voltage_linear_range,
145 .get_voltage = rpm_reg_get_voltage,
146 .set_voltage = rpm_reg_set_voltage,
148 .set_load = rpm_reg_set_load,
151 static const struct regulator_ops rpm_switch_ops = {
152 .enable = rpm_reg_enable,
153 .disable = rpm_reg_disable,
154 .is_enabled = rpm_reg_is_enabled,
157 static const struct regulator_desc pma8084_hfsmps = {
158 .linear_ranges = (struct regulator_linear_range[]) {
159 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
160 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
162 .n_linear_ranges = 2,
164 .ops = &rpm_smps_ldo_ops,
167 static const struct regulator_desc pma8084_ftsmps = {
168 .linear_ranges = (struct regulator_linear_range[]) {
169 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
170 REGULATOR_LINEAR_RANGE(700000, 185, 339, 10000),
172 .n_linear_ranges = 2,
174 .ops = &rpm_smps_ldo_ops,
177 static const struct regulator_desc pma8084_pldo = {
178 .linear_ranges = (struct regulator_linear_range[]) {
179 REGULATOR_LINEAR_RANGE(750000, 0, 30, 25000),
180 REGULATOR_LINEAR_RANGE(1500000, 31, 99, 50000),
182 .n_linear_ranges = 2,
184 .ops = &rpm_smps_ldo_ops,
187 static const struct regulator_desc pma8084_nldo = {
188 .linear_ranges = (struct regulator_linear_range[]) {
189 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
191 .n_linear_ranges = 1,
193 .ops = &rpm_smps_ldo_ops,
196 static const struct regulator_desc pma8084_switch = {
197 .ops = &rpm_switch_ops,
200 static const struct regulator_desc pm8x41_hfsmps = {
201 .linear_ranges = (struct regulator_linear_range[]) {
202 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
203 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
205 .n_linear_ranges = 2,
207 .ops = &rpm_smps_ldo_ops,
210 static const struct regulator_desc pm8841_ftsmps = {
211 .linear_ranges = (struct regulator_linear_range[]) {
212 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
213 REGULATOR_LINEAR_RANGE(700000, 185, 339, 10000),
215 .n_linear_ranges = 2,
217 .ops = &rpm_smps_ldo_ops,
220 static const struct regulator_desc pm8941_boost = {
221 .linear_ranges = (struct regulator_linear_range[]) {
222 REGULATOR_LINEAR_RANGE(4000000, 0, 15, 100000),
224 .n_linear_ranges = 1,
226 .ops = &rpm_smps_ldo_ops,
229 static const struct regulator_desc pm8941_pldo = {
230 .linear_ranges = (struct regulator_linear_range[]) {
231 REGULATOR_LINEAR_RANGE( 750000, 0, 30, 25000),
232 REGULATOR_LINEAR_RANGE(1500000, 31, 99, 50000),
234 .n_linear_ranges = 2,
236 .ops = &rpm_smps_ldo_ops,
239 static const struct regulator_desc pm8941_nldo = {
240 .linear_ranges = (struct regulator_linear_range[]) {
241 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
243 .n_linear_ranges = 1,
245 .ops = &rpm_smps_ldo_ops,
248 static const struct regulator_desc pm8941_lnldo = {
251 .ops = &rpm_smps_ldo_ops,
254 static const struct regulator_desc pm8941_switch = {
255 .ops = &rpm_switch_ops,
258 static const struct regulator_desc pm8916_pldo = {
259 .linear_ranges = (struct regulator_linear_range[]) {
260 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
262 .n_linear_ranges = 1,
264 .ops = &rpm_smps_ldo_ops,
267 static const struct regulator_desc pm8916_nldo = {
268 .linear_ranges = (struct regulator_linear_range[]) {
269 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
271 .n_linear_ranges = 1,
273 .ops = &rpm_smps_ldo_ops,
276 static const struct regulator_desc pm8916_buck_lvo_smps = {
277 .linear_ranges = (struct regulator_linear_range[]) {
278 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
279 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
281 .n_linear_ranges = 2,
283 .ops = &rpm_smps_ldo_ops,
286 static const struct regulator_desc pm8916_buck_hvo_smps = {
287 .linear_ranges = (struct regulator_linear_range[]) {
288 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
290 .n_linear_ranges = 1,
292 .ops = &rpm_smps_ldo_ops,
295 struct rpm_regulator_data {
299 const struct regulator_desc *desc;
303 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
304 { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
305 { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
306 { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
307 { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
308 { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
309 { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
310 { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
311 { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
315 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
316 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
317 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
318 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
319 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
320 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
321 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
322 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
323 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
324 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
325 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
326 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
327 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
328 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
329 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
330 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
331 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
332 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
333 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
334 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
335 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
336 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
337 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
341 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
342 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
343 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
344 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
345 { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
347 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
348 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
349 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
350 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
351 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
352 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
353 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
354 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
355 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
356 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
357 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
358 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
359 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
360 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
361 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
362 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
363 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
364 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
365 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
366 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
367 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
368 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
369 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
370 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
372 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
373 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
374 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
376 { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
377 { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
382 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
383 { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
384 { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
385 { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
386 { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
387 { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
388 { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
389 { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
390 { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
391 { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
392 { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
393 { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
394 { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
396 { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
397 { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
398 { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
399 { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
400 { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
401 { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
402 { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
403 { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
404 { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
405 { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
406 { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
407 { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
408 { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
409 { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
410 { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
411 { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
412 { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
413 { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
414 { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
415 { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
416 { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
417 { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
418 { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
419 { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
420 { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
421 { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
422 { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
424 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
425 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
426 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
427 { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
428 { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
433 static const struct of_device_id rpm_of_match[] = {
434 { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
435 { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
436 { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
437 { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
440 MODULE_DEVICE_TABLE(of, rpm_of_match);
442 static int rpm_reg_probe(struct platform_device *pdev)
444 const struct rpm_regulator_data *reg;
445 const struct of_device_id *match;
446 struct regulator_config config = { };
447 struct regulator_dev *rdev;
448 struct qcom_rpm_reg *vreg;
449 struct qcom_smd_rpm *rpm;
451 rpm = dev_get_drvdata(pdev->dev.parent);
453 dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
457 match = of_match_device(rpm_of_match, &pdev->dev);
458 for (reg = match->data; reg->name; reg++) {
459 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
463 vreg->dev = &pdev->dev;
464 vreg->type = reg->type;
468 memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc));
471 vreg->desc.owner = THIS_MODULE;
472 vreg->desc.type = REGULATOR_VOLTAGE;
473 vreg->desc.name = reg->name;
474 vreg->desc.supply_name = reg->supply;
475 vreg->desc.of_match = reg->name;
477 config.dev = &pdev->dev;
478 config.driver_data = vreg;
479 rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
481 dev_err(&pdev->dev, "failed to register %s\n", reg->name);
482 return PTR_ERR(rdev);
489 static struct platform_driver rpm_reg_driver = {
490 .probe = rpm_reg_probe,
492 .name = "qcom_rpm_smd_regulator",
493 .of_match_table = rpm_of_match,
497 static int __init rpm_reg_init(void)
499 return platform_driver_register(&rpm_reg_driver);
501 subsys_initcall(rpm_reg_init);
503 static void __exit rpm_reg_exit(void)
505 platform_driver_unregister(&rpm_reg_driver);
507 module_exit(rpm_reg_exit)
509 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
510 MODULE_LICENSE("GPL v2");