drivers/rtc/rtc-omap.c

   1 /*
   2  * TI OMAP1 Real Time Clock interface for Linux
   3  *
   4  * Copyright (C) 2003 MontaVista Software, Inc.
   5  * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
   6  *
   7  * Copyright (C) 2006 David Brownell (new RTC framework)
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/module.h>
  18 #include <linux/ioport.h>
  19 #include <linux/delay.h>
  20 #include <linux/rtc.h>
  21 #include <linux/bcd.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/of.h>
  24 #include <linux/of_device.h>
  25 #include <linux/pm_runtime.h>
  26 #include <linux/io.h>
  27
  28 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
  29  * with century-range alarm matching, driven by the 32kHz clock.
  30  *
  31  * The main user-visible ways it differs from PC RTCs are by omitting
  32  * "don't care" alarm fields and sub-second periodic IRQs, and having
  33  * an autoadjust mechanism to calibrate to the true oscillator rate.
  34  *
  35  * Board-specific wiring options include using split power mode with
  36  * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
  37  * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
  38  * low power modes) for OMAP1 boards (OMAP-L138 has this built into
  39  * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
  40  */
  41
  42 /* RTC registers */
  43 #define OMAP_RTC_SECONDS_REG            0x00
  44 #define OMAP_RTC_MINUTES_REG            0x04
  45 #define OMAP_RTC_HOURS_REG              0x08
  46 #define OMAP_RTC_DAYS_REG               0x0C
  47 #define OMAP_RTC_MONTHS_REG             0x10
  48 #define OMAP_RTC_YEARS_REG              0x14
  49 #define OMAP_RTC_WEEKS_REG              0x18
  50
  51 #define OMAP_RTC_ALARM_SECONDS_REG      0x20
  52 #define OMAP_RTC_ALARM_MINUTES_REG      0x24
  53 #define OMAP_RTC_ALARM_HOURS_REG        0x28
  54 #define OMAP_RTC_ALARM_DAYS_REG         0x2c
  55 #define OMAP_RTC_ALARM_MONTHS_REG       0x30
  56 #define OMAP_RTC_ALARM_YEARS_REG        0x34
  57
  58 #define OMAP_RTC_CTRL_REG               0x40
  59 #define OMAP_RTC_STATUS_REG             0x44
  60 #define OMAP_RTC_INTERRUPTS_REG         0x48
  61
  62 #define OMAP_RTC_COMP_LSB_REG           0x4c
  63 #define OMAP_RTC_COMP_MSB_REG           0x50
  64 #define OMAP_RTC_OSC_REG                0x54
  65
  66 #define OMAP_RTC_KICK0_REG              0x6c
  67 #define OMAP_RTC_KICK1_REG              0x70
  68
  69 #define OMAP_RTC_IRQWAKEEN              0x7c
  70
  71 /* OMAP_RTC_CTRL_REG bit fields: */
  72 #define OMAP_RTC_CTRL_SPLIT             BIT(7)
  73 #define OMAP_RTC_CTRL_DISABLE           BIT(6)
  74 #define OMAP_RTC_CTRL_SET_32_COUNTER    BIT(5)
  75 #define OMAP_RTC_CTRL_TEST              BIT(4)
  76 #define OMAP_RTC_CTRL_MODE_12_24        BIT(3)
  77 #define OMAP_RTC_CTRL_AUTO_COMP         BIT(2)
  78 #define OMAP_RTC_CTRL_ROUND_30S         BIT(1)
  79 #define OMAP_RTC_CTRL_STOP              BIT(0)
  80
  81 /* OMAP_RTC_STATUS_REG bit fields: */
  82 #define OMAP_RTC_STATUS_POWER_UP        BIT(7)
  83 #define OMAP_RTC_STATUS_ALARM           BIT(6)
  84 #define OMAP_RTC_STATUS_1D_EVENT        BIT(5)
  85 #define OMAP_RTC_STATUS_1H_EVENT        BIT(4)
  86 #define OMAP_RTC_STATUS_1M_EVENT        BIT(3)
  87 #define OMAP_RTC_STATUS_1S_EVENT        BIT(2)
  88 #define OMAP_RTC_STATUS_RUN             BIT(1)
  89 #define OMAP_RTC_STATUS_BUSY            BIT(0)
  90
  91 /* OMAP_RTC_INTERRUPTS_REG bit fields: */
  92 #define OMAP_RTC_INTERRUPTS_IT_ALARM    BIT(3)
  93 #define OMAP_RTC_INTERRUPTS_IT_TIMER    BIT(2)
  94
  95 /* OMAP_RTC_OSC_REG bit fields: */
  96 #define OMAP_RTC_OSC_32KCLK_EN          BIT(6)
  97
  98 /* OMAP_RTC_IRQWAKEEN bit fields: */
  99 #define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN BIT(1)
 100
 101 /* OMAP_RTC_KICKER values */
 102 #define KICK0_VALUE                     0x83e70b13
 103 #define KICK1_VALUE                     0x95a4f1e0
 104
 105 struct omap_rtc_device_type {
 106         bool has_32kclk_en;
 107         bool has_kicker;
 108         bool has_irqwakeen;
 109         bool has_power_up_reset;
 110 };
 111
 112 struct omap_rtc {
 113         struct rtc_device *rtc;
 114         void __iomem *base;
 115         int irq_alarm;
 116         int irq_timer;
 117         u8 interrupts_reg;
 118         const struct omap_rtc_device_type *type;
 119 };
 120
 121 static inline u8 rtc_read(struct omap_rtc *rtc, unsigned int reg)
 122 {
 123         return readb(rtc->base + reg);
 124 }
 125
 126 static inline void rtc_write(struct omap_rtc *rtc, unsigned int reg, u8 val)
 127 {
 128         writeb(val, rtc->base + reg);
 129 }
 130
 131 static inline void rtc_writel(struct omap_rtc *rtc, unsigned int reg, u32 val)
 132 {
 133         writel(val, rtc->base + reg);
 134 }
 135
 136 /* we rely on the rtc framework to handle locking (rtc->ops_lock),
 137  * so the only other requirement is that register accesses which
 138  * require BUSY to be clear are made with IRQs locally disabled
 139  */
 140 static void rtc_wait_not_busy(struct omap_rtc *rtc)
 141 {
 142         int     count = 0;
 143         u8      status;
 144
 145         /* BUSY may stay active for 1/32768 second (~30 usec) */
 146         for (count = 0; count < 50; count++) {
 147                 status = rtc_read(rtc, OMAP_RTC_STATUS_REG);
 148                 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
 149                         break;
 150                 udelay(1);
 151         }
 152         /* now we have ~15 usec to read/write various registers */
 153 }
 154
 155 static irqreturn_t rtc_irq(int irq, void *dev_id)
 156 {
 157         struct omap_rtc         *rtc = dev_id;
 158         unsigned long           events = 0;
 159         u8                      irq_data;
 160
 161         irq_data = rtc_read(rtc, OMAP_RTC_STATUS_REG);
 162
 163         /* alarm irq? */
 164         if (irq_data & OMAP_RTC_STATUS_ALARM) {
 165                 rtc_write(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM);
 166                 events |= RTC_IRQF | RTC_AF;
 167         }
 168
 169         /* 1/sec periodic/update irq? */
 170         if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
 171                 events |= RTC_IRQF | RTC_UF;
 172
 173         rtc_update_irq(rtc->rtc, 1, events);
 174
 175         return IRQ_HANDLED;
 176 }
 177
 178 static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 179 {
 180         struct omap_rtc *rtc = dev_get_drvdata(dev);
 181         u8 reg, irqwake_reg = 0;
 182
 183         local_irq_disable();
 184         rtc_wait_not_busy(rtc);
 185         reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
 186         if (rtc->type->has_irqwakeen)
 187                 irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
 188
 189         if (enabled) {
 190                 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
 191                 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
 192         } else {
 193                 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
 194                 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
 195         }
 196         rtc_wait_not_busy(rtc);
 197         rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
 198         if (rtc->type->has_irqwakeen)
 199                 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
 200         local_irq_enable();
 201
 202         return 0;
 203 }
 204
 205 /* this hardware doesn't support "don't care" alarm fields */
 206 static int tm2bcd(struct rtc_time *tm)
 207 {
 208         if (rtc_valid_tm(tm) != 0)
 209                 return -EINVAL;
 210
 211         tm->tm_sec = bin2bcd(tm->tm_sec);
 212         tm->tm_min = bin2bcd(tm->tm_min);
 213         tm->tm_hour = bin2bcd(tm->tm_hour);
 214         tm->tm_mday = bin2bcd(tm->tm_mday);
 215
 216         tm->tm_mon = bin2bcd(tm->tm_mon + 1);
 217
 218         /* epoch == 1900 */
 219         if (tm->tm_year < 100 || tm->tm_year > 199)
 220                 return -EINVAL;
 221         tm->tm_year = bin2bcd(tm->tm_year - 100);
 222
 223         return 0;
 224 }
 225
 226 static void bcd2tm(struct rtc_time *tm)
 227 {
 228         tm->tm_sec = bcd2bin(tm->tm_sec);
 229         tm->tm_min = bcd2bin(tm->tm_min);
 230         tm->tm_hour = bcd2bin(tm->tm_hour);
 231         tm->tm_mday = bcd2bin(tm->tm_mday);
 232         tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
 233         /* epoch == 1900 */
 234         tm->tm_year = bcd2bin(tm->tm_year) + 100;
 235 }
 236
 237 static void omap_rtc_read_time_raw(struct omap_rtc *rtc, struct rtc_time *tm)
 238 {
 239         tm->tm_sec = rtc_read(rtc, OMAP_RTC_SECONDS_REG);
 240         tm->tm_min = rtc_read(rtc, OMAP_RTC_MINUTES_REG);
 241         tm->tm_hour = rtc_read(rtc, OMAP_RTC_HOURS_REG);
 242         tm->tm_mday = rtc_read(rtc, OMAP_RTC_DAYS_REG);
 243         tm->tm_mon = rtc_read(rtc, OMAP_RTC_MONTHS_REG);
 244         tm->tm_year = rtc_read(rtc, OMAP_RTC_YEARS_REG);
 245 }
 246
 247 static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
 248 {
 249         struct omap_rtc *rtc = dev_get_drvdata(dev);
 250
 251         /* we don't report wday/yday/isdst ... */
 252         local_irq_disable();
 253         rtc_wait_not_busy(rtc);
 254         omap_rtc_read_time_raw(rtc, tm);
 255         local_irq_enable();
 256
 257         bcd2tm(tm);
 258         return 0;
 259 }
 260
 261 static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
 262 {
 263         struct omap_rtc *rtc = dev_get_drvdata(dev);
 264
 265         if (tm2bcd(tm) < 0)
 266                 return -EINVAL;
 267         local_irq_disable();
 268         rtc_wait_not_busy(rtc);
 269
 270         rtc_write(rtc, OMAP_RTC_YEARS_REG, tm->tm_year);
 271         rtc_write(rtc, OMAP_RTC_MONTHS_REG, tm->tm_mon);
 272         rtc_write(rtc, OMAP_RTC_DAYS_REG, tm->tm_mday);
 273         rtc_write(rtc, OMAP_RTC_HOURS_REG, tm->tm_hour);
 274         rtc_write(rtc, OMAP_RTC_MINUTES_REG, tm->tm_min);
 275         rtc_write(rtc, OMAP_RTC_SECONDS_REG, tm->tm_sec);
 276
 277         local_irq_enable();
 278
 279         return 0;
 280 }
 281
 282 static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
 283 {
 284         struct omap_rtc *rtc = dev_get_drvdata(dev);
 285
 286         local_irq_disable();
 287         rtc_wait_not_busy(rtc);
 288
 289         alm->time.tm_sec = rtc_read(rtc, OMAP_RTC_ALARM_SECONDS_REG);
 290         alm->time.tm_min = rtc_read(rtc, OMAP_RTC_ALARM_MINUTES_REG);
 291         alm->time.tm_hour = rtc_read(rtc, OMAP_RTC_ALARM_HOURS_REG);
 292         alm->time.tm_mday = rtc_read(rtc, OMAP_RTC_ALARM_DAYS_REG);
 293         alm->time.tm_mon = rtc_read(rtc, OMAP_RTC_ALARM_MONTHS_REG);
 294         alm->time.tm_year = rtc_read(rtc, OMAP_RTC_ALARM_YEARS_REG);
 295
 296         local_irq_enable();
 297
 298         bcd2tm(&alm->time);
 299         alm->enabled = !!(rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG)
 300                         & OMAP_RTC_INTERRUPTS_IT_ALARM);
 301
 302         return 0;
 303 }
 304
 305 static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
 306 {
 307         struct omap_rtc *rtc = dev_get_drvdata(dev);
 308         u8 reg, irqwake_reg = 0;
 309
 310         if (tm2bcd(&alm->time) < 0)
 311                 return -EINVAL;
 312
 313         local_irq_disable();
 314         rtc_wait_not_busy(rtc);
 315
 316         rtc_write(rtc, OMAP_RTC_ALARM_YEARS_REG, alm->time.tm_year);
 317         rtc_write(rtc, OMAP_RTC_ALARM_MONTHS_REG, alm->time.tm_mon);
 318         rtc_write(rtc, OMAP_RTC_ALARM_DAYS_REG, alm->time.tm_mday);
 319         rtc_write(rtc, OMAP_RTC_ALARM_HOURS_REG, alm->time.tm_hour);
 320         rtc_write(rtc, OMAP_RTC_ALARM_MINUTES_REG, alm->time.tm_min);
 321         rtc_write(rtc, OMAP_RTC_ALARM_SECONDS_REG, alm->time.tm_sec);
 322
 323         reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
 324         if (rtc->type->has_irqwakeen)
 325                 irqwake_reg = rtc_read(rtc, OMAP_RTC_IRQWAKEEN);
 326
 327         if (alm->enabled) {
 328                 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
 329                 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
 330         } else {
 331                 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
 332                 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
 333         }
 334         rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, reg);
 335         if (rtc->type->has_irqwakeen)
 336                 rtc_write(rtc, OMAP_RTC_IRQWAKEEN, irqwake_reg);
 337
 338         local_irq_enable();
 339
 340         return 0;
 341 }
 342
 343 static struct rtc_class_ops omap_rtc_ops = {
 344         .read_time      = omap_rtc_read_time,
 345         .set_time       = omap_rtc_set_time,
 346         .read_alarm     = omap_rtc_read_alarm,
 347         .set_alarm      = omap_rtc_set_alarm,
 348         .alarm_irq_enable = omap_rtc_alarm_irq_enable,
 349 };
 350
 351 static const struct omap_rtc_device_type omap_rtc_default_type = {
 352         .has_power_up_reset = true,
 353 };
 354
 355 static const struct omap_rtc_device_type omap_rtc_am3352_type = {
 356         .has_32kclk_en  = true,
 357         .has_kicker     = true,
 358         .has_irqwakeen  = true,
 359 };
 360
 361 static const struct omap_rtc_device_type omap_rtc_da830_type = {
 362         .has_kicker     = true,
 363 };
 364
 365 static const struct platform_device_id omap_rtc_id_table[] = {
 366         {
 367                 .name   = "omap_rtc",
 368                 .driver_data = (kernel_ulong_t)&omap_rtc_default_type,
 369         }, {
 370                 .name   = "am3352-rtc",
 371                 .driver_data = (kernel_ulong_t)&omap_rtc_am3352_type,
 372         }, {
 373                 .name   = "da830-rtc",
 374                 .driver_data = (kernel_ulong_t)&omap_rtc_da830_type,
 375         }, {
 376                 /* sentinel */
 377         }
 378 };
 379 MODULE_DEVICE_TABLE(platform, omap_rtc_id_table);
 380
 381 static const struct of_device_id omap_rtc_of_match[] = {
 382         {
 383                 .compatible     = "ti,am3352-rtc",
 384                 .data           = &omap_rtc_am3352_type,
 385         }, {
 386                 .compatible     = "ti,da830-rtc",
 387                 .data           = &omap_rtc_da830_type,
 388         }, {
 389                 /* sentinel */
 390         }
 391 };
 392 MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
 393
 394 static int __init omap_rtc_probe(struct platform_device *pdev)
 395 {
 396         struct omap_rtc         *rtc;
 397         struct resource         *res;
 398         u8                      reg, mask, new_ctrl;
 399         const struct platform_device_id *id_entry;
 400         const struct of_device_id *of_id;
 401         int ret;
 402
 403         rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
 404         if (!rtc)
 405                 return -ENOMEM;
 406
 407         of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
 408         if (of_id) {
 409                 rtc->type = of_id->data;
 410         } else {
 411                 id_entry = platform_get_device_id(pdev);
 412                 rtc->type = (void *)id_entry->driver_data;
 413         }
 414
 415         rtc->irq_timer = platform_get_irq(pdev, 0);
 416         if (rtc->irq_timer <= 0)
 417                 return -ENOENT;
 418
 419         rtc->irq_alarm = platform_get_irq(pdev, 1);
 420         if (rtc->irq_alarm <= 0)
 421                 return -ENOENT;
 422
 423         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 424         rtc->base = devm_ioremap_resource(&pdev->dev, res);
 425         if (IS_ERR(rtc->base))
 426                 return PTR_ERR(rtc->base);
 427
 428         platform_set_drvdata(pdev, rtc);
 429
 430         /* Enable the clock/module so that we can access the registers */
 431         pm_runtime_enable(&pdev->dev);
 432         pm_runtime_get_sync(&pdev->dev);
 433
 434         if (rtc->type->has_kicker) {
 435                 rtc_writel(rtc, OMAP_RTC_KICK0_REG, KICK0_VALUE);
 436                 rtc_writel(rtc, OMAP_RTC_KICK1_REG, KICK1_VALUE);
 437         }
 438
 439         /*
 440          * disable interrupts
 441          *
 442          * NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used
 443          */
 444         rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
 445
 446         /* enable RTC functional clock */
 447         if (rtc->type->has_32kclk_en) {
 448                 reg = rtc_read(rtc, OMAP_RTC_OSC_REG);
 449                 rtc_writel(rtc, OMAP_RTC_OSC_REG,
 450                                 reg | OMAP_RTC_OSC_32KCLK_EN);
 451         }
 452
 453         /* clear old status */
 454         reg = rtc_read(rtc, OMAP_RTC_STATUS_REG);
 455
 456         mask = OMAP_RTC_STATUS_ALARM;
 457
 458         if (rtc->type->has_power_up_reset) {
 459                 mask |= OMAP_RTC_STATUS_POWER_UP;
 460                 if (reg & OMAP_RTC_STATUS_POWER_UP)
 461                         dev_info(&pdev->dev, "RTC power up reset detected\n");
 462         }
 463
 464         if (reg & mask)
 465                 rtc_write(rtc, OMAP_RTC_STATUS_REG, reg & mask);
 466
 467         /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
 468         reg = rtc_read(rtc, OMAP_RTC_CTRL_REG);
 469         if (reg & (u8) OMAP_RTC_CTRL_STOP)
 470                 dev_info(&pdev->dev, "already running\n");
 471
 472         /* force to 24 hour mode */
 473         new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
 474         new_ctrl |= OMAP_RTC_CTRL_STOP;
 475
 476         /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
 477          *
 478          *  - Device wake-up capability setting should come through chip
 479          *    init logic. OMAP1 boards should initialize the "wakeup capable"
 480          *    flag in the platform device if the board is wired right for
 481          *    being woken up by RTC alarm. For OMAP-L138, this capability
 482          *    is built into the SoC by the "Deep Sleep" capability.
 483          *
 484          *  - Boards wired so RTC_ON_nOFF is used as the reset signal,
 485          *    rather than nPWRON_RESET, should forcibly enable split
 486          *    power mode.  (Some chip errata report that RTC_CTRL_SPLIT
 487          *    is write-only, and always reads as zero...)
 488          */
 489
 490         if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
 491                 dev_info(&pdev->dev, "split power mode\n");
 492
 493         if (reg != new_ctrl)
 494                 rtc_write(rtc, OMAP_RTC_CTRL_REG, new_ctrl);
 495
 496         device_init_wakeup(&pdev->dev, true);
 497
 498         rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
 499                         &omap_rtc_ops, THIS_MODULE);
 500         if (IS_ERR(rtc->rtc)) {
 501                 ret = PTR_ERR(rtc->rtc);
 502                 goto err;
 503         }
 504
 505         /* handle periodic and alarm irqs */
 506         ret = devm_request_irq(&pdev->dev, rtc->irq_timer, rtc_irq, 0,
 507                         dev_name(&rtc->rtc->dev), rtc);
 508         if (ret)
 509                 goto err;
 510
 511         if (rtc->irq_timer != rtc->irq_alarm) {
 512                 ret = devm_request_irq(&pdev->dev, rtc->irq_alarm, rtc_irq, 0,
 513                                 dev_name(&rtc->rtc->dev), rtc);
 514                 if (ret)
 515                         goto err;
 516         }
 517
 518         return 0;
 519
 520 err:
 521         device_init_wakeup(&pdev->dev, false);
 522         if (rtc->type->has_kicker)
 523                 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
 524         pm_runtime_put_sync(&pdev->dev);
 525         pm_runtime_disable(&pdev->dev);
 526
 527         return ret;
 528 }
 529
 530 static int __exit omap_rtc_remove(struct platform_device *pdev)
 531 {
 532         struct omap_rtc *rtc = platform_get_drvdata(pdev);
 533
 534         device_init_wakeup(&pdev->dev, 0);
 535
 536         /* leave rtc running, but disable irqs */
 537         rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
 538
 539         if (rtc->type->has_kicker)
 540                 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0);
 541
 542         /* Disable the clock/module */
 543         pm_runtime_put_sync(&pdev->dev);
 544         pm_runtime_disable(&pdev->dev);
 545
 546         return 0;
 547 }
 548
 549 #ifdef CONFIG_PM_SLEEP
 550 static int omap_rtc_suspend(struct device *dev)
 551 {
 552         struct omap_rtc *rtc = dev_get_drvdata(dev);
 553
 554         rtc->interrupts_reg = rtc_read(rtc, OMAP_RTC_INTERRUPTS_REG);
 555
 556         /* FIXME the RTC alarm is not currently acting as a wakeup event
 557          * source on some platforms, and in fact this enable() call is just
 558          * saving a flag that's never used...
 559          */
 560         if (device_may_wakeup(dev))
 561                 enable_irq_wake(rtc->irq_alarm);
 562         else
 563                 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
 564
 565         /* Disable the clock/module */
 566         pm_runtime_put_sync(dev);
 567
 568         return 0;
 569 }
 570
 571 static int omap_rtc_resume(struct device *dev)
 572 {
 573         struct omap_rtc *rtc = dev_get_drvdata(dev);
 574
 575         /* Enable the clock/module so that we can access the registers */
 576         pm_runtime_get_sync(dev);
 577
 578         if (device_may_wakeup(dev))
 579                 disable_irq_wake(rtc->irq_alarm);
 580         else
 581                 rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, rtc->interrupts_reg);
 582
 583         return 0;
 584 }
 585 #endif
 586
 587 static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume);
 588
 589 static void omap_rtc_shutdown(struct platform_device *pdev)
 590 {
 591         struct omap_rtc *rtc = platform_get_drvdata(pdev);
 592
 593         rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
 594 }
 595
 596 static struct platform_driver omap_rtc_driver = {
 597         .remove         = __exit_p(omap_rtc_remove),
 598         .shutdown       = omap_rtc_shutdown,
 599         .driver         = {
 600                 .name   = "omap_rtc",
 601                 .owner  = THIS_MODULE,
 602                 .pm     = &omap_rtc_pm_ops,
 603                 .of_match_table = omap_rtc_of_match,
 604         },
 605         .id_table       = omap_rtc_id_table,
 606 };
 607
 608 module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
 609
 610 MODULE_ALIAS("platform:omap_rtc");
 611 MODULE_AUTHOR("George G. Davis (and others)");
 612 MODULE_LICENSE("GPL");