drivers/soc/fsl/qbman/qman_portal.c

   1 /* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
   2  *
   3  * Redistribution and use in source and binary forms, with or without
   4  * modification, are permitted provided that the following conditions are met:
   5  *     * Redistributions of source code must retain the above copyright
   6  *       notice, this list of conditions and the following disclaimer.
   7  *     * Redistributions in binary form must reproduce the above copyright
   8  *       notice, this list of conditions and the following disclaimer in the
   9  *       documentation and/or other materials provided with the distribution.
  10  *     * Neither the name of Freescale Semiconductor nor the
  11  *       names of its contributors may be used to endorse or promote products
  12  *       derived from this software without specific prior written permission.
  13  *
  14  * ALTERNATIVELY, this software may be distributed under the terms of the
  15  * GNU General Public License ("GPL") as published by the Free Software
  16  * Foundation, either version 2 of that License or (at your option) any
  17  * later version.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  20  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  22  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  23  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  26  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29  */
  30
  31 #include "qman_priv.h"
  32
  33 /* Enable portal interupts (as opposed to polling mode) */
  34 #define CONFIG_FSL_DPA_PIRQ_SLOW  1
  35 #define CONFIG_FSL_DPA_PIRQ_FAST  1
  36
  37 static struct cpumask portal_cpus;
  38 /* protect qman global registers and global data shared among portals */
  39 static DEFINE_SPINLOCK(qman_lock);
  40
  41 static void portal_set_cpu(struct qm_portal_config *pcfg, int cpu)
  42 {
  43 #ifdef CONFIG_FSL_PAMU
  44         struct device *dev = pcfg->dev;
  45         int window_count = 1;
  46         struct iommu_domain_geometry geom_attr;
  47         struct pamu_stash_attribute stash_attr;
  48         int ret;
  49
  50         pcfg->iommu_domain = iommu_domain_alloc(&platform_bus_type);
  51         if (!pcfg->iommu_domain) {
  52                 dev_err(dev, "%s(): iommu_domain_alloc() failed", __func__);
  53                 goto no_iommu;
  54         }
  55         geom_attr.aperture_start = 0;
  56         geom_attr.aperture_end =
  57                 ((dma_addr_t)1 << min(8 * sizeof(dma_addr_t), (size_t)36)) - 1;
  58         geom_attr.force_aperture = true;
  59         ret = iommu_domain_set_attr(pcfg->iommu_domain, DOMAIN_ATTR_GEOMETRY,
  60                                     &geom_attr);
  61         if (ret < 0) {
  62                 dev_err(dev, "%s(): iommu_domain_set_attr() = %d", __func__,
  63                         ret);
  64                 goto out_domain_free;
  65         }
  66         ret = iommu_domain_set_attr(pcfg->iommu_domain, DOMAIN_ATTR_WINDOWS,
  67                                     &window_count);
  68         if (ret < 0) {
  69                 dev_err(dev, "%s(): iommu_domain_set_attr() = %d", __func__,
  70                         ret);
  71                 goto out_domain_free;
  72         }
  73         stash_attr.cpu = cpu;
  74         stash_attr.cache = PAMU_ATTR_CACHE_L1;
  75         ret = iommu_domain_set_attr(pcfg->iommu_domain,
  76                                     DOMAIN_ATTR_FSL_PAMU_STASH,
  77                                     &stash_attr);
  78         if (ret < 0) {
  79                 dev_err(dev, "%s(): iommu_domain_set_attr() = %d",
  80                         __func__, ret);
  81                 goto out_domain_free;
  82         }
  83         ret = iommu_domain_window_enable(pcfg->iommu_domain, 0, 0, 1ULL << 36,
  84                                          IOMMU_READ | IOMMU_WRITE);
  85         if (ret < 0) {
  86                 dev_err(dev, "%s(): iommu_domain_window_enable() = %d",
  87                         __func__, ret);
  88                 goto out_domain_free;
  89         }
  90         ret = iommu_attach_device(pcfg->iommu_domain, dev);
  91         if (ret < 0) {
  92                 dev_err(dev, "%s(): iommu_device_attach() = %d", __func__,
  93                         ret);
  94                 goto out_domain_free;
  95         }
  96         ret = iommu_domain_set_attr(pcfg->iommu_domain,
  97                                     DOMAIN_ATTR_FSL_PAMU_ENABLE,
  98                                     &window_count);
  99         if (ret < 0) {
 100                 dev_err(dev, "%s(): iommu_domain_set_attr() = %d", __func__,
 101                         ret);
 102                 goto out_detach_device;
 103         }
 104
 105 no_iommu:
 106 #endif
 107         qman_set_sdest(pcfg->channel, cpu);
 108
 109         return;
 110
 111 #ifdef CONFIG_FSL_PAMU
 112 out_detach_device:
 113         iommu_detach_device(pcfg->iommu_domain, NULL);
 114 out_domain_free:
 115         iommu_domain_free(pcfg->iommu_domain);
 116         pcfg->iommu_domain = NULL;
 117 #endif
 118 }
 119
 120 static struct qman_portal *init_pcfg(struct qm_portal_config *pcfg)
 121 {
 122         struct qman_portal *p;
 123         u32 irq_sources = 0;
 124
 125         /* We need the same LIODN offset for all portals */
 126         qman_liodn_fixup(pcfg->channel);
 127
 128         pcfg->iommu_domain = NULL;
 129         portal_set_cpu(pcfg, pcfg->cpu);
 130
 131         p = qman_create_affine_portal(pcfg, NULL);
 132         if (!p) {
 133                 dev_crit(pcfg->dev, "%s: Portal failure on cpu %d\n",
 134                          __func__, pcfg->cpu);
 135                 return NULL;
 136         }
 137
 138         /* Determine what should be interrupt-vs-poll driven */
 139 #ifdef CONFIG_FSL_DPA_PIRQ_SLOW
 140         irq_sources |= QM_PIRQ_EQCI | QM_PIRQ_EQRI | QM_PIRQ_MRI |
 141                        QM_PIRQ_CSCI;
 142 #endif
 143 #ifdef CONFIG_FSL_DPA_PIRQ_FAST
 144         irq_sources |= QM_PIRQ_DQRI;
 145 #endif
 146         qman_p_irqsource_add(p, irq_sources);
 147
 148         spin_lock(&qman_lock);
 149         if (cpumask_equal(&portal_cpus, cpu_possible_mask)) {
 150                 /* all assigned portals are initialized now */
 151                 qman_init_cgr_all();
 152         }
 153         spin_unlock(&qman_lock);
 154
 155         dev_info(pcfg->dev, "Portal initialised, cpu %d\n", pcfg->cpu);
 156
 157         return p;
 158 }
 159
 160 static void qman_portal_update_sdest(const struct qm_portal_config *pcfg,
 161                                                         unsigned int cpu)
 162 {
 163 #ifdef CONFIG_FSL_PAMU /* TODO */
 164         struct pamu_stash_attribute stash_attr;
 165         int ret;
 166
 167         if (pcfg->iommu_domain) {
 168                 stash_attr.cpu = cpu;
 169                 stash_attr.cache = PAMU_ATTR_CACHE_L1;
 170                 ret = iommu_domain_set_attr(pcfg->iommu_domain,
 171                                 DOMAIN_ATTR_FSL_PAMU_STASH, &stash_attr);
 172                 if (ret < 0) {
 173                         dev_err(pcfg->dev,
 174                                 "Failed to update pamu stash setting\n");
 175                         return;
 176                 }
 177         }
 178 #endif
 179         qman_set_sdest(pcfg->channel, cpu);
 180 }
 181
 182 static void qman_offline_cpu(unsigned int cpu)
 183 {
 184         struct qman_portal *p;
 185         const struct qm_portal_config *pcfg;
 186
 187         p = affine_portals[cpu];
 188         if (p) {
 189                 pcfg = qman_get_qm_portal_config(p);
 190                 if (pcfg) {
 191                         irq_set_affinity(pcfg->irq, cpumask_of(0));
 192                         qman_portal_update_sdest(pcfg, 0);
 193                 }
 194         }
 195 }
 196
 197 static void qman_online_cpu(unsigned int cpu)
 198 {
 199         struct qman_portal *p;
 200         const struct qm_portal_config *pcfg;
 201
 202         p = affine_portals[cpu];
 203         if (p) {
 204                 pcfg = qman_get_qm_portal_config(p);
 205                 if (pcfg) {
 206                         irq_set_affinity(pcfg->irq, cpumask_of(cpu));
 207                         qman_portal_update_sdest(pcfg, cpu);
 208                 }
 209         }
 210 }
 211
 212 static int qman_hotplug_cpu_callback(struct notifier_block *nfb,
 213                                      unsigned long action, void *hcpu)
 214 {
 215         unsigned int cpu = (unsigned long)hcpu;
 216
 217         switch (action) {
 218         case CPU_ONLINE:
 219         case CPU_ONLINE_FROZEN:
 220                 qman_online_cpu(cpu);
 221                 break;
 222         case CPU_DOWN_PREPARE:
 223         case CPU_DOWN_PREPARE_FROZEN:
 224                 qman_offline_cpu(cpu);
 225         default:
 226                 break;
 227         }
 228         return NOTIFY_OK;
 229 }
 230
 231 static struct notifier_block qman_hotplug_cpu_notifier = {
 232         .notifier_call = qman_hotplug_cpu_callback,
 233 };
 234
 235 static int qman_portal_probe(struct platform_device *pdev)
 236 {
 237         struct device *dev = &pdev->dev;
 238         struct device_node *node = dev->of_node;
 239         struct qm_portal_config *pcfg;
 240         struct resource *addr_phys[2];
 241         const u32 *channel;
 242         void __iomem *va;
 243         int irq, len, cpu;
 244
 245         pcfg = devm_kmalloc(dev, sizeof(*pcfg), GFP_KERNEL);
 246         if (!pcfg)
 247                 return -ENOMEM;
 248
 249         pcfg->dev = dev;
 250
 251         addr_phys[0] = platform_get_resource(pdev, IORESOURCE_MEM,
 252                                              DPAA_PORTAL_CE);
 253         if (!addr_phys[0]) {
 254                 dev_err(dev, "Can't get %s property 'reg::CE'\n",
 255                         node->full_name);
 256                 return -ENXIO;
 257         }
 258
 259         addr_phys[1] = platform_get_resource(pdev, IORESOURCE_MEM,
 260                                              DPAA_PORTAL_CI);
 261         if (!addr_phys[1]) {
 262                 dev_err(dev, "Can't get %s property 'reg::CI'\n",
 263                         node->full_name);
 264                 return -ENXIO;
 265         }
 266
 267         channel = of_get_property(node, "cell-index", &len);
 268         if (!channel || (len != 4)) {
 269                 dev_err(dev, "Can't get %s property 'cell-index'\n",
 270                         node->full_name);
 271                 return -ENXIO;
 272         }
 273         pcfg->channel = *channel;
 274         pcfg->cpu = -1;
 275         irq = platform_get_irq(pdev, 0);
 276         if (irq <= 0) {
 277                 dev_err(dev, "Can't get %s IRQ\n", node->full_name);
 278                 return -ENXIO;
 279         }
 280         pcfg->irq = irq;
 281
 282         va = ioremap_prot(addr_phys[0]->start, resource_size(addr_phys[0]), 0);
 283         if (!va)
 284                 goto err_ioremap1;
 285
 286         pcfg->addr_virt[DPAA_PORTAL_CE] = va;
 287
 288         va = ioremap_prot(addr_phys[1]->start, resource_size(addr_phys[1]),
 289                           _PAGE_GUARDED | _PAGE_NO_CACHE);
 290         if (!va)
 291                 goto err_ioremap2;
 292
 293         pcfg->addr_virt[DPAA_PORTAL_CI] = va;
 294
 295         pcfg->pools = qm_get_pools_sdqcr();
 296
 297         spin_lock(&qman_lock);
 298         cpu = cpumask_next_zero(-1, &portal_cpus);
 299         if (cpu >= nr_cpu_ids) {
 300                 /* unassigned portal, skip init */
 301                 spin_unlock(&qman_lock);
 302                 return 0;
 303         }
 304
 305         cpumask_set_cpu(cpu, &portal_cpus);
 306         spin_unlock(&qman_lock);
 307         pcfg->cpu = cpu;
 308
 309         if (!init_pcfg(pcfg))
 310                 goto err_ioremap2;
 311
 312         /* clear irq affinity if assigned cpu is offline */
 313         if (!cpu_online(cpu))
 314                 qman_offline_cpu(cpu);
 315
 316         return 0;
 317
 318 err_ioremap2:
 319         iounmap(pcfg->addr_virt[DPAA_PORTAL_CE]);
 320 err_ioremap1:
 321         dev_err(dev, "ioremap failed\n");
 322         return -ENXIO;
 323 }
 324
 325 static const struct of_device_id qman_portal_ids[] = {
 326         {
 327                 .compatible = "fsl,qman-portal",
 328         },
 329         {}
 330 };
 331 MODULE_DEVICE_TABLE(of, qman_portal_ids);
 332
 333 static struct platform_driver qman_portal_driver = {
 334         .driver = {
 335                 .name = KBUILD_MODNAME,
 336                 .of_match_table = qman_portal_ids,
 337         },
 338         .probe = qman_portal_probe,
 339 };
 340
 341 static int __init qman_portal_driver_register(struct platform_driver *drv)
 342 {
 343         int ret;
 344
 345         ret = platform_driver_register(drv);
 346         if (ret < 0)
 347                 return ret;
 348
 349         register_hotcpu_notifier(&qman_hotplug_cpu_notifier);
 350
 351         return 0;
 352 }
 353
 354 module_driver(qman_portal_driver,
 355               qman_portal_driver_register, platform_driver_unregister);