2 comedi/drivers/jr3_pci.c
3 hardware driver for JR3/PCI force sensor board
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2007 Anders Blomdell <anders.blomdell@control.lth.se>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
20 * Description: JR3/PCI force sensor board
21 * Author: Anders Blomdell <anders.blomdell@control.lth.se>
22 * Updated: Thu, 01 Nov 2012 17:34:55 +0000
24 * Devices: [JR3] PCI force sensor board (jr3_pci)
26 * Configuration options:
29 * Manual configuration of comedi devices is not supported by this
30 * driver; supported PCI devices are configured as comedi devices
33 * The DSP on the board requires initialization code, which can be
34 * loaded by placing it in /lib/firmware/comedi. The initialization
35 * code should be somewhere on the media you got with your card. One
36 * version is available from http://www.comedi.org in the
37 * comedi_nonfree_firmware tarball. The file is called "jr3pci.idm".
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/delay.h>
43 #include <linux/ctype.h>
44 #include <linux/jiffies.h>
45 #include <linux/slab.h>
46 #include <linux/timer.h>
48 #include "../comedi_pci.h"
52 #define PCI_VENDOR_ID_JR3 0x1762
54 enum jr3_pci_boardid {
61 struct jr3_pci_board {
66 static const struct jr3_pci_board jr3_pci_boards[] = {
85 struct jr3_pci_transform {
92 struct jr3_pci_poll_delay {
97 struct jr3_pci_dev_private {
98 struct jr3_t __iomem *iobase;
99 struct timer_list timer;
102 struct jr3_pci_subdev_private {
103 struct jr3_channel __iomem *channel;
104 unsigned long next_time_min;
105 unsigned long next_time_max;
106 enum { state_jr3_poll,
107 state_jr3_init_wait_for_offset,
108 state_jr3_init_transform_complete,
109 state_jr3_init_set_full_scale_complete,
110 state_jr3_init_use_offset_complete,
117 struct comedi_krange range;
119 const struct comedi_lrange *range_table_list[8 * 7 + 2];
120 unsigned int maxdata_list[8 * 7 + 2];
125 static struct jr3_pci_poll_delay poll_delay_min_max(int min, int max)
127 struct jr3_pci_poll_delay result;
134 static int is_complete(struct jr3_channel __iomem *channel)
136 return get_s16(&channel->command_word0) == 0;
139 static void set_transforms(struct jr3_channel __iomem *channel,
140 struct jr3_pci_transform transf, short num)
144 num &= 0x000f; /* Make sure that 0 <= num <= 15 */
145 for (i = 0; i < 8; i++) {
146 set_u16(&channel->transforms[num].link[i].link_type,
147 transf.link[i].link_type);
149 set_s16(&channel->transforms[num].link[i].link_amount,
150 transf.link[i].link_amount);
152 if (transf.link[i].link_type == end_x_form)
157 static void use_transform(struct jr3_channel __iomem *channel,
160 set_s16(&channel->command_word0, 0x0500 + (transf_num & 0x000f));
163 static void use_offset(struct jr3_channel __iomem *channel, short offset_num)
165 set_s16(&channel->command_word0, 0x0600 + (offset_num & 0x000f));
168 static void set_offset(struct jr3_channel __iomem *channel)
170 set_s16(&channel->command_word0, 0x0700);
182 static void set_full_scales(struct jr3_channel __iomem *channel,
183 struct six_axis_t full_scale)
185 set_s16(&channel->full_scale.fx, full_scale.fx);
186 set_s16(&channel->full_scale.fy, full_scale.fy);
187 set_s16(&channel->full_scale.fz, full_scale.fz);
188 set_s16(&channel->full_scale.mx, full_scale.mx);
189 set_s16(&channel->full_scale.my, full_scale.my);
190 set_s16(&channel->full_scale.mz, full_scale.mz);
191 set_s16(&channel->command_word0, 0x0a00);
194 static struct six_axis_t get_min_full_scales(struct jr3_channel __iomem
197 struct six_axis_t result;
199 result.fx = get_s16(&channel->min_full_scale.fx);
200 result.fy = get_s16(&channel->min_full_scale.fy);
201 result.fz = get_s16(&channel->min_full_scale.fz);
202 result.mx = get_s16(&channel->min_full_scale.mx);
203 result.my = get_s16(&channel->min_full_scale.my);
204 result.mz = get_s16(&channel->min_full_scale.mz);
208 static struct six_axis_t get_max_full_scales(struct jr3_channel __iomem
211 struct six_axis_t result;
213 result.fx = get_s16(&channel->max_full_scale.fx);
214 result.fy = get_s16(&channel->max_full_scale.fy);
215 result.fz = get_s16(&channel->max_full_scale.fz);
216 result.mx = get_s16(&channel->max_full_scale.mx);
217 result.my = get_s16(&channel->max_full_scale.my);
218 result.mz = get_s16(&channel->max_full_scale.mz);
222 static unsigned int jr3_pci_ai_read_chan(struct comedi_device *dev,
223 struct comedi_subdevice *s,
226 struct jr3_pci_subdev_private *spriv = s->private;
227 unsigned int val = 0;
229 if (spriv->state != state_jr3_done)
233 unsigned int axis = chan % 8;
234 unsigned filter = chan / 8;
238 val = get_s16(&spriv->channel->filter[filter].fx);
241 val = get_s16(&spriv->channel->filter[filter].fy);
244 val = get_s16(&spriv->channel->filter[filter].fz);
247 val = get_s16(&spriv->channel->filter[filter].mx);
250 val = get_s16(&spriv->channel->filter[filter].my);
253 val = get_s16(&spriv->channel->filter[filter].mz);
256 val = get_s16(&spriv->channel->filter[filter].v1);
259 val = get_s16(&spriv->channel->filter[filter].v2);
263 } else if (chan == 56) {
264 val = get_u16(&spriv->channel->model_no);
265 } else if (chan == 57) {
266 val = get_u16(&spriv->channel->serial_no);
272 static int jr3_pci_ai_insn_read(struct comedi_device *dev,
273 struct comedi_subdevice *s,
274 struct comedi_insn *insn,
277 struct jr3_pci_subdev_private *spriv = s->private;
278 unsigned int chan = CR_CHAN(insn->chanspec);
285 errors = get_u16(&spriv->channel->errors);
286 if (spriv->state != state_jr3_done ||
287 (errors & (watch_dog | watch_dog2 | sensor_change))) {
288 /* No sensor or sensor changed */
289 if (spriv->state == state_jr3_done) {
290 /* Restart polling */
291 spriv->state = state_jr3_poll;
296 for (i = 0; i < insn->n; i++)
297 data[i] = jr3_pci_ai_read_chan(dev, s, chan);
302 static int jr3_pci_open(struct comedi_device *dev)
304 struct jr3_pci_subdev_private *spriv;
305 struct comedi_subdevice *s;
308 dev_dbg(dev->class_dev, "jr3_pci_open\n");
309 for (i = 0; i < dev->n_subdevices; i++) {
310 s = &dev->subdevices[i];
313 dev_dbg(dev->class_dev, "serial: %p %d (%d)\n",
314 spriv, spriv->serial_no, s->index);
319 static int read_idm_word(const u8 *data, size_t size, int *pos,
326 /* Skip over non hex */
327 for (; *pos < size && !isxdigit(data[*pos]); (*pos)++)
331 for (; *pos < size; (*pos)++) {
332 value = hex_to_bin(data[*pos]);
335 *val = (*val << 4) + value;
344 static int jr3_check_firmware(struct comedi_device *dev,
345 const u8 *data, size_t size)
351 * IDM file format is:
352 * { count, address, data <count> } *
356 unsigned int count = 0;
357 unsigned int addr = 0;
359 more = more && read_idm_word(data, size, &pos, &count);
360 if (more && count == 0xffff)
363 more = more && read_idm_word(data, size, &pos, &addr);
364 while (more && count > 0) {
365 unsigned int dummy = 0;
367 more = more && read_idm_word(data, size, &pos, &dummy);
375 static void jr3_write_firmware(struct comedi_device *dev,
376 int subdev, const u8 *data, size_t size)
378 struct jr3_pci_dev_private *devpriv = dev->private;
379 struct jr3_t __iomem *iobase = devpriv->iobase;
386 unsigned int count = 0;
387 unsigned int addr = 0;
389 more = more && read_idm_word(data, size, &pos, &count);
390 if (more && count == 0xffff)
393 more = more && read_idm_word(data, size, &pos, &addr);
395 dev_dbg(dev->class_dev, "Loading#%d %4.4x bytes at %4.4x\n",
396 subdev, count, addr);
398 while (more && count > 0) {
400 /* 16 bit data, never seen in real life!! */
401 unsigned int data1 = 0;
404 read_idm_word(data, size, &pos, &data1);
406 /* jr3[addr + 0x20000 * pnum] = data1; */
408 /* Download 24 bit program */
409 unsigned int data1 = 0;
410 unsigned int data2 = 0;
412 lo = &iobase->channel[subdev].program_lo[addr];
413 hi = &iobase->channel[subdev].program_hi[addr];
416 read_idm_word(data, size, &pos, &data1);
418 read_idm_word(data, size, &pos, &data2);
432 static int jr3_download_firmware(struct comedi_device *dev,
433 const u8 *data, size_t size,
434 unsigned long context)
439 /* verify IDM file format */
440 ret = jr3_check_firmware(dev, data, size);
444 /* write firmware to each subdevice */
445 for (subdev = 0; subdev < dev->n_subdevices; subdev++)
446 jr3_write_firmware(dev, subdev, data, size);
451 static struct jr3_pci_poll_delay jr3_pci_poll_subdevice(struct comedi_subdevice *s)
453 struct jr3_pci_subdev_private *spriv = s->private;
454 struct jr3_pci_poll_delay result = poll_delay_min_max(1000, 2000);
455 struct jr3_channel __iomem *channel;
464 channel = spriv->channel;
465 errors = get_u16(&channel->errors);
467 if (errors != spriv->errors)
468 spriv->errors = errors;
470 /* Sensor communication lost? force poll mode */
471 if (errors & (watch_dog | watch_dog2 | sensor_change))
472 spriv->state = state_jr3_poll;
474 switch (spriv->state) {
476 model_no = get_u16(&channel->model_no);
477 serial_no = get_u16(&channel->serial_no);
479 if ((errors & (watch_dog | watch_dog2)) ||
480 model_no == 0 || serial_no == 0) {
482 * Still no sensor, keep on polling.
483 * Since it takes up to 10 seconds for offsets to
484 * stabilize, polling each second should suffice.
488 spriv->state = state_jr3_init_wait_for_offset;
491 case state_jr3_init_wait_for_offset:
493 if (spriv->retries < 10) {
495 * Wait for offeset to stabilize
496 * (< 10 s according to manual)
499 struct jr3_pci_transform transf;
501 spriv->model_no = get_u16(&channel->model_no);
502 spriv->serial_no = get_u16(&channel->serial_no);
504 /* Transformation all zeros */
505 for (i = 0; i < ARRAY_SIZE(transf.link); i++) {
506 transf.link[i].link_type = (enum link_types)0;
507 transf.link[i].link_amount = 0;
510 set_transforms(channel, transf, 0);
511 use_transform(channel, 0);
512 spriv->state = state_jr3_init_transform_complete;
513 /* Allow 20 ms for completion */
514 result = poll_delay_min_max(20, 100);
517 case state_jr3_init_transform_complete:
518 if (!is_complete(channel)) {
519 result = poll_delay_min_max(20, 100);
522 struct six_axis_t min_full_scale;
523 struct six_axis_t max_full_scale;
525 min_full_scale = get_min_full_scales(channel);
526 max_full_scale = get_max_full_scales(channel);
527 set_full_scales(channel, max_full_scale);
529 spriv->state = state_jr3_init_set_full_scale_complete;
530 /* Allow 20 ms for completion */
531 result = poll_delay_min_max(20, 100);
534 case state_jr3_init_set_full_scale_complete:
535 if (!is_complete(channel)) {
536 result = poll_delay_min_max(20, 100);
538 struct force_array __iomem *fs = &channel->full_scale;
540 /* Use ranges in kN or we will overflow around 2000N! */
541 spriv->range[0].range.min = -get_s16(&fs->fx) * 1000;
542 spriv->range[0].range.max = get_s16(&fs->fx) * 1000;
543 spriv->range[1].range.min = -get_s16(&fs->fy) * 1000;
544 spriv->range[1].range.max = get_s16(&fs->fy) * 1000;
545 spriv->range[2].range.min = -get_s16(&fs->fz) * 1000;
546 spriv->range[2].range.max = get_s16(&fs->fz) * 1000;
547 spriv->range[3].range.min = -get_s16(&fs->mx) * 100;
548 spriv->range[3].range.max = get_s16(&fs->mx) * 100;
549 spriv->range[4].range.min = -get_s16(&fs->my) * 100;
550 spriv->range[4].range.max = get_s16(&fs->my) * 100;
551 spriv->range[5].range.min = -get_s16(&fs->mz) * 100;
552 /* the next five are questionable */
553 spriv->range[5].range.max = get_s16(&fs->mz) * 100;
554 spriv->range[6].range.min = -get_s16(&fs->v1) * 100;
555 spriv->range[6].range.max = get_s16(&fs->v1) * 100;
556 spriv->range[7].range.min = -get_s16(&fs->v2) * 100;
557 spriv->range[7].range.max = get_s16(&fs->v2) * 100;
558 spriv->range[8].range.min = 0;
559 spriv->range[8].range.max = 65535;
561 use_offset(channel, 0);
562 spriv->state = state_jr3_init_use_offset_complete;
563 /* Allow 40 ms for completion */
564 result = poll_delay_min_max(40, 100);
567 case state_jr3_init_use_offset_complete:
568 if (!is_complete(channel)) {
569 result = poll_delay_min_max(20, 100);
571 set_s16(&channel->offsets.fx, 0);
572 set_s16(&channel->offsets.fy, 0);
573 set_s16(&channel->offsets.fz, 0);
574 set_s16(&channel->offsets.mx, 0);
575 set_s16(&channel->offsets.my, 0);
576 set_s16(&channel->offsets.mz, 0);
580 spriv->state = state_jr3_done;
584 result = poll_delay_min_max(10000, 20000);
593 static void jr3_pci_poll_dev(unsigned long data)
595 struct comedi_device *dev = (struct comedi_device *)data;
596 struct jr3_pci_dev_private *devpriv = dev->private;
597 struct jr3_pci_subdev_private *spriv;
598 struct comedi_subdevice *s;
604 spin_lock_irqsave(&dev->spinlock, flags);
608 /* Poll all channels that are ready to be polled */
609 for (i = 0; i < dev->n_subdevices; i++) {
610 s = &dev->subdevices[i];
613 if (now > spriv->next_time_min) {
614 struct jr3_pci_poll_delay sub_delay;
616 sub_delay = jr3_pci_poll_subdevice(s);
618 spriv->next_time_min = jiffies +
619 msecs_to_jiffies(sub_delay.min);
620 spriv->next_time_max = jiffies +
621 msecs_to_jiffies(sub_delay.max);
623 if (sub_delay.max && sub_delay.max < delay)
625 * Wake up as late as possible ->
626 * poll as many channels as possible at once.
628 delay = sub_delay.max;
631 spin_unlock_irqrestore(&dev->spinlock, flags);
633 devpriv->timer.expires = jiffies + msecs_to_jiffies(delay);
634 add_timer(&devpriv->timer);
637 static struct jr3_pci_subdev_private *
638 jr3_pci_alloc_spriv(struct comedi_device *dev, struct comedi_subdevice *s)
640 struct jr3_pci_dev_private *devpriv = dev->private;
641 struct jr3_pci_subdev_private *spriv;
645 spriv = comedi_alloc_spriv(s, sizeof(*spriv));
649 spriv->channel = &devpriv->iobase->channel[s->index].data;
651 for (j = 0; j < 8; j++) {
652 spriv->range[j].length = 1;
653 spriv->range[j].range.min = -1000000;
654 spriv->range[j].range.max = 1000000;
656 for (k = 0; k < 7; k++) {
657 spriv->range_table_list[j + k * 8] =
658 (struct comedi_lrange *)&spriv->range[j];
659 spriv->maxdata_list[j + k * 8] = 0x7fff;
662 spriv->range[8].length = 1;
663 spriv->range[8].range.min = 0;
664 spriv->range[8].range.max = 65536;
666 spriv->range_table_list[56] = (struct comedi_lrange *)&spriv->range[8];
667 spriv->range_table_list[57] = (struct comedi_lrange *)&spriv->range[8];
668 spriv->maxdata_list[56] = 0xffff;
669 spriv->maxdata_list[57] = 0xffff;
671 dev_dbg(dev->class_dev, "p->channel %p %p (%tx)\n",
672 spriv->channel, devpriv->iobase,
673 ((char __iomem *)spriv->channel -
674 (char __iomem *)devpriv->iobase));
679 static int jr3_pci_auto_attach(struct comedi_device *dev,
680 unsigned long context)
682 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
683 static const struct jr3_pci_board *board;
684 struct jr3_pci_dev_private *devpriv;
685 struct jr3_pci_subdev_private *spriv;
686 struct comedi_subdevice *s;
690 if (sizeof(struct jr3_channel) != 0xc00) {
691 dev_err(dev->class_dev,
692 "sizeof(struct jr3_channel) = %x [expected %x]\n",
693 (unsigned)sizeof(struct jr3_channel), 0xc00);
697 if (context < ARRAY_SIZE(jr3_pci_boards))
698 board = &jr3_pci_boards[context];
701 dev->board_ptr = board;
702 dev->board_name = board->name;
704 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
708 ret = comedi_pci_enable(dev);
712 devpriv->iobase = pci_ioremap_bar(pcidev, 0);
713 if (!devpriv->iobase)
716 ret = comedi_alloc_subdevices(dev, board->n_subdevs);
720 dev->open = jr3_pci_open;
721 for (i = 0; i < dev->n_subdevices; i++) {
722 s = &dev->subdevices[i];
723 s->type = COMEDI_SUBD_AI;
724 s->subdev_flags = SDF_READABLE | SDF_GROUND;
725 s->n_chan = 8 * 7 + 2;
726 s->insn_read = jr3_pci_ai_insn_read;
728 spriv = jr3_pci_alloc_spriv(dev, s);
730 /* Channel specific range and maxdata */
731 s->range_table_list = spriv->range_table_list;
732 s->maxdata_list = spriv->maxdata_list;
737 writel(0, &devpriv->iobase->channel[0].reset);
739 ret = comedi_load_firmware(dev, &comedi_to_pci_dev(dev)->dev,
741 jr3_download_firmware, 0);
742 dev_dbg(dev->class_dev, "Firmare load %d\n", ret);
746 * TODO: use firmware to load preferred offset tables. Suggested
748 * model serial Fx Fy Fz Mx My Mz\n
750 * comedi_load_firmware(dev, &comedi_to_pci_dev(dev)->dev,
751 * "comedi/jr3_offsets_table",
752 * jr3_download_firmware, 1);
756 * It takes a few milliseconds for software to settle as much as we
757 * can read firmware version
759 msleep_interruptible(25);
760 for (i = 0; i < 0x18; i++) {
761 dev_dbg(dev->class_dev, "%c\n",
762 get_u16(&devpriv->iobase->channel[0].
763 data.copyright[i]) >> 8);
766 /* Start card timer */
767 for (i = 0; i < dev->n_subdevices; i++) {
768 s = &dev->subdevices[i];
771 spriv->next_time_min = jiffies + msecs_to_jiffies(500);
772 spriv->next_time_max = jiffies + msecs_to_jiffies(2000);
775 setup_timer(&devpriv->timer, jr3_pci_poll_dev, (unsigned long)dev);
776 devpriv->timer.expires = jiffies + msecs_to_jiffies(1000);
777 add_timer(&devpriv->timer);
782 static void jr3_pci_detach(struct comedi_device *dev)
784 struct jr3_pci_dev_private *devpriv = dev->private;
787 del_timer_sync(&devpriv->timer);
790 iounmap(devpriv->iobase);
792 comedi_pci_disable(dev);
795 static struct comedi_driver jr3_pci_driver = {
796 .driver_name = "jr3_pci",
797 .module = THIS_MODULE,
798 .auto_attach = jr3_pci_auto_attach,
799 .detach = jr3_pci_detach,
802 static int jr3_pci_pci_probe(struct pci_dev *dev,
803 const struct pci_device_id *id)
805 return comedi_pci_auto_config(dev, &jr3_pci_driver, id->driver_data);
808 static const struct pci_device_id jr3_pci_pci_table[] = {
809 { PCI_VDEVICE(JR3, 0x1111), BOARD_JR3_1 },
810 { PCI_VDEVICE(JR3, 0x3111), BOARD_JR3_1 },
811 { PCI_VDEVICE(JR3, 0x3112), BOARD_JR3_2 },
812 { PCI_VDEVICE(JR3, 0x3113), BOARD_JR3_3 },
813 { PCI_VDEVICE(JR3, 0x3114), BOARD_JR3_4 },
816 MODULE_DEVICE_TABLE(pci, jr3_pci_pci_table);
818 static struct pci_driver jr3_pci_pci_driver = {
820 .id_table = jr3_pci_pci_table,
821 .probe = jr3_pci_pci_probe,
822 .remove = comedi_pci_auto_unconfig,
824 module_comedi_pci_driver(jr3_pci_driver, jr3_pci_pci_driver);
826 MODULE_AUTHOR("Comedi http://www.comedi.org");
827 MODULE_DESCRIPTION("Comedi low-level driver");
828 MODULE_LICENSE("GPL");
829 MODULE_FIRMWARE("comedi/jr3pci.idm");