drivers/staging/comedi/drivers/ni_tiocmd.c

   1 /*
   2   comedi/drivers/ni_tiocmd.c
   3   Command support for NI general purpose counters
   4
   5   Copyright (C) 2006 Frank Mori Hess <fmhess@users.sourceforge.net>
   6
   7   This program is free software; you can redistribute it and/or modify
   8   it under the terms of the GNU General Public License as published by
   9   the Free Software Foundation; either version 2 of the License, or
  10   (at your option) any later version.
  11
  12   This program is distributed in the hope that it will be useful,
  13   but WITHOUT ANY WARRANTY; without even the implied warranty of
  14   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15   GNU General Public License for more details.
  16 */
  17
  18 /*
  19 Driver: ni_tiocmd
  20 Description: National Instruments general purpose counters command support
  21 Devices:
  22 Author: J.P. Mellor <jpmellor@rose-hulman.edu>,
  23         Herman.Bruyninckx@mech.kuleuven.ac.be,
  24         Wim.Meeussen@mech.kuleuven.ac.be,
  25         Klaas.Gadeyne@mech.kuleuven.ac.be,
  26         Frank Mori Hess <fmhess@users.sourceforge.net>
  27 Updated: Fri, 11 Apr 2008 12:32:35 +0100
  28 Status: works
  29
  30 This module is not used directly by end-users.  Rather, it
  31 is used by other drivers (for example ni_660x and ni_pcimio)
  32 to provide command support for NI's general purpose counters.
  33 It was originally split out of ni_tio.c to stop the 'ni_tio'
  34 module depending on the 'mite' module.
  35
  36 References:
  37 DAQ 660x Register-Level Programmer Manual  (NI 370505A-01)
  38 DAQ 6601/6602 User Manual (NI 322137B-01)
  39 340934b.pdf  DAQ-STC reference manual
  40
  41 */
  42 /*
  43 TODO:
  44         Support use of both banks X and Y
  45 */
  46
  47 #include <linux/module.h>
  48 #include "comedi_fc.h"
  49 #include "ni_tio_internal.h"
  50 #include "mite.h"
  51
  52 MODULE_AUTHOR("Comedi <comedi@comedi.org>");
  53 MODULE_DESCRIPTION("Comedi command support for NI general-purpose counters");
  54 MODULE_LICENSE("GPL");
  55
  56 static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
  57                                  short read_not_write)
  58 {
  59         struct ni_gpct_device *counter_dev = counter->counter_dev;
  60         unsigned input_select_bits = 0;
  61
  62         if (enable) {
  63                 if (read_not_write)
  64                         input_select_bits |= Gi_Read_Acknowledges_Irq;
  65                 else
  66                         input_select_bits |= Gi_Write_Acknowledges_Irq;
  67         }
  68         ni_tio_set_bits(counter,
  69                         NITIO_Gi_Input_Select_Reg(counter->counter_index),
  70                         Gi_Read_Acknowledges_Irq | Gi_Write_Acknowledges_Irq,
  71                         input_select_bits);
  72         switch (counter_dev->variant) {
  73         case ni_gpct_variant_e_series:
  74                 break;
  75         case ni_gpct_variant_m_series:
  76         case ni_gpct_variant_660x:
  77                 {
  78                         unsigned gi_dma_config_bits = 0;
  79
  80                         if (enable) {
  81                                 gi_dma_config_bits |= Gi_DMA_Enable_Bit;
  82                                 gi_dma_config_bits |= Gi_DMA_Int_Bit;
  83                         }
  84                         if (read_not_write == 0)
  85                                 gi_dma_config_bits |= Gi_DMA_Write_Bit;
  86                         ni_tio_set_bits(counter,
  87                                         NITIO_Gi_DMA_Config_Reg(counter->
  88                                                                 counter_index),
  89                                         Gi_DMA_Enable_Bit | Gi_DMA_Int_Bit |
  90                                         Gi_DMA_Write_Bit, gi_dma_config_bits);
  91                 }
  92                 break;
  93         }
  94 }
  95
  96 static int ni_tio_input_inttrig(struct comedi_device *dev,
  97                                 struct comedi_subdevice *s,
  98                                 unsigned int trignum)
  99 {
 100         unsigned long flags;
 101         int retval = 0;
 102         struct ni_gpct *counter = s->private;
 103
 104         BUG_ON(counter == NULL);
 105         if (trignum != 0)
 106                 return -EINVAL;
 107
 108         spin_lock_irqsave(&counter->lock, flags);
 109         if (counter->mite_chan)
 110                 mite_dma_arm(counter->mite_chan);
 111         else
 112                 retval = -EIO;
 113         spin_unlock_irqrestore(&counter->lock, flags);
 114         if (retval < 0)
 115                 return retval;
 116         retval = ni_tio_arm(counter, 1, NI_GPCT_ARM_IMMEDIATE);
 117         s->async->inttrig = NULL;
 118
 119         return retval;
 120 }
 121
 122 static int ni_tio_input_cmd(struct ni_gpct *counter, struct comedi_async *async)
 123 {
 124         struct ni_gpct_device *counter_dev = counter->counter_dev;
 125         struct comedi_cmd *cmd = &async->cmd;
 126         int retval = 0;
 127
 128         /* write alloc the entire buffer */
 129         comedi_buf_write_alloc(async, async->prealloc_bufsz);
 130         counter->mite_chan->dir = COMEDI_INPUT;
 131         switch (counter_dev->variant) {
 132         case ni_gpct_variant_m_series:
 133         case ni_gpct_variant_660x:
 134                 mite_prep_dma(counter->mite_chan, 32, 32);
 135                 break;
 136         case ni_gpct_variant_e_series:
 137                 mite_prep_dma(counter->mite_chan, 16, 32);
 138                 break;
 139         default:
 140                 BUG();
 141                 break;
 142         }
 143         ni_tio_set_bits(counter, NITIO_Gi_Command_Reg(counter->counter_index),
 144                         Gi_Save_Trace_Bit, 0);
 145         ni_tio_configure_dma(counter, 1, 1);
 146         switch (cmd->start_src) {
 147         case TRIG_NOW:
 148                 async->inttrig = NULL;
 149                 mite_dma_arm(counter->mite_chan);
 150                 retval = ni_tio_arm(counter, 1, NI_GPCT_ARM_IMMEDIATE);
 151                 break;
 152         case TRIG_INT:
 153                 async->inttrig = &ni_tio_input_inttrig;
 154                 break;
 155         case TRIG_EXT:
 156                 async->inttrig = NULL;
 157                 mite_dma_arm(counter->mite_chan);
 158                 retval = ni_tio_arm(counter, 1, cmd->start_arg);
 159                 break;
 160         case TRIG_OTHER:
 161                 async->inttrig = NULL;
 162                 mite_dma_arm(counter->mite_chan);
 163                 break;
 164         default:
 165                 BUG();
 166                 break;
 167         }
 168         return retval;
 169 }
 170
 171 static int ni_tio_output_cmd(struct ni_gpct *counter,
 172                              struct comedi_async *async)
 173 {
 174         dev_err(counter->counter_dev->dev->class_dev,
 175                 "output commands not yet implemented.\n");
 176         return -ENOTSUPP;
 177
 178         counter->mite_chan->dir = COMEDI_OUTPUT;
 179         mite_prep_dma(counter->mite_chan, 32, 32);
 180         ni_tio_configure_dma(counter, 1, 0);
 181         mite_dma_arm(counter->mite_chan);
 182         return ni_tio_arm(counter, 1, NI_GPCT_ARM_IMMEDIATE);
 183 }
 184
 185 static int ni_tio_cmd_setup(struct ni_gpct *counter, struct comedi_async *async)
 186 {
 187         struct comedi_cmd *cmd = &async->cmd;
 188         int set_gate_source = 0;
 189         unsigned gate_source;
 190         int retval = 0;
 191
 192         if (cmd->scan_begin_src == TRIG_EXT) {
 193                 set_gate_source = 1;
 194                 gate_source = cmd->scan_begin_arg;
 195         } else if (cmd->convert_src == TRIG_EXT) {
 196                 set_gate_source = 1;
 197                 gate_source = cmd->convert_arg;
 198         }
 199         if (set_gate_source)
 200                 retval = ni_tio_set_gate_src(counter, 0, gate_source);
 201         if (cmd->flags & TRIG_WAKE_EOS) {
 202                 ni_tio_set_bits(counter,
 203                                 NITIO_Gi_Interrupt_Enable_Reg(counter->
 204                                                               counter_index),
 205                                 Gi_Gate_Interrupt_Enable_Bit(counter->
 206                                                              counter_index),
 207                                 Gi_Gate_Interrupt_Enable_Bit(counter->
 208                                                              counter_index));
 209         }
 210         return retval;
 211 }
 212
 213 int ni_tio_cmd(struct ni_gpct *counter, struct comedi_async *async)
 214 {
 215         struct comedi_cmd *cmd = &async->cmd;
 216         int retval = 0;
 217         unsigned long flags;
 218
 219         spin_lock_irqsave(&counter->lock, flags);
 220         if (counter->mite_chan == NULL) {
 221                 dev_err(counter->counter_dev->dev->class_dev,
 222                         "commands only supported with DMA.  ");
 223                 dev_err(counter->counter_dev->dev->class_dev,
 224                         "Interrupt-driven commands not yet implemented.\n");
 225                 retval = -EIO;
 226         } else {
 227                 retval = ni_tio_cmd_setup(counter, async);
 228                 if (retval == 0) {
 229                         if (cmd->flags & CMDF_WRITE)
 230                                 retval = ni_tio_output_cmd(counter, async);
 231                         else
 232                                 retval = ni_tio_input_cmd(counter, async);
 233                 }
 234         }
 235         spin_unlock_irqrestore(&counter->lock, flags);
 236         return retval;
 237 }
 238 EXPORT_SYMBOL_GPL(ni_tio_cmd);
 239
 240 int ni_tio_cmdtest(struct ni_gpct *counter, struct comedi_cmd *cmd)
 241 {
 242         int err = 0;
 243         unsigned int sources;
 244
 245         /* Step 1 : check if triggers are trivially valid */
 246
 247         sources = TRIG_NOW | TRIG_INT | TRIG_OTHER;
 248         if (ni_tio_counting_mode_registers_present(counter->counter_dev))
 249                 sources |= TRIG_EXT;
 250         err |= cfc_check_trigger_src(&cmd->start_src, sources);
 251
 252         err |= cfc_check_trigger_src(&cmd->scan_begin_src,
 253                                         TRIG_FOLLOW | TRIG_EXT | TRIG_OTHER);
 254         err |= cfc_check_trigger_src(&cmd->convert_src,
 255                                         TRIG_NOW | TRIG_EXT | TRIG_OTHER);
 256         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
 257         err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_NONE);
 258
 259         if (err)
 260                 return 1;
 261
 262         /* Step 2a : make sure trigger sources are unique */
 263
 264         err |= cfc_check_trigger_is_unique(cmd->start_src);
 265         err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
 266         err |= cfc_check_trigger_is_unique(cmd->convert_src);
 267
 268         /* Step 2b : and mutually compatible */
 269
 270         if (cmd->convert_src != TRIG_NOW && cmd->scan_begin_src != TRIG_FOLLOW)
 271                 err |= -EINVAL;
 272
 273         if (err)
 274                 return 2;
 275
 276         /* Step 3: check if arguments are trivially valid */
 277
 278         if (cmd->start_src != TRIG_EXT)
 279                 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
 280
 281         if (cmd->scan_begin_src != TRIG_EXT)
 282                 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
 283
 284         if (cmd->convert_src != TRIG_EXT)
 285                 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
 286
 287         err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
 288         err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
 289
 290         if (err)
 291                 return 3;
 292
 293         /* step 4: fix up any arguments */
 294
 295         if (err)
 296                 return 4;
 297
 298         return 0;
 299 }
 300 EXPORT_SYMBOL_GPL(ni_tio_cmdtest);
 301
 302 int ni_tio_cancel(struct ni_gpct *counter)
 303 {
 304         unsigned long flags;
 305
 306         ni_tio_arm(counter, 0, 0);
 307         spin_lock_irqsave(&counter->lock, flags);
 308         if (counter->mite_chan)
 309                 mite_dma_disarm(counter->mite_chan);
 310         spin_unlock_irqrestore(&counter->lock, flags);
 311         ni_tio_configure_dma(counter, 0, 0);
 312
 313         ni_tio_set_bits(counter,
 314                         NITIO_Gi_Interrupt_Enable_Reg(counter->counter_index),
 315                         Gi_Gate_Interrupt_Enable_Bit(counter->counter_index),
 316                         0x0);
 317         return 0;
 318 }
 319 EXPORT_SYMBOL_GPL(ni_tio_cancel);
 320
 321         /* During buffered input counter operation for e-series, the gate
 322            interrupt is acked automatically by the dma controller, due to the
 323            Gi_Read/Write_Acknowledges_IRQ bits in the input select register.  */
 324 static int should_ack_gate(struct ni_gpct *counter)
 325 {
 326         unsigned long flags;
 327         int retval = 0;
 328
 329         switch (counter->counter_dev->variant) {
 330         case ni_gpct_variant_m_series:
 331         /*  not sure if 660x really supports gate
 332             interrupts (the bits are not listed
 333             in register-level manual) */
 334         case ni_gpct_variant_660x:
 335                 return 1;
 336                 break;
 337         case ni_gpct_variant_e_series:
 338                 spin_lock_irqsave(&counter->lock, flags);
 339                 {
 340                         if (counter->mite_chan == NULL ||
 341                             counter->mite_chan->dir != COMEDI_INPUT ||
 342                             (mite_done(counter->mite_chan))) {
 343                                 retval = 1;
 344                         }
 345                 }
 346                 spin_unlock_irqrestore(&counter->lock, flags);
 347                 break;
 348         }
 349         return retval;
 350 }
 351
 352 void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
 353                                     int *tc_error, int *perm_stale_data,
 354                                     int *stale_data)
 355 {
 356         const unsigned short gxx_status = read_register(counter,
 357                                                         NITIO_Gxx_Status_Reg
 358                                                         (counter->
 359                                                          counter_index));
 360         const unsigned short gi_status = read_register(counter,
 361                                                        NITIO_Gi_Status_Reg
 362                                                        (counter->
 363                                                         counter_index));
 364         unsigned ack = 0;
 365
 366         if (gate_error)
 367                 *gate_error = 0;
 368         if (tc_error)
 369                 *tc_error = 0;
 370         if (perm_stale_data)
 371                 *perm_stale_data = 0;
 372         if (stale_data)
 373                 *stale_data = 0;
 374
 375         if (gxx_status & Gi_Gate_Error_Bit(counter->counter_index)) {
 376                 ack |= Gi_Gate_Error_Confirm_Bit(counter->counter_index);
 377                 if (gate_error) {
 378                         /*660x don't support automatic acknowledgement
 379                           of gate interrupt via dma read/write
 380                            and report bogus gate errors */
 381                         if (counter->counter_dev->variant !=
 382                             ni_gpct_variant_660x) {
 383                                 *gate_error = 1;
 384                         }
 385                 }
 386         }
 387         if (gxx_status & Gi_TC_Error_Bit(counter->counter_index)) {
 388                 ack |= Gi_TC_Error_Confirm_Bit(counter->counter_index);
 389                 if (tc_error)
 390                         *tc_error = 1;
 391         }
 392         if (gi_status & Gi_TC_Bit)
 393                 ack |= Gi_TC_Interrupt_Ack_Bit;
 394         if (gi_status & Gi_Gate_Interrupt_Bit) {
 395                 if (should_ack_gate(counter))
 396                         ack |= Gi_Gate_Interrupt_Ack_Bit;
 397         }
 398         if (ack)
 399                 write_register(counter, ack,
 400                                NITIO_Gi_Interrupt_Acknowledge_Reg
 401                                (counter->counter_index));
 402         if (ni_tio_get_soft_copy
 403             (counter,
 404              NITIO_Gi_Mode_Reg(counter->counter_index)) &
 405             Gi_Loading_On_Gate_Bit) {
 406                 if (gxx_status & Gi_Stale_Data_Bit(counter->counter_index)) {
 407                         if (stale_data)
 408                                 *stale_data = 1;
 409                 }
 410                 if (read_register(counter,
 411                                   NITIO_Gxx_Joint_Status2_Reg
 412                                   (counter->counter_index)) &
 413                     Gi_Permanent_Stale_Bit(counter->counter_index)) {
 414                         dev_info(counter->counter_dev->dev->class_dev,
 415                                  "%s: Gi_Permanent_Stale_Data detected.\n",
 416                                  __func__);
 417                         if (perm_stale_data)
 418                                 *perm_stale_data = 1;
 419                 }
 420         }
 421 }
 422 EXPORT_SYMBOL_GPL(ni_tio_acknowledge_and_confirm);
 423
 424 void ni_tio_handle_interrupt(struct ni_gpct *counter,
 425                              struct comedi_subdevice *s)
 426 {
 427         unsigned gpct_mite_status;
 428         unsigned long flags;
 429         int gate_error;
 430         int tc_error;
 431         int perm_stale_data;
 432
 433         ni_tio_acknowledge_and_confirm(counter, &gate_error, &tc_error,
 434                                        &perm_stale_data, NULL);
 435         if (gate_error) {
 436                 dev_notice(counter->counter_dev->dev->class_dev,
 437                            "%s: Gi_Gate_Error detected.\n", __func__);
 438                 s->async->events |= COMEDI_CB_OVERFLOW;
 439         }
 440         if (perm_stale_data)
 441                 s->async->events |= COMEDI_CB_ERROR;
 442         switch (counter->counter_dev->variant) {
 443         case ni_gpct_variant_m_series:
 444         case ni_gpct_variant_660x:
 445                 if (read_register(counter,
 446                                 NITIO_Gi_DMA_Status_Reg
 447                                 (counter->counter_index)) & Gi_DRQ_Error_Bit) {
 448                         dev_notice(counter->counter_dev->dev->class_dev,
 449                                    "%s: Gi_DRQ_Error detected.\n", __func__);
 450                         s->async->events |= COMEDI_CB_OVERFLOW;
 451                 }
 452                 break;
 453         case ni_gpct_variant_e_series:
 454                 break;
 455         }
 456         spin_lock_irqsave(&counter->lock, flags);
 457         if (counter->mite_chan == NULL) {
 458                 spin_unlock_irqrestore(&counter->lock, flags);
 459                 return;
 460         }
 461         gpct_mite_status = mite_get_status(counter->mite_chan);
 462         if (gpct_mite_status & CHSR_LINKC) {
 463                 writel(CHOR_CLRLC,
 464                        counter->mite_chan->mite->mite_io_addr +
 465                        MITE_CHOR(counter->mite_chan->channel));
 466         }
 467         mite_sync_input_dma(counter->mite_chan, s->async);
 468         spin_unlock_irqrestore(&counter->lock, flags);
 469 }
 470 EXPORT_SYMBOL_GPL(ni_tio_handle_interrupt);
 471
 472 void ni_tio_set_mite_channel(struct ni_gpct *counter,
 473                              struct mite_channel *mite_chan)
 474 {
 475         unsigned long flags;
 476
 477         spin_lock_irqsave(&counter->lock, flags);
 478         counter->mite_chan = mite_chan;
 479         spin_unlock_irqrestore(&counter->lock, flags);
 480 }
 481 EXPORT_SYMBOL_GPL(ni_tio_set_mite_channel);
 482
 483 static int __init ni_tiocmd_init_module(void)
 484 {
 485         return 0;
 486 }
 487
 488 module_init(ni_tiocmd_init_module);
 489
 490 static void __exit ni_tiocmd_cleanup_module(void)
 491 {
 492 }
 493
 494 module_exit(ni_tiocmd_cleanup_module);