drivers/staging/emxx_udc/emxx_udc.c

   1 /*
   2  *  drivers/usb/gadget/emxx_udc.c
   3  *     EMXX FCD (Function Controller Driver) for USB.
   4  *
   5  *  Copyright (C) 2010 Renesas Electronics Corporation
   6  *
   7  *  This program is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License version 2
   9  *  as published by the Free Software Foundation.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14  *  GNU General Public License for more details.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/module.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/delay.h>
  21 #include <linux/ioport.h>
  22 #include <linux/slab.h>
  23 #include <linux/errno.h>
  24 #include <linux/list.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/proc_fs.h>
  27 #include <linux/clk.h>
  28 #include <linux/ctype.h>
  29 #include <linux/string.h>
  30 #include <linux/dma-mapping.h>
  31 #include <linux/workqueue.h>
  32 #include <linux/device.h>
  33
  34 #include <linux/usb/ch9.h>
  35 #include <linux/usb/gadget.h>
  36
  37 #include <linux/irq.h>
  38 #include <linux/gpio.h>
  39
  40 #include "emxx_udc.h"
  41
  42 #define DRIVER_DESC     "EMXX UDC driver"
  43 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  44
  45 static const char       driver_name[] = "emxx_udc";
  46 static const char       driver_desc[] = DRIVER_DESC;
  47
  48 /*===========================================================================*/
  49 /* Prototype */
  50 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *, struct nbu2ss_ep *);
  51 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *);
  52 /*static void _nbu2ss_ep0_disable(struct nbu2ss_udc *);*/
  53 static void _nbu2ss_ep_done(struct nbu2ss_ep *, struct nbu2ss_req *, int);
  54 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *, u32 mode);
  55 static void _nbu2ss_endpoint_toggle_reset(struct nbu2ss_udc *udc, u8 ep_adrs);
  56
  57 static int _nbu2ss_pullup(struct nbu2ss_udc *, int);
  58 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *, struct nbu2ss_ep *);
  59
  60 /*===========================================================================*/
  61 /* Macro */
  62 #define _nbu2ss_zero_len_pkt(udc, epnum)        \
  63         _nbu2ss_ep_in_end(udc, epnum, 0, 0)
  64
  65 /*===========================================================================*/
  66 /* Global */
  67 struct nbu2ss_udc udc_controller;
  68
  69 /*-------------------------------------------------------------------------*/
  70 /* Read */
  71 static inline u32 _nbu2ss_readl(void *address)
  72 {
  73         return __raw_readl(address);
  74 }
  75
  76 /*-------------------------------------------------------------------------*/
  77 /* Write */
  78 static inline void _nbu2ss_writel(void *address, u32 udata)
  79 {
  80         __raw_writel(udata, address);
  81 }
  82
  83 /*-------------------------------------------------------------------------*/
  84 /* Set Bit */
  85 static inline void _nbu2ss_bitset(void *address, u32 udata)
  86 {
  87         u32     reg_dt = __raw_readl(address) | (udata);
  88
  89         __raw_writel(reg_dt, address);
  90 }
  91
  92 /*-------------------------------------------------------------------------*/
  93 /* Clear Bit */
  94 static inline void _nbu2ss_bitclr(void *address, u32 udata)
  95 {
  96         u32     reg_dt = __raw_readl(address) & ~(udata);
  97
  98         __raw_writel(reg_dt, address);
  99 }
 100
 101 #ifdef UDC_DEBUG_DUMP
 102 /*-------------------------------------------------------------------------*/
 103 static void _nbu2ss_dump_register(struct nbu2ss_udc *udc)
 104 {
 105         int             i;
 106         u32 reg_data;
 107
 108         pr_info("=== %s()\n", __func__);
 109
 110         if (!udc) {
 111                 pr_err("%s udc == NULL\n", __func__);
 112                 return;
 113         }
 114
 115         spin_unlock(&udc->lock);
 116
 117         dev_dbg(&udc->dev, "\n-USB REG-\n");
 118         for (i = 0x0 ; i < USB_BASE_SIZE ; i += 16) {
 119                 reg_data =   _nbu2ss_readl(
 120                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i));
 121                 dev_dbg(&udc->dev, "USB%04x =%08x", i, (int)reg_data);
 122
 123                 reg_data =  _nbu2ss_readl(
 124                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 4));
 125                 dev_dbg(&udc->dev, " %08x", (int)reg_data);
 126
 127                 reg_data =  _nbu2ss_readl(
 128                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 8));
 129                 dev_dbg(&udc->dev, " %08x", (int)reg_data);
 130
 131                 reg_data =  _nbu2ss_readl(
 132                         (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 12));
 133                 dev_dbg(&udc->dev, " %08x\n", (int)reg_data);
 134
 135         }
 136
 137         spin_lock(&udc->lock);
 138 }
 139 #endif /* UDC_DEBUG_DUMP */
 140
 141 /*-------------------------------------------------------------------------*/
 142 /* Endpoint 0 Callback (Complete) */
 143 static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req)
 144 {
 145         u8              recipient;
 146         u16             selector;
 147         u32             test_mode;
 148         struct usb_ctrlrequest  *p_ctrl;
 149         struct nbu2ss_udc *udc;
 150
 151         if ((!_ep) || (!_req))
 152                 return;
 153
 154         udc = (struct nbu2ss_udc *)_req->context;
 155         p_ctrl = &udc->ctrl;
 156         if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
 157
 158                 if (p_ctrl->bRequest == USB_REQ_SET_FEATURE) {
 159                         /*-------------------------------------------------*/
 160                         /* SET_FEATURE */
 161                         recipient = (u8)(p_ctrl->bRequestType & USB_RECIP_MASK);
 162                         selector  = p_ctrl->wValue;
 163                         if ((recipient == USB_RECIP_DEVICE) &&
 164                             (selector == USB_DEVICE_TEST_MODE)) {
 165                                 test_mode = (u32)(p_ctrl->wIndex >> 8);
 166                                 _nbu2ss_set_test_mode(udc, test_mode);
 167                         }
 168                 }
 169         }
 170 }
 171
 172 /*-------------------------------------------------------------------------*/
 173 /* Initialization usb_request */
 174 static void _nbu2ss_create_ep0_packet(
 175         struct nbu2ss_udc *udc,
 176         void *p_buf,
 177         unsigned length
 178 )
 179 {
 180         udc->ep0_req.req.buf            = p_buf;
 181         udc->ep0_req.req.length         = length;
 182         udc->ep0_req.req.dma            = 0;
 183         udc->ep0_req.req.zero           = TRUE;
 184         udc->ep0_req.req.complete       = _nbu2ss_ep0_complete;
 185         udc->ep0_req.req.status         = -EINPROGRESS;
 186         udc->ep0_req.req.context        = udc;
 187         udc->ep0_req.req.actual         = 0;
 188 }
 189
 190 /*-------------------------------------------------------------------------*/
 191 /* Acquisition of the first address of RAM(FIFO) */
 192 static u32 _nbu2ss_get_begin_ram_address(struct nbu2ss_udc *udc)
 193 {
 194         u32             num, buf_type;
 195         u32             data, last_ram_adr, use_ram_size;
 196
 197         struct ep_regs *p_ep_regs;
 198
 199         last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2;
 200         use_ram_size = 0;
 201
 202         for (num = 0; num < NUM_ENDPOINTS - 1; num++) {
 203                 p_ep_regs = &udc->p_regs->EP_REGS[num];
 204                 data = _nbu2ss_readl(&p_ep_regs->EP_PCKT_ADRS);
 205                 buf_type = _nbu2ss_readl(&p_ep_regs->EP_CONTROL) & EPn_BUF_TYPE;
 206                 if (buf_type == 0) {
 207                         /* Single Buffer */
 208                         use_ram_size += (data & EPn_MPKT) / sizeof(u32);
 209                 } else {
 210                         /* Double Buffer */
 211                         use_ram_size += ((data & EPn_MPKT) / sizeof(u32)) * 2;
 212                 }
 213
 214                 if ((data >> 16) > last_ram_adr)
 215                         last_ram_adr = data >> 16;
 216         }
 217
 218         return last_ram_adr + use_ram_size;
 219 }
 220
 221 /*-------------------------------------------------------------------------*/
 222 /* Construction of Endpoint */
 223 static int _nbu2ss_ep_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 224 {
 225         u32             num;
 226         u32             data;
 227         u32             begin_adrs;
 228
 229         if (ep->epnum == 0)
 230                 return  -EINVAL;
 231
 232         num = ep->epnum - 1;
 233
 234         /*-------------------------------------------------------------*/
 235         /* RAM Transfer Address */
 236         begin_adrs = _nbu2ss_get_begin_ram_address(udc);
 237         data = (begin_adrs << 16) | ep->ep.maxpacket;
 238         _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data);
 239
 240         /*-------------------------------------------------------------*/
 241         /* Interrupt Enable */
 242         data = 1 << (ep->epnum + 8);
 243         _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, data);
 244
 245         /*-------------------------------------------------------------*/
 246         /* Endpoint Type(Mode) */
 247         /*   Bulk, Interrupt, ISO */
 248         switch (ep->ep_type) {
 249         case USB_ENDPOINT_XFER_BULK:
 250                 data = EPn_BULK;
 251                 break;
 252
 253         case USB_ENDPOINT_XFER_INT:
 254                 data = EPn_BUF_SINGLE | EPn_INTERRUPT;
 255                 break;
 256
 257         case USB_ENDPOINT_XFER_ISOC:
 258                 data = EPn_ISO;
 259                 break;
 260
 261         default:
 262                 data = 0;
 263                 break;
 264         }
 265
 266         _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 267         _nbu2ss_endpoint_toggle_reset(udc, (ep->epnum|ep->direct));
 268
 269         if (ep->direct == USB_DIR_OUT) {
 270                 /*---------------------------------------------------------*/
 271                 /* OUT */
 272                 data = EPn_EN | EPn_BCLR | EPn_DIR0;
 273                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 274
 275                 data = EPn_ONAK | EPn_OSTL_EN | EPn_OSTL;
 276                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 277
 278                 data = EPn_OUT_EN | EPn_OUT_END_EN;
 279                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 280         } else {
 281                 /*---------------------------------------------------------*/
 282                 /* IN */
 283                 data = EPn_EN | EPn_BCLR | EPn_AUTO;
 284                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 285
 286                 data = EPn_ISTL;
 287                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 288
 289                 data = EPn_IN_EN | EPn_IN_END_EN;
 290                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 291         }
 292
 293         return 0;
 294 }
 295
 296 /*-------------------------------------------------------------------------*/
 297 /* Release of Endpoint */
 298 static int _nbu2ss_epn_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 299 {
 300         u32             num;
 301         u32             data;
 302
 303         if ((ep->epnum == 0) || (udc->vbus_active == 0))
 304                 return  -EINVAL;
 305
 306         num = ep->epnum - 1;
 307
 308         /*-------------------------------------------------------------*/
 309         /* RAM Transfer Address */
 310         _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, 0);
 311
 312         /*-------------------------------------------------------------*/
 313         /* Interrupt Disable */
 314         data = 1 << (ep->epnum + 8);
 315         _nbu2ss_bitclr(&udc->p_regs->USB_INT_ENA, data);
 316
 317         if (ep->direct == USB_DIR_OUT) {
 318                 /*---------------------------------------------------------*/
 319                 /* OUT */
 320                 data = EPn_ONAK | EPn_BCLR;
 321                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 322
 323                 data = EPn_EN | EPn_DIR0;
 324                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 325
 326                 data = EPn_OUT_EN | EPn_OUT_END_EN;
 327                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 328         } else {
 329                 /*---------------------------------------------------------*/
 330                 /* IN */
 331                 data = EPn_BCLR;
 332                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 333
 334                 data = EPn_EN | EPn_AUTO;
 335                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
 336
 337                 data = EPn_IN_EN | EPn_IN_END_EN;
 338                 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
 339         }
 340
 341         return 0;
 342 }
 343
 344 /*-------------------------------------------------------------------------*/
 345 /* DMA setting (without Endpoint 0) */
 346 static void _nbu2ss_ep_dma_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 347 {
 348         u32             num;
 349         u32             data;
 350
 351         data = _nbu2ss_readl(&udc->p_regs->USBSSCONF);
 352         if (((ep->epnum == 0) || (data & (1 << ep->epnum)) == 0))
 353                 return;         /* Not Support DMA */
 354
 355         num = ep->epnum - 1;
 356
 357         if (ep->direct == USB_DIR_OUT) {
 358                 /*---------------------------------------------------------*/
 359                 /* OUT */
 360                 data = ep->ep.maxpacket;
 361                 _nbu2ss_writel(&udc->p_regs->EP_DCR[num].EP_DCR2, data);
 362
 363                 /*---------------------------------------------------------*/
 364                 /* Transfer Direct */
 365                 data = DCR1_EPn_DIR0;
 366                 _nbu2ss_bitset(&udc->p_regs->EP_DCR[num].EP_DCR1, data);
 367
 368                 /*---------------------------------------------------------*/
 369                 /* DMA Mode etc. */
 370                 data = EPn_STOP_MODE | EPn_STOP_SET  | EPn_DMAMODE0;
 371                 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
 372         } else {
 373                 /*---------------------------------------------------------*/
 374                 /* IN */
 375                 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 376
 377                 /*---------------------------------------------------------*/
 378                 /* DMA Mode etc. */
 379                 data = EPn_BURST_SET | EPn_DMAMODE0;
 380                 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
 381         }
 382 }
 383
 384 /*-------------------------------------------------------------------------*/
 385 /* DMA setting release */
 386 static void _nbu2ss_ep_dma_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 387 {
 388         u32             num;
 389         u32             data;
 390         struct fc_regs  *preg = udc->p_regs;
 391
 392         if (udc->vbus_active == 0)
 393                 return;         /* VBUS OFF */
 394
 395         data = _nbu2ss_readl(&preg->USBSSCONF);
 396         if ((ep->epnum == 0) || ((data & (1 << ep->epnum)) == 0))
 397                 return;         /* Not Support DMA */
 398
 399         num = ep->epnum - 1;
 400
 401         _nbu2ss_ep_dma_abort(udc, ep);
 402
 403         if (ep->direct == USB_DIR_OUT) {
 404                 /*---------------------------------------------------------*/
 405                 /* OUT */
 406                 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, 0);
 407                 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_DIR0);
 408                 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
 409         } else {
 410                 /*---------------------------------------------------------*/
 411                 /* IN */
 412                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 413                 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
 414         }
 415 }
 416
 417 /*-------------------------------------------------------------------------*/
 418 /* Abort DMA */
 419 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
 420 {
 421         struct fc_regs  *preg = udc->p_regs;
 422
 423         _nbu2ss_bitclr(&preg->EP_DCR[ep->epnum - 1].EP_DCR1, DCR1_EPn_REQEN);
 424         mdelay(DMA_DISABLE_TIME);       /* DCR1_EPn_REQEN Clear */
 425         _nbu2ss_bitclr(&preg->EP_REGS[ep->epnum - 1].EP_DMA_CTRL, EPn_DMA_EN);
 426 }
 427
 428 /*-------------------------------------------------------------------------*/
 429 /* Start IN Transfer */
 430 static void _nbu2ss_ep_in_end(
 431         struct nbu2ss_udc *udc,
 432         u32 epnum,
 433         u32 data32,
 434         u32 length
 435 )
 436 {
 437         u32             data;
 438         u32             num;
 439         struct fc_regs  *preg = udc->p_regs;
 440
 441         if (length >= sizeof(u32))
 442                 return;
 443
 444         if (epnum == 0) {
 445                 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_AUTO);
 446
 447                 /* Writing of 1-4 bytes */
 448                 if (length)
 449                         _nbu2ss_writel(&preg->EP0_WRITE, data32);
 450
 451                 data = ((length << 5) & EP0_DW) | EP0_DEND;
 452                 _nbu2ss_writel(&preg->EP0_CONTROL, data);
 453
 454                 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_AUTO);
 455         } else {
 456                 num = epnum - 1;
 457
 458                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 459
 460                 /* Writing of 1-4 bytes */
 461                 if (length)
 462                         _nbu2ss_writel(&preg->EP_REGS[num].EP_WRITE, data32);
 463
 464                 data = ((((u32)length) << 5) & EPn_DW) | EPn_DEND;
 465                 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
 466
 467                 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
 468         }
 469 }
 470
 471 #ifdef USE_DMA
 472 /*-------------------------------------------------------------------------*/
 473 static void _nbu2ss_dma_map_single(
 474         struct nbu2ss_udc *udc,
 475         struct nbu2ss_ep *ep,
 476         struct nbu2ss_req *req,
 477         u8              direct
 478 )
 479 {
 480         if (req->req.dma == DMA_ADDR_INVALID) {
 481                 if (req->unaligned)
 482                         req->req.dma = ep->phys_buf;
 483                 else {
 484                         req->req.dma = dma_map_single(
 485                                 udc->gadget.dev.parent,
 486                                 req->req.buf,
 487                                 req->req.length,
 488                                 (direct == USB_DIR_IN)
 489                                 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 490                 }
 491                 req->mapped = 1;
 492         } else {
 493                 if (!req->unaligned)
 494                         dma_sync_single_for_device(
 495                                 udc->gadget.dev.parent,
 496                                 req->req.dma,
 497                                 req->req.length,
 498                                 (direct == USB_DIR_IN)
 499                                 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 500
 501                 req->mapped = 0;
 502         }
 503 }
 504
 505 /*-------------------------------------------------------------------------*/
 506 static void _nbu2ss_dma_unmap_single(
 507         struct nbu2ss_udc *udc,
 508         struct nbu2ss_ep *ep,
 509         struct nbu2ss_req *req,
 510         u8              direct
 511 )
 512 {
 513         u8              data[4];
 514         u8              *p;
 515         u32             count = 0;
 516
 517         if (direct == USB_DIR_OUT) {
 518                 count = req->req.actual % 4;
 519                 if (count) {
 520                         p = req->req.buf;
 521                         p += (req->req.actual - count);
 522                         memcpy(data, p, count);
 523                 }
 524         }
 525
 526         if (req->mapped) {
 527                 if (req->unaligned) {
 528                         if (direct == USB_DIR_OUT)
 529                                 memcpy(req->req.buf, ep->virt_buf,
 530                                        req->req.actual & 0xfffffffc);
 531                 } else
 532                         dma_unmap_single(udc->gadget.dev.parent,
 533                                          req->req.dma, req->req.length,
 534                                 (direct == USB_DIR_IN)
 535                                 ? DMA_TO_DEVICE
 536                                 : DMA_FROM_DEVICE);
 537                 req->req.dma = DMA_ADDR_INVALID;
 538                 req->mapped = 0;
 539         } else {
 540                 if (!req->unaligned)
 541                         dma_sync_single_for_cpu(udc->gadget.dev.parent,
 542                                                 req->req.dma, req->req.length,
 543                                 (direct == USB_DIR_IN)
 544                                 ? DMA_TO_DEVICE
 545                                 : DMA_FROM_DEVICE);
 546         }
 547
 548         if (count) {
 549                 p = req->req.buf;
 550                 p += (req->req.actual - count);
 551                 memcpy(p, data, count);
 552         }
 553 }
 554 #endif
 555
 556 /*-------------------------------------------------------------------------*/
 557 /* Endpoint 0 OUT Transfer (PIO) */
 558 static int EP0_out_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
 559 {
 560         u32             i;
 561         int             nret   = 0;
 562         u32             iWordLength = 0;
 563         union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
 564
 565         /*------------------------------------------------------------*/
 566         /* Read Length */
 567         iWordLength = length / sizeof(u32);
 568
 569         /*------------------------------------------------------------*/
 570         /* PIO Read */
 571         if (iWordLength) {
 572                 for (i = 0; i < iWordLength; i++) {
 573                         pBuf32->dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
 574                         pBuf32++;
 575                 }
 576                 nret = iWordLength * sizeof(u32);
 577         }
 578
 579         return nret;
 580 }
 581
 582 /*-------------------------------------------------------------------------*/
 583 /* Endpoint 0 OUT Transfer (PIO, OverBytes) */
 584 static int EP0_out_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
 585 {
 586         u32             i;
 587         u32             iReadSize = 0;
 588         union usb_reg_access  Temp32;
 589         union usb_reg_access  *pBuf32 = (union usb_reg_access *)pBuf;
 590
 591         if ((length > 0) && (length < sizeof(u32))) {
 592                 Temp32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
 593                 for (i = 0 ; i < length ; i++)
 594                         pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
 595                 iReadSize += length;
 596         }
 597
 598         return iReadSize;
 599 }
 600
 601 /*-------------------------------------------------------------------------*/
 602 /* Endpoint 0 IN Transfer (PIO) */
 603 static int EP0_in_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
 604 {
 605         u32             i;
 606         u32             iMaxLength   = EP0_PACKETSIZE;
 607         u32             iWordLength  = 0;
 608         u32             iWriteLength = 0;
 609         union usb_reg_access  *pBuf32 = (union usb_reg_access *)pBuf;
 610
 611         /*------------------------------------------------------------*/
 612         /* Transfer Length */
 613         if (iMaxLength < length)
 614                 iWordLength = iMaxLength / sizeof(u32);
 615         else
 616                 iWordLength = length / sizeof(u32);
 617
 618         /*------------------------------------------------------------*/
 619         /* PIO */
 620         for (i = 0; i < iWordLength; i++) {
 621                 _nbu2ss_writel(&udc->p_regs->EP0_WRITE, pBuf32->dw);
 622                 pBuf32++;
 623                 iWriteLength += sizeof(u32);
 624         }
 625
 626         return iWriteLength;
 627 }
 628
 629 /*-------------------------------------------------------------------------*/
 630 /* Endpoint 0 IN Transfer (PIO, OverBytes) */
 631 static int EP0_in_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 iRemainSize)
 632 {
 633         u32             i;
 634         union usb_reg_access  Temp32;
 635         union usb_reg_access  *pBuf32 = (union usb_reg_access *)pBuf;
 636
 637         if ((iRemainSize > 0) && (iRemainSize < sizeof(u32))) {
 638                 for (i = 0 ; i < iRemainSize ; i++)
 639                         Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
 640                 _nbu2ss_ep_in_end(udc, 0, Temp32.dw, iRemainSize);
 641
 642                 return iRemainSize;
 643         }
 644
 645         return 0;
 646 }
 647
 648 /*-------------------------------------------------------------------------*/
 649 /* Transfer NULL Packet (Epndoint 0) */
 650 static int EP0_send_NULL(struct nbu2ss_udc *udc, bool pid_flag)
 651 {
 652         u32             data;
 653
 654         data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 655         data &= ~(u32)EP0_INAK;
 656
 657         if (pid_flag)
 658                 data |= (EP0_INAK_EN | EP0_PIDCLR | EP0_DEND);
 659         else
 660                 data |= (EP0_INAK_EN | EP0_DEND);
 661
 662         _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 663
 664         return 0;
 665 }
 666
 667 /*-------------------------------------------------------------------------*/
 668 /* Receive NULL Packet (Endpoint 0) */
 669 static int EP0_receive_NULL(struct nbu2ss_udc *udc, bool pid_flag)
 670 {
 671         u32             data;
 672
 673         data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 674         data &= ~(u32)EP0_ONAK;
 675
 676         if (pid_flag)
 677                 data |= EP0_PIDCLR;
 678
 679         _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 680
 681         return 0;
 682 }
 683
 684 /*-------------------------------------------------------------------------*/
 685 static int _nbu2ss_ep0_in_transfer(
 686         struct nbu2ss_udc *udc,
 687         struct nbu2ss_req *req
 688 )
 689 {
 690         u8              *pBuffer;                       /* IN Data Buffer */
 691         u32             data;
 692         u32             iRemainSize = 0;
 693         int             result = 0;
 694
 695         /*-------------------------------------------------------------*/
 696         /* End confirmation */
 697         if (req->req.actual == req->req.length) {
 698                 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
 699                         if (req->zero) {
 700                                 req->zero = false;
 701                                 EP0_send_NULL(udc, FALSE);
 702                                 return 1;
 703                         }
 704                 }
 705
 706                 return 0;               /* Transfer End */
 707         }
 708
 709         /*-------------------------------------------------------------*/
 710         /* NAK release */
 711         data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 712         data |= EP0_INAK_EN;
 713         data &= ~(u32)EP0_INAK;
 714         _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
 715
 716         iRemainSize = req->req.length - req->req.actual;
 717         pBuffer = (u8 *)req->req.buf;
 718         pBuffer += req->req.actual;
 719
 720         /*-------------------------------------------------------------*/
 721         /* Data transfer */
 722         result = EP0_in_PIO(udc, pBuffer, iRemainSize);
 723
 724         req->div_len = result;
 725         iRemainSize -= result;
 726
 727         if (iRemainSize == 0) {
 728                 EP0_send_NULL(udc, FALSE);
 729                 return result;
 730         }
 731
 732         if ((iRemainSize < sizeof(u32)) && (result != EP0_PACKETSIZE)) {
 733                 pBuffer += result;
 734                 result += EP0_in_OverBytes(udc, pBuffer, iRemainSize);
 735                 req->div_len = result;
 736         }
 737
 738         return result;
 739 }
 740
 741 /*-------------------------------------------------------------------------*/
 742 static int _nbu2ss_ep0_out_transfer(
 743         struct nbu2ss_udc *udc,
 744         struct nbu2ss_req *req
 745 )
 746 {
 747         u8              *pBuffer;
 748         u32             iRemainSize;
 749         u32             iRecvLength;
 750         int             result = 0;
 751         int             fRcvZero;
 752
 753         /*-------------------------------------------------------------*/
 754         /* Receive data confirmation */
 755         iRecvLength = _nbu2ss_readl(&udc->p_regs->EP0_LENGTH) & EP0_LDATA;
 756         if (iRecvLength != 0) {
 757
 758                 fRcvZero = 0;
 759
 760                 iRemainSize = req->req.length - req->req.actual;
 761                 pBuffer = (u8 *)req->req.buf;
 762                 pBuffer += req->req.actual;
 763
 764                 result = EP0_out_PIO(udc, pBuffer
 765                                         , min(iRemainSize, iRecvLength));
 766                 if (result < 0)
 767                         return result;
 768
 769                 req->req.actual += result;
 770                 iRecvLength -= result;
 771
 772                 if ((iRecvLength > 0) && (iRecvLength < sizeof(u32))) {
 773                         pBuffer += result;
 774                         iRemainSize -= result;
 775
 776                         result = EP0_out_OverBytes(udc, pBuffer
 777                                         , min(iRemainSize, iRecvLength));
 778                         req->req.actual += result;
 779                 }
 780         } else {
 781                 fRcvZero = 1;
 782         }
 783
 784         /*-------------------------------------------------------------*/
 785         /* End confirmation */
 786         if (req->req.actual == req->req.length) {
 787                 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
 788                         if (req->zero) {
 789                                 req->zero = false;
 790                                 EP0_receive_NULL(udc, FALSE);
 791                                 return 1;
 792                         }
 793                 }
 794
 795                 return 0;               /* Transfer End */
 796         }
 797
 798         if ((req->req.actual % EP0_PACKETSIZE) != 0)
 799                 return 0;               /* Short Packet Transfer End */
 800
 801         if (req->req.actual > req->req.length) {
 802                 dev_err(udc->dev, " *** Overrun Error\n");
 803                 return -EOVERFLOW;
 804         }
 805
 806         if (fRcvZero != 0) {
 807                 iRemainSize = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
 808                 if (iRemainSize & EP0_ONAK) {
 809                         /*---------------------------------------------------*/
 810                         /* NACK release */
 811                         _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_ONAK);
 812                 }
 813                 result = 1;
 814         }
 815
 816         return result;
 817 }
 818
 819 /*-------------------------------------------------------------------------*/
 820 static int _nbu2ss_out_dma(
 821         struct nbu2ss_udc *udc,
 822         struct nbu2ss_req *req,
 823         u32             num,
 824         u32             length
 825 )
 826 {
 827         dma_addr_t      pBuffer;
 828         u32             mpkt;
 829         u32             lmpkt;
 830         u32             dmacnt;
 831         u32             burst = 1;
 832         u32             data;
 833         int             result = -EINVAL;
 834         struct fc_regs  *preg = udc->p_regs;
 835
 836         if (req->dma_flag)
 837                 return 1;               /* DMA is forwarded */
 838
 839         req->dma_flag = TRUE;
 840         pBuffer = req->req.dma;
 841         pBuffer += req->req.actual;
 842
 843         /* DMA Address */
 844         _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
 845
 846         /* Number of transfer packets */
 847         mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
 848         dmacnt = length / mpkt;
 849         lmpkt = (length % mpkt) & ~(u32)0x03;
 850
 851         if (dmacnt > DMA_MAX_COUNT) {
 852                 dmacnt = DMA_MAX_COUNT;
 853                 lmpkt = 0;
 854         } else if (lmpkt != 0) {
 855                 if (dmacnt == 0)
 856                         burst = 0;      /* Burst OFF */
 857                 dmacnt++;
 858         }
 859
 860         data = mpkt | (lmpkt << 16);
 861         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
 862
 863         data = ((dmacnt & 0xff) << 16) | DCR1_EPn_DIR0 | DCR1_EPn_REQEN;
 864         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
 865
 866         if (burst == 0) {
 867                 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, 0);
 868                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
 869         } else {
 870                 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT
 871                                 , (dmacnt << 16));
 872                 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
 873         }
 874         _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
 875
 876         result = length & ~(u32)0x03;
 877         req->div_len = result;
 878
 879         return result;
 880 }
 881
 882 /*-------------------------------------------------------------------------*/
 883 static int _nbu2ss_epn_out_pio(
 884         struct nbu2ss_udc *udc,
 885         struct nbu2ss_ep *ep,
 886         struct nbu2ss_req *req,
 887         u32             length
 888 )
 889 {
 890         u8              *pBuffer;
 891         u32             i;
 892         u32             data;
 893         u32             iWordLength;
 894         union usb_reg_access    Temp32;
 895         union usb_reg_access    *pBuf32;
 896         int             result = 0;
 897         struct fc_regs  *preg = udc->p_regs;
 898
 899         if (req->dma_flag)
 900                 return 1;               /* DMA is forwarded */
 901
 902         if (length == 0)
 903                 return 0;
 904
 905         pBuffer = (u8 *)req->req.buf;
 906         pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
 907
 908         iWordLength = length / sizeof(u32);
 909         if (iWordLength > 0) {
 910                 /*---------------------------------------------------------*/
 911                 /* Copy of every four bytes */
 912                 for (i = 0; i < iWordLength; i++) {
 913                         pBuf32->dw =
 914                         _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
 915                         pBuf32++;
 916                 }
 917                 result = iWordLength * sizeof(u32);
 918         }
 919
 920         data = length - result;
 921         if (data > 0) {
 922                 /*---------------------------------------------------------*/
 923                 /* Copy of fraction byte */
 924                 Temp32.dw = _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
 925                 for (i = 0 ; i < data ; i++)
 926                         pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
 927                 result += data;
 928         }
 929
 930         req->req.actual += result;
 931
 932         if ((req->req.actual == req->req.length)
 933                         || ((req->req.actual % ep->ep.maxpacket) != 0)) {
 934
 935                 result = 0;
 936         }
 937
 938         return result;
 939 }
 940
 941 /*-------------------------------------------------------------------------*/
 942 static int _nbu2ss_epn_out_data(
 943         struct nbu2ss_udc *udc,
 944         struct nbu2ss_ep *ep,
 945         struct nbu2ss_req *req,
 946         u32             data_size
 947 )
 948 {
 949         u32             num;
 950         u32             iBufSize;
 951         int             nret = 1;
 952
 953         if (ep->epnum == 0)
 954                 return -EINVAL;
 955
 956         num = ep->epnum - 1;
 957
 958         iBufSize = min((req->req.length - req->req.actual), data_size);
 959
 960         if ((ep->ep_type != USB_ENDPOINT_XFER_INT)
 961                 && (req->req.dma != 0)
 962                 && (iBufSize  >= sizeof(u32))) {
 963                 nret = _nbu2ss_out_dma(udc, req, num, iBufSize);
 964         } else {
 965                 iBufSize = min_t(u32, iBufSize, ep->ep.maxpacket);
 966                 nret = _nbu2ss_epn_out_pio(udc, ep, req, iBufSize);
 967         }
 968
 969         return nret;
 970 }
 971
 972 /*-------------------------------------------------------------------------*/
 973 static int _nbu2ss_epn_out_transfer(
 974         struct nbu2ss_udc *udc,
 975         struct nbu2ss_ep *ep,
 976         struct nbu2ss_req *req
 977 )
 978 {
 979         u32             num;
 980         u32             iRecvLength;
 981         int             result = 1;
 982         struct fc_regs  *preg = udc->p_regs;
 983
 984         if (ep->epnum == 0)
 985                 return -EINVAL;
 986
 987         num = ep->epnum - 1;
 988
 989         /*-------------------------------------------------------------*/
 990         /* Receive Length */
 991         iRecvLength
 992                 = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT) & EPn_LDATA;
 993
 994         if (iRecvLength != 0) {
 995                 result = _nbu2ss_epn_out_data(udc, ep, req, iRecvLength);
 996                 if (iRecvLength < ep->ep.maxpacket) {
 997                         if (iRecvLength == result) {
 998                                 req->req.actual += result;
 999                                 result = 0;
1000                         }
1001                 }
1002         } else {
1003                 if ((req->req.actual == req->req.length)
1004                         || ((req->req.actual % ep->ep.maxpacket) != 0)) {
1005
1006                         result = 0;
1007                 }
1008         }
1009
1010         if (result == 0) {
1011                 if ((req->req.actual % ep->ep.maxpacket) == 0) {
1012                         if (req->zero) {
1013                                 req->zero = false;
1014                                 return 1;
1015                         }
1016                 }
1017         }
1018
1019         if (req->req.actual > req->req.length) {
1020                 dev_err(udc->dev, " Overrun Error\n");
1021                 dev_err(udc->dev, " actual = %d, length = %d\n",
1022                         req->req.actual, req->req.length);
1023                 result = -EOVERFLOW;
1024         }
1025
1026         return result;
1027 }
1028
1029 /*-------------------------------------------------------------------------*/
1030 static int _nbu2ss_in_dma(
1031         struct nbu2ss_udc *udc,
1032         struct nbu2ss_ep *ep,
1033         struct nbu2ss_req *req,
1034         u32             num,
1035         u32             length
1036 )
1037 {
1038         dma_addr_t      pBuffer;
1039         u32             mpkt;           /* MaxPacketSize */
1040         u32             lmpkt;          /* Last Packet Data Size */
1041         u32             dmacnt;         /* IN Data Size */
1042         u32             iWriteLength;
1043         u32             data;
1044         int             result = -EINVAL;
1045         struct fc_regs  *preg = udc->p_regs;
1046
1047         if (req->dma_flag)
1048                 return 1;               /* DMA is forwarded */
1049
1050 #ifdef USE_DMA
1051         if (req->req.actual == 0)
1052                 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_IN);
1053 #endif
1054         req->dma_flag = TRUE;
1055
1056         /* MAX Packet Size */
1057         mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
1058
1059         if ((DMA_MAX_COUNT * mpkt) < length)
1060                 iWriteLength = DMA_MAX_COUNT * mpkt;
1061         else
1062                 iWriteLength = length;
1063
1064         /*------------------------------------------------------------*/
1065         /* Number of transmission packets */
1066         if (mpkt < iWriteLength) {
1067                 dmacnt = iWriteLength / mpkt;
1068                 lmpkt  = (iWriteLength % mpkt) & ~(u32)0x3;
1069                 if (lmpkt != 0)
1070                         dmacnt++;
1071                 else
1072                         lmpkt = mpkt & ~(u32)0x3;
1073
1074         } else {
1075                 dmacnt = 1;
1076                 lmpkt  = iWriteLength & ~(u32)0x3;
1077         }
1078
1079         /* Packet setting */
1080         data = mpkt | (lmpkt << 16);
1081         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
1082
1083         /* Address setting */
1084         pBuffer = req->req.dma;
1085         pBuffer += req->req.actual;
1086         _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
1087
1088         /* Packet and DMA setting */
1089         data = ((dmacnt & 0xff) << 16) | DCR1_EPn_REQEN;
1090         _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
1091
1092         /* Packet setting of EPC */
1093         data = dmacnt << 16;
1094         _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, data);
1095
1096         /*DMA setting of EPC */
1097         _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
1098
1099         result = iWriteLength & ~(u32)0x3;
1100         req->div_len = result;
1101
1102         return result;
1103 }
1104
1105 /*-------------------------------------------------------------------------*/
1106 static int _nbu2ss_epn_in_pio(
1107         struct nbu2ss_udc *udc,
1108         struct nbu2ss_ep *ep,
1109         struct nbu2ss_req *req,
1110         u32             length
1111 )
1112 {
1113         u8              *pBuffer;
1114         u32             i;
1115         u32             data;
1116         u32             iWordLength;
1117         union usb_reg_access    Temp32;
1118         union usb_reg_access    *pBuf32 = NULL;
1119         int             result = 0;
1120         struct fc_regs  *preg = udc->p_regs;
1121
1122         if (req->dma_flag)
1123                 return 1;               /* DMA is forwarded */
1124
1125         if (length > 0) {
1126                 pBuffer = (u8 *)req->req.buf;
1127                 pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
1128
1129                 iWordLength = length / sizeof(u32);
1130                 if (iWordLength > 0) {
1131                         for (i = 0; i < iWordLength; i++) {
1132                                 _nbu2ss_writel(
1133                                         &preg->EP_REGS[ep->epnum - 1].EP_WRITE
1134                                         , pBuf32->dw
1135                                 );
1136
1137                                 pBuf32++;
1138                         }
1139                         result = iWordLength * sizeof(u32);
1140                 }
1141         }
1142
1143         if (result != ep->ep.maxpacket) {
1144                 data = length - result;
1145                 Temp32.dw = 0;
1146                 for (i = 0 ; i < data ; i++)
1147                         Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
1148
1149                 _nbu2ss_ep_in_end(udc, ep->epnum, Temp32.dw, data);
1150                 result += data;
1151         }
1152
1153         req->div_len = result;
1154
1155         return result;
1156 }
1157
1158 /*-------------------------------------------------------------------------*/
1159 static int _nbu2ss_epn_in_data(
1160         struct nbu2ss_udc *udc,
1161         struct nbu2ss_ep *ep,
1162         struct nbu2ss_req *req,
1163         u32             data_size
1164 )
1165 {
1166         u32             num;
1167         int             nret = 1;
1168
1169         if (ep->epnum == 0)
1170                 return -EINVAL;
1171
1172         num = ep->epnum - 1;
1173
1174         if ((ep->ep_type != USB_ENDPOINT_XFER_INT)
1175                 && (req->req.dma != 0)
1176                 && (data_size >= sizeof(u32))) {
1177                 nret = _nbu2ss_in_dma(udc, ep, req, num, data_size);
1178         } else {
1179                 data_size = min_t(u32, data_size, ep->ep.maxpacket);
1180                 nret = _nbu2ss_epn_in_pio(udc, ep, req, data_size);
1181         }
1182
1183         return nret;
1184 }
1185
1186 /*-------------------------------------------------------------------------*/
1187 static int _nbu2ss_epn_in_transfer(
1188         struct nbu2ss_udc *udc,
1189         struct nbu2ss_ep *ep,
1190         struct nbu2ss_req *req
1191 )
1192 {
1193         u32             num;
1194         u32             iBufSize;
1195         int             result = 0;
1196         u32             status;
1197
1198         if (ep->epnum == 0)
1199                 return -EINVAL;
1200
1201         num = ep->epnum - 1;
1202
1203         status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
1204
1205         /*-------------------------------------------------------------*/
1206         /* State confirmation of FIFO */
1207         if (req->req.actual == 0) {
1208                 if ((status & EPn_IN_EMPTY) == 0)
1209                         return 1;       /* Not Empty */
1210
1211         } else {
1212                 if ((status & EPn_IN_FULL) != 0)
1213                         return 1;       /* Not Empty */
1214         }
1215
1216         /*-------------------------------------------------------------*/
1217         /* Start transfer */
1218         iBufSize = req->req.length - req->req.actual;
1219         if (iBufSize > 0)
1220                 result = _nbu2ss_epn_in_data(udc, ep, req, iBufSize);
1221         else if (req->req.length == 0)
1222                 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1223
1224         return result;
1225 }
1226
1227 /*-------------------------------------------------------------------------*/
1228 static int _nbu2ss_start_transfer(
1229         struct nbu2ss_udc *udc,
1230         struct nbu2ss_ep *ep,
1231         struct nbu2ss_req *req,
1232         bool    bflag)
1233 {
1234         int             nret = -EINVAL;
1235
1236         req->dma_flag = FALSE;
1237         req->div_len = 0;
1238
1239         if (req->req.length == 0)
1240                 req->zero = false;
1241         else {
1242                 if ((req->req.length % ep->ep.maxpacket) == 0)
1243                         req->zero = req->req.zero;
1244                 else
1245                         req->zero = false;
1246         }
1247
1248         if (ep->epnum == 0) {
1249                 /* EP0 */
1250                 switch (udc->ep0state) {
1251                 case EP0_IN_DATA_PHASE:
1252                         nret = _nbu2ss_ep0_in_transfer(udc, req);
1253                         break;
1254
1255                 case EP0_OUT_DATA_PHASE:
1256                         nret = _nbu2ss_ep0_out_transfer(udc, req);
1257                         break;
1258
1259                 case EP0_IN_STATUS_PHASE:
1260                         nret = EP0_send_NULL(udc, TRUE);
1261                         break;
1262
1263                 default:
1264                         break;
1265                 }
1266
1267         } else {
1268                 /* EPn */
1269                 if (ep->direct == USB_DIR_OUT) {
1270                         /* OUT */
1271                         if (!bflag)
1272                                 nret = _nbu2ss_epn_out_transfer(udc, ep, req);
1273                 } else {
1274                         /* IN */
1275                         nret = _nbu2ss_epn_in_transfer(udc, ep, req);
1276                 }
1277         }
1278
1279         return nret;
1280 }
1281
1282 /*-------------------------------------------------------------------------*/
1283 static void _nbu2ss_restert_transfer(struct nbu2ss_ep *ep)
1284 {
1285         u32             length;
1286         bool    bflag = FALSE;
1287         struct nbu2ss_req *req;
1288
1289         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1290         if (!req)
1291                 return;
1292
1293         if (ep->epnum > 0) {
1294                 length = _nbu2ss_readl(
1295                         &ep->udc->p_regs->EP_REGS[ep->epnum - 1].EP_LEN_DCNT);
1296
1297                 length &= EPn_LDATA;
1298                 if (length < ep->ep.maxpacket)
1299                         bflag = TRUE;
1300         }
1301
1302         _nbu2ss_start_transfer(ep->udc, ep, req, bflag);
1303 }
1304
1305 /*-------------------------------------------------------------------------*/
1306 /*      Endpoint Toggle Reset */
1307 static void _nbu2ss_endpoint_toggle_reset(
1308         struct nbu2ss_udc *udc,
1309         u8 ep_adrs)
1310 {
1311         u8              num;
1312         u32             data;
1313
1314         if ((ep_adrs == 0) || (ep_adrs == 0x80))
1315                 return;
1316
1317         num = (ep_adrs & 0x7F) - 1;
1318
1319         if (ep_adrs & USB_DIR_IN)
1320                 data = EPn_IPIDCLR;
1321         else
1322                 data = EPn_BCLR | EPn_OPIDCLR;
1323
1324         _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
1325 }
1326
1327 /*-------------------------------------------------------------------------*/
1328 /*      Endpoint STALL set */
1329 static void _nbu2ss_set_endpoint_stall(
1330         struct nbu2ss_udc *udc,
1331         u8 ep_adrs,
1332         bool bstall)
1333 {
1334         u8              num, epnum;
1335         u32             data;
1336         struct nbu2ss_ep *ep;
1337         struct fc_regs  *preg = udc->p_regs;
1338
1339         if ((ep_adrs == 0) || (ep_adrs == 0x80)) {
1340                 if (bstall) {
1341                         /* Set STALL */
1342                         _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_STL);
1343                 } else {
1344                         /* Clear STALL */
1345                         _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_STL);
1346                 }
1347         } else {
1348                 epnum = ep_adrs & USB_ENDPOINT_NUMBER_MASK;
1349                 num = epnum - 1;
1350                 ep = &udc->ep[epnum];
1351
1352                 if (bstall) {
1353                         /* Set STALL */
1354                         ep->halted = TRUE;
1355
1356                         if (ep_adrs & USB_DIR_IN)
1357                                 data = EPn_BCLR | EPn_ISTL;
1358                         else
1359                                 data = EPn_OSTL_EN | EPn_OSTL;
1360
1361                         _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
1362                 } else {
1363                         /* Clear STALL */
1364                         ep->stalled = FALSE;
1365                         if (ep_adrs & USB_DIR_IN) {
1366                                 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL
1367                                                 , EPn_ISTL);
1368                         } else {
1369                                 data =
1370                                 _nbu2ss_readl(&preg->EP_REGS[num].EP_CONTROL);
1371
1372                                 data &= ~EPn_OSTL;
1373                                 data |= EPn_OSTL_EN;
1374
1375                                 _nbu2ss_writel(&preg->EP_REGS[num].EP_CONTROL
1376                                                 , data);
1377                         }
1378
1379                         ep->stalled = FALSE;
1380                         if (ep->halted) {
1381                                 ep->halted = FALSE;
1382                                 _nbu2ss_restert_transfer(ep);
1383                         }
1384                 }
1385         }
1386 }
1387
1388 /*-------------------------------------------------------------------------*/
1389 /* Device Descriptor */
1390 static struct usb_device_descriptor device_desc = {
1391         .bLength              = sizeof(device_desc),
1392         .bDescriptorType      = USB_DT_DEVICE,
1393         .bcdUSB               = cpu_to_le16(0x0200),
1394         .bDeviceClass         = USB_CLASS_VENDOR_SPEC,
1395         .bDeviceSubClass      = 0x00,
1396         .bDeviceProtocol      = 0x00,
1397         .bMaxPacketSize0      = 64,
1398         .idVendor             = cpu_to_le16(0x0409),
1399         .idProduct            = cpu_to_le16(0xfff0),
1400         .bcdDevice            = 0xffff,
1401         .iManufacturer        = 0x00,
1402         .iProduct             = 0x00,
1403         .iSerialNumber        = 0x00,
1404         .bNumConfigurations   = 0x01,
1405 };
1406
1407 /*-------------------------------------------------------------------------*/
1408 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *udc, u32 mode)
1409 {
1410         u32             data;
1411
1412         if (mode > MAX_TEST_MODE_NUM)
1413                 return;
1414
1415         dev_info(udc->dev, "SET FEATURE : test mode = %d\n", mode);
1416
1417         data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);
1418         data &= ~TEST_FORCE_ENABLE;
1419         data |= mode << TEST_MODE_SHIFT;
1420
1421         _nbu2ss_writel(&udc->p_regs->USB_CONTROL, data);
1422         _nbu2ss_bitset(&udc->p_regs->TEST_CONTROL, CS_TESTMODEEN);
1423 }
1424
1425 /*-------------------------------------------------------------------------*/
1426 static int _nbu2ss_set_feature_device(
1427         struct nbu2ss_udc *udc,
1428         u16 selector,
1429         u16 wIndex
1430 )
1431 {
1432         int     result = -EOPNOTSUPP;
1433
1434         switch (selector) {
1435         case USB_DEVICE_REMOTE_WAKEUP:
1436                 if (wIndex == 0x0000) {
1437                         udc->remote_wakeup = U2F_ENABLE;
1438                         result = 0;
1439                 }
1440                 break;
1441
1442         case USB_DEVICE_TEST_MODE:
1443                 wIndex >>= 8;
1444                 if (wIndex <= MAX_TEST_MODE_NUM)
1445                         result = 0;
1446                 break;
1447
1448         default:
1449                 break;
1450         }
1451
1452         return result;
1453 }
1454
1455 /*-------------------------------------------------------------------------*/
1456 static int _nbu2ss_get_ep_stall(struct nbu2ss_udc *udc, u8 ep_adrs)
1457 {
1458         u8              epnum;
1459         u32             data = 0, bit_data;
1460         struct fc_regs  *preg = udc->p_regs;
1461
1462         epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK;
1463         if (epnum == 0) {
1464                 data = _nbu2ss_readl(&preg->EP0_CONTROL);
1465                 bit_data = EP0_STL;
1466
1467         } else {
1468                 data = _nbu2ss_readl(&preg->EP_REGS[epnum - 1].EP_CONTROL);
1469                 if ((data & EPn_EN) == 0)
1470                         return -1;
1471
1472                 if (ep_adrs & USB_ENDPOINT_DIR_MASK)
1473                         bit_data = EPn_ISTL;
1474                 else
1475                         bit_data = EPn_OSTL;
1476         }
1477
1478         if ((data & bit_data) == 0)
1479                 return 0;
1480         return 1;
1481 }
1482
1483 /*-------------------------------------------------------------------------*/
1484 static inline int _nbu2ss_req_feature(struct nbu2ss_udc *udc, bool bset)
1485 {
1486         u8      recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1487         u8      direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1488         u16     selector  = udc->ctrl.wValue;
1489         u16     wIndex    = udc->ctrl.wIndex;
1490         u8      ep_adrs;
1491         int     result = -EOPNOTSUPP;
1492
1493         if ((udc->ctrl.wLength != 0x0000) ||
1494             (direction != USB_DIR_OUT)) {
1495                 return -EINVAL;
1496         }
1497
1498         switch (recipient) {
1499         case USB_RECIP_DEVICE:
1500                 if (bset)
1501                         result =
1502                         _nbu2ss_set_feature_device(udc, selector, wIndex);
1503                 break;
1504
1505         case USB_RECIP_ENDPOINT:
1506                 if (0x0000 == (wIndex & 0xFF70)) {
1507                         if (selector == USB_ENDPOINT_HALT) {
1508                                 ep_adrs = wIndex & 0xFF;
1509                                 if (!bset) {
1510                                         _nbu2ss_endpoint_toggle_reset(
1511                                                 udc, ep_adrs);
1512                                 }
1513
1514                                 _nbu2ss_set_endpoint_stall(
1515                                         udc, ep_adrs, bset);
1516
1517                                 result = 0;
1518                         }
1519                 }
1520                 break;
1521
1522         default:
1523                 break;
1524         }
1525
1526         if (result >= 0)
1527                 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1528
1529         return result;
1530 }
1531
1532 /*-------------------------------------------------------------------------*/
1533 static inline enum usb_device_speed _nbu2ss_get_speed(struct nbu2ss_udc *udc)
1534 {
1535         u32             data;
1536         enum usb_device_speed speed = USB_SPEED_FULL;
1537
1538         data = _nbu2ss_readl(&udc->p_regs->USB_STATUS);
1539         if (data & HIGH_SPEED)
1540                 speed = USB_SPEED_HIGH;
1541
1542         return speed;
1543 }
1544
1545 /*-------------------------------------------------------------------------*/
1546 static void _nbu2ss_epn_set_stall(
1547         struct nbu2ss_udc *udc,
1548         struct nbu2ss_ep *ep
1549 )
1550 {
1551         u8      ep_adrs;
1552         u32     regdata;
1553         int     limit_cnt = 0;
1554
1555         struct fc_regs  *preg = udc->p_regs;
1556
1557         if (ep->direct == USB_DIR_IN) {
1558                 for (limit_cnt = 0
1559                         ; limit_cnt < IN_DATA_EMPTY_COUNT
1560                         ; limit_cnt++) {
1561
1562                         regdata = _nbu2ss_readl(
1563                                 &preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1564
1565                         if ((regdata & EPn_IN_DATA) == 0)
1566                                 break;
1567
1568                         mdelay(1);
1569                 }
1570         }
1571
1572         ep_adrs = ep->epnum | ep->direct;
1573         _nbu2ss_set_endpoint_stall(udc, ep_adrs, 1);
1574 }
1575
1576 /*-------------------------------------------------------------------------*/
1577 static int std_req_get_status(struct nbu2ss_udc *udc)
1578 {
1579         u32     length;
1580         u16     status_data = 0;
1581         u8      recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1582         u8      direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1583         u8      ep_adrs;
1584         int     result = -EINVAL;
1585
1586         if ((udc->ctrl.wValue != 0x0000)
1587                 || (direction != USB_DIR_IN)) {
1588
1589                 return result;
1590         }
1591
1592         length = min_t(u16, udc->ctrl.wLength, sizeof(status_data));
1593
1594         switch (recipient) {
1595         case USB_RECIP_DEVICE:
1596                 if (udc->ctrl.wIndex == 0x0000) {
1597                         if (udc->gadget.is_selfpowered)
1598                                 status_data |= (1 << USB_DEVICE_SELF_POWERED);
1599
1600                         if (udc->remote_wakeup)
1601                                 status_data |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1602
1603                         result = 0;
1604                 }
1605                 break;
1606
1607         case USB_RECIP_ENDPOINT:
1608                 if (0x0000 == (udc->ctrl.wIndex & 0xFF70)) {
1609                         ep_adrs = (u8)(udc->ctrl.wIndex & 0xFF);
1610                         result = _nbu2ss_get_ep_stall(udc, ep_adrs);
1611
1612                         if (result > 0)
1613                                 status_data |= (1 << USB_ENDPOINT_HALT);
1614                 }
1615                 break;
1616
1617         default:
1618                 break;
1619         }
1620
1621         if (result >= 0) {
1622                 memcpy(udc->ep0_buf, &status_data, length);
1623                 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, length);
1624                 _nbu2ss_ep0_in_transfer(udc, &udc->ep0_req);
1625
1626         } else {
1627                 dev_err(udc->dev, " Error GET_STATUS\n");
1628         }
1629
1630         return result;
1631 }
1632
1633 /*-------------------------------------------------------------------------*/
1634 static int std_req_clear_feature(struct nbu2ss_udc *udc)
1635 {
1636         return _nbu2ss_req_feature(udc, FALSE);
1637 }
1638
1639 /*-------------------------------------------------------------------------*/
1640 static int std_req_set_feature(struct nbu2ss_udc *udc)
1641 {
1642         return _nbu2ss_req_feature(udc, TRUE);
1643 }
1644
1645 /*-------------------------------------------------------------------------*/
1646 static int std_req_set_address(struct nbu2ss_udc *udc)
1647 {
1648         int             result = 0;
1649         u32             wValue = udc->ctrl.wValue;
1650
1651         if ((udc->ctrl.bRequestType != 0x00)    ||
1652             (udc->ctrl.wIndex != 0x0000)        ||
1653                 (udc->ctrl.wLength != 0x0000)) {
1654                 return -EINVAL;
1655         }
1656
1657         if (wValue != (wValue & 0x007F))
1658                 return -EINVAL;
1659
1660         wValue <<= USB_ADRS_SHIFT;
1661
1662         _nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);
1663         _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1664
1665         return result;
1666 }
1667
1668 /*-------------------------------------------------------------------------*/
1669 static int std_req_set_configuration(struct nbu2ss_udc *udc)
1670 {
1671         u32 ConfigValue = (u32)(udc->ctrl.wValue & 0x00ff);
1672
1673         if ((udc->ctrl.wIndex != 0x0000)        ||
1674             (udc->ctrl.wLength != 0x0000)       ||
1675                 (udc->ctrl.bRequestType != 0x00)) {
1676                 return -EINVAL;
1677         }
1678
1679         udc->curr_config = ConfigValue;
1680
1681         if (ConfigValue > 0) {
1682                 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, CONF);
1683                 udc->devstate = USB_STATE_CONFIGURED;
1684
1685         } else {
1686                 _nbu2ss_bitclr(&udc->p_regs->USB_CONTROL, CONF);
1687                 udc->devstate = USB_STATE_ADDRESS;
1688         }
1689
1690         return 0;
1691 }
1692
1693 /*-------------------------------------------------------------------------*/
1694 static inline void _nbu2ss_read_request_data(struct nbu2ss_udc *udc, u32 *pdata)
1695 {
1696         if ((!udc) && (!pdata))
1697                 return;
1698
1699         *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA0);
1700         pdata++;
1701         *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA1);
1702 }
1703
1704 /*-------------------------------------------------------------------------*/
1705 static inline int _nbu2ss_decode_request(struct nbu2ss_udc *udc)
1706 {
1707         bool                    bcall_back = TRUE;
1708         int                     nret = -EINVAL;
1709         struct usb_ctrlrequest  *p_ctrl;
1710
1711         p_ctrl = &udc->ctrl;
1712         _nbu2ss_read_request_data(udc, (u32 *)p_ctrl);
1713
1714         /* ep0 state control */
1715         if (p_ctrl->wLength == 0) {
1716                 udc->ep0state = EP0_IN_STATUS_PHASE;
1717
1718         } else {
1719                 if (p_ctrl->bRequestType & USB_DIR_IN)
1720                         udc->ep0state = EP0_IN_DATA_PHASE;
1721                 else
1722                         udc->ep0state = EP0_OUT_DATA_PHASE;
1723         }
1724
1725         if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1726                 switch (p_ctrl->bRequest) {
1727                 case USB_REQ_GET_STATUS:
1728                         nret = std_req_get_status(udc);
1729                         bcall_back = FALSE;
1730                         break;
1731
1732                 case USB_REQ_CLEAR_FEATURE:
1733                         nret = std_req_clear_feature(udc);
1734                         bcall_back = FALSE;
1735                         break;
1736
1737                 case USB_REQ_SET_FEATURE:
1738                         nret = std_req_set_feature(udc);
1739                         bcall_back = FALSE;
1740                         break;
1741
1742                 case USB_REQ_SET_ADDRESS:
1743                         nret = std_req_set_address(udc);
1744                         bcall_back = FALSE;
1745                         break;
1746
1747                 case USB_REQ_SET_CONFIGURATION:
1748                         nret = std_req_set_configuration(udc);
1749                         break;
1750
1751                 default:
1752                         break;
1753                 }
1754         }
1755
1756         if (!bcall_back) {
1757                 if (udc->ep0state == EP0_IN_STATUS_PHASE) {
1758                         if (nret >= 0) {
1759                                 /*--------------------------------------*/
1760                                 /* Status Stage */
1761                                 nret = EP0_send_NULL(udc, TRUE);
1762                         }
1763                 }
1764
1765         } else {
1766                 spin_unlock(&udc->lock);
1767                 nret = udc->driver->setup(&udc->gadget, &udc->ctrl);
1768                 spin_lock(&udc->lock);
1769         }
1770
1771         if (nret < 0)
1772                 udc->ep0state = EP0_IDLE;
1773
1774         return nret;
1775 }
1776
1777 /*-------------------------------------------------------------------------*/
1778 static inline int _nbu2ss_ep0_in_data_stage(struct nbu2ss_udc *udc)
1779 {
1780         int                     nret;
1781         struct nbu2ss_req       *req;
1782         struct nbu2ss_ep        *ep = &udc->ep[0];
1783
1784         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1785         if (!req)
1786                 req = &udc->ep0_req;
1787
1788         req->req.actual += req->div_len;
1789         req->div_len = 0;
1790
1791         nret = _nbu2ss_ep0_in_transfer(udc, req);
1792         if (nret == 0) {
1793                 udc->ep0state = EP0_OUT_STATUS_PAHSE;
1794                 EP0_receive_NULL(udc, TRUE);
1795         }
1796
1797         return 0;
1798 }
1799
1800 /*-------------------------------------------------------------------------*/
1801 static inline int _nbu2ss_ep0_out_data_stage(struct nbu2ss_udc *udc)
1802 {
1803         int                     nret;
1804         struct nbu2ss_req       *req;
1805         struct nbu2ss_ep        *ep = &udc->ep[0];
1806
1807         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1808         if (!req)
1809                 req = &udc->ep0_req;
1810
1811         nret = _nbu2ss_ep0_out_transfer(udc, req);
1812         if (nret == 0) {
1813                 udc->ep0state = EP0_IN_STATUS_PHASE;
1814                 EP0_send_NULL(udc, TRUE);
1815
1816         } else if (nret < 0) {
1817                 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, EP0_BCLR);
1818                 req->req.status = nret;
1819         }
1820
1821         return 0;
1822 }
1823
1824 /*-------------------------------------------------------------------------*/
1825 static inline int _nbu2ss_ep0_status_stage(struct nbu2ss_udc *udc)
1826 {
1827         struct nbu2ss_req       *req;
1828         struct nbu2ss_ep        *ep = &udc->ep[0];
1829
1830         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1831         if (!req) {
1832                 req = &udc->ep0_req;
1833                 if (req->req.complete)
1834                         req->req.complete(&ep->ep, &req->req);
1835
1836         } else {
1837                 if (req->req.complete)
1838                         _nbu2ss_ep_done(ep, req, 0);
1839         }
1840
1841         udc->ep0state = EP0_IDLE;
1842
1843         return 0;
1844 }
1845
1846 /*-------------------------------------------------------------------------*/
1847 static inline void _nbu2ss_ep0_int(struct nbu2ss_udc *udc)
1848 {
1849         int             i;
1850         u32             status;
1851         u32             intr;
1852         int             nret = -1;
1853
1854         status = _nbu2ss_readl(&udc->p_regs->EP0_STATUS);
1855         intr = status & EP0_STATUS_RW_BIT;
1856         _nbu2ss_writel(&udc->p_regs->EP0_STATUS, ~(u32)intr);
1857
1858         status &= (SETUP_INT | EP0_IN_INT | EP0_OUT_INT
1859                         | STG_END_INT | EP0_OUT_NULL_INT);
1860
1861         if (status == 0) {
1862                 dev_info(udc->dev, "%s Not Decode Interrupt\n", __func__);
1863                 dev_info(udc->dev, "EP0_STATUS = 0x%08x\n", intr);
1864                 return;
1865         }
1866
1867         if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1868                 udc->gadget.speed = _nbu2ss_get_speed(udc);
1869
1870         for (i = 0; i < EP0_END_XFER; i++) {
1871                 switch (udc->ep0state) {
1872                 case EP0_IDLE:
1873                         if (status & SETUP_INT) {
1874                                 status = 0;
1875                                 nret = _nbu2ss_decode_request(udc);
1876                         }
1877                         break;
1878
1879                 case EP0_IN_DATA_PHASE:
1880                         if (status & EP0_IN_INT) {
1881                                 status &= ~EP0_IN_INT;
1882                                 nret = _nbu2ss_ep0_in_data_stage(udc);
1883                         }
1884                         break;
1885
1886                 case EP0_OUT_DATA_PHASE:
1887                         if (status & EP0_OUT_INT) {
1888                                 status &= ~EP0_OUT_INT;
1889                                 nret = _nbu2ss_ep0_out_data_stage(udc);
1890                         }
1891                         break;
1892
1893                 case EP0_IN_STATUS_PHASE:
1894                         if ((status & STG_END_INT) || (status & SETUP_INT)) {
1895                                 status &= ~(STG_END_INT | EP0_IN_INT);
1896                                 nret = _nbu2ss_ep0_status_stage(udc);
1897                         }
1898                         break;
1899
1900                 case EP0_OUT_STATUS_PAHSE:
1901                         if ((status & STG_END_INT)
1902                         || (status & SETUP_INT)
1903                         || (status & EP0_OUT_NULL_INT)) {
1904                                 status &= ~(STG_END_INT
1905                                                 | EP0_OUT_INT
1906                                                 | EP0_OUT_NULL_INT);
1907
1908                                 nret = _nbu2ss_ep0_status_stage(udc);
1909                         }
1910
1911                         break;
1912
1913                 default:
1914                         status = 0;
1915                         break;
1916                 }
1917
1918                 if (status == 0)
1919                         break;
1920         }
1921
1922         if (nret < 0) {
1923                 /* Send Stall */
1924                 _nbu2ss_set_endpoint_stall(udc, 0, TRUE);
1925         }
1926 }
1927
1928 /*-------------------------------------------------------------------------*/
1929 static void _nbu2ss_ep_done(
1930         struct nbu2ss_ep *ep,
1931         struct nbu2ss_req *req,
1932         int status)
1933 {
1934         struct nbu2ss_udc *udc = ep->udc;
1935
1936         list_del_init(&req->queue);
1937
1938         if (status == -ECONNRESET)
1939                 _nbu2ss_fifo_flush(udc, ep);
1940
1941         if (likely(req->req.status == -EINPROGRESS))
1942                 req->req.status = status;
1943
1944         if (ep->stalled)
1945                 _nbu2ss_epn_set_stall(udc, ep);
1946         else {
1947                 if (!list_empty(&ep->queue))
1948                         _nbu2ss_restert_transfer(ep);
1949         }
1950
1951 #ifdef USE_DMA
1952         if ((ep->direct == USB_DIR_OUT) && (ep->epnum > 0) &&
1953             (req->req.dma != 0))
1954                 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_OUT);
1955 #endif
1956
1957         spin_unlock(&udc->lock);
1958         req->req.complete(&ep->ep, &req->req);
1959         spin_lock(&udc->lock);
1960 }
1961
1962 /*-------------------------------------------------------------------------*/
1963 static inline void _nbu2ss_epn_in_int(
1964         struct nbu2ss_udc *udc,
1965         struct nbu2ss_ep *ep,
1966         struct nbu2ss_req *req)
1967 {
1968         int     result = 0;
1969         u32     status;
1970
1971         struct fc_regs  *preg = udc->p_regs;
1972
1973         if (req->dma_flag)
1974                 return;         /* DMA is forwarded */
1975
1976         req->req.actual += req->div_len;
1977         req->div_len = 0;
1978
1979         if (req->req.actual != req->req.length) {
1980                 /*---------------------------------------------------------*/
1981                 /* remainder of data */
1982                 result = _nbu2ss_epn_in_transfer(udc, ep, req);
1983
1984         } else {
1985                 if (req->zero && ((req->req.actual % ep->ep.maxpacket) == 0)) {
1986
1987                         status =
1988                         _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1989
1990                         if ((status & EPn_IN_FULL) == 0) {
1991                                 /*-----------------------------------------*/
1992                                 /* 0 Length Packet */
1993                                 req->zero = false;
1994                                 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1995                         }
1996                         return;
1997                 }
1998         }
1999
2000         if (result <= 0) {
2001                 /*---------------------------------------------------------*/
2002                 /* Complete */
2003                 _nbu2ss_ep_done(ep, req, result);
2004         }
2005 }
2006
2007 /*-------------------------------------------------------------------------*/
2008 static inline void _nbu2ss_epn_out_int(
2009         struct nbu2ss_udc *udc,
2010         struct nbu2ss_ep *ep,
2011         struct nbu2ss_req *req)
2012 {
2013         int     result;
2014
2015         result = _nbu2ss_epn_out_transfer(udc, ep, req);
2016         if (result <= 0)
2017                 _nbu2ss_ep_done(ep, req, result);
2018 }
2019
2020 /*-------------------------------------------------------------------------*/
2021 static inline void _nbu2ss_epn_in_dma_int(
2022         struct nbu2ss_udc *udc,
2023         struct nbu2ss_ep *ep,
2024         struct nbu2ss_req *req)
2025 {
2026         u32             mpkt;
2027         u32             size;
2028         struct usb_request *preq;
2029
2030         preq = &req->req;
2031
2032         if (!req->dma_flag)
2033                 return;
2034
2035         preq->actual += req->div_len;
2036         req->div_len = 0;
2037         req->dma_flag = FALSE;
2038
2039 #ifdef USE_DMA
2040         _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_IN);
2041 #endif
2042
2043         if (preq->actual != preq->length) {
2044                 _nbu2ss_epn_in_transfer(udc, ep, req);
2045         } else {
2046                 mpkt = ep->ep.maxpacket;
2047                 size = preq->actual % mpkt;
2048                 if (size > 0) {
2049                         if (((preq->actual & 0x03) == 0) && (size < mpkt))
2050                                 _nbu2ss_ep_in_end(udc, ep->epnum, 0, 0);
2051                 } else {
2052                         _nbu2ss_epn_in_int(udc, ep, req);
2053                 }
2054         }
2055 }
2056
2057 /*-------------------------------------------------------------------------*/
2058 static inline void _nbu2ss_epn_out_dma_int(
2059         struct nbu2ss_udc *udc,
2060         struct nbu2ss_ep *ep,
2061         struct nbu2ss_req *req)
2062 {
2063         int             i;
2064         u32             num;
2065         u32             dmacnt, ep_dmacnt;
2066         u32             mpkt;
2067         struct fc_regs  *preg = udc->p_regs;
2068
2069         num = ep->epnum - 1;
2070
2071         if (req->req.actual == req->req.length) {
2072                 if ((req->req.length % ep->ep.maxpacket) && !req->zero) {
2073                         req->div_len = 0;
2074                         req->dma_flag = FALSE;
2075                         _nbu2ss_ep_done(ep, req, 0);
2076                         return;
2077                 }
2078         }
2079
2080         ep_dmacnt = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT)
2081                  & EPn_DMACNT;
2082         ep_dmacnt >>= 16;
2083
2084         for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2085                 dmacnt = _nbu2ss_readl(&preg->EP_DCR[num].EP_DCR1)
2086                          & DCR1_EPn_DMACNT;
2087                 dmacnt >>= 16;
2088                 if (ep_dmacnt == dmacnt)
2089                         break;
2090         }
2091
2092         _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_REQEN);
2093
2094         if (dmacnt != 0) {
2095                 mpkt = ep->ep.maxpacket;
2096                 if ((req->div_len % mpkt) == 0)
2097                         req->div_len -= mpkt * dmacnt;
2098         }
2099
2100         if ((req->req.actual % ep->ep.maxpacket) > 0) {
2101                 if (req->req.actual == req->div_len) {
2102                         req->div_len = 0;
2103                         req->dma_flag = FALSE;
2104                         _nbu2ss_ep_done(ep, req, 0);
2105                         return;
2106                 }
2107         }
2108
2109         req->req.actual += req->div_len;
2110         req->div_len = 0;
2111         req->dma_flag = FALSE;
2112
2113         _nbu2ss_epn_out_int(udc, ep, req);
2114 }
2115
2116 /*-------------------------------------------------------------------------*/
2117 static inline void _nbu2ss_epn_int(struct nbu2ss_udc *udc, u32 epnum)
2118 {
2119         u32     num;
2120         u32     status;
2121
2122         struct nbu2ss_req       *req;
2123         struct nbu2ss_ep        *ep = &udc->ep[epnum];
2124
2125         num = epnum - 1;
2126
2127         /* Interrupt Status */
2128         status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
2129
2130         /* Interrupt Clear */
2131         _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_STATUS, ~(u32)status);
2132
2133         req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
2134         if (!req) {
2135                 /* pr_warn("=== %s(%d) req == NULL\n", __func__, epnum); */
2136                 return;
2137         }
2138
2139         if (status & EPn_OUT_END_INT) {
2140                 status &= ~EPn_OUT_INT;
2141                 _nbu2ss_epn_out_dma_int(udc, ep, req);
2142         }
2143
2144         if (status & EPn_OUT_INT)
2145                 _nbu2ss_epn_out_int(udc, ep, req);
2146
2147         if (status & EPn_IN_END_INT) {
2148                 status &= ~EPn_IN_INT;
2149                 _nbu2ss_epn_in_dma_int(udc, ep, req);
2150         }
2151
2152         if (status & EPn_IN_INT)
2153                 _nbu2ss_epn_in_int(udc, ep, req);
2154 }
2155
2156 /*-------------------------------------------------------------------------*/
2157 static inline void _nbu2ss_ep_int(struct nbu2ss_udc *udc, u32 epnum)
2158 {
2159         if (epnum == 0)
2160                 _nbu2ss_ep0_int(udc);
2161         else
2162                 _nbu2ss_epn_int(udc, epnum);
2163 }
2164
2165 /*-------------------------------------------------------------------------*/
2166 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *udc)
2167 {
2168         _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, (EP0_AUTO | EP0_BCLR));
2169         _nbu2ss_writel(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
2170 }
2171
2172 /*-------------------------------------------------------------------------*/
2173 static int _nbu2ss_nuke(struct nbu2ss_udc *udc,
2174                         struct nbu2ss_ep *ep,
2175                         int status)
2176 {
2177         struct nbu2ss_req *req;
2178
2179         /* Endpoint Disable */
2180         _nbu2ss_epn_exit(udc, ep);
2181
2182         /* DMA Disable */
2183         _nbu2ss_ep_dma_exit(udc, ep);
2184
2185         if (list_empty(&ep->queue))
2186                 return 0;
2187
2188         /* called with irqs blocked */
2189         list_for_each_entry(req, &ep->queue, queue) {
2190                 _nbu2ss_ep_done(ep, req, status);
2191         }
2192
2193         return 0;
2194 }
2195
2196 /*-------------------------------------------------------------------------*/
2197 static void _nbu2ss_quiesce(struct nbu2ss_udc *udc)
2198 {
2199         struct nbu2ss_ep        *ep;
2200
2201         udc->gadget.speed = USB_SPEED_UNKNOWN;
2202
2203         _nbu2ss_nuke(udc, &udc->ep[0], -ESHUTDOWN);
2204
2205         /* Endpoint n */
2206         list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2207                 _nbu2ss_nuke(udc, ep, -ESHUTDOWN);
2208         }
2209 }
2210
2211 /*-------------------------------------------------------------------------*/
2212 static int _nbu2ss_pullup(struct nbu2ss_udc *udc, int is_on)
2213 {
2214         u32     reg_dt;
2215
2216         if (udc->vbus_active == 0)
2217                 return -ESHUTDOWN;
2218
2219         if (is_on) {
2220                 /* D+ Pullup */
2221                 if (udc->driver) {
2222                         reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL)
2223                                 | PUE2) & ~(u32)CONNECTB;
2224
2225                         _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2226                 }
2227
2228         } else {
2229                 /* D+ Pulldown */
2230                 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL) | CONNECTB)
2231                         & ~(u32)PUE2;
2232
2233                 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2234                 udc->gadget.speed = USB_SPEED_UNKNOWN;
2235         }
2236
2237         return 0;
2238 }
2239
2240 /*-------------------------------------------------------------------------*/
2241 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
2242 {
2243         struct fc_regs  *p = udc->p_regs;
2244
2245         if (udc->vbus_active == 0)
2246                 return;
2247
2248         if (ep->epnum == 0) {
2249                 /* EP0 */
2250                 _nbu2ss_bitset(&p->EP0_CONTROL, EP0_BCLR);
2251
2252         } else {
2253                 /* EPn */
2254                 _nbu2ss_ep_dma_abort(udc, ep);
2255                 _nbu2ss_bitset(&p->EP_REGS[ep->epnum - 1].EP_CONTROL, EPn_BCLR);
2256         }
2257 }
2258
2259 /*-------------------------------------------------------------------------*/
2260 static int _nbu2ss_enable_controller(struct nbu2ss_udc *udc)
2261 {
2262         int     waitcnt = 0;
2263
2264         if (udc->udc_enabled)
2265                 return 0;
2266
2267         /*
2268                 Reset
2269         */
2270         _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2271         udelay(EPC_RST_DISABLE_TIME);   /* 1us wait */
2272
2273         _nbu2ss_bitclr(&udc->p_regs->EPCTR, DIRPD);
2274         mdelay(EPC_DIRPD_DISABLE_TIME); /* 1ms wait */
2275
2276         _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2277
2278         _nbu2ss_writel(&udc->p_regs->AHBSCTR, WAIT_MODE);
2279
2280                 _nbu2ss_writel(&udc->p_regs->AHBMCTR,
2281                                HBUSREQ_MODE | HTRANS_MODE | WBURST_TYPE);
2282
2283         while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) {
2284                 waitcnt++;
2285                 udelay(1);      /* 1us wait */
2286                 if (waitcnt == EPC_PLL_LOCK_COUNT) {
2287                         dev_err(udc->dev, "*** Reset Cancel failed\n");
2288                         return -EINVAL;
2289                 }
2290         }
2291
2292                 _nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);
2293
2294         _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV));
2295
2296         /* EP0 */
2297         _nbu2ss_ep0_enable(udc);
2298
2299         /* USB Interrupt Enable */
2300         _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, USB_INT_EN_BIT);
2301
2302         udc->udc_enabled = TRUE;
2303
2304         return 0;
2305 }
2306
2307 /*-------------------------------------------------------------------------*/
2308 static void _nbu2ss_reset_controller(struct nbu2ss_udc *udc)
2309 {
2310         _nbu2ss_bitset(&udc->p_regs->EPCTR, EPC_RST);
2311         _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2312 }
2313
2314 /*-------------------------------------------------------------------------*/
2315 static void _nbu2ss_disable_controller(struct nbu2ss_udc *udc)
2316 {
2317         if (udc->udc_enabled) {
2318                 udc->udc_enabled = FALSE;
2319                 _nbu2ss_reset_controller(udc);
2320                 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2321         }
2322 }
2323
2324 /*-------------------------------------------------------------------------*/
2325 static inline void _nbu2ss_check_vbus(struct nbu2ss_udc *udc)
2326 {
2327         int     nret;
2328         u32     reg_dt;
2329
2330         /* chattering */
2331         mdelay(VBUS_CHATTERING_MDELAY);         /* wait (ms) */
2332
2333         /* VBUS ON Check*/
2334         reg_dt = gpio_get_value(VBUS_VALUE);
2335         if (reg_dt == 0) {
2336
2337                 udc->linux_suspended = 0;
2338
2339                 _nbu2ss_reset_controller(udc);
2340                 dev_info(udc->dev, " ----- VBUS OFF\n");
2341
2342                 if (udc->vbus_active == 1) {
2343                         /* VBUS OFF */
2344                         udc->vbus_active = 0;
2345                         if (udc->usb_suspended) {
2346                                 udc->usb_suspended = 0;
2347                                 /* _nbu2ss_reset_controller(udc); */
2348                         }
2349                         udc->devstate = USB_STATE_NOTATTACHED;
2350
2351                         _nbu2ss_quiesce(udc);
2352                         if (udc->driver) {
2353                                 spin_unlock(&udc->lock);
2354                                 udc->driver->disconnect(&udc->gadget);
2355                                 spin_lock(&udc->lock);
2356                         }
2357
2358                         _nbu2ss_disable_controller(udc);
2359                 }
2360         } else {
2361                 mdelay(5);              /* wait (5ms) */
2362                 reg_dt = gpio_get_value(VBUS_VALUE);
2363                 if (reg_dt == 0)
2364                         return;
2365
2366                 dev_info(udc->dev, " ----- VBUS ON\n");
2367
2368                 if (udc->linux_suspended)
2369                         return;
2370
2371                 if (udc->vbus_active == 0) {
2372                         /* VBUS ON */
2373                         udc->vbus_active = 1;
2374                         udc->devstate = USB_STATE_POWERED;
2375
2376                         nret = _nbu2ss_enable_controller(udc);
2377                         if (nret < 0) {
2378                                 _nbu2ss_disable_controller(udc);
2379                                 udc->vbus_active = 0;
2380                                 return;
2381                         }
2382
2383                         _nbu2ss_pullup(udc, 1);
2384
2385 #ifdef UDC_DEBUG_DUMP
2386                         _nbu2ss_dump_register(udc);
2387 #endif /* UDC_DEBUG_DUMP */
2388
2389                 } else {
2390                         if (udc->devstate == USB_STATE_POWERED)
2391                                 _nbu2ss_pullup(udc, 1);
2392                 }
2393         }
2394 }
2395
2396 /*-------------------------------------------------------------------------*/
2397 static inline void _nbu2ss_int_bus_reset(struct nbu2ss_udc *udc)
2398 {
2399         udc->devstate           = USB_STATE_DEFAULT;
2400         udc->remote_wakeup      = 0;
2401
2402         _nbu2ss_quiesce(udc);
2403
2404         udc->ep0state = EP0_IDLE;
2405 }
2406
2407 /*-------------------------------------------------------------------------*/
2408 static inline void _nbu2ss_int_usb_resume(struct nbu2ss_udc *udc)
2409 {
2410         if (udc->usb_suspended == 1) {
2411                 udc->usb_suspended = 0;
2412                 if (udc->driver && udc->driver->resume) {
2413                         spin_unlock(&udc->lock);
2414                         udc->driver->resume(&udc->gadget);
2415                         spin_lock(&udc->lock);
2416                 }
2417         }
2418 }
2419
2420 /*-------------------------------------------------------------------------*/
2421 static inline void _nbu2ss_int_usb_suspend(struct nbu2ss_udc *udc)
2422 {
2423         u32     reg_dt;
2424
2425         if (udc->usb_suspended == 0) {
2426                 reg_dt = gpio_get_value(VBUS_VALUE);
2427
2428                 if (reg_dt == 0)
2429                         return;
2430
2431                 udc->usb_suspended = 1;
2432                 if (udc->driver && udc->driver->suspend) {
2433                         spin_unlock(&udc->lock);
2434                         udc->driver->suspend(&udc->gadget);
2435                         spin_lock(&udc->lock);
2436                 }
2437
2438                 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, SUSPEND);
2439         }
2440 }
2441
2442 /*-------------------------------------------------------------------------*/
2443 /* VBUS (GPIO153) Interrupt */
2444 static irqreturn_t _nbu2ss_vbus_irq(int irq, void *_udc)
2445 {
2446         struct nbu2ss_udc       *udc = (struct nbu2ss_udc *)_udc;
2447
2448         spin_lock(&udc->lock);
2449         _nbu2ss_check_vbus(udc);
2450         spin_unlock(&udc->lock);
2451
2452         return IRQ_HANDLED;
2453 }
2454
2455 /*-------------------------------------------------------------------------*/
2456 /* Interrupt (udc) */
2457 static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc)
2458 {
2459         u8      suspend_flag = 0;
2460         u32     status;
2461         u32     epnum, int_bit;
2462
2463         struct nbu2ss_udc       *udc = (struct nbu2ss_udc *)_udc;
2464         struct fc_regs  *preg = udc->p_regs;
2465
2466         if (gpio_get_value(VBUS_VALUE) == 0) {
2467                 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2468                 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2469                 return IRQ_HANDLED;
2470         }
2471
2472         spin_lock(&udc->lock);
2473
2474         for (;;) {
2475                 if (gpio_get_value(VBUS_VALUE) == 0) {
2476                         _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2477                         _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2478                         status = 0;
2479                 } else
2480                         status = _nbu2ss_readl(&preg->USB_INT_STA);
2481
2482                 if (status == 0)
2483                         break;
2484
2485                 _nbu2ss_writel(&preg->USB_INT_STA, ~(status & USB_INT_STA_RW));
2486
2487                 if (status & USB_RST_INT) {
2488                         /* USB Reset */
2489                         _nbu2ss_int_bus_reset(udc);
2490                 }
2491
2492                 if (status & RSUM_INT) {
2493                         /* Resume */
2494                         _nbu2ss_int_usb_resume(udc);
2495                 }
2496
2497                 if (status & SPND_INT) {
2498                         /* Suspend */
2499                         suspend_flag = 1;
2500                 }
2501
2502                 if (status & EPn_INT) {
2503                         /* EP INT */
2504                         int_bit = status >> 8;
2505
2506                         for (epnum = 0; epnum < NUM_ENDPOINTS; epnum++) {
2507
2508                                 if (0x01 & int_bit)
2509                                         _nbu2ss_ep_int(udc, epnum);
2510
2511                                 int_bit >>= 1;
2512
2513                                 if (int_bit == 0)
2514                                         break;
2515                         }
2516                 }
2517         }
2518
2519         if (suspend_flag)
2520                 _nbu2ss_int_usb_suspend(udc);
2521
2522         spin_unlock(&udc->lock);
2523
2524         return IRQ_HANDLED;
2525 }
2526
2527 /*-------------------------------------------------------------------------*/
2528 /* usb_ep_ops */
2529 static int nbu2ss_ep_enable(
2530         struct usb_ep *_ep,
2531         const struct usb_endpoint_descriptor *desc)
2532 {
2533         u8              ep_type;
2534         unsigned long   flags;
2535
2536         struct nbu2ss_ep        *ep;
2537         struct nbu2ss_udc       *udc;
2538
2539         if ((!_ep) || (!desc)) {
2540                 pr_err(" *** %s, bad param\n", __func__);
2541                 return -EINVAL;
2542         }
2543
2544         ep = container_of(_ep, struct nbu2ss_ep, ep);
2545         if ((!ep) || (!ep->udc)) {
2546                 pr_err(" *** %s, ep == NULL !!\n", __func__);
2547                 return -EINVAL;
2548         }
2549
2550         ep_type = usb_endpoint_type(desc);
2551         if ((ep_type == USB_ENDPOINT_XFER_CONTROL)
2552                 || (ep_type == USB_ENDPOINT_XFER_ISOC)) {
2553
2554                 pr_err(" *** %s, bat bmAttributes\n", __func__);
2555                 return -EINVAL;
2556         }
2557
2558         udc = ep->udc;
2559         if (udc->vbus_active == 0)
2560                 return -ESHUTDOWN;
2561
2562         if ((!udc->driver)
2563                 || (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
2564
2565                 dev_err(ep->udc->dev, " *** %s, udc !!\n", __func__);
2566                 return -ESHUTDOWN;
2567         }
2568
2569         spin_lock_irqsave(&udc->lock, flags);
2570
2571         ep->desc = desc;
2572         ep->epnum = usb_endpoint_num(desc);
2573         ep->direct = desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
2574         ep->ep_type = ep_type;
2575         ep->wedged = 0;
2576         ep->halted = FALSE;
2577         ep->stalled = FALSE;
2578
2579         ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
2580
2581         /* DMA setting */
2582         _nbu2ss_ep_dma_init(udc, ep);
2583
2584         /* Endpoint setting */
2585         _nbu2ss_ep_init(udc, ep);
2586
2587         spin_unlock_irqrestore(&udc->lock, flags);
2588
2589         return 0;
2590 }
2591
2592 /*-------------------------------------------------------------------------*/
2593 static int nbu2ss_ep_disable(struct usb_ep *_ep)
2594 {
2595         struct nbu2ss_ep        *ep;
2596         struct nbu2ss_udc       *udc;
2597         unsigned long           flags;
2598
2599         if (!_ep) {
2600                 pr_err(" *** %s, bad param\n", __func__);
2601                 return -EINVAL;
2602         }
2603
2604         ep = container_of(_ep, struct nbu2ss_ep, ep);
2605         if ((!ep) || (!ep->udc)) {
2606                 pr_err("udc: *** %s, ep == NULL !!\n", __func__);
2607                 return -EINVAL;
2608         }
2609
2610         udc = ep->udc;
2611         if (udc->vbus_active == 0)
2612                 return -ESHUTDOWN;
2613
2614         spin_lock_irqsave(&udc->lock, flags);
2615         _nbu2ss_nuke(udc, ep, -EINPROGRESS);            /* dequeue request */
2616         spin_unlock_irqrestore(&udc->lock, flags);
2617
2618         return 0;
2619 }
2620
2621 /*-------------------------------------------------------------------------*/
2622 static struct usb_request *nbu2ss_ep_alloc_request(
2623         struct usb_ep *ep,
2624         gfp_t gfp_flags)
2625 {
2626         struct nbu2ss_req *req;
2627
2628         req = kzalloc(sizeof(*req), gfp_flags);
2629         if (!req)
2630                 return NULL;
2631
2632 #ifdef USE_DMA
2633         req->req.dma = DMA_ADDR_INVALID;
2634 #endif
2635         INIT_LIST_HEAD(&req->queue);
2636
2637         return &req->req;
2638 }
2639
2640 /*-------------------------------------------------------------------------*/
2641 static void nbu2ss_ep_free_request(
2642         struct usb_ep *_ep,
2643         struct usb_request *_req)
2644 {
2645         struct nbu2ss_req *req;
2646
2647         if (_req) {
2648                 req = container_of(_req, struct nbu2ss_req, req);
2649
2650                 kfree(req);
2651         }
2652 }
2653
2654 /*-------------------------------------------------------------------------*/
2655 static int nbu2ss_ep_queue(
2656         struct usb_ep *_ep,
2657         struct usb_request *_req,
2658         gfp_t gfp_flags)
2659 {
2660         struct nbu2ss_req       *req;
2661         struct nbu2ss_ep        *ep;
2662         struct nbu2ss_udc       *udc;
2663         unsigned long           flags;
2664         bool                    bflag;
2665         int                     result = -EINVAL;
2666
2667         /* catch various bogus parameters */
2668         if ((!_ep) || (!_req)) {
2669                 if (!_ep)
2670                         pr_err("udc: %s --- _ep == NULL\n", __func__);
2671
2672                 if (!_req)
2673                         pr_err("udc: %s --- _req == NULL\n", __func__);
2674
2675                 return -EINVAL;
2676         }
2677
2678         req = container_of(_req, struct nbu2ss_req, req);
2679         if (unlikely
2680             (!_req->complete || !_req->buf
2681              || !list_empty(&req->queue))) {
2682
2683                 if (!_req->complete)
2684                         pr_err("udc: %s --- !_req->complete\n", __func__);
2685
2686                 if (!_req->buf)
2687                         pr_err("udc:%s --- !_req->buf\n", __func__);
2688
2689                 if (!list_empty(&req->queue))
2690                         pr_err("%s --- !list_empty(&req->queue)\n", __func__);
2691
2692                 return -EINVAL;
2693         }
2694
2695         ep = container_of(_ep, struct nbu2ss_ep, ep);
2696         udc = ep->udc;
2697
2698         if (udc->vbus_active == 0) {
2699                 dev_info(udc->dev, "Can't ep_queue (VBUS OFF)\n");
2700                 return -ESHUTDOWN;
2701         }
2702
2703         if (unlikely(!udc->driver)) {
2704                 dev_err(udc->dev, "%s, bogus device state %p\n", __func__,
2705                         udc->driver);
2706                 return -ESHUTDOWN;
2707         }
2708
2709         spin_lock_irqsave(&udc->lock, flags);
2710
2711 #ifdef USE_DMA
2712         if ((uintptr_t)req->req.buf & 0x3)
2713                 req->unaligned = TRUE;
2714         else
2715                 req->unaligned = FALSE;
2716
2717         if (req->unaligned) {
2718                 if (!ep->virt_buf)
2719                         ep->virt_buf = (u8 *)dma_alloc_coherent(
2720                                 NULL, PAGE_SIZE,
2721                                 &ep->phys_buf, GFP_ATOMIC | GFP_DMA);
2722                 if (ep->epnum > 0)  {
2723                         if (ep->direct == USB_DIR_IN)
2724                                 memcpy(ep->virt_buf, req->req.buf,
2725                                        req->req.length);
2726                 }
2727         }
2728
2729         if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT) &&
2730             (req->req.dma != 0))
2731                 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_OUT);
2732 #endif
2733
2734         _req->status = -EINPROGRESS;
2735         _req->actual = 0;
2736
2737         bflag = list_empty(&ep->queue);
2738         list_add_tail(&req->queue, &ep->queue);
2739
2740         if (bflag && !ep->stalled) {
2741
2742                 result = _nbu2ss_start_transfer(udc, ep, req, FALSE);
2743                 if (result < 0) {
2744                         dev_err(udc->dev, " *** %s, result = %d\n", __func__,
2745                                 result);
2746                         list_del(&req->queue);
2747                 } else if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT)) {
2748 #ifdef USE_DMA
2749                         if (req->req.length < 4 &&
2750                             req->req.length == req->req.actual)
2751 #else
2752                         if (req->req.length == req->req.actual)
2753 #endif
2754                                 _nbu2ss_ep_done(ep, req, result);
2755                 }
2756         }
2757
2758         spin_unlock_irqrestore(&udc->lock, flags);
2759
2760         return 0;
2761 }
2762
2763 /*-------------------------------------------------------------------------*/
2764 static int nbu2ss_ep_dequeue(
2765         struct usb_ep *_ep,
2766         struct usb_request *_req)
2767 {
2768         struct nbu2ss_req       *req;
2769         struct nbu2ss_ep        *ep;
2770         struct nbu2ss_udc       *udc;
2771         unsigned long flags;
2772
2773         /* catch various bogus parameters */
2774         if ((!_ep) || (!_req)) {
2775                 /* pr_err("%s, bad param(1)\n", __func__); */
2776                 return -EINVAL;
2777         }
2778
2779         ep = container_of(_ep, struct nbu2ss_ep, ep);
2780         if (!ep) {
2781                 pr_err("%s, ep == NULL !!\n", __func__);
2782                 return -EINVAL;
2783         }
2784
2785         udc = ep->udc;
2786         if (!udc)
2787                 return -EINVAL;
2788
2789         spin_lock_irqsave(&udc->lock, flags);
2790
2791         /* make sure it's actually queued on this endpoint */
2792         list_for_each_entry(req, &ep->queue, queue) {
2793                 if (&req->req == _req)
2794                         break;
2795         }
2796         if (&req->req != _req) {
2797                 spin_unlock_irqrestore(&udc->lock, flags);
2798                 pr_debug("%s no queue(EINVAL)\n", __func__);
2799                 return -EINVAL;
2800         }
2801
2802         _nbu2ss_ep_done(ep, req, -ECONNRESET);
2803
2804         spin_unlock_irqrestore(&udc->lock, flags);
2805
2806         return 0;
2807 }
2808
2809 /*-------------------------------------------------------------------------*/
2810 static int nbu2ss_ep_set_halt(struct usb_ep *_ep, int value)
2811 {
2812         u8              ep_adrs;
2813         unsigned long   flags;
2814
2815         struct nbu2ss_ep        *ep;
2816         struct nbu2ss_udc       *udc;
2817
2818         if (!_ep) {
2819                 pr_err("%s, bad param\n", __func__);
2820                 return -EINVAL;
2821         }
2822
2823         ep = container_of(_ep, struct nbu2ss_ep, ep);
2824         if (!ep) {
2825                 pr_err("%s, bad ep\n", __func__);
2826                 return -EINVAL;
2827         }
2828
2829         udc = ep->udc;
2830         if (!udc) {
2831                 dev_err(ep->udc->dev, " *** %s, bad udc\n", __func__);
2832                 return -EINVAL;
2833         }
2834
2835         spin_lock_irqsave(&udc->lock, flags);
2836
2837         ep_adrs = ep->epnum | ep->direct;
2838         if (value == 0) {
2839                 _nbu2ss_set_endpoint_stall(udc, ep_adrs, value);
2840                 ep->stalled = FALSE;
2841         } else {
2842                 if (list_empty(&ep->queue))
2843                         _nbu2ss_epn_set_stall(udc, ep);
2844                 else
2845                         ep->stalled = TRUE;
2846         }
2847
2848         if (value == 0)
2849                 ep->wedged = 0;
2850
2851         spin_unlock_irqrestore(&udc->lock, flags);
2852
2853         return 0;
2854 }
2855
2856 static int nbu2ss_ep_set_wedge(struct usb_ep *_ep)
2857 {
2858         return nbu2ss_ep_set_halt(_ep, 1);
2859 }
2860
2861 /*-------------------------------------------------------------------------*/
2862 static int nbu2ss_ep_fifo_status(struct usb_ep *_ep)
2863 {
2864         u32             data;
2865         struct nbu2ss_ep        *ep;
2866         struct nbu2ss_udc       *udc;
2867         unsigned long           flags;
2868         struct fc_regs          *preg;
2869
2870         if (!_ep) {
2871                 pr_err("%s, bad param\n", __func__);
2872                 return -EINVAL;
2873         }
2874
2875         ep = container_of(_ep, struct nbu2ss_ep, ep);
2876         if (!ep) {
2877                 pr_err("%s, bad ep\n", __func__);
2878                 return -EINVAL;
2879         }
2880
2881         udc = ep->udc;
2882         if (!udc) {
2883                 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2884                 return -EINVAL;
2885         }
2886
2887         preg = udc->p_regs;
2888
2889         data = gpio_get_value(VBUS_VALUE);
2890         if (data == 0)
2891                 return -EINVAL;
2892
2893         spin_lock_irqsave(&udc->lock, flags);
2894
2895         if (ep->epnum == 0) {
2896                 data = _nbu2ss_readl(&preg->EP0_LENGTH) & EP0_LDATA;
2897
2898         } else {
2899                 data = _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_LEN_DCNT)
2900                         & EPn_LDATA;
2901         }
2902
2903         spin_unlock_irqrestore(&udc->lock, flags);
2904
2905         return 0;
2906 }
2907
2908 /*-------------------------------------------------------------------------*/
2909 static void  nbu2ss_ep_fifo_flush(struct usb_ep *_ep)
2910 {
2911         u32                     data;
2912         struct nbu2ss_ep        *ep;
2913         struct nbu2ss_udc       *udc;
2914         unsigned long           flags;
2915
2916         if (!_ep) {
2917                 pr_err("udc: %s, bad param\n", __func__);
2918                 return;
2919         }
2920
2921         ep = container_of(_ep, struct nbu2ss_ep, ep);
2922         if (!ep) {
2923                 pr_err("udc: %s, bad ep\n", __func__);
2924                 return;
2925         }
2926
2927         udc = ep->udc;
2928         if (!udc) {
2929                 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2930                 return;
2931         }
2932
2933         data = gpio_get_value(VBUS_VALUE);
2934         if (data == 0)
2935                 return;
2936
2937         spin_lock_irqsave(&udc->lock, flags);
2938         _nbu2ss_fifo_flush(udc, ep);
2939         spin_unlock_irqrestore(&udc->lock, flags);
2940 }
2941
2942 /*-------------------------------------------------------------------------*/
2943 static struct usb_ep_ops nbu2ss_ep_ops = {
2944         .enable         = nbu2ss_ep_enable,
2945         .disable        = nbu2ss_ep_disable,
2946
2947         .alloc_request  = nbu2ss_ep_alloc_request,
2948         .free_request   = nbu2ss_ep_free_request,
2949
2950         .queue          = nbu2ss_ep_queue,
2951         .dequeue        = nbu2ss_ep_dequeue,
2952
2953         .set_halt       = nbu2ss_ep_set_halt,
2954         .set_wedge      = nbu2ss_ep_set_wedge,
2955
2956         .fifo_status    = nbu2ss_ep_fifo_status,
2957         .fifo_flush     = nbu2ss_ep_fifo_flush,
2958 };
2959
2960 /*-------------------------------------------------------------------------*/
2961 /* usb_gadget_ops */
2962
2963 /*-------------------------------------------------------------------------*/
2964 static int nbu2ss_gad_get_frame(struct usb_gadget *pgadget)
2965 {
2966         u32                     data;
2967         struct nbu2ss_udc       *udc;
2968
2969         if (!pgadget) {
2970                 pr_err("udc: %s, bad param\n", __func__);
2971                 return -EINVAL;
2972         }
2973
2974         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2975         if (!udc) {
2976                 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
2977                 return -EINVAL;
2978         }
2979
2980         data = gpio_get_value(VBUS_VALUE);
2981         if (data == 0)
2982                 return -EINVAL;
2983
2984         data = _nbu2ss_readl(&udc->p_regs->USB_ADDRESS) & FRAME;
2985
2986         return data;
2987 }
2988
2989 /*-------------------------------------------------------------------------*/
2990 static int nbu2ss_gad_wakeup(struct usb_gadget *pgadget)
2991 {
2992         int     i;
2993         u32     data;
2994
2995         struct nbu2ss_udc       *udc;
2996
2997         if (!pgadget) {
2998                 pr_err("%s, bad param\n", __func__);
2999                 return -EINVAL;
3000         }
3001
3002         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3003         if (!udc) {
3004                 dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
3005                 return -EINVAL;
3006         }
3007
3008         data = gpio_get_value(VBUS_VALUE);
3009         if (data == 0) {
3010                 dev_warn(&pgadget->dev, "VBUS LEVEL = %d\n", data);
3011                 return -EINVAL;
3012         }
3013
3014         _nbu2ss_bitset(&udc->p_regs->EPCTR, PLL_RESUME);
3015
3016         for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
3017                 data = _nbu2ss_readl(&udc->p_regs->EPCTR);
3018
3019                 if (data & PLL_LOCK)
3020                         break;
3021         }
3022
3023         _nbu2ss_bitclr(&udc->p_regs->EPCTR, PLL_RESUME);
3024
3025         return 0;
3026 }
3027
3028 /*-------------------------------------------------------------------------*/
3029 static int nbu2ss_gad_set_selfpowered(struct usb_gadget *pgadget,
3030                                       int is_selfpowered)
3031 {
3032         struct nbu2ss_udc       *udc;
3033         unsigned long           flags;
3034
3035         if (!pgadget) {
3036                 pr_err("%s, bad param\n", __func__);
3037                 return -EINVAL;
3038         }
3039
3040         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3041
3042         spin_lock_irqsave(&udc->lock, flags);
3043         pgadget->is_selfpowered = (is_selfpowered != 0);
3044         spin_unlock_irqrestore(&udc->lock, flags);
3045
3046         return 0;
3047 }
3048
3049 /*-------------------------------------------------------------------------*/
3050 static int nbu2ss_gad_vbus_session(struct usb_gadget *pgadget, int is_active)
3051 {
3052         return 0;
3053 }
3054
3055 /*-------------------------------------------------------------------------*/
3056 static int nbu2ss_gad_vbus_draw(struct usb_gadget *pgadget, unsigned int mA)
3057 {
3058         struct nbu2ss_udc       *udc;
3059         unsigned long           flags;
3060
3061         if (!pgadget) {
3062                 pr_err("%s, bad param\n", __func__);
3063                 return -EINVAL;
3064         }
3065
3066         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3067
3068         spin_lock_irqsave(&udc->lock, flags);
3069         udc->mA = mA;
3070         spin_unlock_irqrestore(&udc->lock, flags);
3071
3072         return 0;
3073 }
3074
3075 /*-------------------------------------------------------------------------*/
3076 static int nbu2ss_gad_pullup(struct usb_gadget *pgadget, int is_on)
3077 {
3078         struct nbu2ss_udc       *udc;
3079         unsigned long           flags;
3080
3081         if (!pgadget) {
3082                 pr_err("%s, bad param\n", __func__);
3083                 return -EINVAL;
3084         }
3085
3086         udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3087
3088         if (!udc->driver) {
3089                 pr_warn("%s, Not Regist Driver\n", __func__);
3090                 return -EINVAL;
3091         }
3092
3093         if (udc->vbus_active == 0)
3094                 return -ESHUTDOWN;
3095
3096         spin_lock_irqsave(&udc->lock, flags);
3097         _nbu2ss_pullup(udc, is_on);
3098         spin_unlock_irqrestore(&udc->lock, flags);
3099
3100         return 0;
3101 }
3102
3103 /*-------------------------------------------------------------------------*/
3104 static int nbu2ss_gad_ioctl(
3105         struct usb_gadget *pgadget,
3106         unsigned int code,
3107         unsigned long param)
3108 {
3109         return 0;
3110 }
3111
3112 static const struct usb_gadget_ops nbu2ss_gadget_ops = {
3113         .get_frame              = nbu2ss_gad_get_frame,
3114         .wakeup                 = nbu2ss_gad_wakeup,
3115         .set_selfpowered        = nbu2ss_gad_set_selfpowered,
3116         .vbus_session           = nbu2ss_gad_vbus_session,
3117         .vbus_draw              = nbu2ss_gad_vbus_draw,
3118         .pullup                 = nbu2ss_gad_pullup,
3119         .ioctl                  = nbu2ss_gad_ioctl,
3120 };
3121
3122 static const struct {
3123         const char *name;
3124         const struct usb_ep_caps caps;
3125 } ep_info[NUM_ENDPOINTS] = {
3126 #define EP_INFO(_name, _caps) \
3127         { \
3128                 .name = _name, \
3129                 .caps = _caps, \
3130         }
3131
3132         EP_INFO("ep0",
3133                 USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
3134         EP_INFO("ep1-bulk",
3135                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3136         EP_INFO("ep2-bulk",
3137                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3138         EP_INFO("ep3in-int",
3139                 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3140         EP_INFO("ep4-iso",
3141                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3142         EP_INFO("ep5-iso",
3143                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3144         EP_INFO("ep6-bulk",
3145                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3146         EP_INFO("ep7-bulk",
3147                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3148         EP_INFO("ep8in-int",
3149                 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3150         EP_INFO("ep9-iso",
3151                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3152         EP_INFO("epa-iso",
3153                 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
3154         EP_INFO("epb-bulk",
3155                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3156         EP_INFO("epc-bulk",
3157                 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3158         EP_INFO("epdin-int",
3159                 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3160
3161 #undef EP_INFO
3162 };
3163
3164 /*-------------------------------------------------------------------------*/
3165 static void __init nbu2ss_drv_ep_init(struct nbu2ss_udc *udc)
3166 {
3167         int     i;
3168
3169         INIT_LIST_HEAD(&udc->gadget.ep_list);
3170         udc->gadget.ep0 = &udc->ep[0].ep;
3171
3172         for (i = 0; i < NUM_ENDPOINTS; i++) {
3173                 struct nbu2ss_ep *ep = &udc->ep[i];
3174
3175                 ep->udc = udc;
3176                 ep->desc = NULL;
3177
3178                 ep->ep.driver_data = NULL;
3179                 ep->ep.name = ep_info[i].name;
3180                 ep->ep.caps = ep_info[i].caps;
3181                 ep->ep.ops = &nbu2ss_ep_ops;
3182
3183                 usb_ep_set_maxpacket_limit(&ep->ep,
3184                                            i == 0 ? EP0_PACKETSIZE
3185                                            : EP_PACKETSIZE);
3186
3187                 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
3188                 INIT_LIST_HEAD(&ep->queue);
3189         }
3190
3191         list_del_init(&udc->ep[0].ep.ep_list);
3192 }
3193
3194 /*-------------------------------------------------------------------------*/
3195 /* platform_driver */
3196 static int __init nbu2ss_drv_contest_init(
3197         struct platform_device *pdev,
3198         struct nbu2ss_udc *udc)
3199 {
3200         spin_lock_init(&udc->lock);
3201         udc->dev = &pdev->dev;
3202
3203         udc->gadget.is_selfpowered = 1;
3204         udc->devstate = USB_STATE_NOTATTACHED;
3205         udc->pdev = pdev;
3206         udc->mA = 0;
3207
3208         udc->pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
3209
3210         /* init Endpoint */
3211         nbu2ss_drv_ep_init(udc);
3212
3213         /* init Gadget */
3214         udc->gadget.ops = &nbu2ss_gadget_ops;
3215         udc->gadget.ep0 = &udc->ep[0].ep;
3216         udc->gadget.speed = USB_SPEED_UNKNOWN;
3217         udc->gadget.name = driver_name;
3218         /* udc->gadget.is_dualspeed = 1; */
3219
3220         device_initialize(&udc->gadget.dev);
3221
3222         dev_set_name(&udc->gadget.dev, "gadget");
3223         udc->gadget.dev.parent = &pdev->dev;
3224         udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
3225
3226         return 0;
3227 }
3228
3229 /*
3230  *      probe - binds to the platform device
3231  */
3232 static int nbu2ss_drv_probe(struct platform_device *pdev)
3233 {
3234         int     status = -ENODEV;
3235         struct nbu2ss_udc       *udc;
3236         struct resource *r;
3237         int irq;
3238         void __iomem *mmio_base;
3239
3240         udc = &udc_controller;
3241         memset(udc, 0, sizeof(struct nbu2ss_udc));
3242
3243         platform_set_drvdata(pdev, udc);
3244
3245         /* require I/O memory and IRQ to be provided as resources */
3246         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3247         mmio_base = devm_ioremap_resource(&pdev->dev, r);
3248         if (IS_ERR(mmio_base))
3249                 return PTR_ERR(mmio_base);
3250
3251         irq = platform_get_irq(pdev, 0);
3252         if (irq < 0) {
3253                 dev_err(&pdev->dev, "failed to get IRQ\n");
3254                 return irq;
3255         }
3256         status = devm_request_irq(&pdev->dev, irq, _nbu2ss_udc_irq,
3257                                   0, driver_name, udc);
3258
3259         /* IO Memory */
3260         udc->p_regs = (struct fc_regs *)mmio_base;
3261
3262         /* USB Function Controller Interrupt */
3263         if (status != 0) {
3264                 dev_err(udc->dev, "request_irq(USB_UDC_IRQ_1) failed\n");
3265                 return status;
3266         }
3267
3268         /* Driver Initialization */
3269         status = nbu2ss_drv_contest_init(pdev, udc);
3270         if (status < 0) {
3271                 /* Error */
3272                 return status;
3273         }
3274
3275         /* VBUS Interrupt */
3276         irq_set_irq_type(INT_VBUS, IRQ_TYPE_EDGE_BOTH);
3277         status = request_irq(INT_VBUS,
3278                              _nbu2ss_vbus_irq, IRQF_SHARED, driver_name, udc);
3279
3280         if (status != 0) {
3281                 dev_err(udc->dev, "request_irq(INT_VBUS) failed\n");
3282                 return status;
3283         }
3284
3285         return status;
3286 }
3287
3288 /*-------------------------------------------------------------------------*/
3289 static void nbu2ss_drv_shutdown(struct platform_device *pdev)
3290 {
3291         struct nbu2ss_udc       *udc;
3292
3293         udc = platform_get_drvdata(pdev);
3294         if (!udc)
3295                 return;
3296
3297         _nbu2ss_disable_controller(udc);
3298 }
3299
3300 /*-------------------------------------------------------------------------*/
3301 static int nbu2ss_drv_remove(struct platform_device *pdev)
3302 {
3303         struct nbu2ss_udc       *udc;
3304         struct nbu2ss_ep        *ep;
3305         int     i;
3306
3307         udc = &udc_controller;
3308
3309         for (i = 0; i < NUM_ENDPOINTS; i++) {
3310                 ep = &udc->ep[i];
3311                 if (ep->virt_buf)
3312                         dma_free_coherent(NULL, PAGE_SIZE,
3313                                 (void *)ep->virt_buf, ep->phys_buf);
3314         }
3315
3316         /* Interrupt Handler - Release */
3317         free_irq(INT_VBUS, udc);
3318
3319         return 0;
3320 }
3321
3322 /*-------------------------------------------------------------------------*/
3323 static int nbu2ss_drv_suspend(struct platform_device *pdev, pm_message_t state)
3324 {
3325         struct nbu2ss_udc       *udc;
3326
3327         udc = platform_get_drvdata(pdev);
3328         if (!udc)
3329                 return 0;
3330
3331         if (udc->vbus_active) {
3332                 udc->vbus_active = 0;
3333                 udc->devstate = USB_STATE_NOTATTACHED;
3334                 udc->linux_suspended = 1;
3335
3336                 if (udc->usb_suspended) {
3337                         udc->usb_suspended = 0;
3338                         _nbu2ss_reset_controller(udc);
3339                 }
3340
3341                 _nbu2ss_quiesce(udc);
3342         }
3343         _nbu2ss_disable_controller(udc);
3344
3345         return 0;
3346 }
3347
3348 /*-------------------------------------------------------------------------*/
3349 static int nbu2ss_drv_resume(struct platform_device *pdev)
3350 {
3351         u32     data;
3352         struct nbu2ss_udc       *udc;
3353
3354         udc = platform_get_drvdata(pdev);
3355         if (!udc)
3356                 return 0;
3357
3358         data = gpio_get_value(VBUS_VALUE);
3359         if (data) {
3360                 udc->vbus_active = 1;
3361                 udc->devstate = USB_STATE_POWERED;
3362                 _nbu2ss_enable_controller(udc);
3363                 _nbu2ss_pullup(udc, 1);
3364         }
3365
3366         udc->linux_suspended = 0;
3367
3368         return 0;
3369 }
3370
3371 static struct platform_driver udc_driver = {
3372         .probe          = nbu2ss_drv_probe,
3373         .shutdown       = nbu2ss_drv_shutdown,
3374         .remove         = nbu2ss_drv_remove,
3375         .suspend        = nbu2ss_drv_suspend,
3376         .resume         = nbu2ss_drv_resume,
3377         .driver         = {
3378                 .name   = driver_name,
3379         },
3380 };
3381
3382 module_platform_driver(udc_driver);
3383
3384 MODULE_DESCRIPTION(DRIVER_DESC);
3385 MODULE_AUTHOR("Renesas Electronics Corporation");
3386 MODULE_LICENSE("GPL");