drivers/staging/iio/adc/ad7793.c

   1 /*
   2  * AD7792/AD7793 SPI ADC driver
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/device.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13 #include <linux/sysfs.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/regulator/consumer.h>
  16 #include <linux/err.h>
  17 #include <linux/sched.h>
  18 #include <linux/delay.h>
  19 #include <linux/module.h>
  20
  21 #include "../iio.h"
  22 #include "../sysfs.h"
  23 #include "../buffer.h"
  24 #include "../ring_sw.h"
  25 #include "../trigger.h"
  26 #include "../trigger_consumer.h"
  27
  28 #include "ad7793.h"
  29
  30 /* NOTE:
  31  * The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
  32  * In order to avoid contentions on the SPI bus, it's therefore necessary
  33  * to use spi bus locking.
  34  *
  35  * The DOUT/RDY output must also be wired to an interrupt capable GPIO.
  36  */
  37
  38 struct ad7793_chip_info {
  39         struct iio_chan_spec            channel[7];
  40 };
  41
  42 struct ad7793_state {
  43         struct spi_device               *spi;
  44         struct iio_trigger              *trig;
  45         const struct ad7793_chip_info   *chip_info;
  46         struct regulator                *reg;
  47         struct ad7793_platform_data     *pdata;
  48         wait_queue_head_t               wq_data_avail;
  49         bool                            done;
  50         bool                            irq_dis;
  51         u16                             int_vref_mv;
  52         u16                             mode;
  53         u16                             conf;
  54         u32                             scale_avail[8][2];
  55         /* Note this uses fact that 8 the mask always fits in a long */
  56         unsigned long                   available_scan_masks[7];
  57         /*
  58          * DMA (thus cache coherency maintenance) requires the
  59          * transfer buffers to live in their own cache lines.
  60          */
  61         u8                              data[4] ____cacheline_aligned;
  62 };
  63
  64 enum ad7793_supported_device_ids {
  65         ID_AD7792,
  66         ID_AD7793,
  67 };
  68
  69 static int __ad7793_write_reg(struct ad7793_state *st, bool locked,
  70                               bool cs_change, unsigned char reg,
  71                               unsigned size, unsigned val)
  72 {
  73         u8 *data = st->data;
  74         struct spi_transfer t = {
  75                 .tx_buf         = data,
  76                 .len            = size + 1,
  77                 .cs_change      = cs_change,
  78         };
  79         struct spi_message m;
  80
  81         data[0] = AD7793_COMM_WRITE | AD7793_COMM_ADDR(reg);
  82
  83         switch (size) {
  84         case 3:
  85                 data[1] = val >> 16;
  86                 data[2] = val >> 8;
  87                 data[3] = val;
  88                 break;
  89         case 2:
  90                 data[1] = val >> 8;
  91                 data[2] = val;
  92                 break;
  93         case 1:
  94                 data[1] = val;
  95                 break;
  96         default:
  97                 return -EINVAL;
  98         }
  99
 100         spi_message_init(&m);
 101         spi_message_add_tail(&t, &m);
 102
 103         if (locked)
 104                 return spi_sync_locked(st->spi, &m);
 105         else
 106                 return spi_sync(st->spi, &m);
 107 }
 108
 109 static int ad7793_write_reg(struct ad7793_state *st,
 110                             unsigned reg, unsigned size, unsigned val)
 111 {
 112         return __ad7793_write_reg(st, false, false, reg, size, val);
 113 }
 114
 115 static int __ad7793_read_reg(struct ad7793_state *st, bool locked,
 116                              bool cs_change, unsigned char reg,
 117                              int *val, unsigned size)
 118 {
 119         u8 *data = st->data;
 120         int ret;
 121         struct spi_transfer t[] = {
 122                 {
 123                         .tx_buf = data,
 124                         .len = 1,
 125                 }, {
 126                         .rx_buf = data,
 127                         .len = size,
 128                         .cs_change = cs_change,
 129                 },
 130         };
 131         struct spi_message m;
 132
 133         data[0] = AD7793_COMM_READ | AD7793_COMM_ADDR(reg);
 134
 135         spi_message_init(&m);
 136         spi_message_add_tail(&t[0], &m);
 137         spi_message_add_tail(&t[1], &m);
 138
 139         if (locked)
 140                 ret = spi_sync_locked(st->spi, &m);
 141         else
 142                 ret = spi_sync(st->spi, &m);
 143
 144         if (ret < 0)
 145                 return ret;
 146
 147         switch (size) {
 148         case 3:
 149                 *val = data[0] << 16 | data[1] << 8 | data[2];
 150                 break;
 151         case 2:
 152                 *val = data[0] << 8 | data[1];
 153                 break;
 154         case 1:
 155                 *val = data[0];
 156                 break;
 157         default:
 158                 return -EINVAL;
 159         }
 160
 161         return 0;
 162 }
 163
 164 static int ad7793_read_reg(struct ad7793_state *st,
 165                            unsigned reg, int *val, unsigned size)
 166 {
 167         return __ad7793_read_reg(st, 0, 0, reg, val, size);
 168 }
 169
 170 static int ad7793_read(struct ad7793_state *st, unsigned ch,
 171                        unsigned len, int *val)
 172 {
 173         int ret;
 174         st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
 175         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
 176                 AD7793_MODE_SEL(AD7793_MODE_SINGLE);
 177
 178         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
 179
 180         spi_bus_lock(st->spi->master);
 181         st->done = false;
 182
 183         ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
 184                                  sizeof(st->mode), st->mode);
 185         if (ret < 0)
 186                 goto out;
 187
 188         st->irq_dis = false;
 189         enable_irq(st->spi->irq);
 190         wait_event_interruptible(st->wq_data_avail, st->done);
 191
 192         ret = __ad7793_read_reg(st, 1, 0, AD7793_REG_DATA, val, len);
 193 out:
 194         spi_bus_unlock(st->spi->master);
 195
 196         return ret;
 197 }
 198
 199 static int ad7793_calibrate(struct ad7793_state *st, unsigned mode, unsigned ch)
 200 {
 201         int ret;
 202
 203         st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
 204         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) | AD7793_MODE_SEL(mode);
 205
 206         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
 207
 208         spi_bus_lock(st->spi->master);
 209         st->done = false;
 210
 211         ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
 212                                  sizeof(st->mode), st->mode);
 213         if (ret < 0)
 214                 goto out;
 215
 216         st->irq_dis = false;
 217         enable_irq(st->spi->irq);
 218         wait_event_interruptible(st->wq_data_avail, st->done);
 219
 220         st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
 221                 AD7793_MODE_SEL(AD7793_MODE_IDLE);
 222
 223         ret = __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
 224                                  sizeof(st->mode), st->mode);
 225 out:
 226         spi_bus_unlock(st->spi->master);
 227
 228         return ret;
 229 }
 230
 231 static const u8 ad7793_calib_arr[6][2] = {
 232         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN1P_AIN1M},
 233         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN1P_AIN1M},
 234         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN2P_AIN2M},
 235         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN2P_AIN2M},
 236         {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN3P_AIN3M},
 237         {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN3P_AIN3M}
 238 };
 239
 240 static int ad7793_calibrate_all(struct ad7793_state *st)
 241 {
 242         int i, ret;
 243
 244         for (i = 0; i < ARRAY_SIZE(ad7793_calib_arr); i++) {
 245                 ret = ad7793_calibrate(st, ad7793_calib_arr[i][0],
 246                                        ad7793_calib_arr[i][1]);
 247                 if (ret)
 248                         goto out;
 249         }
 250
 251         return 0;
 252 out:
 253         dev_err(&st->spi->dev, "Calibration failed\n");
 254         return ret;
 255 }
 256
 257 static int ad7793_setup(struct ad7793_state *st)
 258 {
 259         int i, ret = -1;
 260         unsigned long long scale_uv;
 261         u32 id;
 262
 263         /* reset the serial interface */
 264         ret = spi_write(st->spi, (u8 *)&ret, sizeof(ret));
 265         if (ret < 0)
 266                 goto out;
 267         msleep(1); /* Wait for at least 500us */
 268
 269         /* write/read test for device presence */
 270         ret = ad7793_read_reg(st, AD7793_REG_ID, &id, 1);
 271         if (ret)
 272                 goto out;
 273
 274         id &= AD7793_ID_MASK;
 275
 276         if (!((id == AD7792_ID) || (id == AD7793_ID))) {
 277                 dev_err(&st->spi->dev, "device ID query failed\n");
 278                 goto out;
 279         }
 280
 281         st->mode  = (st->pdata->mode & ~AD7793_MODE_SEL(-1)) |
 282                         AD7793_MODE_SEL(AD7793_MODE_IDLE);
 283         st->conf  = st->pdata->conf & ~AD7793_CONF_CHAN(-1);
 284
 285         ret = ad7793_write_reg(st, AD7793_REG_MODE, sizeof(st->mode), st->mode);
 286         if (ret)
 287                 goto out;
 288
 289         ret = ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
 290         if (ret)
 291                 goto out;
 292
 293         ret = ad7793_write_reg(st, AD7793_REG_IO,
 294                                sizeof(st->pdata->io), st->pdata->io);
 295         if (ret)
 296                 goto out;
 297
 298         ret = ad7793_calibrate_all(st);
 299         if (ret)
 300                 goto out;
 301
 302         /* Populate available ADC input ranges */
 303         for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) {
 304                 scale_uv = ((u64)st->int_vref_mv * 100000000)
 305                         >> (st->chip_info->channel[0].scan_type.realbits -
 306                         (!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1));
 307                 scale_uv >>= i;
 308
 309                 st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10;
 310                 st->scale_avail[i][0] = scale_uv;
 311         }
 312
 313         return 0;
 314 out:
 315         dev_err(&st->spi->dev, "setup failed\n");
 316         return ret;
 317 }
 318
 319 static int ad7793_scan_from_ring(struct ad7793_state *st, unsigned ch, int *val)
 320 {
 321         struct iio_buffer *ring = iio_priv_to_dev(st)->buffer;
 322         int ret;
 323         s64 dat64[2];
 324         u32 *dat32 = (u32 *)dat64;
 325
 326         if (!(test_bit(ch, ring->scan_mask)))
 327                 return  -EBUSY;
 328
 329         ret = ring->access->read_last(ring, (u8 *) &dat64);
 330         if (ret)
 331                 return ret;
 332
 333         *val = *dat32;
 334
 335         return 0;
 336 }
 337
 338 static int ad7793_ring_preenable(struct iio_dev *indio_dev)
 339 {
 340         struct ad7793_state *st = iio_priv(indio_dev);
 341         struct iio_buffer *ring = indio_dev->buffer;
 342         size_t d_size;
 343         unsigned channel;
 344
 345         if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
 346                 return -EINVAL;
 347
 348         channel = find_first_bit(indio_dev->active_scan_mask,
 349                                  indio_dev->masklength);
 350
 351         d_size = bitmap_weight(indio_dev->active_scan_mask,
 352                                indio_dev->masklength) *
 353                 indio_dev->channels[0].scan_type.storagebits / 8;
 354
 355         if (ring->scan_timestamp) {
 356                 d_size += sizeof(s64);
 357
 358                 if (d_size % sizeof(s64))
 359                         d_size += sizeof(s64) - (d_size % sizeof(s64));
 360         }
 361
 362         if (indio_dev->buffer->access->set_bytes_per_datum)
 363                 indio_dev->buffer->access->
 364                         set_bytes_per_datum(indio_dev->buffer, d_size);
 365
 366         st->mode  = (st->mode & ~AD7793_MODE_SEL(-1)) |
 367                     AD7793_MODE_SEL(AD7793_MODE_CONT);
 368         st->conf  = (st->conf & ~AD7793_CONF_CHAN(-1)) |
 369                     AD7793_CONF_CHAN(indio_dev->channels[channel].address);
 370
 371         ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
 372
 373         spi_bus_lock(st->spi->master);
 374         __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
 375                            sizeof(st->mode), st->mode);
 376
 377         st->irq_dis = false;
 378         enable_irq(st->spi->irq);
 379
 380         return 0;
 381 }
 382
 383 static int ad7793_ring_postdisable(struct iio_dev *indio_dev)
 384 {
 385         struct ad7793_state *st = iio_priv(indio_dev);
 386
 387         st->mode  = (st->mode & ~AD7793_MODE_SEL(-1)) |
 388                     AD7793_MODE_SEL(AD7793_MODE_IDLE);
 389
 390         st->done = false;
 391         wait_event_interruptible(st->wq_data_avail, st->done);
 392
 393         if (!st->irq_dis)
 394                 disable_irq_nosync(st->spi->irq);
 395
 396         __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
 397                            sizeof(st->mode), st->mode);
 398
 399         return spi_bus_unlock(st->spi->master);
 400 }
 401
 402 /**
 403  * ad7793_trigger_handler() bh of trigger launched polling to ring buffer
 404  **/
 405
 406 static irqreturn_t ad7793_trigger_handler(int irq, void *p)
 407 {
 408         struct iio_poll_func *pf = p;
 409         struct iio_dev *indio_dev = pf->indio_dev;
 410         struct iio_buffer *ring = indio_dev->buffer;
 411         struct ad7793_state *st = iio_priv(indio_dev);
 412         s64 dat64[2];
 413         s32 *dat32 = (s32 *)dat64;
 414
 415         if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
 416                 __ad7793_read_reg(st, 1, 1, AD7793_REG_DATA,
 417                                   dat32,
 418                                   indio_dev->channels[0].scan_type.realbits/8);
 419
 420         /* Guaranteed to be aligned with 8 byte boundary */
 421         if (ring->scan_timestamp)
 422                 dat64[1] = pf->timestamp;
 423
 424         ring->access->store_to(ring, (u8 *)dat64, pf->timestamp);
 425
 426         iio_trigger_notify_done(indio_dev->trig);
 427         st->irq_dis = false;
 428         enable_irq(st->spi->irq);
 429
 430         return IRQ_HANDLED;
 431 }
 432
 433 static const struct iio_buffer_setup_ops ad7793_ring_setup_ops = {
 434         .preenable = &ad7793_ring_preenable,
 435         .postenable = &iio_triggered_buffer_postenable,
 436         .predisable = &iio_triggered_buffer_predisable,
 437         .postdisable = &ad7793_ring_postdisable,
 438 };
 439
 440 static int ad7793_register_ring_funcs_and_init(struct iio_dev *indio_dev)
 441 {
 442         int ret;
 443
 444         indio_dev->buffer = iio_sw_rb_allocate(indio_dev);
 445         if (!indio_dev->buffer) {
 446                 ret = -ENOMEM;
 447                 goto error_ret;
 448         }
 449         /* Effectively select the ring buffer implementation */
 450         indio_dev->buffer->access = &ring_sw_access_funcs;
 451         indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
 452                                                  &ad7793_trigger_handler,
 453                                                  IRQF_ONESHOT,
 454                                                  indio_dev,
 455                                                  "ad7793_consumer%d",
 456                                                  indio_dev->id);
 457         if (indio_dev->pollfunc == NULL) {
 458                 ret = -ENOMEM;
 459                 goto error_deallocate_sw_rb;
 460         }
 461
 462         /* Ring buffer functions - here trigger setup related */
 463         indio_dev->setup_ops = &ad7793_ring_setup_ops;
 464
 465         /* Flag that polled ring buffering is possible */
 466         indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
 467         return 0;
 468
 469 error_deallocate_sw_rb:
 470         iio_sw_rb_free(indio_dev->buffer);
 471 error_ret:
 472         return ret;
 473 }
 474
 475 static void ad7793_ring_cleanup(struct iio_dev *indio_dev)
 476 {
 477         iio_dealloc_pollfunc(indio_dev->pollfunc);
 478         iio_sw_rb_free(indio_dev->buffer);
 479 }
 480
 481 /**
 482  * ad7793_data_rdy_trig_poll() the event handler for the data rdy trig
 483  **/
 484 static irqreturn_t ad7793_data_rdy_trig_poll(int irq, void *private)
 485 {
 486         struct ad7793_state *st = iio_priv(private);
 487
 488         st->done = true;
 489         wake_up_interruptible(&st->wq_data_avail);
 490         disable_irq_nosync(irq);
 491         st->irq_dis = true;
 492         iio_trigger_poll(st->trig, iio_get_time_ns());
 493
 494         return IRQ_HANDLED;
 495 }
 496
 497 static int ad7793_probe_trigger(struct iio_dev *indio_dev)
 498 {
 499         struct ad7793_state *st = iio_priv(indio_dev);
 500         int ret;
 501
 502         st->trig = iio_allocate_trigger("%s-dev%d",
 503                                         spi_get_device_id(st->spi)->name,
 504                                         indio_dev->id);
 505         if (st->trig == NULL) {
 506                 ret = -ENOMEM;
 507                 goto error_ret;
 508         }
 509
 510         ret = request_irq(st->spi->irq,
 511                           ad7793_data_rdy_trig_poll,
 512                           IRQF_TRIGGER_LOW,
 513                           spi_get_device_id(st->spi)->name,
 514                           indio_dev);
 515         if (ret)
 516                 goto error_free_trig;
 517
 518         disable_irq_nosync(st->spi->irq);
 519         st->irq_dis = true;
 520         st->trig->dev.parent = &st->spi->dev;
 521         st->trig->owner = THIS_MODULE;
 522         st->trig->private_data = indio_dev;
 523
 524         ret = iio_trigger_register(st->trig);
 525
 526         /* select default trigger */
 527         indio_dev->trig = st->trig;
 528         if (ret)
 529                 goto error_free_irq;
 530
 531         return 0;
 532
 533 error_free_irq:
 534         free_irq(st->spi->irq, indio_dev);
 535 error_free_trig:
 536         iio_free_trigger(st->trig);
 537 error_ret:
 538         return ret;
 539 }
 540
 541 static void ad7793_remove_trigger(struct iio_dev *indio_dev)
 542 {
 543         struct ad7793_state *st = iio_priv(indio_dev);
 544
 545         iio_trigger_unregister(st->trig);
 546         free_irq(st->spi->irq, indio_dev);
 547         iio_free_trigger(st->trig);
 548 }
 549
 550 static const u16 sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39, 33, 19,
 551                                           17, 16, 12, 10, 8, 6, 4};
 552
 553 static ssize_t ad7793_read_frequency(struct device *dev,
 554                 struct device_attribute *attr,
 555                 char *buf)
 556 {
 557         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 558         struct ad7793_state *st = iio_priv(indio_dev);
 559
 560         return sprintf(buf, "%d\n",
 561                        sample_freq_avail[AD7793_MODE_RATE(st->mode)]);
 562 }
 563
 564 static ssize_t ad7793_write_frequency(struct device *dev,
 565                 struct device_attribute *attr,
 566                 const char *buf,
 567                 size_t len)
 568 {
 569         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 570         struct ad7793_state *st = iio_priv(indio_dev);
 571         long lval;
 572         int i, ret;
 573
 574         mutex_lock(&indio_dev->mlock);
 575         if (iio_buffer_enabled(indio_dev)) {
 576                 mutex_unlock(&indio_dev->mlock);
 577                 return -EBUSY;
 578         }
 579         mutex_unlock(&indio_dev->mlock);
 580
 581         ret = strict_strtol(buf, 10, &lval);
 582         if (ret)
 583                 return ret;
 584
 585         ret = -EINVAL;
 586
 587         for (i = 0; i < ARRAY_SIZE(sample_freq_avail); i++)
 588                 if (lval == sample_freq_avail[i]) {
 589                         mutex_lock(&indio_dev->mlock);
 590                         st->mode &= ~AD7793_MODE_RATE(-1);
 591                         st->mode |= AD7793_MODE_RATE(i);
 592                         ad7793_write_reg(st, AD7793_REG_MODE,
 593                                          sizeof(st->mode), st->mode);
 594                         mutex_unlock(&indio_dev->mlock);
 595                         ret = 0;
 596                 }
 597
 598         return ret ? ret : len;
 599 }
 600
 601 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
 602                 ad7793_read_frequency,
 603                 ad7793_write_frequency);
 604
 605 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
 606         "470 242 123 62 50 39 33 19 17 16 12 10 8 6 4");
 607
 608 static ssize_t ad7793_show_scale_available(struct device *dev,
 609                         struct device_attribute *attr, char *buf)
 610 {
 611         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 612         struct ad7793_state *st = iio_priv(indio_dev);
 613         int i, len = 0;
 614
 615         for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
 616                 len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0],
 617                                st->scale_avail[i][1]);
 618
 619         len += sprintf(buf + len, "\n");
 620
 621         return len;
 622 }
 623
 624 static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available, in-in_scale_available,
 625                              S_IRUGO, ad7793_show_scale_available, NULL, 0);
 626
 627 static struct attribute *ad7793_attributes[] = {
 628         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 629         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 630         &iio_dev_attr_in_m_in_scale_available.dev_attr.attr,
 631         NULL
 632 };
 633
 634 static const struct attribute_group ad7793_attribute_group = {
 635         .attrs = ad7793_attributes,
 636 };
 637
 638 static int ad7793_read_raw(struct iio_dev *indio_dev,
 639                            struct iio_chan_spec const *chan,
 640                            int *val,
 641                            int *val2,
 642                            long m)
 643 {
 644         struct ad7793_state *st = iio_priv(indio_dev);
 645         int ret, smpl = 0;
 646         unsigned long long scale_uv;
 647         bool unipolar = !!(st->conf & AD7793_CONF_UNIPOLAR);
 648
 649         switch (m) {
 650         case 0:
 651                 mutex_lock(&indio_dev->mlock);
 652                 if (iio_buffer_enabled(indio_dev))
 653                         ret = ad7793_scan_from_ring(st,
 654                                         chan->scan_index, &smpl);
 655                 else
 656                         ret = ad7793_read(st, chan->address,
 657                                         chan->scan_type.realbits / 8, &smpl);
 658                 mutex_unlock(&indio_dev->mlock);
 659
 660                 if (ret < 0)
 661                         return ret;
 662
 663                 *val = (smpl >> chan->scan_type.shift) &
 664                         ((1 << (chan->scan_type.realbits)) - 1);
 665
 666                 if (!unipolar)
 667                         *val -= (1 << (chan->scan_type.realbits - 1));
 668
 669                 return IIO_VAL_INT;
 670
 671         case IIO_CHAN_INFO_SCALE:
 672                 switch (chan->type) {
 673                 case IIO_VOLTAGE:
 674                         if (chan->differential) {
 675                                 *val = st->
 676                                         scale_avail[(st->conf >> 8) & 0x7][0];
 677                                 *val2 = st->
 678                                         scale_avail[(st->conf >> 8) & 0x7][1];
 679                                 return IIO_VAL_INT_PLUS_NANO;
 680                         } else {
 681                                 /* 1170mV / 2^23 * 6 */
 682                                 scale_uv = (1170ULL * 100000000ULL * 6ULL)
 683                                         >> (chan->scan_type.realbits -
 684                                             (unipolar ? 0 : 1));
 685                         }
 686                         break;
 687                 case IIO_TEMP:
 688                         /* Always uses unity gain and internal ref */
 689                         scale_uv = (2500ULL * 100000000ULL)
 690                                 >> (chan->scan_type.realbits -
 691                                 (unipolar ? 0 : 1));
 692                         break;
 693                 default:
 694                         return -EINVAL;
 695                 }
 696
 697                 *val2 = do_div(scale_uv, 100000000) * 10;
 698                 *val =  scale_uv;
 699
 700                 return IIO_VAL_INT_PLUS_NANO;
 701         }
 702         return -EINVAL;
 703 }
 704
 705 static int ad7793_write_raw(struct iio_dev *indio_dev,
 706                                struct iio_chan_spec const *chan,
 707                                int val,
 708                                int val2,
 709                                long mask)
 710 {
 711         struct ad7793_state *st = iio_priv(indio_dev);
 712         int ret, i;
 713         unsigned int tmp;
 714
 715         mutex_lock(&indio_dev->mlock);
 716         if (iio_buffer_enabled(indio_dev)) {
 717                 mutex_unlock(&indio_dev->mlock);
 718                 return -EBUSY;
 719         }
 720
 721         switch (mask) {
 722         case IIO_CHAN_INFO_SCALE:
 723                 ret = -EINVAL;
 724                 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
 725                         if (val2 == st->scale_avail[i][1]) {
 726                                 tmp = st->conf;
 727                                 st->conf &= ~AD7793_CONF_GAIN(-1);
 728                                 st->conf |= AD7793_CONF_GAIN(i);
 729
 730                                 if (tmp != st->conf) {
 731                                         ad7793_write_reg(st, AD7793_REG_CONF,
 732                                                          sizeof(st->conf),
 733                                                          st->conf);
 734                                         ad7793_calibrate_all(st);
 735                                 }
 736                                 ret = 0;
 737                         }
 738
 739         default:
 740                 ret = -EINVAL;
 741         }
 742
 743         mutex_unlock(&indio_dev->mlock);
 744         return ret;
 745 }
 746
 747 static int ad7793_validate_trigger(struct iio_dev *indio_dev,
 748                                    struct iio_trigger *trig)
 749 {
 750         if (indio_dev->trig != trig)
 751                 return -EINVAL;
 752
 753         return 0;
 754 }
 755
 756 static int ad7793_write_raw_get_fmt(struct iio_dev *indio_dev,
 757                                struct iio_chan_spec const *chan,
 758                                long mask)
 759 {
 760         return IIO_VAL_INT_PLUS_NANO;
 761 }
 762
 763 static const struct iio_info ad7793_info = {
 764         .read_raw = &ad7793_read_raw,
 765         .write_raw = &ad7793_write_raw,
 766         .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
 767         .attrs = &ad7793_attribute_group,
 768         .validate_trigger = ad7793_validate_trigger,
 769         .driver_module = THIS_MODULE,
 770 };
 771
 772 static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
 773         [ID_AD7793] = {
 774                 .channel[0] = {
 775                         .type = IIO_VOLTAGE,
 776                         .differential = 1,
 777                         .indexed = 1,
 778                         .channel = 0,
 779                         .channel2 = 0,
 780                         .address = AD7793_CH_AIN1P_AIN1M,
 781                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 782                         .scan_index = 0,
 783                         .scan_type = IIO_ST('s', 24, 32, 0)
 784                 },
 785                 .channel[1] = {
 786                         .type = IIO_VOLTAGE,
 787                         .differential = 1,
 788                         .indexed = 1,
 789                         .channel = 1,
 790                         .channel2 = 1,
 791                         .address = AD7793_CH_AIN2P_AIN2M,
 792                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 793                         .scan_index = 1,
 794                         .scan_type = IIO_ST('s', 24, 32, 0)
 795                 },
 796                 .channel[2] = {
 797                         .type = IIO_VOLTAGE,
 798                         .differential = 1,
 799                         .indexed = 1,
 800                         .channel = 2,
 801                         .channel2 = 2,
 802                         .address = AD7793_CH_AIN3P_AIN3M,
 803                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 804                         .scan_index = 2,
 805                         .scan_type = IIO_ST('s', 24, 32, 0)
 806                 },
 807                 .channel[3] = {
 808                         .type = IIO_VOLTAGE,
 809                         .differential = 1,
 810                         .extend_name = "shorted",
 811                         .indexed = 1,
 812                         .channel = 2,
 813                         .channel2 = 2,
 814                         .address = AD7793_CH_AIN1M_AIN1M,
 815                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 816                         .scan_index = 2,
 817                         .scan_type = IIO_ST('s', 24, 32, 0)
 818                 },
 819                 .channel[4] = {
 820                         .type = IIO_TEMP,
 821                         .indexed = 1,
 822                         .channel = 0,
 823                         .address = AD7793_CH_TEMP,
 824                         .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
 825                         .scan_index = 4,
 826                         .scan_type = IIO_ST('s', 24, 32, 0),
 827                 },
 828                 .channel[5] = {
 829                         .type = IIO_VOLTAGE,
 830                         .extend_name = "supply",
 831                         .indexed = 1,
 832                         .channel = 4,
 833                         .address = AD7793_CH_AVDD_MONITOR,
 834                         .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
 835                         .scan_index = 5,
 836                         .scan_type = IIO_ST('s', 24, 32, 0),
 837                 },
 838                 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
 839         },
 840         [ID_AD7792] = {
 841                 .channel[0] = {
 842                         .type = IIO_VOLTAGE,
 843                         .differential = 1,
 844                         .indexed = 1,
 845                         .channel = 0,
 846                         .channel2 = 0,
 847                         .address = AD7793_CH_AIN1P_AIN1M,
 848                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 849                         .scan_index = 0,
 850                         .scan_type = IIO_ST('s', 16, 32, 0)
 851                 },
 852                 .channel[1] = {
 853                         .type = IIO_VOLTAGE,
 854                         .differential = 1,
 855                         .indexed = 1,
 856                         .channel = 1,
 857                         .channel2 = 1,
 858                         .address = AD7793_CH_AIN2P_AIN2M,
 859                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 860                         .scan_index = 1,
 861                         .scan_type = IIO_ST('s', 16, 32, 0)
 862                 },
 863                 .channel[2] = {
 864                         .type = IIO_VOLTAGE,
 865                         .differential = 1,
 866                         .indexed = 1,
 867                         .channel = 2,
 868                         .channel2 = 2,
 869                         .address = AD7793_CH_AIN3P_AIN3M,
 870                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 871                         .scan_index = 2,
 872                         .scan_type = IIO_ST('s', 16, 32, 0)
 873                 },
 874                 .channel[3] = {
 875                         .type = IIO_VOLTAGE,
 876                         .differential = 1,
 877                         .extend_name = "shorted",
 878                         .indexed = 1,
 879                         .channel = 2,
 880                         .channel2 = 2,
 881                         .address = AD7793_CH_AIN1M_AIN1M,
 882                         .info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,
 883                         .scan_index = 2,
 884                         .scan_type = IIO_ST('s', 16, 32, 0)
 885                 },
 886                 .channel[4] = {
 887                         .type = IIO_TEMP,
 888                         .indexed = 1,
 889                         .channel = 0,
 890                         .address = AD7793_CH_TEMP,
 891                         .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
 892                         .scan_index = 4,
 893                         .scan_type = IIO_ST('s', 16, 32, 0),
 894                 },
 895                 .channel[5] = {
 896                         .type = IIO_VOLTAGE,
 897                         .extend_name = "supply",
 898                         .indexed = 1,
 899                         .channel = 4,
 900                         .address = AD7793_CH_AVDD_MONITOR,
 901                         .info_mask = IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
 902                         .scan_index = 5,
 903                         .scan_type = IIO_ST('s', 16, 32, 0),
 904                 },
 905                 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
 906         },
 907 };
 908
 909 static int __devinit ad7793_probe(struct spi_device *spi)
 910 {
 911         struct ad7793_platform_data *pdata = spi->dev.platform_data;
 912         struct ad7793_state *st;
 913         struct iio_dev *indio_dev;
 914         int ret, i, voltage_uv = 0;
 915
 916         if (!pdata) {
 917                 dev_err(&spi->dev, "no platform data?\n");
 918                 return -ENODEV;
 919         }
 920
 921         if (!spi->irq) {
 922                 dev_err(&spi->dev, "no IRQ?\n");
 923                 return -ENODEV;
 924         }
 925
 926         indio_dev = iio_allocate_device(sizeof(*st));
 927         if (indio_dev == NULL)
 928                 return -ENOMEM;
 929
 930         st = iio_priv(indio_dev);
 931
 932         st->reg = regulator_get(&spi->dev, "vcc");
 933         if (!IS_ERR(st->reg)) {
 934                 ret = regulator_enable(st->reg);
 935                 if (ret)
 936                         goto error_put_reg;
 937
 938                 voltage_uv = regulator_get_voltage(st->reg);
 939         }
 940
 941         st->chip_info =
 942                 &ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data];
 943
 944         st->pdata = pdata;
 945
 946         if (pdata && pdata->vref_mv)
 947                 st->int_vref_mv = pdata->vref_mv;
 948         else if (voltage_uv)
 949                 st->int_vref_mv = voltage_uv / 1000;
 950         else
 951                 st->int_vref_mv = 2500; /* Build-in ref */
 952
 953         spi_set_drvdata(spi, indio_dev);
 954         st->spi = spi;
 955
 956         indio_dev->dev.parent = &spi->dev;
 957         indio_dev->name = spi_get_device_id(spi)->name;
 958         indio_dev->modes = INDIO_DIRECT_MODE;
 959         indio_dev->channels = st->chip_info->channel;
 960         indio_dev->available_scan_masks = st->available_scan_masks;
 961         indio_dev->num_channels = 7;
 962         indio_dev->info = &ad7793_info;
 963
 964         for (i = 0; i < indio_dev->num_channels; i++) {
 965                 set_bit(i, &st->available_scan_masks[i]);
 966                 set_bit(indio_dev->
 967                         channels[indio_dev->num_channels - 1].scan_index,
 968                         &st->available_scan_masks[i]);
 969         }
 970
 971         init_waitqueue_head(&st->wq_data_avail);
 972
 973         ret = ad7793_register_ring_funcs_and_init(indio_dev);
 974         if (ret)
 975                 goto error_disable_reg;
 976
 977         ret = ad7793_probe_trigger(indio_dev);
 978         if (ret)
 979                 goto error_unreg_ring;
 980
 981         ret = iio_buffer_register(indio_dev,
 982                                   indio_dev->channels,
 983                                   indio_dev->num_channels);
 984         if (ret)
 985                 goto error_remove_trigger;
 986
 987         ret = ad7793_setup(st);
 988         if (ret)
 989                 goto error_uninitialize_ring;
 990
 991         ret = iio_device_register(indio_dev);
 992         if (ret)
 993                 goto error_uninitialize_ring;
 994
 995         return 0;
 996
 997 error_uninitialize_ring:
 998         iio_buffer_unregister(indio_dev);
 999 error_remove_trigger:
1000         ad7793_remove_trigger(indio_dev);
1001 error_unreg_ring:
1002         ad7793_ring_cleanup(indio_dev);
1003 error_disable_reg:
1004         if (!IS_ERR(st->reg))
1005                 regulator_disable(st->reg);
1006 error_put_reg:
1007         if (!IS_ERR(st->reg))
1008                 regulator_put(st->reg);
1009
1010         iio_free_device(indio_dev);
1011
1012         return ret;
1013 }
1014
1015 static int ad7793_remove(struct spi_device *spi)
1016 {
1017         struct iio_dev *indio_dev = spi_get_drvdata(spi);
1018         struct ad7793_state *st = iio_priv(indio_dev);
1019
1020         iio_device_unregister(indio_dev);
1021         iio_buffer_unregister(indio_dev);
1022         ad7793_remove_trigger(indio_dev);
1023         ad7793_ring_cleanup(indio_dev);
1024
1025         if (!IS_ERR(st->reg)) {
1026                 regulator_disable(st->reg);
1027                 regulator_put(st->reg);
1028         }
1029
1030         iio_free_device(indio_dev);
1031
1032         return 0;
1033 }
1034
1035 static const struct spi_device_id ad7793_id[] = {
1036         {"ad7792", ID_AD7792},
1037         {"ad7793", ID_AD7793},
1038         {}
1039 };
1040 MODULE_DEVICE_TABLE(spi, ad7793_id);
1041
1042 static struct spi_driver ad7793_driver = {
1043         .driver = {
1044                 .name   = "ad7793",
1045                 .owner  = THIS_MODULE,
1046         },
1047         .probe          = ad7793_probe,
1048         .remove         = __devexit_p(ad7793_remove),
1049         .id_table       = ad7793_id,
1050 };
1051
1052 static int __init ad7793_init(void)
1053 {
1054         return spi_register_driver(&ad7793_driver);
1055 }
1056 module_init(ad7793_init);
1057
1058 static void __exit ad7793_exit(void)
1059 {
1060         spi_unregister_driver(&ad7793_driver);
1061 }
1062 module_exit(ad7793_exit);
1063
1064 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
1065 MODULE_DESCRIPTION("Analog Devices AD7792/3 ADC");
1066 MODULE_LICENSE("GPL v2");