Merge remote-tracking branches 'asoc/fix/amd', 'asoc/fix/arizona', 'asoc/fix/dpcm...
[cascardo/linux.git] / drivers / staging / iio / meter / ade7753.c
1 /*
2  * ADE7753 Single-Phase Multifunction Metering IC with di/dt Sensor Interface
3  *
4  * Copyright 2010 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2 or later.
7  */
8
9 #include <linux/interrupt.h>
10 #include <linux/irq.h>
11 #include <linux/delay.h>
12 #include <linux/mutex.h>
13 #include <linux/device.h>
14 #include <linux/kernel.h>
15 #include <linux/spi/spi.h>
16 #include <linux/slab.h>
17 #include <linux/sysfs.h>
18 #include <linux/list.h>
19 #include <linux/module.h>
20
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include "meter.h"
24 #include "ade7753.h"
25
26 static int ade7753_spi_write_reg_8(struct device *dev,
27                                    u8 reg_address,
28                                    u8 val)
29 {
30         int ret;
31         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
32         struct ade7753_state *st = iio_priv(indio_dev);
33
34         mutex_lock(&st->buf_lock);
35         st->tx[0] = ADE7753_WRITE_REG(reg_address);
36         st->tx[1] = val;
37
38         ret = spi_write(st->us, st->tx, 2);
39         mutex_unlock(&st->buf_lock);
40
41         return ret;
42 }
43
44 static int ade7753_spi_write_reg_16(struct device *dev,
45                 u8 reg_address,
46                 u16 value)
47 {
48         int ret;
49         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
50         struct ade7753_state *st = iio_priv(indio_dev);
51
52         mutex_lock(&st->buf_lock);
53         st->tx[0] = ADE7753_WRITE_REG(reg_address);
54         st->tx[1] = (value >> 8) & 0xFF;
55         st->tx[2] = value & 0xFF;
56         ret = spi_write(st->us, st->tx, 3);
57         mutex_unlock(&st->buf_lock);
58
59         return ret;
60 }
61
62 static int ade7753_spi_read_reg_8(struct device *dev,
63                 u8 reg_address,
64                 u8 *val)
65 {
66         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
67         struct ade7753_state *st = iio_priv(indio_dev);
68         ssize_t ret;
69
70         ret = spi_w8r8(st->us, ADE7753_READ_REG(reg_address));
71         if (ret < 0) {
72                 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
73                                 reg_address);
74                 return ret;
75         }
76         *val = ret;
77
78         return 0;
79 }
80
81 static int ade7753_spi_read_reg_16(struct device *dev,
82                 u8 reg_address,
83                 u16 *val)
84 {
85         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
86         struct ade7753_state *st = iio_priv(indio_dev);
87         ssize_t ret;
88
89         ret = spi_w8r16be(st->us, ADE7753_READ_REG(reg_address));
90         if (ret < 0) {
91                 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
92                         reg_address);
93                 return ret;
94         }
95
96         *val = ret;
97
98         return 0;
99 }
100
101 static int ade7753_spi_read_reg_24(struct device *dev,
102                 u8 reg_address,
103                 u32 *val)
104 {
105         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
106         struct ade7753_state *st = iio_priv(indio_dev);
107         int ret;
108         struct spi_transfer xfers[] = {
109                 {
110                         .tx_buf = st->tx,
111                         .bits_per_word = 8,
112                         .len = 1,
113                 }, {
114                         .rx_buf = st->tx,
115                         .bits_per_word = 8,
116                         .len = 3,
117                 }
118         };
119
120         mutex_lock(&st->buf_lock);
121         st->tx[0] = ADE7753_READ_REG(reg_address);
122
123         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
124         if (ret) {
125                 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
126                                 reg_address);
127                 goto error_ret;
128         }
129         *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2];
130
131 error_ret:
132         mutex_unlock(&st->buf_lock);
133         return ret;
134 }
135
136 static ssize_t ade7753_read_8bit(struct device *dev,
137                 struct device_attribute *attr,
138                 char *buf)
139 {
140         int ret;
141         u8 val;
142         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
143
144         ret = ade7753_spi_read_reg_8(dev, this_attr->address, &val);
145         if (ret)
146                 return ret;
147
148         return sprintf(buf, "%u\n", val);
149 }
150
151 static ssize_t ade7753_read_16bit(struct device *dev,
152                 struct device_attribute *attr,
153                 char *buf)
154 {
155         int ret;
156         u16 val;
157         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
158
159         ret = ade7753_spi_read_reg_16(dev, this_attr->address, &val);
160         if (ret)
161                 return ret;
162
163         return sprintf(buf, "%u\n", val);
164 }
165
166 static ssize_t ade7753_read_24bit(struct device *dev,
167                 struct device_attribute *attr,
168                 char *buf)
169 {
170         int ret;
171         u32 val;
172         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
173
174         ret = ade7753_spi_read_reg_24(dev, this_attr->address, &val);
175         if (ret)
176                 return ret;
177
178         return sprintf(buf, "%u\n", val);
179 }
180
181 static ssize_t ade7753_write_8bit(struct device *dev,
182                 struct device_attribute *attr,
183                 const char *buf,
184                 size_t len)
185 {
186         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
187         int ret;
188         u8 val;
189
190         ret = kstrtou8(buf, 10, &val);
191         if (ret)
192                 goto error_ret;
193         ret = ade7753_spi_write_reg_8(dev, this_attr->address, val);
194
195 error_ret:
196         return ret ? ret : len;
197 }
198
199 static ssize_t ade7753_write_16bit(struct device *dev,
200                 struct device_attribute *attr,
201                 const char *buf,
202                 size_t len)
203 {
204         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
205         int ret;
206         u16 val;
207
208         ret = kstrtou16(buf, 10, &val);
209         if (ret)
210                 goto error_ret;
211         ret = ade7753_spi_write_reg_16(dev, this_attr->address, val);
212
213 error_ret:
214         return ret ? ret : len;
215 }
216
217 static int ade7753_reset(struct device *dev)
218 {
219         u16 val;
220         int ret;
221
222         ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
223         if (ret)
224                 return ret;
225
226         val |= BIT(6); /* Software Chip Reset */
227
228         return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
229 }
230
231 static IIO_DEV_ATTR_AENERGY(ade7753_read_24bit, ADE7753_AENERGY);
232 static IIO_DEV_ATTR_LAENERGY(ade7753_read_24bit, ADE7753_LAENERGY);
233 static IIO_DEV_ATTR_VAENERGY(ade7753_read_24bit, ADE7753_VAENERGY);
234 static IIO_DEV_ATTR_LVAENERGY(ade7753_read_24bit, ADE7753_LVAENERGY);
235 static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
236                 ade7753_read_16bit,
237                 ade7753_write_16bit,
238                 ADE7753_CFDEN);
239 static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
240                 ade7753_read_8bit,
241                 ade7753_write_8bit,
242                 ADE7753_CFNUM);
243 static IIO_DEV_ATTR_CHKSUM(ade7753_read_8bit, ADE7753_CHKSUM);
244 static IIO_DEV_ATTR_PHCAL(S_IWUSR | S_IRUGO,
245                 ade7753_read_16bit,
246                 ade7753_write_16bit,
247                 ADE7753_PHCAL);
248 static IIO_DEV_ATTR_APOS(S_IWUSR | S_IRUGO,
249                 ade7753_read_16bit,
250                 ade7753_write_16bit,
251                 ADE7753_APOS);
252 static IIO_DEV_ATTR_SAGCYC(S_IWUSR | S_IRUGO,
253                 ade7753_read_8bit,
254                 ade7753_write_8bit,
255                 ADE7753_SAGCYC);
256 static IIO_DEV_ATTR_SAGLVL(S_IWUSR | S_IRUGO,
257                 ade7753_read_8bit,
258                 ade7753_write_8bit,
259                 ADE7753_SAGLVL);
260 static IIO_DEV_ATTR_LINECYC(S_IWUSR | S_IRUGO,
261                 ade7753_read_8bit,
262                 ade7753_write_8bit,
263                 ADE7753_LINECYC);
264 static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
265                 ade7753_read_8bit,
266                 ade7753_write_8bit,
267                 ADE7753_WDIV);
268 static IIO_DEV_ATTR_IRMS(S_IWUSR | S_IRUGO,
269                 ade7753_read_24bit,
270                 NULL,
271                 ADE7753_IRMS);
272 static IIO_DEV_ATTR_VRMS(S_IRUGO,
273                 ade7753_read_24bit,
274                 NULL,
275                 ADE7753_VRMS);
276 static IIO_DEV_ATTR_IRMSOS(S_IWUSR | S_IRUGO,
277                 ade7753_read_16bit,
278                 ade7753_write_16bit,
279                 ADE7753_IRMSOS);
280 static IIO_DEV_ATTR_VRMSOS(S_IWUSR | S_IRUGO,
281                 ade7753_read_16bit,
282                 ade7753_write_16bit,
283                 ADE7753_VRMSOS);
284 static IIO_DEV_ATTR_WGAIN(S_IWUSR | S_IRUGO,
285                 ade7753_read_16bit,
286                 ade7753_write_16bit,
287                 ADE7753_WGAIN);
288 static IIO_DEV_ATTR_VAGAIN(S_IWUSR | S_IRUGO,
289                 ade7753_read_16bit,
290                 ade7753_write_16bit,
291                 ADE7753_VAGAIN);
292 static IIO_DEV_ATTR_PGA_GAIN(S_IWUSR | S_IRUGO,
293                 ade7753_read_16bit,
294                 ade7753_write_16bit,
295                 ADE7753_GAIN);
296 static IIO_DEV_ATTR_IPKLVL(S_IWUSR | S_IRUGO,
297                 ade7753_read_8bit,
298                 ade7753_write_8bit,
299                 ADE7753_IPKLVL);
300 static IIO_DEV_ATTR_VPKLVL(S_IWUSR | S_IRUGO,
301                 ade7753_read_8bit,
302                 ade7753_write_8bit,
303                 ADE7753_VPKLVL);
304 static IIO_DEV_ATTR_IPEAK(S_IRUGO,
305                 ade7753_read_24bit,
306                 NULL,
307                 ADE7753_IPEAK);
308 static IIO_DEV_ATTR_VPEAK(S_IRUGO,
309                 ade7753_read_24bit,
310                 NULL,
311                 ADE7753_VPEAK);
312 static IIO_DEV_ATTR_VPERIOD(S_IRUGO,
313                 ade7753_read_16bit,
314                 NULL,
315                 ADE7753_PERIOD);
316 static IIO_DEV_ATTR_CH_OFF(1, S_IWUSR | S_IRUGO,
317                 ade7753_read_8bit,
318                 ade7753_write_8bit,
319                 ADE7753_CH1OS);
320 static IIO_DEV_ATTR_CH_OFF(2, S_IWUSR | S_IRUGO,
321                 ade7753_read_8bit,
322                 ade7753_write_8bit,
323                 ADE7753_CH2OS);
324
325 static int ade7753_set_irq(struct device *dev, bool enable)
326 {
327         int ret;
328         u8 irqen;
329
330         ret = ade7753_spi_read_reg_8(dev, ADE7753_IRQEN, &irqen);
331         if (ret)
332                 goto error_ret;
333
334         if (enable)
335                 irqen |= BIT(3); /* Enables an interrupt when a data is
336                                     present in the waveform register */
337         else
338                 irqen &= ~BIT(3);
339
340         ret = ade7753_spi_write_reg_8(dev, ADE7753_IRQEN, irqen);
341
342 error_ret:
343         return ret;
344 }
345
346 /* Power down the device */
347 static int ade7753_stop_device(struct device *dev)
348 {
349         u16 val;
350         int ret;
351
352         ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
353         if (ret)
354                 return ret;
355
356         val |= BIT(4);  /* AD converters can be turned off */
357
358         return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
359 }
360
361 static int ade7753_initial_setup(struct iio_dev *indio_dev)
362 {
363         int ret;
364         struct device *dev = &indio_dev->dev;
365         struct ade7753_state *st = iio_priv(indio_dev);
366
367         /* use low spi speed for init */
368         st->us->mode = SPI_MODE_3;
369         spi_setup(st->us);
370
371         /* Disable IRQ */
372         ret = ade7753_set_irq(dev, false);
373         if (ret) {
374                 dev_err(dev, "disable irq failed");
375                 goto err_ret;
376         }
377
378         ade7753_reset(dev);
379         msleep(ADE7753_STARTUP_DELAY);
380
381 err_ret:
382         return ret;
383 }
384
385 static ssize_t ade7753_read_frequency(struct device *dev,
386                 struct device_attribute *attr,
387                 char *buf)
388 {
389         int ret;
390         u16 t;
391         int sps;
392
393         ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &t);
394         if (ret)
395                 return ret;
396
397         t = (t >> 11) & 0x3;
398         sps = 27900 / (1 + t);
399
400         return sprintf(buf, "%d\n", sps);
401 }
402
403 static ssize_t ade7753_write_frequency(struct device *dev,
404                 struct device_attribute *attr,
405                 const char *buf,
406                 size_t len)
407 {
408         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
409         struct ade7753_state *st = iio_priv(indio_dev);
410         u16 val;
411         int ret;
412         u16 reg, t;
413
414         ret = kstrtou16(buf, 10, &val);
415         if (ret)
416                 return ret;
417         if (!val)
418                 return -EINVAL;
419
420         mutex_lock(&indio_dev->mlock);
421
422         t = 27900 / val;
423         if (t > 0)
424                 t--;
425
426         if (t > 1)
427                 st->us->max_speed_hz = ADE7753_SPI_SLOW;
428         else
429                 st->us->max_speed_hz = ADE7753_SPI_FAST;
430
431         ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &reg);
432         if (ret)
433                 goto out;
434
435         reg &= ~(3 << 11);
436         reg |= t << 11;
437
438         ret = ade7753_spi_write_reg_16(dev, ADE7753_MODE, reg);
439
440 out:
441         mutex_unlock(&indio_dev->mlock);
442
443         return ret ? ret : len;
444 }
445
446 static IIO_DEV_ATTR_TEMP_RAW(ade7753_read_8bit);
447 static IIO_CONST_ATTR(in_temp_offset, "-25 C");
448 static IIO_CONST_ATTR(in_temp_scale, "0.67 C");
449
450 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
451                 ade7753_read_frequency,
452                 ade7753_write_frequency);
453
454 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("27900 14000 7000 3500");
455
456 static struct attribute *ade7753_attributes[] = {
457         &iio_dev_attr_in_temp_raw.dev_attr.attr,
458         &iio_const_attr_in_temp_offset.dev_attr.attr,
459         &iio_const_attr_in_temp_scale.dev_attr.attr,
460         &iio_dev_attr_sampling_frequency.dev_attr.attr,
461         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
462         &iio_dev_attr_phcal.dev_attr.attr,
463         &iio_dev_attr_cfden.dev_attr.attr,
464         &iio_dev_attr_aenergy.dev_attr.attr,
465         &iio_dev_attr_laenergy.dev_attr.attr,
466         &iio_dev_attr_vaenergy.dev_attr.attr,
467         &iio_dev_attr_lvaenergy.dev_attr.attr,
468         &iio_dev_attr_cfnum.dev_attr.attr,
469         &iio_dev_attr_apos.dev_attr.attr,
470         &iio_dev_attr_sagcyc.dev_attr.attr,
471         &iio_dev_attr_saglvl.dev_attr.attr,
472         &iio_dev_attr_linecyc.dev_attr.attr,
473         &iio_dev_attr_chksum.dev_attr.attr,
474         &iio_dev_attr_pga_gain.dev_attr.attr,
475         &iio_dev_attr_wgain.dev_attr.attr,
476         &iio_dev_attr_choff_1.dev_attr.attr,
477         &iio_dev_attr_choff_2.dev_attr.attr,
478         &iio_dev_attr_wdiv.dev_attr.attr,
479         &iio_dev_attr_irms.dev_attr.attr,
480         &iio_dev_attr_vrms.dev_attr.attr,
481         &iio_dev_attr_irmsos.dev_attr.attr,
482         &iio_dev_attr_vrmsos.dev_attr.attr,
483         &iio_dev_attr_vagain.dev_attr.attr,
484         &iio_dev_attr_ipklvl.dev_attr.attr,
485         &iio_dev_attr_vpklvl.dev_attr.attr,
486         &iio_dev_attr_ipeak.dev_attr.attr,
487         &iio_dev_attr_vpeak.dev_attr.attr,
488         &iio_dev_attr_vperiod.dev_attr.attr,
489         NULL,
490 };
491
492 static const struct attribute_group ade7753_attribute_group = {
493         .attrs = ade7753_attributes,
494 };
495
496 static const struct iio_info ade7753_info = {
497         .attrs = &ade7753_attribute_group,
498         .driver_module = THIS_MODULE,
499 };
500
501 static int ade7753_probe(struct spi_device *spi)
502 {
503         int ret;
504         struct ade7753_state *st;
505         struct iio_dev *indio_dev;
506
507         /* setup the industrialio driver allocated elements */
508         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
509         if (!indio_dev)
510                 return -ENOMEM;
511         /* this is only used for removal purposes */
512         spi_set_drvdata(spi, indio_dev);
513
514         st = iio_priv(indio_dev);
515         st->us = spi;
516         mutex_init(&st->buf_lock);
517
518         indio_dev->name = spi->dev.driver->name;
519         indio_dev->dev.parent = &spi->dev;
520         indio_dev->info = &ade7753_info;
521         indio_dev->modes = INDIO_DIRECT_MODE;
522
523         /* Get the device into a sane initial state */
524         ret = ade7753_initial_setup(indio_dev);
525         if (ret)
526                 return ret;
527
528         return iio_device_register(indio_dev);
529 }
530
531 /* fixme, confirm ordering in this function */
532 static int ade7753_remove(struct spi_device *spi)
533 {
534         struct iio_dev *indio_dev = spi_get_drvdata(spi);
535
536         iio_device_unregister(indio_dev);
537         ade7753_stop_device(&indio_dev->dev);
538
539         return 0;
540 }
541
542 static struct spi_driver ade7753_driver = {
543         .driver = {
544                 .name = "ade7753",
545         },
546         .probe = ade7753_probe,
547         .remove = ade7753_remove,
548 };
549 module_spi_driver(ade7753_driver);
550
551 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
552 MODULE_DESCRIPTION("Analog Devices ADE7753/6 Single-Phase Multifunction Meter");
553 MODULE_LICENSE("GPL v2");
554 MODULE_ALIAS("spi:ade7753");