cfg80211: handle failed skb allocation
[cascardo/linux.git] / drivers / staging / rdma / hfi1 / trace.c
1 /*
2  * Copyright(c) 2015, 2016 Intel Corporation.
3  *
4  * This file is provided under a dual BSD/GPLv2 license.  When using or
5  * redistributing this file, you may do so under either license.
6  *
7  * GPL LICENSE SUMMARY
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of version 2 of the GNU General Public License as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16  * General Public License for more details.
17  *
18  * BSD LICENSE
19  *
20  * Redistribution and use in source and binary forms, with or without
21  * modification, are permitted provided that the following conditions
22  * are met:
23  *
24  *  - Redistributions of source code must retain the above copyright
25  *    notice, this list of conditions and the following disclaimer.
26  *  - Redistributions in binary form must reproduce the above copyright
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28  *    the documentation and/or other materials provided with the
29  *    distribution.
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31  *    contributors may be used to endorse or promote products derived
32  *    from this software without specific prior written permission.
33  *
34  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45  *
46  */
47 #define CREATE_TRACE_POINTS
48 #include "trace.h"
49
50 u8 ibhdr_exhdr_len(struct hfi1_ib_header *hdr)
51 {
52         struct hfi1_other_headers *ohdr;
53         u8 opcode;
54         u8 lnh = (u8)(be16_to_cpu(hdr->lrh[0]) & 3);
55
56         if (lnh == HFI1_LRH_BTH)
57                 ohdr = &hdr->u.oth;
58         else
59                 ohdr = &hdr->u.l.oth;
60         opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
61         return hdr_len_by_opcode[opcode] == 0 ?
62                0 : hdr_len_by_opcode[opcode] - (12 + 8);
63 }
64
65 #define IMM_PRN  "imm %d"
66 #define RETH_PRN "reth vaddr 0x%.16llx rkey 0x%.8x dlen 0x%.8x"
67 #define AETH_PRN "aeth syn 0x%.2x %s msn 0x%.8x"
68 #define DETH_PRN "deth qkey 0x%.8x sqpn 0x%.6x"
69 #define ATOMICACKETH_PRN "origdata %lld"
70 #define ATOMICETH_PRN "vaddr 0x%llx rkey 0x%.8x sdata %lld cdata %lld"
71
72 #define OP(transport, op) IB_OPCODE_## transport ## _ ## op
73
74 static u64 ib_u64_get(__be32 *p)
75 {
76         return ((u64)be32_to_cpu(p[0]) << 32) | be32_to_cpu(p[1]);
77 }
78
79 static const char *parse_syndrome(u8 syndrome)
80 {
81         switch (syndrome >> 5) {
82         case 0:
83                 return "ACK";
84         case 1:
85                 return "RNRNAK";
86         case 3:
87                 return "NAK";
88         }
89         return "";
90 }
91
92 const char *parse_everbs_hdrs(
93         struct trace_seq *p,
94         u8 opcode,
95         void *ehdrs)
96 {
97         union ib_ehdrs *eh = ehdrs;
98         const char *ret = trace_seq_buffer_ptr(p);
99
100         switch (opcode) {
101         /* imm */
102         case OP(RC, SEND_LAST_WITH_IMMEDIATE):
103         case OP(UC, SEND_LAST_WITH_IMMEDIATE):
104         case OP(RC, SEND_ONLY_WITH_IMMEDIATE):
105         case OP(UC, SEND_ONLY_WITH_IMMEDIATE):
106         case OP(RC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
107         case OP(UC, RDMA_WRITE_LAST_WITH_IMMEDIATE):
108                 trace_seq_printf(p, IMM_PRN,
109                                  be32_to_cpu(eh->imm_data));
110                 break;
111         /* reth + imm */
112         case OP(RC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
113         case OP(UC, RDMA_WRITE_ONLY_WITH_IMMEDIATE):
114                 trace_seq_printf(p, RETH_PRN " " IMM_PRN,
115                                  (unsigned long long)ib_u64_get(
116                                  (__be32 *)&eh->rc.reth.vaddr),
117                                  be32_to_cpu(eh->rc.reth.rkey),
118                                  be32_to_cpu(eh->rc.reth.length),
119                                  be32_to_cpu(eh->rc.imm_data));
120                 break;
121         /* reth */
122         case OP(RC, RDMA_READ_REQUEST):
123         case OP(RC, RDMA_WRITE_FIRST):
124         case OP(UC, RDMA_WRITE_FIRST):
125         case OP(RC, RDMA_WRITE_ONLY):
126         case OP(UC, RDMA_WRITE_ONLY):
127                 trace_seq_printf(p, RETH_PRN,
128                                  (unsigned long long)ib_u64_get(
129                                  (__be32 *)&eh->rc.reth.vaddr),
130                                  be32_to_cpu(eh->rc.reth.rkey),
131                                  be32_to_cpu(eh->rc.reth.length));
132                 break;
133         case OP(RC, RDMA_READ_RESPONSE_FIRST):
134         case OP(RC, RDMA_READ_RESPONSE_LAST):
135         case OP(RC, RDMA_READ_RESPONSE_ONLY):
136         case OP(RC, ACKNOWLEDGE):
137                 trace_seq_printf(p, AETH_PRN, be32_to_cpu(eh->aeth) >> 24,
138                                  parse_syndrome(be32_to_cpu(eh->aeth) >> 24),
139                                  be32_to_cpu(eh->aeth) & HFI1_MSN_MASK);
140                 break;
141         /* aeth + atomicacketh */
142         case OP(RC, ATOMIC_ACKNOWLEDGE):
143                 trace_seq_printf(p, AETH_PRN " " ATOMICACKETH_PRN,
144                                  be32_to_cpu(eh->at.aeth) >> 24,
145                                  parse_syndrome(be32_to_cpu(eh->at.aeth) >> 24),
146                                  be32_to_cpu(eh->at.aeth) & HFI1_MSN_MASK,
147                                  (unsigned long long)
148                                  ib_u64_get(eh->at.atomic_ack_eth));
149                 break;
150         /* atomiceth */
151         case OP(RC, COMPARE_SWAP):
152         case OP(RC, FETCH_ADD):
153                 trace_seq_printf(p, ATOMICETH_PRN,
154                                  (unsigned long long)ib_u64_get(
155                                  eh->atomic_eth.vaddr),
156                                  eh->atomic_eth.rkey,
157                                  (unsigned long long)ib_u64_get(
158                                  (__be32 *)&eh->atomic_eth.swap_data),
159                                  (unsigned long long)ib_u64_get(
160                                  (__be32 *)&eh->atomic_eth.compare_data));
161                 break;
162         /* deth */
163         case OP(UD, SEND_ONLY):
164         case OP(UD, SEND_ONLY_WITH_IMMEDIATE):
165                 trace_seq_printf(p, DETH_PRN,
166                                  be32_to_cpu(eh->ud.deth[0]),
167                                  be32_to_cpu(eh->ud.deth[1]) & RVT_QPN_MASK);
168                 break;
169         }
170         trace_seq_putc(p, 0);
171         return ret;
172 }
173
174 const char *parse_sdma_flags(
175         struct trace_seq *p,
176         u64 desc0, u64 desc1)
177 {
178         const char *ret = trace_seq_buffer_ptr(p);
179         char flags[5] = { 'x', 'x', 'x', 'x', 0 };
180
181         flags[0] = (desc1 & SDMA_DESC1_INT_REQ_FLAG) ? 'I' : '-';
182         flags[1] = (desc1 & SDMA_DESC1_HEAD_TO_HOST_FLAG) ?  'H' : '-';
183         flags[2] = (desc0 & SDMA_DESC0_FIRST_DESC_FLAG) ? 'F' : '-';
184         flags[3] = (desc0 & SDMA_DESC0_LAST_DESC_FLAG) ? 'L' : '-';
185         trace_seq_printf(p, "%s", flags);
186         if (desc0 & SDMA_DESC0_FIRST_DESC_FLAG)
187                 trace_seq_printf(p, " amode:%u aidx:%u alen:%u",
188                                  (u8)((desc1 >> SDMA_DESC1_HEADER_MODE_SHIFT) &
189                                       SDMA_DESC1_HEADER_MODE_MASK),
190                                  (u8)((desc1 >> SDMA_DESC1_HEADER_INDEX_SHIFT) &
191                                       SDMA_DESC1_HEADER_INDEX_MASK),
192                                  (u8)((desc1 >> SDMA_DESC1_HEADER_DWS_SHIFT) &
193                                       SDMA_DESC1_HEADER_DWS_MASK));
194         return ret;
195 }
196
197 const char *print_u32_array(
198         struct trace_seq *p,
199         u32 *arr, int len)
200 {
201         int i;
202         const char *ret = trace_seq_buffer_ptr(p);
203
204         for (i = 0; i < len ; i++)
205                 trace_seq_printf(p, "%s%#x", i == 0 ? "" : " ", arr[i]);
206         trace_seq_putc(p, 0);
207         return ret;
208 }
209
210 const char *print_u64_array(
211         struct trace_seq *p,
212         u64 *arr, int len)
213 {
214         int i;
215         const char *ret = trace_seq_buffer_ptr(p);
216
217         for (i = 0; i < len; i++)
218                 trace_seq_printf(p, "%s0x%016llx", i == 0 ? "" : " ", arr[i]);
219         trace_seq_putc(p, 0);
220         return ret;
221 }
222
223 __hfi1_trace_fn(PKT);
224 __hfi1_trace_fn(PROC);
225 __hfi1_trace_fn(SDMA);
226 __hfi1_trace_fn(LINKVERB);
227 __hfi1_trace_fn(DEBUG);
228 __hfi1_trace_fn(SNOOP);
229 __hfi1_trace_fn(CNTR);
230 __hfi1_trace_fn(PIO);
231 __hfi1_trace_fn(DC8051);
232 __hfi1_trace_fn(FIRMWARE);
233 __hfi1_trace_fn(RCVCTRL);
234 __hfi1_trace_fn(TID);
235 __hfi1_trace_fn(MMU);