drivers/staging/rtl8188eu/hal/usb_halinit.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  *
  19  ******************************************************************************/
  20 #define _HCI_HAL_INIT_C_
  21
  22 #include <osdep_service.h>
  23 #include <drv_types.h>
  24 #include <rtw_efuse.h>
  25 #include <fw.h>
  26 #include <rtl8188e_hal.h>
  27 #include <rtl8188e_led.h>
  28 #include <rtw_iol.h>
  29 #include <usb_hal.h>
  30 #include <phy.h>
  31
  32 #define         HAL_BB_ENABLE           1
  33
  34 static void _ConfigNormalChipOutEP_8188E(struct adapter *adapt, u8 NumOutPipe)
  35 {
  36         struct hal_data_8188e   *haldata        = GET_HAL_DATA(adapt);
  37
  38         switch (NumOutPipe) {
  39         case    3:
  40                 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ;
  41                 haldata->OutEpNumber = 3;
  42                 break;
  43         case    2:
  44                 haldata->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ;
  45                 haldata->OutEpNumber = 2;
  46                 break;
  47         case    1:
  48                 haldata->OutEpQueueSel = TX_SELE_HQ;
  49                 haldata->OutEpNumber = 1;
  50                 break;
  51         default:
  52                 break;
  53         }
  54         DBG_88E("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __func__, haldata->OutEpQueueSel, haldata->OutEpNumber);
  55 }
  56
  57 static bool HalUsbSetQueuePipeMapping8188EUsb(struct adapter *adapt, u8 NumInPipe, u8 NumOutPipe)
  58 {
  59         struct hal_data_8188e   *haldata        = GET_HAL_DATA(adapt);
  60         bool                    result          = false;
  61
  62         _ConfigNormalChipOutEP_8188E(adapt, NumOutPipe);
  63
  64         /*  Normal chip with one IN and one OUT doesn't have interrupt IN EP. */
  65         if (1 == haldata->OutEpNumber) {
  66                 if (1 != NumInPipe)
  67                         return result;
  68         }
  69
  70         /*  All config other than above support one Bulk IN and one Interrupt IN. */
  71
  72         result = Hal_MappingOutPipe(adapt, NumOutPipe);
  73
  74         return result;
  75 }
  76
  77 static void rtl8188eu_interface_configure(struct adapter *adapt)
  78 {
  79         struct hal_data_8188e   *haldata        = GET_HAL_DATA(adapt);
  80         struct dvobj_priv       *pdvobjpriv = adapter_to_dvobj(adapt);
  81
  82         if (pdvobjpriv->ishighspeed)
  83                 haldata->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;/* 512 bytes */
  84         else
  85                 haldata->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;/* 64 bytes */
  86
  87         haldata->interfaceIndex = pdvobjpriv->InterfaceNumber;
  88
  89         haldata->UsbTxAggMode           = 1;
  90         haldata->UsbTxAggDescNum        = 0x6;  /*  only 4 bits */
  91
  92         haldata->UsbRxAggMode           = USB_RX_AGG_DMA;/*  USB_RX_AGG_DMA; */
  93         haldata->UsbRxAggBlockCount     = 8; /* unit : 512b */
  94         haldata->UsbRxAggBlockTimeout   = 0x6;
  95         haldata->UsbRxAggPageCount      = 48; /* uint :128 b 0x0A;      10 = MAX_RX_DMA_BUFFER_SIZE/2/haldata->UsbBulkOutSize */
  96         haldata->UsbRxAggPageTimeout    = 0x4; /* 6, absolute time = 34ms/(2^6) */
  97
  98         HalUsbSetQueuePipeMapping8188EUsb(adapt,
  99                                 pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes);
 100 }
 101
 102 static u32 rtl8188eu_InitPowerOn(struct adapter *adapt)
 103 {
 104         u16 value16;
 105         /*  HW Power on sequence */
 106         struct hal_data_8188e   *haldata        = GET_HAL_DATA(adapt);
 107         if (haldata->bMacPwrCtrlOn)
 108                 return _SUCCESS;
 109
 110         if (!rtl88eu_pwrseqcmdparsing(adapt, PWR_CUT_ALL_MSK,
 111                                       Rtl8188E_NIC_PWR_ON_FLOW)) {
 112                 DBG_88E(KERN_ERR "%s: run power on flow fail\n", __func__);
 113                 return _FAIL;
 114         }
 115
 116         /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
 117         /*  Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
 118         usb_write16(adapt, REG_CR, 0x00);  /* suggseted by zhouzhou, by page, 20111230 */
 119
 120                 /*  Enable MAC DMA/WMAC/SCHEDULE/SEC block */
 121         value16 = usb_read16(adapt, REG_CR);
 122         value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN
 123                                 | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN);
 124         /*  for SDIO - Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. */
 125
 126         usb_write16(adapt, REG_CR, value16);
 127         haldata->bMacPwrCtrlOn = true;
 128
 129         return _SUCCESS;
 130 }
 131
 132 /*  Shall USB interface init this? */
 133 static void _InitInterrupt(struct adapter *Adapter)
 134 {
 135         u32 imr, imr_ex;
 136         u8  usb_opt;
 137         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 138
 139         /* HISR write one to clear */
 140         usb_write32(Adapter, REG_HISR_88E, 0xFFFFFFFF);
 141         /*  HIMR - */
 142         imr = IMR_PSTIMEOUT_88E | IMR_TBDER_88E | IMR_CPWM_88E | IMR_CPWM2_88E;
 143         usb_write32(Adapter, REG_HIMR_88E, imr);
 144         haldata->IntrMask[0] = imr;
 145
 146         imr_ex = IMR_TXERR_88E | IMR_RXERR_88E | IMR_TXFOVW_88E | IMR_RXFOVW_88E;
 147         usb_write32(Adapter, REG_HIMRE_88E, imr_ex);
 148         haldata->IntrMask[1] = imr_ex;
 149
 150         /*  REG_USB_SPECIAL_OPTION - BIT(4) */
 151         /*  0; Use interrupt endpoint to upload interrupt pkt */
 152         /*  1; Use bulk endpoint to upload interrupt pkt, */
 153         usb_opt = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 154
 155         if (!adapter_to_dvobj(Adapter)->ishighspeed)
 156                 usb_opt = usb_opt & (~INT_BULK_SEL);
 157         else
 158                 usb_opt = usb_opt | (INT_BULK_SEL);
 159
 160         usb_write8(Adapter, REG_USB_SPECIAL_OPTION, usb_opt);
 161 }
 162
 163 static void _InitQueueReservedPage(struct adapter *Adapter)
 164 {
 165         struct hal_data_8188e           *haldata = GET_HAL_DATA(Adapter);
 166         struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 167         u32 numHQ       = 0;
 168         u32 numLQ       = 0;
 169         u32 numNQ       = 0;
 170         u32 numPubQ;
 171         u32 value32;
 172         u8 value8;
 173         bool bWiFiConfig = pregistrypriv->wifi_spec;
 174
 175         if (bWiFiConfig) {
 176                 if (haldata->OutEpQueueSel & TX_SELE_HQ)
 177                         numHQ =  0x29;
 178
 179                 if (haldata->OutEpQueueSel & TX_SELE_LQ)
 180                         numLQ = 0x1C;
 181
 182                 /*  NOTE: This step shall be proceed before writting REG_RQPN. */
 183                 if (haldata->OutEpQueueSel & TX_SELE_NQ)
 184                         numNQ = 0x1C;
 185                 value8 = (u8)_NPQ(numNQ);
 186                 usb_write8(Adapter, REG_RQPN_NPQ, value8);
 187
 188                 numPubQ = 0xA8 - numHQ - numLQ - numNQ;
 189
 190                 /*  TX DMA */
 191                 value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN;
 192                 usb_write32(Adapter, REG_RQPN, value32);
 193         } else {
 194                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0000);/* Just follow MP Team,??? Georgia 03/28 */
 195                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0d);
 196                 usb_write32(Adapter, REG_RQPN, 0x808E000d);/* reserve 7 page for LPS */
 197         }
 198 }
 199
 200 static void _InitTxBufferBoundary(struct adapter *Adapter, u8 txpktbuf_bndy)
 201 {
 202         usb_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy);
 203         usb_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy);
 204         usb_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy);
 205         usb_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy);
 206         usb_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy);
 207 }
 208
 209 static void _InitPageBoundary(struct adapter *Adapter)
 210 {
 211         /*  RX Page Boundary */
 212         /*  */
 213         u16 rxff_bndy = MAX_RX_DMA_BUFFER_SIZE_88E-1;
 214
 215         usb_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy);
 216 }
 217
 218 static void _InitNormalChipRegPriority(struct adapter *Adapter, u16 beQ,
 219                                        u16 bkQ, u16 viQ, u16 voQ, u16 mgtQ,
 220                                        u16 hiQ)
 221 {
 222         u16 value16     = (usb_read16(Adapter, REG_TRXDMA_CTRL) & 0x7);
 223
 224         value16 |= _TXDMA_BEQ_MAP(beQ)  | _TXDMA_BKQ_MAP(bkQ) |
 225                    _TXDMA_VIQ_MAP(viQ)  | _TXDMA_VOQ_MAP(voQ) |
 226                    _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ);
 227
 228         usb_write16(Adapter, REG_TRXDMA_CTRL, value16);
 229 }
 230
 231 static void _InitNormalChipOneOutEpPriority(struct adapter *Adapter)
 232 {
 233         struct hal_data_8188e   *haldata        = GET_HAL_DATA(Adapter);
 234
 235         u16 value = 0;
 236         switch (haldata->OutEpQueueSel) {
 237         case TX_SELE_HQ:
 238                 value = QUEUE_HIGH;
 239                 break;
 240         case TX_SELE_LQ:
 241                 value = QUEUE_LOW;
 242                 break;
 243         case TX_SELE_NQ:
 244                 value = QUEUE_NORMAL;
 245                 break;
 246         default:
 247                 break;
 248         }
 249         _InitNormalChipRegPriority(Adapter, value, value, value, value,
 250                                    value, value);
 251 }
 252
 253 static void _InitNormalChipTwoOutEpPriority(struct adapter *Adapter)
 254 {
 255         struct hal_data_8188e   *haldata        = GET_HAL_DATA(Adapter);
 256         struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 257         u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 258         u16 valueHi = 0;
 259         u16 valueLow = 0;
 260
 261         switch (haldata->OutEpQueueSel) {
 262         case (TX_SELE_HQ | TX_SELE_LQ):
 263                 valueHi = QUEUE_HIGH;
 264                 valueLow = QUEUE_LOW;
 265                 break;
 266         case (TX_SELE_NQ | TX_SELE_LQ):
 267                 valueHi = QUEUE_NORMAL;
 268                 valueLow = QUEUE_LOW;
 269                 break;
 270         case (TX_SELE_HQ | TX_SELE_NQ):
 271                 valueHi = QUEUE_HIGH;
 272                 valueLow = QUEUE_NORMAL;
 273                 break;
 274         default:
 275                 break;
 276         }
 277
 278         if (!pregistrypriv->wifi_spec) {
 279                 beQ     = valueLow;
 280                 bkQ     = valueLow;
 281                 viQ     = valueHi;
 282                 voQ     = valueHi;
 283                 mgtQ    = valueHi;
 284                 hiQ     = valueHi;
 285         } else {/* for WMM ,CONFIG_OUT_EP_WIFI_MODE */
 286                 beQ     = valueLow;
 287                 bkQ     = valueHi;
 288                 viQ     = valueHi;
 289                 voQ     = valueLow;
 290                 mgtQ    = valueHi;
 291                 hiQ     = valueHi;
 292         }
 293         _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 294 }
 295
 296 static void _InitNormalChipThreeOutEpPriority(struct adapter *Adapter)
 297 {
 298         struct registry_priv *pregistrypriv = &Adapter->registrypriv;
 299         u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ;
 300
 301         if (!pregistrypriv->wifi_spec) {/*  typical setting */
 302                 beQ     = QUEUE_LOW;
 303                 bkQ     = QUEUE_LOW;
 304                 viQ     = QUEUE_NORMAL;
 305                 voQ     = QUEUE_HIGH;
 306                 mgtQ    = QUEUE_HIGH;
 307                 hiQ     = QUEUE_HIGH;
 308         } else {/*  for WMM */
 309                 beQ     = QUEUE_LOW;
 310                 bkQ     = QUEUE_NORMAL;
 311                 viQ     = QUEUE_NORMAL;
 312                 voQ     = QUEUE_HIGH;
 313                 mgtQ    = QUEUE_HIGH;
 314                 hiQ     = QUEUE_HIGH;
 315         }
 316         _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ);
 317 }
 318
 319 static void _InitQueuePriority(struct adapter *Adapter)
 320 {
 321         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 322
 323         switch (haldata->OutEpNumber) {
 324         case 1:
 325                 _InitNormalChipOneOutEpPriority(Adapter);
 326                 break;
 327         case 2:
 328                 _InitNormalChipTwoOutEpPriority(Adapter);
 329                 break;
 330         case 3:
 331                 _InitNormalChipThreeOutEpPriority(Adapter);
 332                 break;
 333         default:
 334                 break;
 335         }
 336 }
 337
 338 static void _InitNetworkType(struct adapter *Adapter)
 339 {
 340         u32 value32;
 341
 342         value32 = usb_read32(Adapter, REG_CR);
 343         /*  TODO: use the other function to set network type */
 344         value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP);
 345
 346         usb_write32(Adapter, REG_CR, value32);
 347 }
 348
 349 static void _InitTransferPageSize(struct adapter *Adapter)
 350 {
 351         /*  Tx page size is always 128. */
 352
 353         u8 value8;
 354         value8 = _PSRX(PBP_128) | _PSTX(PBP_128);
 355         usb_write8(Adapter, REG_PBP, value8);
 356 }
 357
 358 static void _InitDriverInfoSize(struct adapter *Adapter, u8 drvInfoSize)
 359 {
 360         usb_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize);
 361 }
 362
 363 static void _InitWMACSetting(struct adapter *Adapter)
 364 {
 365         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 366
 367         haldata->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |
 368                                   RCR_CBSSID_DATA | RCR_CBSSID_BCN |
 369                                   RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL |
 370                                   RCR_APP_MIC | RCR_APP_PHYSTS;
 371
 372         /*  some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() */
 373         usb_write32(Adapter, REG_RCR, haldata->ReceiveConfig);
 374
 375         /*  Accept all multicast address */
 376         usb_write32(Adapter, REG_MAR, 0xFFFFFFFF);
 377         usb_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF);
 378 }
 379
 380 static void _InitAdaptiveCtrl(struct adapter *Adapter)
 381 {
 382         u16 value16;
 383         u32 value32;
 384
 385         /*  Response Rate Set */
 386         value32 = usb_read32(Adapter, REG_RRSR);
 387         value32 &= ~RATE_BITMAP_ALL;
 388         value32 |= RATE_RRSR_CCK_ONLY_1M;
 389         usb_write32(Adapter, REG_RRSR, value32);
 390
 391         /*  CF-END Threshold */
 392
 393         /*  SIFS (used in NAV) */
 394         value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
 395         usb_write16(Adapter, REG_SPEC_SIFS, value16);
 396
 397         /*  Retry Limit */
 398         value16 = _LRL(0x30) | _SRL(0x30);
 399         usb_write16(Adapter, REG_RL, value16);
 400 }
 401
 402 static void _InitEDCA(struct adapter *Adapter)
 403 {
 404         /*  Set Spec SIFS (used in NAV) */
 405         usb_write16(Adapter, REG_SPEC_SIFS, 0x100a);
 406         usb_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a);
 407
 408         /*  Set SIFS for CCK */
 409         usb_write16(Adapter, REG_SIFS_CTX, 0x100a);
 410
 411         /*  Set SIFS for OFDM */
 412         usb_write16(Adapter, REG_SIFS_TRX, 0x100a);
 413
 414         /*  TXOP */
 415         usb_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B);
 416         usb_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F);
 417         usb_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324);
 418         usb_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226);
 419 }
 420
 421 static void _InitRDGSetting(struct adapter *Adapter)
 422 {
 423         usb_write8(Adapter, REG_RD_CTRL, 0xFF);
 424         usb_write16(Adapter, REG_RD_NAV_NXT, 0x200);
 425         usb_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05);
 426 }
 427
 428 static void _InitRxSetting(struct adapter *Adapter)
 429 {
 430         usb_write32(Adapter, REG_MACID, 0x87654321);
 431         usb_write32(Adapter, 0x0700, 0x87654321);
 432 }
 433
 434 static void _InitRetryFunction(struct adapter *Adapter)
 435 {
 436         u8 value8;
 437
 438         value8 = usb_read8(Adapter, REG_FWHW_TXQ_CTRL);
 439         value8 |= EN_AMPDU_RTY_NEW;
 440         usb_write8(Adapter, REG_FWHW_TXQ_CTRL, value8);
 441
 442         /*  Set ACK timeout */
 443         usb_write8(Adapter, REG_ACKTO, 0x40);
 444 }
 445
 446 /*-----------------------------------------------------------------------------
 447  * Function:    usb_AggSettingTxUpdate()
 448  *
 449  * Overview:    Separate TX/RX parameters update independent for TP detection and
 450  *                      dynamic TX/RX aggreagtion parameters update.
 451  *
 452  * Input:                       struct adapter *
 453  *
 454  * Output/Return:       NONE
 455  *
 456  * Revised History:
 457  *      When            Who             Remark
 458  *      12/10/2010      MHC             Separate to smaller function.
 459  *
 460  *---------------------------------------------------------------------------*/
 461 static void usb_AggSettingTxUpdate(struct adapter *Adapter)
 462 {
 463         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 464         u32 value32;
 465
 466         if (Adapter->registrypriv.wifi_spec)
 467                 haldata->UsbTxAggMode = false;
 468
 469         if (haldata->UsbTxAggMode) {
 470                 value32 = usb_read32(Adapter, REG_TDECTRL);
 471                 value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT);
 472                 value32 |= ((haldata->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT);
 473
 474                 usb_write32(Adapter, REG_TDECTRL, value32);
 475         }
 476 }       /*  usb_AggSettingTxUpdate */
 477
 478 /*-----------------------------------------------------------------------------
 479  * Function:    usb_AggSettingRxUpdate()
 480  *
 481  * Overview:    Separate TX/RX parameters update independent for TP detection and
 482  *                      dynamic TX/RX aggreagtion parameters update.
 483  *
 484  * Input:                       struct adapter *
 485  *
 486  * Output/Return:       NONE
 487  *
 488  * Revised History:
 489  *      When            Who             Remark
 490  *      12/10/2010      MHC             Separate to smaller function.
 491  *
 492  *---------------------------------------------------------------------------*/
 493 static void
 494 usb_AggSettingRxUpdate(
 495                 struct adapter *Adapter
 496         )
 497 {
 498         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 499         u8 valueDMA;
 500         u8 valueUSB;
 501
 502         valueDMA = usb_read8(Adapter, REG_TRXDMA_CTRL);
 503         valueUSB = usb_read8(Adapter, REG_USB_SPECIAL_OPTION);
 504
 505         switch (haldata->UsbRxAggMode) {
 506         case USB_RX_AGG_DMA:
 507                 valueDMA |= RXDMA_AGG_EN;
 508                 valueUSB &= ~USB_AGG_EN;
 509                 break;
 510         case USB_RX_AGG_USB:
 511                 valueDMA &= ~RXDMA_AGG_EN;
 512                 valueUSB |= USB_AGG_EN;
 513                 break;
 514         case USB_RX_AGG_MIX:
 515                 valueDMA |= RXDMA_AGG_EN;
 516                 valueUSB |= USB_AGG_EN;
 517                 break;
 518         case USB_RX_AGG_DISABLE:
 519         default:
 520                 valueDMA &= ~RXDMA_AGG_EN;
 521                 valueUSB &= ~USB_AGG_EN;
 522                 break;
 523         }
 524
 525         usb_write8(Adapter, REG_TRXDMA_CTRL, valueDMA);
 526         usb_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB);
 527
 528         switch (haldata->UsbRxAggMode) {
 529         case USB_RX_AGG_DMA:
 530                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 531                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, haldata->UsbRxAggPageTimeout);
 532                 break;
 533         case USB_RX_AGG_USB:
 534                 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 535                 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 536                 break;
 537         case USB_RX_AGG_MIX:
 538                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, haldata->UsbRxAggPageCount);
 539                 usb_write8(Adapter, REG_RXDMA_AGG_PG_TH+1, (haldata->UsbRxAggPageTimeout & 0x1F));/* 0x280[12:8] */
 540                 usb_write8(Adapter, REG_USB_AGG_TH, haldata->UsbRxAggBlockCount);
 541                 usb_write8(Adapter, REG_USB_AGG_TO, haldata->UsbRxAggBlockTimeout);
 542                 break;
 543         case USB_RX_AGG_DISABLE:
 544         default:
 545                 /*  TODO: */
 546                 break;
 547         }
 548
 549         switch (PBP_128) {
 550         case PBP_128:
 551                 haldata->HwRxPageSize = 128;
 552                 break;
 553         case PBP_64:
 554                 haldata->HwRxPageSize = 64;
 555                 break;
 556         case PBP_256:
 557                 haldata->HwRxPageSize = 256;
 558                 break;
 559         case PBP_512:
 560                 haldata->HwRxPageSize = 512;
 561                 break;
 562         case PBP_1024:
 563                 haldata->HwRxPageSize = 1024;
 564                 break;
 565         default:
 566                 break;
 567         }
 568 }       /*  usb_AggSettingRxUpdate */
 569
 570 static void InitUsbAggregationSetting(struct adapter *Adapter)
 571 {
 572         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 573
 574         /*  Tx aggregation setting */
 575         usb_AggSettingTxUpdate(Adapter);
 576
 577         /*  Rx aggregation setting */
 578         usb_AggSettingRxUpdate(Adapter);
 579
 580         /*  201/12/10 MH Add for USB agg mode dynamic switch. */
 581         haldata->UsbRxHighSpeedMode = false;
 582 }
 583
 584 static void _InitBeaconParameters(struct adapter *Adapter)
 585 {
 586         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
 587
 588         usb_write16(Adapter, REG_BCN_CTRL, 0x1010);
 589
 590         /*  TODO: Remove these magic number */
 591         usb_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404);/*  ms */
 592         usb_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*  5ms */
 593         usb_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); /*  2ms */
 594
 595         /*  Suggested by designer timchen. Change beacon AIFS to the largest number */
 596         /*  beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 */
 597         usb_write16(Adapter, REG_BCNTCFG, 0x660F);
 598
 599         haldata->RegBcnCtrlVal = usb_read8(Adapter, REG_BCN_CTRL);
 600         haldata->RegTxPause = usb_read8(Adapter, REG_TXPAUSE);
 601         haldata->RegFwHwTxQCtrl = usb_read8(Adapter, REG_FWHW_TXQ_CTRL+2);
 602         haldata->RegReg542 = usb_read8(Adapter, REG_TBTT_PROHIBIT+2);
 603         haldata->RegCR_1 = usb_read8(Adapter, REG_CR+1);
 604 }
 605
 606 static void _BeaconFunctionEnable(struct adapter *Adapter,
 607                                   bool Enable, bool Linked)
 608 {
 609         usb_write8(Adapter, REG_BCN_CTRL, (BIT(4) | BIT(3) | BIT(1)));
 610
 611         usb_write8(Adapter, REG_RD_CTRL+1, 0x6F);
 612 }
 613
 614 /*  Set CCK and OFDM Block "ON" */
 615 static void _BBTurnOnBlock(struct adapter *Adapter)
 616 {
 617         phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1);
 618         phy_set_bb_reg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
 619 }
 620
 621 enum {
 622         Antenna_Lfet = 1,
 623         Antenna_Right = 2,
 624 };
 625
 626 static void _InitAntenna_Selection(struct adapter *Adapter)
 627 {
 628         struct hal_data_8188e   *haldata        = GET_HAL_DATA(Adapter);
 629
 630         if (haldata->AntDivCfg == 0)
 631                 return;
 632         DBG_88E("==>  %s ....\n", __func__);
 633
 634         usb_write32(Adapter, REG_LEDCFG0, usb_read32(Adapter, REG_LEDCFG0) | BIT(23));
 635         phy_set_bb_reg(Adapter, rFPGA0_XAB_RFParameter, BIT(13), 0x01);
 636
 637         if (phy_query_bb_reg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A)
 638                 haldata->CurAntenna = Antenna_A;
 639         else
 640                 haldata->CurAntenna = Antenna_B;
 641         DBG_88E("%s,Cur_ant:(%x)%s\n", __func__, haldata->CurAntenna, (haldata->CurAntenna == Antenna_A) ? "Antenna_A" : "Antenna_B");
 642 }
 643
 644 /*-----------------------------------------------------------------------------
 645  * Function:    HwSuspendModeEnable92Cu()
 646  *
 647  * Overview:    HW suspend mode switch.
 648  *
 649  * Input:               NONE
 650  *
 651  * Output:      NONE
 652  *
 653  * Return:      NONE
 654  *
 655  * Revised History:
 656  *      When            Who             Remark
 657  *      08/23/2010      MHC             HW suspend mode switch test..
 658  *---------------------------------------------------------------------------*/
 659 enum rt_rf_power_state RfOnOffDetect(struct adapter *adapt)
 660 {
 661         u8 val8;
 662         enum rt_rf_power_state rfpowerstate = rf_off;
 663
 664         if (adapt->pwrctrlpriv.bHWPowerdown) {
 665                 val8 = usb_read8(adapt, REG_HSISR);
 666                 DBG_88E("pwrdown, 0x5c(BIT(7))=%02x\n", val8);
 667                 rfpowerstate = (val8 & BIT(7)) ? rf_off : rf_on;
 668         } else { /*  rf on/off */
 669                 usb_write8(adapt, REG_MAC_PINMUX_CFG, usb_read8(adapt, REG_MAC_PINMUX_CFG)&~(BIT(3)));
 670                 val8 = usb_read8(adapt, REG_GPIO_IO_SEL);
 671                 DBG_88E("GPIO_IN=%02x\n", val8);
 672                 rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off;
 673         }
 674         return rfpowerstate;
 675 }       /*  HalDetectPwrDownMode */
 676
 677 static u32 rtl8188eu_hal_init(struct adapter *Adapter)
 678 {
 679         u8 value8 = 0;
 680         u16  value16;
 681         u8 txpktbuf_bndy;
 682         u32 status = _SUCCESS;
 683         struct hal_data_8188e           *haldata = GET_HAL_DATA(Adapter);
 684         struct pwrctrl_priv             *pwrctrlpriv = &Adapter->pwrctrlpriv;
 685         struct registry_priv    *pregistrypriv = &Adapter->registrypriv;
 686         unsigned long init_start_time = jiffies;
 687
 688         #define HAL_INIT_PROFILE_TAG(stage) do {} while (0)
 689
 690
 691         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BEGIN);
 692
 693         if (Adapter->pwrctrlpriv.bkeepfwalive) {
 694
 695                 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 696                         rtl88eu_phy_iq_calibrate(Adapter, true);
 697                 } else {
 698                         rtl88eu_phy_iq_calibrate(Adapter, false);
 699                         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 700                 }
 701
 702                 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 703                 rtl88eu_phy_lc_calibrate(Adapter);
 704
 705                 goto exit;
 706         }
 707
 708         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON);
 709         status = rtl8188eu_InitPowerOn(Adapter);
 710         if (status == _FAIL) {
 711                 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n"));
 712                 goto exit;
 713         }
 714
 715         /*  Save target channel */
 716         haldata->CurrentChannel = 6;/* default set to 6 */
 717
 718         if (pwrctrlpriv->reg_rfoff) {
 719                 pwrctrlpriv->rf_pwrstate = rf_off;
 720         }
 721
 722         /*  2010/08/09 MH We need to check if we need to turnon or off RF after detecting */
 723         /*  HW GPIO pin. Before PHY_RFConfig8192C. */
 724         /*  2010/08/26 MH If Efuse does not support sective suspend then disable the function. */
 725
 726         if (!pregistrypriv->wifi_spec) {
 727                 txpktbuf_bndy = TX_PAGE_BOUNDARY_88E;
 728         } else {
 729                 /*  for WMM */
 730                 txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_88E;
 731         }
 732
 733         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01);
 734         _InitQueueReservedPage(Adapter);
 735         _InitQueuePriority(Adapter);
 736         _InitPageBoundary(Adapter);
 737         _InitTransferPageSize(Adapter);
 738
 739         _InitTxBufferBoundary(Adapter, 0);
 740
 741         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW);
 742         if (Adapter->registrypriv.mp_mode == 1) {
 743                 _InitRxSetting(Adapter);
 744                 Adapter->bFWReady = false;
 745         } else {
 746                 status = rtl88eu_download_fw(Adapter);
 747
 748                 if (status) {
 749                         DBG_88E("%s: Download Firmware failed!!\n", __func__);
 750                         Adapter->bFWReady = false;
 751                         return status;
 752                 } else {
 753                         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("Initializeadapt8192CSdio(): Download Firmware Success!!\n"));
 754                         Adapter->bFWReady = true;
 755                 }
 756         }
 757         rtl8188e_InitializeFirmwareVars(Adapter);
 758
 759         rtl88eu_phy_mac_config(Adapter);
 760
 761         rtl88eu_phy_bb_config(Adapter);
 762
 763         rtl88eu_phy_rf_config(Adapter);
 764
 765         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_EFUSE_PATCH);
 766         status = rtl8188e_iol_efuse_patch(Adapter);
 767         if (status == _FAIL) {
 768                 DBG_88E("%s  rtl8188e_iol_efuse_patch failed\n", __func__);
 769                 goto exit;
 770         }
 771
 772         _InitTxBufferBoundary(Adapter, txpktbuf_bndy);
 773
 774         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT);
 775         status =  InitLLTTable(Adapter, txpktbuf_bndy);
 776         if (status == _FAIL) {
 777                 RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n"));
 778                 goto exit;
 779         }
 780
 781         HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
 782         /*  Get Rx PHY status in order to report RSSI and others. */
 783         _InitDriverInfoSize(Adapter, DRVINFO_SZ);
 784
 785         _InitInterrupt(Adapter);
 786         hal_init_macaddr(Adapter);/* set mac_address */
 787         _InitNetworkType(Adapter);/* set msr */
 788         _InitWMACSetting(Adapter);
 789         _InitAdaptiveCtrl(Adapter);
 790         _InitEDCA(Adapter);
 791         _InitRetryFunction(Adapter);
 792         InitUsbAggregationSetting(Adapter);
 793         _InitBeaconParameters(Adapter);
 794         /*  Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch */
 795         /*  Hw bug which Hw initials RxFF boundary size to a value which is larger than the real Rx buffer size in 88E. */
 796         /*  Enable MACTXEN/MACRXEN block */
 797         value16 = usb_read16(Adapter, REG_CR);
 798         value16 |= (MACTXEN | MACRXEN);
 799         usb_write8(Adapter, REG_CR, value16);
 800
 801         if (haldata->bRDGEnable)
 802                 _InitRDGSetting(Adapter);
 803
 804         /* Enable TX Report */
 805         /* Enable Tx Report Timer */
 806         value8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 807         usb_write8(Adapter,  REG_TX_RPT_CTRL, (value8 | BIT(1) | BIT(0)));
 808         /* Set MAX RPT MACID */
 809         usb_write8(Adapter,  REG_TX_RPT_CTRL+1, 2);/* FOR sta mode ,0: bc/mc ,1:AP */
 810         /* Tx RPT Timer. Unit: 32us */
 811         usb_write16(Adapter, REG_TX_RPT_TIME, 0xCdf0);
 812
 813         usb_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
 814
 815         usb_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 816         usb_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400);  /*  unit: 256us. 256ms */
 817
 818         /* Keep RfRegChnlVal for later use. */
 819         haldata->RfRegChnlVal[0] = phy_query_rf_reg(Adapter, (enum rf_radio_path)0, RF_CHNLBW, bRFRegOffsetMask);
 820         haldata->RfRegChnlVal[1] = phy_query_rf_reg(Adapter, (enum rf_radio_path)1, RF_CHNLBW, bRFRegOffsetMask);
 821
 822 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK);
 823         _BBTurnOnBlock(Adapter);
 824
 825 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY);
 826         invalidate_cam_all(Adapter);
 827
 828 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11);
 829         /*  2010/12/17 MH We need to set TX power according to EFUSE content at first. */
 830         phy_set_tx_power_level(Adapter, haldata->CurrentChannel);
 831
 832 /*  Move by Neo for USB SS to below setp */
 833 /* _RfPowerSave(Adapter); */
 834
 835         _InitAntenna_Selection(Adapter);
 836
 837         /*  */
 838         /*  Disable BAR, suggested by Scott */
 839         /*  2010.04.09 add by hpfan */
 840         /*  */
 841         usb_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff);
 842
 843         /*  HW SEQ CTRL */
 844         /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */
 845         usb_write8(Adapter, REG_HWSEQ_CTRL, 0xFF);
 846
 847         if (pregistrypriv->wifi_spec)
 848                 usb_write16(Adapter, REG_FAST_EDCA_CTRL, 0);
 849
 850         /* Nav limit , suggest by scott */
 851         usb_write8(Adapter, 0x652, 0x0);
 852
 853 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM);
 854         rtl8188e_InitHalDm(Adapter);
 855
 856         /*  2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status */
 857         /*  and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not */
 858         /*  call initstruct adapter. May cause some problem?? */
 859         /*  Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed */
 860         /*  in MgntActSet_RF_State() after wake up, because the value of haldata->eRFPowerState */
 861         /*  is the same as eRfOff, we should change it to eRfOn after we config RF parameters. */
 862         /*  Added by tynli. 2010.03.30. */
 863         pwrctrlpriv->rf_pwrstate = rf_on;
 864
 865         /*  enable Tx report. */
 866         usb_write8(Adapter,  REG_FWHW_TXQ_CTRL+1, 0x0F);
 867
 868         /*  Suggested by SD1 pisa. Added by tynli. 2011.10.21. */
 869         usb_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x01);/* Pretx_en, for WEP/TKIP SEC */
 870
 871         /* tynli_test_tx_report. */
 872         usb_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0);
 873
 874         /* enable tx DMA to drop the redundate data of packet */
 875         usb_write16(Adapter, REG_TXDMA_OFFSET_CHK, (usb_read16(Adapter, REG_TXDMA_OFFSET_CHK) | DROP_DATA_EN));
 876
 877 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK);
 878                 /*  2010/08/26 MH Merge from 8192CE. */
 879         if (pwrctrlpriv->rf_pwrstate == rf_on) {
 880                 if (haldata->odmpriv.RFCalibrateInfo.bIQKInitialized) {
 881                                 rtl88eu_phy_iq_calibrate(Adapter, true);
 882                 } else {
 883                         rtl88eu_phy_iq_calibrate(Adapter, false);
 884                         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = true;
 885                 }
 886
 887 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK);
 888
 889                 ODM_TXPowerTrackingCheck(&haldata->odmpriv);
 890
 891 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK);
 892                         rtl88eu_phy_lc_calibrate(Adapter);
 893         }
 894
 895 /* HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); */
 896 /*      _InitPABias(Adapter); */
 897         usb_write8(Adapter, REG_USB_HRPWM, 0);
 898
 899         /* ack for xmit mgmt frames. */
 900         usb_write32(Adapter, REG_FWHW_TXQ_CTRL, usb_read32(Adapter, REG_FWHW_TXQ_CTRL) | BIT(12));
 901
 902 exit:
 903 HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END);
 904
 905         DBG_88E("%s in %dms\n", __func__,
 906                 jiffies_to_msecs(jiffies - init_start_time));
 907
 908
 909         return status;
 910 }
 911
 912 static void CardDisableRTL8188EU(struct adapter *Adapter)
 913 {
 914         u8 val8;
 915         struct hal_data_8188e   *haldata        = GET_HAL_DATA(Adapter);
 916
 917         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("CardDisableRTL8188EU\n"));
 918
 919         /* Stop Tx Report Timer. 0x4EC[Bit1]=b'0 */
 920         val8 = usb_read8(Adapter, REG_TX_RPT_CTRL);
 921         usb_write8(Adapter, REG_TX_RPT_CTRL, val8&(~BIT(1)));
 922
 923         /*  stop rx */
 924         usb_write8(Adapter, REG_CR, 0x0);
 925
 926         /*  Run LPS WL RFOFF flow */
 927         rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
 928                                  Rtl8188E_NIC_LPS_ENTER_FLOW);
 929
 930         /*  2. 0x1F[7:0] = 0            turn off RF */
 931
 932         val8 = usb_read8(Adapter, REG_MCUFWDL);
 933         if ((val8 & RAM_DL_SEL) && Adapter->bFWReady) { /* 8051 RAM code */
 934                 /*  Reset MCU 0x2[10]=0. */
 935                 val8 = usb_read8(Adapter, REG_SYS_FUNC_EN+1);
 936                 val8 &= ~BIT(2);        /*  0x2[10], FEN_CPUEN */
 937                 usb_write8(Adapter, REG_SYS_FUNC_EN+1, val8);
 938         }
 939
 940         /*  reset MCU ready status */
 941         usb_write8(Adapter, REG_MCUFWDL, 0);
 942
 943         /* YJ,add,111212 */
 944         /* Disable 32k */
 945         val8 = usb_read8(Adapter, REG_32K_CTRL);
 946         usb_write8(Adapter, REG_32K_CTRL, val8&(~BIT(0)));
 947
 948         /*  Card disable power action flow */
 949         rtl88eu_pwrseqcmdparsing(Adapter, PWR_CUT_ALL_MSK,
 950                                  Rtl8188E_NIC_DISABLE_FLOW);
 951
 952         /*  Reset MCU IO Wrapper */
 953         val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
 954         usb_write8(Adapter, REG_RSV_CTRL+1, (val8&(~BIT(3))));
 955         val8 = usb_read8(Adapter, REG_RSV_CTRL+1);
 956         usb_write8(Adapter, REG_RSV_CTRL+1, val8 | BIT(3));
 957
 958         /* YJ,test add, 111207. For Power Consumption. */
 959         val8 = usb_read8(Adapter, GPIO_IN);
 960         usb_write8(Adapter, GPIO_OUT, val8);
 961         usb_write8(Adapter, GPIO_IO_SEL, 0xFF);/* Reg0x46 */
 962
 963         val8 = usb_read8(Adapter, REG_GPIO_IO_SEL);
 964         usb_write8(Adapter, REG_GPIO_IO_SEL, (val8<<4));
 965         val8 = usb_read8(Adapter, REG_GPIO_IO_SEL+1);
 966         usb_write8(Adapter, REG_GPIO_IO_SEL+1, val8|0x0F);/* Reg0x43 */
 967         usb_write32(Adapter, REG_BB_PAD_CTRL, 0x00080808);/* set LNA ,TRSW,EX_PA Pin to output mode */
 968         haldata->bMacPwrCtrlOn = false;
 969         Adapter->bFWReady = false;
 970 }
 971 static void rtl8192cu_hw_power_down(struct adapter *adapt)
 972 {
 973         /*  2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. */
 974         /*  Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. */
 975
 976         /*  Enable register area 0x0-0xc. */
 977         usb_write8(adapt, REG_RSV_CTRL, 0x0);
 978         usb_write16(adapt, REG_APS_FSMCO, 0x8812);
 979 }
 980
 981 static u32 rtl8188eu_hal_deinit(struct adapter *Adapter)
 982 {
 983
 984         DBG_88E("==> %s\n", __func__);
 985
 986         usb_write32(Adapter, REG_HIMR_88E, IMR_DISABLED_88E);
 987         usb_write32(Adapter, REG_HIMRE_88E, IMR_DISABLED_88E);
 988
 989         DBG_88E("bkeepfwalive(%x)\n", Adapter->pwrctrlpriv.bkeepfwalive);
 990         if (Adapter->pwrctrlpriv.bkeepfwalive) {
 991                 if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
 992                         rtl8192cu_hw_power_down(Adapter);
 993         } else {
 994                 if (Adapter->hw_init_completed) {
 995                         CardDisableRTL8188EU(Adapter);
 996
 997                         if ((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown))
 998                                 rtl8192cu_hw_power_down(Adapter);
 999                 }
1000         }
1001         return _SUCCESS;
1002  }
1003
1004 static unsigned int rtl8188eu_inirp_init(struct adapter *Adapter)
1005 {
1006         u8 i;
1007         struct recv_buf *precvbuf;
1008         uint    status;
1009         struct recv_priv *precvpriv = &(Adapter->recvpriv);
1010
1011         status = _SUCCESS;
1012
1013         RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
1014                  ("===> usb_inirp_init\n"));
1015
1016         precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR;
1017
1018         /* issue Rx irp to receive data */
1019         precvbuf = (struct recv_buf *)precvpriv->precv_buf;
1020         for (i = 0; i < NR_RECVBUFF; i++) {
1021                 if (usb_read_port(Adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf) == false) {
1022                         RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("usb_rx_init: usb_read_port error\n"));
1023                         status = _FAIL;
1024                         goto exit;
1025                 }
1026
1027                 precvbuf++;
1028                 precvpriv->free_recv_buf_queue_cnt--;
1029         }
1030
1031 exit:
1032
1033         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("<=== usb_inirp_init\n"));
1034
1035
1036         return status;
1037 }
1038
1039 static unsigned int rtl8188eu_inirp_deinit(struct adapter *Adapter)
1040 {
1041         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n ===> usb_rx_deinit\n"));
1042
1043         usb_read_port_cancel(Adapter);
1044
1045         RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("\n <=== usb_rx_deinit\n"));
1046
1047         return _SUCCESS;
1048 }
1049
1050 /*  */
1051 /*  */
1052 /*      EEPROM/EFUSE Content Parsing */
1053 /*  */
1054 /*  */
1055 static void Hal_EfuseParsePIDVID_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1056 {
1057         struct hal_data_8188e   *haldata = GET_HAL_DATA(adapt);
1058
1059         if (!AutoLoadFail) {
1060                 /*  VID, PID */
1061                 haldata->EEPROMVID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_VID_88EU]);
1062                 haldata->EEPROMPID = EF2BYTE(*(__le16 *)&hwinfo[EEPROM_PID_88EU]);
1063
1064                 /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
1065                 haldata->EEPROMCustomerID = *(u8 *)&hwinfo[EEPROM_CUSTOMERID_88E];
1066                 haldata->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID;
1067         } else {
1068                 haldata->EEPROMVID                      = EEPROM_Default_VID;
1069                 haldata->EEPROMPID                      = EEPROM_Default_PID;
1070
1071                 /*  Customer ID, 0x00 and 0xff are reserved for Realtek. */
1072                 haldata->EEPROMCustomerID               = EEPROM_Default_CustomerID;
1073                 haldata->EEPROMSubCustomerID    = EEPROM_Default_SubCustomerID;
1074         }
1075
1076         DBG_88E("VID = 0x%04X, PID = 0x%04X\n", haldata->EEPROMVID, haldata->EEPROMPID);
1077         DBG_88E("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", haldata->EEPROMCustomerID, haldata->EEPROMSubCustomerID);
1078 }
1079
1080 static void Hal_EfuseParseMACAddr_8188EU(struct adapter *adapt, u8 *hwinfo, bool AutoLoadFail)
1081 {
1082         u16 i;
1083         u8 sMacAddr[6] = {0x00, 0xE0, 0x4C, 0x81, 0x88, 0x02};
1084         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1085
1086         if (AutoLoadFail) {
1087                 for (i = 0; i < 6; i++)
1088                         eeprom->mac_addr[i] = sMacAddr[i];
1089         } else {
1090                 /* Read Permanent MAC address */
1091                 memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
1092         }
1093         RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
1094                  ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %pM\n",
1095                  eeprom->mac_addr));
1096 }
1097
1098 static void
1099 readAdapterInfo_8188EU(
1100                 struct adapter *adapt
1101         )
1102 {
1103         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);
1104
1105         /* parse the eeprom/efuse content */
1106         Hal_EfuseParseIDCode88E(adapt, eeprom->efuse_eeprom_data);
1107         Hal_EfuseParsePIDVID_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1108         Hal_EfuseParseMACAddr_8188EU(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1109
1110         Hal_ReadPowerSavingMode88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1111         Hal_ReadTxPowerInfo88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1112         Hal_EfuseParseEEPROMVer88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1113         rtl8188e_EfuseParseChnlPlan(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1114         Hal_EfuseParseXtal_8188E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1115         Hal_EfuseParseCustomerID88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1116         Hal_ReadAntennaDiversity88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1117         Hal_EfuseParseBoardType88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1118         Hal_ReadThermalMeter_88E(adapt, eeprom->efuse_eeprom_data, eeprom->bautoload_fail_flag);
1119
1120 }
1121
1122 static void _ReadPROMContent(
1123         struct adapter *Adapter
1124         )
1125 {
1126         struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(Adapter);
1127         u8 eeValue;
1128
1129         /* check system boot selection */
1130         eeValue = usb_read8(Adapter, REG_9346CR);
1131         eeprom->EepromOrEfuse           = (eeValue & BOOT_FROM_EEPROM) ? true : false;
1132         eeprom->bautoload_fail_flag     = (eeValue & EEPROM_EN) ? false : true;
1133
1134         DBG_88E("Boot from %s, Autoload %s !\n", (eeprom->EepromOrEfuse ? "EEPROM" : "EFUSE"),
1135                 (eeprom->bautoload_fail_flag ? "Fail" : "OK"));
1136
1137         Hal_InitPGData88E(Adapter);
1138         readAdapterInfo_8188EU(Adapter);
1139 }
1140
1141 static void _ReadRFType(struct adapter *Adapter)
1142 {
1143         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
1144
1145         haldata->rf_chip = RF_6052;
1146 }
1147
1148 static void _ReadAdapterInfo8188EU(struct adapter *Adapter)
1149 {
1150         unsigned long start = jiffies;
1151
1152         MSG_88E("====> %s\n", __func__);
1153
1154         _ReadRFType(Adapter);/* rf_chip -> _InitRFType() */
1155         _ReadPROMContent(Adapter);
1156
1157         MSG_88E("<==== %s in %d ms\n", __func__,
1158                 jiffies_to_msecs(jiffies - start));
1159 }
1160
1161 #define GPIO_DEBUG_PORT_NUM 0
1162 static void rtl8192cu_trigger_gpio_0(struct adapter *adapt)
1163 {
1164 }
1165
1166 static void ResumeTxBeacon(struct adapter *adapt)
1167 {
1168         struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
1169
1170         /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1171         /*  which should be read from register to a global variable. */
1172
1173         usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) | BIT(6));
1174         haldata->RegFwHwTxQCtrl |= BIT(6);
1175         usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0xff);
1176         haldata->RegReg542 |= BIT(0);
1177         usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1178 }
1179
1180 static void StopTxBeacon(struct adapter *adapt)
1181 {
1182         struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
1183
1184         /*  2010.03.01. Marked by tynli. No need to call workitem beacause we record the value */
1185         /*  which should be read from register to a global variable. */
1186
1187         usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl) & (~BIT(6)));
1188         haldata->RegFwHwTxQCtrl &= (~BIT(6));
1189         usb_write8(adapt, REG_TBTT_PROHIBIT+1, 0x64);
1190         haldata->RegReg542 &= ~(BIT(0));
1191         usb_write8(adapt, REG_TBTT_PROHIBIT+2, haldata->RegReg542);
1192
1193          /* todo: CheckFwRsvdPageContent(Adapter);  2010.06.23. Added by tynli. */
1194 }
1195
1196 static void hw_var_set_opmode(struct adapter *Adapter, u8 variable, u8 *val)
1197 {
1198         u8 val8;
1199         u8 mode = *((u8 *)val);
1200
1201         /*  disable Port0 TSF update */
1202         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1203
1204         /*  set net_type */
1205         val8 = usb_read8(Adapter, MSR)&0x0c;
1206         val8 |= mode;
1207         usb_write8(Adapter, MSR, val8);
1208
1209         DBG_88E("%s()-%d mode = %d\n", __func__, __LINE__, mode);
1210
1211         if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
1212                 StopTxBeacon(Adapter);
1213
1214                 usb_write8(Adapter, REG_BCN_CTRL, 0x19);/* disable atim wnd */
1215         } else if ((mode == _HW_STATE_ADHOC_)) {
1216                 ResumeTxBeacon(Adapter);
1217                 usb_write8(Adapter, REG_BCN_CTRL, 0x1a);
1218         } else if (mode == _HW_STATE_AP_) {
1219                 ResumeTxBeacon(Adapter);
1220
1221                 usb_write8(Adapter, REG_BCN_CTRL, 0x12);
1222
1223                 /* Set RCR */
1224                 usb_write32(Adapter, REG_RCR, 0x7000208e);/* CBSSID_DATA must set to 0,reject ICV_ERR packet */
1225                 /* enable to rx data frame */
1226                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1227                 /* enable to rx ps-poll */
1228                 usb_write16(Adapter, REG_RXFLTMAP1, 0x0400);
1229
1230                 /* Beacon Control related register for first time */
1231                 usb_write8(Adapter, REG_BCNDMATIM, 0x02); /*  2ms */
1232
1233                 usb_write8(Adapter, REG_ATIMWND, 0x0a); /*  10ms */
1234                 usb_write16(Adapter, REG_BCNTCFG, 0x00);
1235                 usb_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04);
1236                 usb_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);/*  +32767 (~32ms) */
1237
1238                 /* reset TSF */
1239                 usb_write8(Adapter, REG_DUAL_TSF_RST, BIT(0));
1240
1241                 /* BIT3 - If set 0, hw will clr bcnq when tx becon ok/fail or port 0 */
1242                 usb_write8(Adapter, REG_MBID_NUM, usb_read8(Adapter, REG_MBID_NUM) | BIT(3) | BIT(4));
1243
1244                 /* enable BCN0 Function for if1 */
1245                 /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
1246                 usb_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT0_NORMAL_CHIP|EN_BCN_FUNCTION | BIT(1)));
1247
1248                 /* dis BCN1 ATIM  WND if if2 is station */
1249                 usb_write8(Adapter, REG_BCN_CTRL_1, usb_read8(Adapter, REG_BCN_CTRL_1) | BIT(0));
1250         }
1251 }
1252
1253 static void hw_var_set_macaddr(struct adapter *Adapter, u8 variable, u8 *val)
1254 {
1255         u8 idx = 0;
1256         u32 reg_macid;
1257
1258         reg_macid = REG_MACID;
1259
1260         for (idx = 0; idx < 6; idx++)
1261                 usb_write8(Adapter, (reg_macid+idx), val[idx]);
1262 }
1263
1264 static void hw_var_set_bssid(struct adapter *Adapter, u8 variable, u8 *val)
1265 {
1266         u8 idx = 0;
1267         u32 reg_bssid;
1268
1269         reg_bssid = REG_BSSID;
1270
1271         for (idx = 0; idx < 6; idx++)
1272                 usb_write8(Adapter, (reg_bssid+idx), val[idx]);
1273 }
1274
1275 static void hw_var_set_bcn_func(struct adapter *Adapter, u8 variable, u8 *val)
1276 {
1277         u32 bcn_ctrl_reg;
1278
1279         bcn_ctrl_reg = REG_BCN_CTRL;
1280
1281         if (*((u8 *)val))
1282                 usb_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT));
1283         else
1284                 usb_write8(Adapter, bcn_ctrl_reg, usb_read8(Adapter, bcn_ctrl_reg)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT)));
1285 }
1286
1287 static void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
1288 {
1289         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
1290         struct dm_priv  *pdmpriv = &haldata->dmpriv;
1291         struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1292
1293         switch (variable) {
1294         case HW_VAR_MEDIA_STATUS:
1295                 {
1296                         u8 val8;
1297
1298                         val8 = usb_read8(Adapter, MSR)&0x0c;
1299                         val8 |= *((u8 *)val);
1300                         usb_write8(Adapter, MSR, val8);
1301                 }
1302                 break;
1303         case HW_VAR_MEDIA_STATUS1:
1304                 {
1305                         u8 val8;
1306
1307                         val8 = usb_read8(Adapter, MSR) & 0x03;
1308                         val8 |= *((u8 *)val) << 2;
1309                         usb_write8(Adapter, MSR, val8);
1310                 }
1311                 break;
1312         case HW_VAR_SET_OPMODE:
1313                 hw_var_set_opmode(Adapter, variable, val);
1314                 break;
1315         case HW_VAR_MAC_ADDR:
1316                 hw_var_set_macaddr(Adapter, variable, val);
1317                 break;
1318         case HW_VAR_BSSID:
1319                 hw_var_set_bssid(Adapter, variable, val);
1320                 break;
1321         case HW_VAR_BASIC_RATE:
1322                 {
1323                         u16 BrateCfg = 0;
1324                         u8 RateIndex = 0;
1325
1326                         /*  2007.01.16, by Emily */
1327                         /*  Select RRSR (in Legacy-OFDM and CCK) */
1328                         /*  For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. */
1329                         /*  We do not use other rates. */
1330                         HalSetBrateCfg(Adapter, val, &BrateCfg);
1331                         DBG_88E("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg);
1332
1333                         /* 2011.03.30 add by Luke Lee */
1334                         /* CCK 2M ACK should be disabled for some BCM and Atheros AP IOT */
1335                         /* because CCK 2M has poor TXEVM */
1336                         /* CCK 5.5M & 11M ACK should be enabled for better performance */
1337
1338                         BrateCfg = (BrateCfg | 0xd) & 0x15d;
1339                         haldata->BasicRateSet = BrateCfg;
1340
1341                         BrateCfg |= 0x01; /*  default enable 1M ACK rate */
1342                         /*  Set RRSR rate table. */
1343                         usb_write8(Adapter, REG_RRSR, BrateCfg & 0xff);
1344                         usb_write8(Adapter, REG_RRSR+1, (BrateCfg >> 8) & 0xff);
1345                         usb_write8(Adapter, REG_RRSR+2, usb_read8(Adapter, REG_RRSR+2)&0xf0);
1346
1347                         /*  Set RTS initial rate */
1348                         while (BrateCfg > 0x1) {
1349                                 BrateCfg >>= 1;
1350                                 RateIndex++;
1351                         }
1352                         /*  Ziv - Check */
1353                         usb_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex);
1354                 }
1355                 break;
1356         case HW_VAR_TXPAUSE:
1357                 usb_write8(Adapter, REG_TXPAUSE, *((u8 *)val));
1358                 break;
1359         case HW_VAR_BCN_FUNC:
1360                 hw_var_set_bcn_func(Adapter, variable, val);
1361                 break;
1362         case HW_VAR_CORRECT_TSF:
1363                 {
1364                         u64     tsf;
1365                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1366                         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
1367
1368                         tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) - 1024; /* us */
1369
1370                         if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1371                                 StopTxBeacon(Adapter);
1372
1373                         /* disable related TSF function */
1374                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(3)));
1375
1376                         usb_write32(Adapter, REG_TSFTR, tsf);
1377                         usb_write32(Adapter, REG_TSFTR+4, tsf>>32);
1378
1379                         /* enable related TSF function */
1380                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(3));
1381
1382                         if (((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE))
1383                                 ResumeTxBeacon(Adapter);
1384                 }
1385                 break;
1386         case HW_VAR_CHECK_BSSID:
1387                 if (*((u8 *)val)) {
1388                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1389                 } else {
1390                         u32 val32;
1391
1392                         val32 = usb_read32(Adapter, REG_RCR);
1393
1394                         val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1395
1396                         usb_write32(Adapter, REG_RCR, val32);
1397                 }
1398                 break;
1399         case HW_VAR_MLME_DISCONNECT:
1400                 /* Set RCR to not to receive data frame when NO LINK state */
1401                 /* reject all data frames */
1402                 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1403
1404                 /* reset TSF */
1405                 usb_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
1406
1407                 /* disable update TSF */
1408                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1409                 break;
1410         case HW_VAR_MLME_SITESURVEY:
1411                 if (*((u8 *)val)) { /* under sitesurvey */
1412                         /* config RCR to receive different BSSID & not to receive data frame */
1413                         u32 v = usb_read32(Adapter, REG_RCR);
1414                         v &= ~(RCR_CBSSID_BCN);
1415                         usb_write32(Adapter, REG_RCR, v);
1416                         /* reject all data frame */
1417                         usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1418
1419                         /* disable update TSF */
1420                         usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL) | BIT(4));
1421                 } else { /* sitesurvey done */
1422                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1423                         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
1424
1425                         if ((is_client_associated_to_ap(Adapter)) ||
1426                             ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) {
1427                                 /* enable to rx data frame */
1428                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1429
1430                                 /* enable update TSF */
1431                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1432                         } else if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
1433                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1434                                 /* enable update TSF */
1435                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1436                         }
1437                         if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
1438                                 usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
1439                         } else {
1440                                 if (Adapter->in_cta_test) {
1441                                         u32 v = usb_read32(Adapter, REG_RCR);
1442                                         v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/*  RCR_ADF */
1443                                         usb_write32(Adapter, REG_RCR, v);
1444                                 } else {
1445                                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
1446                                 }
1447                         }
1448                 }
1449                 break;
1450         case HW_VAR_MLME_JOIN:
1451                 {
1452                         u8 RetryLimit = 0x30;
1453                         u8 type = *((u8 *)val);
1454                         struct mlme_priv        *pmlmepriv = &Adapter->mlmepriv;
1455
1456                         if (type == 0) { /*  prepare to join */
1457                                 /* enable to rx data frame.Accept all data frame */
1458                                 usb_write16(Adapter, REG_RXFLTMAP2, 0xFFFF);
1459
1460                                 if (Adapter->in_cta_test) {
1461                                         u32 v = usb_read32(Adapter, REG_RCR);
1462                                         v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN);/*  RCR_ADF */
1463                                         usb_write32(Adapter, REG_RCR, v);
1464                                 } else {
1465                                         usb_write32(Adapter, REG_RCR, usb_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
1466                                 }
1467
1468                                 if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
1469                                         RetryLimit = (haldata->CustomerID == RT_CID_CCX) ? 7 : 48;
1470                                 else /*  Ad-hoc Mode */
1471                                         RetryLimit = 0x7;
1472                         } else if (type == 1) {
1473                                 /* joinbss_event call back when join res < 0 */
1474                                 usb_write16(Adapter, REG_RXFLTMAP2, 0x00);
1475                         } else if (type == 2) {
1476                                 /* sta add event call back */
1477                                 /* enable update TSF */
1478                                 usb_write8(Adapter, REG_BCN_CTRL, usb_read8(Adapter, REG_BCN_CTRL)&(~BIT(4)));
1479
1480                                 if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE))
1481                                         RetryLimit = 0x7;
1482                         }
1483                         usb_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT);
1484                 }
1485                 break;
1486         case HW_VAR_BEACON_INTERVAL:
1487                 usb_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val));
1488                 break;
1489         case HW_VAR_SLOT_TIME:
1490                 {
1491                         u8 u1bAIFS, aSifsTime;
1492                         struct mlme_ext_priv    *pmlmeext = &Adapter->mlmeextpriv;
1493                         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
1494
1495                         usb_write8(Adapter, REG_SLOT, val[0]);
1496
1497                         if (pmlmeinfo->WMM_enable == 0) {
1498                                 if (pmlmeext->cur_wireless_mode == WIRELESS_11B)
1499                                         aSifsTime = 10;
1500                                 else
1501                                         aSifsTime = 16;
1502
1503                                 u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime);
1504
1505                                 /*  <Roger_EXP> Temporary removed, 2008.06.20. */
1506                                 usb_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS);
1507                                 usb_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS);
1508                                 usb_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS);
1509                                 usb_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS);
1510                         }
1511                 }
1512                 break;
1513         case HW_VAR_RESP_SIFS:
1514                 /* RESP_SIFS for CCK */
1515                 usb_write8(Adapter, REG_R2T_SIFS, val[0]); /*  SIFS_T2T_CCK (0x08) */
1516                 usb_write8(Adapter, REG_R2T_SIFS+1, val[1]); /* SIFS_R2T_CCK(0x08) */
1517                 /* RESP_SIFS for OFDM */
1518                 usb_write8(Adapter, REG_T2T_SIFS, val[2]); /* SIFS_T2T_OFDM (0x0a) */
1519                 usb_write8(Adapter, REG_T2T_SIFS+1, val[3]); /* SIFS_R2T_OFDM(0x0a) */
1520                 break;
1521         case HW_VAR_ACK_PREAMBLE:
1522                 {
1523                         u8 regTmp;
1524                         u8 bShortPreamble = *((bool *)val);
1525                         /*  Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) */
1526                         regTmp = (haldata->nCur40MhzPrimeSC)<<5;
1527                         if (bShortPreamble)
1528                                 regTmp |= 0x80;
1529
1530                         usb_write8(Adapter, REG_RRSR+2, regTmp);
1531                 }
1532                 break;
1533         case HW_VAR_SEC_CFG:
1534                 usb_write8(Adapter, REG_SECCFG, *((u8 *)val));
1535                 break;
1536         case HW_VAR_DM_FLAG:
1537                 podmpriv->SupportAbility = *((u8 *)val);
1538                 break;
1539         case HW_VAR_DM_FUNC_OP:
1540                 if (val[0])
1541                         podmpriv->BK_SupportAbility = podmpriv->SupportAbility;
1542                 else
1543                         podmpriv->SupportAbility = podmpriv->BK_SupportAbility;
1544                 break;
1545         case HW_VAR_DM_FUNC_SET:
1546                 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
1547                         pdmpriv->DMFlag = pdmpriv->InitDMFlag;
1548                         podmpriv->SupportAbility =      pdmpriv->InitODMFlag;
1549                 } else {
1550                         podmpriv->SupportAbility |= *((u32 *)val);
1551                 }
1552                 break;
1553         case HW_VAR_DM_FUNC_CLR:
1554                 podmpriv->SupportAbility &= *((u32 *)val);
1555                 break;
1556         case HW_VAR_CAM_EMPTY_ENTRY:
1557                 {
1558                         u8 ucIndex = *((u8 *)val);
1559                         u8 i;
1560                         u32 ulCommand = 0;
1561                         u32 ulContent = 0;
1562                         u32 ulEncAlgo = CAM_AES;
1563
1564                         for (i = 0; i < CAM_CONTENT_COUNT; i++) {
1565                                 /*  filled id in CAM config 2 byte */
1566                                 if (i == 0)
1567                                         ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo)<<2);
1568                                 else
1569                                         ulContent = 0;
1570                                 /*  polling bit, and No Write enable, and address */
1571                                 ulCommand = CAM_CONTENT_COUNT*ucIndex+i;
1572                                 ulCommand = ulCommand | CAM_POLLINIG|CAM_WRITE;
1573                                 /*  write content 0 is equall to mark invalid */
1574                                 usb_write32(Adapter, WCAMI, ulContent);  /* delay_ms(40); */
1575                                 usb_write32(Adapter, RWCAM, ulCommand);  /* delay_ms(40); */
1576                         }
1577                 }
1578                 break;
1579         case HW_VAR_CAM_INVALID_ALL:
1580                 usb_write32(Adapter, RWCAM, BIT(31) | BIT(30));
1581                 break;
1582         case HW_VAR_CAM_WRITE:
1583                 {
1584                         u32 cmd;
1585                         u32 *cam_val = (u32 *)val;
1586                         usb_write32(Adapter, WCAMI, cam_val[0]);
1587
1588                         cmd = CAM_POLLINIG | CAM_WRITE | cam_val[1];
1589                         usb_write32(Adapter, RWCAM, cmd);
1590                 }
1591                 break;
1592         case HW_VAR_AC_PARAM_VO:
1593                 usb_write32(Adapter, REG_EDCA_VO_PARAM, ((u32 *)(val))[0]);
1594                 break;
1595         case HW_VAR_AC_PARAM_VI:
1596                 usb_write32(Adapter, REG_EDCA_VI_PARAM, ((u32 *)(val))[0]);
1597                 break;
1598         case HW_VAR_AC_PARAM_BE:
1599                 haldata->AcParam_BE = ((u32 *)(val))[0];
1600                 usb_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]);
1601                 break;
1602         case HW_VAR_AC_PARAM_BK:
1603                 usb_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]);
1604                 break;
1605         case HW_VAR_ACM_CTRL:
1606                 {
1607                         u8 acm_ctrl = *((u8 *)val);
1608                         u8 AcmCtrl = usb_read8(Adapter, REG_ACMHWCTRL);
1609
1610                         if (acm_ctrl > 1)
1611                                 AcmCtrl = AcmCtrl | 0x1;
1612
1613                         if (acm_ctrl & BIT(3))
1614                                 AcmCtrl |= AcmHw_VoqEn;
1615                         else
1616                                 AcmCtrl &= (~AcmHw_VoqEn);
1617
1618                         if (acm_ctrl & BIT(2))
1619                                 AcmCtrl |= AcmHw_ViqEn;
1620                         else
1621                                 AcmCtrl &= (~AcmHw_ViqEn);
1622
1623                         if (acm_ctrl & BIT(1))
1624                                 AcmCtrl |= AcmHw_BeqEn;
1625                         else
1626                                 AcmCtrl &= (~AcmHw_BeqEn);
1627
1628                         DBG_88E("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl);
1629                         usb_write8(Adapter, REG_ACMHWCTRL, AcmCtrl);
1630                 }
1631                 break;
1632         case HW_VAR_AMPDU_MIN_SPACE:
1633                 {
1634                         u8 MinSpacingToSet;
1635                         u8 SecMinSpace;
1636
1637                         MinSpacingToSet = *((u8 *)val);
1638                         if (MinSpacingToSet <= 7) {
1639                                 switch (Adapter->securitypriv.dot11PrivacyAlgrthm) {
1640                                 case _NO_PRIVACY_:
1641                                 case _AES_:
1642                                         SecMinSpace = 0;
1643                                         break;
1644                                 case _WEP40_:
1645                                 case _WEP104_:
1646                                 case _TKIP_:
1647                                 case _TKIP_WTMIC_:
1648                                         SecMinSpace = 6;
1649                                         break;
1650                                 default:
1651                                         SecMinSpace = 7;
1652                                         break;
1653                                 }
1654                                 if (MinSpacingToSet < SecMinSpace)
1655                                         MinSpacingToSet = SecMinSpace;
1656                                 usb_write8(Adapter, REG_AMPDU_MIN_SPACE, (usb_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet);
1657                         }
1658                 }
1659                 break;
1660         case HW_VAR_AMPDU_FACTOR:
1661                 {
1662                         u8 RegToSet_Normal[4] = {0x41, 0xa8, 0x72, 0xb9};
1663                         u8 FactorToSet;
1664                         u8 *pRegToSet;
1665                         u8 index = 0;
1666
1667                         pRegToSet = RegToSet_Normal; /*  0xb972a841; */
1668                         FactorToSet = *((u8 *)val);
1669                         if (FactorToSet <= 3) {
1670                                 FactorToSet = 1 << (FactorToSet + 2);
1671                                 if (FactorToSet > 0xf)
1672                                         FactorToSet = 0xf;
1673
1674                                 for (index = 0; index < 4; index++) {
1675                                         if ((pRegToSet[index] & 0xf0) > (FactorToSet<<4))
1676                                                 pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4);
1677
1678                                         if ((pRegToSet[index] & 0x0f) > FactorToSet)
1679                                                 pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet);
1680
1681                                         usb_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]);
1682                                 }
1683                         }
1684                 }
1685                 break;
1686         case HW_VAR_RXDMA_AGG_PG_TH:
1687                 {
1688                         u8 threshold = *((u8 *)val);
1689                         if (threshold == 0)
1690                                 threshold = haldata->UsbRxAggPageCount;
1691                         usb_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);
1692                 }
1693                 break;
1694         case HW_VAR_SET_RPWM:
1695                 break;
1696         case HW_VAR_H2C_FW_PWRMODE:
1697                 {
1698                         u8 psmode = (*(u8 *)val);
1699
1700                         /*  Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power */
1701                         /*  saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. */
1702                         if (psmode != PS_MODE_ACTIVE)
1703                                 ODM_RF_Saving(podmpriv, true);
1704                         rtl8188e_set_FwPwrMode_cmd(Adapter, psmode);
1705                 }
1706                 break;
1707         case HW_VAR_H2C_FW_JOINBSSRPT:
1708                 {
1709                         u8 mstatus = (*(u8 *)val);
1710                         rtl8188e_set_FwJoinBssReport_cmd(Adapter, mstatus);
1711                 }
1712                 break;
1713         case HW_VAR_INITIAL_GAIN:
1714                 {
1715                         struct rtw_dig *pDigTable = &podmpriv->DM_DigTable;
1716                         u32 rx_gain = ((u32 *)(val))[0];
1717
1718                         if (rx_gain == 0xff) {/* restore rx gain */
1719                                 ODM_Write_DIG(podmpriv, pDigTable->BackupIGValue);
1720                         } else {
1721                                 pDigTable->BackupIGValue = pDigTable->CurIGValue;
1722                                 ODM_Write_DIG(podmpriv, rx_gain);
1723                         }
1724                 }
1725                 break;
1726         case HW_VAR_TRIGGER_GPIO_0:
1727                 rtl8192cu_trigger_gpio_0(Adapter);
1728                 break;
1729         case HW_VAR_RPT_TIMER_SETTING:
1730                 {
1731                         u16 min_rpt_time = (*(u16 *)val);
1732                         ODM_RA_Set_TxRPT_Time(podmpriv, min_rpt_time);
1733                 }
1734                 break;
1735         case HW_VAR_ANTENNA_DIVERSITY_SELECT:
1736                 {
1737                         u8 Optimum_antenna = (*(u8 *)val);
1738                         u8 Ant;
1739                         /* switch antenna to Optimum_antenna */
1740                         if (haldata->CurAntenna !=  Optimum_antenna) {
1741                                 Ant = (Optimum_antenna == 2) ? MAIN_ANT : AUX_ANT;
1742                                 rtl88eu_dm_update_rx_idle_ant(&haldata->odmpriv, Ant);
1743
1744                                 haldata->CurAntenna = Optimum_antenna;
1745                         }
1746                 }
1747                 break;
1748         case HW_VAR_EFUSE_BYTES: /*  To set EFUE total used bytes, added by Roger, 2008.12.22. */
1749                 haldata->EfuseUsedBytes = *((u16 *)val);
1750                 break;
1751         case HW_VAR_FIFO_CLEARN_UP:
1752                 {
1753                         struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv;
1754                         u8 trycnt = 100;
1755
1756                         /* pause tx */
1757                         usb_write8(Adapter, REG_TXPAUSE, 0xff);
1758
1759                         /* keep sn */
1760                         Adapter->xmitpriv.nqos_ssn = usb_read16(Adapter, REG_NQOS_SEQ);
1761
1762                         if (!pwrpriv->bkeepfwalive) {
1763                                 /* RX DMA stop */
1764                                 usb_write32(Adapter, REG_RXPKT_NUM, (usb_read32(Adapter, REG_RXPKT_NUM)|RW_RELEASE_EN));
1765                                 do {
1766                                         if (!(usb_read32(Adapter, REG_RXPKT_NUM)&RXDMA_IDLE))
1767                                                 break;
1768                                 } while (trycnt--);
1769                                 if (trycnt == 0)
1770                                         DBG_88E("Stop RX DMA failed......\n");
1771
1772                                 /* RQPN Load 0 */
1773                                 usb_write16(Adapter, REG_RQPN_NPQ, 0x0);
1774                                 usb_write32(Adapter, REG_RQPN, 0x80000000);
1775                                 mdelay(10);
1776                         }
1777                 }
1778                 break;
1779         case HW_VAR_CHECK_TXBUF:
1780                 break;
1781         case HW_VAR_APFM_ON_MAC:
1782                 haldata->bMacPwrCtrlOn = *val;
1783                 DBG_88E("%s: bMacPwrCtrlOn=%d\n", __func__, haldata->bMacPwrCtrlOn);
1784                 break;
1785         case HW_VAR_TX_RPT_MAX_MACID:
1786                 {
1787                         u8 maxMacid = *val;
1788                         DBG_88E("### MacID(%d),Set Max Tx RPT MID(%d)\n", maxMacid, maxMacid+1);
1789                         usb_write8(Adapter, REG_TX_RPT_CTRL+1, maxMacid+1);
1790                 }
1791                 break;
1792         case HW_VAR_H2C_MEDIA_STATUS_RPT:
1793                 rtl8188e_set_FwMediaStatus_cmd(Adapter , (*(__le16 *)val));
1794                 break;
1795         case HW_VAR_BCN_VALID:
1796                 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2, write 1 to clear, Clear by sw */
1797                 usb_write8(Adapter, REG_TDECTRL+2, usb_read8(Adapter, REG_TDECTRL+2) | BIT(0));
1798                 break;
1799         default:
1800                 break;
1801         }
1802 }
1803
1804 static void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val)
1805 {
1806         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
1807         struct odm_dm_struct *podmpriv = &haldata->odmpriv;
1808
1809         switch (variable) {
1810         case HW_VAR_BASIC_RATE:
1811                 *((u16 *)(val)) = haldata->BasicRateSet;
1812         case HW_VAR_TXPAUSE:
1813                 val[0] = usb_read8(Adapter, REG_TXPAUSE);
1814                 break;
1815         case HW_VAR_BCN_VALID:
1816                 /* BCN_VALID, BIT16 of REG_TDECTRL = BIT0 of REG_TDECTRL+2 */
1817                 val[0] = (BIT(0) & usb_read8(Adapter, REG_TDECTRL+2)) ? true : false;
1818                 break;
1819         case HW_VAR_DM_FLAG:
1820                 val[0] = podmpriv->SupportAbility;
1821                 break;
1822         case HW_VAR_RF_TYPE:
1823                 val[0] = haldata->rf_type;
1824                 break;
1825         case HW_VAR_FWLPS_RF_ON:
1826                 {
1827                         /* When we halt NIC, we should check if FW LPS is leave. */
1828                         if (Adapter->pwrctrlpriv.rf_pwrstate == rf_off) {
1829                                 /*  If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, */
1830                                 /*  because Fw is unload. */
1831                                 val[0] = true;
1832                         } else {
1833                                 u32 valRCR;
1834                                 valRCR = usb_read32(Adapter, REG_RCR);
1835                                 valRCR &= 0x00070000;
1836                                 if (valRCR)
1837                                         val[0] = false;
1838                                 else
1839                                         val[0] = true;
1840                         }
1841                 }
1842                 break;
1843         case HW_VAR_CURRENT_ANTENNA:
1844                 val[0] = haldata->CurAntenna;
1845                 break;
1846         case HW_VAR_EFUSE_BYTES: /*  To get EFUE total used bytes, added by Roger, 2008.12.22. */
1847                 *((u16 *)(val)) = haldata->EfuseUsedBytes;
1848                 break;
1849         case HW_VAR_APFM_ON_MAC:
1850                 *val = haldata->bMacPwrCtrlOn;
1851                 break;
1852         case HW_VAR_CHK_HI_QUEUE_EMPTY:
1853                 *val = ((usb_read32(Adapter, REG_HGQ_INFORMATION)&0x0000ff00) == 0) ? true : false;
1854                 break;
1855         default:
1856                 break;
1857         }
1858
1859 }
1860
1861 /*  */
1862 /*      Description: */
1863 /*              Query setting of specified variable. */
1864 /*  */
1865 static u8
1866 GetHalDefVar8188EUsb(
1867                 struct adapter *Adapter,
1868                 enum hal_def_variable eVariable,
1869                 void *pValue
1870         )
1871 {
1872         struct hal_data_8188e   *haldata = GET_HAL_DATA(Adapter);
1873         u8 bResult = _SUCCESS;
1874
1875         switch (eVariable) {
1876         case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
1877                 {
1878                         struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
1879                         struct sta_priv *pstapriv = &Adapter->stapriv;
1880                         struct sta_info *psta;
1881                         psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.MacAddress);
1882                         if (psta)
1883                                 *((int *)pValue) = psta->rssi_stat.UndecoratedSmoothedPWDB;
1884                 }
1885                 break;
1886         case HAL_DEF_IS_SUPPORT_ANT_DIV:
1887                 *((u8 *)pValue) = (haldata->AntDivCfg == 0) ? false : true;
1888                 break;
1889         case HAL_DEF_CURRENT_ANTENNA:
1890                 *((u8 *)pValue) = haldata->CurAntenna;
1891                 break;
1892         case HAL_DEF_DRVINFO_SZ:
1893                 *((u32 *)pValue) = DRVINFO_SZ;
1894                 break;
1895         case HAL_DEF_MAX_RECVBUF_SZ:
1896                 *((u32 *)pValue) = MAX_RECVBUF_SZ;
1897                 break;
1898         case HAL_DEF_RX_PACKET_OFFSET:
1899                 *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ;
1900                 break;
1901         case HAL_DEF_DBG_DM_FUNC:
1902                 *((u32 *)pValue) = haldata->odmpriv.SupportAbility;
1903                 break;
1904         case HAL_DEF_RA_DECISION_RATE:
1905                 {
1906                         u8 MacID = *((u8 *)pValue);
1907                         *((u8 *)pValue) = ODM_RA_GetDecisionRate_8188E(&(haldata->odmpriv), MacID);
1908                 }
1909                 break;
1910         case HAL_DEF_RA_SGI:
1911                 {
1912                         u8 MacID = *((u8 *)pValue);
1913                         *((u8 *)pValue) = ODM_RA_GetShortGI_8188E(&(haldata->odmpriv), MacID);
1914                 }
1915                 break;
1916         case HAL_DEF_PT_PWR_STATUS:
1917                 {
1918                         u8 MacID = *((u8 *)pValue);
1919                         *((u8 *)pValue) = ODM_RA_GetHwPwrStatus_8188E(&(haldata->odmpriv), MacID);
1920                 }
1921                 break;
1922         case HW_VAR_MAX_RX_AMPDU_FACTOR:
1923                 *((u32 *)pValue) = MAX_AMPDU_FACTOR_64K;
1924                 break;
1925         case HW_DEF_RA_INFO_DUMP:
1926                 {
1927                         u8 entry_id = *((u8 *)pValue);
1928                         if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) {
1929                                 DBG_88E("============ RA status check ===================\n");
1930                                 DBG_88E("Mac_id:%d , RateID = %d, RAUseRate = 0x%08x, RateSGI = %d, DecisionRate = 0x%02x ,PTStage = %d\n",
1931                                         entry_id,
1932                                         haldata->odmpriv.RAInfo[entry_id].RateID,
1933                                         haldata->odmpriv.RAInfo[entry_id].RAUseRate,
1934                                         haldata->odmpriv.RAInfo[entry_id].RateSGI,
1935                                         haldata->odmpriv.RAInfo[entry_id].DecisionRate,
1936                                         haldata->odmpriv.RAInfo[entry_id].PTStage);
1937                         }
1938                 }
1939                 break;
1940         case HW_DEF_ODM_DBG_FLAG:
1941                 {
1942                         struct odm_dm_struct *dm_ocm = &(haldata->odmpriv);
1943                         pr_info("dm_ocm->DebugComponents = 0x%llx\n", dm_ocm->DebugComponents);
1944                 }
1945                 break;
1946         case HAL_DEF_DBG_DUMP_RXPKT:
1947                 *((u8 *)pValue) = haldata->bDumpRxPkt;
1948                 break;
1949         case HAL_DEF_DBG_DUMP_TXPKT:
1950                 *((u8 *)pValue) = haldata->bDumpTxPkt;
1951                 break;
1952         default:
1953                 bResult = _FAIL;
1954                 break;
1955         }
1956
1957         return bResult;
1958 }
1959
1960 static void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level)
1961 {
1962         u8 init_rate = 0;
1963         u8 networkType, raid;
1964         u32 mask, rate_bitmap;
1965         u8 shortGIrate = false;
1966         int     supportRateNum = 0;
1967         struct sta_info *psta;
1968         struct hal_data_8188e   *haldata = GET_HAL_DATA(adapt);
1969         struct mlme_ext_priv    *pmlmeext = &adapt->mlmeextpriv;
1970         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
1971         struct wlan_bssid_ex    *cur_network = &(pmlmeinfo->network);
1972
1973         if (mac_id >= NUM_STA) /* CAM_SIZE */
1974                 return;
1975         psta = pmlmeinfo->FW_sta_info[mac_id].psta;
1976         if (psta == NULL)
1977                 return;
1978         switch (mac_id) {
1979         case 0:/*  for infra mode */
1980                 supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates);
1981                 networkType = judge_network_type(adapt, cur_network->SupportedRates, supportRateNum) & 0xf;
1982                 raid = networktype_to_raid(networkType);
1983                 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
1984                 mask |= (pmlmeinfo->HT_enable) ? update_MSC_rate(&(pmlmeinfo->HT_caps)) : 0;
1985                 if (support_short_GI(adapt, &(pmlmeinfo->HT_caps)))
1986                         shortGIrate = true;
1987                 break;
1988         case 1:/* for broadcast/multicast */
1989                 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1990                 if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
1991                         networkType = WIRELESS_11B;
1992                 else
1993                         networkType = WIRELESS_11G;
1994                 raid = networktype_to_raid(networkType);
1995                 mask = update_basic_rate(cur_network->SupportedRates, supportRateNum);
1996                 break;
1997         default: /* for each sta in IBSS */
1998                 supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates);
1999                 networkType = judge_network_type(adapt, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf;
2000                 raid = networktype_to_raid(networkType);
2001                 mask = update_supported_rate(cur_network->SupportedRates, supportRateNum);
2002
2003                 /* todo: support HT in IBSS */
2004                 break;
2005         }
2006
2007         rate_bitmap = ODM_Get_Rate_Bitmap(&haldata->odmpriv, mac_id, mask, rssi_level);
2008         DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
2009                 __func__, mac_id, networkType, mask, rssi_level, rate_bitmap);
2010
2011         mask &= rate_bitmap;
2012
2013         init_rate = get_highest_rate_idx(mask)&0x3f;
2014
2015         ODM_RA_UpdateRateInfo_8188E(&haldata->odmpriv, mac_id,
2016                                     raid, mask, shortGIrate);
2017
2018         /* set ra_id */
2019         psta->raid = raid;
2020         psta->init_rate = init_rate;
2021 }
2022
2023 static void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt)
2024 {
2025         u32 value32;
2026         struct mlme_ext_priv    *pmlmeext = &(adapt->mlmeextpriv);
2027         struct mlme_ext_info    *pmlmeinfo = &(pmlmeext->mlmext_info);
2028         u32 bcn_ctrl_reg                        = REG_BCN_CTRL;
2029         /* reset TSF, enable update TSF, correcting TSF On Beacon */
2030
2031         /* BCN interval */
2032         usb_write16(adapt, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval);
2033         usb_write8(adapt, REG_ATIMWND, 0x02);/*  2ms */
2034
2035         _InitBeaconParameters(adapt);
2036
2037         usb_write8(adapt, REG_SLOT, 0x09);
2038
2039         value32 = usb_read32(adapt, REG_TCR);
2040         value32 &= ~TSFRST;
2041         usb_write32(adapt,  REG_TCR, value32);
2042
2043         value32 |= TSFRST;
2044         usb_write32(adapt, REG_TCR, value32);
2045
2046         /*  NOTE: Fix test chip's bug (about contention windows's randomness) */
2047         usb_write8(adapt,  REG_RXTSF_OFFSET_CCK, 0x50);
2048         usb_write8(adapt, REG_RXTSF_OFFSET_OFDM, 0x50);
2049
2050         _BeaconFunctionEnable(adapt, true, true);
2051
2052         ResumeTxBeacon(adapt);
2053
2054         usb_write8(adapt, bcn_ctrl_reg, usb_read8(adapt, bcn_ctrl_reg) | BIT(1));
2055 }
2056
2057 static void rtl8188eu_init_default_value(struct adapter *adapt)
2058 {
2059         struct hal_data_8188e *haldata;
2060         struct pwrctrl_priv *pwrctrlpriv;
2061         u8 i;
2062
2063         haldata = GET_HAL_DATA(adapt);
2064         pwrctrlpriv = &adapt->pwrctrlpriv;
2065
2066         /* init default value */
2067         if (!pwrctrlpriv->bkeepfwalive)
2068                 haldata->LastHMEBoxNum = 0;
2069
2070         /* init dm default value */
2071         haldata->odmpriv.RFCalibrateInfo.bIQKInitialized = false;
2072         haldata->odmpriv.RFCalibrateInfo.TM_Trigger = 0;/* for IQK */
2073         haldata->pwrGroupCnt = 0;
2074         haldata->PGMaxGroup = 13;
2075         haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP_index = 0;
2076         for (i = 0; i < HP_THERMAL_NUM; i++)
2077                 haldata->odmpriv.RFCalibrateInfo.ThermalValue_HP[i] = 0;
2078 }
2079
2080 void rtl8188eu_set_hal_ops(struct adapter *adapt)
2081 {
2082         struct hal_ops  *halfunc = &adapt->HalFunc;
2083
2084
2085         adapt->HalData = kzalloc(sizeof(struct hal_data_8188e), GFP_KERNEL);
2086         if (adapt->HalData == NULL)
2087                 DBG_88E("cant not alloc memory for HAL DATA\n");
2088
2089         halfunc->hal_power_on = rtl8188eu_InitPowerOn;
2090         halfunc->hal_init = &rtl8188eu_hal_init;
2091         halfunc->hal_deinit = &rtl8188eu_hal_deinit;
2092
2093         halfunc->inirp_init = &rtl8188eu_inirp_init;
2094         halfunc->inirp_deinit = &rtl8188eu_inirp_deinit;
2095
2096         halfunc->init_xmit_priv = &rtl8188eu_init_xmit_priv;
2097
2098         halfunc->init_recv_priv = &rtl8188eu_init_recv_priv;
2099         halfunc->free_recv_priv = &rtl8188eu_free_recv_priv;
2100         halfunc->InitSwLeds = &rtl8188eu_InitSwLeds;
2101         halfunc->DeInitSwLeds = &rtl8188eu_DeInitSwLeds;
2102
2103         halfunc->init_default_value = &rtl8188eu_init_default_value;
2104         halfunc->intf_chip_configure = &rtl8188eu_interface_configure;
2105         halfunc->read_adapter_info = &_ReadAdapterInfo8188EU;
2106
2107         halfunc->SetHwRegHandler = &SetHwReg8188EU;
2108         halfunc->GetHwRegHandler = &GetHwReg8188EU;
2109         halfunc->GetHalDefVarHandler = &GetHalDefVar8188EUsb;
2110
2111         halfunc->UpdateRAMaskHandler = &UpdateHalRAMask8188EUsb;
2112         halfunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8188EUsb;
2113
2114         halfunc->hal_xmit = &rtl8188eu_hal_xmit;
2115         halfunc->mgnt_xmit = &rtl8188eu_mgnt_xmit;
2116
2117         rtl8188e_set_hal_ops(halfunc);
2118 }