Merge tag 'iommu-updates-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git...
[cascardo/linux.git] / drivers / staging / rtl8192e / rtl8192e / rtl_pci.h
1 /******************************************************************************
2  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3  *
4  * Based on the r8180 driver, which is:
5  * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al.
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms of version 2 of the GNU General Public License as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  * You should have received a copy of the GNU General Public License along with
16  * this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18  *
19  * The full GNU General Public License is included in this distribution in the
20  * file called LICENSE.
21  *
22  * Contact Information:
23  * wlanfae <wlanfae@realtek.com>
24  ******************************************************************************/
25 #ifndef _RTL_PCI_H
26 #define _RTL_PCI_H
27
28 #include <linux/types.h>
29 #include <linux/pci.h>
30
31 static inline void NdisRawWritePortUlong(u32 port,  u32 val)
32 {
33         outl(val, port);
34 }
35
36 static inline void NdisRawWritePortUchar(u32 port,  u8 val)
37 {
38         outb(val, port);
39 }
40
41 static inline void NdisRawReadPortUchar(u32 port, u8 *pval)
42 {
43         *pval = inb(port);
44 }
45
46 static inline void NdisRawReadPortUshort(u32 port, u16 *pval)
47 {
48         *pval = inw(port);
49 }
50
51 static inline void NdisRawReadPortUlong(u32 port, u32 *pval)
52 {
53         *pval = inl(port);
54 }
55
56 struct mp_adapter {
57         u8              LinkCtrlReg;
58
59         u8              BusNumber;
60         u8              DevNumber;
61         u8              FuncNumber;
62
63         u8              PciBridgeBusNum;
64         u8              PciBridgeDevNum;
65         u8              PciBridgeFuncNum;
66         u8              PciBridgeVendor;
67         u16             PciBridgeVendorId;
68         u16             PciBridgeDeviceId;
69         u8              PciBridgePCIeHdrOffset;
70         u8              PciBridgeLinkCtrlReg;
71 };
72
73 struct rt_pci_capab_header {
74         unsigned char   CapabilityID;
75         unsigned char   Next;
76 };
77
78 #define PCI_MAX_BRIDGE_NUMBER                           255
79 #define PCI_MAX_DEVICES                                         32
80 #define PCI_MAX_FUNCTION                                        8
81
82 #define PCI_CONF_ADDRESS                                        0x0CF8
83 #define PCI_CONF_DATA                                           0x0CFC
84
85 #define PCI_CLASS_BRIDGE_DEV                            0x06
86 #define PCI_SUBCLASS_BR_PCI_TO_PCI              0x04
87
88 #define U1DONTCARE                                              0xFF
89 #define U2DONTCARE                                              0xFFFF
90 #define U4DONTCARE                                              0xFFFFFFFF
91
92 #define INTEL_VENDOR_ID                                 0x8086
93 #define SIS_VENDOR_ID                                           0x1039
94 #define ATI_VENDOR_ID                                           0x1002
95 #define ATI_DEVICE_ID                                           0x7914
96 #define AMD_VENDOR_ID                                           0x1022
97
98 #define PCI_CAPABILITY_ID_PCI_EXPRESS           0x10
99
100 struct net_device;
101 bool rtl8192_pci_findadapter(struct pci_dev *pdev, struct net_device *dev);
102
103 #endif