1 /* Driver for Realtek PCI-Express card reader
3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2, or (at your option) any
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, see <http://www.gnu.org/licenses/>.
19 * Wei WANG (wei_wang@realsil.com.cn)
20 * Micky Ching (micky_ching@realsil.com.cn)
23 #include <linux/blkdev.h>
24 #include <linux/kthread.h>
25 #include <linux/sched.h>
26 #include <linux/vmalloc.h>
29 #include "rtsx_transport.h"
30 #include "rtsx_scsi.h"
31 #include "rtsx_card.h"
34 static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
36 struct ms_info *ms_card = &(chip->ms_card);
38 ms_card->err_code = err_code;
41 static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
43 struct ms_info *ms_card = &(chip->ms_card);
45 return (ms_card->err_code == err_code);
48 static int ms_parse_err_code(struct rtsx_chip *chip)
50 TRACE_RET(chip, STATUS_FAIL);
53 static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode,
54 u8 tpc, u8 cnt, u8 cfg)
56 struct ms_info *ms_card = &(chip->ms_card);
60 dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc);
64 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
65 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
66 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
67 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
68 0x01, PINGPONG_BUFFER);
70 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER,
71 0xFF, MS_TRANSFER_START | trans_mode);
72 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
73 MS_TRANSFER_END, MS_TRANSFER_END);
75 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
77 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
79 rtsx_clear_ms_error(chip);
80 ms_set_err_code(chip, MS_TO_ERROR);
81 TRACE_RET(chip, ms_parse_err_code(chip));
84 ptr = rtsx_get_cmd_data(chip) + 1;
86 if (!(tpc & 0x08)) { /* Read Packet */
87 if (*ptr & MS_CRC16_ERR) {
88 ms_set_err_code(chip, MS_CRC16_ERROR);
89 TRACE_RET(chip, ms_parse_err_code(chip));
91 } else { /* Write Packet */
92 if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
93 if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
94 ms_set_err_code(chip, MS_CMD_NK);
95 TRACE_RET(chip, ms_parse_err_code(chip));
100 if (*ptr & MS_RDY_TIMEOUT) {
101 rtsx_clear_ms_error(chip);
102 ms_set_err_code(chip, MS_TO_ERROR);
103 TRACE_RET(chip, ms_parse_err_code(chip));
106 return STATUS_SUCCESS;
109 static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
110 u8 tpc, u16 sec_cnt, u8 cfg, int mode_2k,
111 int use_sg, void *buf, int buf_len)
114 u8 val, err_code = 0;
115 enum dma_data_direction dir;
117 if (!buf || !buf_len)
118 TRACE_RET(chip, STATUS_FAIL);
120 if (trans_mode == MS_TM_AUTO_READ) {
121 dir = DMA_FROM_DEVICE;
122 err_code = MS_FLASH_READ_ERROR;
123 } else if (trans_mode == MS_TM_AUTO_WRITE) {
125 err_code = MS_FLASH_WRITE_ERROR;
127 TRACE_RET(chip, STATUS_FAIL);
132 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
133 rtsx_add_cmd(chip, WRITE_REG_CMD,
134 MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
135 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
136 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
139 rtsx_add_cmd(chip, WRITE_REG_CMD,
140 MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
142 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
145 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
147 rtsx_add_cmd(chip, WRITE_REG_CMD,
148 MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
149 rtsx_add_cmd(chip, CHECK_REG_CMD,
150 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
152 rtsx_send_cmd_no_wait(chip);
154 retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
155 use_sg, dir, chip->mspro_timeout);
157 ms_set_err_code(chip, err_code);
158 if (retval == -ETIMEDOUT)
159 retval = STATUS_TIMEDOUT;
161 retval = STATUS_FAIL;
163 TRACE_RET(chip, retval);
166 RTSX_READ_REG(chip, MS_TRANS_CFG, &val);
167 if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT))
168 TRACE_RET(chip, STATUS_FAIL);
170 return STATUS_SUCCESS;
173 static int ms_write_bytes(struct rtsx_chip *chip,
174 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
176 struct ms_info *ms_card = &(chip->ms_card);
179 if (!data || (data_len < cnt))
180 TRACE_RET(chip, STATUS_ERROR);
184 for (i = 0; i < cnt; i++) {
185 rtsx_add_cmd(chip, WRITE_REG_CMD,
186 PPBUF_BASE2 + i, 0xFF, data[i]);
189 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
191 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
192 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
193 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
194 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
195 0x01, PINGPONG_BUFFER);
197 rtsx_add_cmd(chip, WRITE_REG_CMD,
198 MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
199 rtsx_add_cmd(chip, CHECK_REG_CMD,
200 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
202 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
206 rtsx_read_register(chip, MS_TRANS_CFG, &val);
207 dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val);
209 rtsx_clear_ms_error(chip);
212 if (val & MS_CRC16_ERR) {
213 ms_set_err_code(chip, MS_CRC16_ERROR);
214 TRACE_RET(chip, ms_parse_err_code(chip));
217 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
218 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
219 ms_set_err_code(chip, MS_CMD_NK);
221 ms_parse_err_code(chip));
226 if (val & MS_RDY_TIMEOUT) {
227 ms_set_err_code(chip, MS_TO_ERROR);
228 TRACE_RET(chip, ms_parse_err_code(chip));
231 ms_set_err_code(chip, MS_TO_ERROR);
232 TRACE_RET(chip, ms_parse_err_code(chip));
235 return STATUS_SUCCESS;
238 static int ms_read_bytes(struct rtsx_chip *chip,
239 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
241 struct ms_info *ms_card = &(chip->ms_card);
246 TRACE_RET(chip, STATUS_ERROR);
250 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
251 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
252 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
253 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
254 0x01, PINGPONG_BUFFER);
256 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
257 MS_TRANSFER_START | MS_TM_READ_BYTES);
258 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
259 MS_TRANSFER_END, MS_TRANSFER_END);
261 for (i = 0; i < data_len - 1; i++)
262 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
265 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
267 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1,
270 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
274 rtsx_read_register(chip, MS_TRANS_CFG, &val);
275 rtsx_clear_ms_error(chip);
278 if (val & MS_CRC16_ERR) {
279 ms_set_err_code(chip, MS_CRC16_ERROR);
280 TRACE_RET(chip, ms_parse_err_code(chip));
283 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
284 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
285 ms_set_err_code(chip, MS_CMD_NK);
287 ms_parse_err_code(chip));
292 if (val & MS_RDY_TIMEOUT) {
293 ms_set_err_code(chip, MS_TO_ERROR);
294 TRACE_RET(chip, ms_parse_err_code(chip));
297 ms_set_err_code(chip, MS_TO_ERROR);
298 TRACE_RET(chip, ms_parse_err_code(chip));
301 ptr = rtsx_get_cmd_data(chip) + 1;
303 for (i = 0; i < data_len; i++)
306 if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
307 dev_dbg(rtsx_dev(chip), "Read format progress:\n");
311 return STATUS_SUCCESS;
314 static int ms_set_rw_reg_addr(struct rtsx_chip *chip,
315 u8 read_start, u8 read_cnt, u8 write_start, u8 write_cnt)
320 data[0] = read_start;
322 data[2] = write_start;
325 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
326 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
327 NO_WAIT_INT, data, 4);
328 if (retval == STATUS_SUCCESS)
329 return STATUS_SUCCESS;
330 rtsx_clear_ms_error(chip);
333 TRACE_RET(chip, STATUS_FAIL);
336 static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
343 return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
346 static int ms_set_init_para(struct rtsx_chip *chip)
348 struct ms_info *ms_card = &(chip->ms_card);
351 if (CHK_HG8BIT(ms_card)) {
353 ms_card->ms_clock = chip->asic_ms_hg_clk;
355 ms_card->ms_clock = chip->fpga_ms_hg_clk;
357 } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
359 ms_card->ms_clock = chip->asic_ms_4bit_clk;
361 ms_card->ms_clock = chip->fpga_ms_4bit_clk;
365 ms_card->ms_clock = chip->asic_ms_1bit_clk;
367 ms_card->ms_clock = chip->fpga_ms_1bit_clk;
370 retval = switch_clock(chip, ms_card->ms_clock);
371 if (retval != STATUS_SUCCESS)
372 TRACE_RET(chip, STATUS_FAIL);
374 retval = select_card(chip, MS_CARD);
375 if (retval != STATUS_SUCCESS)
376 TRACE_RET(chip, STATUS_FAIL);
378 return STATUS_SUCCESS;
381 static int ms_switch_clock(struct rtsx_chip *chip)
383 struct ms_info *ms_card = &(chip->ms_card);
386 retval = select_card(chip, MS_CARD);
387 if (retval != STATUS_SUCCESS)
388 TRACE_RET(chip, STATUS_FAIL);
390 retval = switch_clock(chip, ms_card->ms_clock);
391 if (retval != STATUS_SUCCESS)
392 TRACE_RET(chip, STATUS_FAIL);
394 return STATUS_SUCCESS;
397 static int ms_pull_ctl_disable(struct rtsx_chip *chip)
399 if (CHECK_PID(chip, 0x5208)) {
400 RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF,
401 MS_D1_PD | MS_D2_PD | MS_CLK_PD | MS_D6_PD);
402 RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF,
403 MS_D3_PD | MS_D0_PD | MS_BS_PD | XD_D4_PD);
404 RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF,
405 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
406 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF,
407 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
408 RTSX_WRITE_REG(chip, CARD_PULL_CTL5, 0xFF,
409 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
410 RTSX_WRITE_REG(chip, CARD_PULL_CTL6, 0xFF,
411 MS_D5_PD | MS_D4_PD);
412 } else if (CHECK_PID(chip, 0x5288)) {
413 if (CHECK_BARO_PKG(chip, QFN)) {
414 RTSX_WRITE_REG(chip, CARD_PULL_CTL1, 0xFF, 0x55);
415 RTSX_WRITE_REG(chip, CARD_PULL_CTL2, 0xFF, 0x55);
416 RTSX_WRITE_REG(chip, CARD_PULL_CTL3, 0xFF, 0x4B);
417 RTSX_WRITE_REG(chip, CARD_PULL_CTL4, 0xFF, 0x69);
421 return STATUS_SUCCESS;
424 static int ms_pull_ctl_enable(struct rtsx_chip *chip)
430 if (CHECK_PID(chip, 0x5208)) {
431 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
432 MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
433 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
434 MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
435 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
436 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
437 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
438 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
439 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
440 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
441 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
442 MS_D5_PD | MS_D4_PD);
443 } else if (CHECK_PID(chip, 0x5288)) {
444 if (CHECK_BARO_PKG(chip, QFN)) {
445 rtsx_add_cmd(chip, WRITE_REG_CMD,
446 CARD_PULL_CTL1, 0xFF, 0x55);
447 rtsx_add_cmd(chip, WRITE_REG_CMD,
448 CARD_PULL_CTL2, 0xFF, 0x45);
449 rtsx_add_cmd(chip, WRITE_REG_CMD,
450 CARD_PULL_CTL3, 0xFF, 0x4B);
451 rtsx_add_cmd(chip, WRITE_REG_CMD,
452 CARD_PULL_CTL4, 0xFF, 0x29);
456 retval = rtsx_send_cmd(chip, MS_CARD, 100);
458 TRACE_RET(chip, STATUS_FAIL);
460 return STATUS_SUCCESS;
463 static int ms_prepare_reset(struct rtsx_chip *chip)
465 struct ms_info *ms_card = &(chip->ms_card);
469 ms_card->ms_type = 0;
470 ms_card->check_ms_flow = 0;
471 ms_card->switch_8bit_fail = 0;
472 ms_card->delay_write.delay_write_flag = 0;
474 ms_card->pro_under_formatting = 0;
476 retval = ms_power_off_card3v3(chip);
477 if (retval != STATUS_SUCCESS)
478 TRACE_RET(chip, STATUS_FAIL);
480 if (!chip->ft2_fast_mode)
483 retval = enable_card_clock(chip, MS_CARD);
484 if (retval != STATUS_SUCCESS)
485 TRACE_RET(chip, STATUS_FAIL);
487 if (chip->asic_code) {
488 retval = ms_pull_ctl_enable(chip);
489 if (retval != STATUS_SUCCESS)
490 TRACE_RET(chip, STATUS_FAIL);
492 RTSX_WRITE_REG(chip, FPGA_PULL_CTL,
493 FPGA_MS_PULL_CTL_BIT | 0x20, 0);
496 if (!chip->ft2_fast_mode) {
497 retval = card_power_on(chip, MS_CARD);
498 if (retval != STATUS_SUCCESS)
499 TRACE_RET(chip, STATUS_FAIL);
504 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
505 oc_mask = MS_OC_NOW | MS_OC_EVER;
507 oc_mask = SD_OC_NOW | SD_OC_EVER;
509 if (chip->ocp_stat & oc_mask) {
510 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
512 TRACE_RET(chip, STATUS_FAIL);
517 RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, MS_OUTPUT_EN);
519 if (chip->asic_code) {
520 RTSX_WRITE_REG(chip, MS_CFG, 0xFF,
521 SAMPLE_TIME_RISING | PUSH_TIME_DEFAULT |
522 NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
524 RTSX_WRITE_REG(chip, MS_CFG, 0xFF,
525 SAMPLE_TIME_FALLING | PUSH_TIME_DEFAULT |
526 NO_EXTEND_TOGGLE | MS_BUS_WIDTH_1);
528 RTSX_WRITE_REG(chip, MS_TRANS_CFG,
529 0xFF, NO_WAIT_INT | NO_AUTO_READ_INT_REG);
530 RTSX_WRITE_REG(chip, CARD_STOP,
531 MS_STOP | MS_CLR_ERR, MS_STOP | MS_CLR_ERR);
533 retval = ms_set_init_para(chip);
534 if (retval != STATUS_SUCCESS)
535 TRACE_RET(chip, STATUS_FAIL);
537 return STATUS_SUCCESS;
540 static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
542 struct ms_info *ms_card = &(chip->ms_card);
546 retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1);
547 if (retval != STATUS_SUCCESS)
548 TRACE_RET(chip, STATUS_FAIL);
550 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
551 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG,
553 if (retval == STATUS_SUCCESS)
556 if (i == MS_MAX_RETRY_COUNT)
557 TRACE_RET(chip, STATUS_FAIL);
559 RTSX_READ_REG(chip, PPBUF_BASE2 + 2, &val);
560 dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
563 ms_card->check_ms_flow = 1;
565 TRACE_RET(chip, STATUS_FAIL);
568 RTSX_READ_REG(chip, PPBUF_BASE2 + 4, &val);
569 dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
571 ms_card->check_ms_flow = 1;
572 TRACE_RET(chip, STATUS_FAIL);
575 RTSX_READ_REG(chip, PPBUF_BASE2 + 5, &val);
576 dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
578 RTSX_READ_REG(chip, PPBUF_BASE2, &val);
580 chip->card_wp |= MS_CARD;
582 chip->card_wp &= ~MS_CARD;
584 } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
585 chip->card_wp |= MS_CARD;
587 ms_card->check_ms_flow = 1;
588 TRACE_RET(chip, STATUS_FAIL);
591 ms_card->ms_type |= TYPE_MSPRO;
593 RTSX_READ_REG(chip, PPBUF_BASE2 + 3, &val);
594 dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
596 ms_card->ms_type &= 0x0F;
597 } else if (val == 7) {
599 ms_card->ms_type |= MS_HG;
601 ms_card->ms_type &= 0x0F;
604 TRACE_RET(chip, STATUS_FAIL);
607 return STATUS_SUCCESS;
610 static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
615 /* Confirm CPU StartUp */
618 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
619 ms_set_err_code(chip, MS_NO_CARD);
620 TRACE_RET(chip, STATUS_FAIL);
623 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
624 retval = ms_read_bytes(chip, GET_INT, 1,
625 NO_WAIT_INT, &val, 1);
626 if (retval == STATUS_SUCCESS)
629 if (i == MS_MAX_RETRY_COUNT)
630 TRACE_RET(chip, STATUS_FAIL);
633 TRACE_RET(chip, STATUS_FAIL);
637 } while (!(val & INT_REG_CED));
639 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
640 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
641 if (retval == STATUS_SUCCESS)
644 if (i == MS_MAX_RETRY_COUNT)
645 TRACE_RET(chip, STATUS_FAIL);
647 if (val & INT_REG_ERR) {
648 if (val & INT_REG_CMDNK)
649 chip->card_wp |= (MS_CARD);
651 TRACE_RET(chip, STATUS_FAIL);
653 /* -- end confirm CPU startup */
655 return STATUS_SUCCESS;
658 static int ms_switch_parallel_bus(struct rtsx_chip *chip)
663 data[0] = PARALLEL_4BIT_IF;
665 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
666 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT,
668 if (retval == STATUS_SUCCESS)
671 if (retval != STATUS_SUCCESS)
672 TRACE_RET(chip, STATUS_FAIL);
674 return STATUS_SUCCESS;
677 static int ms_switch_8bit_bus(struct rtsx_chip *chip)
679 struct ms_info *ms_card = &(chip->ms_card);
683 data[0] = PARALLEL_8BIT_IF;
685 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
686 retval = ms_write_bytes(chip, WRITE_REG, 1,
687 NO_WAIT_INT, data, 2);
688 if (retval == STATUS_SUCCESS)
691 if (retval != STATUS_SUCCESS)
692 TRACE_RET(chip, STATUS_FAIL);
694 RTSX_WRITE_REG(chip, MS_CFG, 0x98,
695 MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
696 ms_card->ms_type |= MS_8BIT;
697 retval = ms_set_init_para(chip);
698 if (retval != STATUS_SUCCESS)
699 TRACE_RET(chip, STATUS_FAIL);
701 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
702 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT,
704 if (retval != STATUS_SUCCESS)
705 TRACE_RET(chip, STATUS_FAIL);
708 return STATUS_SUCCESS;
711 static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
713 struct ms_info *ms_card = &(chip->ms_card);
716 for (i = 0; i < 3; i++) {
717 retval = ms_prepare_reset(chip);
718 if (retval != STATUS_SUCCESS)
719 TRACE_RET(chip, STATUS_FAIL);
721 retval = ms_identify_media_type(chip, switch_8bit_bus);
722 if (retval != STATUS_SUCCESS)
723 TRACE_RET(chip, STATUS_FAIL);
725 retval = ms_confirm_cpu_startup(chip);
726 if (retval != STATUS_SUCCESS)
727 TRACE_RET(chip, STATUS_FAIL);
729 retval = ms_switch_parallel_bus(chip);
730 if (retval != STATUS_SUCCESS) {
731 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
732 ms_set_err_code(chip, MS_NO_CARD);
733 TRACE_RET(chip, STATUS_FAIL);
741 if (retval != STATUS_SUCCESS)
742 TRACE_RET(chip, STATUS_FAIL);
744 /* Switch MS-PRO into Parallel mode */
745 RTSX_WRITE_REG(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
746 RTSX_WRITE_REG(chip, MS_CFG, PUSH_TIME_ODD, PUSH_TIME_ODD);
748 retval = ms_set_init_para(chip);
749 if (retval != STATUS_SUCCESS)
750 TRACE_RET(chip, STATUS_FAIL);
752 /* If MSPro HG Card, We shall try to switch to 8-bit bus */
753 if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
754 retval = ms_switch_8bit_bus(chip);
755 if (retval != STATUS_SUCCESS) {
756 ms_card->switch_8bit_fail = 1;
757 TRACE_RET(chip, STATUS_FAIL);
761 return STATUS_SUCCESS;
765 static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
770 ms_cleanup_work(chip);
772 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
773 if (retval != STATUS_SUCCESS)
774 TRACE_RET(chip, STATUS_FAIL);
783 retval = ms_write_bytes(chip, PRO_WRITE_REG , 6, NO_WAIT_INT, buf, 6);
784 if (retval != STATUS_SUCCESS)
785 TRACE_RET(chip, STATUS_FAIL);
787 retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
788 if (retval != STATUS_SUCCESS)
789 TRACE_RET(chip, STATUS_FAIL);
791 RTSX_READ_REG(chip, MS_TRANS_CFG, buf);
792 if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR))
793 TRACE_RET(chip, STATUS_FAIL);
795 return STATUS_SUCCESS;
799 static int ms_read_attribute_info(struct rtsx_chip *chip)
801 struct ms_info *ms_card = &(chip->ms_card);
803 u8 val, *buf, class_code, device_type, sub_class, data[16];
804 u16 total_blk = 0, blk_size = 0;
806 u32 xc_total_blk = 0, xc_blk_size = 0;
808 u32 sys_info_addr = 0, sys_info_size;
809 #ifdef SUPPORT_PCGL_1P18
810 u32 model_name_addr = 0, model_name_size;
811 int found_sys_info = 0, found_model_name = 0;
814 retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7);
815 if (retval != STATUS_SUCCESS)
816 TRACE_RET(chip, STATUS_FAIL);
818 if (CHK_MS8BIT(ms_card))
819 data[0] = PARALLEL_8BIT_IF;
821 data[0] = PARALLEL_4BIT_IF;
832 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
833 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT,
835 if (retval == STATUS_SUCCESS)
838 if (retval != STATUS_SUCCESS)
839 TRACE_RET(chip, STATUS_FAIL);
841 buf = kmalloc(64 * 512, GFP_KERNEL);
843 TRACE_RET(chip, STATUS_ERROR);
845 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
846 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
847 if (retval != STATUS_SUCCESS)
850 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
851 if (retval != STATUS_SUCCESS) {
853 TRACE_RET(chip, STATUS_FAIL);
855 if (!(val & MS_INT_BREQ)) {
857 TRACE_RET(chip, STATUS_FAIL);
859 retval = ms_transfer_data(chip, MS_TM_AUTO_READ,
860 PRO_READ_LONG_DATA, 0x40, WAIT_INT,
861 0, 0, buf, 64 * 512);
862 if (retval == STATUS_SUCCESS)
865 rtsx_clear_ms_error(chip);
867 if (retval != STATUS_SUCCESS) {
869 TRACE_RET(chip, STATUS_FAIL);
874 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
875 if (retval != STATUS_SUCCESS) {
877 TRACE_RET(chip, STATUS_FAIL);
880 if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
883 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ,
884 PRO_READ_LONG_DATA, 0, WAIT_INT);
885 if (retval != STATUS_SUCCESS) {
887 TRACE_RET(chip, STATUS_FAIL);
893 if (retval != STATUS_SUCCESS) {
895 TRACE_RET(chip, STATUS_FAIL);
898 if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
899 /* Signature code is wrong */
901 TRACE_RET(chip, STATUS_FAIL);
904 if ((buf[4] < 1) || (buf[4] > 12)) {
906 TRACE_RET(chip, STATUS_FAIL);
909 for (i = 0; i < buf[4]; i++) {
910 int cur_addr_off = 16 + i * 12;
913 if ((buf[cur_addr_off + 8] == 0x10) ||
914 (buf[cur_addr_off + 8] == 0x13))
916 if (buf[cur_addr_off + 8] == 0x10)
919 sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
920 ((u32)buf[cur_addr_off + 1] << 16) |
921 ((u32)buf[cur_addr_off + 2] << 8) |
922 buf[cur_addr_off + 3];
923 sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
924 ((u32)buf[cur_addr_off + 5] << 16) |
925 ((u32)buf[cur_addr_off + 6] << 8) |
926 buf[cur_addr_off + 7];
927 dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
928 sys_info_addr, sys_info_size);
929 if (sys_info_size != 96) {
931 TRACE_RET(chip, STATUS_FAIL);
933 if (sys_info_addr < 0x1A0) {
935 TRACE_RET(chip, STATUS_FAIL);
937 if ((sys_info_size + sys_info_addr) > 0x8000) {
939 TRACE_RET(chip, STATUS_FAIL);
943 if (buf[cur_addr_off + 8] == 0x13)
944 ms_card->ms_type |= MS_XC;
946 #ifdef SUPPORT_PCGL_1P18
952 #ifdef SUPPORT_PCGL_1P18
953 if (buf[cur_addr_off + 8] == 0x15) {
954 model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
955 ((u32)buf[cur_addr_off + 1] << 16) |
956 ((u32)buf[cur_addr_off + 2] << 8) |
957 buf[cur_addr_off + 3];
958 model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
959 ((u32)buf[cur_addr_off + 5] << 16) |
960 ((u32)buf[cur_addr_off + 6] << 8) |
961 buf[cur_addr_off + 7];
962 dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n",
963 model_name_addr, model_name_size);
964 if (model_name_size != 48) {
966 TRACE_RET(chip, STATUS_FAIL);
968 if (model_name_addr < 0x1A0) {
970 TRACE_RET(chip, STATUS_FAIL);
972 if ((model_name_size + model_name_addr) > 0x8000) {
974 TRACE_RET(chip, STATUS_FAIL);
977 found_model_name = 1;
980 if (found_sys_info && found_model_name)
987 TRACE_RET(chip, STATUS_FAIL);
990 class_code = buf[sys_info_addr + 0];
991 device_type = buf[sys_info_addr + 56];
992 sub_class = buf[sys_info_addr + 46];
994 if (CHK_MSXC(ms_card)) {
995 xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
996 ((u32)buf[sys_info_addr + 7] << 16) |
997 ((u32)buf[sys_info_addr + 8] << 8) |
998 buf[sys_info_addr + 9];
999 xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
1000 ((u32)buf[sys_info_addr + 33] << 16) |
1001 ((u32)buf[sys_info_addr + 34] << 8) |
1002 buf[sys_info_addr + 35];
1003 dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
1004 xc_total_blk, xc_blk_size);
1006 total_blk = ((u16)buf[sys_info_addr + 6] << 8) |
1007 buf[sys_info_addr + 7];
1008 blk_size = ((u16)buf[sys_info_addr + 2] << 8) |
1009 buf[sys_info_addr + 3];
1010 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1011 total_blk, blk_size);
1014 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1015 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1016 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1017 total_blk, blk_size);
1020 dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
1021 class_code, device_type, sub_class);
1023 memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
1024 #ifdef SUPPORT_PCGL_1P18
1025 memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
1031 if (CHK_MSXC(ms_card)) {
1032 if (class_code != 0x03)
1033 TRACE_RET(chip, STATUS_FAIL);
1035 if (class_code != 0x02)
1036 TRACE_RET(chip, STATUS_FAIL);
1039 if (class_code != 0x02)
1040 TRACE_RET(chip, STATUS_FAIL);
1043 if (device_type != 0x00) {
1044 if ((device_type == 0x01) || (device_type == 0x02) ||
1045 (device_type == 0x03)) {
1046 chip->card_wp |= MS_CARD;
1048 TRACE_RET(chip, STATUS_FAIL);
1052 if (sub_class & 0xC0)
1053 TRACE_RET(chip, STATUS_FAIL);
1055 dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1056 class_code, device_type, sub_class);
1059 if (CHK_MSXC(ms_card)) {
1060 chip->capacity[chip->card2lun[MS_CARD]] =
1061 ms_card->capacity = xc_total_blk * xc_blk_size;
1063 chip->capacity[chip->card2lun[MS_CARD]] =
1064 ms_card->capacity = total_blk * blk_size;
1067 ms_card->capacity = total_blk * blk_size;
1068 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
1071 return STATUS_SUCCESS;
1074 #ifdef SUPPORT_MAGIC_GATE
1075 static int mg_set_tpc_para_sub(struct rtsx_chip *chip,
1076 int type, u8 mg_entry_num);
1079 static int reset_ms_pro(struct rtsx_chip *chip)
1081 struct ms_info *ms_card = &(chip->ms_card);
1083 #ifdef XC_POWERCLASS
1084 u8 change_power_class;
1086 if (chip->ms_power_class_en & 0x02)
1087 change_power_class = 2;
1088 else if (chip->ms_power_class_en & 0x01)
1089 change_power_class = 1;
1091 change_power_class = 0;
1094 #ifdef XC_POWERCLASS
1097 retval = ms_pro_reset_flow(chip, 1);
1098 if (retval != STATUS_SUCCESS) {
1099 if (ms_card->switch_8bit_fail) {
1100 retval = ms_pro_reset_flow(chip, 0);
1101 if (retval != STATUS_SUCCESS)
1102 TRACE_RET(chip, STATUS_FAIL);
1104 TRACE_RET(chip, STATUS_FAIL);
1108 retval = ms_read_attribute_info(chip);
1109 if (retval != STATUS_SUCCESS)
1110 TRACE_RET(chip, STATUS_FAIL);
1112 #ifdef XC_POWERCLASS
1113 if (CHK_HG8BIT(ms_card))
1114 change_power_class = 0;
1116 if (change_power_class && CHK_MSXC(ms_card)) {
1117 u8 power_class_en = chip->ms_power_class_en;
1119 dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n",
1121 dev_dbg(rtsx_dev(chip), "change_power_class = %d\n",
1122 change_power_class);
1124 if (change_power_class)
1125 power_class_en &= (1 << (change_power_class - 1));
1129 if (power_class_en) {
1130 u8 power_class_mode =
1131 (ms_card->raw_sys_info[46] & 0x18) >> 3;
1132 dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x",
1134 if (change_power_class > power_class_mode)
1135 change_power_class = power_class_mode;
1136 if (change_power_class) {
1137 retval = msxc_change_power(chip,
1138 change_power_class);
1139 if (retval != STATUS_SUCCESS) {
1140 change_power_class--;
1148 #ifdef SUPPORT_MAGIC_GATE
1149 retval = mg_set_tpc_para_sub(chip, 0, 0);
1150 if (retval != STATUS_SUCCESS)
1151 TRACE_RET(chip, STATUS_FAIL);
1154 if (CHK_HG8BIT(ms_card))
1155 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1157 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1159 return STATUS_SUCCESS;
1162 static int ms_read_status_reg(struct rtsx_chip *chip)
1167 retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0);
1168 if (retval != STATUS_SUCCESS)
1169 TRACE_RET(chip, STATUS_FAIL);
1171 retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1172 if (retval != STATUS_SUCCESS)
1173 TRACE_RET(chip, STATUS_FAIL);
1175 if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1176 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1177 TRACE_RET(chip, STATUS_FAIL);
1180 return STATUS_SUCCESS;
1184 static int ms_read_extra_data(struct rtsx_chip *chip,
1185 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1187 struct ms_info *ms_card = &(chip->ms_card);
1191 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1193 if (retval != STATUS_SUCCESS)
1194 TRACE_RET(chip, STATUS_FAIL);
1196 if (CHK_MS4BIT(ms_card)) {
1197 /* Parallel interface */
1200 /* Serial interface */
1204 data[2] = (u8)(block_addr >> 8);
1205 data[3] = (u8)block_addr;
1209 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1210 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1212 if (retval == STATUS_SUCCESS)
1215 if (i == MS_MAX_RETRY_COUNT)
1216 TRACE_RET(chip, STATUS_FAIL);
1218 ms_set_err_code(chip, MS_NO_ERROR);
1220 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1221 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1222 if (retval == STATUS_SUCCESS)
1225 if (i == MS_MAX_RETRY_COUNT)
1226 TRACE_RET(chip, STATUS_FAIL);
1228 ms_set_err_code(chip, MS_NO_ERROR);
1229 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1230 if (retval != STATUS_SUCCESS)
1231 TRACE_RET(chip, STATUS_FAIL);
1233 if (val & INT_REG_CMDNK) {
1234 ms_set_err_code(chip, MS_CMD_NK);
1235 TRACE_RET(chip, STATUS_FAIL);
1237 if (val & INT_REG_CED) {
1238 if (val & INT_REG_ERR) {
1239 retval = ms_read_status_reg(chip);
1240 if (retval != STATUS_SUCCESS)
1241 TRACE_RET(chip, STATUS_FAIL);
1243 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1244 MS_EXTRA_SIZE, SystemParm, 6);
1245 if (retval != STATUS_SUCCESS)
1246 TRACE_RET(chip, STATUS_FAIL);
1250 retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT,
1251 data, MS_EXTRA_SIZE);
1252 if (retval != STATUS_SUCCESS)
1253 TRACE_RET(chip, STATUS_FAIL);
1255 if (buf && buf_len) {
1256 if (buf_len > MS_EXTRA_SIZE)
1257 buf_len = MS_EXTRA_SIZE;
1258 memcpy(buf, data, buf_len);
1261 return STATUS_SUCCESS;
1264 static int ms_write_extra_data(struct rtsx_chip *chip,
1265 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1267 struct ms_info *ms_card = &(chip->ms_card);
1271 if (!buf || (buf_len < MS_EXTRA_SIZE))
1272 TRACE_RET(chip, STATUS_FAIL);
1274 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1275 SystemParm, 6 + MS_EXTRA_SIZE);
1276 if (retval != STATUS_SUCCESS)
1277 TRACE_RET(chip, STATUS_FAIL);
1279 if (CHK_MS4BIT(ms_card))
1285 data[2] = (u8)(block_addr >> 8);
1286 data[3] = (u8)block_addr;
1290 for (i = 6; i < MS_EXTRA_SIZE + 6; i++)
1291 data[i] = buf[i - 6];
1293 retval = ms_write_bytes(chip, WRITE_REG , (6+MS_EXTRA_SIZE),
1294 NO_WAIT_INT, data, 16);
1295 if (retval != STATUS_SUCCESS)
1296 TRACE_RET(chip, STATUS_FAIL);
1298 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1299 if (retval != STATUS_SUCCESS)
1300 TRACE_RET(chip, STATUS_FAIL);
1302 ms_set_err_code(chip, MS_NO_ERROR);
1303 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1304 if (retval != STATUS_SUCCESS)
1305 TRACE_RET(chip, STATUS_FAIL);
1307 if (val & INT_REG_CMDNK) {
1308 ms_set_err_code(chip, MS_CMD_NK);
1309 TRACE_RET(chip, STATUS_FAIL);
1311 if (val & INT_REG_CED) {
1312 if (val & INT_REG_ERR) {
1313 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1314 TRACE_RET(chip, STATUS_FAIL);
1318 return STATUS_SUCCESS;
1322 static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1324 struct ms_info *ms_card = &(chip->ms_card);
1328 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1330 if (retval != STATUS_SUCCESS)
1331 TRACE_RET(chip, STATUS_FAIL);
1333 if (CHK_MS4BIT(ms_card))
1339 data[2] = (u8)(block_addr >> 8);
1340 data[3] = (u8)block_addr;
1344 retval = ms_write_bytes(chip, WRITE_REG , 6, NO_WAIT_INT, data, 6);
1345 if (retval != STATUS_SUCCESS)
1346 TRACE_RET(chip, STATUS_FAIL);
1348 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1349 if (retval != STATUS_SUCCESS)
1350 TRACE_RET(chip, STATUS_FAIL);
1352 ms_set_err_code(chip, MS_NO_ERROR);
1353 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1354 if (retval != STATUS_SUCCESS)
1355 TRACE_RET(chip, STATUS_FAIL);
1357 if (val & INT_REG_CMDNK) {
1358 ms_set_err_code(chip, MS_CMD_NK);
1359 TRACE_RET(chip, STATUS_FAIL);
1362 if (val & INT_REG_CED) {
1363 if (val & INT_REG_ERR) {
1364 if (!(val & INT_REG_BREQ)) {
1365 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1366 TRACE_RET(chip, STATUS_FAIL);
1368 retval = ms_read_status_reg(chip);
1369 if (retval != STATUS_SUCCESS)
1370 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1373 if (!(val & INT_REG_BREQ)) {
1374 ms_set_err_code(chip, MS_BREQ_ERROR);
1375 TRACE_RET(chip, STATUS_FAIL);
1380 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA,
1382 if (retval != STATUS_SUCCESS)
1383 TRACE_RET(chip, STATUS_FAIL);
1385 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR))
1386 TRACE_RET(chip, STATUS_FAIL);
1388 return STATUS_SUCCESS;
1392 static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1394 struct ms_info *ms_card = &(chip->ms_card);
1396 u8 val, data[8], extra[MS_EXTRA_SIZE];
1398 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1399 if (retval != STATUS_SUCCESS)
1400 TRACE_RET(chip, STATUS_FAIL);
1402 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1404 if (retval != STATUS_SUCCESS)
1405 TRACE_RET(chip, STATUS_FAIL);
1407 ms_set_err_code(chip, MS_NO_ERROR);
1409 if (CHK_MS4BIT(ms_card))
1415 data[2] = (u8)(phy_blk >> 8);
1416 data[3] = (u8)phy_blk;
1419 data[6] = extra[0] & 0x7F;
1422 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7);
1423 if (retval != STATUS_SUCCESS)
1424 TRACE_RET(chip, STATUS_FAIL);
1426 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1427 if (retval != STATUS_SUCCESS)
1428 TRACE_RET(chip, STATUS_FAIL);
1430 ms_set_err_code(chip, MS_NO_ERROR);
1431 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1432 if (retval != STATUS_SUCCESS)
1433 TRACE_RET(chip, STATUS_FAIL);
1435 if (val & INT_REG_CMDNK) {
1436 ms_set_err_code(chip, MS_CMD_NK);
1437 TRACE_RET(chip, STATUS_FAIL);
1440 if (val & INT_REG_CED) {
1441 if (val & INT_REG_ERR) {
1442 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1443 TRACE_RET(chip, STATUS_FAIL);
1447 return STATUS_SUCCESS;
1451 static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1453 struct ms_info *ms_card = &(chip->ms_card);
1457 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1459 if (retval != STATUS_SUCCESS)
1460 TRACE_RET(chip, STATUS_FAIL);
1462 ms_set_err_code(chip, MS_NO_ERROR);
1464 if (CHK_MS4BIT(ms_card))
1470 data[2] = (u8)(phy_blk >> 8);
1471 data[3] = (u8)phy_blk;
1475 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1476 if (retval != STATUS_SUCCESS)
1477 TRACE_RET(chip, STATUS_FAIL);
1480 retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1481 if (retval != STATUS_SUCCESS)
1482 TRACE_RET(chip, STATUS_FAIL);
1484 ms_set_err_code(chip, MS_NO_ERROR);
1485 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1486 if (retval != STATUS_SUCCESS)
1487 TRACE_RET(chip, STATUS_FAIL);
1489 if (val & INT_REG_CMDNK) {
1495 ms_set_err_code(chip, MS_CMD_NK);
1496 ms_set_bad_block(chip, phy_blk);
1497 TRACE_RET(chip, STATUS_FAIL);
1500 if (val & INT_REG_CED) {
1501 if (val & INT_REG_ERR) {
1502 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1503 TRACE_RET(chip, STATUS_FAIL);
1507 return STATUS_SUCCESS;
1511 static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1513 if (!extra || (extra_len < MS_EXTRA_SIZE))
1516 memset(extra, 0xFF, MS_EXTRA_SIZE);
1518 if (type == setPS_NG) {
1519 /* set page status as 1:NG,and block status keep 1:OK */
1522 /* set page status as 0:Data Error,and block status keep 1:OK */
1526 extra[2] = (u8)(log_blk >> 8);
1527 extra[3] = (u8)log_blk;
1530 static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
1531 u8 start_page, u8 end_page)
1534 u8 extra[MS_EXTRA_SIZE], i;
1536 memset(extra, 0xff, MS_EXTRA_SIZE);
1538 extra[0] = 0xf8; /* Block, page OK, data erased */
1540 extra[2] = (u8)(log_blk >> 8);
1541 extra[3] = (u8)log_blk;
1543 for (i = start_page; i < end_page; i++) {
1544 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1545 ms_set_err_code(chip, MS_NO_CARD);
1546 TRACE_RET(chip, STATUS_FAIL);
1549 retval = ms_write_extra_data(chip, phy_blk, i,
1550 extra, MS_EXTRA_SIZE);
1551 if (retval != STATUS_SUCCESS)
1552 TRACE_RET(chip, STATUS_FAIL);
1555 return STATUS_SUCCESS;
1558 static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1559 u16 log_blk, u8 start_page, u8 end_page)
1561 struct ms_info *ms_card = &(chip->ms_card);
1562 int retval, rty_cnt, uncorrect_flag = 0;
1563 u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1565 dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1566 old_blk, new_blk, log_blk);
1567 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n",
1568 start_page, end_page);
1570 retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1571 if (retval != STATUS_SUCCESS)
1572 TRACE_RET(chip, STATUS_FAIL);
1574 retval = ms_read_status_reg(chip);
1575 if (retval != STATUS_SUCCESS)
1576 TRACE_RET(chip, STATUS_FAIL);
1578 RTSX_READ_REG(chip, PPBUF_BASE2, &val);
1580 if (val & BUF_FULL) {
1581 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1582 if (retval != STATUS_SUCCESS)
1583 TRACE_RET(chip, STATUS_FAIL);
1585 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1586 if (retval != STATUS_SUCCESS)
1587 TRACE_RET(chip, STATUS_FAIL);
1589 if (!(val & INT_REG_CED)) {
1590 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1591 TRACE_RET(chip, STATUS_FAIL);
1595 for (i = start_page; i < end_page; i++) {
1596 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1597 ms_set_err_code(chip, MS_NO_CARD);
1598 TRACE_RET(chip, STATUS_FAIL);
1601 ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1603 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1604 MS_EXTRA_SIZE, SystemParm, 6);
1605 if (retval != STATUS_SUCCESS)
1606 TRACE_RET(chip, STATUS_FAIL);
1608 ms_set_err_code(chip, MS_NO_ERROR);
1610 if (CHK_MS4BIT(ms_card))
1616 data[2] = (u8)(old_blk >> 8);
1617 data[3] = (u8)old_blk;
1621 retval = ms_write_bytes(chip, WRITE_REG , 6, NO_WAIT_INT,
1623 if (retval != STATUS_SUCCESS)
1624 TRACE_RET(chip, STATUS_FAIL);
1626 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1627 if (retval != STATUS_SUCCESS)
1628 TRACE_RET(chip, STATUS_FAIL);
1630 ms_set_err_code(chip, MS_NO_ERROR);
1631 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1632 if (retval != STATUS_SUCCESS)
1633 TRACE_RET(chip, STATUS_FAIL);
1635 if (val & INT_REG_CMDNK) {
1636 ms_set_err_code(chip, MS_CMD_NK);
1637 TRACE_RET(chip, STATUS_FAIL);
1640 if (val & INT_REG_CED) {
1641 if (val & INT_REG_ERR) {
1642 retval = ms_read_status_reg(chip);
1643 if (retval != STATUS_SUCCESS) {
1645 dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
1650 retval = ms_transfer_tpc(chip,
1654 if (retval != STATUS_SUCCESS)
1655 TRACE_RET(chip, STATUS_FAIL);
1657 if (uncorrect_flag) {
1658 ms_set_page_status(log_blk, setPS_NG,
1659 extra, MS_EXTRA_SIZE);
1663 ms_write_extra_data(chip, old_blk, i,
1664 extra, MS_EXTRA_SIZE);
1665 dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n",
1667 MS_SET_BAD_BLOCK_FLG(ms_card);
1669 ms_set_page_status(log_blk, setPS_Error,
1670 extra, MS_EXTRA_SIZE);
1671 ms_write_extra_data(chip, new_blk, i,
1672 extra, MS_EXTRA_SIZE);
1676 for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT;
1678 retval = ms_transfer_tpc(
1683 if (retval == STATUS_SUCCESS)
1686 if (rty_cnt == MS_MAX_RETRY_COUNT)
1687 TRACE_RET(chip, STATUS_FAIL);
1690 if (!(val & INT_REG_BREQ)) {
1691 ms_set_err_code(chip, MS_BREQ_ERROR);
1692 TRACE_RET(chip, STATUS_FAIL);
1696 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1697 MS_EXTRA_SIZE, SystemParm, (6+MS_EXTRA_SIZE));
1699 ms_set_err_code(chip, MS_NO_ERROR);
1701 if (CHK_MS4BIT(ms_card))
1707 data[2] = (u8)(new_blk >> 8);
1708 data[3] = (u8)new_blk;
1712 if ((extra[0] & 0x60) != 0x60)
1718 data[6 + 2] = (u8)(log_blk >> 8);
1719 data[6 + 3] = (u8)log_blk;
1721 for (j = 4; j <= MS_EXTRA_SIZE; j++)
1724 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1725 NO_WAIT_INT, data, 16);
1726 if (retval != STATUS_SUCCESS)
1727 TRACE_RET(chip, STATUS_FAIL);
1729 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1730 if (retval != STATUS_SUCCESS)
1731 TRACE_RET(chip, STATUS_FAIL);
1733 ms_set_err_code(chip, MS_NO_ERROR);
1734 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1735 if (retval != STATUS_SUCCESS)
1736 TRACE_RET(chip, STATUS_FAIL);
1738 if (val & INT_REG_CMDNK) {
1739 ms_set_err_code(chip, MS_CMD_NK);
1740 TRACE_RET(chip, STATUS_FAIL);
1743 if (val & INT_REG_CED) {
1744 if (val & INT_REG_ERR) {
1745 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1746 TRACE_RET(chip, STATUS_FAIL);
1751 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1752 MS_EXTRA_SIZE, SystemParm, 7);
1753 if (retval != STATUS_SUCCESS)
1754 TRACE_RET(chip, STATUS_FAIL);
1756 ms_set_err_code(chip, MS_NO_ERROR);
1758 if (CHK_MS4BIT(ms_card))
1764 data[2] = (u8)(old_blk >> 8);
1765 data[3] = (u8)old_blk;
1771 retval = ms_write_bytes(chip, WRITE_REG, 7,
1772 NO_WAIT_INT, data, 8);
1773 if (retval != STATUS_SUCCESS)
1774 TRACE_RET(chip, STATUS_FAIL);
1776 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1777 if (retval != STATUS_SUCCESS)
1778 TRACE_RET(chip, STATUS_FAIL);
1780 ms_set_err_code(chip, MS_NO_ERROR);
1781 retval = ms_read_bytes(chip, GET_INT, 1,
1782 NO_WAIT_INT, &val, 1);
1783 if (retval != STATUS_SUCCESS)
1784 TRACE_RET(chip, STATUS_FAIL);
1786 if (val & INT_REG_CMDNK) {
1787 ms_set_err_code(chip, MS_CMD_NK);
1788 TRACE_RET(chip, STATUS_FAIL);
1791 if (val & INT_REG_CED) {
1792 if (val & INT_REG_ERR) {
1793 ms_set_err_code(chip,
1794 MS_FLASH_WRITE_ERROR);
1795 TRACE_RET(chip, STATUS_FAIL);
1801 return STATUS_SUCCESS;
1805 static int reset_ms(struct rtsx_chip *chip)
1807 struct ms_info *ms_card = &(chip->ms_card);
1809 u16 i, reg_addr, block_size;
1810 u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
1811 #ifndef SUPPORT_MAGIC_GATE
1815 retval = ms_prepare_reset(chip);
1816 if (retval != STATUS_SUCCESS)
1817 TRACE_RET(chip, STATUS_FAIL);
1819 ms_card->ms_type |= TYPE_MS;
1821 retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
1822 if (retval != STATUS_SUCCESS)
1823 TRACE_RET(chip, STATUS_FAIL);
1825 retval = ms_read_status_reg(chip);
1826 if (retval != STATUS_SUCCESS)
1827 TRACE_RET(chip, STATUS_FAIL);
1829 RTSX_READ_REG(chip, PPBUF_BASE2, &val);
1830 if (val & WRT_PRTCT)
1831 chip->card_wp |= MS_CARD;
1833 chip->card_wp &= ~MS_CARD;
1838 /* Search Boot Block */
1839 while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
1840 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1841 ms_set_err_code(chip, MS_NO_CARD);
1842 TRACE_RET(chip, STATUS_FAIL);
1845 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
1846 if (retval != STATUS_SUCCESS) {
1851 if (extra[0] & BLOCK_OK) {
1852 if (!(extra[1] & NOT_BOOT_BLOCK)) {
1853 ms_card->boot_block = i;
1860 if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
1861 dev_dbg(rtsx_dev(chip), "No boot block found!");
1862 TRACE_RET(chip, STATUS_FAIL);
1865 for (j = 0; j < 3; j++) {
1866 retval = ms_read_page(chip, ms_card->boot_block, j);
1867 if (retval != STATUS_SUCCESS) {
1868 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1869 i = ms_card->boot_block + 1;
1870 ms_set_err_code(chip, MS_NO_ERROR);
1876 retval = ms_read_page(chip, ms_card->boot_block, 0);
1877 if (retval != STATUS_SUCCESS)
1878 TRACE_RET(chip, STATUS_FAIL);
1880 /* Read MS system information as sys_info */
1881 rtsx_init_cmd(chip);
1883 for (i = 0; i < 96; i++)
1884 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
1886 retval = rtsx_send_cmd(chip, MS_CARD, 100);
1888 TRACE_RET(chip, STATUS_FAIL);
1890 ptr = rtsx_get_cmd_data(chip);
1891 memcpy(ms_card->raw_sys_info, ptr, 96);
1893 /* Read useful block contents */
1894 rtsx_init_cmd(chip);
1896 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
1897 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
1899 for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3;
1901 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1903 for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
1904 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1906 rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0);
1907 rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
1909 retval = rtsx_send_cmd(chip, MS_CARD, 100);
1911 TRACE_RET(chip, STATUS_FAIL);
1913 ptr = rtsx_get_cmd_data(chip);
1915 dev_dbg(rtsx_dev(chip), "Boot block data:\n");
1919 * HEADER_ID0, HEADER_ID1
1921 if (ptr[0] != 0x00 || ptr[1] != 0x01) {
1922 i = ms_card->boot_block + 1;
1927 * PAGE_SIZE_0, PAGE_SIZE_1
1929 if (ptr[12] != 0x02 || ptr[13] != 0x00) {
1930 i = ms_card->boot_block + 1;
1934 if ((ptr[14] == 1) || (ptr[14] == 3))
1935 chip->card_wp |= MS_CARD;
1937 /* BLOCK_SIZE_0, BLOCK_SIZE_1 */
1938 block_size = ((u16)ptr[6] << 8) | ptr[7];
1939 if (block_size == 0x0010) {
1940 /* Block size 16KB */
1941 ms_card->block_shift = 5;
1942 ms_card->page_off = 0x1F;
1943 } else if (block_size == 0x0008) {
1944 /* Block size 8KB */
1945 ms_card->block_shift = 4;
1946 ms_card->page_off = 0x0F;
1949 /* BLOCK_COUNT_0, BLOCK_COUNT_1 */
1950 ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
1952 #ifdef SUPPORT_MAGIC_GATE
1955 if (ms_card->block_shift == 4) { /* 4MB or 8MB */
1956 if (j < 2) { /* Effective block for 4MB: 0x1F0 */
1957 ms_card->capacity = 0x1EE0;
1958 } else { /* Effective block for 8MB: 0x3E0 */
1959 ms_card->capacity = 0x3DE0;
1961 } else { /* 16MB, 32MB, 64MB or 128MB */
1962 if (j < 5) { /* Effective block for 16MB: 0x3E0 */
1963 ms_card->capacity = 0x7BC0;
1964 } else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */
1965 ms_card->capacity = 0xF7C0;
1966 } else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */
1967 ms_card->capacity = 0x1EF80;
1968 } else { /* Effective block for 128MB: 0x1F00 */
1969 ms_card->capacity = 0x3DF00;
1973 /* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */
1974 eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
1976 ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
1979 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
1981 /* Switch I/F Mode */
1983 retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1);
1984 if (retval != STATUS_SUCCESS)
1985 TRACE_RET(chip, STATUS_FAIL);
1987 RTSX_WRITE_REG(chip, PPBUF_BASE2, 0xFF, 0x88);
1988 RTSX_WRITE_REG(chip, PPBUF_BASE2 + 1, 0xFF, 0);
1990 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG , 1,
1992 if (retval != STATUS_SUCCESS)
1993 TRACE_RET(chip, STATUS_FAIL);
1995 RTSX_WRITE_REG(chip, MS_CFG, 0x58 | MS_NO_CHECK_INT,
1996 MS_BUS_WIDTH_4 | PUSH_TIME_ODD | MS_NO_CHECK_INT);
1998 ms_card->ms_type |= MS_4BIT;
2001 if (CHK_MS4BIT(ms_card))
2002 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
2004 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
2006 return STATUS_SUCCESS;
2009 static int ms_init_l2p_tbl(struct rtsx_chip *chip)
2011 struct ms_info *ms_card = &(chip->ms_card);
2012 int size, i, seg_no, retval;
2013 u16 defect_block, reg_addr;
2016 ms_card->segment_cnt = ms_card->total_block >> 9;
2017 dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n",
2018 ms_card->segment_cnt);
2020 size = ms_card->segment_cnt * sizeof(struct zone_entry);
2021 ms_card->segment = vzalloc(size);
2022 if (ms_card->segment == NULL)
2023 TRACE_RET(chip, STATUS_FAIL);
2025 retval = ms_read_page(chip, ms_card->boot_block, 1);
2026 if (retval != STATUS_SUCCESS)
2027 TRACE_GOTO(chip, INIT_FAIL);
2029 reg_addr = PPBUF_BASE2;
2030 for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
2031 retval = rtsx_read_register(chip, reg_addr++, &val1);
2032 if (retval != STATUS_SUCCESS)
2033 TRACE_GOTO(chip, INIT_FAIL);
2035 retval = rtsx_read_register(chip, reg_addr++, &val2);
2036 if (retval != STATUS_SUCCESS)
2037 TRACE_GOTO(chip, INIT_FAIL);
2039 defect_block = ((u16)val1 << 8) | val2;
2040 if (defect_block == 0xFFFF)
2043 seg_no = defect_block / 512;
2044 ms_card->segment[seg_no].defect_list[ms_card->segment[seg_no].disable_count++] = defect_block;
2047 for (i = 0; i < ms_card->segment_cnt; i++) {
2048 ms_card->segment[i].build_flag = 0;
2049 ms_card->segment[i].l2p_table = NULL;
2050 ms_card->segment[i].free_table = NULL;
2051 ms_card->segment[i].get_index = 0;
2052 ms_card->segment[i].set_index = 0;
2053 ms_card->segment[i].unused_blk_cnt = 0;
2055 dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n",
2056 i, ms_card->segment[i].disable_count);
2059 return STATUS_SUCCESS;
2062 if (ms_card->segment) {
2063 vfree(ms_card->segment);
2064 ms_card->segment = NULL;
2070 static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2072 struct ms_info *ms_card = &(chip->ms_card);
2073 struct zone_entry *segment;
2075 if (ms_card->segment == NULL)
2078 segment = &(ms_card->segment[seg_no]);
2080 if (segment->l2p_table)
2081 return segment->l2p_table[log_off];
2086 static void ms_set_l2p_tbl(struct rtsx_chip *chip,
2087 int seg_no, u16 log_off, u16 phy_blk)
2089 struct ms_info *ms_card = &(chip->ms_card);
2090 struct zone_entry *segment;
2092 if (ms_card->segment == NULL)
2095 segment = &(ms_card->segment[seg_no]);
2096 if (segment->l2p_table)
2097 segment->l2p_table[log_off] = phy_blk;
2100 static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2102 struct ms_info *ms_card = &(chip->ms_card);
2103 struct zone_entry *segment;
2106 seg_no = (int)phy_blk >> 9;
2107 segment = &(ms_card->segment[seg_no]);
2109 segment->free_table[segment->set_index++] = phy_blk;
2110 if (segment->set_index >= MS_FREE_TABLE_CNT)
2111 segment->set_index = 0;
2113 segment->unused_blk_cnt++;
2116 static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2118 struct ms_info *ms_card = &(chip->ms_card);
2119 struct zone_entry *segment;
2122 segment = &(ms_card->segment[seg_no]);
2124 if (segment->unused_blk_cnt <= 0)
2127 phy_blk = segment->free_table[segment->get_index];
2128 segment->free_table[segment->get_index++] = 0xFFFF;
2129 if (segment->get_index >= MS_FREE_TABLE_CNT)
2130 segment->get_index = 0;
2132 segment->unused_blk_cnt--;
2137 static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478,
2138 2974, 3470, 3966, 4462, 4958,
2139 5454, 5950, 6446, 6942, 7438,
2142 static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk,
2143 u16 log_off, u8 us1, u8 us2)
2145 struct ms_info *ms_card = &(chip->ms_card);
2146 struct zone_entry *segment;
2150 seg_no = (int)phy_blk >> 9;
2151 segment = &(ms_card->segment[seg_no]);
2152 tmp_blk = segment->l2p_table[log_off];
2156 if (!(chip->card_wp & MS_CARD))
2157 ms_erase_block(chip, tmp_blk);
2159 ms_set_unused_block(chip, tmp_blk);
2160 segment->l2p_table[log_off] = phy_blk;
2162 if (!(chip->card_wp & MS_CARD))
2163 ms_erase_block(chip, phy_blk);
2165 ms_set_unused_block(chip, phy_blk);
2168 if (phy_blk < tmp_blk) {
2169 if (!(chip->card_wp & MS_CARD))
2170 ms_erase_block(chip, phy_blk);
2172 ms_set_unused_block(chip, phy_blk);
2174 if (!(chip->card_wp & MS_CARD))
2175 ms_erase_block(chip, tmp_blk);
2177 ms_set_unused_block(chip, tmp_blk);
2178 segment->l2p_table[log_off] = phy_blk;
2182 return STATUS_SUCCESS;
2185 static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2187 struct ms_info *ms_card = &(chip->ms_card);
2188 struct zone_entry *segment;
2189 int retval, table_size, disable_cnt, defect_flag, i;
2190 u16 start, end, phy_blk, log_blk, tmp_blk;
2191 u8 extra[MS_EXTRA_SIZE], us1, us2;
2193 dev_dbg(rtsx_dev(chip), "ms_build_l2p_tbl: %d\n", seg_no);
2195 if (ms_card->segment == NULL) {
2196 retval = ms_init_l2p_tbl(chip);
2197 if (retval != STATUS_SUCCESS)
2198 TRACE_RET(chip, retval);
2201 if (ms_card->segment[seg_no].build_flag) {
2202 dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n",
2204 return STATUS_SUCCESS;
2212 segment = &(ms_card->segment[seg_no]);
2214 if (segment->l2p_table == NULL) {
2215 segment->l2p_table = vmalloc(table_size * 2);
2216 if (segment->l2p_table == NULL)
2217 TRACE_GOTO(chip, BUILD_FAIL);
2219 memset((u8 *)(segment->l2p_table), 0xff, table_size * 2);
2221 if (segment->free_table == NULL) {
2222 segment->free_table = vmalloc(MS_FREE_TABLE_CNT * 2);
2223 if (segment->free_table == NULL)
2224 TRACE_GOTO(chip, BUILD_FAIL);
2226 memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2);
2228 start = (u16)seg_no << 9;
2229 end = (u16)(seg_no + 1) << 9;
2231 disable_cnt = segment->disable_count;
2233 segment->get_index = segment->set_index = 0;
2234 segment->unused_blk_cnt = 0;
2236 for (phy_blk = start; phy_blk < end; phy_blk++) {
2239 for (i = 0; i < segment->disable_count; i++) {
2240 if (phy_blk == segment->defect_list[i]) {
2251 retval = ms_read_extra_data(chip, phy_blk, 0,
2252 extra, MS_EXTRA_SIZE);
2253 if (retval != STATUS_SUCCESS) {
2254 dev_dbg(rtsx_dev(chip), "read extra data fail\n");
2255 ms_set_bad_block(chip, phy_blk);
2259 if (seg_no == ms_card->segment_cnt - 1) {
2260 if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2261 if (!(chip->card_wp & MS_CARD)) {
2262 retval = ms_erase_block(chip, phy_blk);
2263 if (retval != STATUS_SUCCESS)
2271 if (!(extra[0] & BLOCK_OK))
2273 if (!(extra[1] & NOT_BOOT_BLOCK))
2275 if ((extra[0] & PAGE_OK) != PAGE_OK)
2278 log_blk = ((u16)extra[2] << 8) | extra[3];
2280 if (log_blk == 0xFFFF) {
2281 if (!(chip->card_wp & MS_CARD)) {
2282 retval = ms_erase_block(chip, phy_blk);
2283 if (retval != STATUS_SUCCESS)
2286 ms_set_unused_block(chip, phy_blk);
2290 if ((log_blk < ms_start_idx[seg_no]) ||
2291 (log_blk >= ms_start_idx[seg_no+1])) {
2292 if (!(chip->card_wp & MS_CARD)) {
2293 retval = ms_erase_block(chip, phy_blk);
2294 if (retval != STATUS_SUCCESS)
2297 ms_set_unused_block(chip, phy_blk);
2301 if (segment->l2p_table[log_blk - ms_start_idx[seg_no]] == 0xFFFF) {
2302 segment->l2p_table[log_blk - ms_start_idx[seg_no]] = phy_blk;
2306 us1 = extra[0] & 0x10;
2307 tmp_blk = segment->l2p_table[log_blk - ms_start_idx[seg_no]];
2308 retval = ms_read_extra_data(chip, tmp_blk, 0,
2309 extra, MS_EXTRA_SIZE);
2310 if (retval != STATUS_SUCCESS)
2312 us2 = extra[0] & 0x10;
2314 (void)ms_arbitrate_l2p(chip, phy_blk,
2315 log_blk-ms_start_idx[seg_no], us1, us2);
2319 segment->build_flag = 1;
2321 dev_dbg(rtsx_dev(chip), "unused block count: %d\n",
2322 segment->unused_blk_cnt);
2324 /* Logical Address Confirmation Process */
2325 if (seg_no == ms_card->segment_cnt - 1) {
2326 if (segment->unused_blk_cnt < 2)
2327 chip->card_wp |= MS_CARD;
2329 if (segment->unused_blk_cnt < 1)
2330 chip->card_wp |= MS_CARD;
2333 if (chip->card_wp & MS_CARD)
2334 return STATUS_SUCCESS;
2336 for (log_blk = ms_start_idx[seg_no];
2337 log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2338 if (segment->l2p_table[log_blk-ms_start_idx[seg_no]] == 0xFFFF) {
2339 phy_blk = ms_get_unused_block(chip, seg_no);
2340 if (phy_blk == 0xFFFF) {
2341 chip->card_wp |= MS_CARD;
2342 return STATUS_SUCCESS;
2344 retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2345 if (retval != STATUS_SUCCESS)
2346 TRACE_GOTO(chip, BUILD_FAIL);
2348 segment->l2p_table[log_blk-ms_start_idx[seg_no]] = phy_blk;
2349 if (seg_no == ms_card->segment_cnt - 1) {
2350 if (segment->unused_blk_cnt < 2) {
2351 chip->card_wp |= MS_CARD;
2352 return STATUS_SUCCESS;
2355 if (segment->unused_blk_cnt < 1) {
2356 chip->card_wp |= MS_CARD;
2357 return STATUS_SUCCESS;
2363 /* Make boot block be the first normal block */
2365 for (log_blk = 0; log_blk < 494; log_blk++) {
2366 tmp_blk = segment->l2p_table[log_blk];
2367 if (tmp_blk < ms_card->boot_block) {
2368 dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n");
2370 if (chip->card_wp & MS_CARD)
2373 phy_blk = ms_get_unused_block(chip, 0);
2374 retval = ms_copy_page(chip, tmp_blk, phy_blk,
2375 log_blk, 0, ms_card->page_off + 1);
2376 if (retval != STATUS_SUCCESS)
2377 TRACE_RET(chip, STATUS_FAIL);
2379 segment->l2p_table[log_blk] = phy_blk;
2381 retval = ms_set_bad_block(chip, tmp_blk);
2382 if (retval != STATUS_SUCCESS)
2383 TRACE_RET(chip, STATUS_FAIL);
2388 return STATUS_SUCCESS;
2391 segment->build_flag = 0;
2392 if (segment->l2p_table) {
2393 vfree(segment->l2p_table);
2394 segment->l2p_table = NULL;
2396 if (segment->free_table) {
2397 vfree(segment->free_table);
2398 segment->free_table = NULL;
2405 int reset_ms_card(struct rtsx_chip *chip)
2407 struct ms_info *ms_card = &(chip->ms_card);
2410 memset(ms_card, 0, sizeof(struct ms_info));
2412 retval = enable_card_clock(chip, MS_CARD);
2413 if (retval != STATUS_SUCCESS)
2414 TRACE_RET(chip, STATUS_FAIL);
2416 retval = select_card(chip, MS_CARD);
2417 if (retval != STATUS_SUCCESS)
2418 TRACE_RET(chip, STATUS_FAIL);
2420 ms_card->ms_type = 0;
2422 retval = reset_ms_pro(chip);
2423 if (retval != STATUS_SUCCESS) {
2424 if (ms_card->check_ms_flow) {
2425 retval = reset_ms(chip);
2426 if (retval != STATUS_SUCCESS)
2427 TRACE_RET(chip, STATUS_FAIL);
2429 TRACE_RET(chip, STATUS_FAIL);
2433 retval = ms_set_init_para(chip);
2434 if (retval != STATUS_SUCCESS)
2435 TRACE_RET(chip, STATUS_FAIL);
2437 if (!CHK_MSPRO(ms_card)) {
2438 /* Build table for the last segment,
2439 * to check if L2P table block exists, erasing it
2441 retval = ms_build_l2p_tbl(chip, ms_card->total_block / 512 - 1);
2442 if (retval != STATUS_SUCCESS)
2443 TRACE_RET(chip, STATUS_FAIL);
2446 dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2448 return STATUS_SUCCESS;
2451 static int mspro_set_rw_cmd(struct rtsx_chip *chip,
2452 u32 start_sec, u16 sec_cnt, u8 cmd)
2458 data[1] = (u8)(sec_cnt >> 8);
2459 data[2] = (u8)sec_cnt;
2460 data[3] = (u8)(start_sec >> 24);
2461 data[4] = (u8)(start_sec >> 16);
2462 data[5] = (u8)(start_sec >> 8);
2463 data[6] = (u8)start_sec;
2466 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2467 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7,
2469 if (retval == STATUS_SUCCESS)
2472 if (i == MS_MAX_RETRY_COUNT)
2473 TRACE_RET(chip, STATUS_FAIL);
2475 return STATUS_SUCCESS;
2479 void mspro_stop_seq_mode(struct rtsx_chip *chip)
2481 struct ms_info *ms_card = &(chip->ms_card);
2484 if (ms_card->seq_mode) {
2485 retval = ms_switch_clock(chip);
2486 if (retval != STATUS_SUCCESS)
2489 ms_card->seq_mode = 0;
2490 ms_card->total_sec_cnt = 0;
2491 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2493 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2497 static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2499 struct ms_info *ms_card = &(chip->ms_card);
2502 if (chip->asic_code) {
2503 if (ms_card->ms_clock > 30)
2504 ms_card->ms_clock -= 20;
2506 if (ms_card->ms_clock == CLK_80)
2507 ms_card->ms_clock = CLK_60;
2508 else if (ms_card->ms_clock == CLK_60)
2509 ms_card->ms_clock = CLK_40;
2512 retval = ms_switch_clock(chip);
2513 if (retval != STATUS_SUCCESS)
2514 TRACE_RET(chip, STATUS_FAIL);
2516 return STATUS_SUCCESS;
2519 static int mspro_rw_multi_sector(struct scsi_cmnd *srb,
2520 struct rtsx_chip *chip, u32 start_sector,
2523 struct ms_info *ms_card = &(chip->ms_card);
2524 int retval, mode_2k = 0;
2526 u8 val, trans_mode, rw_tpc, rw_cmd;
2528 ms_set_err_code(chip, MS_NO_ERROR);
2530 ms_card->cleanup_counter = 0;
2532 if (CHK_MSHG(ms_card)) {
2533 if ((start_sector % 4) || (sector_cnt % 4)) {
2534 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2535 rw_tpc = PRO_READ_LONG_DATA;
2536 rw_cmd = PRO_READ_DATA;
2538 rw_tpc = PRO_WRITE_LONG_DATA;
2539 rw_cmd = PRO_WRITE_DATA;
2542 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2543 rw_tpc = PRO_READ_QUAD_DATA;
2544 rw_cmd = PRO_READ_2K_DATA;
2546 rw_tpc = PRO_WRITE_QUAD_DATA;
2547 rw_cmd = PRO_WRITE_2K_DATA;
2552 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2553 rw_tpc = PRO_READ_LONG_DATA;
2554 rw_cmd = PRO_READ_DATA;
2556 rw_tpc = PRO_WRITE_LONG_DATA;
2557 rw_cmd = PRO_WRITE_DATA;
2561 retval = ms_switch_clock(chip);
2562 if (retval != STATUS_SUCCESS)
2563 TRACE_RET(chip, STATUS_FAIL);
2565 if (srb->sc_data_direction == DMA_FROM_DEVICE)
2566 trans_mode = MS_TM_AUTO_READ;
2568 trans_mode = MS_TM_AUTO_WRITE;
2570 RTSX_READ_REG(chip, MS_TRANS_CFG, &val);
2572 if (ms_card->seq_mode) {
2573 if ((ms_card->pre_dir != srb->sc_data_direction)
2574 || ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) != start_sector)
2575 || (mode_2k && (ms_card->seq_mode & MODE_512_SEQ))
2576 || (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ))
2577 || !(val & MS_INT_BREQ)
2578 || ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
2579 ms_card->seq_mode = 0;
2580 ms_card->total_sec_cnt = 0;
2581 if (val & MS_INT_BREQ) {
2582 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2583 if (retval != STATUS_SUCCESS)
2584 TRACE_RET(chip, STATUS_FAIL);
2586 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2591 if (!ms_card->seq_mode) {
2592 ms_card->total_sec_cnt = 0;
2593 if (sector_cnt >= SEQ_START_CRITERIA) {
2594 if ((ms_card->capacity - start_sector) > 0xFE00)
2597 count = (u16)(ms_card->capacity - start_sector);
2599 if (count > sector_cnt) {
2601 ms_card->seq_mode |= MODE_2K_SEQ;
2603 ms_card->seq_mode |= MODE_512_SEQ;
2608 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
2609 if (retval != STATUS_SUCCESS) {
2610 ms_card->seq_mode = 0;
2611 TRACE_RET(chip, STATUS_FAIL);
2615 retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt,
2616 WAIT_INT, mode_2k, scsi_sg_count(srb),
2617 scsi_sglist(srb), scsi_bufflen(srb));
2618 if (retval != STATUS_SUCCESS) {
2619 ms_card->seq_mode = 0;
2620 rtsx_read_register(chip, MS_TRANS_CFG, &val);
2621 rtsx_clear_ms_error(chip);
2623 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2624 chip->rw_need_retry = 0;
2625 dev_dbg(rtsx_dev(chip), "No card exist, exit mspro_rw_multi_sector\n");
2626 TRACE_RET(chip, STATUS_FAIL);
2629 if (val & MS_INT_BREQ)
2630 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2632 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
2633 dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n");
2634 chip->rw_need_retry = 1;
2635 ms_auto_tune_clock(chip);
2638 TRACE_RET(chip, retval);
2641 if (ms_card->seq_mode) {
2642 ms_card->pre_sec_addr = start_sector;
2643 ms_card->pre_sec_cnt = sector_cnt;
2644 ms_card->pre_dir = srb->sc_data_direction;
2645 ms_card->total_sec_cnt += sector_cnt;
2648 return STATUS_SUCCESS;
2651 static int mspro_read_format_progress(struct rtsx_chip *chip,
2652 const int short_data_len)
2654 struct ms_info *ms_card = &(chip->ms_card);
2656 u32 total_progress, cur_progress;
2660 dev_dbg(rtsx_dev(chip), "mspro_read_format_progress, short_data_len = %d\n",
2663 retval = ms_switch_clock(chip);
2664 if (retval != STATUS_SUCCESS) {
2665 ms_card->format_status = FORMAT_FAIL;
2666 TRACE_RET(chip, STATUS_FAIL);
2669 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2670 if (retval != STATUS_SUCCESS) {
2671 ms_card->format_status = FORMAT_FAIL;
2672 TRACE_RET(chip, STATUS_FAIL);
2675 if (!(tmp & MS_INT_BREQ)) {
2676 if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK | MS_INT_ERR)) == MS_INT_CED) {
2677 ms_card->format_status = FORMAT_SUCCESS;
2678 return STATUS_SUCCESS;
2680 ms_card->format_status = FORMAT_FAIL;
2681 TRACE_RET(chip, STATUS_FAIL);
2684 if (short_data_len >= 256)
2687 cnt = (u8)short_data_len;
2689 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT,
2691 if (retval != STATUS_SUCCESS) {
2692 ms_card->format_status = FORMAT_FAIL;
2693 TRACE_RET(chip, STATUS_FAIL);
2696 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT,
2698 if (retval != STATUS_SUCCESS) {
2699 ms_card->format_status = FORMAT_FAIL;
2700 TRACE_RET(chip, STATUS_FAIL);
2703 total_progress = (data[0] << 24) | (data[1] << 16) |
2704 (data[2] << 8) | data[3];
2705 cur_progress = (data[4] << 24) | (data[5] << 16) |
2706 (data[6] << 8) | data[7];
2708 dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n",
2709 total_progress, cur_progress);
2711 if (total_progress == 0) {
2712 ms_card->progress = 0;
2714 u64 ulltmp = (u64)cur_progress * (u64)65535;
2715 do_div(ulltmp, total_progress);
2716 ms_card->progress = (u16)ulltmp;
2718 dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress);
2720 for (i = 0; i < 5000; i++) {
2721 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2722 if (retval != STATUS_SUCCESS) {
2723 ms_card->format_status = FORMAT_FAIL;
2724 TRACE_RET(chip, STATUS_FAIL);
2726 if (tmp & (MS_INT_CED | MS_INT_CMDNK |
2727 MS_INT_BREQ | MS_INT_ERR))
2733 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
2734 if (retval != STATUS_SUCCESS) {
2735 ms_card->format_status = FORMAT_FAIL;
2736 TRACE_RET(chip, STATUS_FAIL);
2740 ms_card->format_status = FORMAT_FAIL;
2741 TRACE_RET(chip, STATUS_FAIL);
2744 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
2745 ms_card->format_status = FORMAT_FAIL;
2746 TRACE_RET(chip, STATUS_FAIL);
2749 if (tmp & MS_INT_CED) {
2750 ms_card->format_status = FORMAT_SUCCESS;
2751 ms_card->pro_under_formatting = 0;
2752 } else if (tmp & MS_INT_BREQ) {
2753 ms_card->format_status = FORMAT_IN_PROGRESS;
2755 ms_card->format_status = FORMAT_FAIL;
2756 ms_card->pro_under_formatting = 0;
2757 TRACE_RET(chip, STATUS_FAIL);
2760 return STATUS_SUCCESS;
2763 void mspro_polling_format_status(struct rtsx_chip *chip)
2765 struct ms_info *ms_card = &(chip->ms_card);
2768 if (ms_card->pro_under_formatting &&
2769 (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
2770 rtsx_set_stat(chip, RTSX_STAT_RUN);
2772 for (i = 0; i < 65535; i++) {
2773 mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
2774 if (ms_card->format_status != FORMAT_IN_PROGRESS)
2782 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
2783 int short_data_len, int quick_format)
2785 struct ms_info *ms_card = &(chip->ms_card);
2790 retval = ms_switch_clock(chip);
2791 if (retval != STATUS_SUCCESS)
2792 TRACE_RET(chip, STATUS_FAIL);
2794 retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01);
2795 if (retval != STATUS_SUCCESS)
2796 TRACE_RET(chip, STATUS_FAIL);
2799 switch (short_data_len) {
2815 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2816 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1,
2817 NO_WAIT_INT, buf, 2);
2818 if (retval == STATUS_SUCCESS)
2821 if (i == MS_MAX_RETRY_COUNT)
2822 TRACE_RET(chip, STATUS_FAIL);
2829 retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
2830 if (retval != STATUS_SUCCESS)
2831 TRACE_RET(chip, STATUS_FAIL);
2833 RTSX_READ_REG(chip, MS_TRANS_CFG, &tmp);
2835 if (tmp & (MS_INT_CMDNK | MS_INT_ERR))
2836 TRACE_RET(chip, STATUS_FAIL);
2838 if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
2839 ms_card->pro_under_formatting = 1;
2840 ms_card->progress = 0;
2841 ms_card->format_status = FORMAT_IN_PROGRESS;
2842 return STATUS_SUCCESS;
2845 if (tmp & MS_INT_CED) {
2846 ms_card->pro_under_formatting = 0;
2847 ms_card->progress = 0;
2848 ms_card->format_status = FORMAT_SUCCESS;
2849 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
2850 return STATUS_SUCCESS;
2853 TRACE_RET(chip, STATUS_FAIL);
2857 static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk,
2858 u16 log_blk, u8 start_page, u8 end_page,
2859 u8 *buf, unsigned int *index,
2860 unsigned int *offset)
2862 struct ms_info *ms_card = &(chip->ms_card);
2864 u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
2867 retval = ms_read_extra_data(chip, phy_blk, start_page,
2868 extra, MS_EXTRA_SIZE);
2869 if (retval == STATUS_SUCCESS) {
2870 if ((extra[1] & 0x30) != 0x30) {
2871 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2872 TRACE_RET(chip, STATUS_FAIL);
2876 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
2878 if (retval != STATUS_SUCCESS)
2879 TRACE_RET(chip, STATUS_FAIL);
2881 if (CHK_MS4BIT(ms_card))
2887 data[2] = (u8)(phy_blk >> 8);
2888 data[3] = (u8)phy_blk;
2890 data[5] = start_page;
2892 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2893 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
2895 if (retval == STATUS_SUCCESS)
2898 if (i == MS_MAX_RETRY_COUNT)
2899 TRACE_RET(chip, STATUS_FAIL);
2901 ms_set_err_code(chip, MS_NO_ERROR);
2903 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
2904 if (retval != STATUS_SUCCESS)
2905 TRACE_RET(chip, STATUS_FAIL);
2909 for (page_addr = start_page; page_addr < end_page; page_addr++) {
2910 ms_set_err_code(chip, MS_NO_ERROR);
2912 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2913 ms_set_err_code(chip, MS_NO_CARD);
2914 TRACE_RET(chip, STATUS_FAIL);
2917 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
2918 if (retval != STATUS_SUCCESS)
2919 TRACE_RET(chip, STATUS_FAIL);
2921 if (val & INT_REG_CMDNK) {
2922 ms_set_err_code(chip, MS_CMD_NK);
2923 TRACE_RET(chip, STATUS_FAIL);
2925 if (val & INT_REG_ERR) {
2926 if (val & INT_REG_BREQ) {
2927 retval = ms_read_status_reg(chip);
2928 if (retval != STATUS_SUCCESS) {
2929 if (!(chip->card_wp & MS_CARD)) {
2931 ms_set_page_status(log_blk, setPS_NG, extra, MS_EXTRA_SIZE);
2932 ms_write_extra_data(chip, phy_blk,
2933 page_addr, extra, MS_EXTRA_SIZE);
2935 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2936 TRACE_RET(chip, STATUS_FAIL);
2939 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2940 TRACE_RET(chip, STATUS_FAIL);
2943 if (!(val & INT_REG_BREQ)) {
2944 ms_set_err_code(chip, MS_BREQ_ERROR);
2945 TRACE_RET(chip, STATUS_FAIL);
2949 if (page_addr == (end_page - 1)) {
2950 if (!(val & INT_REG_CED)) {
2951 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
2952 if (retval != STATUS_SUCCESS)
2953 TRACE_RET(chip, STATUS_FAIL);
2956 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT,
2958 if (retval != STATUS_SUCCESS)
2959 TRACE_RET(chip, STATUS_FAIL);
2961 if (!(val & INT_REG_CED)) {
2962 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2963 TRACE_RET(chip, STATUS_FAIL);
2966 trans_cfg = NO_WAIT_INT;
2968 trans_cfg = WAIT_INT;
2971 rtsx_init_cmd(chip);
2973 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
2974 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
2976 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
2979 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
2981 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
2982 MS_TRANSFER_START | MS_TM_NORMAL_READ);
2983 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
2984 MS_TRANSFER_END, MS_TRANSFER_END);
2986 rtsx_send_cmd_no_wait(chip);
2988 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr,
2989 512, scsi_sg_count(chip->srb),
2990 index, offset, DMA_FROM_DEVICE,
2993 if (retval == -ETIMEDOUT) {
2994 ms_set_err_code(chip, MS_TO_ERROR);
2995 rtsx_clear_ms_error(chip);
2996 TRACE_RET(chip, STATUS_TIMEDOUT);
2999 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3000 if (retval != STATUS_SUCCESS) {
3001 ms_set_err_code(chip, MS_TO_ERROR);
3002 rtsx_clear_ms_error(chip);
3003 TRACE_RET(chip, STATUS_TIMEDOUT);
3005 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3006 ms_set_err_code(chip, MS_CRC16_ERROR);
3007 rtsx_clear_ms_error(chip);
3008 TRACE_RET(chip, STATUS_FAIL);
3012 if (scsi_sg_count(chip->srb) == 0)
3016 return STATUS_SUCCESS;
3019 static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk,
3020 u16 new_blk, u16 log_blk, u8 start_page,
3021 u8 end_page, u8 *buf, unsigned int *index,
3022 unsigned int *offset)
3024 struct ms_info *ms_card = &(chip->ms_card);
3026 u8 page_addr, val, data[16];
3030 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3032 if (retval != STATUS_SUCCESS)
3033 TRACE_RET(chip, STATUS_FAIL);
3035 if (CHK_MS4BIT(ms_card))
3041 data[2] = (u8)(old_blk >> 8);
3042 data[3] = (u8)old_blk;
3048 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
3050 if (retval != STATUS_SUCCESS)
3051 TRACE_RET(chip, STATUS_FAIL);
3053 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3054 if (retval != STATUS_SUCCESS)
3055 TRACE_RET(chip, STATUS_FAIL);
3057 ms_set_err_code(chip, MS_NO_ERROR);
3058 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1,
3060 if (retval != STATUS_SUCCESS)
3061 TRACE_RET(chip, STATUS_FAIL);
3064 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3065 SystemParm, (6 + MS_EXTRA_SIZE));
3066 if (retval != STATUS_SUCCESS)
3067 TRACE_RET(chip, STATUS_FAIL);
3069 ms_set_err_code(chip, MS_NO_ERROR);
3071 if (CHK_MS4BIT(ms_card))
3077 data[2] = (u8)(new_blk >> 8);
3078 data[3] = (u8)new_blk;
3079 if ((end_page - start_page) == 1)
3084 data[5] = start_page;
3087 data[8] = (u8)(log_blk >> 8);
3088 data[9] = (u8)log_blk;
3090 for (i = 0x0A; i < 0x10; i++)
3093 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3094 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE,
3095 NO_WAIT_INT, data, 16);
3096 if (retval == STATUS_SUCCESS)
3099 if (i == MS_MAX_RETRY_COUNT)
3100 TRACE_RET(chip, STATUS_FAIL);
3102 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3103 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3104 if (retval == STATUS_SUCCESS)
3107 if (i == MS_MAX_RETRY_COUNT)
3108 TRACE_RET(chip, STATUS_FAIL);
3110 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3111 if (retval != STATUS_SUCCESS)
3112 TRACE_RET(chip, STATUS_FAIL);
3115 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3116 ms_set_err_code(chip, MS_NO_ERROR);
3118 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3119 ms_set_err_code(chip, MS_NO_CARD);
3120 TRACE_RET(chip, STATUS_FAIL);
3123 if (val & INT_REG_CMDNK) {
3124 ms_set_err_code(chip, MS_CMD_NK);
3125 TRACE_RET(chip, STATUS_FAIL);
3127 if (val & INT_REG_ERR) {
3128 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3129 TRACE_RET(chip, STATUS_FAIL);
3131 if (!(val & INT_REG_BREQ)) {
3132 ms_set_err_code(chip, MS_BREQ_ERROR);
3133 TRACE_RET(chip, STATUS_FAIL);
3138 rtsx_init_cmd(chip);
3140 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
3141 0xFF, WRITE_PAGE_DATA);
3142 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3144 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3147 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3149 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3150 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
3151 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3152 MS_TRANSFER_END, MS_TRANSFER_END);
3154 rtsx_send_cmd_no_wait(chip);
3156 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr,
3157 512, scsi_sg_count(chip->srb),
3158 index, offset, DMA_TO_DEVICE,
3161 ms_set_err_code(chip, MS_TO_ERROR);
3162 rtsx_clear_ms_error(chip);
3164 if (retval == -ETIMEDOUT)
3165 TRACE_RET(chip, STATUS_TIMEDOUT);
3167 TRACE_RET(chip, STATUS_FAIL);
3170 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3171 if (retval != STATUS_SUCCESS)
3172 TRACE_RET(chip, STATUS_FAIL);
3174 if ((end_page - start_page) == 1) {
3175 if (!(val & INT_REG_CED)) {
3176 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3177 TRACE_RET(chip, STATUS_FAIL);
3180 if (page_addr == (end_page - 1)) {
3181 if (!(val & INT_REG_CED)) {
3182 retval = ms_send_cmd(chip, BLOCK_END,
3184 if (retval != STATUS_SUCCESS)
3185 TRACE_RET(chip, STATUS_FAIL);
3188 retval = ms_read_bytes(chip, GET_INT, 1,
3189 NO_WAIT_INT, &val, 1);
3190 if (retval != STATUS_SUCCESS)
3191 TRACE_RET(chip, STATUS_FAIL);
3194 if ((page_addr == (end_page - 1)) ||
3195 (page_addr == ms_card->page_off)) {
3196 if (!(val & INT_REG_CED)) {
3197 ms_set_err_code(chip,
3198 MS_FLASH_WRITE_ERROR);
3199 TRACE_RET(chip, STATUS_FAIL);
3204 if (scsi_sg_count(chip->srb) == 0)
3208 return STATUS_SUCCESS;
3212 static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3213 u16 log_blk, u8 page_off)
3215 struct ms_info *ms_card = &(chip->ms_card);
3218 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3219 page_off, ms_card->page_off + 1);
3220 if (retval != STATUS_SUCCESS)
3221 TRACE_RET(chip, STATUS_FAIL);
3223 seg_no = old_blk >> 9;
3225 if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3226 MS_CLR_BAD_BLOCK_FLG(ms_card);
3227 ms_set_bad_block(chip, old_blk);
3229 retval = ms_erase_block(chip, old_blk);
3230 if (retval == STATUS_SUCCESS)
3231 ms_set_unused_block(chip, old_blk);
3234 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3236 return STATUS_SUCCESS;
3239 static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3240 u16 log_blk, u8 start_page)
3245 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3247 if (retval != STATUS_SUCCESS)
3248 TRACE_RET(chip, STATUS_FAIL);
3251 return STATUS_SUCCESS;
3254 #ifdef MS_DELAY_WRITE
3255 int ms_delay_write(struct rtsx_chip *chip)
3257 struct ms_info *ms_card = &(chip->ms_card);
3258 struct ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3261 if (delay_write->delay_write_flag) {
3262 retval = ms_set_init_para(chip);
3263 if (retval != STATUS_SUCCESS)
3264 TRACE_RET(chip, STATUS_FAIL);
3266 delay_write->delay_write_flag = 0;
3267 retval = ms_finish_write(chip,
3268 delay_write->old_phyblock,
3269 delay_write->new_phyblock,
3270 delay_write->logblock,
3271 delay_write->pageoff);
3272 if (retval != STATUS_SUCCESS)
3273 TRACE_RET(chip, STATUS_FAIL);
3276 return STATUS_SUCCESS;
3280 static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3282 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3283 set_sense_type(chip, SCSI_LUN(srb),
3284 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3286 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3289 static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3290 u32 start_sector, u16 sector_cnt)
3292 struct ms_info *ms_card = &(chip->ms_card);
3293 unsigned int lun = SCSI_LUN(srb);
3295 unsigned int index = 0, offset = 0;
3296 u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3297 u8 start_page, end_page = 0, page_cnt;
3299 #ifdef MS_DELAY_WRITE
3300 struct ms_delay_write_tag *delay_write = &(ms_card->delay_write);
3303 ms_set_err_code(chip, MS_NO_ERROR);
3305 ms_card->cleanup_counter = 0;
3307 ptr = (u8 *)scsi_sglist(srb);
3309 retval = ms_switch_clock(chip);
3310 if (retval != STATUS_SUCCESS) {
3311 ms_rw_fail(srb, chip);
3312 TRACE_RET(chip, STATUS_FAIL);
3315 log_blk = (u16)(start_sector >> ms_card->block_shift);
3316 start_page = (u8)(start_sector & ms_card->page_off);
3318 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
3319 if (log_blk < ms_start_idx[seg_no+1])
3323 if (ms_card->segment[seg_no].build_flag == 0) {
3324 retval = ms_build_l2p_tbl(chip, seg_no);
3325 if (retval != STATUS_SUCCESS) {
3326 chip->card_fail |= MS_CARD;
3327 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3328 TRACE_RET(chip, STATUS_FAIL);
3332 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3333 #ifdef MS_DELAY_WRITE
3334 if (delay_write->delay_write_flag &&
3335 (delay_write->logblock == log_blk) &&
3336 (start_page > delay_write->pageoff)) {
3337 delay_write->delay_write_flag = 0;
3338 retval = ms_copy_page(chip,
3339 delay_write->old_phyblock,
3340 delay_write->new_phyblock, log_blk,
3341 delay_write->pageoff, start_page);
3342 if (retval != STATUS_SUCCESS) {
3343 set_sense_type(chip, lun,
3344 SENSE_TYPE_MEDIA_WRITE_ERR);
3345 TRACE_RET(chip, STATUS_FAIL);
3347 old_blk = delay_write->old_phyblock;
3348 new_blk = delay_write->new_phyblock;
3349 } else if (delay_write->delay_write_flag &&
3350 (delay_write->logblock == log_blk) &&
3351 (start_page == delay_write->pageoff)) {
3352 delay_write->delay_write_flag = 0;
3353 old_blk = delay_write->old_phyblock;
3354 new_blk = delay_write->new_phyblock;
3356 retval = ms_delay_write(chip);
3357 if (retval != STATUS_SUCCESS) {
3358 set_sense_type(chip, lun,
3359 SENSE_TYPE_MEDIA_WRITE_ERR);
3360 TRACE_RET(chip, STATUS_FAIL);
3363 old_blk = ms_get_l2p_tbl(chip, seg_no,
3364 log_blk - ms_start_idx[seg_no]);
3365 new_blk = ms_get_unused_block(chip, seg_no);
3366 if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
3367 set_sense_type(chip, lun,
3368 SENSE_TYPE_MEDIA_WRITE_ERR);
3369 TRACE_RET(chip, STATUS_FAIL);
3372 retval = ms_prepare_write(chip, old_blk, new_blk,
3373 log_blk, start_page);
3374 if (retval != STATUS_SUCCESS) {
3375 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3376 set_sense_type(chip, lun,
3377 SENSE_TYPE_MEDIA_NOT_PRESENT);
3378 TRACE_RET(chip, STATUS_FAIL);
3380 set_sense_type(chip, lun,
3381 SENSE_TYPE_MEDIA_WRITE_ERR);
3382 TRACE_RET(chip, STATUS_FAIL);
3384 #ifdef MS_DELAY_WRITE
3388 #ifdef MS_DELAY_WRITE
3389 retval = ms_delay_write(chip);
3390 if (retval != STATUS_SUCCESS) {
3391 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3392 set_sense_type(chip, lun,
3393 SENSE_TYPE_MEDIA_NOT_PRESENT);
3394 TRACE_RET(chip, STATUS_FAIL);
3396 set_sense_type(chip, lun,
3397 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3398 TRACE_RET(chip, STATUS_FAIL);
3401 old_blk = ms_get_l2p_tbl(chip, seg_no,
3402 log_blk - ms_start_idx[seg_no]);
3403 if (old_blk == 0xFFFF) {
3404 set_sense_type(chip, lun,
3405 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3406 TRACE_RET(chip, STATUS_FAIL);
3410 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3411 seg_no, old_blk, new_blk);
3413 while (total_sec_cnt) {
3414 if ((start_page + total_sec_cnt) > (ms_card->page_off + 1))
3415 end_page = ms_card->page_off + 1;
3417 end_page = start_page + (u8)total_sec_cnt;
3419 page_cnt = end_page - start_page;
3421 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n",
3422 start_page, end_page, page_cnt);
3424 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3425 retval = ms_read_multiple_pages(chip,
3426 old_blk, log_blk, start_page, end_page,
3427 ptr, &index, &offset);
3429 retval = ms_write_multiple_pages(chip, old_blk,
3430 new_blk, log_blk, start_page, end_page,
3431 ptr, &index, &offset);
3434 if (retval != STATUS_SUCCESS) {
3435 toggle_gpio(chip, 1);
3436 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3437 set_sense_type(chip, lun,
3438 SENSE_TYPE_MEDIA_NOT_PRESENT);
3439 TRACE_RET(chip, STATUS_FAIL);
3441 ms_rw_fail(srb, chip);
3442 TRACE_RET(chip, STATUS_FAIL);
3445 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3446 if (end_page == (ms_card->page_off + 1)) {
3447 retval = ms_erase_block(chip, old_blk);
3448 if (retval == STATUS_SUCCESS)
3449 ms_set_unused_block(chip, old_blk);
3451 ms_set_l2p_tbl(chip, seg_no,
3452 log_blk - ms_start_idx[seg_no],
3457 total_sec_cnt -= page_cnt;
3458 if (scsi_sg_count(srb) == 0)
3459 ptr += page_cnt * 512;
3461 if (total_sec_cnt == 0)
3466 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1;
3468 if (log_blk < ms_start_idx[seg_no+1])
3472 if (ms_card->segment[seg_no].build_flag == 0) {
3473 retval = ms_build_l2p_tbl(chip, seg_no);
3474 if (retval != STATUS_SUCCESS) {
3475 chip->card_fail |= MS_CARD;
3476 set_sense_type(chip, lun,
3477 SENSE_TYPE_MEDIA_NOT_PRESENT);
3478 TRACE_RET(chip, STATUS_FAIL);
3482 old_blk = ms_get_l2p_tbl(chip, seg_no,
3483 log_blk - ms_start_idx[seg_no]);
3484 if (old_blk == 0xFFFF) {
3485 ms_rw_fail(srb, chip);
3486 TRACE_RET(chip, STATUS_FAIL);
3489 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3490 new_blk = ms_get_unused_block(chip, seg_no);
3491 if (new_blk == 0xFFFF) {
3492 ms_rw_fail(srb, chip);
3493 TRACE_RET(chip, STATUS_FAIL);
3497 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3498 seg_no, old_blk, new_blk);
3503 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3504 if (end_page < (ms_card->page_off + 1)) {
3505 #ifdef MS_DELAY_WRITE
3506 delay_write->delay_write_flag = 1;
3507 delay_write->old_phyblock = old_blk;
3508 delay_write->new_phyblock = new_blk;
3509 delay_write->logblock = log_blk;
3510 delay_write->pageoff = end_page;
3512 retval = ms_finish_write(chip, old_blk, new_blk,
3514 if (retval != STATUS_SUCCESS) {
3515 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3516 set_sense_type(chip, lun,
3517 SENSE_TYPE_MEDIA_NOT_PRESENT);
3518 TRACE_RET(chip, STATUS_FAIL);
3521 ms_rw_fail(srb, chip);
3522 TRACE_RET(chip, STATUS_FAIL);
3528 scsi_set_resid(srb, 0);
3530 return STATUS_SUCCESS;
3533 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3534 u32 start_sector, u16 sector_cnt)
3536 struct ms_info *ms_card = &(chip->ms_card);
3539 if (CHK_MSPRO(ms_card))
3540 retval = mspro_rw_multi_sector(srb, chip, start_sector,
3543 retval = ms_rw_multi_sector(srb, chip, start_sector,
3550 void ms_free_l2p_tbl(struct rtsx_chip *chip)
3552 struct ms_info *ms_card = &(chip->ms_card);
3555 if (ms_card->segment != NULL) {
3556 for (i = 0; i < ms_card->segment_cnt; i++) {
3557 if (ms_card->segment[i].l2p_table != NULL) {
3558 vfree(ms_card->segment[i].l2p_table);
3559 ms_card->segment[i].l2p_table = NULL;
3561 if (ms_card->segment[i].free_table != NULL) {
3562 vfree(ms_card->segment[i].free_table);
3563 ms_card->segment[i].free_table = NULL;
3566 vfree(ms_card->segment);
3567 ms_card->segment = NULL;
3571 #ifdef SUPPORT_MAGIC_GATE
3573 #ifdef READ_BYTES_WAIT_INT
3574 static int ms_poll_int(struct rtsx_chip *chip)
3579 rtsx_init_cmd(chip);
3581 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
3583 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
3584 if (retval != STATUS_SUCCESS)
3585 TRACE_RET(chip, STATUS_FAIL);
3587 val = *rtsx_get_cmd_data(chip);
3588 if (val & MS_INT_ERR)
3589 TRACE_RET(chip, STATUS_FAIL);
3591 return STATUS_SUCCESS;
3595 #ifdef MS_SAMPLE_INT_ERR
3596 static int check_ms_err(struct rtsx_chip *chip)
3601 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3602 if (retval != STATUS_SUCCESS)
3604 if (val & MS_TRANSFER_ERR)
3607 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3608 if (retval != STATUS_SUCCESS)
3611 if (val & (MS_INT_ERR | MS_INT_CMDNK))
3617 static int check_ms_err(struct rtsx_chip *chip)
3622 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3623 if (retval != STATUS_SUCCESS)
3625 if (val & MS_TRANSFER_ERR)
3632 static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
3643 data[6] = entry_num;
3646 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3647 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT,
3649 if (retval == STATUS_SUCCESS)
3652 if (i == MS_MAX_RETRY_COUNT)
3653 TRACE_RET(chip, STATUS_FAIL);
3655 if (check_ms_err(chip)) {
3656 rtsx_clear_ms_error(chip);
3657 TRACE_RET(chip, STATUS_FAIL);
3660 return STATUS_SUCCESS;
3663 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type,
3670 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1);
3672 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
3674 if (retval != STATUS_SUCCESS)
3675 TRACE_RET(chip, STATUS_FAIL);
3683 buf[5] = mg_entry_num;
3685 retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6,
3686 NO_WAIT_INT, buf, 6);
3687 if (retval != STATUS_SUCCESS)
3688 TRACE_RET(chip, STATUS_FAIL);
3690 return STATUS_SUCCESS;
3693 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3697 unsigned int lun = SCSI_LUN(srb);
3698 u8 buf1[32], buf2[12];
3700 if (scsi_bufflen(srb) < 12) {
3701 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3702 TRACE_RET(chip, STATUS_FAIL);
3705 ms_cleanup_work(chip);
3707 retval = ms_switch_clock(chip);
3708 if (retval != STATUS_SUCCESS)
3709 TRACE_RET(chip, STATUS_FAIL);
3711 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
3712 if (retval != STATUS_SUCCESS) {
3713 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3714 TRACE_RET(chip, STATUS_FAIL);
3717 memset(buf1, 0, 32);
3718 rtsx_stor_get_xfer_buf(buf2, min_t(int, 12, scsi_bufflen(srb)), srb);
3719 for (i = 0; i < 8; i++)
3720 buf1[8+i] = buf2[4+i];
3722 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
3724 if (retval != STATUS_SUCCESS) {
3725 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3726 TRACE_RET(chip, STATUS_FAIL);
3728 if (check_ms_err(chip)) {
3729 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3730 rtsx_clear_ms_error(chip);
3731 TRACE_RET(chip, STATUS_FAIL);
3734 return STATUS_SUCCESS;
3737 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3739 int retval = STATUS_FAIL;
3741 unsigned int lun = SCSI_LUN(srb);
3744 ms_cleanup_work(chip);
3746 retval = ms_switch_clock(chip);
3747 if (retval != STATUS_SUCCESS)
3748 TRACE_RET(chip, STATUS_FAIL);
3750 buf = kmalloc(1540, GFP_KERNEL);
3752 TRACE_RET(chip, STATUS_ERROR);
3759 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
3760 if (retval != STATUS_SUCCESS) {
3761 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3762 TRACE_GOTO(chip, GetEKBFinish);
3765 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
3766 3, WAIT_INT, 0, 0, buf + 4, 1536);
3767 if (retval != STATUS_SUCCESS) {
3768 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3769 rtsx_clear_ms_error(chip);
3770 TRACE_GOTO(chip, GetEKBFinish);
3772 if (check_ms_err(chip)) {
3773 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3774 rtsx_clear_ms_error(chip);
3775 TRACE_RET(chip, STATUS_FAIL);
3778 bufflen = min_t(int, 1052, scsi_bufflen(srb));
3779 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
3786 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3788 struct ms_info *ms_card = &(chip->ms_card);
3792 unsigned int lun = SCSI_LUN(srb);
3795 ms_cleanup_work(chip);
3797 retval = ms_switch_clock(chip);
3798 if (retval != STATUS_SUCCESS)
3799 TRACE_RET(chip, STATUS_FAIL);
3801 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
3802 if (retval != STATUS_SUCCESS) {
3803 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3804 TRACE_RET(chip, STATUS_FAIL);
3807 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
3809 if (retval != STATUS_SUCCESS) {
3810 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3811 TRACE_RET(chip, STATUS_FAIL);
3813 if (check_ms_err(chip)) {
3814 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3815 rtsx_clear_ms_error(chip);
3816 TRACE_RET(chip, STATUS_FAIL);
3819 memcpy(ms_card->magic_gate_id, buf, 16);
3821 #ifdef READ_BYTES_WAIT_INT
3822 retval = ms_poll_int(chip);
3823 if (retval != STATUS_SUCCESS) {
3824 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3825 TRACE_RET(chip, STATUS_FAIL);
3829 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
3830 if (retval != STATUS_SUCCESS) {
3831 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3832 TRACE_RET(chip, STATUS_FAIL);
3835 bufflen = min_t(int, 12, scsi_bufflen(srb));
3836 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
3838 for (i = 0; i < 8; i++)
3841 for (i = 0; i < 24; i++)
3844 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
3845 32, WAIT_INT, buf, 32);
3846 if (retval != STATUS_SUCCESS) {
3847 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3848 TRACE_RET(chip, STATUS_FAIL);
3850 if (check_ms_err(chip)) {
3851 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3852 rtsx_clear_ms_error(chip);
3853 TRACE_RET(chip, STATUS_FAIL);
3856 ms_card->mg_auth = 0;
3858 return STATUS_SUCCESS;
3861 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3863 struct ms_info *ms_card = &(chip->ms_card);
3866 unsigned int lun = SCSI_LUN(srb);
3867 u8 buf1[32], buf2[36];
3869 ms_cleanup_work(chip);
3871 retval = ms_switch_clock(chip);
3872 if (retval != STATUS_SUCCESS)
3873 TRACE_RET(chip, STATUS_FAIL);
3875 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
3876 if (retval != STATUS_SUCCESS) {
3877 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3878 TRACE_RET(chip, STATUS_FAIL);
3881 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
3883 if (retval != STATUS_SUCCESS) {
3884 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3885 TRACE_RET(chip, STATUS_FAIL);
3887 if (check_ms_err(chip)) {
3888 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3889 rtsx_clear_ms_error(chip);
3890 TRACE_RET(chip, STATUS_FAIL);
3898 memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
3899 memcpy(buf2 + 20, buf1, 16);
3901 bufflen = min_t(int, 36, scsi_bufflen(srb));
3902 rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
3904 #ifdef READ_BYTES_WAIT_INT
3905 retval = ms_poll_int(chip);
3906 if (retval != STATUS_SUCCESS) {
3907 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3908 TRACE_RET(chip, STATUS_FAIL);
3912 return STATUS_SUCCESS;
3915 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3917 struct ms_info *ms_card = &(chip->ms_card);
3921 unsigned int lun = SCSI_LUN(srb);
3924 ms_cleanup_work(chip);
3926 retval = ms_switch_clock(chip);
3927 if (retval != STATUS_SUCCESS)
3928 TRACE_RET(chip, STATUS_FAIL);
3930 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
3931 if (retval != STATUS_SUCCESS) {
3932 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3933 TRACE_RET(chip, STATUS_FAIL);
3936 bufflen = min_t(int, 12, scsi_bufflen(srb));
3937 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
3939 for (i = 0; i < 8; i++)
3942 for (i = 0; i < 24; i++)
3945 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
3947 if (retval != STATUS_SUCCESS) {
3948 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3949 TRACE_RET(chip, STATUS_FAIL);
3951 if (check_ms_err(chip)) {
3952 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3953 rtsx_clear_ms_error(chip);
3954 TRACE_RET(chip, STATUS_FAIL);
3957 ms_card->mg_auth = 1;
3959 return STATUS_SUCCESS;
3962 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3964 struct ms_info *ms_card = &(chip->ms_card);
3967 unsigned int lun = SCSI_LUN(srb);
3970 ms_cleanup_work(chip);
3972 retval = ms_switch_clock(chip);
3973 if (retval != STATUS_SUCCESS)
3974 TRACE_RET(chip, STATUS_FAIL);
3976 buf = kmalloc(1028, GFP_KERNEL);
3978 TRACE_RET(chip, STATUS_ERROR);
3985 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
3986 if (retval != STATUS_SUCCESS) {
3987 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3988 TRACE_GOTO(chip, GetICVFinish);
3991 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
3992 2, WAIT_INT, 0, 0, buf + 4, 1024);
3993 if (retval != STATUS_SUCCESS) {
3994 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3995 rtsx_clear_ms_error(chip);
3996 TRACE_GOTO(chip, GetICVFinish);
3998 if (check_ms_err(chip)) {
3999 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4000 rtsx_clear_ms_error(chip);
4001 TRACE_RET(chip, STATUS_FAIL);
4004 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4005 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4012 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4014 struct ms_info *ms_card = &(chip->ms_card);
4017 #ifdef MG_SET_ICV_SLOW
4020 unsigned int lun = SCSI_LUN(srb);
4023 ms_cleanup_work(chip);
4025 retval = ms_switch_clock(chip);
4026 if (retval != STATUS_SUCCESS)
4027 TRACE_RET(chip, STATUS_FAIL);
4029 buf = kmalloc(1028, GFP_KERNEL);
4031 TRACE_RET(chip, STATUS_ERROR);
4033 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4034 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4036 retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
4037 if (retval != STATUS_SUCCESS) {
4038 if (ms_card->mg_auth == 0) {
4039 if ((buf[5] & 0xC0) != 0)
4040 set_sense_type(chip, lun,
4041 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4043 set_sense_type(chip, lun,
4044 SENSE_TYPE_MG_WRITE_ERR);
4046 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4048 TRACE_GOTO(chip, SetICVFinish);
4051 #ifdef MG_SET_ICV_SLOW
4052 for (i = 0; i < 2; i++) {
4055 rtsx_init_cmd(chip);
4057 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
4058 0xFF, PRO_WRITE_LONG_DATA);
4059 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4060 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4063 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
4065 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4066 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
4067 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
4068 MS_TRANSFER_END, MS_TRANSFER_END);
4070 rtsx_send_cmd_no_wait(chip);
4072 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i*512,
4073 512, 0, DMA_TO_DEVICE, 3000);
4074 if ((retval < 0) || check_ms_err(chip)) {
4075 rtsx_clear_ms_error(chip);
4076 if (ms_card->mg_auth == 0) {
4077 if ((buf[5] & 0xC0) != 0)
4078 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4080 set_sense_type(chip, lun,
4081 SENSE_TYPE_MG_WRITE_ERR);
4083 set_sense_type(chip, lun,
4084 SENSE_TYPE_MG_WRITE_ERR);
4086 retval = STATUS_FAIL;
4087 TRACE_GOTO(chip, SetICVFinish);
4091 retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
4092 2, WAIT_INT, 0, 0, buf + 4, 1024);
4093 if ((retval != STATUS_SUCCESS) || check_ms_err(chip)) {
4094 rtsx_clear_ms_error(chip);
4095 if (ms_card->mg_auth == 0) {
4096 if ((buf[5] & 0xC0) != 0)
4097 set_sense_type(chip, lun,
4098 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4100 set_sense_type(chip, lun,
4101 SENSE_TYPE_MG_WRITE_ERR);
4103 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4105 TRACE_GOTO(chip, SetICVFinish);
4114 #endif /* SUPPORT_MAGIC_GATE */
4116 void ms_cleanup_work(struct rtsx_chip *chip)
4118 struct ms_info *ms_card = &(chip->ms_card);
4120 if (CHK_MSPRO(ms_card)) {
4121 if (ms_card->seq_mode) {
4122 dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n");
4123 mspro_stop_seq_mode(chip);
4124 ms_card->cleanup_counter = 0;
4126 if (CHK_MSHG(ms_card)) {
4127 rtsx_write_register(chip, MS_CFG,
4128 MS_2K_SECTOR_MODE, 0x00);
4131 #ifdef MS_DELAY_WRITE
4132 else if ((!CHK_MSPRO(ms_card)) && ms_card->delay_write.delay_write_flag) {
4133 dev_dbg(rtsx_dev(chip), "MS: delay write\n");
4134 ms_delay_write(chip);
4135 ms_card->cleanup_counter = 0;
4140 int ms_power_off_card3v3(struct rtsx_chip *chip)
4144 retval = disable_card_clock(chip, MS_CARD);
4145 if (retval != STATUS_SUCCESS)
4146 TRACE_RET(chip, STATUS_FAIL);
4148 if (chip->asic_code) {
4149 retval = ms_pull_ctl_disable(chip);
4150 if (retval != STATUS_SUCCESS)
4151 TRACE_RET(chip, STATUS_FAIL);
4153 RTSX_WRITE_REG(chip, FPGA_PULL_CTL,
4154 FPGA_MS_PULL_CTL_BIT | 0x20, FPGA_MS_PULL_CTL_BIT);
4156 RTSX_WRITE_REG(chip, CARD_OE, MS_OUTPUT_EN, 0);
4157 if (!chip->ft2_fast_mode) {
4158 retval = card_power_off(chip, MS_CARD);
4159 if (retval != STATUS_SUCCESS)
4160 TRACE_RET(chip, STATUS_FAIL);
4163 return STATUS_SUCCESS;
4166 int release_ms_card(struct rtsx_chip *chip)
4168 struct ms_info *ms_card = &(chip->ms_card);
4171 #ifdef MS_DELAY_WRITE
4172 ms_card->delay_write.delay_write_flag = 0;
4174 ms_card->pro_under_formatting = 0;
4176 chip->card_ready &= ~MS_CARD;
4177 chip->card_fail &= ~MS_CARD;
4178 chip->card_wp &= ~MS_CARD;
4180 ms_free_l2p_tbl(chip);
4182 memset(ms_card->raw_sys_info, 0, 96);
4183 #ifdef SUPPORT_PCGL_1P18
4184 memset(ms_card->raw_model_name, 0, 48);
4187 retval = ms_power_off_card3v3(chip);
4188 if (retval != STATUS_SUCCESS)
4189 TRACE_RET(chip, STATUS_FAIL);
4191 return STATUS_SUCCESS;