2 * platform.c - DesignWare HS OTG Controller platform driver
4 * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions, and the following disclaimer,
11 * without modification.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The names of the above-listed copyright holders may not be used
16 * to endorse or promote products derived from this software without
17 * specific prior written permission.
19 * ALTERNATIVELY, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL") as published by the Free Software
21 * Foundation; either version 2 of the License, or (at your option) any
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
25 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
28 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
29 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
31 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
32 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
33 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/slab.h>
40 #include <linux/clk.h>
41 #include <linux/device.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/of_device.h>
44 #include <linux/mutex.h>
45 #include <linux/platform_device.h>
46 #include <linux/phy/phy.h>
47 #include <linux/platform_data/s3c-hsotg.h>
48 #include <linux/reset.h>
50 #include <linux/usb/of.h>
56 static const char dwc2_driver_name[] = "dwc2";
58 static const struct dwc2_core_params params_hi6220 = {
59 .otg_cap = 2, /* No HNP/SRP capable */
60 .otg_ver = 0, /* 1.3 */
63 .dma_desc_fs_enable = 0,
64 .speed = 0, /* High Speed */
65 .enable_dynamic_fifo = 1,
66 .en_multiple_tx_fifo = 1,
67 .host_rx_fifo_size = 512,
68 .host_nperio_tx_fifo_size = 512,
69 .host_perio_tx_fifo_size = 512,
70 .max_transfer_size = 65535,
71 .max_packet_count = 511,
73 .phy_type = 1, /* UTMI */
75 .phy_ulpi_ddr = 0, /* Single */
76 .phy_ulpi_ext_vbus = 0,
79 .host_support_fs_ls_low_power = 0,
80 .host_ls_low_power_phy_clk = 0, /* 48 MHz */
83 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
84 GAHBCFG_HBSTLEN_SHIFT,
86 .external_id_pin_ctl = -1,
90 static const struct dwc2_core_params params_bcm2835 = {
91 .otg_cap = 0, /* HNP/SRP capable */
92 .otg_ver = 0, /* 1.3 */
95 .dma_desc_fs_enable = 0,
96 .speed = 0, /* High Speed */
97 .enable_dynamic_fifo = 1,
98 .en_multiple_tx_fifo = 1,
99 .host_rx_fifo_size = 774, /* 774 DWORDs */
100 .host_nperio_tx_fifo_size = 256, /* 256 DWORDs */
101 .host_perio_tx_fifo_size = 512, /* 512 DWORDs */
102 .max_transfer_size = 65535,
103 .max_packet_count = 511,
105 .phy_type = 1, /* UTMI */
106 .phy_utmi_width = 8, /* 8 bits */
107 .phy_ulpi_ddr = 0, /* Single */
108 .phy_ulpi_ext_vbus = 0,
111 .host_support_fs_ls_low_power = 0,
112 .host_ls_low_power_phy_clk = 0, /* 48 MHz */
117 .external_id_pin_ctl = -1,
121 static const struct dwc2_core_params params_rk3066 = {
122 .otg_cap = 2, /* non-HNP/non-SRP */
125 .dma_desc_enable = 0,
126 .dma_desc_fs_enable = 0,
128 .enable_dynamic_fifo = 1,
129 .en_multiple_tx_fifo = -1,
130 .host_rx_fifo_size = 525, /* 525 DWORDs */
131 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
132 .host_perio_tx_fifo_size = 256, /* 256 DWORDs */
133 .max_transfer_size = -1,
134 .max_packet_count = -1,
137 .phy_utmi_width = -1,
139 .phy_ulpi_ext_vbus = -1,
142 .host_support_fs_ls_low_power = -1,
143 .host_ls_low_power_phy_clk = -1,
146 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
147 GAHBCFG_HBSTLEN_SHIFT,
149 .external_id_pin_ctl = -1,
153 static const struct dwc2_core_params params_ltq = {
154 .otg_cap = 2, /* non-HNP/non-SRP */
157 .dma_desc_enable = -1,
158 .dma_desc_fs_enable = -1,
160 .enable_dynamic_fifo = -1,
161 .en_multiple_tx_fifo = -1,
162 .host_rx_fifo_size = 288, /* 288 DWORDs */
163 .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
164 .host_perio_tx_fifo_size = 96, /* 96 DWORDs */
165 .max_transfer_size = 65535,
166 .max_packet_count = 511,
169 .phy_utmi_width = -1,
171 .phy_ulpi_ext_vbus = -1,
174 .host_support_fs_ls_low_power = -1,
175 .host_ls_low_power_phy_clk = -1,
178 .ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
179 GAHBCFG_HBSTLEN_SHIFT,
181 .external_id_pin_ctl = -1,
185 static const struct dwc2_core_params params_amlogic = {
186 .otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE,
189 .dma_desc_enable = 0,
190 .dma_desc_fs_enable = 0,
191 .speed = DWC2_SPEED_PARAM_HIGH,
192 .enable_dynamic_fifo = 1,
193 .en_multiple_tx_fifo = -1,
194 .host_rx_fifo_size = 512,
195 .host_nperio_tx_fifo_size = 500,
196 .host_perio_tx_fifo_size = 500,
197 .max_transfer_size = -1,
198 .max_packet_count = -1,
200 .phy_type = DWC2_PHY_TYPE_PARAM_UTMI,
201 .phy_utmi_width = -1,
203 .phy_ulpi_ext_vbus = -1,
206 .host_support_fs_ls_low_power = -1,
207 .host_ls_low_power_phy_clk = -1,
210 .ahbcfg = GAHBCFG_HBSTLEN_INCR8 <<
211 GAHBCFG_HBSTLEN_SHIFT,
213 .external_id_pin_ctl = -1,
218 * Check the dr_mode against the module configuration and hardware
221 * The hardware, module, and dr_mode, can each be set to host, device,
222 * or otg. Check that all these values are compatible and adjust the
223 * value of dr_mode if possible.
226 * HW MOD dr_mode dr_mode
227 * ------------------------------
238 * OTG OTG any : dr_mode
240 static int dwc2_get_dr_mode(struct dwc2_hsotg *hsotg)
242 enum usb_dr_mode mode;
244 hsotg->dr_mode = usb_get_dr_mode(hsotg->dev);
245 if (hsotg->dr_mode == USB_DR_MODE_UNKNOWN)
246 hsotg->dr_mode = USB_DR_MODE_OTG;
248 mode = hsotg->dr_mode;
250 if (dwc2_hw_is_device(hsotg)) {
251 if (IS_ENABLED(CONFIG_USB_DWC2_HOST)) {
253 "Controller does not support host mode.\n");
256 mode = USB_DR_MODE_PERIPHERAL;
257 } else if (dwc2_hw_is_host(hsotg)) {
258 if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL)) {
260 "Controller does not support device mode.\n");
263 mode = USB_DR_MODE_HOST;
265 if (IS_ENABLED(CONFIG_USB_DWC2_HOST))
266 mode = USB_DR_MODE_HOST;
267 else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL))
268 mode = USB_DR_MODE_PERIPHERAL;
271 if (mode != hsotg->dr_mode) {
273 "Configuration mismatch. dr_mode forced to %s\n",
274 mode == USB_DR_MODE_HOST ? "host" : "device");
276 hsotg->dr_mode = mode;
282 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
284 struct platform_device *pdev = to_platform_device(hsotg->dev);
287 ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies),
293 ret = clk_prepare_enable(hsotg->clk);
299 ret = usb_phy_init(hsotg->uphy);
300 else if (hsotg->plat && hsotg->plat->phy_init)
301 ret = hsotg->plat->phy_init(pdev, hsotg->plat->phy_type);
303 ret = phy_power_on(hsotg->phy);
305 ret = phy_init(hsotg->phy);
312 * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
313 * @hsotg: The driver state
315 * A wrapper for platform code responsible for controlling
316 * low-level USB platform resources (phy, clock, regulators)
318 int dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
320 int ret = __dwc2_lowlevel_hw_enable(hsotg);
323 hsotg->ll_hw_enabled = true;
327 static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
329 struct platform_device *pdev = to_platform_device(hsotg->dev);
333 usb_phy_shutdown(hsotg->uphy);
334 else if (hsotg->plat && hsotg->plat->phy_exit)
335 ret = hsotg->plat->phy_exit(pdev, hsotg->plat->phy_type);
337 ret = phy_exit(hsotg->phy);
339 ret = phy_power_off(hsotg->phy);
345 clk_disable_unprepare(hsotg->clk);
347 ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
354 * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
355 * @hsotg: The driver state
357 * A wrapper for platform code responsible for controlling
358 * low-level USB platform resources (phy, clock, regulators)
360 int dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg)
362 int ret = __dwc2_lowlevel_hw_disable(hsotg);
365 hsotg->ll_hw_enabled = false;
369 static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
373 hsotg->reset = devm_reset_control_get_optional(hsotg->dev, "dwc2");
374 if (IS_ERR(hsotg->reset)) {
375 ret = PTR_ERR(hsotg->reset);
382 dev_err(hsotg->dev, "error getting reset control %d\n",
389 reset_control_deassert(hsotg->reset);
391 /* Set default UTMI width */
392 hsotg->phyif = GUSBCFG_PHYIF16;
395 * Attempt to find a generic PHY, then look for an old style
396 * USB PHY and then fall back to pdata
398 hsotg->phy = devm_phy_get(hsotg->dev, "usb2-phy");
399 if (IS_ERR(hsotg->phy)) {
400 ret = PTR_ERR(hsotg->phy);
409 dev_err(hsotg->dev, "error getting phy %d\n", ret);
415 hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2);
416 if (IS_ERR(hsotg->uphy)) {
417 ret = PTR_ERR(hsotg->uphy);
426 dev_err(hsotg->dev, "error getting usb phy %d\n",
433 hsotg->plat = dev_get_platdata(hsotg->dev);
437 * If using the generic PHY framework, check if the PHY bus
438 * width is 8-bit and set the phyif appropriately.
440 if (phy_get_bus_width(hsotg->phy) == 8)
441 hsotg->phyif = GUSBCFG_PHYIF8;
445 hsotg->clk = devm_clk_get(hsotg->dev, "otg");
446 if (IS_ERR(hsotg->clk)) {
448 dev_dbg(hsotg->dev, "cannot get otg clock\n");
452 for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++)
453 hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i];
455 ret = devm_regulator_bulk_get(hsotg->dev, ARRAY_SIZE(hsotg->supplies),
458 dev_err(hsotg->dev, "failed to request supplies: %d\n", ret);
465 * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
468 * @dev: Platform device
470 * This routine is called, for example, when the rmmod command is executed. The
471 * device may or may not be electrically present. If it is present, the driver
472 * stops device processing. Any resources used on behalf of this device are
475 static int dwc2_driver_remove(struct platform_device *dev)
477 struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
479 dwc2_debugfs_exit(hsotg);
480 if (hsotg->hcd_enabled)
481 dwc2_hcd_remove(hsotg);
482 if (hsotg->gadget_enabled)
483 dwc2_hsotg_remove(hsotg);
485 if (hsotg->ll_hw_enabled)
486 dwc2_lowlevel_hw_disable(hsotg);
489 reset_control_assert(hsotg->reset);
495 * dwc2_driver_shutdown() - Called on device shutdown
497 * @dev: Platform device
499 * In specific conditions (involving usb hubs) dwc2 devices can create a
500 * lot of interrupts, even to the point of overwhelming devices running
501 * at low frequencies. Some devices need to do special clock handling
502 * at shutdown-time which may bring the system clock below the threshold
503 * of being able to handle the dwc2 interrupts. Disabling dwc2-irqs
504 * prevents reboots/poweroffs from getting stuck in such cases.
506 static void dwc2_driver_shutdown(struct platform_device *dev)
508 struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
510 disable_irq(hsotg->irq);
513 static const struct of_device_id dwc2_of_match_table[] = {
514 { .compatible = "brcm,bcm2835-usb", .data = ¶ms_bcm2835 },
515 { .compatible = "hisilicon,hi6220-usb", .data = ¶ms_hi6220 },
516 { .compatible = "rockchip,rk3066-usb", .data = ¶ms_rk3066 },
517 { .compatible = "lantiq,arx100-usb", .data = ¶ms_ltq },
518 { .compatible = "lantiq,xrx200-usb", .data = ¶ms_ltq },
519 { .compatible = "snps,dwc2", .data = NULL },
520 { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
521 { .compatible = "amlogic,meson8b-usb", .data = ¶ms_amlogic },
522 { .compatible = "amlogic,meson-gxbb-usb", .data = ¶ms_amlogic },
525 MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
528 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
531 * @dev: Platform device
533 * This routine creates the driver components required to control the device
534 * (core, HCD, and PCD) and initializes the device. The driver components are
535 * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
536 * in the device private data. This allows the driver to access the dwc2_hsotg
537 * structure on subsequent calls to driver methods for this device.
539 static int dwc2_driver_probe(struct platform_device *dev)
541 const struct of_device_id *match;
542 const struct dwc2_core_params *params;
543 struct dwc2_core_params defparams;
544 struct dwc2_hsotg *hsotg;
545 struct resource *res;
548 match = of_match_device(dwc2_of_match_table, &dev->dev);
549 if (match && match->data) {
550 params = match->data;
552 /* Default all params to autodetect */
553 dwc2_set_all_params(&defparams, -1);
557 * Disable descriptor dma mode by default as the HW can support
558 * it, but does not support it for SPLIT transactions.
559 * Disable it for FS devices as well.
561 defparams.dma_desc_enable = 0;
562 defparams.dma_desc_fs_enable = 0;
565 hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
569 hsotg->dev = &dev->dev;
572 * Use reasonable defaults so platforms don't have to provide these.
574 if (!dev->dev.dma_mask)
575 dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
576 retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
580 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
581 hsotg->regs = devm_ioremap_resource(&dev->dev, res);
582 if (IS_ERR(hsotg->regs))
583 return PTR_ERR(hsotg->regs);
585 dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
586 (unsigned long)res->start, hsotg->regs);
588 retval = dwc2_lowlevel_hw_init(hsotg);
592 spin_lock_init(&hsotg->lock);
594 hsotg->core_params = devm_kzalloc(&dev->dev,
595 sizeof(*hsotg->core_params), GFP_KERNEL);
596 if (!hsotg->core_params)
599 dwc2_set_all_params(hsotg->core_params, -1);
601 hsotg->irq = platform_get_irq(dev, 0);
602 if (hsotg->irq < 0) {
603 dev_err(&dev->dev, "missing IRQ resource\n");
607 dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
609 retval = devm_request_irq(hsotg->dev, hsotg->irq,
610 dwc2_handle_common_intr, IRQF_SHARED,
611 dev_name(hsotg->dev), hsotg);
615 retval = dwc2_lowlevel_hw_enable(hsotg);
619 retval = dwc2_get_dr_mode(hsotg);
624 * Reset before dwc2_get_hwparams() then it could get power-on real
625 * reset value form registers.
627 dwc2_core_reset_and_force_dr_mode(hsotg);
629 /* Detect config values from hardware */
630 retval = dwc2_get_hwparams(hsotg);
634 /* Validate parameter values */
635 dwc2_set_parameters(hsotg, params);
637 dwc2_force_dr_mode(hsotg);
639 if (hsotg->dr_mode != USB_DR_MODE_HOST) {
640 retval = dwc2_gadget_init(hsotg, hsotg->irq);
643 hsotg->gadget_enabled = 1;
646 if (hsotg->dr_mode != USB_DR_MODE_PERIPHERAL) {
647 retval = dwc2_hcd_init(hsotg, hsotg->irq);
649 if (hsotg->gadget_enabled)
650 dwc2_hsotg_remove(hsotg);
653 hsotg->hcd_enabled = 1;
656 platform_set_drvdata(dev, hsotg);
658 dwc2_debugfs_init(hsotg);
660 /* Gadget code manages lowlevel hw on its own */
661 if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL)
662 dwc2_lowlevel_hw_disable(hsotg);
667 dwc2_lowlevel_hw_disable(hsotg);
671 static int __maybe_unused dwc2_suspend(struct device *dev)
673 struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
676 if (dwc2_is_device_mode(dwc2))
677 dwc2_hsotg_suspend(dwc2);
679 if (dwc2->ll_hw_enabled)
680 ret = __dwc2_lowlevel_hw_disable(dwc2);
685 static int __maybe_unused dwc2_resume(struct device *dev)
687 struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
690 if (dwc2->ll_hw_enabled) {
691 ret = __dwc2_lowlevel_hw_enable(dwc2);
696 if (dwc2_is_device_mode(dwc2))
697 ret = dwc2_hsotg_resume(dwc2);
702 static const struct dev_pm_ops dwc2_dev_pm_ops = {
703 SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
706 static struct platform_driver dwc2_platform_driver = {
708 .name = dwc2_driver_name,
709 .of_match_table = dwc2_of_match_table,
710 .pm = &dwc2_dev_pm_ops,
712 .probe = dwc2_driver_probe,
713 .remove = dwc2_driver_remove,
714 .shutdown = dwc2_driver_shutdown,
717 module_platform_driver(dwc2_platform_driver);
719 MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
720 MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
721 MODULE_LICENSE("Dual BSD/GPL");