drivers/usb/dwc3/gadget.c

   1 /**
   2  * gadget.c - DesignWare USB3 DRD Controller Gadget Framework Link
   3  *
   4  * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
   5  *
   6  * Authors: Felipe Balbi <balbi@ti.com>,
   7  *          Sebastian Andrzej Siewior <bigeasy@linutronix.de>
   8  *
   9  * This program is free software: you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2  of
  11  * the License as published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18
  19 #include <linux/kernel.h>
  20 #include <linux/delay.h>
  21 #include <linux/slab.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/pm_runtime.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/io.h>
  27 #include <linux/list.h>
  28 #include <linux/dma-mapping.h>
  29
  30 #include <linux/usb/ch9.h>
  31 #include <linux/usb/gadget.h>
  32
  33 #include "debug.h"
  34 #include "core.h"
  35 #include "gadget.h"
  36 #include "io.h"
  37
  38 /**
  39  * dwc3_gadget_set_test_mode - Enables USB2 Test Modes
  40  * @dwc: pointer to our context structure
  41  * @mode: the mode to set (J, K SE0 NAK, Force Enable)
  42  *
  43  * Caller should take care of locking. This function will
  44  * return 0 on success or -EINVAL if wrong Test Selector
  45  * is passed
  46  */
  47 int dwc3_gadget_set_test_mode(struct dwc3 *dwc, int mode)
  48 {
  49         u32             reg;
  50
  51         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
  52         reg &= ~DWC3_DCTL_TSTCTRL_MASK;
  53
  54         switch (mode) {
  55         case TEST_J:
  56         case TEST_K:
  57         case TEST_SE0_NAK:
  58         case TEST_PACKET:
  59         case TEST_FORCE_EN:
  60                 reg |= mode << 1;
  61                 break;
  62         default:
  63                 return -EINVAL;
  64         }
  65
  66         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
  67
  68         return 0;
  69 }
  70
  71 /**
  72  * dwc3_gadget_get_link_state - Gets current state of USB Link
  73  * @dwc: pointer to our context structure
  74  *
  75  * Caller should take care of locking. This function will
  76  * return the link state on success (>= 0) or -ETIMEDOUT.
  77  */
  78 int dwc3_gadget_get_link_state(struct dwc3 *dwc)
  79 {
  80         u32             reg;
  81
  82         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
  83
  84         return DWC3_DSTS_USBLNKST(reg);
  85 }
  86
  87 /**
  88  * dwc3_gadget_set_link_state - Sets USB Link to a particular State
  89  * @dwc: pointer to our context structure
  90  * @state: the state to put link into
  91  *
  92  * Caller should take care of locking. This function will
  93  * return 0 on success or -ETIMEDOUT.
  94  */
  95 int dwc3_gadget_set_link_state(struct dwc3 *dwc, enum dwc3_link_state state)
  96 {
  97         int             retries = 10000;
  98         u32             reg;
  99
 100         /*
 101          * Wait until device controller is ready. Only applies to 1.94a and
 102          * later RTL.
 103          */
 104         if (dwc->revision >= DWC3_REVISION_194A) {
 105                 while (--retries) {
 106                         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
 107                         if (reg & DWC3_DSTS_DCNRD)
 108                                 udelay(5);
 109                         else
 110                                 break;
 111                 }
 112
 113                 if (retries <= 0)
 114                         return -ETIMEDOUT;
 115         }
 116
 117         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 118         reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
 119
 120         /* set requested state */
 121         reg |= DWC3_DCTL_ULSTCHNGREQ(state);
 122         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
 123
 124         /*
 125          * The following code is racy when called from dwc3_gadget_wakeup,
 126          * and is not needed, at least on newer versions
 127          */
 128         if (dwc->revision >= DWC3_REVISION_194A)
 129                 return 0;
 130
 131         /* wait for a change in DSTS */
 132         retries = 10000;
 133         while (--retries) {
 134                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
 135
 136                 if (DWC3_DSTS_USBLNKST(reg) == state)
 137                         return 0;
 138
 139                 udelay(5);
 140         }
 141
 142         dwc3_trace(trace_dwc3_gadget,
 143                         "link state change request timed out");
 144
 145         return -ETIMEDOUT;
 146 }
 147
 148 /**
 149  * dwc3_ep_inc_trb() - Increment a TRB index.
 150  * @index - Pointer to the TRB index to increment.
 151  *
 152  * The index should never point to the link TRB. After incrementing,
 153  * if it is point to the link TRB, wrap around to the beginning. The
 154  * link TRB is always at the last TRB entry.
 155  */
 156 static void dwc3_ep_inc_trb(u8 *index)
 157 {
 158         (*index)++;
 159         if (*index == (DWC3_TRB_NUM - 1))
 160                 *index = 0;
 161 }
 162
 163 static void dwc3_ep_inc_enq(struct dwc3_ep *dep)
 164 {
 165         dwc3_ep_inc_trb(&dep->trb_enqueue);
 166 }
 167
 168 static void dwc3_ep_inc_deq(struct dwc3_ep *dep)
 169 {
 170         dwc3_ep_inc_trb(&dep->trb_dequeue);
 171 }
 172
 173 void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req,
 174                 int status)
 175 {
 176         struct dwc3                     *dwc = dep->dwc;
 177         int                             i;
 178
 179         if (req->started) {
 180                 i = 0;
 181                 do {
 182                         dwc3_ep_inc_deq(dep);
 183                 } while(++i < req->request.num_mapped_sgs);
 184                 req->started = false;
 185         }
 186         list_del(&req->list);
 187         req->trb = NULL;
 188
 189         if (req->request.status == -EINPROGRESS)
 190                 req->request.status = status;
 191
 192         if (dwc->ep0_bounced && dep->number == 0)
 193                 dwc->ep0_bounced = false;
 194         else
 195                 usb_gadget_unmap_request(&dwc->gadget, &req->request,
 196                                 req->direction);
 197
 198         trace_dwc3_gadget_giveback(req);
 199
 200         spin_unlock(&dwc->lock);
 201         usb_gadget_giveback_request(&dep->endpoint, &req->request);
 202         spin_lock(&dwc->lock);
 203
 204         if (dep->number > 1)
 205                 pm_runtime_put(dwc->dev);
 206 }
 207
 208 int dwc3_send_gadget_generic_command(struct dwc3 *dwc, unsigned cmd, u32 param)
 209 {
 210         u32             timeout = 500;
 211         int             status = 0;
 212         int             ret = 0;
 213         u32             reg;
 214
 215         dwc3_writel(dwc->regs, DWC3_DGCMDPAR, param);
 216         dwc3_writel(dwc->regs, DWC3_DGCMD, cmd | DWC3_DGCMD_CMDACT);
 217
 218         do {
 219                 reg = dwc3_readl(dwc->regs, DWC3_DGCMD);
 220                 if (!(reg & DWC3_DGCMD_CMDACT)) {
 221                         status = DWC3_DGCMD_STATUS(reg);
 222                         if (status)
 223                                 ret = -EINVAL;
 224                         break;
 225                 }
 226         } while (timeout--);
 227
 228         if (!timeout) {
 229                 ret = -ETIMEDOUT;
 230                 status = -ETIMEDOUT;
 231         }
 232
 233         trace_dwc3_gadget_generic_cmd(cmd, param, status);
 234
 235         return ret;
 236 }
 237
 238 static int __dwc3_gadget_wakeup(struct dwc3 *dwc);
 239
 240 int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd,
 241                 struct dwc3_gadget_ep_cmd_params *params)
 242 {
 243         struct dwc3             *dwc = dep->dwc;
 244         u32                     timeout = 500;
 245         u32                     reg;
 246
 247         int                     cmd_status = 0;
 248         int                     susphy = false;
 249         int                     ret = -EINVAL;
 250
 251         /*
 252          * Synopsys Databook 2.60a states, on section 6.3.2.5.[1-8], that if
 253          * we're issuing an endpoint command, we must check if
 254          * GUSB2PHYCFG.SUSPHY bit is set. If it is, then we need to clear it.
 255          *
 256          * We will also set SUSPHY bit to what it was before returning as stated
 257          * by the same section on Synopsys databook.
 258          */
 259         if (dwc->gadget.speed <= USB_SPEED_HIGH) {
 260                 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
 261                 if (unlikely(reg & DWC3_GUSB2PHYCFG_SUSPHY)) {
 262                         susphy = true;
 263                         reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
 264                         dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 265                 }
 266         }
 267
 268         if (cmd == DWC3_DEPCMD_STARTTRANSFER) {
 269                 int             needs_wakeup;
 270
 271                 needs_wakeup = (dwc->link_state == DWC3_LINK_STATE_U1 ||
 272                                 dwc->link_state == DWC3_LINK_STATE_U2 ||
 273                                 dwc->link_state == DWC3_LINK_STATE_U3);
 274
 275                 if (unlikely(needs_wakeup)) {
 276                         ret = __dwc3_gadget_wakeup(dwc);
 277                         dev_WARN_ONCE(dwc->dev, ret, "wakeup failed --> %d\n",
 278                                         ret);
 279                 }
 280         }
 281
 282         dwc3_writel(dep->regs, DWC3_DEPCMDPAR0, params->param0);
 283         dwc3_writel(dep->regs, DWC3_DEPCMDPAR1, params->param1);
 284         dwc3_writel(dep->regs, DWC3_DEPCMDPAR2, params->param2);
 285
 286         dwc3_writel(dep->regs, DWC3_DEPCMD, cmd | DWC3_DEPCMD_CMDACT);
 287         do {
 288                 reg = dwc3_readl(dep->regs, DWC3_DEPCMD);
 289                 if (!(reg & DWC3_DEPCMD_CMDACT)) {
 290                         cmd_status = DWC3_DEPCMD_STATUS(reg);
 291
 292                         switch (cmd_status) {
 293                         case 0:
 294                                 ret = 0;
 295                                 break;
 296                         case DEPEVT_TRANSFER_NO_RESOURCE:
 297                                 ret = -EINVAL;
 298                                 break;
 299                         case DEPEVT_TRANSFER_BUS_EXPIRY:
 300                                 /*
 301                                  * SW issues START TRANSFER command to
 302                                  * isochronous ep with future frame interval. If
 303                                  * future interval time has already passed when
 304                                  * core receives the command, it will respond
 305                                  * with an error status of 'Bus Expiry'.
 306                                  *
 307                                  * Instead of always returning -EINVAL, let's
 308                                  * give a hint to the gadget driver that this is
 309                                  * the case by returning -EAGAIN.
 310                                  */
 311                                 ret = -EAGAIN;
 312                                 break;
 313                         default:
 314                                 dev_WARN(dwc->dev, "UNKNOWN cmd status\n");
 315                         }
 316
 317                         break;
 318                 }
 319         } while (--timeout);
 320
 321         if (timeout == 0) {
 322                 ret = -ETIMEDOUT;
 323                 cmd_status = -ETIMEDOUT;
 324         }
 325
 326         trace_dwc3_gadget_ep_cmd(dep, cmd, params, cmd_status);
 327
 328         if (unlikely(susphy)) {
 329                 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
 330                 reg |= DWC3_GUSB2PHYCFG_SUSPHY;
 331                 dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 332         }
 333
 334         return ret;
 335 }
 336
 337 static int dwc3_send_clear_stall_ep_cmd(struct dwc3_ep *dep)
 338 {
 339         struct dwc3 *dwc = dep->dwc;
 340         struct dwc3_gadget_ep_cmd_params params;
 341         u32 cmd = DWC3_DEPCMD_CLEARSTALL;
 342
 343         /*
 344          * As of core revision 2.60a the recommended programming model
 345          * is to set the ClearPendIN bit when issuing a Clear Stall EP
 346          * command for IN endpoints. This is to prevent an issue where
 347          * some (non-compliant) hosts may not send ACK TPs for pending
 348          * IN transfers due to a mishandled error condition. Synopsys
 349          * STAR 9000614252.
 350          */
 351         if (dep->direction && (dwc->revision >= DWC3_REVISION_260A))
 352                 cmd |= DWC3_DEPCMD_CLEARPENDIN;
 353
 354         memset(&params, 0, sizeof(params));
 355
 356         return dwc3_send_gadget_ep_cmd(dep, cmd, &params);
 357 }
 358
 359 static dma_addr_t dwc3_trb_dma_offset(struct dwc3_ep *dep,
 360                 struct dwc3_trb *trb)
 361 {
 362         u32             offset = (char *) trb - (char *) dep->trb_pool;
 363
 364         return dep->trb_pool_dma + offset;
 365 }
 366
 367 static int dwc3_alloc_trb_pool(struct dwc3_ep *dep)
 368 {
 369         struct dwc3             *dwc = dep->dwc;
 370
 371         if (dep->trb_pool)
 372                 return 0;
 373
 374         dep->trb_pool = dma_alloc_coherent(dwc->dev,
 375                         sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
 376                         &dep->trb_pool_dma, GFP_KERNEL);
 377         if (!dep->trb_pool) {
 378                 dev_err(dep->dwc->dev, "failed to allocate trb pool for %s\n",
 379                                 dep->name);
 380                 return -ENOMEM;
 381         }
 382
 383         return 0;
 384 }
 385
 386 static void dwc3_free_trb_pool(struct dwc3_ep *dep)
 387 {
 388         struct dwc3             *dwc = dep->dwc;
 389
 390         dma_free_coherent(dwc->dev, sizeof(struct dwc3_trb) * DWC3_TRB_NUM,
 391                         dep->trb_pool, dep->trb_pool_dma);
 392
 393         dep->trb_pool = NULL;
 394         dep->trb_pool_dma = 0;
 395 }
 396
 397 static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep);
 398
 399 /**
 400  * dwc3_gadget_start_config - Configure EP resources
 401  * @dwc: pointer to our controller context structure
 402  * @dep: endpoint that is being enabled
 403  *
 404  * The assignment of transfer resources cannot perfectly follow the
 405  * data book due to the fact that the controller driver does not have
 406  * all knowledge of the configuration in advance. It is given this
 407  * information piecemeal by the composite gadget framework after every
 408  * SET_CONFIGURATION and SET_INTERFACE. Trying to follow the databook
 409  * programming model in this scenario can cause errors. For two
 410  * reasons:
 411  *
 412  * 1) The databook says to do DEPSTARTCFG for every SET_CONFIGURATION
 413  * and SET_INTERFACE (8.1.5). This is incorrect in the scenario of
 414  * multiple interfaces.
 415  *
 416  * 2) The databook does not mention doing more DEPXFERCFG for new
 417  * endpoint on alt setting (8.1.6).
 418  *
 419  * The following simplified method is used instead:
 420  *
 421  * All hardware endpoints can be assigned a transfer resource and this
 422  * setting will stay persistent until either a core reset or
 423  * hibernation. So whenever we do a DEPSTARTCFG(0) we can go ahead and
 424  * do DEPXFERCFG for every hardware endpoint as well. We are
 425  * guaranteed that there are as many transfer resources as endpoints.
 426  *
 427  * This function is called for each endpoint when it is being enabled
 428  * but is triggered only when called for EP0-out, which always happens
 429  * first, and which should only happen in one of the above conditions.
 430  */
 431 static int dwc3_gadget_start_config(struct dwc3 *dwc, struct dwc3_ep *dep)
 432 {
 433         struct dwc3_gadget_ep_cmd_params params;
 434         u32                     cmd;
 435         int                     i;
 436         int                     ret;
 437
 438         if (dep->number)
 439                 return 0;
 440
 441         memset(&params, 0x00, sizeof(params));
 442         cmd = DWC3_DEPCMD_DEPSTARTCFG;
 443
 444         ret = dwc3_send_gadget_ep_cmd(dep, cmd, &params);
 445         if (ret)
 446                 return ret;
 447
 448         for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) {
 449                 struct dwc3_ep *dep = dwc->eps[i];
 450
 451                 if (!dep)
 452                         continue;
 453
 454                 ret = dwc3_gadget_set_xfer_resource(dwc, dep);
 455                 if (ret)
 456                         return ret;
 457         }
 458
 459         return 0;
 460 }
 461
 462 static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep,
 463                 const struct usb_endpoint_descriptor *desc,
 464                 const struct usb_ss_ep_comp_descriptor *comp_desc,
 465                 bool ignore, bool restore)
 466 {
 467         struct dwc3_gadget_ep_cmd_params params;
 468
 469         memset(&params, 0x00, sizeof(params));
 470
 471         params.param0 = DWC3_DEPCFG_EP_TYPE(usb_endpoint_type(desc))
 472                 | DWC3_DEPCFG_MAX_PACKET_SIZE(usb_endpoint_maxp(desc));
 473
 474         /* Burst size is only needed in SuperSpeed mode */
 475         if (dwc->gadget.speed >= USB_SPEED_SUPER) {
 476                 u32 burst = dep->endpoint.maxburst;
 477                 params.param0 |= DWC3_DEPCFG_BURST_SIZE(burst - 1);
 478         }
 479
 480         if (ignore)
 481                 params.param0 |= DWC3_DEPCFG_IGN_SEQ_NUM;
 482
 483         if (restore) {
 484                 params.param0 |= DWC3_DEPCFG_ACTION_RESTORE;
 485                 params.param2 |= dep->saved_state;
 486         }
 487
 488         params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN
 489                 | DWC3_DEPCFG_XFER_NOT_READY_EN;
 490
 491         if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) {
 492                 params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE
 493                         | DWC3_DEPCFG_STREAM_EVENT_EN;
 494                 dep->stream_capable = true;
 495         }
 496
 497         if (!usb_endpoint_xfer_control(desc))
 498                 params.param1 |= DWC3_DEPCFG_XFER_IN_PROGRESS_EN;
 499
 500         /*
 501          * We are doing 1:1 mapping for endpoints, meaning
 502          * Physical Endpoints 2 maps to Logical Endpoint 2 and
 503          * so on. We consider the direction bit as part of the physical
 504          * endpoint number. So USB endpoint 0x81 is 0x03.
 505          */
 506         params.param1 |= DWC3_DEPCFG_EP_NUMBER(dep->number);
 507
 508         /*
 509          * We must use the lower 16 TX FIFOs even though
 510          * HW might have more
 511          */
 512         if (dep->direction)
 513                 params.param0 |= DWC3_DEPCFG_FIFO_NUMBER(dep->number >> 1);
 514
 515         if (desc->bInterval) {
 516                 params.param1 |= DWC3_DEPCFG_BINTERVAL_M1(desc->bInterval - 1);
 517                 dep->interval = 1 << (desc->bInterval - 1);
 518         }
 519
 520         return dwc3_send_gadget_ep_cmd(dep, DWC3_DEPCMD_SETEPCONFIG, &params);
 521 }
 522
 523 static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep)
 524 {
 525         struct dwc3_gadget_ep_cmd_params params;
 526
 527         memset(&params, 0x00, sizeof(params));
 528
 529         params.param0 = DWC3_DEPXFERCFG_NUM_XFER_RES(1);
 530
 531         return dwc3_send_gadget_ep_cmd(dep, DWC3_DEPCMD_SETTRANSFRESOURCE,
 532                         &params);
 533 }
 534
 535 /**
 536  * __dwc3_gadget_ep_enable - Initializes a HW endpoint
 537  * @dep: endpoint to be initialized
 538  * @desc: USB Endpoint Descriptor
 539  *
 540  * Caller should take care of locking
 541  */
 542 static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
 543                 const struct usb_endpoint_descriptor *desc,
 544                 const struct usb_ss_ep_comp_descriptor *comp_desc,
 545                 bool ignore, bool restore)
 546 {
 547         struct dwc3             *dwc = dep->dwc;
 548         u32                     reg;
 549         int                     ret;
 550
 551         dwc3_trace(trace_dwc3_gadget, "Enabling %s", dep->name);
 552
 553         if (!(dep->flags & DWC3_EP_ENABLED)) {
 554                 ret = dwc3_gadget_start_config(dwc, dep);
 555                 if (ret)
 556                         return ret;
 557         }
 558
 559         ret = dwc3_gadget_set_ep_config(dwc, dep, desc, comp_desc, ignore,
 560                         restore);
 561         if (ret)
 562                 return ret;
 563
 564         if (!(dep->flags & DWC3_EP_ENABLED)) {
 565                 struct dwc3_trb *trb_st_hw;
 566                 struct dwc3_trb *trb_link;
 567
 568                 dep->endpoint.desc = desc;
 569                 dep->comp_desc = comp_desc;
 570                 dep->type = usb_endpoint_type(desc);
 571                 dep->flags |= DWC3_EP_ENABLED;
 572
 573                 reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
 574                 reg |= DWC3_DALEPENA_EP(dep->number);
 575                 dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
 576
 577                 if (usb_endpoint_xfer_control(desc))
 578                         return 0;
 579
 580                 /* Initialize the TRB ring */
 581                 dep->trb_dequeue = 0;
 582                 dep->trb_enqueue = 0;
 583                 memset(dep->trb_pool, 0,
 584                        sizeof(struct dwc3_trb) * DWC3_TRB_NUM);
 585
 586                 /* Link TRB. The HWO bit is never reset */
 587                 trb_st_hw = &dep->trb_pool[0];
 588
 589                 trb_link = &dep->trb_pool[DWC3_TRB_NUM - 1];
 590                 trb_link->bpl = lower_32_bits(dwc3_trb_dma_offset(dep, trb_st_hw));
 591                 trb_link->bph = upper_32_bits(dwc3_trb_dma_offset(dep, trb_st_hw));
 592                 trb_link->ctrl |= DWC3_TRBCTL_LINK_TRB;
 593                 trb_link->ctrl |= DWC3_TRB_CTRL_HWO;
 594         }
 595
 596         return 0;
 597 }
 598
 599 static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force);
 600 static void dwc3_remove_requests(struct dwc3 *dwc, struct dwc3_ep *dep)
 601 {
 602         struct dwc3_request             *req;
 603         struct dwc3_trb                 *current_trb;
 604         unsigned                        transfer_in_flight;
 605
 606         if (dep->number > 1)
 607                 current_trb = &dep->trb_pool[dep->trb_enqueue];
 608         else
 609                 current_trb = &dwc->ep0_trb[dep->trb_enqueue];
 610         transfer_in_flight = current_trb->ctrl & DWC3_TRB_CTRL_HWO;
 611
 612         if (transfer_in_flight && !list_empty(&dep->started_list)) {
 613                 dwc3_stop_active_transfer(dwc, dep->number, true);
 614
 615                 /* - giveback all requests to gadget driver */
 616                 while (!list_empty(&dep->started_list)) {
 617                         req = next_request(&dep->started_list);
 618
 619                         dwc3_gadget_giveback(dep, req, -ESHUTDOWN);
 620                 }
 621         }
 622
 623         while (!list_empty(&dep->pending_list)) {
 624                 req = next_request(&dep->pending_list);
 625
 626                 dwc3_gadget_giveback(dep, req, -ESHUTDOWN);
 627         }
 628 }
 629
 630 /**
 631  * __dwc3_gadget_ep_disable - Disables a HW endpoint
 632  * @dep: the endpoint to disable
 633  *
 634  * This function also removes requests which are currently processed ny the
 635  * hardware and those which are not yet scheduled.
 636  * Caller should take care of locking.
 637  */
 638 static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep)
 639 {
 640         struct dwc3             *dwc = dep->dwc;
 641         u32                     reg;
 642
 643         dwc3_trace(trace_dwc3_gadget, "Disabling %s", dep->name);
 644
 645         dwc3_remove_requests(dwc, dep);
 646
 647         /* make sure HW endpoint isn't stalled */
 648         if (dep->flags & DWC3_EP_STALL)
 649                 __dwc3_gadget_ep_set_halt(dep, 0, false);
 650
 651         reg = dwc3_readl(dwc->regs, DWC3_DALEPENA);
 652         reg &= ~DWC3_DALEPENA_EP(dep->number);
 653         dwc3_writel(dwc->regs, DWC3_DALEPENA, reg);
 654
 655         dep->stream_capable = false;
 656         dep->endpoint.desc = NULL;
 657         dep->comp_desc = NULL;
 658         dep->type = 0;
 659         dep->flags = 0;
 660
 661         return 0;
 662 }
 663
 664 /* -------------------------------------------------------------------------- */
 665
 666 static int dwc3_gadget_ep0_enable(struct usb_ep *ep,
 667                 const struct usb_endpoint_descriptor *desc)
 668 {
 669         return -EINVAL;
 670 }
 671
 672 static int dwc3_gadget_ep0_disable(struct usb_ep *ep)
 673 {
 674         return -EINVAL;
 675 }
 676
 677 /* -------------------------------------------------------------------------- */
 678
 679 static int dwc3_gadget_ep_enable(struct usb_ep *ep,
 680                 const struct usb_endpoint_descriptor *desc)
 681 {
 682         struct dwc3_ep                  *dep;
 683         struct dwc3                     *dwc;
 684         unsigned long                   flags;
 685         int                             ret;
 686
 687         if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
 688                 pr_debug("dwc3: invalid parameters\n");
 689                 return -EINVAL;
 690         }
 691
 692         if (!desc->wMaxPacketSize) {
 693                 pr_debug("dwc3: missing wMaxPacketSize\n");
 694                 return -EINVAL;
 695         }
 696
 697         dep = to_dwc3_ep(ep);
 698         dwc = dep->dwc;
 699
 700         if (dev_WARN_ONCE(dwc->dev, dep->flags & DWC3_EP_ENABLED,
 701                                         "%s is already enabled\n",
 702                                         dep->name))
 703                 return 0;
 704
 705         spin_lock_irqsave(&dwc->lock, flags);
 706         ret = __dwc3_gadget_ep_enable(dep, desc, ep->comp_desc, false, false);
 707         spin_unlock_irqrestore(&dwc->lock, flags);
 708
 709         return ret;
 710 }
 711
 712 static int dwc3_gadget_ep_disable(struct usb_ep *ep)
 713 {
 714         struct dwc3_ep                  *dep;
 715         struct dwc3                     *dwc;
 716         unsigned long                   flags;
 717         int                             ret;
 718
 719         if (!ep) {
 720                 pr_debug("dwc3: invalid parameters\n");
 721                 return -EINVAL;
 722         }
 723
 724         dep = to_dwc3_ep(ep);
 725         dwc = dep->dwc;
 726
 727         if (dev_WARN_ONCE(dwc->dev, !(dep->flags & DWC3_EP_ENABLED),
 728                                         "%s is already disabled\n",
 729                                         dep->name))
 730                 return 0;
 731
 732         spin_lock_irqsave(&dwc->lock, flags);
 733         ret = __dwc3_gadget_ep_disable(dep);
 734         spin_unlock_irqrestore(&dwc->lock, flags);
 735
 736         return ret;
 737 }
 738
 739 static struct usb_request *dwc3_gadget_ep_alloc_request(struct usb_ep *ep,
 740         gfp_t gfp_flags)
 741 {
 742         struct dwc3_request             *req;
 743         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 744
 745         req = kzalloc(sizeof(*req), gfp_flags);
 746         if (!req)
 747                 return NULL;
 748
 749         req->epnum      = dep->number;
 750         req->dep        = dep;
 751
 752         dep->allocated_requests++;
 753
 754         trace_dwc3_alloc_request(req);
 755
 756         return &req->request;
 757 }
 758
 759 static void dwc3_gadget_ep_free_request(struct usb_ep *ep,
 760                 struct usb_request *request)
 761 {
 762         struct dwc3_request             *req = to_dwc3_request(request);
 763         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
 764
 765         dep->allocated_requests--;
 766         trace_dwc3_free_request(req);
 767         kfree(req);
 768 }
 769
 770 /**
 771  * dwc3_prepare_one_trb - setup one TRB from one request
 772  * @dep: endpoint for which this request is prepared
 773  * @req: dwc3_request pointer
 774  */
 775 static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
 776                 struct dwc3_request *req, dma_addr_t dma,
 777                 unsigned length, unsigned last, unsigned chain, unsigned node)
 778 {
 779         struct dwc3_trb         *trb;
 780
 781         dwc3_trace(trace_dwc3_gadget, "%s: req %p dma %08llx length %d%s%s",
 782                         dep->name, req, (unsigned long long) dma,
 783                         length, last ? " last" : "",
 784                         chain ? " chain" : "");
 785
 786
 787         trb = &dep->trb_pool[dep->trb_enqueue];
 788
 789         if (!req->trb) {
 790                 dwc3_gadget_move_started_request(req);
 791                 req->trb = trb;
 792                 req->trb_dma = dwc3_trb_dma_offset(dep, trb);
 793                 req->first_trb_index = dep->trb_enqueue;
 794         }
 795
 796         dwc3_ep_inc_enq(dep);
 797
 798         trb->size = DWC3_TRB_SIZE_LENGTH(length);
 799         trb->bpl = lower_32_bits(dma);
 800         trb->bph = upper_32_bits(dma);
 801
 802         switch (usb_endpoint_type(dep->endpoint.desc)) {
 803         case USB_ENDPOINT_XFER_CONTROL:
 804                 trb->ctrl = DWC3_TRBCTL_CONTROL_SETUP;
 805                 break;
 806
 807         case USB_ENDPOINT_XFER_ISOC:
 808                 if (!node)
 809                         trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS_FIRST;
 810                 else
 811                         trb->ctrl = DWC3_TRBCTL_ISOCHRONOUS;
 812
 813                 /* always enable Interrupt on Missed ISOC */
 814                 trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI;
 815                 break;
 816
 817         case USB_ENDPOINT_XFER_BULK:
 818         case USB_ENDPOINT_XFER_INT:
 819                 trb->ctrl = DWC3_TRBCTL_NORMAL;
 820                 break;
 821         default:
 822                 /*
 823                  * This is only possible with faulty memory because we
 824                  * checked it already :)
 825                  */
 826                 BUG();
 827         }
 828
 829         /* always enable Continue on Short Packet */
 830         trb->ctrl |= DWC3_TRB_CTRL_CSP;
 831
 832         if (!req->request.no_interrupt && !chain)
 833                 trb->ctrl |= DWC3_TRB_CTRL_IOC | DWC3_TRB_CTRL_ISP_IMI;
 834
 835         if (last)
 836                 trb->ctrl |= DWC3_TRB_CTRL_LST;
 837
 838         if (chain)
 839                 trb->ctrl |= DWC3_TRB_CTRL_CHN;
 840
 841         if (usb_endpoint_xfer_bulk(dep->endpoint.desc) && dep->stream_capable)
 842                 trb->ctrl |= DWC3_TRB_CTRL_SID_SOFN(req->request.stream_id);
 843
 844         trb->ctrl |= DWC3_TRB_CTRL_HWO;
 845
 846         dep->queued_requests++;
 847
 848         trace_dwc3_prepare_trb(dep, trb);
 849 }
 850
 851 /**
 852  * dwc3_ep_prev_trb() - Returns the previous TRB in the ring
 853  * @dep: The endpoint with the TRB ring
 854  * @index: The index of the current TRB in the ring
 855  *
 856  * Returns the TRB prior to the one pointed to by the index. If the
 857  * index is 0, we will wrap backwards, skip the link TRB, and return
 858  * the one just before that.
 859  */
 860 static struct dwc3_trb *dwc3_ep_prev_trb(struct dwc3_ep *dep, u8 index)
 861 {
 862         if (!index)
 863                 index = DWC3_TRB_NUM - 2;
 864         else
 865                 index = dep->trb_enqueue - 1;
 866
 867         return &dep->trb_pool[index];
 868 }
 869
 870 static u32 dwc3_calc_trbs_left(struct dwc3_ep *dep)
 871 {
 872         struct dwc3_trb         *tmp;
 873         u8                      trbs_left;
 874
 875         /*
 876          * If enqueue & dequeue are equal than it is either full or empty.
 877          *
 878          * One way to know for sure is if the TRB right before us has HWO bit
 879          * set or not. If it has, then we're definitely full and can't fit any
 880          * more transfers in our ring.
 881          */
 882         if (dep->trb_enqueue == dep->trb_dequeue) {
 883                 tmp = dwc3_ep_prev_trb(dep, dep->trb_enqueue);
 884                 if (tmp->ctrl & DWC3_TRB_CTRL_HWO)
 885                         return 0;
 886
 887                 return DWC3_TRB_NUM - 1;
 888         }
 889
 890         trbs_left = dep->trb_dequeue - dep->trb_enqueue;
 891         trbs_left &= (DWC3_TRB_NUM - 1);
 892
 893         if (dep->trb_dequeue < dep->trb_enqueue)
 894                 trbs_left--;
 895
 896         return trbs_left;
 897 }
 898
 899 static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep,
 900                 struct dwc3_request *req, unsigned int trbs_left)
 901 {
 902         struct usb_request *request = &req->request;
 903         struct scatterlist *sg = request->sg;
 904         struct scatterlist *s;
 905         unsigned int    last = false;
 906         unsigned int    length;
 907         dma_addr_t      dma;
 908         int             i;
 909
 910         for_each_sg(sg, s, request->num_mapped_sgs, i) {
 911                 unsigned chain = true;
 912
 913                 length = sg_dma_len(s);
 914                 dma = sg_dma_address(s);
 915
 916                 if (sg_is_last(s)) {
 917                         if (list_is_last(&req->list, &dep->pending_list))
 918                                 last = true;
 919
 920                         chain = false;
 921                 }
 922
 923                 if (!trbs_left)
 924                         last = true;
 925
 926                 if (last)
 927                         chain = false;
 928
 929                 dwc3_prepare_one_trb(dep, req, dma, length,
 930                                 last, chain, i);
 931
 932                 if (last)
 933                         break;
 934         }
 935 }
 936
 937 static void dwc3_prepare_one_trb_linear(struct dwc3_ep *dep,
 938                 struct dwc3_request *req, unsigned int trbs_left)
 939 {
 940         unsigned int    last = false;
 941         unsigned int    length;
 942         dma_addr_t      dma;
 943
 944         dma = req->request.dma;
 945         length = req->request.length;
 946
 947         if (!trbs_left)
 948                 last = true;
 949
 950         /* Is this the last request? */
 951         if (list_is_last(&req->list, &dep->pending_list))
 952                 last = true;
 953
 954         dwc3_prepare_one_trb(dep, req, dma, length,
 955                         last, false, 0);
 956 }
 957
 958 /*
 959  * dwc3_prepare_trbs - setup TRBs from requests
 960  * @dep: endpoint for which requests are being prepared
 961  *
 962  * The function goes through the requests list and sets up TRBs for the
 963  * transfers. The function returns once there are no more TRBs available or
 964  * it runs out of requests.
 965  */
 966 static void dwc3_prepare_trbs(struct dwc3_ep *dep)
 967 {
 968         struct dwc3_request     *req, *n;
 969         u32                     trbs_left;
 970
 971         BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM);
 972
 973         trbs_left = dwc3_calc_trbs_left(dep);
 974         if (!trbs_left)
 975                 return;
 976
 977         list_for_each_entry_safe(req, n, &dep->pending_list, list) {
 978                 if (req->request.num_mapped_sgs > 0)
 979                         dwc3_prepare_one_trb_sg(dep, req, trbs_left--);
 980                 else
 981                         dwc3_prepare_one_trb_linear(dep, req, trbs_left--);
 982
 983                 if (!trbs_left)
 984                         return;
 985         }
 986 }
 987
 988 static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param)
 989 {
 990         struct dwc3_gadget_ep_cmd_params params;
 991         struct dwc3_request             *req;
 992         struct dwc3                     *dwc = dep->dwc;
 993         int                             starting;
 994         int                             ret;
 995         u32                             cmd;
 996
 997         starting = !(dep->flags & DWC3_EP_BUSY);
 998
 999         dwc3_prepare_trbs(dep);
1000         req = next_request(&dep->started_list);
1001         if (!req) {
1002                 dep->flags |= DWC3_EP_PENDING_REQUEST;
1003                 return 0;
1004         }
1005
1006         memset(&params, 0, sizeof(params));
1007
1008         if (starting) {
1009                 params.param0 = upper_32_bits(req->trb_dma);
1010                 params.param1 = lower_32_bits(req->trb_dma);
1011                 cmd = DWC3_DEPCMD_STARTTRANSFER |
1012                         DWC3_DEPCMD_PARAM(cmd_param);
1013         } else {
1014                 cmd = DWC3_DEPCMD_UPDATETRANSFER |
1015                         DWC3_DEPCMD_PARAM(dep->resource_index);
1016         }
1017
1018         ret = dwc3_send_gadget_ep_cmd(dep, cmd, &params);
1019         if (ret < 0) {
1020                 /*
1021                  * FIXME we need to iterate over the list of requests
1022                  * here and stop, unmap, free and del each of the linked
1023                  * requests instead of what we do now.
1024                  */
1025                 usb_gadget_unmap_request(&dwc->gadget, &req->request,
1026                                 req->direction);
1027                 list_del(&req->list);
1028                 return ret;
1029         }
1030
1031         dep->flags |= DWC3_EP_BUSY;
1032
1033         if (starting) {
1034                 dep->resource_index = dwc3_gadget_ep_get_transfer_index(dep);
1035                 WARN_ON_ONCE(!dep->resource_index);
1036         }
1037
1038         return 0;
1039 }
1040
1041 static void __dwc3_gadget_start_isoc(struct dwc3 *dwc,
1042                 struct dwc3_ep *dep, u32 cur_uf)
1043 {
1044         u32 uf;
1045
1046         if (list_empty(&dep->pending_list)) {
1047                 dwc3_trace(trace_dwc3_gadget,
1048                                 "ISOC ep %s run out for requests",
1049                                 dep->name);
1050                 dep->flags |= DWC3_EP_PENDING_REQUEST;
1051                 return;
1052         }
1053
1054         /* 4 micro frames in the future */
1055         uf = cur_uf + dep->interval * 4;
1056
1057         __dwc3_gadget_kick_transfer(dep, uf);
1058 }
1059
1060 static void dwc3_gadget_start_isoc(struct dwc3 *dwc,
1061                 struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
1062 {
1063         u32 cur_uf, mask;
1064
1065         mask = ~(dep->interval - 1);
1066         cur_uf = event->parameters & mask;
1067
1068         __dwc3_gadget_start_isoc(dwc, dep, cur_uf);
1069 }
1070
1071 static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
1072 {
1073         struct dwc3             *dwc = dep->dwc;
1074         int                     ret;
1075
1076         if (!dep->endpoint.desc) {
1077                 dwc3_trace(trace_dwc3_gadget,
1078                                 "trying to queue request %p to disabled %s",
1079                                 &req->request, dep->endpoint.name);
1080                 return -ESHUTDOWN;
1081         }
1082
1083         if (WARN(req->dep != dep, "request %p belongs to '%s'\n",
1084                                 &req->request, req->dep->name)) {
1085                 dwc3_trace(trace_dwc3_gadget, "request %p belongs to '%s'",
1086                                 &req->request, req->dep->name);
1087                 return -EINVAL;
1088         }
1089
1090         pm_runtime_get(dwc->dev);
1091
1092         req->request.actual     = 0;
1093         req->request.status     = -EINPROGRESS;
1094         req->direction          = dep->direction;
1095         req->epnum              = dep->number;
1096
1097         trace_dwc3_ep_queue(req);
1098
1099         /*
1100          * We only add to our list of requests now and
1101          * start consuming the list once we get XferNotReady
1102          * IRQ.
1103          *
1104          * That way, we avoid doing anything that we don't need
1105          * to do now and defer it until the point we receive a
1106          * particular token from the Host side.
1107          *
1108          * This will also avoid Host cancelling URBs due to too
1109          * many NAKs.
1110          */
1111         ret = usb_gadget_map_request(&dwc->gadget, &req->request,
1112                         dep->direction);
1113         if (ret)
1114                 return ret;
1115
1116         list_add_tail(&req->list, &dep->pending_list);
1117
1118         /*
1119          * If there are no pending requests and the endpoint isn't already
1120          * busy, we will just start the request straight away.
1121          *
1122          * This will save one IRQ (XFER_NOT_READY) and possibly make it a
1123          * little bit faster.
1124          */
1125         if (!usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
1126                         !usb_endpoint_xfer_int(dep->endpoint.desc) &&
1127                         !(dep->flags & DWC3_EP_BUSY)) {
1128                 ret = __dwc3_gadget_kick_transfer(dep, 0);
1129                 goto out;
1130         }
1131
1132         /*
1133          * There are a few special cases:
1134          *
1135          * 1. XferNotReady with empty list of requests. We need to kick the
1136          *    transfer here in that situation, otherwise we will be NAKing
1137          *    forever. If we get XferNotReady before gadget driver has a
1138          *    chance to queue a request, we will ACK the IRQ but won't be
1139          *    able to receive the data until the next request is queued.
1140          *    The following code is handling exactly that.
1141          *
1142          */
1143         if (dep->flags & DWC3_EP_PENDING_REQUEST) {
1144                 /*
1145                  * If xfernotready is already elapsed and it is a case
1146                  * of isoc transfer, then issue END TRANSFER, so that
1147                  * you can receive xfernotready again and can have
1148                  * notion of current microframe.
1149                  */
1150                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
1151                         if (list_empty(&dep->started_list)) {
1152                                 dwc3_stop_active_transfer(dwc, dep->number, true);
1153                                 dep->flags = DWC3_EP_ENABLED;
1154                         }
1155                         return 0;
1156                 }
1157
1158                 ret = __dwc3_gadget_kick_transfer(dep, 0);
1159                 if (!ret)
1160                         dep->flags &= ~DWC3_EP_PENDING_REQUEST;
1161
1162                 goto out;
1163         }
1164
1165         /*
1166          * 2. XferInProgress on Isoc EP with an active transfer. We need to
1167          *    kick the transfer here after queuing a request, otherwise the
1168          *    core may not see the modified TRB(s).
1169          */
1170         if (usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
1171                         (dep->flags & DWC3_EP_BUSY) &&
1172                         !(dep->flags & DWC3_EP_MISSED_ISOC)) {
1173                 WARN_ON_ONCE(!dep->resource_index);
1174                 ret = __dwc3_gadget_kick_transfer(dep, dep->resource_index);
1175                 goto out;
1176         }
1177
1178         /*
1179          * 4. Stream Capable Bulk Endpoints. We need to start the transfer
1180          * right away, otherwise host will not know we have streams to be
1181          * handled.
1182          */
1183         if (dep->stream_capable)
1184                 ret = __dwc3_gadget_kick_transfer(dep, 0);
1185
1186 out:
1187         if (ret && ret != -EBUSY)
1188                 dwc3_trace(trace_dwc3_gadget,
1189                                 "%s: failed to kick transfers",
1190                                 dep->name);
1191         if (ret == -EBUSY)
1192                 ret = 0;
1193
1194         return ret;
1195 }
1196
1197 static void __dwc3_gadget_ep_zlp_complete(struct usb_ep *ep,
1198                 struct usb_request *request)
1199 {
1200         dwc3_gadget_ep_free_request(ep, request);
1201 }
1202
1203 static int __dwc3_gadget_ep_queue_zlp(struct dwc3 *dwc, struct dwc3_ep *dep)
1204 {
1205         struct dwc3_request             *req;
1206         struct usb_request              *request;
1207         struct usb_ep                   *ep = &dep->endpoint;
1208
1209         dwc3_trace(trace_dwc3_gadget, "queueing ZLP");
1210         request = dwc3_gadget_ep_alloc_request(ep, GFP_ATOMIC);
1211         if (!request)
1212                 return -ENOMEM;
1213
1214         request->length = 0;
1215         request->buf = dwc->zlp_buf;
1216         request->complete = __dwc3_gadget_ep_zlp_complete;
1217
1218         req = to_dwc3_request(request);
1219
1220         return __dwc3_gadget_ep_queue(dep, req);
1221 }
1222
1223 static int dwc3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
1224         gfp_t gfp_flags)
1225 {
1226         struct dwc3_request             *req = to_dwc3_request(request);
1227         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1228         struct dwc3                     *dwc = dep->dwc;
1229
1230         unsigned long                   flags;
1231
1232         int                             ret;
1233
1234         spin_lock_irqsave(&dwc->lock, flags);
1235         ret = __dwc3_gadget_ep_queue(dep, req);
1236
1237         /*
1238          * Okay, here's the thing, if gadget driver has requested for a ZLP by
1239          * setting request->zero, instead of doing magic, we will just queue an
1240          * extra usb_request ourselves so that it gets handled the same way as
1241          * any other request.
1242          */
1243         if (ret == 0 && request->zero && request->length &&
1244             (request->length % ep->maxpacket == 0))
1245                 ret = __dwc3_gadget_ep_queue_zlp(dwc, dep);
1246
1247         spin_unlock_irqrestore(&dwc->lock, flags);
1248
1249         return ret;
1250 }
1251
1252 static int dwc3_gadget_ep_dequeue(struct usb_ep *ep,
1253                 struct usb_request *request)
1254 {
1255         struct dwc3_request             *req = to_dwc3_request(request);
1256         struct dwc3_request             *r = NULL;
1257
1258         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1259         struct dwc3                     *dwc = dep->dwc;
1260
1261         unsigned long                   flags;
1262         int                             ret = 0;
1263
1264         trace_dwc3_ep_dequeue(req);
1265
1266         spin_lock_irqsave(&dwc->lock, flags);
1267
1268         list_for_each_entry(r, &dep->pending_list, list) {
1269                 if (r == req)
1270                         break;
1271         }
1272
1273         if (r != req) {
1274                 list_for_each_entry(r, &dep->started_list, list) {
1275                         if (r == req)
1276                                 break;
1277                 }
1278                 if (r == req) {
1279                         /* wait until it is processed */
1280                         dwc3_stop_active_transfer(dwc, dep->number, true);
1281                         goto out1;
1282                 }
1283                 dev_err(dwc->dev, "request %p was not queued to %s\n",
1284                                 request, ep->name);
1285                 ret = -EINVAL;
1286                 goto out0;
1287         }
1288
1289 out1:
1290         /* giveback the request */
1291         dwc3_gadget_giveback(dep, req, -ECONNRESET);
1292
1293 out0:
1294         spin_unlock_irqrestore(&dwc->lock, flags);
1295
1296         return ret;
1297 }
1298
1299 int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol)
1300 {
1301         struct dwc3_gadget_ep_cmd_params        params;
1302         struct dwc3                             *dwc = dep->dwc;
1303         int                                     ret;
1304
1305         if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
1306                 dev_err(dwc->dev, "%s is of Isochronous type\n", dep->name);
1307                 return -EINVAL;
1308         }
1309
1310         memset(&params, 0x00, sizeof(params));
1311
1312         if (value) {
1313                 struct dwc3_trb *trb;
1314
1315                 unsigned transfer_in_flight;
1316                 unsigned started;
1317
1318                 if (dep->number > 1)
1319                         trb = dwc3_ep_prev_trb(dep, dep->trb_enqueue);
1320                 else
1321                         trb = &dwc->ep0_trb[dep->trb_enqueue];
1322
1323                 transfer_in_flight = trb->ctrl & DWC3_TRB_CTRL_HWO;
1324                 started = !list_empty(&dep->started_list);
1325
1326                 if (!protocol && ((dep->direction && transfer_in_flight) ||
1327                                 (!dep->direction && started))) {
1328                         dwc3_trace(trace_dwc3_gadget,
1329                                         "%s: pending request, cannot halt",
1330                                         dep->name);
1331                         return -EAGAIN;
1332                 }
1333
1334                 ret = dwc3_send_gadget_ep_cmd(dep, DWC3_DEPCMD_SETSTALL,
1335                                 &params);
1336                 if (ret)
1337                         dev_err(dwc->dev, "failed to set STALL on %s\n",
1338                                         dep->name);
1339                 else
1340                         dep->flags |= DWC3_EP_STALL;
1341         } else {
1342
1343                 ret = dwc3_send_clear_stall_ep_cmd(dep);
1344                 if (ret)
1345                         dev_err(dwc->dev, "failed to clear STALL on %s\n",
1346                                         dep->name);
1347                 else
1348                         dep->flags &= ~(DWC3_EP_STALL | DWC3_EP_WEDGE);
1349         }
1350
1351         return ret;
1352 }
1353
1354 static int dwc3_gadget_ep_set_halt(struct usb_ep *ep, int value)
1355 {
1356         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1357         struct dwc3                     *dwc = dep->dwc;
1358
1359         unsigned long                   flags;
1360
1361         int                             ret;
1362
1363         spin_lock_irqsave(&dwc->lock, flags);
1364         ret = __dwc3_gadget_ep_set_halt(dep, value, false);
1365         spin_unlock_irqrestore(&dwc->lock, flags);
1366
1367         return ret;
1368 }
1369
1370 static int dwc3_gadget_ep_set_wedge(struct usb_ep *ep)
1371 {
1372         struct dwc3_ep                  *dep = to_dwc3_ep(ep);
1373         struct dwc3                     *dwc = dep->dwc;
1374         unsigned long                   flags;
1375         int                             ret;
1376
1377         spin_lock_irqsave(&dwc->lock, flags);
1378         dep->flags |= DWC3_EP_WEDGE;
1379
1380         if (dep->number == 0 || dep->number == 1)
1381                 ret = __dwc3_gadget_ep0_set_halt(ep, 1);
1382         else
1383                 ret = __dwc3_gadget_ep_set_halt(dep, 1, false);
1384         spin_unlock_irqrestore(&dwc->lock, flags);
1385
1386         return ret;
1387 }
1388
1389 /* -------------------------------------------------------------------------- */
1390
1391 static struct usb_endpoint_descriptor dwc3_gadget_ep0_desc = {
1392         .bLength        = USB_DT_ENDPOINT_SIZE,
1393         .bDescriptorType = USB_DT_ENDPOINT,
1394         .bmAttributes   = USB_ENDPOINT_XFER_CONTROL,
1395 };
1396
1397 static const struct usb_ep_ops dwc3_gadget_ep0_ops = {
1398         .enable         = dwc3_gadget_ep0_enable,
1399         .disable        = dwc3_gadget_ep0_disable,
1400         .alloc_request  = dwc3_gadget_ep_alloc_request,
1401         .free_request   = dwc3_gadget_ep_free_request,
1402         .queue          = dwc3_gadget_ep0_queue,
1403         .dequeue        = dwc3_gadget_ep_dequeue,
1404         .set_halt       = dwc3_gadget_ep0_set_halt,
1405         .set_wedge      = dwc3_gadget_ep_set_wedge,
1406 };
1407
1408 static const struct usb_ep_ops dwc3_gadget_ep_ops = {
1409         .enable         = dwc3_gadget_ep_enable,
1410         .disable        = dwc3_gadget_ep_disable,
1411         .alloc_request  = dwc3_gadget_ep_alloc_request,
1412         .free_request   = dwc3_gadget_ep_free_request,
1413         .queue          = dwc3_gadget_ep_queue,
1414         .dequeue        = dwc3_gadget_ep_dequeue,
1415         .set_halt       = dwc3_gadget_ep_set_halt,
1416         .set_wedge      = dwc3_gadget_ep_set_wedge,
1417 };
1418
1419 /* -------------------------------------------------------------------------- */
1420
1421 static int dwc3_gadget_get_frame(struct usb_gadget *g)
1422 {
1423         struct dwc3             *dwc = gadget_to_dwc(g);
1424         u32                     reg;
1425
1426         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1427         return DWC3_DSTS_SOFFN(reg);
1428 }
1429
1430 static int __dwc3_gadget_wakeup(struct dwc3 *dwc)
1431 {
1432         unsigned long           timeout;
1433
1434         int                     ret;
1435         u32                     reg;
1436
1437         u8                      link_state;
1438         u8                      speed;
1439
1440         /*
1441          * According to the Databook Remote wakeup request should
1442          * be issued only when the device is in early suspend state.
1443          *
1444          * We can check that via USB Link State bits in DSTS register.
1445          */
1446         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1447
1448         speed = reg & DWC3_DSTS_CONNECTSPD;
1449         if ((speed == DWC3_DSTS_SUPERSPEED) ||
1450             (speed == DWC3_DSTS_SUPERSPEED_PLUS)) {
1451                 dwc3_trace(trace_dwc3_gadget, "no wakeup on SuperSpeed");
1452                 return 0;
1453         }
1454
1455         link_state = DWC3_DSTS_USBLNKST(reg);
1456
1457         switch (link_state) {
1458         case DWC3_LINK_STATE_RX_DET:    /* in HS, means Early Suspend */
1459         case DWC3_LINK_STATE_U3:        /* in HS, means SUSPEND */
1460                 break;
1461         default:
1462                 dwc3_trace(trace_dwc3_gadget,
1463                                 "can't wakeup from '%s'",
1464                                 dwc3_gadget_link_string(link_state));
1465                 return -EINVAL;
1466         }
1467
1468         ret = dwc3_gadget_set_link_state(dwc, DWC3_LINK_STATE_RECOV);
1469         if (ret < 0) {
1470                 dev_err(dwc->dev, "failed to put link in Recovery\n");
1471                 return ret;
1472         }
1473
1474         /* Recent versions do this automatically */
1475         if (dwc->revision < DWC3_REVISION_194A) {
1476                 /* write zeroes to Link Change Request */
1477                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1478                 reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
1479                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1480         }
1481
1482         /* poll until Link State changes to ON */
1483         timeout = jiffies + msecs_to_jiffies(100);
1484
1485         while (!time_after(jiffies, timeout)) {
1486                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1487
1488                 /* in HS, means ON */
1489                 if (DWC3_DSTS_USBLNKST(reg) == DWC3_LINK_STATE_U0)
1490                         break;
1491         }
1492
1493         if (DWC3_DSTS_USBLNKST(reg) != DWC3_LINK_STATE_U0) {
1494                 dev_err(dwc->dev, "failed to send remote wakeup\n");
1495                 return -EINVAL;
1496         }
1497
1498         return 0;
1499 }
1500
1501 static int dwc3_gadget_wakeup(struct usb_gadget *g)
1502 {
1503         struct dwc3             *dwc = gadget_to_dwc(g);
1504         unsigned long           flags;
1505         int                     ret;
1506
1507         spin_lock_irqsave(&dwc->lock, flags);
1508         ret = __dwc3_gadget_wakeup(dwc);
1509         spin_unlock_irqrestore(&dwc->lock, flags);
1510
1511         return ret;
1512 }
1513
1514 static int dwc3_gadget_set_selfpowered(struct usb_gadget *g,
1515                 int is_selfpowered)
1516 {
1517         struct dwc3             *dwc = gadget_to_dwc(g);
1518         unsigned long           flags;
1519
1520         spin_lock_irqsave(&dwc->lock, flags);
1521         g->is_selfpowered = !!is_selfpowered;
1522         spin_unlock_irqrestore(&dwc->lock, flags);
1523
1524         return 0;
1525 }
1526
1527 static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend)
1528 {
1529         u32                     reg;
1530         u32                     timeout = 500;
1531
1532         if (pm_runtime_suspended(dwc->dev))
1533                 return 0;
1534
1535         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
1536         if (is_on) {
1537                 if (dwc->revision <= DWC3_REVISION_187A) {
1538                         reg &= ~DWC3_DCTL_TRGTULST_MASK;
1539                         reg |= DWC3_DCTL_TRGTULST_RX_DET;
1540                 }
1541
1542                 if (dwc->revision >= DWC3_REVISION_194A)
1543                         reg &= ~DWC3_DCTL_KEEP_CONNECT;
1544                 reg |= DWC3_DCTL_RUN_STOP;
1545
1546                 if (dwc->has_hibernation)
1547                         reg |= DWC3_DCTL_KEEP_CONNECT;
1548
1549                 dwc->pullups_connected = true;
1550         } else {
1551                 reg &= ~DWC3_DCTL_RUN_STOP;
1552
1553                 if (dwc->has_hibernation && !suspend)
1554                         reg &= ~DWC3_DCTL_KEEP_CONNECT;
1555
1556                 dwc->pullups_connected = false;
1557         }
1558
1559         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
1560
1561         do {
1562                 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
1563                 if (is_on) {
1564                         if (!(reg & DWC3_DSTS_DEVCTRLHLT))
1565                                 break;
1566                 } else {
1567                         if (reg & DWC3_DSTS_DEVCTRLHLT)
1568                                 break;
1569                 }
1570                 timeout--;
1571                 if (!timeout)
1572                         return -ETIMEDOUT;
1573                 udelay(1);
1574         } while (1);
1575
1576         dwc3_trace(trace_dwc3_gadget, "gadget %s data soft-%s",
1577                         dwc->gadget_driver
1578                         ? dwc->gadget_driver->function : "no-function",
1579                         is_on ? "connect" : "disconnect");
1580
1581         return 0;
1582 }
1583
1584 static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
1585 {
1586         struct dwc3             *dwc = gadget_to_dwc(g);
1587         unsigned long           flags;
1588         int                     ret;
1589
1590         is_on = !!is_on;
1591
1592         spin_lock_irqsave(&dwc->lock, flags);
1593         ret = dwc3_gadget_run_stop(dwc, is_on, false);
1594         spin_unlock_irqrestore(&dwc->lock, flags);
1595
1596         return ret;
1597 }
1598
1599 static void dwc3_gadget_enable_irq(struct dwc3 *dwc)
1600 {
1601         u32                     reg;
1602
1603         /* Enable all but Start and End of Frame IRQs */
1604         reg = (DWC3_DEVTEN_VNDRDEVTSTRCVEDEN |
1605                         DWC3_DEVTEN_EVNTOVERFLOWEN |
1606                         DWC3_DEVTEN_CMDCMPLTEN |
1607                         DWC3_DEVTEN_ERRTICERREN |
1608                         DWC3_DEVTEN_WKUPEVTEN |
1609                         DWC3_DEVTEN_ULSTCNGEN |
1610                         DWC3_DEVTEN_CONNECTDONEEN |
1611                         DWC3_DEVTEN_USBRSTEN |
1612                         DWC3_DEVTEN_DISCONNEVTEN);
1613
1614         dwc3_writel(dwc->regs, DWC3_DEVTEN, reg);
1615 }
1616
1617 static void dwc3_gadget_disable_irq(struct dwc3 *dwc)
1618 {
1619         /* mask all interrupts */
1620         dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00);
1621 }
1622
1623 static irqreturn_t dwc3_interrupt(int irq, void *_dwc);
1624 static irqreturn_t dwc3_thread_interrupt(int irq, void *_dwc);
1625
1626 /**
1627  * dwc3_gadget_setup_nump - Calculate and initialize NUMP field of DCFG
1628  * dwc: pointer to our context structure
1629  *
1630  * The following looks like complex but it's actually very simple. In order to
1631  * calculate the number of packets we can burst at once on OUT transfers, we're
1632  * gonna use RxFIFO size.
1633  *
1634  * To calculate RxFIFO size we need two numbers:
1635  * MDWIDTH = size, in bits, of the internal memory bus
1636  * RAM2_DEPTH = depth, in MDWIDTH, of internal RAM2 (where RxFIFO sits)
1637  *
1638  * Given these two numbers, the formula is simple:
1639  *
1640  * RxFIFO Size = (RAM2_DEPTH * MDWIDTH / 8) - 24 - 16;
1641  *
1642  * 24 bytes is for 3x SETUP packets
1643  * 16 bytes is a clock domain crossing tolerance
1644  *
1645  * Given RxFIFO Size, NUMP = RxFIFOSize / 1024;
1646  */
1647 static void dwc3_gadget_setup_nump(struct dwc3 *dwc)
1648 {
1649         u32 ram2_depth;
1650         u32 mdwidth;
1651         u32 nump;
1652         u32 reg;
1653
1654         ram2_depth = DWC3_GHWPARAMS7_RAM2_DEPTH(dwc->hwparams.hwparams7);
1655         mdwidth = DWC3_GHWPARAMS0_MDWIDTH(dwc->hwparams.hwparams0);
1656
1657         nump = ((ram2_depth * mdwidth / 8) - 24 - 16) / 1024;
1658         nump = min_t(u32, nump, 16);
1659
1660         /* update NumP */
1661         reg = dwc3_readl(dwc->regs, DWC3_DCFG);
1662         reg &= ~DWC3_DCFG_NUMP_MASK;
1663         reg |= nump << DWC3_DCFG_NUMP_SHIFT;
1664         dwc3_writel(dwc->regs, DWC3_DCFG, reg);
1665 }
1666
1667 static int __dwc3_gadget_start(struct dwc3 *dwc)
1668 {
1669         struct dwc3_ep          *dep;
1670         int                     ret = 0;
1671         u32                     reg;
1672
1673         reg = dwc3_readl(dwc->regs, DWC3_DCFG);
1674         reg &= ~(DWC3_DCFG_SPEED_MASK);
1675
1676         /**
1677          * WORKAROUND: DWC3 revision < 2.20a have an issue
1678          * which would cause metastability state on Run/Stop
1679          * bit if we try to force the IP to USB2-only mode.
1680          *
1681          * Because of that, we cannot configure the IP to any
1682          * speed other than the SuperSpeed
1683          *
1684          * Refers to:
1685          *
1686          * STAR#9000525659: Clock Domain Crossing on DCTL in
1687          * USB 2.0 Mode
1688          */
1689         if (dwc->revision < DWC3_REVISION_220A) {
1690                 reg |= DWC3_DCFG_SUPERSPEED;
1691         } else {
1692                 switch (dwc->maximum_speed) {
1693                 case USB_SPEED_LOW:
1694                         reg |= DWC3_DCFG_LOWSPEED;
1695                         break;
1696                 case USB_SPEED_FULL:
1697                         reg |= DWC3_DCFG_FULLSPEED1;
1698                         break;
1699                 case USB_SPEED_HIGH:
1700                         reg |= DWC3_DCFG_HIGHSPEED;
1701                         break;
1702                 case USB_SPEED_SUPER_PLUS:
1703                         reg |= DWC3_DCFG_SUPERSPEED_PLUS;
1704                         break;
1705                 default:
1706                         dev_err(dwc->dev, "invalid dwc->maximum_speed (%d)\n",
1707                                 dwc->maximum_speed);
1708                         /* fall through */
1709                 case USB_SPEED_SUPER:
1710                         reg |= DWC3_DCFG_SUPERSPEED;
1711                         break;
1712                 }
1713         }
1714         dwc3_writel(dwc->regs, DWC3_DCFG, reg);
1715
1716         /*
1717          * We are telling dwc3 that we want to use DCFG.NUMP as ACK TP's NUMP
1718          * field instead of letting dwc3 itself calculate that automatically.
1719          *
1720          * This way, we maximize the chances that we'll be able to get several
1721          * bursts of data without going through any sort of endpoint throttling.
1722          */
1723         reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG);
1724         reg &= ~DWC3_GRXTHRCFG_PKTCNTSEL;
1725         dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg);
1726
1727         dwc3_gadget_setup_nump(dwc);
1728
1729         /* Start with SuperSpeed Default */
1730         dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
1731
1732         dep = dwc->eps[0];
1733         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false,
1734                         false);
1735         if (ret) {
1736                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1737                 goto err0;
1738         }
1739
1740         dep = dwc->eps[1];
1741         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false,
1742                         false);
1743         if (ret) {
1744                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
1745                 goto err1;
1746         }
1747
1748         /* begin to receive SETUP packets */
1749         dwc->ep0state = EP0_SETUP_PHASE;
1750         dwc3_ep0_out_start(dwc);
1751
1752         dwc3_gadget_enable_irq(dwc);
1753
1754         return 0;
1755
1756 err1:
1757         __dwc3_gadget_ep_disable(dwc->eps[0]);
1758
1759 err0:
1760         return ret;
1761 }
1762
1763 static int dwc3_gadget_start(struct usb_gadget *g,
1764                 struct usb_gadget_driver *driver)
1765 {
1766         struct dwc3             *dwc = gadget_to_dwc(g);
1767         unsigned long           flags;
1768         int                     ret = 0;
1769         int                     irq;
1770
1771         irq = platform_get_irq(to_platform_device(dwc->dev), 0);
1772         ret = request_threaded_irq(irq, dwc3_interrupt, dwc3_thread_interrupt,
1773                         IRQF_SHARED, "dwc3", dwc->ev_buf);
1774         if (ret) {
1775                 dev_err(dwc->dev, "failed to request irq #%d --> %d\n",
1776                                 irq, ret);
1777                 goto err0;
1778         }
1779         dwc->irq_gadget = irq;
1780
1781         spin_lock_irqsave(&dwc->lock, flags);
1782         if (dwc->gadget_driver) {
1783                 dev_err(dwc->dev, "%s is already bound to %s\n",
1784                                 dwc->gadget.name,
1785                                 dwc->gadget_driver->driver.name);
1786                 ret = -EBUSY;
1787                 goto err1;
1788         }
1789
1790         dwc->gadget_driver      = driver;
1791
1792         if (pm_runtime_active(dwc->dev))
1793                 __dwc3_gadget_start(dwc);
1794
1795         spin_unlock_irqrestore(&dwc->lock, flags);
1796
1797         return 0;
1798
1799 err1:
1800         spin_unlock_irqrestore(&dwc->lock, flags);
1801         free_irq(irq, dwc);
1802
1803 err0:
1804         return ret;
1805 }
1806
1807 static void __dwc3_gadget_stop(struct dwc3 *dwc)
1808 {
1809         dwc3_gadget_disable_irq(dwc);
1810         __dwc3_gadget_ep_disable(dwc->eps[0]);
1811         __dwc3_gadget_ep_disable(dwc->eps[1]);
1812 }
1813
1814 static int dwc3_gadget_stop(struct usb_gadget *g)
1815 {
1816         struct dwc3             *dwc = gadget_to_dwc(g);
1817         unsigned long           flags;
1818
1819         spin_lock_irqsave(&dwc->lock, flags);
1820         __dwc3_gadget_stop(dwc);
1821         dwc->gadget_driver      = NULL;
1822         spin_unlock_irqrestore(&dwc->lock, flags);
1823
1824         free_irq(dwc->irq_gadget, dwc->ev_buf);
1825
1826         return 0;
1827 }
1828
1829 static const struct usb_gadget_ops dwc3_gadget_ops = {
1830         .get_frame              = dwc3_gadget_get_frame,
1831         .wakeup                 = dwc3_gadget_wakeup,
1832         .set_selfpowered        = dwc3_gadget_set_selfpowered,
1833         .pullup                 = dwc3_gadget_pullup,
1834         .udc_start              = dwc3_gadget_start,
1835         .udc_stop               = dwc3_gadget_stop,
1836 };
1837
1838 /* -------------------------------------------------------------------------- */
1839
1840 static int dwc3_gadget_init_hw_endpoints(struct dwc3 *dwc,
1841                 u8 num, u32 direction)
1842 {
1843         struct dwc3_ep                  *dep;
1844         u8                              i;
1845
1846         for (i = 0; i < num; i++) {
1847                 u8 epnum = (i << 1) | (direction ? 1 : 0);
1848
1849                 dep = kzalloc(sizeof(*dep), GFP_KERNEL);
1850                 if (!dep)
1851                         return -ENOMEM;
1852
1853                 dep->dwc = dwc;
1854                 dep->number = epnum;
1855                 dep->direction = !!direction;
1856                 dep->regs = dwc->regs + DWC3_DEP_BASE(epnum);
1857                 dwc->eps[epnum] = dep;
1858
1859                 snprintf(dep->name, sizeof(dep->name), "ep%d%s", epnum >> 1,
1860                                 (epnum & 1) ? "in" : "out");
1861
1862                 dep->endpoint.name = dep->name;
1863                 spin_lock_init(&dep->lock);
1864
1865                 dwc3_trace(trace_dwc3_gadget, "initializing %s", dep->name);
1866
1867                 if (epnum == 0 || epnum == 1) {
1868                         usb_ep_set_maxpacket_limit(&dep->endpoint, 512);
1869                         dep->endpoint.maxburst = 1;
1870                         dep->endpoint.ops = &dwc3_gadget_ep0_ops;
1871                         if (!epnum)
1872                                 dwc->gadget.ep0 = &dep->endpoint;
1873                 } else {
1874                         int             ret;
1875
1876                         usb_ep_set_maxpacket_limit(&dep->endpoint, 1024);
1877                         dep->endpoint.max_streams = 15;
1878                         dep->endpoint.ops = &dwc3_gadget_ep_ops;
1879                         list_add_tail(&dep->endpoint.ep_list,
1880                                         &dwc->gadget.ep_list);
1881
1882                         ret = dwc3_alloc_trb_pool(dep);
1883                         if (ret)
1884                                 return ret;
1885                 }
1886
1887                 if (epnum == 0 || epnum == 1) {
1888                         dep->endpoint.caps.type_control = true;
1889                 } else {
1890                         dep->endpoint.caps.type_iso = true;
1891                         dep->endpoint.caps.type_bulk = true;
1892                         dep->endpoint.caps.type_int = true;
1893                 }
1894
1895                 dep->endpoint.caps.dir_in = !!direction;
1896                 dep->endpoint.caps.dir_out = !direction;
1897
1898                 INIT_LIST_HEAD(&dep->pending_list);
1899                 INIT_LIST_HEAD(&dep->started_list);
1900         }
1901
1902         return 0;
1903 }
1904
1905 static int dwc3_gadget_init_endpoints(struct dwc3 *dwc)
1906 {
1907         int                             ret;
1908
1909         INIT_LIST_HEAD(&dwc->gadget.ep_list);
1910
1911         ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_out_eps, 0);
1912         if (ret < 0) {
1913                 dwc3_trace(trace_dwc3_gadget,
1914                                 "failed to allocate OUT endpoints");
1915                 return ret;
1916         }
1917
1918         ret = dwc3_gadget_init_hw_endpoints(dwc, dwc->num_in_eps, 1);
1919         if (ret < 0) {
1920                 dwc3_trace(trace_dwc3_gadget,
1921                                 "failed to allocate IN endpoints");
1922                 return ret;
1923         }
1924
1925         return 0;
1926 }
1927
1928 static void dwc3_gadget_free_endpoints(struct dwc3 *dwc)
1929 {
1930         struct dwc3_ep                  *dep;
1931         u8                              epnum;
1932
1933         for (epnum = 0; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
1934                 dep = dwc->eps[epnum];
1935                 if (!dep)
1936                         continue;
1937                 /*
1938                  * Physical endpoints 0 and 1 are special; they form the
1939                  * bi-directional USB endpoint 0.
1940                  *
1941                  * For those two physical endpoints, we don't allocate a TRB
1942                  * pool nor do we add them the endpoints list. Due to that, we
1943                  * shouldn't do these two operations otherwise we would end up
1944                  * with all sorts of bugs when removing dwc3.ko.
1945                  */
1946                 if (epnum != 0 && epnum != 1) {
1947                         dwc3_free_trb_pool(dep);
1948                         list_del(&dep->endpoint.ep_list);
1949                 }
1950
1951                 kfree(dep);
1952         }
1953 }
1954
1955 /* -------------------------------------------------------------------------- */
1956
1957 static int __dwc3_cleanup_done_trbs(struct dwc3 *dwc, struct dwc3_ep *dep,
1958                 struct dwc3_request *req, struct dwc3_trb *trb,
1959                 const struct dwc3_event_depevt *event, int status)
1960 {
1961         unsigned int            count;
1962         unsigned int            s_pkt = 0;
1963         unsigned int            trb_status;
1964
1965         dep->queued_requests--;
1966         trace_dwc3_complete_trb(dep, trb);
1967
1968         if ((trb->ctrl & DWC3_TRB_CTRL_HWO) && status != -ESHUTDOWN)
1969                 /*
1970                  * We continue despite the error. There is not much we
1971                  * can do. If we don't clean it up we loop forever. If
1972                  * we skip the TRB then it gets overwritten after a
1973                  * while since we use them in a ring buffer. A BUG()
1974                  * would help. Lets hope that if this occurs, someone
1975                  * fixes the root cause instead of looking away :)
1976                  */
1977                 dev_err(dwc->dev, "%s's TRB (%p) still owned by HW\n",
1978                                 dep->name, trb);
1979         count = trb->size & DWC3_TRB_SIZE_MASK;
1980
1981         if (dep->direction) {
1982                 if (count) {
1983                         trb_status = DWC3_TRB_SIZE_TRBSTS(trb->size);
1984                         if (trb_status == DWC3_TRBSTS_MISSED_ISOC) {
1985                                 dwc3_trace(trace_dwc3_gadget,
1986                                                 "%s: incomplete IN transfer",
1987                                                 dep->name);
1988                                 /*
1989                                  * If missed isoc occurred and there is
1990                                  * no request queued then issue END
1991                                  * TRANSFER, so that core generates
1992                                  * next xfernotready and we will issue
1993                                  * a fresh START TRANSFER.
1994                                  * If there are still queued request
1995                                  * then wait, do not issue either END
1996                                  * or UPDATE TRANSFER, just attach next
1997                                  * request in pending_list during
1998                                  * giveback.If any future queued request
1999                                  * is successfully transferred then we
2000                                  * will issue UPDATE TRANSFER for all
2001                                  * request in the pending_list.
2002                                  */
2003                                 dep->flags |= DWC3_EP_MISSED_ISOC;
2004                         } else {
2005                                 dev_err(dwc->dev, "incomplete IN transfer %s\n",
2006                                                 dep->name);
2007                                 status = -ECONNRESET;
2008                         }
2009                 } else {
2010                         dep->flags &= ~DWC3_EP_MISSED_ISOC;
2011                 }
2012         } else {
2013                 if (count && (event->status & DEPEVT_STATUS_SHORT))
2014                         s_pkt = 1;
2015         }
2016
2017         /*
2018          * We assume here we will always receive the entire data block
2019          * which we should receive. Meaning, if we program RX to
2020          * receive 4K but we receive only 2K, we assume that's all we
2021          * should receive and we simply bounce the request back to the
2022          * gadget driver for further processing.
2023          */
2024         req->request.actual += req->request.length - count;
2025         if (s_pkt)
2026                 return 1;
2027         if ((event->status & DEPEVT_STATUS_LST) &&
2028                         (trb->ctrl & (DWC3_TRB_CTRL_LST |
2029                                 DWC3_TRB_CTRL_HWO)))
2030                 return 1;
2031         if ((event->status & DEPEVT_STATUS_IOC) &&
2032                         (trb->ctrl & DWC3_TRB_CTRL_IOC))
2033                 return 1;
2034         return 0;
2035 }
2036
2037 static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
2038                 const struct dwc3_event_depevt *event, int status)
2039 {
2040         struct dwc3_request     *req;
2041         struct dwc3_trb         *trb;
2042         unsigned int            slot;
2043         unsigned int            i;
2044         int                     ret;
2045
2046         do {
2047                 req = next_request(&dep->started_list);
2048                 if (WARN_ON_ONCE(!req))
2049                         return 1;
2050
2051                 i = 0;
2052                 do {
2053                         slot = req->first_trb_index + i;
2054                         if (slot == DWC3_TRB_NUM - 1)
2055                                 slot++;
2056                         slot %= DWC3_TRB_NUM;
2057                         trb = &dep->trb_pool[slot];
2058
2059                         ret = __dwc3_cleanup_done_trbs(dwc, dep, req, trb,
2060                                         event, status);
2061                         if (ret)
2062                                 break;
2063                 } while (++i < req->request.num_mapped_sgs);
2064
2065                 dwc3_gadget_giveback(dep, req, status);
2066
2067                 if (ret)
2068                         break;
2069         } while (1);
2070
2071         /*
2072          * Our endpoint might get disabled by another thread during
2073          * dwc3_gadget_giveback(). If that happens, we're just gonna return 1
2074          * early on so DWC3_EP_BUSY flag gets cleared
2075          */
2076         if (!dep->endpoint.desc)
2077                 return 1;
2078
2079         if (usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
2080                         list_empty(&dep->started_list)) {
2081                 if (list_empty(&dep->pending_list)) {
2082                         /*
2083                          * If there is no entry in request list then do
2084                          * not issue END TRANSFER now. Just set PENDING
2085                          * flag, so that END TRANSFER is issued when an
2086                          * entry is added into request list.
2087                          */
2088                         dep->flags = DWC3_EP_PENDING_REQUEST;
2089                 } else {
2090                         dwc3_stop_active_transfer(dwc, dep->number, true);
2091                         dep->flags = DWC3_EP_ENABLED;
2092                 }
2093                 return 1;
2094         }
2095
2096         if (usb_endpoint_xfer_isoc(dep->endpoint.desc))
2097                 if ((event->status & DEPEVT_STATUS_IOC) &&
2098                                 (trb->ctrl & DWC3_TRB_CTRL_IOC))
2099                         return 0;
2100         return 1;
2101 }
2102
2103 static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
2104                 struct dwc3_ep *dep, const struct dwc3_event_depevt *event)
2105 {
2106         unsigned                status = 0;
2107         int                     clean_busy;
2108         u32                     is_xfer_complete;
2109
2110         is_xfer_complete = (event->endpoint_event == DWC3_DEPEVT_XFERCOMPLETE);
2111
2112         if (event->status & DEPEVT_STATUS_BUSERR)
2113                 status = -ECONNRESET;
2114
2115         clean_busy = dwc3_cleanup_done_reqs(dwc, dep, event, status);
2116         if (clean_busy && (!dep->endpoint.desc || is_xfer_complete ||
2117                                 usb_endpoint_xfer_isoc(dep->endpoint.desc)))
2118                 dep->flags &= ~DWC3_EP_BUSY;
2119
2120         /*
2121          * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround.
2122          * See dwc3_gadget_linksts_change_interrupt() for 1st half.
2123          */
2124         if (dwc->revision < DWC3_REVISION_183A) {
2125                 u32             reg;
2126                 int             i;
2127
2128                 for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) {
2129                         dep = dwc->eps[i];
2130
2131                         if (!(dep->flags & DWC3_EP_ENABLED))
2132                                 continue;
2133
2134                         if (!list_empty(&dep->started_list))
2135                                 return;
2136                 }
2137
2138                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2139                 reg |= dwc->u1u2;
2140                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2141
2142                 dwc->u1u2 = 0;
2143         }
2144
2145         /*
2146          * Our endpoint might get disabled by another thread during
2147          * dwc3_gadget_giveback(). If that happens, we're just gonna return 1
2148          * early on so DWC3_EP_BUSY flag gets cleared
2149          */
2150         if (!dep->endpoint.desc)
2151                 return;
2152
2153         if (!usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2154                 int ret;
2155
2156                 ret = __dwc3_gadget_kick_transfer(dep, 0);
2157                 if (!ret || ret == -EBUSY)
2158                         return;
2159         }
2160 }
2161
2162 static void dwc3_endpoint_interrupt(struct dwc3 *dwc,
2163                 const struct dwc3_event_depevt *event)
2164 {
2165         struct dwc3_ep          *dep;
2166         u8                      epnum = event->endpoint_number;
2167
2168         dep = dwc->eps[epnum];
2169
2170         if (!(dep->flags & DWC3_EP_ENABLED))
2171                 return;
2172
2173         if (epnum == 0 || epnum == 1) {
2174                 dwc3_ep0_interrupt(dwc, event);
2175                 return;
2176         }
2177
2178         switch (event->endpoint_event) {
2179         case DWC3_DEPEVT_XFERCOMPLETE:
2180                 dep->resource_index = 0;
2181
2182                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2183                         dwc3_trace(trace_dwc3_gadget,
2184                                         "%s is an Isochronous endpoint",
2185                                         dep->name);
2186                         return;
2187                 }
2188
2189                 dwc3_endpoint_transfer_complete(dwc, dep, event);
2190                 break;
2191         case DWC3_DEPEVT_XFERINPROGRESS:
2192                 dwc3_endpoint_transfer_complete(dwc, dep, event);
2193                 break;
2194         case DWC3_DEPEVT_XFERNOTREADY:
2195                 if (usb_endpoint_xfer_isoc(dep->endpoint.desc)) {
2196                         dwc3_gadget_start_isoc(dwc, dep, event);
2197                 } else {
2198                         int active;
2199                         int ret;
2200
2201                         active = event->status & DEPEVT_STATUS_TRANSFER_ACTIVE;
2202
2203                         dwc3_trace(trace_dwc3_gadget, "%s: reason %s",
2204                                         dep->name, active ? "Transfer Active"
2205                                         : "Transfer Not Active");
2206
2207                         ret = __dwc3_gadget_kick_transfer(dep, 0);
2208                         if (!ret || ret == -EBUSY)
2209                                 return;
2210
2211                         dwc3_trace(trace_dwc3_gadget,
2212                                         "%s: failed to kick transfers",
2213                                         dep->name);
2214                 }
2215
2216                 break;
2217         case DWC3_DEPEVT_STREAMEVT:
2218                 if (!usb_endpoint_xfer_bulk(dep->endpoint.desc)) {
2219                         dev_err(dwc->dev, "Stream event for non-Bulk %s\n",
2220                                         dep->name);
2221                         return;
2222                 }
2223
2224                 switch (event->status) {
2225                 case DEPEVT_STREAMEVT_FOUND:
2226                         dwc3_trace(trace_dwc3_gadget,
2227                                         "Stream %d found and started",
2228                                         event->parameters);
2229
2230                         break;
2231                 case DEPEVT_STREAMEVT_NOTFOUND:
2232                         /* FALLTHROUGH */
2233                 default:
2234                         dwc3_trace(trace_dwc3_gadget,
2235                                         "unable to find suitable stream");
2236                 }
2237                 break;
2238         case DWC3_DEPEVT_RXTXFIFOEVT:
2239                 dwc3_trace(trace_dwc3_gadget, "%s FIFO Overrun", dep->name);
2240                 break;
2241         case DWC3_DEPEVT_EPCMDCMPLT:
2242                 dwc3_trace(trace_dwc3_gadget, "Endpoint Command Complete");
2243                 break;
2244         }
2245 }
2246
2247 static void dwc3_disconnect_gadget(struct dwc3 *dwc)
2248 {
2249         if (dwc->gadget_driver && dwc->gadget_driver->disconnect) {
2250                 spin_unlock(&dwc->lock);
2251                 dwc->gadget_driver->disconnect(&dwc->gadget);
2252                 spin_lock(&dwc->lock);
2253         }
2254 }
2255
2256 static void dwc3_suspend_gadget(struct dwc3 *dwc)
2257 {
2258         if (dwc->gadget_driver && dwc->gadget_driver->suspend) {
2259                 spin_unlock(&dwc->lock);
2260                 dwc->gadget_driver->suspend(&dwc->gadget);
2261                 spin_lock(&dwc->lock);
2262         }
2263 }
2264
2265 static void dwc3_resume_gadget(struct dwc3 *dwc)
2266 {
2267         if (dwc->gadget_driver && dwc->gadget_driver->resume) {
2268                 spin_unlock(&dwc->lock);
2269                 dwc->gadget_driver->resume(&dwc->gadget);
2270                 spin_lock(&dwc->lock);
2271         }
2272 }
2273
2274 static void dwc3_reset_gadget(struct dwc3 *dwc)
2275 {
2276         if (!dwc->gadget_driver)
2277                 return;
2278
2279         if (dwc->gadget.speed != USB_SPEED_UNKNOWN) {
2280                 spin_unlock(&dwc->lock);
2281                 usb_gadget_udc_reset(&dwc->gadget, dwc->gadget_driver);
2282                 spin_lock(&dwc->lock);
2283         }
2284 }
2285
2286 static void dwc3_stop_active_transfer(struct dwc3 *dwc, u32 epnum, bool force)
2287 {
2288         struct dwc3_ep *dep;
2289         struct dwc3_gadget_ep_cmd_params params;
2290         u32 cmd;
2291         int ret;
2292
2293         dep = dwc->eps[epnum];
2294
2295         if (!dep->resource_index)
2296                 return;
2297
2298         /*
2299          * NOTICE: We are violating what the Databook says about the
2300          * EndTransfer command. Ideally we would _always_ wait for the
2301          * EndTransfer Command Completion IRQ, but that's causing too
2302          * much trouble synchronizing between us and gadget driver.
2303          *
2304          * We have discussed this with the IP Provider and it was
2305          * suggested to giveback all requests here, but give HW some
2306          * extra time to synchronize with the interconnect. We're using
2307          * an arbitrary 100us delay for that.
2308          *
2309          * Note also that a similar handling was tested by Synopsys
2310          * (thanks a lot Paul) and nothing bad has come out of it.
2311          * In short, what we're doing is:
2312          *
2313          * - Issue EndTransfer WITH CMDIOC bit set
2314          * - Wait 100us
2315          */
2316
2317         cmd = DWC3_DEPCMD_ENDTRANSFER;
2318         cmd |= force ? DWC3_DEPCMD_HIPRI_FORCERM : 0;
2319         cmd |= DWC3_DEPCMD_CMDIOC;
2320         cmd |= DWC3_DEPCMD_PARAM(dep->resource_index);
2321         memset(&params, 0, sizeof(params));
2322         ret = dwc3_send_gadget_ep_cmd(dep, cmd, &params);
2323         WARN_ON_ONCE(ret);
2324         dep->resource_index = 0;
2325         dep->flags &= ~DWC3_EP_BUSY;
2326         udelay(100);
2327 }
2328
2329 static void dwc3_stop_active_transfers(struct dwc3 *dwc)
2330 {
2331         u32 epnum;
2332
2333         for (epnum = 2; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
2334                 struct dwc3_ep *dep;
2335
2336                 dep = dwc->eps[epnum];
2337                 if (!dep)
2338                         continue;
2339
2340                 if (!(dep->flags & DWC3_EP_ENABLED))
2341                         continue;
2342
2343                 dwc3_remove_requests(dwc, dep);
2344         }
2345 }
2346
2347 static void dwc3_clear_stall_all_ep(struct dwc3 *dwc)
2348 {
2349         u32 epnum;
2350
2351         for (epnum = 1; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
2352                 struct dwc3_ep *dep;
2353                 int ret;
2354
2355                 dep = dwc->eps[epnum];
2356                 if (!dep)
2357                         continue;
2358
2359                 if (!(dep->flags & DWC3_EP_STALL))
2360                         continue;
2361
2362                 dep->flags &= ~DWC3_EP_STALL;
2363
2364                 ret = dwc3_send_clear_stall_ep_cmd(dep);
2365                 WARN_ON_ONCE(ret);
2366         }
2367 }
2368
2369 static void dwc3_gadget_disconnect_interrupt(struct dwc3 *dwc)
2370 {
2371         int                     reg;
2372
2373         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2374         reg &= ~DWC3_DCTL_INITU1ENA;
2375         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2376
2377         reg &= ~DWC3_DCTL_INITU2ENA;
2378         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2379
2380         dwc3_disconnect_gadget(dwc);
2381
2382         dwc->gadget.speed = USB_SPEED_UNKNOWN;
2383         dwc->setup_packet_pending = false;
2384         usb_gadget_set_state(&dwc->gadget, USB_STATE_NOTATTACHED);
2385
2386         dwc->connected = false;
2387 }
2388
2389 static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc)
2390 {
2391         u32                     reg;
2392
2393         dwc->connected = true;
2394
2395         /*
2396          * WORKAROUND: DWC3 revisions <1.88a have an issue which
2397          * would cause a missing Disconnect Event if there's a
2398          * pending Setup Packet in the FIFO.
2399          *
2400          * There's no suggested workaround on the official Bug
2401          * report, which states that "unless the driver/application
2402          * is doing any special handling of a disconnect event,
2403          * there is no functional issue".
2404          *
2405          * Unfortunately, it turns out that we _do_ some special
2406          * handling of a disconnect event, namely complete all
2407          * pending transfers, notify gadget driver of the
2408          * disconnection, and so on.
2409          *
2410          * Our suggested workaround is to follow the Disconnect
2411          * Event steps here, instead, based on a setup_packet_pending
2412          * flag. Such flag gets set whenever we have a SETUP_PENDING
2413          * status for EP0 TRBs and gets cleared on XferComplete for the
2414          * same endpoint.
2415          *
2416          * Refers to:
2417          *
2418          * STAR#9000466709: RTL: Device : Disconnect event not
2419          * generated if setup packet pending in FIFO
2420          */
2421         if (dwc->revision < DWC3_REVISION_188A) {
2422                 if (dwc->setup_packet_pending)
2423                         dwc3_gadget_disconnect_interrupt(dwc);
2424         }
2425
2426         dwc3_reset_gadget(dwc);
2427
2428         reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2429         reg &= ~DWC3_DCTL_TSTCTRL_MASK;
2430         dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2431         dwc->test_mode = false;
2432
2433         dwc3_stop_active_transfers(dwc);
2434         dwc3_clear_stall_all_ep(dwc);
2435
2436         /* Reset device address to zero */
2437         reg = dwc3_readl(dwc->regs, DWC3_DCFG);
2438         reg &= ~(DWC3_DCFG_DEVADDR_MASK);
2439         dwc3_writel(dwc->regs, DWC3_DCFG, reg);
2440 }
2441
2442 static void dwc3_update_ram_clk_sel(struct dwc3 *dwc, u32 speed)
2443 {
2444         u32 reg;
2445         u32 usb30_clock = DWC3_GCTL_CLK_BUS;
2446
2447         /*
2448          * We change the clock only at SS but I dunno why I would want to do
2449          * this. Maybe it becomes part of the power saving plan.
2450          */
2451
2452         if ((speed != DWC3_DSTS_SUPERSPEED) &&
2453             (speed != DWC3_DSTS_SUPERSPEED_PLUS))
2454                 return;
2455
2456         /*
2457          * RAMClkSel is reset to 0 after USB reset, so it must be reprogrammed
2458          * each time on Connect Done.
2459          */
2460         if (!usb30_clock)
2461                 return;
2462
2463         reg = dwc3_readl(dwc->regs, DWC3_GCTL);
2464         reg |= DWC3_GCTL_RAMCLKSEL(usb30_clock);
2465         dwc3_writel(dwc->regs, DWC3_GCTL, reg);
2466 }
2467
2468 static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
2469 {
2470         struct dwc3_ep          *dep;
2471         int                     ret;
2472         u32                     reg;
2473         u8                      speed;
2474
2475         reg = dwc3_readl(dwc->regs, DWC3_DSTS);
2476         speed = reg & DWC3_DSTS_CONNECTSPD;
2477         dwc->speed = speed;
2478
2479         dwc3_update_ram_clk_sel(dwc, speed);
2480
2481         switch (speed) {
2482         case DWC3_DSTS_SUPERSPEED_PLUS:
2483                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
2484                 dwc->gadget.ep0->maxpacket = 512;
2485                 dwc->gadget.speed = USB_SPEED_SUPER_PLUS;
2486                 break;
2487         case DWC3_DSTS_SUPERSPEED:
2488                 /*
2489                  * WORKAROUND: DWC3 revisions <1.90a have an issue which
2490                  * would cause a missing USB3 Reset event.
2491                  *
2492                  * In such situations, we should force a USB3 Reset
2493                  * event by calling our dwc3_gadget_reset_interrupt()
2494                  * routine.
2495                  *
2496                  * Refers to:
2497                  *
2498                  * STAR#9000483510: RTL: SS : USB3 reset event may
2499                  * not be generated always when the link enters poll
2500                  */
2501                 if (dwc->revision < DWC3_REVISION_190A)
2502                         dwc3_gadget_reset_interrupt(dwc);
2503
2504                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
2505                 dwc->gadget.ep0->maxpacket = 512;
2506                 dwc->gadget.speed = USB_SPEED_SUPER;
2507                 break;
2508         case DWC3_DSTS_HIGHSPEED:
2509                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
2510                 dwc->gadget.ep0->maxpacket = 64;
2511                 dwc->gadget.speed = USB_SPEED_HIGH;
2512                 break;
2513         case DWC3_DSTS_FULLSPEED2:
2514         case DWC3_DSTS_FULLSPEED1:
2515                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
2516                 dwc->gadget.ep0->maxpacket = 64;
2517                 dwc->gadget.speed = USB_SPEED_FULL;
2518                 break;
2519         case DWC3_DSTS_LOWSPEED:
2520                 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(8);
2521                 dwc->gadget.ep0->maxpacket = 8;
2522                 dwc->gadget.speed = USB_SPEED_LOW;
2523                 break;
2524         }
2525
2526         /* Enable USB2 LPM Capability */
2527
2528         if ((dwc->revision > DWC3_REVISION_194A) &&
2529             (speed != DWC3_DSTS_SUPERSPEED) &&
2530             (speed != DWC3_DSTS_SUPERSPEED_PLUS)) {
2531                 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
2532                 reg |= DWC3_DCFG_LPM_CAP;
2533                 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
2534
2535                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2536                 reg &= ~(DWC3_DCTL_HIRD_THRES_MASK | DWC3_DCTL_L1_HIBER_EN);
2537
2538                 reg |= DWC3_DCTL_HIRD_THRES(dwc->hird_threshold);
2539
2540                 /*
2541                  * When dwc3 revisions >= 2.40a, LPM Erratum is enabled and
2542                  * DCFG.LPMCap is set, core responses with an ACK and the
2543                  * BESL value in the LPM token is less than or equal to LPM
2544                  * NYET threshold.
2545                  */
2546                 WARN_ONCE(dwc->revision < DWC3_REVISION_240A
2547                                 && dwc->has_lpm_erratum,
2548                                 "LPM Erratum not available on dwc3 revisisions < 2.40a\n");
2549
2550                 if (dwc->has_lpm_erratum && dwc->revision >= DWC3_REVISION_240A)
2551                         reg |= DWC3_DCTL_LPM_ERRATA(dwc->lpm_nyet_threshold);
2552
2553                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2554         } else {
2555                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2556                 reg &= ~DWC3_DCTL_HIRD_THRES_MASK;
2557                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2558         }
2559
2560         dep = dwc->eps[0];
2561         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, true,
2562                         false);
2563         if (ret) {
2564                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
2565                 return;
2566         }
2567
2568         dep = dwc->eps[1];
2569         ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, true,
2570                         false);
2571         if (ret) {
2572                 dev_err(dwc->dev, "failed to enable %s\n", dep->name);
2573                 return;
2574         }
2575
2576         /*
2577          * Configure PHY via GUSB3PIPECTLn if required.
2578          *
2579          * Update GTXFIFOSIZn
2580          *
2581          * In both cases reset values should be sufficient.
2582          */
2583 }
2584
2585 static void dwc3_gadget_wakeup_interrupt(struct dwc3 *dwc)
2586 {
2587         /*
2588          * TODO take core out of low power mode when that's
2589          * implemented.
2590          */
2591
2592         if (dwc->gadget_driver && dwc->gadget_driver->resume) {
2593                 spin_unlock(&dwc->lock);
2594                 dwc->gadget_driver->resume(&dwc->gadget);
2595                 spin_lock(&dwc->lock);
2596         }
2597 }
2598
2599 static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc,
2600                 unsigned int evtinfo)
2601 {
2602         enum dwc3_link_state    next = evtinfo & DWC3_LINK_STATE_MASK;
2603         unsigned int            pwropt;
2604
2605         /*
2606          * WORKAROUND: DWC3 < 2.50a have an issue when configured without
2607          * Hibernation mode enabled which would show up when device detects
2608          * host-initiated U3 exit.
2609          *
2610          * In that case, device will generate a Link State Change Interrupt
2611          * from U3 to RESUME which is only necessary if Hibernation is
2612          * configured in.
2613          *
2614          * There are no functional changes due to such spurious event and we
2615          * just need to ignore it.
2616          *
2617          * Refers to:
2618          *
2619          * STAR#9000570034 RTL: SS Resume event generated in non-Hibernation
2620          * operational mode
2621          */
2622         pwropt = DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1);
2623         if ((dwc->revision < DWC3_REVISION_250A) &&
2624                         (pwropt != DWC3_GHWPARAMS1_EN_PWROPT_HIB)) {
2625                 if ((dwc->link_state == DWC3_LINK_STATE_U3) &&
2626                                 (next == DWC3_LINK_STATE_RESUME)) {
2627                         dwc3_trace(trace_dwc3_gadget,
2628                                         "ignoring transition U3 -> Resume");
2629                         return;
2630                 }
2631         }
2632
2633         /*
2634          * WORKAROUND: DWC3 Revisions <1.83a have an issue which, depending
2635          * on the link partner, the USB session might do multiple entry/exit
2636          * of low power states before a transfer takes place.
2637          *
2638          * Due to this problem, we might experience lower throughput. The
2639          * suggested workaround is to disable DCTL[12:9] bits if we're
2640          * transitioning from U1/U2 to U0 and enable those bits again
2641          * after a transfer completes and there are no pending transfers
2642          * on any of the enabled endpoints.
2643          *
2644          * This is the first half of that workaround.
2645          *
2646          * Refers to:
2647          *
2648          * STAR#9000446952: RTL: Device SS : if U1/U2 ->U0 takes >128us
2649          * core send LGO_Ux entering U0
2650          */
2651         if (dwc->revision < DWC3_REVISION_183A) {
2652                 if (next == DWC3_LINK_STATE_U0) {
2653                         u32     u1u2;
2654                         u32     reg;
2655
2656                         switch (dwc->link_state) {
2657                         case DWC3_LINK_STATE_U1:
2658                         case DWC3_LINK_STATE_U2:
2659                                 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
2660                                 u1u2 = reg & (DWC3_DCTL_INITU2ENA
2661                                                 | DWC3_DCTL_ACCEPTU2ENA
2662                                                 | DWC3_DCTL_INITU1ENA
2663                                                 | DWC3_DCTL_ACCEPTU1ENA);
2664
2665                                 if (!dwc->u1u2)
2666                                         dwc->u1u2 = reg & u1u2;
2667
2668                                 reg &= ~u1u2;
2669
2670                                 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
2671                                 break;
2672                         default:
2673                                 /* do nothing */
2674                                 break;
2675                         }
2676                 }
2677         }
2678
2679         switch (next) {
2680         case DWC3_LINK_STATE_U1:
2681                 if (dwc->speed == USB_SPEED_SUPER)
2682                         dwc3_suspend_gadget(dwc);
2683                 break;
2684         case DWC3_LINK_STATE_U2:
2685         case DWC3_LINK_STATE_U3:
2686                 dwc3_suspend_gadget(dwc);
2687                 break;
2688         case DWC3_LINK_STATE_RESUME:
2689                 dwc3_resume_gadget(dwc);
2690                 break;
2691         default:
2692                 /* do nothing */
2693                 break;
2694         }
2695
2696         dwc->link_state = next;
2697 }
2698
2699 static void dwc3_gadget_hibernation_interrupt(struct dwc3 *dwc,
2700                 unsigned int evtinfo)
2701 {
2702         unsigned int is_ss = evtinfo & BIT(4);
2703
2704         /**
2705          * WORKAROUND: DWC3 revison 2.20a with hibernation support
2706          * have a known issue which can cause USB CV TD.9.23 to fail
2707          * randomly.
2708          *
2709          * Because of this issue, core could generate bogus hibernation
2710          * events which SW needs to ignore.
2711          *
2712          * Refers to:
2713          *
2714          * STAR#9000546576: Device Mode Hibernation: Issue in USB 2.0
2715          * Device Fallback from SuperSpeed
2716          */
2717         if (is_ss ^ (dwc->speed == USB_SPEED_SUPER))
2718                 return;
2719
2720         /* enter hibernation here */
2721 }
2722
2723 static void dwc3_gadget_interrupt(struct dwc3 *dwc,
2724                 const struct dwc3_event_devt *event)
2725 {
2726         switch (event->type) {
2727         case DWC3_DEVICE_EVENT_DISCONNECT:
2728                 dwc3_gadget_disconnect_interrupt(dwc);
2729                 break;
2730         case DWC3_DEVICE_EVENT_RESET:
2731                 dwc3_gadget_reset_interrupt(dwc);
2732                 break;
2733         case DWC3_DEVICE_EVENT_CONNECT_DONE:
2734                 dwc3_gadget_conndone_interrupt(dwc);
2735                 break;
2736         case DWC3_DEVICE_EVENT_WAKEUP:
2737                 dwc3_gadget_wakeup_interrupt(dwc);
2738                 break;
2739         case DWC3_DEVICE_EVENT_HIBER_REQ:
2740                 if (dev_WARN_ONCE(dwc->dev, !dwc->has_hibernation,
2741                                         "unexpected hibernation event\n"))
2742                         break;
2743
2744                 dwc3_gadget_hibernation_interrupt(dwc, event->event_info);
2745                 break;
2746         case DWC3_DEVICE_EVENT_LINK_STATUS_CHANGE:
2747                 dwc3_gadget_linksts_change_interrupt(dwc, event->event_info);
2748                 break;
2749         case DWC3_DEVICE_EVENT_EOPF:
2750                 dwc3_trace(trace_dwc3_gadget, "End of Periodic Frame");
2751                 break;
2752         case DWC3_DEVICE_EVENT_SOF:
2753                 dwc3_trace(trace_dwc3_gadget, "Start of Periodic Frame");
2754                 break;
2755         case DWC3_DEVICE_EVENT_ERRATIC_ERROR:
2756                 dwc3_trace(trace_dwc3_gadget, "Erratic Error");
2757                 break;
2758         case DWC3_DEVICE_EVENT_CMD_CMPL:
2759                 dwc3_trace(trace_dwc3_gadget, "Command Complete");
2760                 break;
2761         case DWC3_DEVICE_EVENT_OVERFLOW:
2762                 dwc3_trace(trace_dwc3_gadget, "Overflow");
2763                 break;
2764         default:
2765                 dev_WARN(dwc->dev, "UNKNOWN IRQ %d\n", event->type);
2766         }
2767 }
2768
2769 static void dwc3_process_event_entry(struct dwc3 *dwc,
2770                 const union dwc3_event *event)
2771 {
2772         trace_dwc3_event(event->raw);
2773
2774         /* Endpoint IRQ, handle it and return early */
2775         if (event->type.is_devspec == 0) {
2776                 /* depevt */
2777                 return dwc3_endpoint_interrupt(dwc, &event->depevt);
2778         }
2779
2780         switch (event->type.type) {
2781         case DWC3_EVENT_TYPE_DEV:
2782                 dwc3_gadget_interrupt(dwc, &event->devt);
2783                 break;
2784         /* REVISIT what to do with Carkit and I2C events ? */
2785         default:
2786                 dev_err(dwc->dev, "UNKNOWN IRQ type %d\n", event->raw);
2787         }
2788 }
2789
2790 static irqreturn_t dwc3_process_event_buf(struct dwc3_event_buffer *evt)
2791 {
2792         struct dwc3 *dwc = evt->dwc;
2793         irqreturn_t ret = IRQ_NONE;
2794         int left;
2795         u32 reg;
2796
2797         left = evt->count;
2798
2799         if (!(evt->flags & DWC3_EVENT_PENDING))
2800                 return IRQ_NONE;
2801
2802         while (left > 0) {
2803                 union dwc3_event event;
2804
2805                 event.raw = *(u32 *) (evt->buf + evt->lpos);
2806
2807                 dwc3_process_event_entry(dwc, &event);
2808
2809                 /*
2810                  * FIXME we wrap around correctly to the next entry as
2811                  * almost all entries are 4 bytes in size. There is one
2812                  * entry which has 12 bytes which is a regular entry
2813                  * followed by 8 bytes data. ATM I don't know how
2814                  * things are organized if we get next to the a
2815                  * boundary so I worry about that once we try to handle
2816                  * that.
2817                  */
2818                 evt->lpos = (evt->lpos + 4) % DWC3_EVENT_BUFFERS_SIZE;
2819                 left -= 4;
2820
2821                 dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), 4);
2822         }
2823
2824         evt->count = 0;
2825         evt->flags &= ~DWC3_EVENT_PENDING;
2826         ret = IRQ_HANDLED;
2827
2828         /* Unmask interrupt */
2829         reg = dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
2830         reg &= ~DWC3_GEVNTSIZ_INTMASK;
2831         dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
2832
2833         return ret;
2834 }
2835
2836 static irqreturn_t dwc3_thread_interrupt(int irq, void *_evt)
2837 {
2838         struct dwc3_event_buffer *evt = _evt;
2839         struct dwc3 *dwc = evt->dwc;
2840         unsigned long flags;
2841         irqreturn_t ret = IRQ_NONE;
2842
2843         spin_lock_irqsave(&dwc->lock, flags);
2844         ret = dwc3_process_event_buf(evt);
2845         spin_unlock_irqrestore(&dwc->lock, flags);
2846
2847         return ret;
2848 }
2849
2850 static irqreturn_t dwc3_check_event_buf(struct dwc3_event_buffer *evt)
2851 {
2852         struct dwc3 *dwc = evt->dwc;
2853         u32 count;
2854         u32 reg;
2855
2856         if (pm_runtime_suspended(dwc->dev)) {
2857                 pm_runtime_get(dwc->dev);
2858                 disable_irq_nosync(dwc->irq_gadget);
2859                 dwc->pending_events = true;
2860                 return IRQ_HANDLED;
2861         }
2862
2863         count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0));
2864         count &= DWC3_GEVNTCOUNT_MASK;
2865         if (!count)
2866                 return IRQ_NONE;
2867
2868         evt->count = count;
2869         evt->flags |= DWC3_EVENT_PENDING;
2870
2871         /* Mask interrupt */
2872         reg = dwc3_readl(dwc->regs, DWC3_GEVNTSIZ(0));
2873         reg |= DWC3_GEVNTSIZ_INTMASK;
2874         dwc3_writel(dwc->regs, DWC3_GEVNTSIZ(0), reg);
2875
2876         return IRQ_WAKE_THREAD;
2877 }
2878
2879 static irqreturn_t dwc3_interrupt(int irq, void *_evt)
2880 {
2881         struct dwc3_event_buffer        *evt = _evt;
2882
2883         return dwc3_check_event_buf(evt);
2884 }
2885
2886 /**
2887  * dwc3_gadget_init - Initializes gadget related registers
2888  * @dwc: pointer to our controller context structure
2889  *
2890  * Returns 0 on success otherwise negative errno.
2891  */
2892 int dwc3_gadget_init(struct dwc3 *dwc)
2893 {
2894         int                                     ret;
2895
2896         dwc->ctrl_req = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
2897                         &dwc->ctrl_req_addr, GFP_KERNEL);
2898         if (!dwc->ctrl_req) {
2899                 dev_err(dwc->dev, "failed to allocate ctrl request\n");
2900                 ret = -ENOMEM;
2901                 goto err0;
2902         }
2903
2904         dwc->ep0_trb = dma_alloc_coherent(dwc->dev, sizeof(*dwc->ep0_trb) * 2,
2905                         &dwc->ep0_trb_addr, GFP_KERNEL);
2906         if (!dwc->ep0_trb) {
2907                 dev_err(dwc->dev, "failed to allocate ep0 trb\n");
2908                 ret = -ENOMEM;
2909                 goto err1;
2910         }
2911
2912         dwc->setup_buf = kzalloc(DWC3_EP0_BOUNCE_SIZE, GFP_KERNEL);
2913         if (!dwc->setup_buf) {
2914                 ret = -ENOMEM;
2915                 goto err2;
2916         }
2917
2918         dwc->ep0_bounce = dma_alloc_coherent(dwc->dev,
2919                         DWC3_EP0_BOUNCE_SIZE, &dwc->ep0_bounce_addr,
2920                         GFP_KERNEL);
2921         if (!dwc->ep0_bounce) {
2922                 dev_err(dwc->dev, "failed to allocate ep0 bounce buffer\n");
2923                 ret = -ENOMEM;
2924                 goto err3;
2925         }
2926
2927         dwc->zlp_buf = kzalloc(DWC3_ZLP_BUF_SIZE, GFP_KERNEL);
2928         if (!dwc->zlp_buf) {
2929                 ret = -ENOMEM;
2930                 goto err4;
2931         }
2932
2933         dwc->gadget.ops                 = &dwc3_gadget_ops;
2934         dwc->gadget.speed               = USB_SPEED_UNKNOWN;
2935         dwc->gadget.sg_supported        = true;
2936         dwc->gadget.name                = "dwc3-gadget";
2937         dwc->gadget.is_otg              = dwc->dr_mode == USB_DR_MODE_OTG;
2938
2939         /*
2940          * FIXME We might be setting max_speed to <SUPER, however versions
2941          * <2.20a of dwc3 have an issue with metastability (documented
2942          * elsewhere in this driver) which tells us we can't set max speed to
2943          * anything lower than SUPER.
2944          *
2945          * Because gadget.max_speed is only used by composite.c and function
2946          * drivers (i.e. it won't go into dwc3's registers) we are allowing this
2947          * to happen so we avoid sending SuperSpeed Capability descriptor
2948          * together with our BOS descriptor as that could confuse host into
2949          * thinking we can handle super speed.
2950          *
2951          * Note that, in fact, we won't even support GetBOS requests when speed
2952          * is less than super speed because we don't have means, yet, to tell
2953          * composite.c that we are USB 2.0 + LPM ECN.
2954          */
2955         if (dwc->revision < DWC3_REVISION_220A)
2956                 dwc3_trace(trace_dwc3_gadget,
2957                                 "Changing max_speed on rev %08x",
2958                                 dwc->revision);
2959
2960         dwc->gadget.max_speed           = dwc->maximum_speed;
2961
2962         /*
2963          * Per databook, DWC3 needs buffer size to be aligned to MaxPacketSize
2964          * on ep out.
2965          */
2966         dwc->gadget.quirk_ep_out_aligned_size = true;
2967
2968         /*
2969          * REVISIT: Here we should clear all pending IRQs to be
2970          * sure we're starting from a well known location.
2971          */
2972
2973         ret = dwc3_gadget_init_endpoints(dwc);
2974         if (ret)
2975                 goto err5;
2976
2977         ret = usb_add_gadget_udc(dwc->dev, &dwc->gadget);
2978         if (ret) {
2979                 dev_err(dwc->dev, "failed to register udc\n");
2980                 goto err5;
2981         }
2982
2983         return 0;
2984
2985 err5:
2986         kfree(dwc->zlp_buf);
2987
2988 err4:
2989         dwc3_gadget_free_endpoints(dwc);
2990         dma_free_coherent(dwc->dev, DWC3_EP0_BOUNCE_SIZE,
2991                         dwc->ep0_bounce, dwc->ep0_bounce_addr);
2992
2993 err3:
2994         kfree(dwc->setup_buf);
2995
2996 err2:
2997         dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
2998                         dwc->ep0_trb, dwc->ep0_trb_addr);
2999
3000 err1:
3001         dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
3002                         dwc->ctrl_req, dwc->ctrl_req_addr);
3003
3004 err0:
3005         return ret;
3006 }
3007
3008 /* -------------------------------------------------------------------------- */
3009
3010 void dwc3_gadget_exit(struct dwc3 *dwc)
3011 {
3012         usb_del_gadget_udc(&dwc->gadget);
3013
3014         dwc3_gadget_free_endpoints(dwc);
3015
3016         dma_free_coherent(dwc->dev, DWC3_EP0_BOUNCE_SIZE,
3017                         dwc->ep0_bounce, dwc->ep0_bounce_addr);
3018
3019         kfree(dwc->setup_buf);
3020         kfree(dwc->zlp_buf);
3021
3022         dma_free_coherent(dwc->dev, sizeof(*dwc->ep0_trb),
3023                         dwc->ep0_trb, dwc->ep0_trb_addr);
3024
3025         dma_free_coherent(dwc->dev, sizeof(*dwc->ctrl_req),
3026                         dwc->ctrl_req, dwc->ctrl_req_addr);
3027 }
3028
3029 int dwc3_gadget_suspend(struct dwc3 *dwc)
3030 {
3031         int ret;
3032
3033         if (!dwc->gadget_driver)
3034                 return 0;
3035
3036         ret = dwc3_gadget_run_stop(dwc, false, false);
3037         if (ret < 0)
3038                 return ret;
3039
3040         dwc3_disconnect_gadget(dwc);
3041         __dwc3_gadget_stop(dwc);
3042
3043         return 0;
3044 }
3045
3046 int dwc3_gadget_resume(struct dwc3 *dwc)
3047 {
3048         int                     ret;
3049
3050         if (!dwc->gadget_driver)
3051                 return 0;
3052
3053         ret = __dwc3_gadget_start(dwc);
3054         if (ret < 0)
3055                 goto err0;
3056
3057         ret = dwc3_gadget_run_stop(dwc, true, false);
3058         if (ret < 0)
3059                 goto err1;
3060
3061         return 0;
3062
3063 err1:
3064         __dwc3_gadget_stop(dwc);
3065
3066 err0:
3067         return ret;
3068 }
3069
3070 void dwc3_gadget_process_pending_events(struct dwc3 *dwc)
3071 {
3072         if (dwc->pending_events) {
3073                 dwc3_interrupt(dwc->irq_gadget, dwc->ev_buf);
3074                 dwc->pending_events = false;
3075                 enable_irq(dwc->irq_gadget);
3076         }
3077 }