drivers/usb/host/ehci-tegra.c

   1 /*
   2  * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs
   3  *
   4  * Copyright (C) 2010 Google, Inc.
   5  * Copyright (C) 2009 NVIDIA Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License as published by the
   9  * Free Software Foundation; either version 2 of the License, or (at your
  10  * option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  */
  18
  19 #include <linux/clk.h>
  20 #include <linux/err.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/platform_data/tegra_usb.h>
  23 #include <linux/irq.h>
  24 #include <linux/usb/otg.h>
  25 #include <linux/gpio.h>
  26 #include <linux/of.h>
  27 #include <linux/of_gpio.h>
  28 #include <linux/pm_runtime.h>
  29
  30 #include <linux/usb/tegra_usb_phy.h>
  31 #include <mach/iomap.h>
  32
  33 #define TEGRA_USB_DMA_ALIGN 32
  34
  35 struct tegra_ehci_hcd {
  36         struct ehci_hcd *ehci;
  37         struct tegra_usb_phy *phy;
  38         struct clk *clk;
  39         struct clk *emc_clk;
  40         struct usb_phy *transceiver;
  41         int host_resumed;
  42         int port_resuming;
  43         enum tegra_usb_phy_port_speed port_speed;
  44 };
  45
  46 static void tegra_ehci_power_up(struct usb_hcd *hcd)
  47 {
  48         struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
  49
  50         clk_prepare_enable(tegra->emc_clk);
  51         clk_prepare_enable(tegra->clk);
  52         usb_phy_set_suspend(&tegra->phy->u_phy, 0);
  53         tegra->host_resumed = 1;
  54 }
  55
  56 static void tegra_ehci_power_down(struct usb_hcd *hcd)
  57 {
  58         struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
  59
  60         tegra->host_resumed = 0;
  61         usb_phy_set_suspend(&tegra->phy->u_phy, 1);
  62         clk_disable_unprepare(tegra->clk);
  63         clk_disable_unprepare(tegra->emc_clk);
  64 }
  65
  66 static int tegra_ehci_internal_port_reset(
  67         struct ehci_hcd *ehci,
  68         u32 __iomem     *portsc_reg
  69 )
  70 {
  71         u32             temp;
  72         unsigned long   flags;
  73         int             retval = 0;
  74         int             i, tries;
  75         u32             saved_usbintr;
  76
  77         spin_lock_irqsave(&ehci->lock, flags);
  78         saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable);
  79         /* disable USB interrupt */
  80         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
  81         spin_unlock_irqrestore(&ehci->lock, flags);
  82
  83         /*
  84          * Here we have to do Port Reset at most twice for
  85          * Port Enable bit to be set.
  86          */
  87         for (i = 0; i < 2; i++) {
  88                 temp = ehci_readl(ehci, portsc_reg);
  89                 temp |= PORT_RESET;
  90                 ehci_writel(ehci, temp, portsc_reg);
  91                 mdelay(10);
  92                 temp &= ~PORT_RESET;
  93                 ehci_writel(ehci, temp, portsc_reg);
  94                 mdelay(1);
  95                 tries = 100;
  96                 do {
  97                         mdelay(1);
  98                         /*
  99                          * Up to this point, Port Enable bit is
 100                          * expected to be set after 2 ms waiting.
 101                          * USB1 usually takes extra 45 ms, for safety,
 102                          * we take 100 ms as timeout.
 103                          */
 104                         temp = ehci_readl(ehci, portsc_reg);
 105                 } while (!(temp & PORT_PE) && tries--);
 106                 if (temp & PORT_PE)
 107                         break;
 108         }
 109         if (i == 2)
 110                 retval = -ETIMEDOUT;
 111
 112         /*
 113          * Clear Connect Status Change bit if it's set.
 114          * We can't clear PORT_PEC. It will also cause PORT_PE to be cleared.
 115          */
 116         if (temp & PORT_CSC)
 117                 ehci_writel(ehci, PORT_CSC, portsc_reg);
 118
 119         /*
 120          * Write to clear any interrupt status bits that might be set
 121          * during port reset.
 122          */
 123         temp = ehci_readl(ehci, &ehci->regs->status);
 124         ehci_writel(ehci, temp, &ehci->regs->status);
 125
 126         /* restore original interrupt enable bits */
 127         ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable);
 128         return retval;
 129 }
 130
 131 static int tegra_ehci_hub_control(
 132         struct usb_hcd  *hcd,
 133         u16             typeReq,
 134         u16             wValue,
 135         u16             wIndex,
 136         char            *buf,
 137         u16             wLength
 138 )
 139 {
 140         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 141         struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
 142         u32 __iomem     *status_reg;
 143         u32             temp;
 144         unsigned long   flags;
 145         int             retval = 0;
 146
 147         status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
 148
 149         spin_lock_irqsave(&ehci->lock, flags);
 150
 151         if (typeReq == GetPortStatus) {
 152                 temp = ehci_readl(ehci, status_reg);
 153                 if (tegra->port_resuming && !(temp & PORT_SUSPEND)) {
 154                         /* Resume completed, re-enable disconnect detection */
 155                         tegra->port_resuming = 0;
 156                         tegra_usb_phy_postresume(tegra->phy);
 157                 }
 158         }
 159
 160         else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
 161                 temp = ehci_readl(ehci, status_reg);
 162                 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
 163                         retval = -EPIPE;
 164                         goto done;
 165                 }
 166
 167                 temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
 168                 temp |= PORT_WKDISC_E | PORT_WKOC_E;
 169                 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
 170
 171                 /*
 172                  * If a transaction is in progress, there may be a delay in
 173                  * suspending the port. Poll until the port is suspended.
 174                  */
 175                 if (handshake(ehci, status_reg, PORT_SUSPEND,
 176                                                 PORT_SUSPEND, 5000))
 177                         pr_err("%s: timeout waiting for SUSPEND\n", __func__);
 178
 179                 set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
 180                 goto done;
 181         }
 182
 183         /* For USB1 port we need to issue Port Reset twice internally */
 184         if (tegra->phy->instance == 0 &&
 185            (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) {
 186                 spin_unlock_irqrestore(&ehci->lock, flags);
 187                 return tegra_ehci_internal_port_reset(ehci, status_reg);
 188         }
 189
 190         /*
 191          * Tegra host controller will time the resume operation to clear the bit
 192          * when the port control state switches to HS or FS Idle. This behavior
 193          * is different from EHCI where the host controller driver is required
 194          * to set this bit to a zero after the resume duration is timed in the
 195          * driver.
 196          */
 197         else if (typeReq == ClearPortFeature &&
 198                                         wValue == USB_PORT_FEAT_SUSPEND) {
 199                 temp = ehci_readl(ehci, status_reg);
 200                 if ((temp & PORT_RESET) || !(temp & PORT_PE)) {
 201                         retval = -EPIPE;
 202                         goto done;
 203                 }
 204
 205                 if (!(temp & PORT_SUSPEND))
 206                         goto done;
 207
 208                 /* Disable disconnect detection during port resume */
 209                 tegra_usb_phy_preresume(tegra->phy);
 210
 211                 ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25);
 212
 213                 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
 214                 /* start resume signalling */
 215                 ehci_writel(ehci, temp | PORT_RESUME, status_reg);
 216                 set_bit(wIndex-1, &ehci->resuming_ports);
 217
 218                 spin_unlock_irqrestore(&ehci->lock, flags);
 219                 msleep(20);
 220                 spin_lock_irqsave(&ehci->lock, flags);
 221
 222                 /* Poll until the controller clears RESUME and SUSPEND */
 223                 if (handshake(ehci, status_reg, PORT_RESUME, 0, 2000))
 224                         pr_err("%s: timeout waiting for RESUME\n", __func__);
 225                 if (handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000))
 226                         pr_err("%s: timeout waiting for SUSPEND\n", __func__);
 227
 228                 ehci->reset_done[wIndex-1] = 0;
 229                 clear_bit(wIndex-1, &ehci->resuming_ports);
 230
 231                 tegra->port_resuming = 1;
 232                 goto done;
 233         }
 234
 235         spin_unlock_irqrestore(&ehci->lock, flags);
 236
 237         /* Handle the hub control events here */
 238         return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
 239 done:
 240         spin_unlock_irqrestore(&ehci->lock, flags);
 241         return retval;
 242 }
 243
 244 static void tegra_ehci_restart(struct usb_hcd *hcd)
 245 {
 246         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 247
 248         ehci_reset(ehci);
 249
 250         /* setup the frame list and Async q heads */
 251         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 252         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 253         /* setup the command register and set the controller in RUN mode */
 254         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 255         ehci->command |= CMD_RUN;
 256         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 257
 258         down_write(&ehci_cf_port_reset_rwsem);
 259         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 260         /* flush posted writes */
 261         ehci_readl(ehci, &ehci->regs->command);
 262         up_write(&ehci_cf_port_reset_rwsem);
 263 }
 264
 265 static void tegra_ehci_shutdown(struct usb_hcd *hcd)
 266 {
 267         struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller);
 268
 269         /* ehci_shutdown touches the USB controller registers, make sure
 270          * controller has clocks to it */
 271         if (!tegra->host_resumed)
 272                 tegra_ehci_power_up(hcd);
 273
 274         ehci_shutdown(hcd);
 275 }
 276
 277 static int tegra_ehci_setup(struct usb_hcd *hcd)
 278 {
 279         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 280         int retval;
 281
 282         /* EHCI registers start at offset 0x100 */
 283         ehci->caps = hcd->regs + 0x100;
 284
 285         /* switch to host mode */
 286         hcd->has_tt = 1;
 287
 288         retval = ehci_setup(hcd);
 289         if (retval)
 290                 return retval;
 291
 292         ehci_port_power(ehci, 1);
 293         return retval;
 294 }
 295
 296 struct dma_aligned_buffer {
 297         void *kmalloc_ptr;
 298         void *old_xfer_buffer;
 299         u8 data[0];
 300 };
 301
 302 static void free_dma_aligned_buffer(struct urb *urb)
 303 {
 304         struct dma_aligned_buffer *temp;
 305
 306         if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
 307                 return;
 308
 309         temp = container_of(urb->transfer_buffer,
 310                 struct dma_aligned_buffer, data);
 311
 312         if (usb_urb_dir_in(urb))
 313                 memcpy(temp->old_xfer_buffer, temp->data,
 314                        urb->transfer_buffer_length);
 315         urb->transfer_buffer = temp->old_xfer_buffer;
 316         kfree(temp->kmalloc_ptr);
 317
 318         urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
 319 }
 320
 321 static int alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
 322 {
 323         struct dma_aligned_buffer *temp, *kmalloc_ptr;
 324         size_t kmalloc_size;
 325
 326         if (urb->num_sgs || urb->sg ||
 327             urb->transfer_buffer_length == 0 ||
 328             !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1)))
 329                 return 0;
 330
 331         /* Allocate a buffer with enough padding for alignment */
 332         kmalloc_size = urb->transfer_buffer_length +
 333                 sizeof(struct dma_aligned_buffer) + TEGRA_USB_DMA_ALIGN - 1;
 334
 335         kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
 336         if (!kmalloc_ptr)
 337                 return -ENOMEM;
 338
 339         /* Position our struct dma_aligned_buffer such that data is aligned */
 340         temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1;
 341         temp->kmalloc_ptr = kmalloc_ptr;
 342         temp->old_xfer_buffer = urb->transfer_buffer;
 343         if (usb_urb_dir_out(urb))
 344                 memcpy(temp->data, urb->transfer_buffer,
 345                        urb->transfer_buffer_length);
 346         urb->transfer_buffer = temp->data;
 347
 348         urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
 349
 350         return 0;
 351 }
 352
 353 static int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
 354                                       gfp_t mem_flags)
 355 {
 356         int ret;
 357
 358         ret = alloc_dma_aligned_buffer(urb, mem_flags);
 359         if (ret)
 360                 return ret;
 361
 362         ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
 363         if (ret)
 364                 free_dma_aligned_buffer(urb);
 365
 366         return ret;
 367 }
 368
 369 static void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
 370 {
 371         usb_hcd_unmap_urb_for_dma(hcd, urb);
 372         free_dma_aligned_buffer(urb);
 373 }
 374
 375 static const struct hc_driver tegra_ehci_hc_driver = {
 376         .description            = hcd_name,
 377         .product_desc           = "Tegra EHCI Host Controller",
 378         .hcd_priv_size          = sizeof(struct ehci_hcd),
 379         .flags                  = HCD_USB2 | HCD_MEMORY,
 380
 381         /* standard ehci functions */
 382         .irq                    = ehci_irq,
 383         .start                  = ehci_run,
 384         .stop                   = ehci_stop,
 385         .urb_enqueue            = ehci_urb_enqueue,
 386         .urb_dequeue            = ehci_urb_dequeue,
 387         .endpoint_disable       = ehci_endpoint_disable,
 388         .endpoint_reset         = ehci_endpoint_reset,
 389         .get_frame_number       = ehci_get_frame,
 390         .hub_status_data        = ehci_hub_status_data,
 391         .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
 392         .relinquish_port        = ehci_relinquish_port,
 393         .port_handed_over       = ehci_port_handed_over,
 394
 395         /* modified ehci functions for tegra */
 396         .reset                  = tegra_ehci_setup,
 397         .shutdown               = tegra_ehci_shutdown,
 398         .map_urb_for_dma        = tegra_ehci_map_urb_for_dma,
 399         .unmap_urb_for_dma      = tegra_ehci_unmap_urb_for_dma,
 400         .hub_control            = tegra_ehci_hub_control,
 401 #ifdef CONFIG_PM
 402         .bus_suspend            = ehci_bus_suspend,
 403         .bus_resume             = ehci_bus_resume,
 404 #endif
 405 };
 406
 407 static int setup_vbus_gpio(struct platform_device *pdev,
 408                            struct tegra_ehci_platform_data *pdata)
 409 {
 410         int err = 0;
 411         int gpio;
 412
 413         gpio = pdata->vbus_gpio;
 414         if (!gpio_is_valid(gpio))
 415                 gpio = of_get_named_gpio(pdev->dev.of_node,
 416                                          "nvidia,vbus-gpio", 0);
 417         if (!gpio_is_valid(gpio))
 418                 return 0;
 419
 420         err = gpio_request(gpio, "vbus_gpio");
 421         if (err) {
 422                 dev_err(&pdev->dev, "can't request vbus gpio %d", gpio);
 423                 return err;
 424         }
 425         err = gpio_direction_output(gpio, 1);
 426         if (err) {
 427                 dev_err(&pdev->dev, "can't enable vbus\n");
 428                 return err;
 429         }
 430
 431         return err;
 432 }
 433
 434 #ifdef CONFIG_PM
 435
 436 static int controller_suspend(struct device *dev)
 437 {
 438         struct tegra_ehci_hcd *tegra =
 439                         platform_get_drvdata(to_platform_device(dev));
 440         struct ehci_hcd *ehci = tegra->ehci;
 441         struct usb_hcd *hcd = ehci_to_hcd(ehci);
 442         struct ehci_regs __iomem *hw = ehci->regs;
 443         unsigned long flags;
 444
 445         if (time_before(jiffies, ehci->next_statechange))
 446                 msleep(10);
 447
 448         ehci_halt(ehci);
 449
 450         spin_lock_irqsave(&ehci->lock, flags);
 451         tegra->port_speed = (readl(&hw->port_status[0]) >> 26) & 0x3;
 452         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 453         spin_unlock_irqrestore(&ehci->lock, flags);
 454
 455         tegra_ehci_power_down(hcd);
 456         return 0;
 457 }
 458
 459 static int controller_resume(struct device *dev)
 460 {
 461         struct tegra_ehci_hcd *tegra =
 462                         platform_get_drvdata(to_platform_device(dev));
 463         struct ehci_hcd *ehci = tegra->ehci;
 464         struct usb_hcd *hcd = ehci_to_hcd(ehci);
 465         struct ehci_regs __iomem *hw = ehci->regs;
 466         unsigned long val;
 467
 468         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 469         tegra_ehci_power_up(hcd);
 470
 471         if (tegra->port_speed > TEGRA_USB_PHY_PORT_SPEED_HIGH) {
 472                 /* Wait for the phy to detect new devices
 473                  * before we restart the controller */
 474                 msleep(10);
 475                 goto restart;
 476         }
 477
 478         /* Force the phy to keep data lines in suspend state */
 479         tegra_ehci_phy_restore_start(tegra->phy, tegra->port_speed);
 480
 481         /* Enable host mode */
 482         tdi_reset(ehci);
 483
 484         /* Enable Port Power */
 485         val = readl(&hw->port_status[0]);
 486         val |= PORT_POWER;
 487         writel(val, &hw->port_status[0]);
 488         udelay(10);
 489
 490         /* Check if the phy resume from LP0. When the phy resume from LP0
 491          * USB register will be reset. */
 492         if (!readl(&hw->async_next)) {
 493                 /* Program the field PTC based on the saved speed mode */
 494                 val = readl(&hw->port_status[0]);
 495                 val &= ~PORT_TEST(~0);
 496                 if (tegra->port_speed == TEGRA_USB_PHY_PORT_SPEED_HIGH)
 497                         val |= PORT_TEST_FORCE;
 498                 else if (tegra->port_speed == TEGRA_USB_PHY_PORT_SPEED_FULL)
 499                         val |= PORT_TEST(6);
 500                 else if (tegra->port_speed == TEGRA_USB_PHY_PORT_SPEED_LOW)
 501                         val |= PORT_TEST(7);
 502                 writel(val, &hw->port_status[0]);
 503                 udelay(10);
 504
 505                 /* Disable test mode by setting PTC field to NORMAL_OP */
 506                 val = readl(&hw->port_status[0]);
 507                 val &= ~PORT_TEST(~0);
 508                 writel(val, &hw->port_status[0]);
 509                 udelay(10);
 510         }
 511
 512         /* Poll until CCS is enabled */
 513         if (handshake(ehci, &hw->port_status[0], PORT_CONNECT,
 514                                                  PORT_CONNECT, 2000)) {
 515                 pr_err("%s: timeout waiting for PORT_CONNECT\n", __func__);
 516                 goto restart;
 517         }
 518
 519         /* Poll until PE is enabled */
 520         if (handshake(ehci, &hw->port_status[0], PORT_PE,
 521                                                  PORT_PE, 2000)) {
 522                 pr_err("%s: timeout waiting for USB_PORTSC1_PE\n", __func__);
 523                 goto restart;
 524         }
 525
 526         /* Clear the PCI status, to avoid an interrupt taken upon resume */
 527         val = readl(&hw->status);
 528         val |= STS_PCD;
 529         writel(val, &hw->status);
 530
 531         /* Put controller in suspend mode by writing 1 to SUSP bit of PORTSC */
 532         val = readl(&hw->port_status[0]);
 533         if ((val & PORT_POWER) && (val & PORT_PE)) {
 534                 val |= PORT_SUSPEND;
 535                 writel(val, &hw->port_status[0]);
 536
 537                 /* Wait until port suspend completes */
 538                 if (handshake(ehci, &hw->port_status[0], PORT_SUSPEND,
 539                                                          PORT_SUSPEND, 1000)) {
 540                         pr_err("%s: timeout waiting for PORT_SUSPEND\n",
 541                                                                 __func__);
 542                         goto restart;
 543                 }
 544         }
 545
 546         tegra_ehci_phy_restore_end(tegra->phy);
 547         goto done;
 548
 549  restart:
 550         if (tegra->port_speed <= TEGRA_USB_PHY_PORT_SPEED_HIGH)
 551                 tegra_ehci_phy_restore_end(tegra->phy);
 552
 553         tegra_ehci_restart(hcd);
 554
 555  done:
 556         tegra_usb_phy_preresume(tegra->phy);
 557         tegra->port_resuming = 1;
 558         return 0;
 559 }
 560
 561 static int tegra_ehci_suspend(struct device *dev)
 562 {
 563         struct tegra_ehci_hcd *tegra =
 564                         platform_get_drvdata(to_platform_device(dev));
 565         struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci);
 566         int rc = 0;
 567
 568         /*
 569          * When system sleep is supported and USB controller wakeup is
 570          * implemented: If the controller is runtime-suspended and the
 571          * wakeup setting needs to be changed, call pm_runtime_resume().
 572          */
 573         if (HCD_HW_ACCESSIBLE(hcd))
 574                 rc = controller_suspend(dev);
 575         return rc;
 576 }
 577
 578 static int tegra_ehci_resume(struct device *dev)
 579 {
 580         int rc;
 581
 582         rc = controller_resume(dev);
 583         if (rc == 0) {
 584                 pm_runtime_disable(dev);
 585                 pm_runtime_set_active(dev);
 586                 pm_runtime_enable(dev);
 587         }
 588         return rc;
 589 }
 590
 591 static int tegra_ehci_runtime_suspend(struct device *dev)
 592 {
 593         return controller_suspend(dev);
 594 }
 595
 596 static int tegra_ehci_runtime_resume(struct device *dev)
 597 {
 598         return controller_resume(dev);
 599 }
 600
 601 static const struct dev_pm_ops tegra_ehci_pm_ops = {
 602         .suspend        = tegra_ehci_suspend,
 603         .resume         = tegra_ehci_resume,
 604         .runtime_suspend = tegra_ehci_runtime_suspend,
 605         .runtime_resume = tegra_ehci_runtime_resume,
 606 };
 607
 608 #endif
 609
 610 static u64 tegra_ehci_dma_mask = DMA_BIT_MASK(32);
 611
 612 static int tegra_ehci_probe(struct platform_device *pdev)
 613 {
 614         struct resource *res;
 615         struct usb_hcd *hcd;
 616         struct tegra_ehci_hcd *tegra;
 617         struct tegra_ehci_platform_data *pdata;
 618         int err = 0;
 619         int irq;
 620         int instance = pdev->id;
 621
 622         pdata = pdev->dev.platform_data;
 623         if (!pdata) {
 624                 dev_err(&pdev->dev, "Platform data missing\n");
 625                 return -EINVAL;
 626         }
 627
 628         /* Right now device-tree probed devices don't get dma_mask set.
 629          * Since shared usb code relies on it, set it here for now.
 630          * Once we have dma capability bindings this can go away.
 631          */
 632         if (!pdev->dev.dma_mask)
 633                 pdev->dev.dma_mask = &tegra_ehci_dma_mask;
 634
 635         setup_vbus_gpio(pdev, pdata);
 636
 637         tegra = kzalloc(sizeof(struct tegra_ehci_hcd), GFP_KERNEL);
 638         if (!tegra)
 639                 return -ENOMEM;
 640
 641         hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev,
 642                                         dev_name(&pdev->dev));
 643         if (!hcd) {
 644                 dev_err(&pdev->dev, "Unable to create HCD\n");
 645                 err = -ENOMEM;
 646                 goto fail_hcd;
 647         }
 648
 649         platform_set_drvdata(pdev, tegra);
 650
 651         tegra->clk = clk_get(&pdev->dev, NULL);
 652         if (IS_ERR(tegra->clk)) {
 653                 dev_err(&pdev->dev, "Can't get ehci clock\n");
 654                 err = PTR_ERR(tegra->clk);
 655                 goto fail_clk;
 656         }
 657
 658         err = clk_prepare_enable(tegra->clk);
 659         if (err)
 660                 goto fail_clken;
 661
 662         tegra->emc_clk = clk_get(&pdev->dev, "emc");
 663         if (IS_ERR(tegra->emc_clk)) {
 664                 dev_err(&pdev->dev, "Can't get emc clock\n");
 665                 err = PTR_ERR(tegra->emc_clk);
 666                 goto fail_emc_clk;
 667         }
 668
 669         clk_prepare_enable(tegra->emc_clk);
 670         clk_set_rate(tegra->emc_clk, 400000000);
 671
 672         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 673         if (!res) {
 674                 dev_err(&pdev->dev, "Failed to get I/O memory\n");
 675                 err = -ENXIO;
 676                 goto fail_io;
 677         }
 678         hcd->rsrc_start = res->start;
 679         hcd->rsrc_len = resource_size(res);
 680         hcd->regs = ioremap(res->start, resource_size(res));
 681         if (!hcd->regs) {
 682                 dev_err(&pdev->dev, "Failed to remap I/O memory\n");
 683                 err = -ENOMEM;
 684                 goto fail_io;
 685         }
 686
 687         /* This is pretty ugly and needs to be fixed when we do only
 688          * device-tree probing. Old code relies on the platform_device
 689          * numbering that we lack for device-tree-instantiated devices.
 690          */
 691         if (instance < 0) {
 692                 switch (res->start) {
 693                 case TEGRA_USB_BASE:
 694                         instance = 0;
 695                         break;
 696                 case TEGRA_USB2_BASE:
 697                         instance = 1;
 698                         break;
 699                 case TEGRA_USB3_BASE:
 700                         instance = 2;
 701                         break;
 702                 default:
 703                         err = -ENODEV;
 704                         dev_err(&pdev->dev, "unknown usb instance\n");
 705                         goto fail_phy;
 706                 }
 707         }
 708
 709         tegra->phy = tegra_usb_phy_open(&pdev->dev, instance, hcd->regs,
 710                                         pdata->phy_config,
 711                                         TEGRA_USB_PHY_MODE_HOST);
 712         if (IS_ERR(tegra->phy)) {
 713                 dev_err(&pdev->dev, "Failed to open USB phy\n");
 714                 err = -ENXIO;
 715                 goto fail_phy;
 716         }
 717
 718         usb_phy_init(&tegra->phy->u_phy);
 719
 720         err = usb_phy_set_suspend(&tegra->phy->u_phy, 0);
 721         if (err) {
 722                 dev_err(&pdev->dev, "Failed to power on the phy\n");
 723                 goto fail;
 724         }
 725
 726         tegra->host_resumed = 1;
 727         tegra->ehci = hcd_to_ehci(hcd);
 728
 729         irq = platform_get_irq(pdev, 0);
 730         if (!irq) {
 731                 dev_err(&pdev->dev, "Failed to get IRQ\n");
 732                 err = -ENODEV;
 733                 goto fail;
 734         }
 735
 736 #ifdef CONFIG_USB_OTG_UTILS
 737         if (pdata->operating_mode == TEGRA_USB_OTG) {
 738                 tegra->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
 739                 if (!IS_ERR_OR_NULL(tegra->transceiver))
 740                         otg_set_host(tegra->transceiver->otg, &hcd->self);
 741         }
 742 #endif
 743
 744         err = usb_add_hcd(hcd, irq, IRQF_SHARED);
 745         if (err) {
 746                 dev_err(&pdev->dev, "Failed to add USB HCD\n");
 747                 goto fail;
 748         }
 749
 750         pm_runtime_set_active(&pdev->dev);
 751         pm_runtime_get_noresume(&pdev->dev);
 752
 753         /* Don't skip the pm_runtime_forbid call if wakeup isn't working */
 754         /* if (!pdata->power_down_on_bus_suspend) */
 755                 pm_runtime_forbid(&pdev->dev);
 756         pm_runtime_enable(&pdev->dev);
 757         pm_runtime_put_sync(&pdev->dev);
 758         return err;
 759
 760 fail:
 761 #ifdef CONFIG_USB_OTG_UTILS
 762         if (!IS_ERR_OR_NULL(tegra->transceiver)) {
 763                 otg_set_host(tegra->transceiver->otg, NULL);
 764                 usb_put_phy(tegra->transceiver);
 765         }
 766 #endif
 767         usb_phy_shutdown(&tegra->phy->u_phy);
 768 fail_phy:
 769         iounmap(hcd->regs);
 770 fail_io:
 771         clk_disable_unprepare(tegra->emc_clk);
 772         clk_put(tegra->emc_clk);
 773 fail_emc_clk:
 774         clk_disable_unprepare(tegra->clk);
 775 fail_clken:
 776         clk_put(tegra->clk);
 777 fail_clk:
 778         usb_put_hcd(hcd);
 779 fail_hcd:
 780         kfree(tegra);
 781         return err;
 782 }
 783
 784 static int tegra_ehci_remove(struct platform_device *pdev)
 785 {
 786         struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev);
 787         struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci);
 788
 789         if (tegra == NULL || hcd == NULL)
 790                 return -EINVAL;
 791
 792         pm_runtime_get_sync(&pdev->dev);
 793         pm_runtime_disable(&pdev->dev);
 794         pm_runtime_put_noidle(&pdev->dev);
 795
 796 #ifdef CONFIG_USB_OTG_UTILS
 797         if (!IS_ERR_OR_NULL(tegra->transceiver)) {
 798                 otg_set_host(tegra->transceiver->otg, NULL);
 799                 usb_put_phy(tegra->transceiver);
 800         }
 801 #endif
 802
 803         usb_remove_hcd(hcd);
 804         usb_put_hcd(hcd);
 805
 806         usb_phy_shutdown(&tegra->phy->u_phy);
 807         iounmap(hcd->regs);
 808
 809         clk_disable_unprepare(tegra->clk);
 810         clk_put(tegra->clk);
 811
 812         clk_disable_unprepare(tegra->emc_clk);
 813         clk_put(tegra->emc_clk);
 814
 815         kfree(tegra);
 816         return 0;
 817 }
 818
 819 static void tegra_ehci_hcd_shutdown(struct platform_device *pdev)
 820 {
 821         struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev);
 822         struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci);
 823
 824         if (hcd->driver->shutdown)
 825                 hcd->driver->shutdown(hcd);
 826 }
 827
 828 static struct of_device_id tegra_ehci_of_match[] __devinitdata = {
 829         { .compatible = "nvidia,tegra20-ehci", },
 830         { },
 831 };
 832
 833 static struct platform_driver tegra_ehci_driver = {
 834         .probe          = tegra_ehci_probe,
 835         .remove         = tegra_ehci_remove,
 836         .shutdown       = tegra_ehci_hcd_shutdown,
 837         .driver         = {
 838                 .name   = "tegra-ehci",
 839                 .of_match_table = tegra_ehci_of_match,
 840 #ifdef CONFIG_PM
 841                 .pm     = &tegra_ehci_pm_ops,
 842 #endif
 843         }
 844 };