32d23e1301b83c6e5caa17bdd98252ecbbdeb954
[cascardo/linux.git] / drivers / usb / host / xhci.c
1 /*
2  * xHCI host controller driver
3  *
4  * Copyright (C) 2008 Intel Corp.
5  *
6  * Author: Sarah Sharp
7  * Some code borrowed from the Linux EHCI driver.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
31
32 #include "xhci.h"
33 #include "xhci-trace.h"
34 #include "xhci-mtk.h"
35
36 #define DRIVER_AUTHOR "Sarah Sharp"
37 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38
39 #define PORT_WAKE_BITS  (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
40
41 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
42 static int link_quirk;
43 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
44 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
45
46 static unsigned int quirks;
47 module_param(quirks, uint, S_IRUGO);
48 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
49
50 /* TODO: copied from ehci-hcd.c - can this be refactored? */
51 /*
52  * xhci_handshake - spin reading hc until handshake completes or fails
53  * @ptr: address of hc register to be read
54  * @mask: bits to look at in result of read
55  * @done: value of those bits when handshake succeeds
56  * @usec: timeout in microseconds
57  *
58  * Returns negative errno, or zero on success
59  *
60  * Success happens when the "mask" bits have the specified value (hardware
61  * handshake done).  There are two failure modes:  "usec" have passed (major
62  * hardware flakeout), or the register reads as all-ones (hardware removed).
63  */
64 int xhci_handshake(void __iomem *ptr, u32 mask, u32 done, int usec)
65 {
66         u32     result;
67
68         do {
69                 result = readl(ptr);
70                 if (result == ~(u32)0)          /* card removed */
71                         return -ENODEV;
72                 result &= mask;
73                 if (result == done)
74                         return 0;
75                 udelay(1);
76                 usec--;
77         } while (usec > 0);
78         return -ETIMEDOUT;
79 }
80
81 /*
82  * Disable interrupts and begin the xHCI halting process.
83  */
84 void xhci_quiesce(struct xhci_hcd *xhci)
85 {
86         u32 halted;
87         u32 cmd;
88         u32 mask;
89
90         mask = ~(XHCI_IRQS);
91         halted = readl(&xhci->op_regs->status) & STS_HALT;
92         if (!halted)
93                 mask &= ~CMD_RUN;
94
95         cmd = readl(&xhci->op_regs->command);
96         cmd &= mask;
97         writel(cmd, &xhci->op_regs->command);
98 }
99
100 /*
101  * Force HC into halt state.
102  *
103  * Disable any IRQs and clear the run/stop bit.
104  * HC will complete any current and actively pipelined transactions, and
105  * should halt within 16 ms of the run/stop bit being cleared.
106  * Read HC Halted bit in the status register to see when the HC is finished.
107  */
108 int xhci_halt(struct xhci_hcd *xhci)
109 {
110         int ret;
111         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
112         xhci_quiesce(xhci);
113
114         ret = xhci_handshake(&xhci->op_regs->status,
115                         STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
116         if (!ret) {
117                 xhci->xhc_state |= XHCI_STATE_HALTED;
118                 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
119         } else
120                 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
121                                 XHCI_MAX_HALT_USEC);
122         return ret;
123 }
124
125 /*
126  * Set the run bit and wait for the host to be running.
127  */
128 static int xhci_start(struct xhci_hcd *xhci)
129 {
130         u32 temp;
131         int ret;
132
133         temp = readl(&xhci->op_regs->command);
134         temp |= (CMD_RUN);
135         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
136                         temp);
137         writel(temp, &xhci->op_regs->command);
138
139         /*
140          * Wait for the HCHalted Status bit to be 0 to indicate the host is
141          * running.
142          */
143         ret = xhci_handshake(&xhci->op_regs->status,
144                         STS_HALT, 0, XHCI_MAX_HALT_USEC);
145         if (ret == -ETIMEDOUT)
146                 xhci_err(xhci, "Host took too long to start, "
147                                 "waited %u microseconds.\n",
148                                 XHCI_MAX_HALT_USEC);
149         if (!ret)
150                 xhci->xhc_state &= ~(XHCI_STATE_HALTED | XHCI_STATE_DYING);
151
152         return ret;
153 }
154
155 /*
156  * Reset a halted HC.
157  *
158  * This resets pipelines, timers, counters, state machines, etc.
159  * Transactions will be terminated immediately, and operational registers
160  * will be set to their defaults.
161  */
162 int xhci_reset(struct xhci_hcd *xhci)
163 {
164         u32 command;
165         u32 state;
166         int ret, i;
167
168         state = readl(&xhci->op_regs->status);
169         if ((state & STS_HALT) == 0) {
170                 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
171                 return 0;
172         }
173
174         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
175         command = readl(&xhci->op_regs->command);
176         command |= CMD_RESET;
177         writel(command, &xhci->op_regs->command);
178
179         /* Existing Intel xHCI controllers require a delay of 1 mS,
180          * after setting the CMD_RESET bit, and before accessing any
181          * HC registers. This allows the HC to complete the
182          * reset operation and be ready for HC register access.
183          * Without this delay, the subsequent HC register access,
184          * may result in a system hang very rarely.
185          */
186         if (xhci->quirks & XHCI_INTEL_HOST)
187                 udelay(1000);
188
189         ret = xhci_handshake(&xhci->op_regs->command,
190                         CMD_RESET, 0, 10 * 1000 * 1000);
191         if (ret)
192                 return ret;
193
194         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
195                          "Wait for controller to be ready for doorbell rings");
196         /*
197          * xHCI cannot write to any doorbells or operational registers other
198          * than status until the "Controller Not Ready" flag is cleared.
199          */
200         ret = xhci_handshake(&xhci->op_regs->status,
201                         STS_CNR, 0, 10 * 1000 * 1000);
202
203         for (i = 0; i < 2; ++i) {
204                 xhci->bus_state[i].port_c_suspend = 0;
205                 xhci->bus_state[i].suspended_ports = 0;
206                 xhci->bus_state[i].resuming_ports = 0;
207         }
208
209         return ret;
210 }
211
212 #ifdef CONFIG_PCI
213 static int xhci_free_msi(struct xhci_hcd *xhci)
214 {
215         int i;
216
217         if (!xhci->msix_entries)
218                 return -EINVAL;
219
220         for (i = 0; i < xhci->msix_count; i++)
221                 if (xhci->msix_entries[i].vector)
222                         free_irq(xhci->msix_entries[i].vector,
223                                         xhci_to_hcd(xhci));
224         return 0;
225 }
226
227 /*
228  * Set up MSI
229  */
230 static int xhci_setup_msi(struct xhci_hcd *xhci)
231 {
232         int ret;
233         struct pci_dev  *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
234
235         ret = pci_enable_msi(pdev);
236         if (ret) {
237                 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
238                                 "failed to allocate MSI entry");
239                 return ret;
240         }
241
242         ret = request_irq(pdev->irq, xhci_msi_irq,
243                                 0, "xhci_hcd", xhci_to_hcd(xhci));
244         if (ret) {
245                 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
246                                 "disable MSI interrupt");
247                 pci_disable_msi(pdev);
248         }
249
250         return ret;
251 }
252
253 /*
254  * Free IRQs
255  * free all IRQs request
256  */
257 static void xhci_free_irq(struct xhci_hcd *xhci)
258 {
259         struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
260         int ret;
261
262         /* return if using legacy interrupt */
263         if (xhci_to_hcd(xhci)->irq > 0)
264                 return;
265
266         ret = xhci_free_msi(xhci);
267         if (!ret)
268                 return;
269         if (pdev->irq > 0)
270                 free_irq(pdev->irq, xhci_to_hcd(xhci));
271
272         return;
273 }
274
275 /*
276  * Set up MSI-X
277  */
278 static int xhci_setup_msix(struct xhci_hcd *xhci)
279 {
280         int i, ret = 0;
281         struct usb_hcd *hcd = xhci_to_hcd(xhci);
282         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
283
284         /*
285          * calculate number of msi-x vectors supported.
286          * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
287          *   with max number of interrupters based on the xhci HCSPARAMS1.
288          * - num_online_cpus: maximum msi-x vectors per CPUs core.
289          *   Add additional 1 vector to ensure always available interrupt.
290          */
291         xhci->msix_count = min(num_online_cpus() + 1,
292                                 HCS_MAX_INTRS(xhci->hcs_params1));
293
294         xhci->msix_entries =
295                 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
296                                 GFP_KERNEL);
297         if (!xhci->msix_entries) {
298                 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
299                 return -ENOMEM;
300         }
301
302         for (i = 0; i < xhci->msix_count; i++) {
303                 xhci->msix_entries[i].entry = i;
304                 xhci->msix_entries[i].vector = 0;
305         }
306
307         ret = pci_enable_msix_exact(pdev, xhci->msix_entries, xhci->msix_count);
308         if (ret) {
309                 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
310                                 "Failed to enable MSI-X");
311                 goto free_entries;
312         }
313
314         for (i = 0; i < xhci->msix_count; i++) {
315                 ret = request_irq(xhci->msix_entries[i].vector,
316                                 xhci_msi_irq,
317                                 0, "xhci_hcd", xhci_to_hcd(xhci));
318                 if (ret)
319                         goto disable_msix;
320         }
321
322         hcd->msix_enabled = 1;
323         return ret;
324
325 disable_msix:
326         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
327         xhci_free_irq(xhci);
328         pci_disable_msix(pdev);
329 free_entries:
330         kfree(xhci->msix_entries);
331         xhci->msix_entries = NULL;
332         return ret;
333 }
334
335 /* Free any IRQs and disable MSI-X */
336 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
337 {
338         struct usb_hcd *hcd = xhci_to_hcd(xhci);
339         struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
340
341         if (xhci->quirks & XHCI_PLAT)
342                 return;
343
344         xhci_free_irq(xhci);
345
346         if (xhci->msix_entries) {
347                 pci_disable_msix(pdev);
348                 kfree(xhci->msix_entries);
349                 xhci->msix_entries = NULL;
350         } else {
351                 pci_disable_msi(pdev);
352         }
353
354         hcd->msix_enabled = 0;
355         return;
356 }
357
358 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
359 {
360         int i;
361
362         if (xhci->msix_entries) {
363                 for (i = 0; i < xhci->msix_count; i++)
364                         synchronize_irq(xhci->msix_entries[i].vector);
365         }
366 }
367
368 static int xhci_try_enable_msi(struct usb_hcd *hcd)
369 {
370         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
371         struct pci_dev  *pdev;
372         int ret;
373
374         /* The xhci platform device has set up IRQs through usb_add_hcd. */
375         if (xhci->quirks & XHCI_PLAT)
376                 return 0;
377
378         pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
379         /*
380          * Some Fresco Logic host controllers advertise MSI, but fail to
381          * generate interrupts.  Don't even try to enable MSI.
382          */
383         if (xhci->quirks & XHCI_BROKEN_MSI)
384                 goto legacy_irq;
385
386         /* unregister the legacy interrupt */
387         if (hcd->irq)
388                 free_irq(hcd->irq, hcd);
389         hcd->irq = 0;
390
391         ret = xhci_setup_msix(xhci);
392         if (ret)
393                 /* fall back to msi*/
394                 ret = xhci_setup_msi(xhci);
395
396         if (!ret)
397                 /* hcd->irq is 0, we have MSI */
398                 return 0;
399
400         if (!pdev->irq) {
401                 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
402                 return -EINVAL;
403         }
404
405  legacy_irq:
406         if (!strlen(hcd->irq_descr))
407                 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
408                          hcd->driver->description, hcd->self.busnum);
409
410         /* fall back to legacy interrupt*/
411         ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
412                         hcd->irq_descr, hcd);
413         if (ret) {
414                 xhci_err(xhci, "request interrupt %d failed\n",
415                                 pdev->irq);
416                 return ret;
417         }
418         hcd->irq = pdev->irq;
419         return 0;
420 }
421
422 #else
423
424 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
425 {
426         return 0;
427 }
428
429 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
430 {
431 }
432
433 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
434 {
435 }
436
437 #endif
438
439 static void compliance_mode_recovery(unsigned long arg)
440 {
441         struct xhci_hcd *xhci;
442         struct usb_hcd *hcd;
443         u32 temp;
444         int i;
445
446         xhci = (struct xhci_hcd *)arg;
447
448         for (i = 0; i < xhci->num_usb3_ports; i++) {
449                 temp = readl(xhci->usb3_ports[i]);
450                 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
451                         /*
452                          * Compliance Mode Detected. Letting USB Core
453                          * handle the Warm Reset
454                          */
455                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
456                                         "Compliance mode detected->port %d",
457                                         i + 1);
458                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
459                                         "Attempting compliance mode recovery");
460                         hcd = xhci->shared_hcd;
461
462                         if (hcd->state == HC_STATE_SUSPENDED)
463                                 usb_hcd_resume_root_hub(hcd);
464
465                         usb_hcd_poll_rh_status(hcd);
466                 }
467         }
468
469         if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
470                 mod_timer(&xhci->comp_mode_recovery_timer,
471                         jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
472 }
473
474 /*
475  * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
476  * that causes ports behind that hardware to enter compliance mode sometimes.
477  * The quirk creates a timer that polls every 2 seconds the link state of
478  * each host controller's port and recovers it by issuing a Warm reset
479  * if Compliance mode is detected, otherwise the port will become "dead" (no
480  * device connections or disconnections will be detected anymore). Becasue no
481  * status event is generated when entering compliance mode (per xhci spec),
482  * this quirk is needed on systems that have the failing hardware installed.
483  */
484 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
485 {
486         xhci->port_status_u0 = 0;
487         setup_timer(&xhci->comp_mode_recovery_timer,
488                     compliance_mode_recovery, (unsigned long)xhci);
489         xhci->comp_mode_recovery_timer.expires = jiffies +
490                         msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
491
492         set_timer_slack(&xhci->comp_mode_recovery_timer,
493                         msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
494         add_timer(&xhci->comp_mode_recovery_timer);
495         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
496                         "Compliance mode recovery timer initialized");
497 }
498
499 /*
500  * This function identifies the systems that have installed the SN65LVPE502CP
501  * USB3.0 re-driver and that need the Compliance Mode Quirk.
502  * Systems:
503  * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
504  */
505 static bool xhci_compliance_mode_recovery_timer_quirk_check(void)
506 {
507         const char *dmi_product_name, *dmi_sys_vendor;
508
509         dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
510         dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
511         if (!dmi_product_name || !dmi_sys_vendor)
512                 return false;
513
514         if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
515                 return false;
516
517         if (strstr(dmi_product_name, "Z420") ||
518                         strstr(dmi_product_name, "Z620") ||
519                         strstr(dmi_product_name, "Z820") ||
520                         strstr(dmi_product_name, "Z1 Workstation"))
521                 return true;
522
523         return false;
524 }
525
526 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
527 {
528         return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
529 }
530
531
532 /*
533  * Initialize memory for HCD and xHC (one-time init).
534  *
535  * Program the PAGESIZE register, initialize the device context array, create
536  * device contexts (?), set up a command ring segment (or two?), create event
537  * ring (one for now).
538  */
539 int xhci_init(struct usb_hcd *hcd)
540 {
541         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
542         int retval = 0;
543
544         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
545         spin_lock_init(&xhci->lock);
546         if (xhci->hci_version == 0x95 && link_quirk) {
547                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
548                                 "QUIRK: Not clearing Link TRB chain bits.");
549                 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
550         } else {
551                 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
552                                 "xHCI doesn't need link TRB QUIRK");
553         }
554         retval = xhci_mem_init(xhci, GFP_KERNEL);
555         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
556
557         /* Initializing Compliance Mode Recovery Data If Needed */
558         if (xhci_compliance_mode_recovery_timer_quirk_check()) {
559                 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
560                 compliance_mode_recovery_timer_init(xhci);
561         }
562
563         return retval;
564 }
565
566 /*-------------------------------------------------------------------------*/
567
568
569 static int xhci_run_finished(struct xhci_hcd *xhci)
570 {
571         if (xhci_start(xhci)) {
572                 xhci_halt(xhci);
573                 return -ENODEV;
574         }
575         xhci->shared_hcd->state = HC_STATE_RUNNING;
576         xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
577
578         if (xhci->quirks & XHCI_NEC_HOST)
579                 xhci_ring_cmd_db(xhci);
580
581         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
582                         "Finished xhci_run for USB3 roothub");
583         return 0;
584 }
585
586 /*
587  * Start the HC after it was halted.
588  *
589  * This function is called by the USB core when the HC driver is added.
590  * Its opposite is xhci_stop().
591  *
592  * xhci_init() must be called once before this function can be called.
593  * Reset the HC, enable device slot contexts, program DCBAAP, and
594  * set command ring pointer and event ring pointer.
595  *
596  * Setup MSI-X vectors and enable interrupts.
597  */
598 int xhci_run(struct usb_hcd *hcd)
599 {
600         u32 temp;
601         u64 temp_64;
602         int ret;
603         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
604
605         /* Start the xHCI host controller running only after the USB 2.0 roothub
606          * is setup.
607          */
608
609         hcd->uses_new_polling = 1;
610         if (!usb_hcd_is_primary_hcd(hcd))
611                 return xhci_run_finished(xhci);
612
613         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
614
615         ret = xhci_try_enable_msi(hcd);
616         if (ret)
617                 return ret;
618
619         xhci_dbg(xhci, "Command ring memory map follows:\n");
620         xhci_debug_ring(xhci, xhci->cmd_ring);
621         xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
622         xhci_dbg_cmd_ptrs(xhci);
623
624         xhci_dbg(xhci, "ERST memory map follows:\n");
625         xhci_dbg_erst(xhci, &xhci->erst);
626         xhci_dbg(xhci, "Event ring:\n");
627         xhci_debug_ring(xhci, xhci->event_ring);
628         xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
629         temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
630         temp_64 &= ~ERST_PTR_MASK;
631         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
632                         "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
633
634         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
635                         "// Set the interrupt modulation register");
636         temp = readl(&xhci->ir_set->irq_control);
637         temp &= ~ER_IRQ_INTERVAL_MASK;
638         /*
639          * the increment interval is 8 times as much as that defined
640          * in xHCI spec on MTK's controller
641          */
642         temp |= (u32) ((xhci->quirks & XHCI_MTK_HOST) ? 20 : 160);
643         writel(temp, &xhci->ir_set->irq_control);
644
645         /* Set the HCD state before we enable the irqs */
646         temp = readl(&xhci->op_regs->command);
647         temp |= (CMD_EIE);
648         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
649                         "// Enable interrupts, cmd = 0x%x.", temp);
650         writel(temp, &xhci->op_regs->command);
651
652         temp = readl(&xhci->ir_set->irq_pending);
653         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
654                         "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
655                         xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
656         writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
657         xhci_print_ir_set(xhci, 0);
658
659         if (xhci->quirks & XHCI_NEC_HOST) {
660                 struct xhci_command *command;
661                 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
662                 if (!command)
663                         return -ENOMEM;
664                 xhci_queue_vendor_command(xhci, command, 0, 0, 0,
665                                 TRB_TYPE(TRB_NEC_GET_FW));
666         }
667         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
668                         "Finished xhci_run for USB2 roothub");
669         return 0;
670 }
671 EXPORT_SYMBOL_GPL(xhci_run);
672
673 /*
674  * Stop xHCI driver.
675  *
676  * This function is called by the USB core when the HC driver is removed.
677  * Its opposite is xhci_run().
678  *
679  * Disable device contexts, disable IRQs, and quiesce the HC.
680  * Reset the HC, finish any completed transactions, and cleanup memory.
681  */
682 void xhci_stop(struct usb_hcd *hcd)
683 {
684         u32 temp;
685         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
686
687         if (xhci->xhc_state & XHCI_STATE_HALTED)
688                 return;
689
690         mutex_lock(&xhci->mutex);
691         spin_lock_irq(&xhci->lock);
692         xhci->xhc_state |= XHCI_STATE_HALTED;
693         xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
694
695         /* Make sure the xHC is halted for a USB3 roothub
696          * (xhci_stop() could be called as part of failed init).
697          */
698         xhci_halt(xhci);
699         xhci_reset(xhci);
700         spin_unlock_irq(&xhci->lock);
701
702         xhci_cleanup_msix(xhci);
703
704         /* Deleting Compliance Mode Recovery Timer */
705         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
706                         (!(xhci_all_ports_seen_u0(xhci)))) {
707                 del_timer_sync(&xhci->comp_mode_recovery_timer);
708                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
709                                 "%s: compliance mode recovery timer deleted",
710                                 __func__);
711         }
712
713         if (xhci->quirks & XHCI_AMD_PLL_FIX)
714                 usb_amd_dev_put();
715
716         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
717                         "// Disabling event ring interrupts");
718         temp = readl(&xhci->op_regs->status);
719         writel(temp & ~STS_EINT, &xhci->op_regs->status);
720         temp = readl(&xhci->ir_set->irq_pending);
721         writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
722         xhci_print_ir_set(xhci, 0);
723
724         xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
725         xhci_mem_cleanup(xhci);
726         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
727                         "xhci_stop completed - status = %x",
728                         readl(&xhci->op_regs->status));
729         mutex_unlock(&xhci->mutex);
730 }
731
732 /*
733  * Shutdown HC (not bus-specific)
734  *
735  * This is called when the machine is rebooting or halting.  We assume that the
736  * machine will be powered off, and the HC's internal state will be reset.
737  * Don't bother to free memory.
738  *
739  * This will only ever be called with the main usb_hcd (the USB3 roothub).
740  */
741 void xhci_shutdown(struct usb_hcd *hcd)
742 {
743         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
744
745         if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
746                 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
747
748         spin_lock_irq(&xhci->lock);
749         xhci_halt(xhci);
750         /* Workaround for spurious wakeups at shutdown with HSW */
751         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
752                 xhci_reset(xhci);
753         spin_unlock_irq(&xhci->lock);
754
755         xhci_cleanup_msix(xhci);
756
757         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
758                         "xhci_shutdown completed - status = %x",
759                         readl(&xhci->op_regs->status));
760
761         /* Yet another workaround for spurious wakeups at shutdown with HSW */
762         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
763                 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
764 }
765
766 #ifdef CONFIG_PM
767 static void xhci_save_registers(struct xhci_hcd *xhci)
768 {
769         xhci->s3.command = readl(&xhci->op_regs->command);
770         xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
771         xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
772         xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
773         xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
774         xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
775         xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
776         xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
777         xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
778 }
779
780 static void xhci_restore_registers(struct xhci_hcd *xhci)
781 {
782         writel(xhci->s3.command, &xhci->op_regs->command);
783         writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
784         xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
785         writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
786         writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
787         xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
788         xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
789         writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
790         writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
791 }
792
793 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
794 {
795         u64     val_64;
796
797         /* step 2: initialize command ring buffer */
798         val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
799         val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
800                 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
801                                       xhci->cmd_ring->dequeue) &
802                  (u64) ~CMD_RING_RSVD_BITS) |
803                 xhci->cmd_ring->cycle_state;
804         xhci_dbg_trace(xhci, trace_xhci_dbg_init,
805                         "// Setting command ring address to 0x%llx",
806                         (long unsigned long) val_64);
807         xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
808 }
809
810 /*
811  * The whole command ring must be cleared to zero when we suspend the host.
812  *
813  * The host doesn't save the command ring pointer in the suspend well, so we
814  * need to re-program it on resume.  Unfortunately, the pointer must be 64-byte
815  * aligned, because of the reserved bits in the command ring dequeue pointer
816  * register.  Therefore, we can't just set the dequeue pointer back in the
817  * middle of the ring (TRBs are 16-byte aligned).
818  */
819 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
820 {
821         struct xhci_ring *ring;
822         struct xhci_segment *seg;
823
824         ring = xhci->cmd_ring;
825         seg = ring->deq_seg;
826         do {
827                 memset(seg->trbs, 0,
828                         sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
829                 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
830                         cpu_to_le32(~TRB_CYCLE);
831                 seg = seg->next;
832         } while (seg != ring->deq_seg);
833
834         /* Reset the software enqueue and dequeue pointers */
835         ring->deq_seg = ring->first_seg;
836         ring->dequeue = ring->first_seg->trbs;
837         ring->enq_seg = ring->deq_seg;
838         ring->enqueue = ring->dequeue;
839
840         ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
841         /*
842          * Ring is now zeroed, so the HW should look for change of ownership
843          * when the cycle bit is set to 1.
844          */
845         ring->cycle_state = 1;
846
847         /*
848          * Reset the hardware dequeue pointer.
849          * Yes, this will need to be re-written after resume, but we're paranoid
850          * and want to make sure the hardware doesn't access bogus memory
851          * because, say, the BIOS or an SMI started the host without changing
852          * the command ring pointers.
853          */
854         xhci_set_cmd_ring_deq(xhci);
855 }
856
857 static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
858 {
859         int port_index;
860         __le32 __iomem **port_array;
861         unsigned long flags;
862         u32 t1, t2;
863
864         spin_lock_irqsave(&xhci->lock, flags);
865
866         /* disble usb3 ports Wake bits*/
867         port_index = xhci->num_usb3_ports;
868         port_array = xhci->usb3_ports;
869         while (port_index--) {
870                 t1 = readl(port_array[port_index]);
871                 t1 = xhci_port_state_to_neutral(t1);
872                 t2 = t1 & ~PORT_WAKE_BITS;
873                 if (t1 != t2)
874                         writel(t2, port_array[port_index]);
875         }
876
877         /* disble usb2 ports Wake bits*/
878         port_index = xhci->num_usb2_ports;
879         port_array = xhci->usb2_ports;
880         while (port_index--) {
881                 t1 = readl(port_array[port_index]);
882                 t1 = xhci_port_state_to_neutral(t1);
883                 t2 = t1 & ~PORT_WAKE_BITS;
884                 if (t1 != t2)
885                         writel(t2, port_array[port_index]);
886         }
887
888         spin_unlock_irqrestore(&xhci->lock, flags);
889 }
890
891 /*
892  * Stop HC (not bus-specific)
893  *
894  * This is called when the machine transition into S3/S4 mode.
895  *
896  */
897 int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
898 {
899         int                     rc = 0;
900         unsigned int            delay = XHCI_MAX_HALT_USEC;
901         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
902         u32                     command;
903
904         if (!hcd->state)
905                 return 0;
906
907         if (hcd->state != HC_STATE_SUSPENDED ||
908                         xhci->shared_hcd->state != HC_STATE_SUSPENDED)
909                 return -EINVAL;
910
911         /* Clear root port wake on bits if wakeup not allowed. */
912         if (!do_wakeup)
913                 xhci_disable_port_wake_on_bits(xhci);
914
915         /* Don't poll the roothubs on bus suspend. */
916         xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
917         clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
918         del_timer_sync(&hcd->rh_timer);
919         clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
920         del_timer_sync(&xhci->shared_hcd->rh_timer);
921
922         spin_lock_irq(&xhci->lock);
923         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
924         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
925         /* step 1: stop endpoint */
926         /* skipped assuming that port suspend has done */
927
928         /* step 2: clear Run/Stop bit */
929         command = readl(&xhci->op_regs->command);
930         command &= ~CMD_RUN;
931         writel(command, &xhci->op_regs->command);
932
933         /* Some chips from Fresco Logic need an extraordinary delay */
934         delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
935
936         if (xhci_handshake(&xhci->op_regs->status,
937                       STS_HALT, STS_HALT, delay)) {
938                 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
939                 spin_unlock_irq(&xhci->lock);
940                 return -ETIMEDOUT;
941         }
942         xhci_clear_command_ring(xhci);
943
944         /* step 3: save registers */
945         xhci_save_registers(xhci);
946
947         /* step 4: set CSS flag */
948         command = readl(&xhci->op_regs->command);
949         command |= CMD_CSS;
950         writel(command, &xhci->op_regs->command);
951         if (xhci_handshake(&xhci->op_regs->status,
952                                 STS_SAVE, 0, 10 * 1000)) {
953                 xhci_warn(xhci, "WARN: xHC save state timeout\n");
954                 spin_unlock_irq(&xhci->lock);
955                 return -ETIMEDOUT;
956         }
957         spin_unlock_irq(&xhci->lock);
958
959         /*
960          * Deleting Compliance Mode Recovery Timer because the xHCI Host
961          * is about to be suspended.
962          */
963         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
964                         (!(xhci_all_ports_seen_u0(xhci)))) {
965                 del_timer_sync(&xhci->comp_mode_recovery_timer);
966                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
967                                 "%s: compliance mode recovery timer deleted",
968                                 __func__);
969         }
970
971         /* step 5: remove core well power */
972         /* synchronize irq when using MSI-X */
973         xhci_msix_sync_irqs(xhci);
974
975         return rc;
976 }
977 EXPORT_SYMBOL_GPL(xhci_suspend);
978
979 /*
980  * start xHC (not bus-specific)
981  *
982  * This is called when the machine transition from S3/S4 mode.
983  *
984  */
985 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
986 {
987         u32                     command, temp = 0, status;
988         struct usb_hcd          *hcd = xhci_to_hcd(xhci);
989         struct usb_hcd          *secondary_hcd;
990         int                     retval = 0;
991         bool                    comp_timer_running = false;
992
993         if (!hcd->state)
994                 return 0;
995
996         /* Wait a bit if either of the roothubs need to settle from the
997          * transition into bus suspend.
998          */
999         if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
1000                         time_before(jiffies,
1001                                 xhci->bus_state[1].next_statechange))
1002                 msleep(100);
1003
1004         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1005         set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
1006
1007         spin_lock_irq(&xhci->lock);
1008         if (xhci->quirks & XHCI_RESET_ON_RESUME)
1009                 hibernated = true;
1010
1011         if (!hibernated) {
1012                 /* step 1: restore register */
1013                 xhci_restore_registers(xhci);
1014                 /* step 2: initialize command ring buffer */
1015                 xhci_set_cmd_ring_deq(xhci);
1016                 /* step 3: restore state and start state*/
1017                 /* step 3: set CRS flag */
1018                 command = readl(&xhci->op_regs->command);
1019                 command |= CMD_CRS;
1020                 writel(command, &xhci->op_regs->command);
1021                 if (xhci_handshake(&xhci->op_regs->status,
1022                               STS_RESTORE, 0, 10 * 1000)) {
1023                         xhci_warn(xhci, "WARN: xHC restore state timeout\n");
1024                         spin_unlock_irq(&xhci->lock);
1025                         return -ETIMEDOUT;
1026                 }
1027                 temp = readl(&xhci->op_regs->status);
1028         }
1029
1030         /* If restore operation fails, re-initialize the HC during resume */
1031         if ((temp & STS_SRE) || hibernated) {
1032
1033                 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
1034                                 !(xhci_all_ports_seen_u0(xhci))) {
1035                         del_timer_sync(&xhci->comp_mode_recovery_timer);
1036                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1037                                 "Compliance Mode Recovery Timer deleted!");
1038                 }
1039
1040                 /* Let the USB core know _both_ roothubs lost power. */
1041                 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1042                 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1043
1044                 xhci_dbg(xhci, "Stop HCD\n");
1045                 xhci_halt(xhci);
1046                 xhci_reset(xhci);
1047                 spin_unlock_irq(&xhci->lock);
1048                 xhci_cleanup_msix(xhci);
1049
1050                 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1051                 temp = readl(&xhci->op_regs->status);
1052                 writel(temp & ~STS_EINT, &xhci->op_regs->status);
1053                 temp = readl(&xhci->ir_set->irq_pending);
1054                 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1055                 xhci_print_ir_set(xhci, 0);
1056
1057                 xhci_dbg(xhci, "cleaning up memory\n");
1058                 xhci_mem_cleanup(xhci);
1059                 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1060                             readl(&xhci->op_regs->status));
1061
1062                 /* USB core calls the PCI reinit and start functions twice:
1063                  * first with the primary HCD, and then with the secondary HCD.
1064                  * If we don't do the same, the host will never be started.
1065                  */
1066                 if (!usb_hcd_is_primary_hcd(hcd))
1067                         secondary_hcd = hcd;
1068                 else
1069                         secondary_hcd = xhci->shared_hcd;
1070
1071                 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1072                 retval = xhci_init(hcd->primary_hcd);
1073                 if (retval)
1074                         return retval;
1075                 comp_timer_running = true;
1076
1077                 xhci_dbg(xhci, "Start the primary HCD\n");
1078                 retval = xhci_run(hcd->primary_hcd);
1079                 if (!retval) {
1080                         xhci_dbg(xhci, "Start the secondary HCD\n");
1081                         retval = xhci_run(secondary_hcd);
1082                 }
1083                 hcd->state = HC_STATE_SUSPENDED;
1084                 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1085                 goto done;
1086         }
1087
1088         /* step 4: set Run/Stop bit */
1089         command = readl(&xhci->op_regs->command);
1090         command |= CMD_RUN;
1091         writel(command, &xhci->op_regs->command);
1092         xhci_handshake(&xhci->op_regs->status, STS_HALT,
1093                   0, 250 * 1000);
1094
1095         /* step 5: walk topology and initialize portsc,
1096          * portpmsc and portli
1097          */
1098         /* this is done in bus_resume */
1099
1100         /* step 6: restart each of the previously
1101          * Running endpoints by ringing their doorbells
1102          */
1103
1104         spin_unlock_irq(&xhci->lock);
1105
1106  done:
1107         if (retval == 0) {
1108                 /* Resume root hubs only when have pending events. */
1109                 status = readl(&xhci->op_regs->status);
1110                 if (status & STS_EINT) {
1111                         usb_hcd_resume_root_hub(hcd);
1112                         usb_hcd_resume_root_hub(xhci->shared_hcd);
1113                 }
1114         }
1115
1116         /*
1117          * If system is subject to the Quirk, Compliance Mode Timer needs to
1118          * be re-initialized Always after a system resume. Ports are subject
1119          * to suffer the Compliance Mode issue again. It doesn't matter if
1120          * ports have entered previously to U0 before system's suspension.
1121          */
1122         if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1123                 compliance_mode_recovery_timer_init(xhci);
1124
1125         /* Re-enable port polling. */
1126         xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1127         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1128         usb_hcd_poll_rh_status(hcd);
1129         set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
1130         usb_hcd_poll_rh_status(xhci->shared_hcd);
1131
1132         return retval;
1133 }
1134 EXPORT_SYMBOL_GPL(xhci_resume);
1135 #endif  /* CONFIG_PM */
1136
1137 /*-------------------------------------------------------------------------*/
1138
1139 /**
1140  * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1141  * HCDs.  Find the index for an endpoint given its descriptor.  Use the return
1142  * value to right shift 1 for the bitmask.
1143  *
1144  * Index  = (epnum * 2) + direction - 1,
1145  * where direction = 0 for OUT, 1 for IN.
1146  * For control endpoints, the IN index is used (OUT index is unused), so
1147  * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1148  */
1149 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1150 {
1151         unsigned int index;
1152         if (usb_endpoint_xfer_control(desc))
1153                 index = (unsigned int) (usb_endpoint_num(desc)*2);
1154         else
1155                 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1156                         (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1157         return index;
1158 }
1159
1160 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1161  * address from the XHCI endpoint index.
1162  */
1163 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1164 {
1165         unsigned int number = DIV_ROUND_UP(ep_index, 2);
1166         unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1167         return direction | number;
1168 }
1169
1170 /* Find the flag for this endpoint (for use in the control context).  Use the
1171  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
1172  * bit 1, etc.
1173  */
1174 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1175 {
1176         return 1 << (xhci_get_endpoint_index(desc) + 1);
1177 }
1178
1179 /* Find the flag for this endpoint (for use in the control context).  Use the
1180  * endpoint index to create a bitmask.  The slot context is bit 0, endpoint 0 is
1181  * bit 1, etc.
1182  */
1183 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1184 {
1185         return 1 << (ep_index + 1);
1186 }
1187
1188 /* Compute the last valid endpoint context index.  Basically, this is the
1189  * endpoint index plus one.  For slot contexts with more than valid endpoint,
1190  * we find the most significant bit set in the added contexts flags.
1191  * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1192  * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1193  */
1194 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1195 {
1196         return fls(added_ctxs) - 1;
1197 }
1198
1199 /* Returns 1 if the arguments are OK;
1200  * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1201  */
1202 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1203                 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1204                 const char *func) {
1205         struct xhci_hcd *xhci;
1206         struct xhci_virt_device *virt_dev;
1207
1208         if (!hcd || (check_ep && !ep) || !udev) {
1209                 pr_debug("xHCI %s called with invalid args\n", func);
1210                 return -EINVAL;
1211         }
1212         if (!udev->parent) {
1213                 pr_debug("xHCI %s called for root hub\n", func);
1214                 return 0;
1215         }
1216
1217         xhci = hcd_to_xhci(hcd);
1218         if (check_virt_dev) {
1219                 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1220                         xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1221                                         func);
1222                         return -EINVAL;
1223                 }
1224
1225                 virt_dev = xhci->devs[udev->slot_id];
1226                 if (virt_dev->udev != udev) {
1227                         xhci_dbg(xhci, "xHCI %s called with udev and "
1228                                           "virt_dev does not match\n", func);
1229                         return -EINVAL;
1230                 }
1231         }
1232
1233         if (xhci->xhc_state & XHCI_STATE_HALTED)
1234                 return -ENODEV;
1235
1236         return 1;
1237 }
1238
1239 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1240                 struct usb_device *udev, struct xhci_command *command,
1241                 bool ctx_change, bool must_succeed);
1242
1243 /*
1244  * Full speed devices may have a max packet size greater than 8 bytes, but the
1245  * USB core doesn't know that until it reads the first 8 bytes of the
1246  * descriptor.  If the usb_device's max packet size changes after that point,
1247  * we need to issue an evaluate context command and wait on it.
1248  */
1249 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1250                 unsigned int ep_index, struct urb *urb)
1251 {
1252         struct xhci_container_ctx *out_ctx;
1253         struct xhci_input_control_ctx *ctrl_ctx;
1254         struct xhci_ep_ctx *ep_ctx;
1255         struct xhci_command *command;
1256         int max_packet_size;
1257         int hw_max_packet_size;
1258         int ret = 0;
1259
1260         out_ctx = xhci->devs[slot_id]->out_ctx;
1261         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1262         hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1263         max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1264         if (hw_max_packet_size != max_packet_size) {
1265                 xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
1266                                 "Max Packet Size for ep 0 changed.");
1267                 xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
1268                                 "Max packet size in usb_device = %d",
1269                                 max_packet_size);
1270                 xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
1271                                 "Max packet size in xHCI HW = %d",
1272                                 hw_max_packet_size);
1273                 xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
1274                                 "Issuing evaluate context command.");
1275
1276                 /* Set up the input context flags for the command */
1277                 /* FIXME: This won't work if a non-default control endpoint
1278                  * changes max packet sizes.
1279                  */
1280
1281                 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
1282                 if (!command)
1283                         return -ENOMEM;
1284
1285                 command->in_ctx = xhci->devs[slot_id]->in_ctx;
1286                 ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
1287                 if (!ctrl_ctx) {
1288                         xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1289                                         __func__);
1290                         ret = -ENOMEM;
1291                         goto command_cleanup;
1292                 }
1293                 /* Set up the modified control endpoint 0 */
1294                 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1295                                 xhci->devs[slot_id]->out_ctx, ep_index);
1296
1297                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1298                 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1299                 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1300
1301                 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1302                 ctrl_ctx->drop_flags = 0;
1303
1304                 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1305                 xhci_dbg_ctx(xhci, command->in_ctx, ep_index);
1306                 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1307                 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1308
1309                 ret = xhci_configure_endpoint(xhci, urb->dev, command,
1310                                 true, false);
1311
1312                 /* Clean up the input context for later use by bandwidth
1313                  * functions.
1314                  */
1315                 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1316 command_cleanup:
1317                 kfree(command->completion);
1318                 kfree(command);
1319         }
1320         return ret;
1321 }
1322
1323 /*
1324  * non-error returns are a promise to giveback() the urb later
1325  * we drop ownership so next owner (or urb unlink) can get it
1326  */
1327 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1328 {
1329         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1330         struct xhci_td *buffer;
1331         unsigned long flags;
1332         int ret = 0;
1333         unsigned int slot_id, ep_index;
1334         struct urb_priv *urb_priv;
1335         int size, i;
1336
1337         if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1338                                         true, true, __func__) <= 0)
1339                 return -EINVAL;
1340
1341         slot_id = urb->dev->slot_id;
1342         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1343
1344         if (!HCD_HW_ACCESSIBLE(hcd)) {
1345                 if (!in_interrupt())
1346                         xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1347                 ret = -ESHUTDOWN;
1348                 goto exit;
1349         }
1350
1351         if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1352                 size = urb->number_of_packets;
1353         else if (usb_endpoint_is_bulk_out(&urb->ep->desc) &&
1354             urb->transfer_buffer_length > 0 &&
1355             urb->transfer_flags & URB_ZERO_PACKET &&
1356             !(urb->transfer_buffer_length % usb_endpoint_maxp(&urb->ep->desc)))
1357                 size = 2;
1358         else
1359                 size = 1;
1360
1361         urb_priv = kzalloc(sizeof(struct urb_priv) +
1362                                   size * sizeof(struct xhci_td *), mem_flags);
1363         if (!urb_priv)
1364                 return -ENOMEM;
1365
1366         buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1367         if (!buffer) {
1368                 kfree(urb_priv);
1369                 return -ENOMEM;
1370         }
1371
1372         for (i = 0; i < size; i++) {
1373                 urb_priv->td[i] = buffer;
1374                 buffer++;
1375         }
1376
1377         urb_priv->length = size;
1378         urb_priv->td_cnt = 0;
1379         urb->hcpriv = urb_priv;
1380
1381         if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1382                 /* Check to see if the max packet size for the default control
1383                  * endpoint changed during FS device enumeration
1384                  */
1385                 if (urb->dev->speed == USB_SPEED_FULL) {
1386                         ret = xhci_check_maxpacket(xhci, slot_id,
1387                                         ep_index, urb);
1388                         if (ret < 0) {
1389                                 xhci_urb_free_priv(urb_priv);
1390                                 urb->hcpriv = NULL;
1391                                 return ret;
1392                         }
1393                 }
1394
1395                 /* We have a spinlock and interrupts disabled, so we must pass
1396                  * atomic context to this function, which may allocate memory.
1397                  */
1398                 spin_lock_irqsave(&xhci->lock, flags);
1399                 if (xhci->xhc_state & XHCI_STATE_DYING)
1400                         goto dying;
1401                 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1402                                 slot_id, ep_index);
1403                 if (ret)
1404                         goto free_priv;
1405                 spin_unlock_irqrestore(&xhci->lock, flags);
1406         } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1407                 spin_lock_irqsave(&xhci->lock, flags);
1408                 if (xhci->xhc_state & XHCI_STATE_DYING)
1409                         goto dying;
1410                 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1411                                 EP_GETTING_STREAMS) {
1412                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1413                                         "is transitioning to using streams.\n");
1414                         ret = -EINVAL;
1415                 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1416                                 EP_GETTING_NO_STREAMS) {
1417                         xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1418                                         "is transitioning to "
1419                                         "not having streams.\n");
1420                         ret = -EINVAL;
1421                 } else {
1422                         ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1423                                         slot_id, ep_index);
1424                 }
1425                 if (ret)
1426                         goto free_priv;
1427                 spin_unlock_irqrestore(&xhci->lock, flags);
1428         } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1429                 spin_lock_irqsave(&xhci->lock, flags);
1430                 if (xhci->xhc_state & XHCI_STATE_DYING)
1431                         goto dying;
1432                 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1433                                 slot_id, ep_index);
1434                 if (ret)
1435                         goto free_priv;
1436                 spin_unlock_irqrestore(&xhci->lock, flags);
1437         } else {
1438                 spin_lock_irqsave(&xhci->lock, flags);
1439                 if (xhci->xhc_state & XHCI_STATE_DYING)
1440                         goto dying;
1441                 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1442                                 slot_id, ep_index);
1443                 if (ret)
1444                         goto free_priv;
1445                 spin_unlock_irqrestore(&xhci->lock, flags);
1446         }
1447 exit:
1448         return ret;
1449 dying:
1450         xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1451                         "non-responsive xHCI host.\n",
1452                         urb->ep->desc.bEndpointAddress, urb);
1453         ret = -ESHUTDOWN;
1454 free_priv:
1455         xhci_urb_free_priv(urb_priv);
1456         urb->hcpriv = NULL;
1457         spin_unlock_irqrestore(&xhci->lock, flags);
1458         return ret;
1459 }
1460
1461 /* Get the right ring for the given URB.
1462  * If the endpoint supports streams, boundary check the URB's stream ID.
1463  * If the endpoint doesn't support streams, return the singular endpoint ring.
1464  */
1465 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1466                 struct urb *urb)
1467 {
1468         unsigned int slot_id;
1469         unsigned int ep_index;
1470         unsigned int stream_id;
1471         struct xhci_virt_ep *ep;
1472
1473         slot_id = urb->dev->slot_id;
1474         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1475         stream_id = urb->stream_id;
1476         ep = &xhci->devs[slot_id]->eps[ep_index];
1477         /* Common case: no streams */
1478         if (!(ep->ep_state & EP_HAS_STREAMS))
1479                 return ep->ring;
1480
1481         if (stream_id == 0) {
1482                 xhci_warn(xhci,
1483                                 "WARN: Slot ID %u, ep index %u has streams, "
1484                                 "but URB has no stream ID.\n",
1485                                 slot_id, ep_index);
1486                 return NULL;
1487         }
1488
1489         if (stream_id < ep->stream_info->num_streams)
1490                 return ep->stream_info->stream_rings[stream_id];
1491
1492         xhci_warn(xhci,
1493                         "WARN: Slot ID %u, ep index %u has "
1494                         "stream IDs 1 to %u allocated, "
1495                         "but stream ID %u is requested.\n",
1496                         slot_id, ep_index,
1497                         ep->stream_info->num_streams - 1,
1498                         stream_id);
1499         return NULL;
1500 }
1501
1502 /*
1503  * Remove the URB's TD from the endpoint ring.  This may cause the HC to stop
1504  * USB transfers, potentially stopping in the middle of a TRB buffer.  The HC
1505  * should pick up where it left off in the TD, unless a Set Transfer Ring
1506  * Dequeue Pointer is issued.
1507  *
1508  * The TRBs that make up the buffers for the canceled URB will be "removed" from
1509  * the ring.  Since the ring is a contiguous structure, they can't be physically
1510  * removed.  Instead, there are two options:
1511  *
1512  *  1) If the HC is in the middle of processing the URB to be canceled, we
1513  *     simply move the ring's dequeue pointer past those TRBs using the Set
1514  *     Transfer Ring Dequeue Pointer command.  This will be the common case,
1515  *     when drivers timeout on the last submitted URB and attempt to cancel.
1516  *
1517  *  2) If the HC is in the middle of a different TD, we turn the TRBs into a
1518  *     series of 1-TRB transfer no-op TDs.  (No-ops shouldn't be chained.)  The
1519  *     HC will need to invalidate the any TRBs it has cached after the stop
1520  *     endpoint command, as noted in the xHCI 0.95 errata.
1521  *
1522  *  3) The TD may have completed by the time the Stop Endpoint Command
1523  *     completes, so software needs to handle that case too.
1524  *
1525  * This function should protect against the TD enqueueing code ringing the
1526  * doorbell while this code is waiting for a Stop Endpoint command to complete.
1527  * It also needs to account for multiple cancellations on happening at the same
1528  * time for the same endpoint.
1529  *
1530  * Note that this function can be called in any context, or so says
1531  * usb_hcd_unlink_urb()
1532  */
1533 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1534 {
1535         unsigned long flags;
1536         int ret, i;
1537         u32 temp;
1538         struct xhci_hcd *xhci;
1539         struct urb_priv *urb_priv;
1540         struct xhci_td *td;
1541         unsigned int ep_index;
1542         struct xhci_ring *ep_ring;
1543         struct xhci_virt_ep *ep;
1544         struct xhci_command *command;
1545
1546         xhci = hcd_to_xhci(hcd);
1547         spin_lock_irqsave(&xhci->lock, flags);
1548         /* Make sure the URB hasn't completed or been unlinked already */
1549         ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1550         if (ret || !urb->hcpriv)
1551                 goto done;
1552         temp = readl(&xhci->op_regs->status);
1553         if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1554                 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1555                                 "HW died, freeing TD.");
1556                 urb_priv = urb->hcpriv;
1557                 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1558                         td = urb_priv->td[i];
1559                         if (!list_empty(&td->td_list))
1560                                 list_del_init(&td->td_list);
1561                         if (!list_empty(&td->cancelled_td_list))
1562                                 list_del_init(&td->cancelled_td_list);
1563                 }
1564
1565                 usb_hcd_unlink_urb_from_ep(hcd, urb);
1566                 spin_unlock_irqrestore(&xhci->lock, flags);
1567                 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1568                 xhci_urb_free_priv(urb_priv);
1569                 return ret;
1570         }
1571         if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1572                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
1573                 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1574                                 "Ep 0x%x: URB %p to be canceled on "
1575                                 "non-responsive xHCI host.",
1576                                 urb->ep->desc.bEndpointAddress, urb);
1577                 /* Let the stop endpoint command watchdog timer (which set this
1578                  * state) finish cleaning up the endpoint TD lists.  We must
1579                  * have caught it in the middle of dropping a lock and giving
1580                  * back an URB.
1581                  */
1582                 goto done;
1583         }
1584
1585         ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1586         ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1587         ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1588         if (!ep_ring) {
1589                 ret = -EINVAL;
1590                 goto done;
1591         }
1592
1593         urb_priv = urb->hcpriv;
1594         i = urb_priv->td_cnt;
1595         if (i < urb_priv->length)
1596                 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1597                                 "Cancel URB %p, dev %s, ep 0x%x, "
1598                                 "starting at offset 0x%llx",
1599                                 urb, urb->dev->devpath,
1600                                 urb->ep->desc.bEndpointAddress,
1601                                 (unsigned long long) xhci_trb_virt_to_dma(
1602                                         urb_priv->td[i]->start_seg,
1603                                         urb_priv->td[i]->first_trb));
1604
1605         for (; i < urb_priv->length; i++) {
1606                 td = urb_priv->td[i];
1607                 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1608         }
1609
1610         /* Queue a stop endpoint command, but only if this is
1611          * the first cancellation to be handled.
1612          */
1613         if (!(ep->ep_state & EP_HALT_PENDING)) {
1614                 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1615                 if (!command) {
1616                         ret = -ENOMEM;
1617                         goto done;
1618                 }
1619                 ep->ep_state |= EP_HALT_PENDING;
1620                 ep->stop_cmds_pending++;
1621                 ep->stop_cmd_timer.expires = jiffies +
1622                         XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1623                 add_timer(&ep->stop_cmd_timer);
1624                 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1625                                          ep_index, 0);
1626                 xhci_ring_cmd_db(xhci);
1627         }
1628 done:
1629         spin_unlock_irqrestore(&xhci->lock, flags);
1630         return ret;
1631 }
1632
1633 /* Drop an endpoint from a new bandwidth configuration for this device.
1634  * Only one call to this function is allowed per endpoint before
1635  * check_bandwidth() or reset_bandwidth() must be called.
1636  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1637  * add the endpoint to the schedule with possibly new parameters denoted by a
1638  * different endpoint descriptor in usb_host_endpoint.
1639  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1640  * not allowed.
1641  *
1642  * The USB core will not allow URBs to be queued to an endpoint that is being
1643  * disabled, so there's no need for mutual exclusion to protect
1644  * the xhci->devs[slot_id] structure.
1645  */
1646 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1647                 struct usb_host_endpoint *ep)
1648 {
1649         struct xhci_hcd *xhci;
1650         struct xhci_container_ctx *in_ctx, *out_ctx;
1651         struct xhci_input_control_ctx *ctrl_ctx;
1652         unsigned int ep_index;
1653         struct xhci_ep_ctx *ep_ctx;
1654         u32 drop_flag;
1655         u32 new_add_flags, new_drop_flags;
1656         int ret;
1657
1658         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1659         if (ret <= 0)
1660                 return ret;
1661         xhci = hcd_to_xhci(hcd);
1662         if (xhci->xhc_state & XHCI_STATE_DYING)
1663                 return -ENODEV;
1664
1665         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1666         drop_flag = xhci_get_endpoint_flag(&ep->desc);
1667         if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1668                 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1669                                 __func__, drop_flag);
1670                 return 0;
1671         }
1672
1673         in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1674         out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1675         ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1676         if (!ctrl_ctx) {
1677                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1678                                 __func__);
1679                 return 0;
1680         }
1681
1682         ep_index = xhci_get_endpoint_index(&ep->desc);
1683         ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1684         /* If the HC already knows the endpoint is disabled,
1685          * or the HCD has noted it is disabled, ignore this request
1686          */
1687         if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1688              cpu_to_le32(EP_STATE_DISABLED)) ||
1689             le32_to_cpu(ctrl_ctx->drop_flags) &
1690             xhci_get_endpoint_flag(&ep->desc)) {
1691                 /* Do not warn when called after a usb_device_reset */
1692                 if (xhci->devs[udev->slot_id]->eps[ep_index].ring != NULL)
1693                         xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1694                                   __func__, ep);
1695                 return 0;
1696         }
1697
1698         ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1699         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1700
1701         ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1702         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1703
1704         xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1705
1706         if (xhci->quirks & XHCI_MTK_HOST)
1707                 xhci_mtk_drop_ep_quirk(hcd, udev, ep);
1708
1709         xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1710                         (unsigned int) ep->desc.bEndpointAddress,
1711                         udev->slot_id,
1712                         (unsigned int) new_drop_flags,
1713                         (unsigned int) new_add_flags);
1714         return 0;
1715 }
1716
1717 /* Add an endpoint to a new possible bandwidth configuration for this device.
1718  * Only one call to this function is allowed per endpoint before
1719  * check_bandwidth() or reset_bandwidth() must be called.
1720  * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1721  * add the endpoint to the schedule with possibly new parameters denoted by a
1722  * different endpoint descriptor in usb_host_endpoint.
1723  * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1724  * not allowed.
1725  *
1726  * The USB core will not allow URBs to be queued to an endpoint until the
1727  * configuration or alt setting is installed in the device, so there's no need
1728  * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1729  */
1730 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1731                 struct usb_host_endpoint *ep)
1732 {
1733         struct xhci_hcd *xhci;
1734         struct xhci_container_ctx *in_ctx;
1735         unsigned int ep_index;
1736         struct xhci_input_control_ctx *ctrl_ctx;
1737         u32 added_ctxs;
1738         u32 new_add_flags, new_drop_flags;
1739         struct xhci_virt_device *virt_dev;
1740         int ret = 0;
1741
1742         ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1743         if (ret <= 0) {
1744                 /* So we won't queue a reset ep command for a root hub */
1745                 ep->hcpriv = NULL;
1746                 return ret;
1747         }
1748         xhci = hcd_to_xhci(hcd);
1749         if (xhci->xhc_state & XHCI_STATE_DYING)
1750                 return -ENODEV;
1751
1752         added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1753         if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1754                 /* FIXME when we have to issue an evaluate endpoint command to
1755                  * deal with ep0 max packet size changing once we get the
1756                  * descriptors
1757                  */
1758                 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1759                                 __func__, added_ctxs);
1760                 return 0;
1761         }
1762
1763         virt_dev = xhci->devs[udev->slot_id];
1764         in_ctx = virt_dev->in_ctx;
1765         ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1766         if (!ctrl_ctx) {
1767                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1768                                 __func__);
1769                 return 0;
1770         }
1771
1772         ep_index = xhci_get_endpoint_index(&ep->desc);
1773         /* If this endpoint is already in use, and the upper layers are trying
1774          * to add it again without dropping it, reject the addition.
1775          */
1776         if (virt_dev->eps[ep_index].ring &&
1777                         !(le32_to_cpu(ctrl_ctx->drop_flags) & added_ctxs)) {
1778                 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1779                                 "without dropping it.\n",
1780                                 (unsigned int) ep->desc.bEndpointAddress);
1781                 return -EINVAL;
1782         }
1783
1784         /* If the HCD has already noted the endpoint is enabled,
1785          * ignore this request.
1786          */
1787         if (le32_to_cpu(ctrl_ctx->add_flags) & added_ctxs) {
1788                 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1789                                 __func__, ep);
1790                 return 0;
1791         }
1792
1793         /*
1794          * Configuration and alternate setting changes must be done in
1795          * process context, not interrupt context (or so documenation
1796          * for usb_set_interface() and usb_set_configuration() claim).
1797          */
1798         if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1799                 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1800                                 __func__, ep->desc.bEndpointAddress);
1801                 return -ENOMEM;
1802         }
1803
1804         if (xhci->quirks & XHCI_MTK_HOST) {
1805                 ret = xhci_mtk_add_ep_quirk(hcd, udev, ep);
1806                 if (ret < 0) {
1807                         xhci_free_or_cache_endpoint_ring(xhci,
1808                                 virt_dev, ep_index);
1809                         return ret;
1810                 }
1811         }
1812
1813         ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1814         new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1815
1816         /* If xhci_endpoint_disable() was called for this endpoint, but the
1817          * xHC hasn't been notified yet through the check_bandwidth() call,
1818          * this re-adds a new state for the endpoint from the new endpoint
1819          * descriptors.  We must drop and re-add this endpoint, so we leave the
1820          * drop flags alone.
1821          */
1822         new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1823
1824         /* Store the usb_device pointer for later use */
1825         ep->hcpriv = udev;
1826
1827         xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
1828                         (unsigned int) ep->desc.bEndpointAddress,
1829                         udev->slot_id,
1830                         (unsigned int) new_drop_flags,
1831                         (unsigned int) new_add_flags);
1832         return 0;
1833 }
1834
1835 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1836 {
1837         struct xhci_input_control_ctx *ctrl_ctx;
1838         struct xhci_ep_ctx *ep_ctx;
1839         struct xhci_slot_ctx *slot_ctx;
1840         int i;
1841
1842         ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
1843         if (!ctrl_ctx) {
1844                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1845                                 __func__);
1846                 return;
1847         }
1848
1849         /* When a device's add flag and drop flag are zero, any subsequent
1850          * configure endpoint command will leave that endpoint's state
1851          * untouched.  Make sure we don't leave any old state in the input
1852          * endpoint contexts.
1853          */
1854         ctrl_ctx->drop_flags = 0;
1855         ctrl_ctx->add_flags = 0;
1856         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1857         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1858         /* Endpoint 0 is always valid */
1859         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1860         for (i = 1; i < 31; ++i) {
1861                 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1862                 ep_ctx->ep_info = 0;
1863                 ep_ctx->ep_info2 = 0;
1864                 ep_ctx->deq = 0;
1865                 ep_ctx->tx_info = 0;
1866         }
1867 }
1868
1869 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1870                 struct usb_device *udev, u32 *cmd_status)
1871 {
1872         int ret;
1873
1874         switch (*cmd_status) {
1875         case COMP_CMD_ABORT:
1876         case COMP_CMD_STOP:
1877                 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1878                 ret = -ETIME;
1879                 break;
1880         case COMP_ENOMEM:
1881                 dev_warn(&udev->dev,
1882                          "Not enough host controller resources for new device state.\n");
1883                 ret = -ENOMEM;
1884                 /* FIXME: can we allocate more resources for the HC? */
1885                 break;
1886         case COMP_BW_ERR:
1887         case COMP_2ND_BW_ERR:
1888                 dev_warn(&udev->dev,
1889                          "Not enough bandwidth for new device state.\n");
1890                 ret = -ENOSPC;
1891                 /* FIXME: can we go back to the old state? */
1892                 break;
1893         case COMP_TRB_ERR:
1894                 /* the HCD set up something wrong */
1895                 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1896                                 "add flag = 1, "
1897                                 "and endpoint is not disabled.\n");
1898                 ret = -EINVAL;
1899                 break;
1900         case COMP_DEV_ERR:
1901                 dev_warn(&udev->dev,
1902                          "ERROR: Incompatible device for endpoint configure command.\n");
1903                 ret = -ENODEV;
1904                 break;
1905         case COMP_SUCCESS:
1906                 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1907                                 "Successful Endpoint Configure command");
1908                 ret = 0;
1909                 break;
1910         default:
1911                 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1912                                 *cmd_status);
1913                 ret = -EINVAL;
1914                 break;
1915         }
1916         return ret;
1917 }
1918
1919 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1920                 struct usb_device *udev, u32 *cmd_status)
1921 {
1922         int ret;
1923         struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1924
1925         switch (*cmd_status) {
1926         case COMP_CMD_ABORT:
1927         case COMP_CMD_STOP:
1928                 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1929                 ret = -ETIME;
1930                 break;
1931         case COMP_EINVAL:
1932                 dev_warn(&udev->dev,
1933                          "WARN: xHCI driver setup invalid evaluate context command.\n");
1934                 ret = -EINVAL;
1935                 break;
1936         case COMP_EBADSLT:
1937                 dev_warn(&udev->dev,
1938                         "WARN: slot not enabled for evaluate context command.\n");
1939                 ret = -EINVAL;
1940                 break;
1941         case COMP_CTX_STATE:
1942                 dev_warn(&udev->dev,
1943                         "WARN: invalid context state for evaluate context command.\n");
1944                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1945                 ret = -EINVAL;
1946                 break;
1947         case COMP_DEV_ERR:
1948                 dev_warn(&udev->dev,
1949                         "ERROR: Incompatible device for evaluate context command.\n");
1950                 ret = -ENODEV;
1951                 break;
1952         case COMP_MEL_ERR:
1953                 /* Max Exit Latency too large error */
1954                 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1955                 ret = -EINVAL;
1956                 break;
1957         case COMP_SUCCESS:
1958                 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1959                                 "Successful evaluate context command");
1960                 ret = 0;
1961                 break;
1962         default:
1963                 xhci_err(xhci, "ERROR: unexpected command completion code 0x%x.\n",
1964                         *cmd_status);
1965                 ret = -EINVAL;
1966                 break;
1967         }
1968         return ret;
1969 }
1970
1971 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1972                 struct xhci_input_control_ctx *ctrl_ctx)
1973 {
1974         u32 valid_add_flags;
1975         u32 valid_drop_flags;
1976
1977         /* Ignore the slot flag (bit 0), and the default control endpoint flag
1978          * (bit 1).  The default control endpoint is added during the Address
1979          * Device command and is never removed until the slot is disabled.
1980          */
1981         valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1982         valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1983
1984         /* Use hweight32 to count the number of ones in the add flags, or
1985          * number of endpoints added.  Don't count endpoints that are changed
1986          * (both added and dropped).
1987          */
1988         return hweight32(valid_add_flags) -
1989                 hweight32(valid_add_flags & valid_drop_flags);
1990 }
1991
1992 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1993                 struct xhci_input_control_ctx *ctrl_ctx)
1994 {
1995         u32 valid_add_flags;
1996         u32 valid_drop_flags;
1997
1998         valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1999         valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
2000
2001         return hweight32(valid_drop_flags) -
2002                 hweight32(valid_add_flags & valid_drop_flags);
2003 }
2004
2005 /*
2006  * We need to reserve the new number of endpoints before the configure endpoint
2007  * command completes.  We can't subtract the dropped endpoints from the number
2008  * of active endpoints until the command completes because we can oversubscribe
2009  * the host in this case:
2010  *
2011  *  - the first configure endpoint command drops more endpoints than it adds
2012  *  - a second configure endpoint command that adds more endpoints is queued
2013  *  - the first configure endpoint command fails, so the config is unchanged
2014  *  - the second command may succeed, even though there isn't enough resources
2015  *
2016  * Must be called with xhci->lock held.
2017  */
2018 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
2019                 struct xhci_input_control_ctx *ctrl_ctx)
2020 {
2021         u32 added_eps;
2022
2023         added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
2024         if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
2025                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2026                                 "Not enough ep ctxs: "
2027                                 "%u active, need to add %u, limit is %u.",
2028                                 xhci->num_active_eps, added_eps,
2029                                 xhci->limit_active_eps);
2030                 return -ENOMEM;
2031         }
2032         xhci->num_active_eps += added_eps;
2033         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2034                         "Adding %u ep ctxs, %u now active.", added_eps,
2035                         xhci->num_active_eps);
2036         return 0;
2037 }
2038
2039 /*
2040  * The configure endpoint was failed by the xHC for some other reason, so we
2041  * need to revert the resources that failed configuration would have used.
2042  *
2043  * Must be called with xhci->lock held.
2044  */
2045 static void xhci_free_host_resources(struct xhci_hcd *xhci,
2046                 struct xhci_input_control_ctx *ctrl_ctx)
2047 {
2048         u32 num_failed_eps;
2049
2050         num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
2051         xhci->num_active_eps -= num_failed_eps;
2052         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2053                         "Removing %u failed ep ctxs, %u now active.",
2054                         num_failed_eps,
2055                         xhci->num_active_eps);
2056 }
2057
2058 /*
2059  * Now that the command has completed, clean up the active endpoint count by
2060  * subtracting out the endpoints that were dropped (but not changed).
2061  *
2062  * Must be called with xhci->lock held.
2063  */
2064 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2065                 struct xhci_input_control_ctx *ctrl_ctx)
2066 {
2067         u32 num_dropped_eps;
2068
2069         num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2070         xhci->num_active_eps -= num_dropped_eps;
2071         if (num_dropped_eps)
2072                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2073                                 "Removing %u dropped ep ctxs, %u now active.",
2074                                 num_dropped_eps,
2075                                 xhci->num_active_eps);
2076 }
2077
2078 static unsigned int xhci_get_block_size(struct usb_device *udev)
2079 {
2080         switch (udev->speed) {
2081         case USB_SPEED_LOW:
2082         case USB_SPEED_FULL:
2083                 return FS_BLOCK;
2084         case USB_SPEED_HIGH:
2085                 return HS_BLOCK;
2086         case USB_SPEED_SUPER:
2087         case USB_SPEED_SUPER_PLUS:
2088                 return SS_BLOCK;
2089         case USB_SPEED_UNKNOWN:
2090         case USB_SPEED_WIRELESS:
2091         default:
2092                 /* Should never happen */
2093                 return 1;
2094         }
2095 }
2096
2097 static unsigned int
2098 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2099 {
2100         if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2101                 return LS_OVERHEAD;
2102         if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2103                 return FS_OVERHEAD;
2104         return HS_OVERHEAD;
2105 }
2106
2107 /* If we are changing a LS/FS device under a HS hub,
2108  * make sure (if we are activating a new TT) that the HS bus has enough
2109  * bandwidth for this new TT.
2110  */
2111 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2112                 struct xhci_virt_device *virt_dev,
2113                 int old_active_eps)
2114 {
2115         struct xhci_interval_bw_table *bw_table;
2116         struct xhci_tt_bw_info *tt_info;
2117
2118         /* Find the bandwidth table for the root port this TT is attached to. */
2119         bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2120         tt_info = virt_dev->tt_info;
2121         /* If this TT already had active endpoints, the bandwidth for this TT
2122          * has already been added.  Removing all periodic endpoints (and thus
2123          * making the TT enactive) will only decrease the bandwidth used.
2124          */
2125         if (old_active_eps)
2126                 return 0;
2127         if (old_active_eps == 0 && tt_info->active_eps != 0) {
2128                 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2129                         return -ENOMEM;
2130                 return 0;
2131         }
2132         /* Not sure why we would have no new active endpoints...
2133          *
2134          * Maybe because of an Evaluate Context change for a hub update or a
2135          * control endpoint 0 max packet size change?
2136          * FIXME: skip the bandwidth calculation in that case.
2137          */
2138         return 0;
2139 }
2140
2141 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2142                 struct xhci_virt_device *virt_dev)
2143 {
2144         unsigned int bw_reserved;
2145
2146         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2147         if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2148                 return -ENOMEM;
2149
2150         bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2151         if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2152                 return -ENOMEM;
2153
2154         return 0;
2155 }
2156
2157 /*
2158  * This algorithm is a very conservative estimate of the worst-case scheduling
2159  * scenario for any one interval.  The hardware dynamically schedules the
2160  * packets, so we can't tell which microframe could be the limiting factor in
2161  * the bandwidth scheduling.  This only takes into account periodic endpoints.
2162  *
2163  * Obviously, we can't solve an NP complete problem to find the minimum worst
2164  * case scenario.  Instead, we come up with an estimate that is no less than
2165  * the worst case bandwidth used for any one microframe, but may be an
2166  * over-estimate.
2167  *
2168  * We walk the requirements for each endpoint by interval, starting with the
2169  * smallest interval, and place packets in the schedule where there is only one
2170  * possible way to schedule packets for that interval.  In order to simplify
2171  * this algorithm, we record the largest max packet size for each interval, and
2172  * assume all packets will be that size.
2173  *
2174  * For interval 0, we obviously must schedule all packets for each interval.
2175  * The bandwidth for interval 0 is just the amount of data to be transmitted
2176  * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2177  * the number of packets).
2178  *
2179  * For interval 1, we have two possible microframes to schedule those packets
2180  * in.  For this algorithm, if we can schedule the same number of packets for
2181  * each possible scheduling opportunity (each microframe), we will do so.  The
2182  * remaining number of packets will be saved to be transmitted in the gaps in
2183  * the next interval's scheduling sequence.
2184  *
2185  * As we move those remaining packets to be scheduled with interval 2 packets,
2186  * we have to double the number of remaining packets to transmit.  This is
2187  * because the intervals are actually powers of 2, and we would be transmitting
2188  * the previous interval's packets twice in this interval.  We also have to be
2189  * sure that when we look at the largest max packet size for this interval, we
2190  * also look at the largest max packet size for the remaining packets and take
2191  * the greater of the two.
2192  *
2193  * The algorithm continues to evenly distribute packets in each scheduling
2194  * opportunity, and push the remaining packets out, until we get to the last
2195  * interval.  Then those packets and their associated overhead are just added
2196  * to the bandwidth used.
2197  */
2198 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2199                 struct xhci_virt_device *virt_dev,
2200                 int old_active_eps)
2201 {
2202         unsigned int bw_reserved;
2203         unsigned int max_bandwidth;
2204         unsigned int bw_used;
2205         unsigned int block_size;
2206         struct xhci_interval_bw_table *bw_table;
2207         unsigned int packet_size = 0;
2208         unsigned int overhead = 0;
2209         unsigned int packets_transmitted = 0;
2210         unsigned int packets_remaining = 0;
2211         unsigned int i;
2212
2213         if (virt_dev->udev->speed >= USB_SPEED_SUPER)
2214                 return xhci_check_ss_bw(xhci, virt_dev);
2215
2216         if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2217                 max_bandwidth = HS_BW_LIMIT;
2218                 /* Convert percent of bus BW reserved to blocks reserved */
2219                 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2220         } else {
2221                 max_bandwidth = FS_BW_LIMIT;
2222                 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2223         }
2224
2225         bw_table = virt_dev->bw_table;
2226         /* We need to translate the max packet size and max ESIT payloads into
2227          * the units the hardware uses.
2228          */
2229         block_size = xhci_get_block_size(virt_dev->udev);
2230
2231         /* If we are manipulating a LS/FS device under a HS hub, double check
2232          * that the HS bus has enough bandwidth if we are activing a new TT.
2233          */
2234         if (virt_dev->tt_info) {
2235                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2236                                 "Recalculating BW for rootport %u",
2237                                 virt_dev->real_port);
2238                 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2239                         xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2240                                         "newly activated TT.\n");
2241                         return -ENOMEM;
2242                 }
2243                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2244                                 "Recalculating BW for TT slot %u port %u",
2245                                 virt_dev->tt_info->slot_id,
2246                                 virt_dev->tt_info->ttport);
2247         } else {
2248                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2249                                 "Recalculating BW for rootport %u",
2250                                 virt_dev->real_port);
2251         }
2252
2253         /* Add in how much bandwidth will be used for interval zero, or the
2254          * rounded max ESIT payload + number of packets * largest overhead.
2255          */
2256         bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2257                 bw_table->interval_bw[0].num_packets *
2258                 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2259
2260         for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2261                 unsigned int bw_added;
2262                 unsigned int largest_mps;
2263                 unsigned int interval_overhead;
2264
2265                 /*
2266                  * How many packets could we transmit in this interval?
2267                  * If packets didn't fit in the previous interval, we will need
2268                  * to transmit that many packets twice within this interval.
2269                  */
2270                 packets_remaining = 2 * packets_remaining +
2271                         bw_table->interval_bw[i].num_packets;
2272
2273                 /* Find the largest max packet size of this or the previous
2274                  * interval.
2275                  */
2276                 if (list_empty(&bw_table->interval_bw[i].endpoints))
2277                         largest_mps = 0;
2278                 else {
2279                         struct xhci_virt_ep *virt_ep;
2280                         struct list_head *ep_entry;
2281
2282                         ep_entry = bw_table->interval_bw[i].endpoints.next;
2283                         virt_ep = list_entry(ep_entry,
2284                                         struct xhci_virt_ep, bw_endpoint_list);
2285                         /* Convert to blocks, rounding up */
2286                         largest_mps = DIV_ROUND_UP(
2287                                         virt_ep->bw_info.max_packet_size,
2288                                         block_size);
2289                 }
2290                 if (largest_mps > packet_size)
2291                         packet_size = largest_mps;
2292
2293                 /* Use the larger overhead of this or the previous interval. */
2294                 interval_overhead = xhci_get_largest_overhead(
2295                                 &bw_table->interval_bw[i]);
2296                 if (interval_overhead > overhead)
2297                         overhead = interval_overhead;
2298
2299                 /* How many packets can we evenly distribute across
2300                  * (1 << (i + 1)) possible scheduling opportunities?
2301                  */
2302                 packets_transmitted = packets_remaining >> (i + 1);
2303
2304                 /* Add in the bandwidth used for those scheduled packets */
2305                 bw_added = packets_transmitted * (overhead + packet_size);
2306
2307                 /* How many packets do we have remaining to transmit? */
2308                 packets_remaining = packets_remaining % (1 << (i + 1));
2309
2310                 /* What largest max packet size should those packets have? */
2311                 /* If we've transmitted all packets, don't carry over the
2312                  * largest packet size.
2313                  */
2314                 if (packets_remaining == 0) {
2315                         packet_size = 0;
2316                         overhead = 0;
2317                 } else if (packets_transmitted > 0) {
2318                         /* Otherwise if we do have remaining packets, and we've
2319                          * scheduled some packets in this interval, take the
2320                          * largest max packet size from endpoints with this
2321                          * interval.
2322                          */
2323                         packet_size = largest_mps;
2324                         overhead = interval_overhead;
2325                 }
2326                 /* Otherwise carry over packet_size and overhead from the last
2327                  * time we had a remainder.
2328                  */
2329                 bw_used += bw_added;
2330                 if (bw_used > max_bandwidth) {
2331                         xhci_warn(xhci, "Not enough bandwidth. "
2332                                         "Proposed: %u, Max: %u\n",
2333                                 bw_used, max_bandwidth);
2334                         return -ENOMEM;
2335                 }
2336         }
2337         /*
2338          * Ok, we know we have some packets left over after even-handedly
2339          * scheduling interval 15.  We don't know which microframes they will
2340          * fit into, so we over-schedule and say they will be scheduled every
2341          * microframe.
2342          */
2343         if (packets_remaining > 0)
2344                 bw_used += overhead + packet_size;
2345
2346         if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2347                 unsigned int port_index = virt_dev->real_port - 1;
2348
2349                 /* OK, we're manipulating a HS device attached to a
2350                  * root port bandwidth domain.  Include the number of active TTs
2351                  * in the bandwidth used.
2352                  */
2353                 bw_used += TT_HS_OVERHEAD *
2354                         xhci->rh_bw[port_index].num_active_tts;
2355         }
2356
2357         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2358                 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2359                 "Available: %u " "percent",
2360                 bw_used, max_bandwidth, bw_reserved,
2361                 (max_bandwidth - bw_used - bw_reserved) * 100 /
2362                 max_bandwidth);
2363
2364         bw_used += bw_reserved;
2365         if (bw_used > max_bandwidth) {
2366                 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2367                                 bw_used, max_bandwidth);
2368                 return -ENOMEM;
2369         }
2370
2371         bw_table->bw_used = bw_used;
2372         return 0;
2373 }
2374
2375 static bool xhci_is_async_ep(unsigned int ep_type)
2376 {
2377         return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2378                                         ep_type != ISOC_IN_EP &&
2379                                         ep_type != INT_IN_EP);
2380 }
2381
2382 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2383 {
2384         return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2385 }
2386
2387 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2388 {
2389         unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2390
2391         if (ep_bw->ep_interval == 0)
2392                 return SS_OVERHEAD_BURST +
2393                         (ep_bw->mult * ep_bw->num_packets *
2394                                         (SS_OVERHEAD + mps));
2395         return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2396                                 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2397                                 1 << ep_bw->ep_interval);
2398
2399 }
2400
2401 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2402                 struct xhci_bw_info *ep_bw,
2403                 struct xhci_interval_bw_table *bw_table,
2404                 struct usb_device *udev,
2405                 struct xhci_virt_ep *virt_ep,
2406                 struct xhci_tt_bw_info *tt_info)
2407 {
2408         struct xhci_interval_bw *interval_bw;
2409         int normalized_interval;
2410
2411         if (xhci_is_async_ep(ep_bw->type))
2412                 return;
2413
2414         if (udev->speed >= USB_SPEED_SUPER) {
2415                 if (xhci_is_sync_in_ep(ep_bw->type))
2416                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2417                                 xhci_get_ss_bw_consumed(ep_bw);
2418                 else
2419                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2420                                 xhci_get_ss_bw_consumed(ep_bw);
2421                 return;
2422         }
2423
2424         /* SuperSpeed endpoints never get added to intervals in the table, so
2425          * this check is only valid for HS/FS/LS devices.
2426          */
2427         if (list_empty(&virt_ep->bw_endpoint_list))
2428                 return;
2429         /* For LS/FS devices, we need to translate the interval expressed in
2430          * microframes to frames.
2431          */
2432         if (udev->speed == USB_SPEED_HIGH)
2433                 normalized_interval = ep_bw->ep_interval;
2434         else
2435                 normalized_interval = ep_bw->ep_interval - 3;
2436
2437         if (normalized_interval == 0)
2438                 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2439         interval_bw = &bw_table->interval_bw[normalized_interval];
2440         interval_bw->num_packets -= ep_bw->num_packets;
2441         switch (udev->speed) {
2442         case USB_SPEED_LOW:
2443                 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2444                 break;
2445         case USB_SPEED_FULL:
2446                 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2447                 break;
2448         case USB_SPEED_HIGH:
2449                 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2450                 break;
2451         case USB_SPEED_SUPER:
2452         case USB_SPEED_SUPER_PLUS:
2453         case USB_SPEED_UNKNOWN:
2454         case USB_SPEED_WIRELESS:
2455                 /* Should never happen because only LS/FS/HS endpoints will get
2456                  * added to the endpoint list.
2457                  */
2458                 return;
2459         }
2460         if (tt_info)
2461                 tt_info->active_eps -= 1;
2462         list_del_init(&virt_ep->bw_endpoint_list);
2463 }
2464
2465 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2466                 struct xhci_bw_info *ep_bw,
2467                 struct xhci_interval_bw_table *bw_table,
2468                 struct usb_device *udev,
2469                 struct xhci_virt_ep *virt_ep,
2470                 struct xhci_tt_bw_info *tt_info)
2471 {
2472         struct xhci_interval_bw *interval_bw;
2473         struct xhci_virt_ep *smaller_ep;
2474         int normalized_interval;
2475
2476         if (xhci_is_async_ep(ep_bw->type))
2477                 return;
2478
2479         if (udev->speed == USB_SPEED_SUPER) {
2480                 if (xhci_is_sync_in_ep(ep_bw->type))
2481                         xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2482                                 xhci_get_ss_bw_consumed(ep_bw);
2483                 else
2484                         xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2485                                 xhci_get_ss_bw_consumed(ep_bw);
2486                 return;
2487         }
2488
2489         /* For LS/FS devices, we need to translate the interval expressed in
2490          * microframes to frames.
2491          */
2492         if (udev->speed == USB_SPEED_HIGH)
2493                 normalized_interval = ep_bw->ep_interval;
2494         else
2495                 normalized_interval = ep_bw->ep_interval - 3;
2496
2497         if (normalized_interval == 0)
2498                 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2499         interval_bw = &bw_table->interval_bw[normalized_interval];
2500         interval_bw->num_packets += ep_bw->num_packets;
2501         switch (udev->speed) {
2502         case USB_SPEED_LOW:
2503                 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2504                 break;
2505         case USB_SPEED_FULL:
2506                 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2507                 break;
2508         case USB_SPEED_HIGH:
2509                 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2510                 break;
2511         case USB_SPEED_SUPER:
2512         case USB_SPEED_SUPER_PLUS:
2513         case USB_SPEED_UNKNOWN:
2514         case USB_SPEED_WIRELESS:
2515                 /* Should never happen because only LS/FS/HS endpoints will get
2516                  * added to the endpoint list.
2517                  */
2518                 return;
2519         }
2520
2521         if (tt_info)
2522                 tt_info->active_eps += 1;
2523         /* Insert the endpoint into the list, largest max packet size first. */
2524         list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2525                         bw_endpoint_list) {
2526                 if (ep_bw->max_packet_size >=
2527                                 smaller_ep->bw_info.max_packet_size) {
2528                         /* Add the new ep before the smaller endpoint */
2529                         list_add_tail(&virt_ep->bw_endpoint_list,
2530                                         &smaller_ep->bw_endpoint_list);
2531                         return;
2532                 }
2533         }
2534         /* Add the new endpoint at the end of the list. */
2535         list_add_tail(&virt_ep->bw_endpoint_list,
2536                         &interval_bw->endpoints);
2537 }
2538
2539 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2540                 struct xhci_virt_device *virt_dev,
2541                 int old_active_eps)
2542 {
2543         struct xhci_root_port_bw_info *rh_bw_info;
2544         if (!virt_dev->tt_info)
2545                 return;
2546
2547         rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2548         if (old_active_eps == 0 &&
2549                                 virt_dev->tt_info->active_eps != 0) {
2550                 rh_bw_info->num_active_tts += 1;
2551                 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2552         } else if (old_active_eps != 0 &&
2553                                 virt_dev->tt_info->active_eps == 0) {
2554                 rh_bw_info->num_active_tts -= 1;
2555                 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2556         }
2557 }
2558
2559 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2560                 struct xhci_virt_device *virt_dev,
2561                 struct xhci_container_ctx *in_ctx)
2562 {
2563         struct xhci_bw_info ep_bw_info[31];
2564         int i;
2565         struct xhci_input_control_ctx *ctrl_ctx;
2566         int old_active_eps = 0;
2567
2568         if (virt_dev->tt_info)
2569                 old_active_eps = virt_dev->tt_info->active_eps;
2570
2571         ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2572         if (!ctrl_ctx) {
2573                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2574                                 __func__);
2575                 return -ENOMEM;
2576         }
2577
2578         for (i = 0; i < 31; i++) {
2579                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2580                         continue;
2581
2582                 /* Make a copy of the BW info in case we need to revert this */
2583                 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2584                                 sizeof(ep_bw_info[i]));
2585                 /* Drop the endpoint from the interval table if the endpoint is
2586                  * being dropped or changed.
2587                  */
2588                 if (EP_IS_DROPPED(ctrl_ctx, i))
2589                         xhci_drop_ep_from_interval_table(xhci,
2590                                         &virt_dev->eps[i].bw_info,
2591                                         virt_dev->bw_table,
2592                                         virt_dev->udev,
2593                                         &virt_dev->eps[i],
2594                                         virt_dev->tt_info);
2595         }
2596         /* Overwrite the information stored in the endpoints' bw_info */
2597         xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2598         for (i = 0; i < 31; i++) {
2599                 /* Add any changed or added endpoints to the interval table */
2600                 if (EP_IS_ADDED(ctrl_ctx, i))
2601                         xhci_add_ep_to_interval_table(xhci,
2602                                         &virt_dev->eps[i].bw_info,
2603                                         virt_dev->bw_table,
2604                                         virt_dev->udev,
2605                                         &virt_dev->eps[i],
2606                                         virt_dev->tt_info);
2607         }
2608
2609         if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2610                 /* Ok, this fits in the bandwidth we have.
2611                  * Update the number of active TTs.
2612                  */
2613                 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2614                 return 0;
2615         }
2616
2617         /* We don't have enough bandwidth for this, revert the stored info. */
2618         for (i = 0; i < 31; i++) {
2619                 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2620                         continue;
2621
2622                 /* Drop the new copies of any added or changed endpoints from
2623                  * the interval table.
2624                  */
2625                 if (EP_IS_ADDED(ctrl_ctx, i)) {
2626                         xhci_drop_ep_from_interval_table(xhci,
2627                                         &virt_dev->eps[i].bw_info,
2628                                         virt_dev->bw_table,
2629                                         virt_dev->udev,
2630                                         &virt_dev->eps[i],
2631                                         virt_dev->tt_info);
2632                 }
2633                 /* Revert the endpoint back to its old information */
2634                 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2635                                 sizeof(ep_bw_info[i]));
2636                 /* Add any changed or dropped endpoints back into the table */
2637                 if (EP_IS_DROPPED(ctrl_ctx, i))
2638                         xhci_add_ep_to_interval_table(xhci,
2639                                         &virt_dev->eps[i].bw_info,
2640                                         virt_dev->bw_table,
2641                                         virt_dev->udev,
2642                                         &virt_dev->eps[i],
2643                                         virt_dev->tt_info);
2644         }
2645         return -ENOMEM;
2646 }
2647
2648
2649 /* Issue a configure endpoint command or evaluate context command
2650  * and wait for it to finish.
2651  */
2652 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2653                 struct usb_device *udev,
2654                 struct xhci_command *command,
2655                 bool ctx_change, bool must_succeed)
2656 {
2657         int ret;
2658         unsigned long flags;
2659         struct xhci_input_control_ctx *ctrl_ctx;
2660         struct xhci_virt_device *virt_dev;
2661
2662         if (!command)
2663                 return -EINVAL;
2664
2665         spin_lock_irqsave(&xhci->lock, flags);
2666         virt_dev = xhci->devs[udev->slot_id];
2667
2668         ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2669         if (!ctrl_ctx) {
2670                 spin_unlock_irqrestore(&xhci->lock, flags);
2671                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2672                                 __func__);
2673                 return -ENOMEM;
2674         }
2675
2676         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2677                         xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2678                 spin_unlock_irqrestore(&xhci->lock, flags);
2679                 xhci_warn(xhci, "Not enough host resources, "
2680                                 "active endpoint contexts = %u\n",
2681                                 xhci->num_active_eps);
2682                 return -ENOMEM;
2683         }
2684         if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2685             xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2686                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2687                         xhci_free_host_resources(xhci, ctrl_ctx);
2688                 spin_unlock_irqrestore(&xhci->lock, flags);
2689                 xhci_warn(xhci, "Not enough bandwidth\n");
2690                 return -ENOMEM;
2691         }
2692
2693         if (!ctx_change)
2694                 ret = xhci_queue_configure_endpoint(xhci, command,
2695                                 command->in_ctx->dma,
2696                                 udev->slot_id, must_succeed);
2697         else
2698                 ret = xhci_queue_evaluate_context(xhci, command,
2699                                 command->in_ctx->dma,
2700                                 udev->slot_id, must_succeed);
2701         if (ret < 0) {
2702                 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2703                         xhci_free_host_resources(xhci, ctrl_ctx);
2704                 spin_unlock_irqrestore(&xhci->lock, flags);
2705                 xhci_dbg_trace(xhci,  trace_xhci_dbg_context_change,
2706                                 "FIXME allocate a new ring segment");
2707                 return -ENOMEM;
2708         }
2709         xhci_ring_cmd_db(xhci);
2710         spin_unlock_irqrestore(&xhci->lock, flags);
2711
2712         /* Wait for the configure endpoint command to complete */
2713         wait_for_completion(command->completion);
2714
2715         if (!ctx_change)
2716                 ret = xhci_configure_endpoint_result(xhci, udev,
2717                                                      &command->status);
2718         else
2719                 ret = xhci_evaluate_context_result(xhci, udev,
2720                                                    &command->status);
2721
2722         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2723                 spin_lock_irqsave(&xhci->lock, flags);
2724                 /* If the command failed, remove the reserved resources.
2725                  * Otherwise, clean up the estimate to include dropped eps.
2726                  */
2727                 if (ret)
2728                         xhci_free_host_resources(xhci, ctrl_ctx);
2729                 else
2730                         xhci_finish_resource_reservation(xhci, ctrl_ctx);
2731                 spin_unlock_irqrestore(&xhci->lock, flags);
2732         }
2733         return ret;
2734 }
2735
2736 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2737         struct xhci_virt_device *vdev, int i)
2738 {
2739         struct xhci_virt_ep *ep = &vdev->eps[i];
2740
2741         if (ep->ep_state & EP_HAS_STREAMS) {
2742                 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2743                                 xhci_get_endpoint_address(i));
2744                 xhci_free_stream_info(xhci, ep->stream_info);
2745                 ep->stream_info = NULL;
2746                 ep->ep_state &= ~EP_HAS_STREAMS;
2747         }
2748 }
2749
2750 /* Called after one or more calls to xhci_add_endpoint() or
2751  * xhci_drop_endpoint().  If this call fails, the USB core is expected
2752  * to call xhci_reset_bandwidth().
2753  *
2754  * Since we are in the middle of changing either configuration or
2755  * installing a new alt setting, the USB core won't allow URBs to be
2756  * enqueued for any endpoint on the old config or interface.  Nothing
2757  * else should be touching the xhci->devs[slot_id] structure, so we
2758  * don't need to take the xhci->lock for manipulating that.
2759  */
2760 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2761 {
2762         int i;
2763         int ret = 0;
2764         struct xhci_hcd *xhci;
2765         struct xhci_virt_device *virt_dev;
2766         struct xhci_input_control_ctx *ctrl_ctx;
2767         struct xhci_slot_ctx *slot_ctx;
2768         struct xhci_command *command;
2769
2770         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2771         if (ret <= 0)
2772                 return ret;
2773         xhci = hcd_to_xhci(hcd);
2774         if (xhci->xhc_state & XHCI_STATE_DYING)
2775                 return -ENODEV;
2776
2777         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2778         virt_dev = xhci->devs[udev->slot_id];
2779
2780         command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
2781         if (!command)
2782                 return -ENOMEM;
2783
2784         command->in_ctx = virt_dev->in_ctx;
2785
2786         /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2787         ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
2788         if (!ctrl_ctx) {
2789                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2790                                 __func__);
2791                 ret = -ENOMEM;
2792                 goto command_cleanup;
2793         }
2794         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2795         ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2796         ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2797
2798         /* Don't issue the command if there's no endpoints to update. */
2799         if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2800             ctrl_ctx->drop_flags == 0) {
2801                 ret = 0;
2802                 goto command_cleanup;
2803         }
2804         /* Fix up Context Entries field. Minimum value is EP0 == BIT(1). */
2805         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2806         for (i = 31; i >= 1; i--) {
2807                 __le32 le32 = cpu_to_le32(BIT(i));
2808
2809                 if ((virt_dev->eps[i-1].ring && !(ctrl_ctx->drop_flags & le32))
2810                     || (ctrl_ctx->add_flags & le32) || i == 1) {
2811                         slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
2812                         slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(i));
2813                         break;
2814                 }
2815         }
2816         xhci_dbg(xhci, "New Input Control Context:\n");
2817         xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2818                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2819
2820         ret = xhci_configure_endpoint(xhci, udev, command,
2821                         false, false);
2822         if (ret)
2823                 /* Callee should call reset_bandwidth() */
2824                 goto command_cleanup;
2825
2826         xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2827         xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2828                      LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2829
2830         /* Free any rings that were dropped, but not changed. */
2831         for (i = 1; i < 31; ++i) {
2832                 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2833                     !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2834                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2835                         xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2836                 }
2837         }
2838         xhci_zero_in_ctx(xhci, virt_dev);
2839         /*
2840          * Install any rings for completely new endpoints or changed endpoints,
2841          * and free or cache any old rings from changed endpoints.
2842          */
2843         for (i = 1; i < 31; ++i) {
2844                 if (!virt_dev->eps[i].new_ring)
2845                         continue;
2846                 /* Only cache or free the old ring if it exists.
2847                  * It may not if this is the first add of an endpoint.
2848                  */
2849                 if (virt_dev->eps[i].ring) {
2850                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2851                 }
2852                 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2853                 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2854                 virt_dev->eps[i].new_ring = NULL;
2855         }
2856 command_cleanup:
2857         kfree(command->completion);
2858         kfree(command);
2859
2860         return ret;
2861 }
2862
2863 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2864 {
2865         struct xhci_hcd *xhci;
2866         struct xhci_virt_device *virt_dev;
2867         int i, ret;
2868
2869         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2870         if (ret <= 0)
2871                 return;
2872         xhci = hcd_to_xhci(hcd);
2873
2874         xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2875         virt_dev = xhci->devs[udev->slot_id];
2876         /* Free any rings allocated for added endpoints */
2877         for (i = 0; i < 31; ++i) {
2878                 if (virt_dev->eps[i].new_ring) {
2879                         xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2880                         virt_dev->eps[i].new_ring = NULL;
2881                 }
2882         }
2883         xhci_zero_in_ctx(xhci, virt_dev);
2884 }
2885
2886 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2887                 struct xhci_container_ctx *in_ctx,
2888                 struct xhci_container_ctx *out_ctx,
2889                 struct xhci_input_control_ctx *ctrl_ctx,
2890                 u32 add_flags, u32 drop_flags)
2891 {
2892         ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2893         ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2894         xhci_slot_copy(xhci, in_ctx, out_ctx);
2895         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2896
2897         xhci_dbg(xhci, "Input Context:\n");
2898         xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2899 }
2900
2901 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2902                 unsigned int slot_id, unsigned int ep_index,
2903                 struct xhci_dequeue_state *deq_state)
2904 {
2905         struct xhci_input_control_ctx *ctrl_ctx;
2906         struct xhci_container_ctx *in_ctx;
2907         struct xhci_ep_ctx *ep_ctx;
2908         u32 added_ctxs;
2909         dma_addr_t addr;
2910
2911         in_ctx = xhci->devs[slot_id]->in_ctx;
2912         ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
2913         if (!ctrl_ctx) {
2914                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2915                                 __func__);
2916                 return;
2917         }
2918
2919         xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2920                         xhci->devs[slot_id]->out_ctx, ep_index);
2921         ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2922         addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2923                         deq_state->new_deq_ptr);
2924         if (addr == 0) {
2925                 xhci_warn(xhci, "WARN Cannot submit config ep after "
2926                                 "reset ep command\n");
2927                 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2928                                 deq_state->new_deq_seg,
2929                                 deq_state->new_deq_ptr);
2930                 return;
2931         }
2932         ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2933
2934         added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2935         xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2936                         xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2937                         added_ctxs, added_ctxs);
2938 }
2939
2940 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2941                         unsigned int ep_index, struct xhci_td *td)
2942 {
2943         struct xhci_dequeue_state deq_state;
2944         struct xhci_virt_ep *ep;
2945         struct usb_device *udev = td->urb->dev;
2946
2947         xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2948                         "Cleaning up stalled endpoint ring");
2949         ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2950         /* We need to move the HW's dequeue pointer past this TD,
2951          * or it will attempt to resend it on the next doorbell ring.
2952          */
2953         xhci_find_new_dequeue_state(xhci, udev->slot_id,
2954                         ep_index, ep->stopped_stream, td, &deq_state);
2955
2956         if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
2957                 return;
2958
2959         /* HW with the reset endpoint quirk will use the saved dequeue state to
2960          * issue a configure endpoint command later.
2961          */
2962         if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2963                 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2964                                 "Queueing new dequeue state");
2965                 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2966                                 ep_index, ep->stopped_stream, &deq_state);
2967         } else {
2968                 /* Better hope no one uses the input context between now and the
2969                  * reset endpoint completion!
2970                  * XXX: No idea how this hardware will react when stream rings
2971                  * are enabled.
2972                  */
2973                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2974                                 "Setting up input context for "
2975                                 "configure endpoint command");
2976                 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2977                                 ep_index, &deq_state);
2978         }
2979 }
2980
2981 /* Called when clearing halted device. The core should have sent the control
2982  * message to clear the device halt condition. The host side of the halt should
2983  * already be cleared with a reset endpoint command issued when the STALL tx
2984  * event was received.
2985  *
2986  * Context: in_interrupt
2987  */
2988
2989 void xhci_endpoint_reset(struct usb_hcd *hcd,
2990                 struct usb_host_endpoint *ep)
2991 {
2992         struct xhci_hcd *xhci;
2993
2994         xhci = hcd_to_xhci(hcd);
2995
2996         /*
2997          * We might need to implement the config ep cmd in xhci 4.8.1 note:
2998          * The Reset Endpoint Command may only be issued to endpoints in the
2999          * Halted state. If software wishes reset the Data Toggle or Sequence
3000          * Number of an endpoint that isn't in the Halted state, then software
3001          * may issue a Configure Endpoint Command with the Drop and Add bits set
3002          * for the target endpoint. that is in the Stopped state.
3003          */
3004
3005         /* For now just print debug to follow the situation */
3006         xhci_dbg(xhci, "Endpoint 0x%x ep reset callback called\n",
3007                  ep->desc.bEndpointAddress);
3008 }
3009
3010 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
3011                 struct usb_device *udev, struct usb_host_endpoint *ep,
3012                 unsigned int slot_id)
3013 {
3014         int ret;
3015         unsigned int ep_index;
3016         unsigned int ep_state;
3017
3018         if (!ep)
3019                 return -EINVAL;
3020         ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
3021         if (ret <= 0)
3022                 return -EINVAL;
3023         if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
3024                 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
3025                                 " descriptor for ep 0x%x does not support streams\n",
3026                                 ep->desc.bEndpointAddress);
3027                 return -EINVAL;
3028         }
3029
3030         ep_index = xhci_get_endpoint_index(&ep->desc);
3031         ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3032         if (ep_state & EP_HAS_STREAMS ||
3033                         ep_state & EP_GETTING_STREAMS) {
3034                 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
3035                                 "already has streams set up.\n",
3036                                 ep->desc.bEndpointAddress);
3037                 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
3038                                 "dynamic stream context array reallocation.\n");
3039                 return -EINVAL;
3040         }
3041         if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
3042                 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
3043                                 "endpoint 0x%x; URBs are pending.\n",
3044                                 ep->desc.bEndpointAddress);
3045                 return -EINVAL;
3046         }
3047         return 0;
3048 }
3049
3050 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
3051                 unsigned int *num_streams, unsigned int *num_stream_ctxs)
3052 {
3053         unsigned int max_streams;
3054
3055         /* The stream context array size must be a power of two */
3056         *num_stream_ctxs = roundup_pow_of_two(*num_streams);
3057         /*
3058          * Find out how many primary stream array entries the host controller
3059          * supports.  Later we may use secondary stream arrays (similar to 2nd
3060          * level page entries), but that's an optional feature for xHCI host
3061          * controllers. xHCs must support at least 4 stream IDs.
3062          */
3063         max_streams = HCC_MAX_PSA(xhci->hcc_params);
3064         if (*num_stream_ctxs > max_streams) {
3065                 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3066                                 max_streams);
3067                 *num_stream_ctxs = max_streams;
3068                 *num_streams = max_streams;
3069         }
3070 }
3071
3072 /* Returns an error code if one of the endpoint already has streams.
3073  * This does not change any data structures, it only checks and gathers
3074  * information.
3075  */
3076 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3077                 struct usb_device *udev,
3078                 struct usb_host_endpoint **eps, unsigned int num_eps,
3079                 unsigned int *num_streams, u32 *changed_ep_bitmask)
3080 {
3081         unsigned int max_streams;
3082         unsigned int endpoint_flag;
3083         int i;
3084         int ret;
3085
3086         for (i = 0; i < num_eps; i++) {
3087                 ret = xhci_check_streams_endpoint(xhci, udev,
3088                                 eps[i], udev->slot_id);
3089                 if (ret < 0)
3090                         return ret;
3091
3092                 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3093                 if (max_streams < (*num_streams - 1)) {
3094                         xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3095                                         eps[i]->desc.bEndpointAddress,
3096                                         max_streams);
3097                         *num_streams = max_streams+1;
3098                 }
3099
3100                 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3101                 if (*changed_ep_bitmask & endpoint_flag)
3102                         return -EINVAL;
3103                 *changed_ep_bitmask |= endpoint_flag;
3104         }
3105         return 0;
3106 }
3107
3108 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3109                 struct usb_device *udev,
3110                 struct usb_host_endpoint **eps, unsigned int num_eps)
3111 {
3112         u32 changed_ep_bitmask = 0;
3113         unsigned int slot_id;
3114         unsigned int ep_index;
3115         unsigned int ep_state;
3116         int i;
3117
3118         slot_id = udev->slot_id;
3119         if (!xhci->devs[slot_id])
3120                 return 0;
3121
3122         for (i = 0; i < num_eps; i++) {
3123                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3124                 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3125                 /* Are streams already being freed for the endpoint? */
3126                 if (ep_state & EP_GETTING_NO_STREAMS) {
3127                         xhci_warn(xhci, "WARN Can't disable streams for "
3128                                         "endpoint 0x%x, "
3129                                         "streams are being disabled already\n",
3130                                         eps[i]->desc.bEndpointAddress);
3131                         return 0;
3132                 }
3133                 /* Are there actually any streams to free? */
3134                 if (!(ep_state & EP_HAS_STREAMS) &&
3135                                 !(ep_state & EP_GETTING_STREAMS)) {
3136                         xhci_warn(xhci, "WARN Can't disable streams for "
3137                                         "endpoint 0x%x, "
3138                                         "streams are already disabled!\n",
3139                                         eps[i]->desc.bEndpointAddress);
3140                         xhci_warn(xhci, "WARN xhci_free_streams() called "
3141                                         "with non-streams endpoint\n");
3142                         return 0;
3143                 }
3144                 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3145         }
3146         return changed_ep_bitmask;
3147 }
3148
3149 /*
3150  * The USB device drivers use this function (through the HCD interface in USB
3151  * core) to prepare a set of bulk endpoints to use streams.  Streams are used to
3152  * coordinate mass storage command queueing across multiple endpoints (basically
3153  * a stream ID == a task ID).
3154  *
3155  * Setting up streams involves allocating the same size stream context array
3156  * for each endpoint and issuing a configure endpoint command for all endpoints.
3157  *
3158  * Don't allow the call to succeed if one endpoint only supports one stream
3159  * (which means it doesn't support streams at all).
3160  *
3161  * Drivers may get less stream IDs than they asked for, if the host controller
3162  * hardware or endpoints claim they can't support the number of requested
3163  * stream IDs.
3164  */
3165 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3166                 struct usb_host_endpoint **eps, unsigned int num_eps,
3167                 unsigned int num_streams, gfp_t mem_flags)
3168 {
3169         int i, ret;
3170         struct xhci_hcd *xhci;
3171         struct xhci_virt_device *vdev;
3172         struct xhci_command *config_cmd;
3173         struct xhci_input_control_ctx *ctrl_ctx;
3174         unsigned int ep_index;
3175         unsigned int num_stream_ctxs;
3176         unsigned long flags;
3177         u32 changed_ep_bitmask = 0;
3178
3179         if (!eps)
3180                 return -EINVAL;
3181
3182         /* Add one to the number of streams requested to account for
3183          * stream 0 that is reserved for xHCI usage.
3184          */
3185         num_streams += 1;
3186         xhci = hcd_to_xhci(hcd);
3187         xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3188                         num_streams);
3189
3190         /* MaxPSASize value 0 (2 streams) means streams are not supported */
3191         if ((xhci->quirks & XHCI_BROKEN_STREAMS) ||
3192                         HCC_MAX_PSA(xhci->hcc_params) < 4) {
3193                 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3194                 return -ENOSYS;
3195         }
3196
3197         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3198         if (!config_cmd) {
3199                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3200                 return -ENOMEM;
3201         }
3202         ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
3203         if (!ctrl_ctx) {
3204                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3205                                 __func__);
3206                 xhci_free_command(xhci, config_cmd);
3207                 return -ENOMEM;
3208         }
3209
3210         /* Check to make sure all endpoints are not already configured for
3211          * streams.  While we're at it, find the maximum number of streams that
3212          * all the endpoints will support and check for duplicate endpoints.
3213          */
3214         spin_lock_irqsave(&xhci->lock, flags);
3215         ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3216                         num_eps, &num_streams, &changed_ep_bitmask);
3217         if (ret < 0) {
3218                 xhci_free_command(xhci, config_cmd);
3219                 spin_unlock_irqrestore(&xhci->lock, flags);
3220                 return ret;
3221         }
3222         if (num_streams <= 1) {
3223                 xhci_warn(xhci, "WARN: endpoints can't handle "
3224                                 "more than one stream.\n");
3225                 xhci_free_command(xhci, config_cmd);
3226                 spin_unlock_irqrestore(&xhci->lock, flags);
3227                 return -EINVAL;
3228         }
3229         vdev = xhci->devs[udev->slot_id];
3230         /* Mark each endpoint as being in transition, so
3231          * xhci_urb_enqueue() will reject all URBs.
3232          */
3233         for (i = 0; i < num_eps; i++) {
3234                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3235                 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3236         }
3237         spin_unlock_irqrestore(&xhci->lock, flags);
3238
3239         /* Setup internal data structures and allocate HW data structures for
3240          * streams (but don't install the HW structures in the input context
3241          * until we're sure all memory allocation succeeded).
3242          */
3243         xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3244         xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3245                         num_stream_ctxs, num_streams);
3246
3247         for (i = 0; i < num_eps; i++) {
3248                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3249                 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3250                                 num_stream_ctxs,
3251                                 num_streams, mem_flags);
3252                 if (!vdev->eps[ep_index].stream_info)
3253                         goto cleanup;
3254                 /* Set maxPstreams in endpoint context and update deq ptr to
3255                  * point to stream context array. FIXME
3256                  */
3257         }
3258
3259         /* Set up the input context for a configure endpoint command. */
3260         for (i = 0; i < num_eps; i++) {
3261                 struct xhci_ep_ctx *ep_ctx;
3262
3263                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3264                 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3265
3266                 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3267                                 vdev->out_ctx, ep_index);
3268                 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3269                                 vdev->eps[ep_index].stream_info);
3270         }
3271         /* Tell the HW to drop its old copy of the endpoint context info
3272          * and add the updated copy from the input context.
3273          */
3274         xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3275                         vdev->out_ctx, ctrl_ctx,
3276                         changed_ep_bitmask, changed_ep_bitmask);
3277
3278         /* Issue and wait for the configure endpoint command */
3279         ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3280                         false, false);
3281
3282         /* xHC rejected the configure endpoint command for some reason, so we
3283          * leave the old ring intact and free our internal streams data
3284          * structure.
3285          */
3286         if (ret < 0)
3287                 goto cleanup;
3288
3289         spin_lock_irqsave(&xhci->lock, flags);
3290         for (i = 0; i < num_eps; i++) {
3291                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3292                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3293                 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3294                          udev->slot_id, ep_index);
3295                 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3296         }
3297         xhci_free_command(xhci, config_cmd);
3298         spin_unlock_irqrestore(&xhci->lock, flags);
3299
3300         /* Subtract 1 for stream 0, which drivers can't use */
3301         return num_streams - 1;
3302
3303 cleanup:
3304         /* If it didn't work, free the streams! */
3305         for (i = 0; i < num_eps; i++) {
3306                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3307                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3308                 vdev->eps[ep_index].stream_info = NULL;
3309                 /* FIXME Unset maxPstreams in endpoint context and
3310                  * update deq ptr to point to normal string ring.
3311                  */
3312                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3313                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3314                 xhci_endpoint_zero(xhci, vdev, eps[i]);
3315         }
3316         xhci_free_command(xhci, config_cmd);
3317         return -ENOMEM;
3318 }
3319
3320 /* Transition the endpoint from using streams to being a "normal" endpoint
3321  * without streams.
3322  *
3323  * Modify the endpoint context state, submit a configure endpoint command,
3324  * and free all endpoint rings for streams if that completes successfully.
3325  */
3326 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3327                 struct usb_host_endpoint **eps, unsigned int num_eps,
3328                 gfp_t mem_flags)
3329 {
3330         int i, ret;
3331         struct xhci_hcd *xhci;
3332         struct xhci_virt_device *vdev;
3333         struct xhci_command *command;
3334         struct xhci_input_control_ctx *ctrl_ctx;
3335         unsigned int ep_index;
3336         unsigned long flags;
3337         u32 changed_ep_bitmask;
3338
3339         xhci = hcd_to_xhci(hcd);
3340         vdev = xhci->devs[udev->slot_id];
3341
3342         /* Set up a configure endpoint command to remove the streams rings */
3343         spin_lock_irqsave(&xhci->lock, flags);
3344         changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3345                         udev, eps, num_eps);
3346         if (changed_ep_bitmask == 0) {
3347                 spin_unlock_irqrestore(&xhci->lock, flags);
3348                 return -EINVAL;
3349         }
3350
3351         /* Use the xhci_command structure from the first endpoint.  We may have
3352          * allocated too many, but the driver may call xhci_free_streams() for
3353          * each endpoint it grouped into one call to xhci_alloc_streams().
3354          */
3355         ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3356         command = vdev->eps[ep_index].stream_info->free_streams_command;
3357         ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
3358         if (!ctrl_ctx) {
3359                 spin_unlock_irqrestore(&xhci->lock, flags);
3360                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3361                                 __func__);
3362                 return -EINVAL;
3363         }
3364
3365         for (i = 0; i < num_eps; i++) {
3366                 struct xhci_ep_ctx *ep_ctx;
3367
3368                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3369                 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3370                 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3371                         EP_GETTING_NO_STREAMS;
3372
3373                 xhci_endpoint_copy(xhci, command->in_ctx,
3374                                 vdev->out_ctx, ep_index);
3375                 xhci_setup_no_streams_ep_input_ctx(ep_ctx,
3376                                 &vdev->eps[ep_index]);
3377         }
3378         xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3379                         vdev->out_ctx, ctrl_ctx,
3380                         changed_ep_bitmask, changed_ep_bitmask);
3381         spin_unlock_irqrestore(&xhci->lock, flags);
3382
3383         /* Issue and wait for the configure endpoint command,
3384          * which must succeed.
3385          */
3386         ret = xhci_configure_endpoint(xhci, udev, command,
3387                         false, true);
3388
3389         /* xHC rejected the configure endpoint command for some reason, so we
3390          * leave the streams rings intact.
3391          */
3392         if (ret < 0)
3393                 return ret;
3394
3395         spin_lock_irqsave(&xhci->lock, flags);
3396         for (i = 0; i < num_eps; i++) {
3397                 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3398                 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3399                 vdev->eps[ep_index].stream_info = NULL;
3400                 /* FIXME Unset maxPstreams in endpoint context and
3401                  * update deq ptr to point to normal string ring.
3402                  */
3403                 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3404                 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3405         }
3406         spin_unlock_irqrestore(&xhci->lock, flags);
3407
3408         return 0;
3409 }
3410
3411 /*
3412  * Deletes endpoint resources for endpoints that were active before a Reset
3413  * Device command, or a Disable Slot command.  The Reset Device command leaves
3414  * the control endpoint intact, whereas the Disable Slot command deletes it.
3415  *
3416  * Must be called with xhci->lock held.
3417  */
3418 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3419         struct xhci_virt_device *virt_dev, bool drop_control_ep)
3420 {
3421         int i;
3422         unsigned int num_dropped_eps = 0;
3423         unsigned int drop_flags = 0;
3424
3425         for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3426                 if (virt_dev->eps[i].ring) {
3427                         drop_flags |= 1 << i;
3428                         num_dropped_eps++;
3429                 }
3430         }
3431         xhci->num_active_eps -= num_dropped_eps;
3432         if (num_dropped_eps)
3433                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3434                                 "Dropped %u ep ctxs, flags = 0x%x, "
3435                                 "%u now active.",
3436                                 num_dropped_eps, drop_flags,
3437                                 xhci->num_active_eps);
3438 }
3439
3440 /*
3441  * This submits a Reset Device Command, which will set the device state to 0,
3442  * set the device address to 0, and disable all the endpoints except the default
3443  * control endpoint.  The USB core should come back and call
3444  * xhci_address_device(), and then re-set up the configuration.  If this is
3445  * called because of a usb_reset_and_verify_device(), then the old alternate
3446  * settings will be re-installed through the normal bandwidth allocation
3447  * functions.
3448  *
3449  * Wait for the Reset Device command to finish.  Remove all structures
3450  * associated with the endpoints that were disabled.  Clear the input device
3451  * structure?  Cache the rings?  Reset the control endpoint 0 max packet size?
3452  *
3453  * If the virt_dev to be reset does not exist or does not match the udev,
3454  * it means the device is lost, possibly due to the xHC restore error and
3455  * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3456  * re-allocate the device.
3457  */
3458 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3459 {
3460         int ret, i;
3461         unsigned long flags;
3462         struct xhci_hcd *xhci;
3463         unsigned int slot_id;
3464         struct xhci_virt_device *virt_dev;
3465         struct xhci_command *reset_device_cmd;
3466         int last_freed_endpoint;
3467         struct xhci_slot_ctx *slot_ctx;
3468         int old_active_eps = 0;
3469
3470         ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3471         if (ret <= 0)
3472                 return ret;
3473         xhci = hcd_to_xhci(hcd);
3474         slot_id = udev->slot_id;
3475         virt_dev = xhci->devs[slot_id];
3476         if (!virt_dev) {
3477                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3478                                 "not exist. Re-allocate the device\n", slot_id);
3479                 ret = xhci_alloc_dev(hcd, udev);
3480                 if (ret == 1)
3481                         return 0;
3482                 else
3483                         return -EINVAL;
3484         }
3485
3486         if (virt_dev->tt_info)
3487                 old_active_eps = virt_dev->tt_info->active_eps;
3488
3489         if (virt_dev->udev != udev) {
3490                 /* If the virt_dev and the udev does not match, this virt_dev
3491                  * may belong to another udev.
3492                  * Re-allocate the device.
3493                  */
3494                 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3495                                 "not match the udev. Re-allocate the device\n",
3496                                 slot_id);
3497                 ret = xhci_alloc_dev(hcd, udev);
3498                 if (ret == 1)
3499                         return 0;
3500                 else
3501                         return -EINVAL;
3502         }
3503
3504         /* If device is not setup, there is no point in resetting it */
3505         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3506         if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3507                                                 SLOT_STATE_DISABLED)
3508                 return 0;
3509
3510         xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3511         /* Allocate the command structure that holds the struct completion.
3512          * Assume we're in process context, since the normal device reset
3513          * process has to wait for the device anyway.  Storage devices are
3514          * reset as part of error handling, so use GFP_NOIO instead of
3515          * GFP_KERNEL.
3516          */
3517         reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3518         if (!reset_device_cmd) {
3519                 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3520                 return -ENOMEM;
3521         }
3522
3523         /* Attempt to submit the Reset Device command to the command ring */
3524         spin_lock_irqsave(&xhci->lock, flags);
3525
3526         ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3527         if (ret) {
3528                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3529                 spin_unlock_irqrestore(&xhci->lock, flags);
3530                 goto command_cleanup;
3531         }
3532         xhci_ring_cmd_db(xhci);
3533         spin_unlock_irqrestore(&xhci->lock, flags);
3534
3535         /* Wait for the Reset Device command to finish */
3536         wait_for_completion(reset_device_cmd->completion);
3537
3538         /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3539          * unless we tried to reset a slot ID that wasn't enabled,
3540          * or the device wasn't in the addressed or configured state.
3541          */
3542         ret = reset_device_cmd->status;
3543         switch (ret) {
3544         case COMP_CMD_ABORT:
3545         case COMP_CMD_STOP:
3546                 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3547                 ret = -ETIME;
3548                 goto command_cleanup;
3549         case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3550         case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3551                 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3552                                 slot_id,
3553                                 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3554                 xhci_dbg(xhci, "Not freeing device rings.\n");
3555                 /* Don't treat this as an error.  May change my mind later. */
3556                 ret = 0;
3557                 goto command_cleanup;
3558         case COMP_SUCCESS:
3559                 xhci_dbg(xhci, "Successful reset device command.\n");
3560                 break;
3561         default:
3562                 if (xhci_is_vendor_info_code(xhci, ret))
3563                         break;
3564                 xhci_warn(xhci, "Unknown completion code %u for "
3565                                 "reset device command.\n", ret);
3566                 ret = -EINVAL;
3567                 goto command_cleanup;
3568         }
3569
3570         /* Free up host controller endpoint resources */
3571         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3572                 spin_lock_irqsave(&xhci->lock, flags);
3573                 /* Don't delete the default control endpoint resources */
3574                 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3575                 spin_unlock_irqrestore(&xhci->lock, flags);
3576         }
3577
3578         /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3579         last_freed_endpoint = 1;
3580         for (i = 1; i < 31; ++i) {
3581                 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3582
3583                 if (ep->ep_state & EP_HAS_STREAMS) {
3584                         xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3585                                         xhci_get_endpoint_address(i));
3586                         xhci_free_stream_info(xhci, ep->stream_info);
3587                         ep->stream_info = NULL;
3588                         ep->ep_state &= ~EP_HAS_STREAMS;
3589                 }
3590
3591                 if (ep->ring) {
3592                         xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3593                         last_freed_endpoint = i;
3594                 }
3595                 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3596                         xhci_drop_ep_from_interval_table(xhci,
3597                                         &virt_dev->eps[i].bw_info,
3598                                         virt_dev->bw_table,
3599                                         udev,
3600                                         &virt_dev->eps[i],
3601                                         virt_dev->tt_info);
3602                 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3603         }
3604         /* If necessary, update the number of active TTs on this root port */
3605         xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3606
3607         xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3608         xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3609         ret = 0;
3610
3611 command_cleanup:
3612         xhci_free_command(xhci, reset_device_cmd);
3613         return ret;
3614 }
3615
3616 /*
3617  * At this point, the struct usb_device is about to go away, the device has
3618  * disconnected, and all traffic has been stopped and the endpoints have been
3619  * disabled.  Free any HC data structures associated with that device.
3620  */
3621 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3622 {
3623         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3624         struct xhci_virt_device *virt_dev;
3625         unsigned long flags;
3626         u32 state;
3627         int i, ret;
3628         struct xhci_command *command;
3629
3630         command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3631         if (!command)
3632                 return;
3633
3634 #ifndef CONFIG_USB_DEFAULT_PERSIST
3635         /*
3636          * We called pm_runtime_get_noresume when the device was attached.
3637          * Decrement the counter here to allow controller to runtime suspend
3638          * if no devices remain.
3639          */
3640         if (xhci->quirks & XHCI_RESET_ON_RESUME)
3641                 pm_runtime_put_noidle(hcd->self.controller);
3642 #endif
3643
3644         ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3645         /* If the host is halted due to driver unload, we still need to free the
3646          * device.
3647          */
3648         if (ret <= 0 && ret != -ENODEV) {
3649                 kfree(command);
3650                 return;
3651         }
3652
3653         virt_dev = xhci->devs[udev->slot_id];
3654
3655         /* Stop any wayward timer functions (which may grab the lock) */
3656         for (i = 0; i < 31; ++i) {
3657                 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3658                 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3659         }
3660
3661         spin_lock_irqsave(&xhci->lock, flags);
3662         /* Don't disable the slot if the host controller is dead. */
3663         state = readl(&xhci->op_regs->status);
3664         if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3665                         (xhci->xhc_state & XHCI_STATE_HALTED)) {
3666                 xhci_free_virt_device(xhci, udev->slot_id);
3667                 spin_unlock_irqrestore(&xhci->lock, flags);
3668                 kfree(command);
3669                 return;
3670         }
3671
3672         if (xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3673                                     udev->slot_id)) {
3674                 spin_unlock_irqrestore(&xhci->lock, flags);
3675                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3676                 return;
3677         }
3678         xhci_ring_cmd_db(xhci);
3679         spin_unlock_irqrestore(&xhci->lock, flags);
3680
3681         /*
3682          * Event command completion handler will free any data structures
3683          * associated with the slot.  XXX Can free sleep?
3684          */
3685 }
3686
3687 /*
3688  * Checks if we have enough host controller resources for the default control
3689  * endpoint.
3690  *
3691  * Must be called with xhci->lock held.
3692  */
3693 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3694 {
3695         if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3696                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3697                                 "Not enough ep ctxs: "
3698                                 "%u active, need to add 1, limit is %u.",
3699                                 xhci->num_active_eps, xhci->limit_active_eps);
3700                 return -ENOMEM;
3701         }
3702         xhci->num_active_eps += 1;
3703         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3704                         "Adding 1 ep ctx, %u now active.",
3705                         xhci->num_active_eps);
3706         return 0;
3707 }
3708
3709
3710 /*
3711  * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3712  * timed out, or allocating memory failed.  Returns 1 on success.
3713  */
3714 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3715 {
3716         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3717         unsigned long flags;
3718         int ret, slot_id;
3719         struct xhci_command *command;
3720
3721         command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3722         if (!command)
3723                 return 0;
3724
3725         /* xhci->slot_id and xhci->addr_dev are not thread-safe */
3726         mutex_lock(&xhci->mutex);
3727         spin_lock_irqsave(&xhci->lock, flags);
3728         command->completion = &xhci->addr_dev;
3729         ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3730         if (ret) {
3731                 spin_unlock_irqrestore(&xhci->lock, flags);
3732                 mutex_unlock(&xhci->mutex);
3733                 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3734                 kfree(command);
3735                 return 0;
3736         }
3737         xhci_ring_cmd_db(xhci);
3738         spin_unlock_irqrestore(&xhci->lock, flags);
3739
3740         wait_for_completion(command->completion);
3741         slot_id = xhci->slot_id;
3742         mutex_unlock(&xhci->mutex);
3743
3744         if (!slot_id || command->status != COMP_SUCCESS) {
3745                 xhci_err(xhci, "Error while assigning device slot ID\n");
3746                 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3747                                 HCS_MAX_SLOTS(
3748                                         readl(&xhci->cap_regs->hcs_params1)));
3749                 kfree(command);
3750                 return 0;
3751         }
3752
3753         if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3754                 spin_lock_irqsave(&xhci->lock, flags);
3755                 ret = xhci_reserve_host_control_ep_resources(xhci);
3756                 if (ret) {
3757                         spin_unlock_irqrestore(&xhci->lock, flags);
3758                         xhci_warn(xhci, "Not enough host resources, "
3759                                         "active endpoint contexts = %u\n",
3760                                         xhci->num_active_eps);
3761                         goto disable_slot;
3762                 }
3763                 spin_unlock_irqrestore(&xhci->lock, flags);
3764         }
3765         /* Use GFP_NOIO, since this function can be called from
3766          * xhci_discover_or_reset_device(), which may be called as part of
3767          * mass storage driver error handling.
3768          */
3769         if (!xhci_alloc_virt_device(xhci, slot_id, udev, GFP_NOIO)) {
3770                 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3771                 goto disable_slot;
3772         }
3773         udev->slot_id = slot_id;
3774
3775 #ifndef CONFIG_USB_DEFAULT_PERSIST
3776         /*
3777          * If resetting upon resume, we can't put the controller into runtime
3778          * suspend if there is a device attached.
3779          */
3780         if (xhci->quirks & XHCI_RESET_ON_RESUME)
3781                 pm_runtime_get_noresume(hcd->self.controller);
3782 #endif
3783
3784
3785         kfree(command);
3786         /* Is this a LS or FS device under a HS hub? */
3787         /* Hub or peripherial? */
3788         return 1;
3789
3790 disable_slot:
3791         /* Disable slot, if we can do it without mem alloc */
3792         spin_lock_irqsave(&xhci->lock, flags);
3793         command->completion = NULL;
3794         command->status = 0;
3795         if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3796                                      udev->slot_id))
3797                 xhci_ring_cmd_db(xhci);
3798         spin_unlock_irqrestore(&xhci->lock, flags);
3799         return 0;
3800 }
3801
3802 /*
3803  * Issue an Address Device command and optionally send a corresponding
3804  * SetAddress request to the device.
3805  */
3806 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3807                              enum xhci_setup_dev setup)
3808 {
3809         const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3810         unsigned long flags;
3811         struct xhci_virt_device *virt_dev;
3812         int ret = 0;
3813         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3814         struct xhci_slot_ctx *slot_ctx;
3815         struct xhci_input_control_ctx *ctrl_ctx;
3816         u64 temp_64;
3817         struct xhci_command *command = NULL;
3818
3819         mutex_lock(&xhci->mutex);
3820
3821         if (xhci->xhc_state)    /* dying or halted */
3822                 goto out;
3823
3824         if (!udev->slot_id) {
3825                 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3826                                 "Bad Slot ID %d", udev->slot_id);
3827                 ret = -EINVAL;
3828                 goto out;
3829         }
3830
3831         virt_dev = xhci->devs[udev->slot_id];
3832
3833         if (WARN_ON(!virt_dev)) {
3834                 /*
3835                  * In plug/unplug torture test with an NEC controller,
3836                  * a zero-dereference was observed once due to virt_dev = 0.
3837                  * Print useful debug rather than crash if it is observed again!
3838                  */
3839                 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3840                         udev->slot_id);
3841                 ret = -EINVAL;
3842                 goto out;
3843         }
3844
3845         if (setup == SETUP_CONTEXT_ONLY) {
3846                 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3847                 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3848                     SLOT_STATE_DEFAULT) {
3849                         xhci_dbg(xhci, "Slot already in default state\n");
3850                         goto out;
3851                 }
3852         }
3853
3854         command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3855         if (!command) {
3856                 ret = -ENOMEM;
3857                 goto out;
3858         }
3859
3860         command->in_ctx = virt_dev->in_ctx;
3861         command->completion = &xhci->addr_dev;
3862
3863         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3864         ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
3865         if (!ctrl_ctx) {
3866                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3867                                 __func__);
3868                 ret = -EINVAL;
3869                 goto out;
3870         }
3871         /*
3872          * If this is the first Set Address since device plug-in or
3873          * virt_device realloaction after a resume with an xHCI power loss,
3874          * then set up the slot context.
3875          */
3876         if (!slot_ctx->dev_info)
3877                 xhci_setup_addressable_virt_dev(xhci, udev);
3878         /* Otherwise, update the control endpoint ring enqueue pointer. */
3879         else
3880                 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3881         ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3882         ctrl_ctx->drop_flags = 0;
3883
3884         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3885         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3886         trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3887                                 le32_to_cpu(slot_ctx->dev_info) >> 27);
3888
3889         spin_lock_irqsave(&xhci->lock, flags);
3890         ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3891                                         udev->slot_id, setup);
3892         if (ret) {
3893                 spin_unlock_irqrestore(&xhci->lock, flags);
3894                 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3895                                 "FIXME: allocate a command ring segment");
3896                 goto out;
3897         }
3898         xhci_ring_cmd_db(xhci);
3899         spin_unlock_irqrestore(&xhci->lock, flags);
3900
3901         /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3902         wait_for_completion(command->completion);
3903
3904         /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3905          * the SetAddress() "recovery interval" required by USB and aborting the
3906          * command on a timeout.
3907          */
3908         switch (command->status) {
3909         case COMP_CMD_ABORT:
3910         case COMP_CMD_STOP:
3911                 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3912                 ret = -ETIME;
3913                 break;
3914         case COMP_CTX_STATE:
3915         case COMP_EBADSLT:
3916                 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3917                          act, udev->slot_id);
3918                 ret = -EINVAL;
3919                 break;
3920         case COMP_TX_ERR:
3921                 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3922                 ret = -EPROTO;
3923                 break;
3924         case COMP_DEV_ERR:
3925                 dev_warn(&udev->dev,
3926                          "ERROR: Incompatible device for setup %s command\n", act);
3927                 ret = -ENODEV;
3928                 break;
3929         case COMP_SUCCESS:
3930                 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3931                                "Successful setup %s command", act);
3932                 break;
3933         default:
3934                 xhci_err(xhci,
3935                          "ERROR: unexpected setup %s command completion code 0x%x.\n",
3936                          act, command->status);
3937                 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3938                 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3939                 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3940                 ret = -EINVAL;
3941                 break;
3942         }
3943         if (ret)
3944                 goto out;
3945         temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3946         xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3947                         "Op regs DCBAA ptr = %#016llx", temp_64);
3948         xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3949                 "Slot ID %d dcbaa entry @%p = %#016llx",
3950                 udev->slot_id,
3951                 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3952                 (unsigned long long)
3953                 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3954         xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3955                         "Output Context DMA address = %#08llx",
3956                         (unsigned long long)virt_dev->out_ctx->dma);
3957         xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3958         xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3959         trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3960                                 le32_to_cpu(slot_ctx->dev_info) >> 27);
3961         xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3962         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3963         /*
3964          * USB core uses address 1 for the roothubs, so we add one to the
3965          * address given back to us by the HC.
3966          */
3967         slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3968         trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3969                                 le32_to_cpu(slot_ctx->dev_info) >> 27);
3970         /* Zero the input context control for later use */
3971         ctrl_ctx->add_flags = 0;
3972         ctrl_ctx->drop_flags = 0;
3973
3974         xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3975                        "Internal device address = %d",
3976                        le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3977 out:
3978         mutex_unlock(&xhci->mutex);
3979         kfree(command);
3980         return ret;
3981 }
3982
3983 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3984 {
3985         return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3986 }
3987
3988 int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3989 {
3990         return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3991 }
3992
3993 /*
3994  * Transfer the port index into real index in the HW port status
3995  * registers. Caculate offset between the port's PORTSC register
3996  * and port status base. Divide the number of per port register
3997  * to get the real index. The raw port number bases 1.
3998  */
3999 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
4000 {
4001         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4002         __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
4003         __le32 __iomem *addr;
4004         int raw_port;
4005
4006         if (hcd->speed < HCD_USB3)
4007                 addr = xhci->usb2_ports[port1 - 1];
4008         else
4009                 addr = xhci->usb3_ports[port1 - 1];
4010
4011         raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
4012         return raw_port;
4013 }
4014
4015 /*
4016  * Issue an Evaluate Context command to change the Maximum Exit Latency in the
4017  * slot context.  If that succeeds, store the new MEL in the xhci_virt_device.
4018  */
4019 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
4020                         struct usb_device *udev, u16 max_exit_latency)
4021 {
4022         struct xhci_virt_device *virt_dev;
4023         struct xhci_command *command;
4024         struct xhci_input_control_ctx *ctrl_ctx;
4025         struct xhci_slot_ctx *slot_ctx;
4026         unsigned long flags;
4027         int ret;
4028
4029         spin_lock_irqsave(&xhci->lock, flags);
4030
4031         virt_dev = xhci->devs[udev->slot_id];
4032
4033         /*
4034          * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
4035          * xHC was re-initialized. Exit latency will be set later after
4036          * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
4037          */
4038
4039         if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
4040                 spin_unlock_irqrestore(&xhci->lock, flags);
4041                 return 0;
4042         }
4043
4044         /* Attempt to issue an Evaluate Context command to change the MEL. */
4045         command = xhci->lpm_command;
4046         ctrl_ctx = xhci_get_input_control_ctx(command->in_ctx);
4047         if (!ctrl_ctx) {
4048                 spin_unlock_irqrestore(&xhci->lock, flags);
4049                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4050                                 __func__);
4051                 return -ENOMEM;
4052         }
4053
4054         xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
4055         spin_unlock_irqrestore(&xhci->lock, flags);
4056
4057         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4058         slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
4059         slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
4060         slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4061         slot_ctx->dev_state = 0;
4062
4063         xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
4064                         "Set up evaluate context for LPM MEL change.");
4065         xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4066         xhci_dbg_ctx(xhci, command->in_ctx, 0);
4067
4068         /* Issue and wait for the evaluate context command. */
4069         ret = xhci_configure_endpoint(xhci, udev, command,
4070                         true, true);
4071         xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4072         xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4073
4074         if (!ret) {
4075                 spin_lock_irqsave(&xhci->lock, flags);
4076                 virt_dev->current_mel = max_exit_latency;
4077                 spin_unlock_irqrestore(&xhci->lock, flags);
4078         }
4079         return ret;
4080 }
4081
4082 #ifdef CONFIG_PM
4083
4084 /* BESL to HIRD Encoding array for USB2 LPM */
4085 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4086         3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4087
4088 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4089 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
4090                                         struct usb_device *udev)
4091 {
4092         int u2del, besl, besl_host;
4093         int besl_device = 0;
4094         u32 field;
4095
4096         u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4097         field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4098
4099         if (field & USB_BESL_SUPPORT) {
4100                 for (besl_host = 0; besl_host < 16; besl_host++) {
4101                         if (xhci_besl_encoding[besl_host] >= u2del)
4102                                 break;
4103                 }
4104                 /* Use baseline BESL value as default */
4105                 if (field & USB_BESL_BASELINE_VALID)
4106                         besl_device = USB_GET_BESL_BASELINE(field);
4107                 else if (field & USB_BESL_DEEP_VALID)
4108                         besl_device = USB_GET_BESL_DEEP(field);
4109         } else {
4110                 if (u2del <= 50)
4111                         besl_host = 0;
4112                 else
4113                         besl_host = (u2del - 51) / 75 + 1;
4114         }
4115
4116         besl = besl_host + besl_device;
4117         if (besl > 15)
4118                 besl = 15;
4119
4120         return besl;
4121 }
4122
4123 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4124 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4125 {
4126         u32 field;
4127         int l1;
4128         int besld = 0;
4129         int hirdm = 0;
4130
4131         field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4132
4133         /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4134         l1 = udev->l1_params.timeout / 256;
4135
4136         /* device has preferred BESLD */
4137         if (field & USB_BESL_DEEP_VALID) {
4138                 besld = USB_GET_BESL_DEEP(field);
4139                 hirdm = 1;
4140         }
4141
4142         return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4143 }
4144
4145 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4146                         struct usb_device *udev, int enable)
4147 {
4148         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4149         __le32 __iomem  **port_array;
4150         __le32 __iomem  *pm_addr, *hlpm_addr;
4151         u32             pm_val, hlpm_val, field;
4152         unsigned int    port_num;
4153         unsigned long   flags;
4154         int             hird, exit_latency;
4155         int             ret;
4156
4157         if (hcd->speed >= HCD_USB3 || !xhci->hw_lpm_support ||
4158                         !udev->lpm_capable)
4159                 return -EPERM;
4160
4161         if (!udev->parent || udev->parent->parent ||
4162                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4163                 return -EPERM;
4164
4165         if (udev->usb2_hw_lpm_capable != 1)
4166                 return -EPERM;
4167
4168         spin_lock_irqsave(&xhci->lock, flags);
4169
4170         port_array = xhci->usb2_ports;
4171         port_num = udev->portnum - 1;
4172         pm_addr = port_array[port_num] + PORTPMSC;
4173         pm_val = readl(pm_addr);
4174         hlpm_addr = port_array[port_num] + PORTHLPMC;
4175         field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4176
4177         xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4178                         enable ? "enable" : "disable", port_num + 1);
4179
4180         if (enable) {
4181                 /* Host supports BESL timeout instead of HIRD */
4182                 if (udev->usb2_hw_lpm_besl_capable) {
4183                         /* if device doesn't have a preferred BESL value use a
4184                          * default one which works with mixed HIRD and BESL
4185                          * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4186                          */
4187                         if ((field & USB_BESL_SUPPORT) &&
4188                             (field & USB_BESL_BASELINE_VALID))
4189                                 hird = USB_GET_BESL_BASELINE(field);
4190                         else
4191                                 hird = udev->l1_params.besl;
4192
4193                         exit_latency = xhci_besl_encoding[hird];
4194                         spin_unlock_irqrestore(&xhci->lock, flags);
4195
4196                         /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4197                          * input context for link powermanagement evaluate
4198                          * context commands. It is protected by hcd->bandwidth
4199                          * mutex and is shared by all devices. We need to set
4200                          * the max ext latency in USB 2 BESL LPM as well, so
4201                          * use the same mutex and xhci_change_max_exit_latency()
4202                          */
4203                         mutex_lock(hcd->bandwidth_mutex);
4204                         ret = xhci_change_max_exit_latency(xhci, udev,
4205                                                            exit_latency);
4206                         mutex_unlock(hcd->bandwidth_mutex);
4207
4208                         if (ret < 0)
4209                                 return ret;
4210                         spin_lock_irqsave(&xhci->lock, flags);
4211
4212                         hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4213                         writel(hlpm_val, hlpm_addr);
4214                         /* flush write */
4215                         readl(hlpm_addr);
4216                 } else {
4217                         hird = xhci_calculate_hird_besl(xhci, udev);
4218                 }
4219
4220                 pm_val &= ~PORT_HIRD_MASK;
4221                 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4222                 writel(pm_val, pm_addr);
4223                 pm_val = readl(pm_addr);
4224                 pm_val |= PORT_HLE;
4225                 writel(pm_val, pm_addr);
4226                 /* flush write */
4227                 readl(pm_addr);
4228         } else {
4229                 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4230                 writel(pm_val, pm_addr);
4231                 /* flush write */
4232                 readl(pm_addr);
4233                 if (udev->usb2_hw_lpm_besl_capable) {
4234                         spin_unlock_irqrestore(&xhci->lock, flags);
4235                         mutex_lock(hcd->bandwidth_mutex);
4236                         xhci_change_max_exit_latency(xhci, udev, 0);
4237                         mutex_unlock(hcd->bandwidth_mutex);
4238                         return 0;
4239                 }
4240         }
4241
4242         spin_unlock_irqrestore(&xhci->lock, flags);
4243         return 0;
4244 }
4245
4246 /* check if a usb2 port supports a given extened capability protocol
4247  * only USB2 ports extended protocol capability values are cached.
4248  * Return 1 if capability is supported
4249  */
4250 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4251                                            unsigned capability)
4252 {
4253         u32 port_offset, port_count;
4254         int i;
4255
4256         for (i = 0; i < xhci->num_ext_caps; i++) {
4257                 if (xhci->ext_caps[i] & capability) {
4258                         /* port offsets starts at 1 */
4259                         port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4260                         port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4261                         if (port >= port_offset &&
4262                             port < port_offset + port_count)
4263                                 return 1;
4264                 }
4265         }
4266         return 0;
4267 }
4268
4269 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4270 {
4271         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4272         int             portnum = udev->portnum - 1;
4273
4274         if (hcd->speed >= HCD_USB3 || !xhci->sw_lpm_support ||
4275                         !udev->lpm_capable)
4276                 return 0;
4277
4278         /* we only support lpm for non-hub device connected to root hub yet */
4279         if (!udev->parent || udev->parent->parent ||
4280                         udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4281                 return 0;
4282
4283         if (xhci->hw_lpm_support == 1 &&
4284                         xhci_check_usb2_port_capability(
4285                                 xhci, portnum, XHCI_HLC)) {
4286                 udev->usb2_hw_lpm_capable = 1;
4287                 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4288                 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4289                 if (xhci_check_usb2_port_capability(xhci, portnum,
4290                                         XHCI_BLC))
4291                         udev->usb2_hw_lpm_besl_capable = 1;
4292         }
4293
4294         return 0;
4295 }
4296
4297 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4298
4299 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4300 static unsigned long long xhci_service_interval_to_ns(
4301                 struct usb_endpoint_descriptor *desc)
4302 {
4303         return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4304 }
4305
4306 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4307                 enum usb3_link_state state)
4308 {
4309         unsigned long long sel;
4310         unsigned long long pel;
4311         unsigned int max_sel_pel;
4312         char *state_name;
4313
4314         switch (state) {
4315         case USB3_LPM_U1:
4316                 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4317                 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4318                 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4319                 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4320                 state_name = "U1";
4321                 break;
4322         case USB3_LPM_U2:
4323                 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4324                 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4325                 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4326                 state_name = "U2";
4327                 break;
4328         default:
4329                 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4330                                 __func__);
4331                 return USB3_LPM_DISABLED;
4332         }
4333
4334         if (sel <= max_sel_pel && pel <= max_sel_pel)
4335                 return USB3_LPM_DEVICE_INITIATED;
4336
4337         if (sel > max_sel_pel)
4338                 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4339                                 "due to long SEL %llu ms\n",
4340                                 state_name, sel);
4341         else
4342                 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4343                                 "due to long PEL %llu ms\n",
4344                                 state_name, pel);
4345         return USB3_LPM_DISABLED;
4346 }
4347
4348 /* The U1 timeout should be the maximum of the following values:
4349  *  - For control endpoints, U1 system exit latency (SEL) * 3
4350  *  - For bulk endpoints, U1 SEL * 5
4351  *  - For interrupt endpoints:
4352  *    - Notification EPs, U1 SEL * 3
4353  *    - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4354  *  - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4355  */
4356 static unsigned long long xhci_calculate_intel_u1_timeout(
4357                 struct usb_device *udev,
4358                 struct usb_endpoint_descriptor *desc)
4359 {
4360         unsigned long long timeout_ns;
4361         int ep_type;
4362         int intr_type;
4363
4364         ep_type = usb_endpoint_type(desc);
4365         switch (ep_type) {
4366         case USB_ENDPOINT_XFER_CONTROL:
4367                 timeout_ns = udev->u1_params.sel * 3;
4368                 break;
4369         case USB_ENDPOINT_XFER_BULK:
4370                 timeout_ns = udev->u1_params.sel * 5;
4371                 break;
4372         case USB_ENDPOINT_XFER_INT:
4373                 intr_type = usb_endpoint_interrupt_type(desc);
4374                 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4375                         timeout_ns = udev->u1_params.sel * 3;
4376                         break;
4377                 }
4378                 /* Otherwise the calculation is the same as isoc eps */
4379         case USB_ENDPOINT_XFER_ISOC:
4380                 timeout_ns = xhci_service_interval_to_ns(desc);
4381                 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4382                 if (timeout_ns < udev->u1_params.sel * 2)
4383                         timeout_ns = udev->u1_params.sel * 2;
4384                 break;
4385         default:
4386                 return 0;
4387         }
4388
4389         return timeout_ns;
4390 }
4391
4392 /* Returns the hub-encoded U1 timeout value. */
4393 static u16 xhci_calculate_u1_timeout(struct xhci_hcd *xhci,
4394                 struct usb_device *udev,
4395                 struct usb_endpoint_descriptor *desc)
4396 {
4397         unsigned long long timeout_ns;
4398
4399         if (xhci->quirks & XHCI_INTEL_HOST)
4400                 timeout_ns = xhci_calculate_intel_u1_timeout(udev, desc);
4401         else
4402                 timeout_ns = udev->u1_params.sel;
4403
4404         /* The U1 timeout is encoded in 1us intervals.
4405          * Don't return a timeout of zero, because that's USB3_LPM_DISABLED.
4406          */
4407         if (timeout_ns == USB3_LPM_DISABLED)
4408                 timeout_ns = 1;
4409         else
4410                 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4411
4412         /* If the necessary timeout value is bigger than what we can set in the
4413          * USB 3.0 hub, we have to disable hub-initiated U1.
4414          */
4415         if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4416                 return timeout_ns;
4417         dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4418                         "due to long timeout %llu ms\n", timeout_ns);
4419         return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4420 }
4421
4422 /* The U2 timeout should be the maximum of:
4423  *  - 10 ms (to avoid the bandwidth impact on the scheduler)
4424  *  - largest bInterval of any active periodic endpoint (to avoid going
4425  *    into lower power link states between intervals).
4426  *  - the U2 Exit Latency of the device
4427  */
4428 static unsigned long long xhci_calculate_intel_u2_timeout(
4429                 struct usb_device *udev,
4430                 struct usb_endpoint_descriptor *desc)
4431 {
4432         unsigned long long timeout_ns;
4433         unsigned long long u2_del_ns;
4434
4435         timeout_ns = 10 * 1000 * 1000;
4436
4437         if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4438                         (xhci_service_interval_to_ns(desc) > timeout_ns))
4439                 timeout_ns = xhci_service_interval_to_ns(desc);
4440
4441         u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4442         if (u2_del_ns > timeout_ns)
4443                 timeout_ns = u2_del_ns;
4444
4445         return timeout_ns;
4446 }
4447
4448 /* Returns the hub-encoded U2 timeout value. */
4449 static u16 xhci_calculate_u2_timeout(struct xhci_hcd *xhci,
4450                 struct usb_device *udev,
4451                 struct usb_endpoint_descriptor *desc)
4452 {
4453         unsigned long long timeout_ns;
4454
4455         if (xhci->quirks & XHCI_INTEL_HOST)
4456                 timeout_ns = xhci_calculate_intel_u2_timeout(udev, desc);
4457         else
4458                 timeout_ns = udev->u2_params.sel;
4459
4460         /* The U2 timeout is encoded in 256us intervals */
4461         timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4462         /* If the necessary timeout value is bigger than what we can set in the
4463          * USB 3.0 hub, we have to disable hub-initiated U2.
4464          */
4465         if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4466                 return timeout_ns;
4467         dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4468                         "due to long timeout %llu ms\n", timeout_ns);
4469         return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4470 }
4471
4472 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4473                 struct usb_device *udev,
4474                 struct usb_endpoint_descriptor *desc,
4475                 enum usb3_link_state state,
4476                 u16 *timeout)
4477 {
4478         if (state == USB3_LPM_U1)
4479                 return xhci_calculate_u1_timeout(xhci, udev, desc);
4480         else if (state == USB3_LPM_U2)
4481                 return xhci_calculate_u2_timeout(xhci, udev, desc);
4482
4483         return USB3_LPM_DISABLED;
4484 }
4485
4486 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4487                 struct usb_device *udev,
4488                 struct usb_endpoint_descriptor *desc,
4489                 enum usb3_link_state state,
4490                 u16 *timeout)
4491 {
4492         u16 alt_timeout;
4493
4494         alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4495                 desc, state, timeout);
4496
4497         /* If we found we can't enable hub-initiated LPM, or
4498          * the U1 or U2 exit latency was too high to allow
4499          * device-initiated LPM as well, just stop searching.
4500          */
4501         if (alt_timeout == USB3_LPM_DISABLED ||
4502                         alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4503                 *timeout = alt_timeout;
4504                 return -E2BIG;
4505         }
4506         if (alt_timeout > *timeout)
4507                 *timeout = alt_timeout;
4508         return 0;
4509 }
4510
4511 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4512                 struct usb_device *udev,
4513                 struct usb_host_interface *alt,
4514                 enum usb3_link_state state,
4515                 u16 *timeout)
4516 {
4517         int j;
4518
4519         for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4520                 if (xhci_update_timeout_for_endpoint(xhci, udev,
4521                                         &alt->endpoint[j].desc, state, timeout))
4522                         return -E2BIG;
4523                 continue;
4524         }
4525         return 0;
4526 }
4527
4528 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4529                 enum usb3_link_state state)
4530 {
4531         struct usb_device *parent;
4532         unsigned int num_hubs;
4533
4534         if (state == USB3_LPM_U2)
4535                 return 0;
4536
4537         /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4538         for (parent = udev->parent, num_hubs = 0; parent->parent;
4539                         parent = parent->parent)
4540                 num_hubs++;
4541
4542         if (num_hubs < 2)
4543                 return 0;
4544
4545         dev_dbg(&udev->dev, "Disabling U1 link state for device"
4546                         " below second-tier hub.\n");
4547         dev_dbg(&udev->dev, "Plug device into first-tier hub "
4548                         "to decrease power consumption.\n");
4549         return -E2BIG;
4550 }
4551
4552 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4553                 struct usb_device *udev,
4554                 enum usb3_link_state state)
4555 {
4556         if (xhci->quirks & XHCI_INTEL_HOST)
4557                 return xhci_check_intel_tier_policy(udev, state);
4558         else
4559                 return 0;
4560 }
4561
4562 /* Returns the U1 or U2 timeout that should be enabled.
4563  * If the tier check or timeout setting functions return with a non-zero exit
4564  * code, that means the timeout value has been finalized and we shouldn't look
4565  * at any more endpoints.
4566  */
4567 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4568                         struct usb_device *udev, enum usb3_link_state state)
4569 {
4570         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4571         struct usb_host_config *config;
4572         char *state_name;
4573         int i;
4574         u16 timeout = USB3_LPM_DISABLED;
4575
4576         if (state == USB3_LPM_U1)
4577                 state_name = "U1";
4578         else if (state == USB3_LPM_U2)
4579                 state_name = "U2";
4580         else {
4581                 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4582                                 state);
4583                 return timeout;
4584         }
4585
4586         if (xhci_check_tier_policy(xhci, udev, state) < 0)
4587                 return timeout;
4588
4589         /* Gather some information about the currently installed configuration
4590          * and alternate interface settings.
4591          */
4592         if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4593                         state, &timeout))
4594                 return timeout;
4595
4596         config = udev->actconfig;
4597         if (!config)
4598                 return timeout;
4599
4600         for (i = 0; i < config->desc.bNumInterfaces; i++) {
4601                 struct usb_driver *driver;
4602                 struct usb_interface *intf = config->interface[i];
4603
4604                 if (!intf)
4605                         continue;
4606
4607                 /* Check if any currently bound drivers want hub-initiated LPM
4608                  * disabled.
4609                  */
4610                 if (intf->dev.driver) {
4611                         driver = to_usb_driver(intf->dev.driver);
4612                         if (driver && driver->disable_hub_initiated_lpm) {
4613                                 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4614                                                 "at request of driver %s\n",
4615                                                 state_name, driver->name);
4616                                 return xhci_get_timeout_no_hub_lpm(udev, state);
4617                         }
4618                 }
4619
4620                 /* Not sure how this could happen... */
4621                 if (!intf->cur_altsetting)
4622                         continue;
4623
4624                 if (xhci_update_timeout_for_interface(xhci, udev,
4625                                         intf->cur_altsetting,
4626                                         state, &timeout))
4627                         return timeout;
4628         }
4629         return timeout;
4630 }
4631
4632 static int calculate_max_exit_latency(struct usb_device *udev,
4633                 enum usb3_link_state state_changed,
4634                 u16 hub_encoded_timeout)
4635 {
4636         unsigned long long u1_mel_us = 0;
4637         unsigned long long u2_mel_us = 0;
4638         unsigned long long mel_us = 0;
4639         bool disabling_u1;
4640         bool disabling_u2;
4641         bool enabling_u1;
4642         bool enabling_u2;
4643
4644         disabling_u1 = (state_changed == USB3_LPM_U1 &&
4645                         hub_encoded_timeout == USB3_LPM_DISABLED);
4646         disabling_u2 = (state_changed == USB3_LPM_U2 &&
4647                         hub_encoded_timeout == USB3_LPM_DISABLED);
4648
4649         enabling_u1 = (state_changed == USB3_LPM_U1 &&
4650                         hub_encoded_timeout != USB3_LPM_DISABLED);
4651         enabling_u2 = (state_changed == USB3_LPM_U2 &&
4652                         hub_encoded_timeout != USB3_LPM_DISABLED);
4653
4654         /* If U1 was already enabled and we're not disabling it,
4655          * or we're going to enable U1, account for the U1 max exit latency.
4656          */
4657         if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4658                         enabling_u1)
4659                 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4660         if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4661                         enabling_u2)
4662                 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4663
4664         if (u1_mel_us > u2_mel_us)
4665                 mel_us = u1_mel_us;
4666         else
4667                 mel_us = u2_mel_us;
4668         /* xHCI host controller max exit latency field is only 16 bits wide. */
4669         if (mel_us > MAX_EXIT) {
4670                 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4671                                 "is too big.\n", mel_us);
4672                 return -E2BIG;
4673         }
4674         return mel_us;
4675 }
4676
4677 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4678 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4679                         struct usb_device *udev, enum usb3_link_state state)
4680 {
4681         struct xhci_hcd *xhci;
4682         u16 hub_encoded_timeout;
4683         int mel;
4684         int ret;
4685
4686         xhci = hcd_to_xhci(hcd);
4687         /* The LPM timeout values are pretty host-controller specific, so don't
4688          * enable hub-initiated timeouts unless the vendor has provided
4689          * information about their timeout algorithm.
4690          */
4691         if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4692                         !xhci->devs[udev->slot_id])
4693                 return USB3_LPM_DISABLED;
4694
4695         hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4696         mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4697         if (mel < 0) {
4698                 /* Max Exit Latency is too big, disable LPM. */
4699                 hub_encoded_timeout = USB3_LPM_DISABLED;
4700                 mel = 0;
4701         }
4702
4703         ret = xhci_change_max_exit_latency(xhci, udev, mel);
4704         if (ret)
4705                 return ret;
4706         return hub_encoded_timeout;
4707 }
4708
4709 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4710                         struct usb_device *udev, enum usb3_link_state state)
4711 {
4712         struct xhci_hcd *xhci;
4713         u16 mel;
4714
4715         xhci = hcd_to_xhci(hcd);
4716         if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4717                         !xhci->devs[udev->slot_id])
4718                 return 0;
4719
4720         mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4721         return xhci_change_max_exit_latency(xhci, udev, mel);
4722 }
4723 #else /* CONFIG_PM */
4724
4725 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4726                                 struct usb_device *udev, int enable)
4727 {
4728         return 0;
4729 }
4730
4731 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4732 {
4733         return 0;
4734 }
4735
4736 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4737                         struct usb_device *udev, enum usb3_link_state state)
4738 {
4739         return USB3_LPM_DISABLED;
4740 }
4741
4742 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4743                         struct usb_device *udev, enum usb3_link_state state)
4744 {
4745         return 0;
4746 }
4747 #endif  /* CONFIG_PM */
4748
4749 /*-------------------------------------------------------------------------*/
4750
4751 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4752  * internal data structures for the device.
4753  */
4754 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4755                         struct usb_tt *tt, gfp_t mem_flags)
4756 {
4757         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4758         struct xhci_virt_device *vdev;
4759         struct xhci_command *config_cmd;
4760         struct xhci_input_control_ctx *ctrl_ctx;
4761         struct xhci_slot_ctx *slot_ctx;
4762         unsigned long flags;
4763         unsigned think_time;
4764         int ret;
4765
4766         /* Ignore root hubs */
4767         if (!hdev->parent)
4768                 return 0;
4769
4770         vdev = xhci->devs[hdev->slot_id];
4771         if (!vdev) {
4772                 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4773                 return -EINVAL;
4774         }
4775         config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4776         if (!config_cmd) {
4777                 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4778                 return -ENOMEM;
4779         }
4780         ctrl_ctx = xhci_get_input_control_ctx(config_cmd->in_ctx);
4781         if (!ctrl_ctx) {
4782                 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4783                                 __func__);
4784                 xhci_free_command(xhci, config_cmd);
4785                 return -ENOMEM;
4786         }
4787
4788         spin_lock_irqsave(&xhci->lock, flags);
4789         if (hdev->speed == USB_SPEED_HIGH &&
4790                         xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4791                 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4792                 xhci_free_command(xhci, config_cmd);
4793                 spin_unlock_irqrestore(&xhci->lock, flags);
4794                 return -ENOMEM;
4795         }
4796
4797         xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4798         ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4799         slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4800         slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4801         /*
4802          * refer to section 6.2.2: MTT should be 0 for full speed hub,
4803          * but it may be already set to 1 when setup an xHCI virtual
4804          * device, so clear it anyway.
4805          */
4806         if (tt->multi)
4807                 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4808         else if (hdev->speed == USB_SPEED_FULL)
4809                 slot_ctx->dev_info &= cpu_to_le32(~DEV_MTT);
4810
4811         if (xhci->hci_version > 0x95) {
4812                 xhci_dbg(xhci, "xHCI version %x needs hub "
4813                                 "TT think time and number of ports\n",
4814                                 (unsigned int) xhci->hci_version);
4815                 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4816                 /* Set TT think time - convert from ns to FS bit times.
4817                  * 0 = 8 FS bit times, 1 = 16 FS bit times,
4818                  * 2 = 24 FS bit times, 3 = 32 FS bit times.
4819                  *
4820                  * xHCI 1.0: this field shall be 0 if the device is not a
4821                  * High-spped hub.
4822                  */
4823                 think_time = tt->think_time;
4824                 if (think_time != 0)
4825                         think_time = (think_time / 666) - 1;
4826                 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4827                         slot_ctx->tt_info |=
4828                                 cpu_to_le32(TT_THINK_TIME(think_time));
4829         } else {
4830                 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4831                                 "TT think time or number of ports\n",
4832                                 (unsigned int) xhci->hci_version);
4833         }
4834         slot_ctx->dev_state = 0;
4835         spin_unlock_irqrestore(&xhci->lock, flags);
4836
4837         xhci_dbg(xhci, "Set up %s for hub device.\n",
4838                         (xhci->hci_version > 0x95) ?
4839                         "configure endpoint" : "evaluate context");
4840         xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4841         xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4842
4843         /* Issue and wait for the configure endpoint or
4844          * evaluate context command.
4845          */
4846         if (xhci->hci_version > 0x95)
4847                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4848                                 false, false);
4849         else
4850                 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4851                                 true, false);
4852
4853         xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4854         xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4855
4856         xhci_free_command(xhci, config_cmd);
4857         return ret;
4858 }
4859
4860 int xhci_get_frame(struct usb_hcd *hcd)
4861 {
4862         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4863         /* EHCI mods by the periodic size.  Why? */
4864         return readl(&xhci->run_regs->microframe_index) >> 3;
4865 }
4866
4867 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4868 {
4869         struct xhci_hcd         *xhci;
4870         struct device           *dev = hcd->self.controller;
4871         int                     retval;
4872
4873         /* Accept arbitrarily long scatter-gather lists */
4874         hcd->self.sg_tablesize = ~0;
4875
4876         /* support to build packet from discontinuous buffers */
4877         hcd->self.no_sg_constraint = 1;
4878
4879         /* XHCI controllers don't stop the ep queue on short packets :| */
4880         hcd->self.no_stop_on_short = 1;
4881
4882         xhci = hcd_to_xhci(hcd);
4883
4884         if (usb_hcd_is_primary_hcd(hcd)) {
4885                 xhci->main_hcd = hcd;
4886                 /* Mark the first roothub as being USB 2.0.
4887                  * The xHCI driver will register the USB 3.0 roothub.
4888                  */
4889                 hcd->speed = HCD_USB2;
4890                 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4891                 /*
4892                  * USB 2.0 roothub under xHCI has an integrated TT,
4893                  * (rate matching hub) as opposed to having an OHCI/UHCI
4894                  * companion controller.
4895                  */
4896                 hcd->has_tt = 1;
4897         } else {
4898                 if (xhci->sbrn == 0x31) {
4899                         xhci_info(xhci, "Host supports USB 3.1 Enhanced SuperSpeed\n");
4900                         hcd->speed = HCD_USB31;
4901                 }
4902                 /* xHCI private pointer was set in xhci_pci_probe for the second
4903                  * registered roothub.
4904                  */
4905                 return 0;
4906         }
4907
4908         mutex_init(&xhci->mutex);
4909         xhci->cap_regs = hcd->regs;
4910         xhci->op_regs = hcd->regs +
4911                 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4912         xhci->run_regs = hcd->regs +
4913                 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4914         /* Cache read-only capability registers */
4915         xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4916         xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4917         xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4918         xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4919         xhci->hci_version = HC_VERSION(xhci->hcc_params);
4920         xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4921         if (xhci->hci_version > 0x100)
4922                 xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2);
4923         xhci_print_registers(xhci);
4924
4925         xhci->quirks = quirks;
4926
4927         get_quirks(dev, xhci);
4928
4929         /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4930          * success event after a short transfer. This quirk will ignore such
4931          * spurious event.
4932          */
4933         if (xhci->hci_version > 0x96)
4934                 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4935
4936         /* Make sure the HC is halted. */
4937         retval = xhci_halt(xhci);
4938         if (retval)
4939                 return retval;
4940
4941         xhci_dbg(xhci, "Resetting HCD\n");
4942         /* Reset the internal HC memory state and registers. */
4943         retval = xhci_reset(xhci);
4944         if (retval)
4945                 return retval;
4946         xhci_dbg(xhci, "Reset complete\n");
4947
4948         /* Set dma_mask and coherent_dma_mask to 64-bits,
4949          * if xHC supports 64-bit addressing */
4950         if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4951                         !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4952                 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4953                 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4954         } else {
4955                 /*
4956                  * This is to avoid error in cases where a 32-bit USB
4957                  * controller is used on a 64-bit capable system.
4958                  */
4959                 retval = dma_set_mask(dev, DMA_BIT_MASK(32));
4960                 if (retval)
4961                         return retval;
4962                 xhci_dbg(xhci, "Enabling 32-bit DMA addresses.\n");
4963                 dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
4964         }
4965
4966         xhci_dbg(xhci, "Calling HCD init\n");
4967         /* Initialize HCD and host controller data structures. */
4968         retval = xhci_init(hcd);
4969         if (retval)
4970                 return retval;
4971         xhci_dbg(xhci, "Called HCD init\n");
4972
4973         xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n",
4974                   xhci->hcc_params, xhci->hci_version, xhci->quirks);
4975
4976         return 0;
4977 }
4978 EXPORT_SYMBOL_GPL(xhci_gen_setup);
4979
4980 static const struct hc_driver xhci_hc_driver = {
4981         .description =          "xhci-hcd",
4982         .product_desc =         "xHCI Host Controller",
4983         .hcd_priv_size =        sizeof(struct xhci_hcd),
4984
4985         /*
4986          * generic hardware linkage
4987          */
4988         .irq =                  xhci_irq,
4989         .flags =                HCD_MEMORY | HCD_USB3 | HCD_SHARED,
4990
4991         /*
4992          * basic lifecycle operations
4993          */
4994         .reset =                NULL, /* set in xhci_init_driver() */
4995         .start =                xhci_run,
4996         .stop =                 xhci_stop,
4997         .shutdown =             xhci_shutdown,
4998
4999         /*
5000          * managing i/o requests and associated device resources
5001          */
5002         .urb_enqueue =          xhci_urb_enqueue,
5003         .urb_dequeue =          xhci_urb_dequeue,
5004         .alloc_dev =            xhci_alloc_dev,
5005         .free_dev =             xhci_free_dev,
5006         .alloc_streams =        xhci_alloc_streams,
5007         .free_streams =         xhci_free_streams,
5008         .add_endpoint =         xhci_add_endpoint,
5009         .drop_endpoint =        xhci_drop_endpoint,
5010         .endpoint_reset =       xhci_endpoint_reset,
5011         .check_bandwidth =      xhci_check_bandwidth,
5012         .reset_bandwidth =      xhci_reset_bandwidth,
5013         .address_device =       xhci_address_device,
5014         .enable_device =        xhci_enable_device,
5015         .update_hub_device =    xhci_update_hub_device,
5016         .reset_device =         xhci_discover_or_reset_device,
5017
5018         /*
5019          * scheduling support
5020          */
5021         .get_frame_number =     xhci_get_frame,
5022
5023         /*
5024          * root hub support
5025          */
5026         .hub_control =          xhci_hub_control,
5027         .hub_status_data =      xhci_hub_status_data,
5028         .bus_suspend =          xhci_bus_suspend,
5029         .bus_resume =           xhci_bus_resume,
5030
5031         /*
5032          * call back when device connected and addressed
5033          */
5034         .update_device =        xhci_update_device,
5035         .set_usb2_hw_lpm =      xhci_set_usb2_hardware_lpm,
5036         .enable_usb3_lpm_timeout =      xhci_enable_usb3_lpm_timeout,
5037         .disable_usb3_lpm_timeout =     xhci_disable_usb3_lpm_timeout,
5038         .find_raw_port_number = xhci_find_raw_port_number,
5039 };
5040
5041 void xhci_init_driver(struct hc_driver *drv,
5042                       const struct xhci_driver_overrides *over)
5043 {
5044         BUG_ON(!over);
5045
5046         /* Copy the generic table to drv then apply the overrides */
5047         *drv = xhci_hc_driver;
5048
5049         if (over) {
5050                 drv->hcd_priv_size += over->extra_priv_size;
5051                 if (over->reset)
5052                         drv->reset = over->reset;
5053                 if (over->start)
5054                         drv->start = over->start;
5055         }
5056 }
5057 EXPORT_SYMBOL_GPL(xhci_init_driver);
5058
5059 MODULE_DESCRIPTION(DRIVER_DESC);
5060 MODULE_AUTHOR(DRIVER_AUTHOR);
5061 MODULE_LICENSE("GPL");
5062
5063 static int __init xhci_hcd_init(void)
5064 {
5065         /*
5066          * Check the compiler generated sizes of structures that must be laid
5067          * out in specific ways for hardware access.
5068          */
5069         BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
5070         BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
5071         BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
5072         /* xhci_device_control has eight fields, and also
5073          * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
5074          */
5075         BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
5076         BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
5077         BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
5078         BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 8*32/8);
5079         BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
5080         /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5081         BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
5082
5083         if (usb_disabled())
5084                 return -ENODEV;
5085
5086         return 0;
5087 }
5088
5089 /*
5090  * If an init function is provided, an exit function must also be provided
5091  * to allow module unload.
5092  */
5093 static void __exit xhci_hcd_fini(void) { }
5094
5095 module_init(xhci_hcd_init);
5096 module_exit(xhci_hcd_fini);