2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
21 #include <linux/module.h>
22 #include <linux/platform_data/atmel.h>
27 #include <video/atmel_lcdc.h>
29 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
30 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
32 /* configurable parameters */
33 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
34 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */
35 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */
37 struct atmel_lcdfb_config {
38 bool have_alt_pixclock;
40 bool have_intensity_bit;
43 static struct atmel_lcdfb_config at91sam9261_config = {
45 .have_intensity_bit = true,
48 static struct atmel_lcdfb_config at91sam9263_config = {
49 .have_intensity_bit = true,
52 static struct atmel_lcdfb_config at91sam9g10_config = {
56 static struct atmel_lcdfb_config at91sam9g45_config = {
57 .have_alt_pixclock = true,
60 static struct atmel_lcdfb_config at91sam9g45es_config = {
63 static struct atmel_lcdfb_config at91sam9rl_config = {
64 .have_intensity_bit = true,
67 static struct atmel_lcdfb_config at32ap_config = {
71 static const struct platform_device_id atmel_lcdfb_devtypes[] = {
73 .name = "at91sam9261-lcdfb",
74 .driver_data = (unsigned long)&at91sam9261_config,
76 .name = "at91sam9263-lcdfb",
77 .driver_data = (unsigned long)&at91sam9263_config,
79 .name = "at91sam9g10-lcdfb",
80 .driver_data = (unsigned long)&at91sam9g10_config,
82 .name = "at91sam9g45-lcdfb",
83 .driver_data = (unsigned long)&at91sam9g45_config,
85 .name = "at91sam9g45es-lcdfb",
86 .driver_data = (unsigned long)&at91sam9g45es_config,
88 .name = "at91sam9rl-lcdfb",
89 .driver_data = (unsigned long)&at91sam9rl_config,
91 .name = "at32ap-lcdfb",
92 .driver_data = (unsigned long)&at32ap_config,
98 static struct atmel_lcdfb_config *
99 atmel_lcdfb_get_config(struct platform_device *pdev)
103 data = platform_get_device_id(pdev)->driver_data;
105 return (struct atmel_lcdfb_config *)data;
108 #if defined(CONFIG_ARCH_AT91)
109 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
110 | FBINFO_PARTIAL_PAN_OK \
111 | FBINFO_HWACCEL_YPAN)
113 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
114 struct fb_var_screeninfo *var,
115 struct fb_info *info)
119 #elif defined(CONFIG_AVR32)
120 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
121 | FBINFO_PARTIAL_PAN_OK \
122 | FBINFO_HWACCEL_XPAN \
123 | FBINFO_HWACCEL_YPAN)
125 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
126 struct fb_var_screeninfo *var,
127 struct fb_info *info)
132 pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
134 dma2dcfg = (info->var.xres_virtual - info->var.xres)
135 * info->var.bits_per_pixel / 8;
136 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
137 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
139 /* Update configuration */
140 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
141 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
142 | ATMEL_LCDC_DMAUPDT);
146 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
147 | ATMEL_LCDC_POL_POSITIVE
148 | ATMEL_LCDC_ENA_PWMENABLE;
150 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
152 /* some bl->props field just changed */
153 static int atmel_bl_update_status(struct backlight_device *bl)
155 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
156 int power = sinfo->bl_power;
157 int brightness = bl->props.brightness;
159 /* REVISIT there may be a meaningful difference between
160 * fb_blank and power ... there seem to be some cases
161 * this doesn't handle correctly.
163 if (bl->props.fb_blank != sinfo->bl_power)
164 power = bl->props.fb_blank;
165 else if (bl->props.power != sinfo->bl_power)
166 power = bl->props.power;
168 if (brightness < 0 && power == FB_BLANK_UNBLANK)
169 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
170 else if (power != FB_BLANK_UNBLANK)
173 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
174 if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
175 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
176 brightness ? contrast_ctr : 0);
178 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
180 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
185 static int atmel_bl_get_brightness(struct backlight_device *bl)
187 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
189 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
192 static const struct backlight_ops atmel_lcdc_bl_ops = {
193 .update_status = atmel_bl_update_status,
194 .get_brightness = atmel_bl_get_brightness,
197 static void init_backlight(struct atmel_lcdfb_info *sinfo)
199 struct backlight_properties props;
200 struct backlight_device *bl;
202 sinfo->bl_power = FB_BLANK_UNBLANK;
204 if (sinfo->backlight)
207 memset(&props, 0, sizeof(struct backlight_properties));
208 props.type = BACKLIGHT_RAW;
209 props.max_brightness = 0xff;
210 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
211 &atmel_lcdc_bl_ops, &props);
213 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
217 sinfo->backlight = bl;
219 bl->props.power = FB_BLANK_UNBLANK;
220 bl->props.fb_blank = FB_BLANK_UNBLANK;
221 bl->props.brightness = atmel_bl_get_brightness(bl);
224 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
226 if (sinfo->backlight)
227 backlight_device_unregister(sinfo->backlight);
232 static void init_backlight(struct atmel_lcdfb_info *sinfo)
234 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
237 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
243 static void init_contrast(struct atmel_lcdfb_info *sinfo)
245 /* contrast pwm can be 'inverted' */
246 if (sinfo->lcdcon_pol_negative)
247 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
249 /* have some default contrast/backlight settings */
250 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
251 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
253 if (sinfo->lcdcon_is_backlight)
254 init_backlight(sinfo);
258 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
259 .type = FB_TYPE_PACKED_PIXELS,
260 .visual = FB_VISUAL_TRUECOLOR,
264 .accel = FB_ACCEL_NONE,
267 static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo,
270 unsigned long lcdcon2;
273 if (!sinfo->config->have_hozval)
276 lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2);
278 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
280 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
283 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
284 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
285 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
286 value = DIV_ROUND_UP(value, 4);
288 value = DIV_ROUND_UP(value, 8);
294 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
296 /* Turn off the LCD controller and the DMA controller */
297 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
298 sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
300 /* Wait for the LCDC core to become idle */
301 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
304 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
307 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
309 atmel_lcdfb_stop_nowait(sinfo);
311 /* Wait for DMA engine to become idle... */
312 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
316 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
318 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
319 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
320 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
324 static void atmel_lcdfb_update_dma(struct fb_info *info,
325 struct fb_var_screeninfo *var)
327 struct atmel_lcdfb_info *sinfo = info->par;
328 struct fb_fix_screeninfo *fix = &info->fix;
329 unsigned long dma_addr;
331 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
332 + var->xoffset * info->var.bits_per_pixel / 8);
336 /* Set framebuffer DMA base address and pixel offset */
337 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
339 atmel_lcdfb_update_dma2d(sinfo, var, info);
342 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
344 struct fb_info *info = sinfo->info;
346 dma_free_writecombine(info->device, info->fix.smem_len,
347 info->screen_base, info->fix.smem_start);
351 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
352 * @sinfo: the frame buffer to allocate memory for
354 * This function is called only from the atmel_lcdfb_probe()
355 * so no locking by fb_info->mm_lock around smem_len setting is needed.
357 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
359 struct fb_info *info = sinfo->info;
360 struct fb_var_screeninfo *var = &info->var;
361 unsigned int smem_len;
363 smem_len = (var->xres_virtual * var->yres_virtual
364 * ((var->bits_per_pixel + 7) / 8));
365 info->fix.smem_len = max(smem_len, sinfo->smem_len);
367 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
368 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
370 if (!info->screen_base) {
374 memset(info->screen_base, 0, info->fix.smem_len);
379 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
380 struct fb_info *info)
382 struct fb_videomode varfbmode;
383 const struct fb_videomode *fbmode = NULL;
385 fb_var_to_videomode(&varfbmode, var);
386 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
388 fb_videomode_to_var(var, fbmode);
394 * atmel_lcdfb_check_var - Validates a var passed in.
395 * @var: frame buffer variable screen structure
396 * @info: frame buffer structure that represents a single frame buffer
398 * Checks to see if the hardware supports the state requested by
399 * var passed in. This function does not alter the hardware
400 * state!!! This means the data stored in struct fb_info and
401 * struct atmel_lcdfb_info do not change. This includes the var
402 * inside of struct fb_info. Do NOT change these. This function
403 * can be called on its own if we intent to only test a mode and
404 * not actually set it. The stuff in modedb.c is a example of
405 * this. If the var passed in is slightly off by what the
406 * hardware can support then we alter the var PASSED in to what
407 * we can do. If the hardware doesn't support mode change a
408 * -EINVAL will be returned by the upper layers. You don't need
409 * to implement this function then. If you hardware doesn't
410 * support changing the resolution then this function is not
411 * needed. In this case the driver would just provide a var that
412 * represents the static state the screen is in.
414 * Returns negative errno on error, or zero on success.
416 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
417 struct fb_info *info)
419 struct device *dev = info->device;
420 struct atmel_lcdfb_info *sinfo = info->par;
421 unsigned long clk_value_khz;
423 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
425 dev_dbg(dev, "%s:\n", __func__);
427 if (!(var->pixclock && var->bits_per_pixel)) {
428 /* choose a suitable mode if possible */
429 if (!atmel_lcdfb_choose_mode(var, info)) {
430 dev_err(dev, "needed value not specified\n");
435 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
436 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
437 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
438 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
440 if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
441 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
445 /* Do not allow to have real resoulution larger than virtual */
446 if (var->xres > var->xres_virtual)
447 var->xres_virtual = var->xres;
449 if (var->yres > var->yres_virtual)
450 var->yres_virtual = var->yres;
452 /* Force same alignment for each line */
453 var->xres = (var->xres + 3) & ~3UL;
454 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
456 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
457 var->transp.msb_right = 0;
458 var->transp.offset = var->transp.length = 0;
459 var->xoffset = var->yoffset = 0;
461 if (info->fix.smem_len) {
462 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
463 * ((var->bits_per_pixel + 7) / 8));
464 if (smem_len > info->fix.smem_len) {
465 dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n",
466 info->fix.smem_len, smem_len);
471 /* Saturate vertical and horizontal timings at maximum values */
472 var->vsync_len = min_t(u32, var->vsync_len,
473 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
474 var->upper_margin = min_t(u32, var->upper_margin,
475 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
476 var->lower_margin = min_t(u32, var->lower_margin,
478 var->right_margin = min_t(u32, var->right_margin,
479 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
480 var->hsync_len = min_t(u32, var->hsync_len,
481 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
482 var->left_margin = min_t(u32, var->left_margin,
485 /* Some parameters can't be zero */
486 var->vsync_len = max_t(u32, var->vsync_len, 1);
487 var->right_margin = max_t(u32, var->right_margin, 1);
488 var->hsync_len = max_t(u32, var->hsync_len, 1);
489 var->left_margin = max_t(u32, var->left_margin, 1);
491 switch (var->bits_per_pixel) {
496 var->red.offset = var->green.offset = var->blue.offset = 0;
497 var->red.length = var->green.length = var->blue.length
498 = var->bits_per_pixel;
501 /* Older SOCs use IBGR:555 rather than BGR:565. */
502 if (sinfo->config->have_intensity_bit)
503 var->green.length = 5;
505 var->green.length = 6;
507 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
509 var->red.offset = var->green.length + 5;
510 var->blue.offset = 0;
514 var->blue.offset = var->green.length + 5;
516 var->green.offset = 5;
517 var->red.length = var->blue.length = 5;
520 var->transp.offset = 24;
521 var->transp.length = 8;
524 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
526 var->red.offset = 16;
527 var->blue.offset = 0;
531 var->blue.offset = 16;
533 var->green.offset = 8;
534 var->red.length = var->green.length = var->blue.length = 8;
537 dev_err(dev, "color depth %d not supported\n",
538 var->bits_per_pixel);
548 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
552 atmel_lcdfb_stop(sinfo);
553 atmel_lcdfb_start(sinfo);
557 * atmel_lcdfb_set_par - Alters the hardware state.
558 * @info: frame buffer structure that represents a single frame buffer
560 * Using the fb_var_screeninfo in fb_info we set the resolution
561 * of the this particular framebuffer. This function alters the
562 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
563 * not alter var in fb_info since we are using that data. This
564 * means we depend on the data in var inside fb_info to be
565 * supported by the hardware. atmel_lcdfb_check_var is always called
566 * before atmel_lcdfb_set_par to ensure this. Again if you can't
567 * change the resolution you don't need this function.
570 static int atmel_lcdfb_set_par(struct fb_info *info)
572 struct atmel_lcdfb_info *sinfo = info->par;
573 unsigned long hozval_linesz;
575 unsigned long clk_value_khz;
576 unsigned long bits_per_line;
577 unsigned long pix_factor = 2;
581 dev_dbg(info->device, "%s:\n", __func__);
582 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
583 info->var.xres, info->var.yres,
584 info->var.xres_virtual, info->var.yres_virtual);
586 atmel_lcdfb_stop_nowait(sinfo);
588 if (info->var.bits_per_pixel == 1)
589 info->fix.visual = FB_VISUAL_MONO01;
590 else if (info->var.bits_per_pixel <= 8)
591 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
593 info->fix.visual = FB_VISUAL_TRUECOLOR;
595 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
596 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
598 /* Re-initialize the DMA engine... */
599 dev_dbg(info->device, " * update DMA engine\n");
600 atmel_lcdfb_update_dma(info, &info->var);
602 /* ...set frame size and burst length = 8 words (?) */
603 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
604 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
605 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
607 /* Now, the LCDC core... */
609 /* Set pixel clock */
610 if (sinfo->config->have_alt_pixclock)
613 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
615 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
617 if (value < pix_factor) {
618 dev_notice(info->device, "Bypassing pixel clock divider\n");
619 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
621 value = (value / pix_factor) - 1;
622 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
624 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
625 value << ATMEL_LCDC_CLKVAL_OFFSET);
627 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
628 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
629 PICOS2KHZ(info->var.pixclock));
633 /* Initialize control register 2 */
634 value = sinfo->default_lcdcon2;
636 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
637 value |= ATMEL_LCDC_INVLINE_INVERTED;
638 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
639 value |= ATMEL_LCDC_INVFRAME_INVERTED;
641 switch (info->var.bits_per_pixel) {
642 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
643 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
644 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
645 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
646 case 15: /* fall through */
647 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
648 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
649 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
650 default: BUG(); break;
652 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
653 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
655 /* Vertical timing */
656 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
657 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
658 value |= info->var.lower_margin;
659 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
660 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
662 /* Horizontal timing */
663 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
664 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
665 value |= (info->var.left_margin - 1);
666 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
667 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
669 /* Horizontal value (aka line size) */
670 hozval_linesz = compute_hozval(sinfo, info->var.xres);
673 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
674 value |= info->var.yres - 1;
675 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
676 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
678 /* FIFO Threshold: Use formula from data sheet */
679 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
680 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
682 /* Toggle LCD_MODE every frame */
683 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
685 /* Disable all interrupts */
686 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
687 /* Enable FIFO & DMA errors */
688 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
690 /* ...wait for DMA engine to become idle... */
691 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
694 atmel_lcdfb_start(sinfo);
696 dev_dbg(info->device, " * DONE\n");
701 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
704 chan >>= 16 - bf->length;
705 return chan << bf->offset;
709 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
710 * @regno: Which register in the CLUT we are programming
711 * @red: The red value which can be up to 16 bits wide
712 * @green: The green value which can be up to 16 bits wide
713 * @blue: The blue value which can be up to 16 bits wide.
714 * @transp: If supported the alpha value which can be up to 16 bits wide.
715 * @info: frame buffer info structure
717 * Set a single color register. The values supplied have a 16 bit
718 * magnitude which needs to be scaled in this function for the hardware.
719 * Things to take into consideration are how many color registers, if
720 * any, are supported with the current color visual. With truecolor mode
721 * no color palettes are supported. Here a pseudo palette is created
722 * which we store the value in pseudo_palette in struct fb_info. For
723 * pseudocolor mode we have a limited color palette. To deal with this
724 * we can program what color is displayed for a particular pixel value.
725 * DirectColor is similar in that we can program each color field. If
726 * we have a static colormap we don't need to implement this function.
728 * Returns negative errno on error, or zero on success. In an
729 * ideal world, this would have been the case, but as it turns
730 * out, the other drivers return 1 on failure, so that's what
733 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
734 unsigned int green, unsigned int blue,
735 unsigned int transp, struct fb_info *info)
737 struct atmel_lcdfb_info *sinfo = info->par;
742 if (info->var.grayscale)
743 red = green = blue = (19595 * red + 38470 * green
744 + 7471 * blue) >> 16;
746 switch (info->fix.visual) {
747 case FB_VISUAL_TRUECOLOR:
749 pal = info->pseudo_palette;
751 val = chan_to_field(red, &info->var.red);
752 val |= chan_to_field(green, &info->var.green);
753 val |= chan_to_field(blue, &info->var.blue);
760 case FB_VISUAL_PSEUDOCOLOR:
762 if (sinfo->config->have_intensity_bit) {
763 /* old style I+BGR:555 */
764 val = ((red >> 11) & 0x001f);
765 val |= ((green >> 6) & 0x03e0);
766 val |= ((blue >> 1) & 0x7c00);
769 * TODO: intensity bit. Maybe something like
770 * ~(red[10] ^ green[10] ^ blue[10]) & 1
773 /* new style BGR:565 / RGB:565 */
774 if (sinfo->lcd_wiring_mode ==
775 ATMEL_LCDC_WIRING_RGB) {
776 val = ((blue >> 11) & 0x001f);
777 val |= ((red >> 0) & 0xf800);
779 val = ((red >> 11) & 0x001f);
780 val |= ((blue >> 0) & 0xf800);
783 val |= ((green >> 5) & 0x07e0);
786 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
791 case FB_VISUAL_MONO01:
793 val = (regno == 0) ? 0x00 : 0x1F;
794 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
804 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
805 struct fb_info *info)
807 dev_dbg(info->device, "%s\n", __func__);
809 atmel_lcdfb_update_dma(info, var);
814 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
816 struct atmel_lcdfb_info *sinfo = info->par;
818 switch (blank_mode) {
819 case FB_BLANK_UNBLANK:
820 case FB_BLANK_NORMAL:
821 atmel_lcdfb_start(sinfo);
823 case FB_BLANK_VSYNC_SUSPEND:
824 case FB_BLANK_HSYNC_SUSPEND:
826 case FB_BLANK_POWERDOWN:
827 atmel_lcdfb_stop(sinfo);
833 /* let fbcon do a soft blank for us */
834 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
837 static struct fb_ops atmel_lcdfb_ops = {
838 .owner = THIS_MODULE,
839 .fb_check_var = atmel_lcdfb_check_var,
840 .fb_set_par = atmel_lcdfb_set_par,
841 .fb_setcolreg = atmel_lcdfb_setcolreg,
842 .fb_blank = atmel_lcdfb_blank,
843 .fb_pan_display = atmel_lcdfb_pan_display,
844 .fb_fillrect = cfb_fillrect,
845 .fb_copyarea = cfb_copyarea,
846 .fb_imageblit = cfb_imageblit,
849 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
851 struct fb_info *info = dev_id;
852 struct atmel_lcdfb_info *sinfo = info->par;
855 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
856 if (status & ATMEL_LCDC_UFLWI) {
857 dev_warn(info->device, "FIFO underflow %#x\n", status);
858 /* reset DMA and FIFO to avoid screen shifting */
859 schedule_work(&sinfo->task);
861 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
866 * LCD controller task (to reset the LCD)
868 static void atmel_lcdfb_task(struct work_struct *work)
870 struct atmel_lcdfb_info *sinfo =
871 container_of(work, struct atmel_lcdfb_info, task);
873 atmel_lcdfb_reset(sinfo);
876 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
878 struct fb_info *info = sinfo->info;
881 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
883 dev_info(info->device,
884 "%luKiB frame buffer at %08lx (mapped at %p)\n",
885 (unsigned long)info->fix.smem_len / 1024,
886 (unsigned long)info->fix.smem_start,
889 /* Allocate colormap */
890 ret = fb_alloc_cmap(&info->cmap, 256, 0);
892 dev_err(info->device, "Alloc color map failed\n");
897 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
899 clk_enable(sinfo->bus_clk);
900 clk_enable(sinfo->lcdc_clk);
903 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
905 clk_disable(sinfo->bus_clk);
906 clk_disable(sinfo->lcdc_clk);
910 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
912 struct device *dev = &pdev->dev;
913 struct fb_info *info;
914 struct atmel_lcdfb_info *sinfo;
915 struct atmel_lcdfb_info *pdata_sinfo;
916 struct fb_videomode fbmode;
917 struct resource *regs = NULL;
918 struct resource *map = NULL;
921 dev_dbg(dev, "%s BEGIN\n", __func__);
924 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
926 dev_err(dev, "cannot allocate memory\n");
932 if (dev->platform_data) {
933 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
934 sinfo->default_bpp = pdata_sinfo->default_bpp;
935 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
936 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
937 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
938 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
939 sinfo->guard_time = pdata_sinfo->guard_time;
940 sinfo->smem_len = pdata_sinfo->smem_len;
941 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
942 sinfo->lcdcon_pol_negative = pdata_sinfo->lcdcon_pol_negative;
943 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
945 dev_err(dev, "cannot get default configuration\n");
950 sinfo->config = atmel_lcdfb_get_config(pdev);
954 strcpy(info->fix.id, sinfo->pdev->name);
955 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
956 info->pseudo_palette = sinfo->pseudo_palette;
957 info->fbops = &atmel_lcdfb_ops;
959 memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
960 info->fix = atmel_lcdfb_fix;
962 /* Enable LCDC Clocks */
963 sinfo->bus_clk = clk_get(dev, "hclk");
964 if (IS_ERR(sinfo->bus_clk)) {
965 ret = PTR_ERR(sinfo->bus_clk);
968 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
969 if (IS_ERR(sinfo->lcdc_clk)) {
970 ret = PTR_ERR(sinfo->lcdc_clk);
973 atmel_lcdfb_start_clock(sinfo);
975 ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
976 info->monspecs.modedb_len, info->monspecs.modedb,
979 dev_err(dev, "no suitable video mode found\n");
984 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
986 dev_err(dev, "resources unusable\n");
991 sinfo->irq_base = platform_get_irq(pdev, 0);
992 if (sinfo->irq_base < 0) {
993 dev_err(dev, "unable to get irq\n");
994 ret = sinfo->irq_base;
998 /* Initialize video memory */
999 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1001 /* use a pre-allocated memory buffer */
1002 info->fix.smem_start = map->start;
1003 info->fix.smem_len = resource_size(map);
1004 if (!request_mem_region(info->fix.smem_start,
1005 info->fix.smem_len, pdev->name)) {
1010 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
1011 if (!info->screen_base) {
1013 goto release_intmem;
1017 * Don't clear the framebuffer -- someone may have set
1018 * up a splash image.
1021 /* allocate memory buffer */
1022 ret = atmel_lcdfb_alloc_video_memory(sinfo);
1024 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
1029 /* LCDC registers */
1030 info->fix.mmio_start = regs->start;
1031 info->fix.mmio_len = resource_size(regs);
1033 if (!request_mem_region(info->fix.mmio_start,
1034 info->fix.mmio_len, pdev->name)) {
1039 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
1041 dev_err(dev, "cannot map LCDC registers\n");
1046 /* Initialize PWM for contrast or backlight ("off") */
1047 init_contrast(sinfo);
1050 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
1052 dev_err(dev, "request_irq failed: %d\n", ret);
1056 /* Some operations on the LCDC might sleep and
1057 * require a preemptible task context */
1058 INIT_WORK(&sinfo->task, atmel_lcdfb_task);
1060 ret = atmel_lcdfb_init_fbinfo(sinfo);
1062 dev_err(dev, "init fbinfo failed: %d\n", ret);
1063 goto unregister_irqs;
1067 * This makes sure that our colour bitfield
1068 * descriptors are correctly initialised.
1070 atmel_lcdfb_check_var(&info->var, info);
1072 ret = fb_set_var(info, &info->var);
1074 dev_warn(dev, "unable to set display parameters\n");
1078 dev_set_drvdata(dev, info);
1081 * Tell the world that we're ready to go
1083 ret = register_framebuffer(info);
1085 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
1089 /* add selected videomode to modelist */
1090 fb_var_to_videomode(&fbmode, &info->var);
1091 fb_add_videomode(&fbmode, &info->modelist);
1093 /* Power up the LCDC screen */
1094 if (sinfo->atmel_lcdfb_power_control)
1095 sinfo->atmel_lcdfb_power_control(1);
1097 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1098 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1103 dev_set_drvdata(dev, NULL);
1105 fb_dealloc_cmap(&info->cmap);
1107 cancel_work_sync(&sinfo->task);
1108 free_irq(sinfo->irq_base, info);
1110 exit_backlight(sinfo);
1111 iounmap(sinfo->mmio);
1113 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1116 iounmap(info->screen_base);
1118 atmel_lcdfb_free_video_memory(sinfo);
1122 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1124 atmel_lcdfb_stop_clock(sinfo);
1125 clk_put(sinfo->lcdc_clk);
1127 clk_put(sinfo->bus_clk);
1129 framebuffer_release(info);
1131 dev_dbg(dev, "%s FAILED\n", __func__);
1135 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1137 struct device *dev = &pdev->dev;
1138 struct fb_info *info = dev_get_drvdata(dev);
1139 struct atmel_lcdfb_info *sinfo;
1141 if (!info || !info->par)
1145 cancel_work_sync(&sinfo->task);
1146 exit_backlight(sinfo);
1147 if (sinfo->atmel_lcdfb_power_control)
1148 sinfo->atmel_lcdfb_power_control(0);
1149 unregister_framebuffer(info);
1150 atmel_lcdfb_stop_clock(sinfo);
1151 clk_put(sinfo->lcdc_clk);
1152 clk_put(sinfo->bus_clk);
1153 fb_dealloc_cmap(&info->cmap);
1154 free_irq(sinfo->irq_base, info);
1155 iounmap(sinfo->mmio);
1156 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1157 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1158 iounmap(info->screen_base);
1159 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1161 atmel_lcdfb_free_video_memory(sinfo);
1164 dev_set_drvdata(dev, NULL);
1165 framebuffer_release(info);
1172 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1174 struct fb_info *info = platform_get_drvdata(pdev);
1175 struct atmel_lcdfb_info *sinfo = info->par;
1178 * We don't want to handle interrupts while the clock is
1179 * stopped. It may take forever.
1181 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1183 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);
1184 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1185 if (sinfo->atmel_lcdfb_power_control)
1186 sinfo->atmel_lcdfb_power_control(0);
1188 atmel_lcdfb_stop(sinfo);
1189 atmel_lcdfb_stop_clock(sinfo);
1194 static int atmel_lcdfb_resume(struct platform_device *pdev)
1196 struct fb_info *info = platform_get_drvdata(pdev);
1197 struct atmel_lcdfb_info *sinfo = info->par;
1199 atmel_lcdfb_start_clock(sinfo);
1200 atmel_lcdfb_start(sinfo);
1201 if (sinfo->atmel_lcdfb_power_control)
1202 sinfo->atmel_lcdfb_power_control(1);
1203 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1205 /* Enable FIFO & DMA errors */
1206 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1207 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1213 #define atmel_lcdfb_suspend NULL
1214 #define atmel_lcdfb_resume NULL
1217 static struct platform_driver atmel_lcdfb_driver = {
1218 .remove = __exit_p(atmel_lcdfb_remove),
1219 .suspend = atmel_lcdfb_suspend,
1220 .resume = atmel_lcdfb_resume,
1221 .id_table = atmel_lcdfb_devtypes,
1223 .name = "atmel_lcdfb",
1224 .owner = THIS_MODULE,
1228 module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe);
1230 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1231 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1232 MODULE_LICENSE("GPL");