6e6491fb83b7d72706f503966c6ffdd6a767bc14
[cascardo/linux.git] / drivers / video / atmel_lcdfb.c
1 /*
2  *  Driver for AT91/AT32 LCD Controller
3  *
4  *  Copyright (C) 2007 Atmel Corporation
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file COPYING in the main directory of this archive for
8  * more details.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20 #include <linux/gfp.h>
21 #include <linux/module.h>
22 #include <linux/platform_data/atmel.h>
23
24 #include <mach/cpu.h>
25 #include <asm/gpio.h>
26
27 #include <video/atmel_lcdc.h>
28
29 #define lcdc_readl(sinfo, reg)          __raw_readl((sinfo)->mmio+(reg))
30 #define lcdc_writel(sinfo, reg, val)    __raw_writel((val), (sinfo)->mmio+(reg))
31
32 /* configurable parameters */
33 #define ATMEL_LCDC_CVAL_DEFAULT         0xc8
34 #define ATMEL_LCDC_DMA_BURST_LEN        8       /* words */
35 #define ATMEL_LCDC_FIFO_SIZE            512     /* words */
36
37 struct atmel_lcdfb_config {
38         bool have_alt_pixclock;
39         bool have_hozval;
40         bool have_intensity_bit;
41 };
42
43 static struct atmel_lcdfb_config at91sam9261_config = {
44         .have_hozval            = true,
45         .have_intensity_bit     = true,
46 };
47
48 static struct atmel_lcdfb_config at91sam9263_config = {
49         .have_intensity_bit     = true,
50 };
51
52 static struct atmel_lcdfb_config at91sam9g10_config = {
53         .have_hozval            = true,
54 };
55
56 static struct atmel_lcdfb_config at91sam9g45_config = {
57         .have_alt_pixclock      = true,
58 };
59
60 static struct atmel_lcdfb_config at91sam9g45es_config = {
61 };
62
63 static struct atmel_lcdfb_config at91sam9rl_config = {
64         .have_intensity_bit     = true,
65 };
66
67 static struct atmel_lcdfb_config at32ap_config = {
68         .have_hozval            = true,
69 };
70
71 static const struct platform_device_id atmel_lcdfb_devtypes[] = {
72         {
73                 .name = "at91sam9261-lcdfb",
74                 .driver_data = (unsigned long)&at91sam9261_config,
75         }, {
76                 .name = "at91sam9263-lcdfb",
77                 .driver_data = (unsigned long)&at91sam9263_config,
78         }, {
79                 .name = "at91sam9g10-lcdfb",
80                 .driver_data = (unsigned long)&at91sam9g10_config,
81         }, {
82                 .name = "at91sam9g45-lcdfb",
83                 .driver_data = (unsigned long)&at91sam9g45_config,
84         }, {
85                 .name = "at91sam9g45es-lcdfb",
86                 .driver_data = (unsigned long)&at91sam9g45es_config,
87         }, {
88                 .name = "at91sam9rl-lcdfb",
89                 .driver_data = (unsigned long)&at91sam9rl_config,
90         }, {
91                 .name = "at32ap-lcdfb",
92                 .driver_data = (unsigned long)&at32ap_config,
93         }, {
94                 /* terminator */
95         }
96 };
97
98 static struct atmel_lcdfb_config *
99 atmel_lcdfb_get_config(struct platform_device *pdev)
100 {
101         unsigned long data;
102
103         data = platform_get_device_id(pdev)->driver_data;
104
105         return (struct atmel_lcdfb_config *)data;
106 }
107
108 #if defined(CONFIG_ARCH_AT91)
109 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
110                                          | FBINFO_PARTIAL_PAN_OK \
111                                          | FBINFO_HWACCEL_YPAN)
112
113 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
114                                         struct fb_var_screeninfo *var,
115                                         struct fb_info *info)
116 {
117
118 }
119 #elif defined(CONFIG_AVR32)
120 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
121                                         | FBINFO_PARTIAL_PAN_OK \
122                                         | FBINFO_HWACCEL_XPAN \
123                                         | FBINFO_HWACCEL_YPAN)
124
125 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
126                                      struct fb_var_screeninfo *var,
127                                      struct fb_info *info)
128 {
129         u32 dma2dcfg;
130         u32 pixeloff;
131
132         pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
133
134         dma2dcfg = (info->var.xres_virtual - info->var.xres)
135                  * info->var.bits_per_pixel / 8;
136         dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
137         lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
138
139         /* Update configuration */
140         lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
141                     lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
142                     | ATMEL_LCDC_DMAUPDT);
143 }
144 #endif
145
146 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
147                 | ATMEL_LCDC_POL_POSITIVE
148                 | ATMEL_LCDC_ENA_PWMENABLE;
149
150 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
151
152 /* some bl->props field just changed */
153 static int atmel_bl_update_status(struct backlight_device *bl)
154 {
155         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
156         int                     power = sinfo->bl_power;
157         int                     brightness = bl->props.brightness;
158
159         /* REVISIT there may be a meaningful difference between
160          * fb_blank and power ... there seem to be some cases
161          * this doesn't handle correctly.
162          */
163         if (bl->props.fb_blank != sinfo->bl_power)
164                 power = bl->props.fb_blank;
165         else if (bl->props.power != sinfo->bl_power)
166                 power = bl->props.power;
167
168         if (brightness < 0 && power == FB_BLANK_UNBLANK)
169                 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
170         else if (power != FB_BLANK_UNBLANK)
171                 brightness = 0;
172
173         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
174         if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
175                 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
176                         brightness ? contrast_ctr : 0);
177         else
178                 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
179
180         bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
181
182         return 0;
183 }
184
185 static int atmel_bl_get_brightness(struct backlight_device *bl)
186 {
187         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
188
189         return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
190 }
191
192 static const struct backlight_ops atmel_lcdc_bl_ops = {
193         .update_status = atmel_bl_update_status,
194         .get_brightness = atmel_bl_get_brightness,
195 };
196
197 static void init_backlight(struct atmel_lcdfb_info *sinfo)
198 {
199         struct backlight_properties props;
200         struct backlight_device *bl;
201
202         sinfo->bl_power = FB_BLANK_UNBLANK;
203
204         if (sinfo->backlight)
205                 return;
206
207         memset(&props, 0, sizeof(struct backlight_properties));
208         props.type = BACKLIGHT_RAW;
209         props.max_brightness = 0xff;
210         bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
211                                        &atmel_lcdc_bl_ops, &props);
212         if (IS_ERR(bl)) {
213                 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
214                                 PTR_ERR(bl));
215                 return;
216         }
217         sinfo->backlight = bl;
218
219         bl->props.power = FB_BLANK_UNBLANK;
220         bl->props.fb_blank = FB_BLANK_UNBLANK;
221         bl->props.brightness = atmel_bl_get_brightness(bl);
222 }
223
224 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
225 {
226         if (sinfo->backlight)
227                 backlight_device_unregister(sinfo->backlight);
228 }
229
230 #else
231
232 static void init_backlight(struct atmel_lcdfb_info *sinfo)
233 {
234         dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
235 }
236
237 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
238 {
239 }
240
241 #endif
242
243 static void init_contrast(struct atmel_lcdfb_info *sinfo)
244 {
245         /* contrast pwm can be 'inverted' */
246         if (sinfo->lcdcon_pol_negative)
247                         contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
248
249         /* have some default contrast/backlight settings */
250         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
251         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
252
253         if (sinfo->lcdcon_is_backlight)
254                 init_backlight(sinfo);
255 }
256
257
258 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
259         .type           = FB_TYPE_PACKED_PIXELS,
260         .visual         = FB_VISUAL_TRUECOLOR,
261         .xpanstep       = 0,
262         .ypanstep       = 1,
263         .ywrapstep      = 0,
264         .accel          = FB_ACCEL_NONE,
265 };
266
267 static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo,
268                                                         unsigned long xres)
269 {
270         unsigned long lcdcon2;
271         unsigned long value;
272
273         if (!sinfo->config->have_hozval)
274                 return xres;
275
276         lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2);
277         value = xres;
278         if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
279                 /* STN display */
280                 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
281                         value *= 3;
282                 }
283                 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
284                    || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
285                       && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
286                         value = DIV_ROUND_UP(value, 4);
287                 else
288                         value = DIV_ROUND_UP(value, 8);
289         }
290
291         return value;
292 }
293
294 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
295 {
296         /* Turn off the LCD controller and the DMA controller */
297         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
298                         sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
299
300         /* Wait for the LCDC core to become idle */
301         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
302                 msleep(10);
303
304         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
305 }
306
307 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
308 {
309         atmel_lcdfb_stop_nowait(sinfo);
310
311         /* Wait for DMA engine to become idle... */
312         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
313                 msleep(10);
314 }
315
316 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
317 {
318         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
319         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
320                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
321                 | ATMEL_LCDC_PWR);
322 }
323
324 static void atmel_lcdfb_update_dma(struct fb_info *info,
325                                struct fb_var_screeninfo *var)
326 {
327         struct atmel_lcdfb_info *sinfo = info->par;
328         struct fb_fix_screeninfo *fix = &info->fix;
329         unsigned long dma_addr;
330
331         dma_addr = (fix->smem_start + var->yoffset * fix->line_length
332                     + var->xoffset * info->var.bits_per_pixel / 8);
333
334         dma_addr &= ~3UL;
335
336         /* Set framebuffer DMA base address and pixel offset */
337         lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
338
339         atmel_lcdfb_update_dma2d(sinfo, var, info);
340 }
341
342 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
343 {
344         struct fb_info *info = sinfo->info;
345
346         dma_free_writecombine(info->device, info->fix.smem_len,
347                                 info->screen_base, info->fix.smem_start);
348 }
349
350 /**
351  *      atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
352  *      @sinfo: the frame buffer to allocate memory for
353  *      
354  *      This function is called only from the atmel_lcdfb_probe()
355  *      so no locking by fb_info->mm_lock around smem_len setting is needed.
356  */
357 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
358 {
359         struct fb_info *info = sinfo->info;
360         struct fb_var_screeninfo *var = &info->var;
361         unsigned int smem_len;
362
363         smem_len = (var->xres_virtual * var->yres_virtual
364                     * ((var->bits_per_pixel + 7) / 8));
365         info->fix.smem_len = max(smem_len, sinfo->smem_len);
366
367         info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
368                                         (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
369
370         if (!info->screen_base) {
371                 return -ENOMEM;
372         }
373
374         memset(info->screen_base, 0, info->fix.smem_len);
375
376         return 0;
377 }
378
379 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
380                                                      struct fb_info *info)
381 {
382         struct fb_videomode varfbmode;
383         const struct fb_videomode *fbmode = NULL;
384
385         fb_var_to_videomode(&varfbmode, var);
386         fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
387         if (fbmode)
388                 fb_videomode_to_var(var, fbmode);
389         return fbmode;
390 }
391
392
393 /**
394  *      atmel_lcdfb_check_var - Validates a var passed in.
395  *      @var: frame buffer variable screen structure
396  *      @info: frame buffer structure that represents a single frame buffer
397  *
398  *      Checks to see if the hardware supports the state requested by
399  *      var passed in. This function does not alter the hardware
400  *      state!!!  This means the data stored in struct fb_info and
401  *      struct atmel_lcdfb_info do not change. This includes the var
402  *      inside of struct fb_info.  Do NOT change these. This function
403  *      can be called on its own if we intent to only test a mode and
404  *      not actually set it. The stuff in modedb.c is a example of
405  *      this. If the var passed in is slightly off by what the
406  *      hardware can support then we alter the var PASSED in to what
407  *      we can do. If the hardware doesn't support mode change a
408  *      -EINVAL will be returned by the upper layers. You don't need
409  *      to implement this function then. If you hardware doesn't
410  *      support changing the resolution then this function is not
411  *      needed. In this case the driver would just provide a var that
412  *      represents the static state the screen is in.
413  *
414  *      Returns negative errno on error, or zero on success.
415  */
416 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
417                              struct fb_info *info)
418 {
419         struct device *dev = info->device;
420         struct atmel_lcdfb_info *sinfo = info->par;
421         unsigned long clk_value_khz;
422
423         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
424
425         dev_dbg(dev, "%s:\n", __func__);
426
427         if (!(var->pixclock && var->bits_per_pixel)) {
428                 /* choose a suitable mode if possible */
429                 if (!atmel_lcdfb_choose_mode(var, info)) {
430                         dev_err(dev, "needed value not specified\n");
431                         return -EINVAL;
432                 }
433         }
434
435         dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
436         dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
437         dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
438         dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
439
440         if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
441                 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
442                 return -EINVAL;
443         }
444
445         /* Do not allow to have real resoulution larger than virtual */
446         if (var->xres > var->xres_virtual)
447                 var->xres_virtual = var->xres;
448
449         if (var->yres > var->yres_virtual)
450                 var->yres_virtual = var->yres;
451
452         /* Force same alignment for each line */
453         var->xres = (var->xres + 3) & ~3UL;
454         var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
455
456         var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
457         var->transp.msb_right = 0;
458         var->transp.offset = var->transp.length = 0;
459         var->xoffset = var->yoffset = 0;
460
461         if (info->fix.smem_len) {
462                 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
463                                          * ((var->bits_per_pixel + 7) / 8));
464                 if (smem_len > info->fix.smem_len) {
465                         dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n",
466                                 info->fix.smem_len, smem_len);
467                         return -EINVAL;
468                 }
469         }
470
471         /* Saturate vertical and horizontal timings at maximum values */
472         var->vsync_len = min_t(u32, var->vsync_len,
473                         (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
474         var->upper_margin = min_t(u32, var->upper_margin,
475                         ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
476         var->lower_margin = min_t(u32, var->lower_margin,
477                         ATMEL_LCDC_VFP);
478         var->right_margin = min_t(u32, var->right_margin,
479                         (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
480         var->hsync_len = min_t(u32, var->hsync_len,
481                         (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
482         var->left_margin = min_t(u32, var->left_margin,
483                         ATMEL_LCDC_HBP + 1);
484
485         /* Some parameters can't be zero */
486         var->vsync_len = max_t(u32, var->vsync_len, 1);
487         var->right_margin = max_t(u32, var->right_margin, 1);
488         var->hsync_len = max_t(u32, var->hsync_len, 1);
489         var->left_margin = max_t(u32, var->left_margin, 1);
490
491         switch (var->bits_per_pixel) {
492         case 1:
493         case 2:
494         case 4:
495         case 8:
496                 var->red.offset = var->green.offset = var->blue.offset = 0;
497                 var->red.length = var->green.length = var->blue.length
498                         = var->bits_per_pixel;
499                 break;
500         case 16:
501                 /* Older SOCs use IBGR:555 rather than BGR:565. */
502                 if (sinfo->config->have_intensity_bit)
503                         var->green.length = 5;
504                 else
505                         var->green.length = 6;
506
507                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
508                         /* RGB:5X5 mode */
509                         var->red.offset = var->green.length + 5;
510                         var->blue.offset = 0;
511                 } else {
512                         /* BGR:5X5 mode */
513                         var->red.offset = 0;
514                         var->blue.offset = var->green.length + 5;
515                 }
516                 var->green.offset = 5;
517                 var->red.length = var->blue.length = 5;
518                 break;
519         case 32:
520                 var->transp.offset = 24;
521                 var->transp.length = 8;
522                 /* fall through */
523         case 24:
524                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
525                         /* RGB:888 mode */
526                         var->red.offset = 16;
527                         var->blue.offset = 0;
528                 } else {
529                         /* BGR:888 mode */
530                         var->red.offset = 0;
531                         var->blue.offset = 16;
532                 }
533                 var->green.offset = 8;
534                 var->red.length = var->green.length = var->blue.length = 8;
535                 break;
536         default:
537                 dev_err(dev, "color depth %d not supported\n",
538                                         var->bits_per_pixel);
539                 return -EINVAL;
540         }
541
542         return 0;
543 }
544
545 /*
546  * LCD reset sequence
547  */
548 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
549 {
550         might_sleep();
551
552         atmel_lcdfb_stop(sinfo);
553         atmel_lcdfb_start(sinfo);
554 }
555
556 /**
557  *      atmel_lcdfb_set_par - Alters the hardware state.
558  *      @info: frame buffer structure that represents a single frame buffer
559  *
560  *      Using the fb_var_screeninfo in fb_info we set the resolution
561  *      of the this particular framebuffer. This function alters the
562  *      par AND the fb_fix_screeninfo stored in fb_info. It doesn't
563  *      not alter var in fb_info since we are using that data. This
564  *      means we depend on the data in var inside fb_info to be
565  *      supported by the hardware.  atmel_lcdfb_check_var is always called
566  *      before atmel_lcdfb_set_par to ensure this.  Again if you can't
567  *      change the resolution you don't need this function.
568  *
569  */
570 static int atmel_lcdfb_set_par(struct fb_info *info)
571 {
572         struct atmel_lcdfb_info *sinfo = info->par;
573         unsigned long hozval_linesz;
574         unsigned long value;
575         unsigned long clk_value_khz;
576         unsigned long bits_per_line;
577         unsigned long pix_factor = 2;
578
579         might_sleep();
580
581         dev_dbg(info->device, "%s:\n", __func__);
582         dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
583                  info->var.xres, info->var.yres,
584                  info->var.xres_virtual, info->var.yres_virtual);
585
586         atmel_lcdfb_stop_nowait(sinfo);
587
588         if (info->var.bits_per_pixel == 1)
589                 info->fix.visual = FB_VISUAL_MONO01;
590         else if (info->var.bits_per_pixel <= 8)
591                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
592         else
593                 info->fix.visual = FB_VISUAL_TRUECOLOR;
594
595         bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
596         info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
597
598         /* Re-initialize the DMA engine... */
599         dev_dbg(info->device, "  * update DMA engine\n");
600         atmel_lcdfb_update_dma(info, &info->var);
601
602         /* ...set frame size and burst length = 8 words (?) */
603         value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
604         value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
605         lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
606
607         /* Now, the LCDC core... */
608
609         /* Set pixel clock */
610         if (sinfo->config->have_alt_pixclock)
611                 pix_factor = 1;
612
613         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
614
615         value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
616
617         if (value < pix_factor) {
618                 dev_notice(info->device, "Bypassing pixel clock divider\n");
619                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
620         } else {
621                 value = (value / pix_factor) - 1;
622                 dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n",
623                                 value);
624                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
625                                 value << ATMEL_LCDC_CLKVAL_OFFSET);
626                 info->var.pixclock =
627                         KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
628                 dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
629                                         PICOS2KHZ(info->var.pixclock));
630         }
631
632
633         /* Initialize control register 2 */
634         value = sinfo->default_lcdcon2;
635
636         if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
637                 value |= ATMEL_LCDC_INVLINE_INVERTED;
638         if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
639                 value |= ATMEL_LCDC_INVFRAME_INVERTED;
640
641         switch (info->var.bits_per_pixel) {
642                 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
643                 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
644                 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
645                 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
646                 case 15: /* fall through */
647                 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
648                 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
649                 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
650                 default: BUG(); break;
651         }
652         dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
653         lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
654
655         /* Vertical timing */
656         value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
657         value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
658         value |= info->var.lower_margin;
659         dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
660         lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
661
662         /* Horizontal timing */
663         value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
664         value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
665         value |= (info->var.left_margin - 1);
666         dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
667         lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
668
669         /* Horizontal value (aka line size) */
670         hozval_linesz = compute_hozval(sinfo, info->var.xres);
671
672         /* Display size */
673         value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
674         value |= info->var.yres - 1;
675         dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
676         lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
677
678         /* FIFO Threshold: Use formula from data sheet */
679         value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
680         lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
681
682         /* Toggle LCD_MODE every frame */
683         lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
684
685         /* Disable all interrupts */
686         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
687         /* Enable FIFO & DMA errors */
688         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
689
690         /* ...wait for DMA engine to become idle... */
691         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
692                 msleep(10);
693
694         atmel_lcdfb_start(sinfo);
695
696         dev_dbg(info->device, "  * DONE\n");
697
698         return 0;
699 }
700
701 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
702 {
703         chan &= 0xffff;
704         chan >>= 16 - bf->length;
705         return chan << bf->offset;
706 }
707
708 /**
709  *      atmel_lcdfb_setcolreg - Optional function. Sets a color register.
710  *      @regno: Which register in the CLUT we are programming
711  *      @red: The red value which can be up to 16 bits wide
712  *      @green: The green value which can be up to 16 bits wide
713  *      @blue:  The blue value which can be up to 16 bits wide.
714  *      @transp: If supported the alpha value which can be up to 16 bits wide.
715  *      @info: frame buffer info structure
716  *
717  *      Set a single color register. The values supplied have a 16 bit
718  *      magnitude which needs to be scaled in this function for the hardware.
719  *      Things to take into consideration are how many color registers, if
720  *      any, are supported with the current color visual. With truecolor mode
721  *      no color palettes are supported. Here a pseudo palette is created
722  *      which we store the value in pseudo_palette in struct fb_info. For
723  *      pseudocolor mode we have a limited color palette. To deal with this
724  *      we can program what color is displayed for a particular pixel value.
725  *      DirectColor is similar in that we can program each color field. If
726  *      we have a static colormap we don't need to implement this function.
727  *
728  *      Returns negative errno on error, or zero on success. In an
729  *      ideal world, this would have been the case, but as it turns
730  *      out, the other drivers return 1 on failure, so that's what
731  *      we're going to do.
732  */
733 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
734                              unsigned int green, unsigned int blue,
735                              unsigned int transp, struct fb_info *info)
736 {
737         struct atmel_lcdfb_info *sinfo = info->par;
738         unsigned int val;
739         u32 *pal;
740         int ret = 1;
741
742         if (info->var.grayscale)
743                 red = green = blue = (19595 * red + 38470 * green
744                                       + 7471 * blue) >> 16;
745
746         switch (info->fix.visual) {
747         case FB_VISUAL_TRUECOLOR:
748                 if (regno < 16) {
749                         pal = info->pseudo_palette;
750
751                         val  = chan_to_field(red, &info->var.red);
752                         val |= chan_to_field(green, &info->var.green);
753                         val |= chan_to_field(blue, &info->var.blue);
754
755                         pal[regno] = val;
756                         ret = 0;
757                 }
758                 break;
759
760         case FB_VISUAL_PSEUDOCOLOR:
761                 if (regno < 256) {
762                         if (sinfo->config->have_intensity_bit) {
763                                 /* old style I+BGR:555 */
764                                 val  = ((red   >> 11) & 0x001f);
765                                 val |= ((green >>  6) & 0x03e0);
766                                 val |= ((blue  >>  1) & 0x7c00);
767
768                                 /*
769                                  * TODO: intensity bit. Maybe something like
770                                  *   ~(red[10] ^ green[10] ^ blue[10]) & 1
771                                  */
772                         } else {
773                                 /* new style BGR:565 / RGB:565 */
774                                 if (sinfo->lcd_wiring_mode ==
775                                     ATMEL_LCDC_WIRING_RGB) {
776                                         val  = ((blue >> 11) & 0x001f);
777                                         val |= ((red  >>  0) & 0xf800);
778                                 } else {
779                                         val  = ((red  >> 11) & 0x001f);
780                                         val |= ((blue >>  0) & 0xf800);
781                                 }
782
783                                 val |= ((green >>  5) & 0x07e0);
784                         }
785
786                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
787                         ret = 0;
788                 }
789                 break;
790
791         case FB_VISUAL_MONO01:
792                 if (regno < 2) {
793                         val = (regno == 0) ? 0x00 : 0x1F;
794                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
795                         ret = 0;
796                 }
797                 break;
798
799         }
800
801         return ret;
802 }
803
804 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
805                                struct fb_info *info)
806 {
807         dev_dbg(info->device, "%s\n", __func__);
808
809         atmel_lcdfb_update_dma(info, var);
810
811         return 0;
812 }
813
814 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
815 {
816         struct atmel_lcdfb_info *sinfo = info->par;
817
818         switch (blank_mode) {
819         case FB_BLANK_UNBLANK:
820         case FB_BLANK_NORMAL:
821                 atmel_lcdfb_start(sinfo);
822                 break;
823         case FB_BLANK_VSYNC_SUSPEND:
824         case FB_BLANK_HSYNC_SUSPEND:
825                 break;
826         case FB_BLANK_POWERDOWN:
827                 atmel_lcdfb_stop(sinfo);
828                 break;
829         default:
830                 return -EINVAL;
831         }
832
833         /* let fbcon do a soft blank for us */
834         return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
835 }
836
837 static struct fb_ops atmel_lcdfb_ops = {
838         .owner          = THIS_MODULE,
839         .fb_check_var   = atmel_lcdfb_check_var,
840         .fb_set_par     = atmel_lcdfb_set_par,
841         .fb_setcolreg   = atmel_lcdfb_setcolreg,
842         .fb_blank       = atmel_lcdfb_blank,
843         .fb_pan_display = atmel_lcdfb_pan_display,
844         .fb_fillrect    = cfb_fillrect,
845         .fb_copyarea    = cfb_copyarea,
846         .fb_imageblit   = cfb_imageblit,
847 };
848
849 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
850 {
851         struct fb_info *info = dev_id;
852         struct atmel_lcdfb_info *sinfo = info->par;
853         u32 status;
854
855         status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
856         if (status & ATMEL_LCDC_UFLWI) {
857                 dev_warn(info->device, "FIFO underflow %#x\n", status);
858                 /* reset DMA and FIFO to avoid screen shifting */
859                 schedule_work(&sinfo->task);
860         }
861         lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
862         return IRQ_HANDLED;
863 }
864
865 /*
866  * LCD controller task (to reset the LCD)
867  */
868 static void atmel_lcdfb_task(struct work_struct *work)
869 {
870         struct atmel_lcdfb_info *sinfo =
871                 container_of(work, struct atmel_lcdfb_info, task);
872
873         atmel_lcdfb_reset(sinfo);
874 }
875
876 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
877 {
878         struct fb_info *info = sinfo->info;
879         int ret = 0;
880
881         info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
882
883         dev_info(info->device,
884                "%luKiB frame buffer at %08lx (mapped at %p)\n",
885                (unsigned long)info->fix.smem_len / 1024,
886                (unsigned long)info->fix.smem_start,
887                info->screen_base);
888
889         /* Allocate colormap */
890         ret = fb_alloc_cmap(&info->cmap, 256, 0);
891         if (ret < 0)
892                 dev_err(info->device, "Alloc color map failed\n");
893
894         return ret;
895 }
896
897 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
898 {
899         clk_enable(sinfo->bus_clk);
900         clk_enable(sinfo->lcdc_clk);
901 }
902
903 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
904 {
905         clk_disable(sinfo->bus_clk);
906         clk_disable(sinfo->lcdc_clk);
907 }
908
909
910 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
911 {
912         struct device *dev = &pdev->dev;
913         struct fb_info *info;
914         struct atmel_lcdfb_info *sinfo;
915         struct atmel_lcdfb_info *pdata_sinfo;
916         struct fb_videomode fbmode;
917         struct resource *regs = NULL;
918         struct resource *map = NULL;
919         int ret;
920
921         dev_dbg(dev, "%s BEGIN\n", __func__);
922
923         ret = -ENOMEM;
924         info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
925         if (!info) {
926                 dev_err(dev, "cannot allocate memory\n");
927                 goto out;
928         }
929
930         sinfo = info->par;
931
932         if (dev->platform_data) {
933                 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
934                 sinfo->default_bpp = pdata_sinfo->default_bpp;
935                 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
936                 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
937                 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
938                 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
939                 sinfo->guard_time = pdata_sinfo->guard_time;
940                 sinfo->smem_len = pdata_sinfo->smem_len;
941                 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
942                 sinfo->lcdcon_pol_negative = pdata_sinfo->lcdcon_pol_negative;
943                 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
944         } else {
945                 dev_err(dev, "cannot get default configuration\n");
946                 goto free_info;
947         }
948         sinfo->info = info;
949         sinfo->pdev = pdev;
950         sinfo->config = atmel_lcdfb_get_config(pdev);
951         if (!sinfo->config)
952                 goto free_info;
953
954         strcpy(info->fix.id, sinfo->pdev->name);
955         info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
956         info->pseudo_palette = sinfo->pseudo_palette;
957         info->fbops = &atmel_lcdfb_ops;
958
959         memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
960         info->fix = atmel_lcdfb_fix;
961
962         /* Enable LCDC Clocks */
963         sinfo->bus_clk = clk_get(dev, "hclk");
964         if (IS_ERR(sinfo->bus_clk)) {
965                 ret = PTR_ERR(sinfo->bus_clk);
966                 goto free_info;
967         }
968         sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
969         if (IS_ERR(sinfo->lcdc_clk)) {
970                 ret = PTR_ERR(sinfo->lcdc_clk);
971                 goto put_bus_clk;
972         }
973         atmel_lcdfb_start_clock(sinfo);
974
975         ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
976                         info->monspecs.modedb_len, info->monspecs.modedb,
977                         sinfo->default_bpp);
978         if (!ret) {
979                 dev_err(dev, "no suitable video mode found\n");
980                 goto stop_clk;
981         }
982
983
984         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
985         if (!regs) {
986                 dev_err(dev, "resources unusable\n");
987                 ret = -ENXIO;
988                 goto stop_clk;
989         }
990
991         sinfo->irq_base = platform_get_irq(pdev, 0);
992         if (sinfo->irq_base < 0) {
993                 dev_err(dev, "unable to get irq\n");
994                 ret = sinfo->irq_base;
995                 goto stop_clk;
996         }
997
998         /* Initialize video memory */
999         map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1000         if (map) {
1001                 /* use a pre-allocated memory buffer */
1002                 info->fix.smem_start = map->start;
1003                 info->fix.smem_len = resource_size(map);
1004                 if (!request_mem_region(info->fix.smem_start,
1005                                         info->fix.smem_len, pdev->name)) {
1006                         ret = -EBUSY;
1007                         goto stop_clk;
1008                 }
1009
1010                 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
1011                 if (!info->screen_base) {
1012                         ret = -ENOMEM;
1013                         goto release_intmem;
1014                 }
1015
1016                 /*
1017                  * Don't clear the framebuffer -- someone may have set
1018                  * up a splash image.
1019                  */
1020         } else {
1021                 /* allocate memory buffer */
1022                 ret = atmel_lcdfb_alloc_video_memory(sinfo);
1023                 if (ret < 0) {
1024                         dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
1025                         goto stop_clk;
1026                 }
1027         }
1028
1029         /* LCDC registers */
1030         info->fix.mmio_start = regs->start;
1031         info->fix.mmio_len = resource_size(regs);
1032
1033         if (!request_mem_region(info->fix.mmio_start,
1034                                 info->fix.mmio_len, pdev->name)) {
1035                 ret = -EBUSY;
1036                 goto free_fb;
1037         }
1038
1039         sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
1040         if (!sinfo->mmio) {
1041                 dev_err(dev, "cannot map LCDC registers\n");
1042                 ret = -ENOMEM;
1043                 goto release_mem;
1044         }
1045
1046         /* Initialize PWM for contrast or backlight ("off") */
1047         init_contrast(sinfo);
1048
1049         /* interrupt */
1050         ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
1051         if (ret) {
1052                 dev_err(dev, "request_irq failed: %d\n", ret);
1053                 goto unmap_mmio;
1054         }
1055
1056         /* Some operations on the LCDC might sleep and
1057          * require a preemptible task context */
1058         INIT_WORK(&sinfo->task, atmel_lcdfb_task);
1059
1060         ret = atmel_lcdfb_init_fbinfo(sinfo);
1061         if (ret < 0) {
1062                 dev_err(dev, "init fbinfo failed: %d\n", ret);
1063                 goto unregister_irqs;
1064         }
1065
1066         /*
1067          * This makes sure that our colour bitfield
1068          * descriptors are correctly initialised.
1069          */
1070         atmel_lcdfb_check_var(&info->var, info);
1071
1072         ret = fb_set_var(info, &info->var);
1073         if (ret) {
1074                 dev_warn(dev, "unable to set display parameters\n");
1075                 goto free_cmap;
1076         }
1077
1078         dev_set_drvdata(dev, info);
1079
1080         /*
1081          * Tell the world that we're ready to go
1082          */
1083         ret = register_framebuffer(info);
1084         if (ret < 0) {
1085                 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
1086                 goto reset_drvdata;
1087         }
1088
1089         /* add selected videomode to modelist */
1090         fb_var_to_videomode(&fbmode, &info->var);
1091         fb_add_videomode(&fbmode, &info->modelist);
1092
1093         /* Power up the LCDC screen */
1094         if (sinfo->atmel_lcdfb_power_control)
1095                 sinfo->atmel_lcdfb_power_control(1);
1096
1097         dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1098                        info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1099
1100         return 0;
1101
1102 reset_drvdata:
1103         dev_set_drvdata(dev, NULL);
1104 free_cmap:
1105         fb_dealloc_cmap(&info->cmap);
1106 unregister_irqs:
1107         cancel_work_sync(&sinfo->task);
1108         free_irq(sinfo->irq_base, info);
1109 unmap_mmio:
1110         exit_backlight(sinfo);
1111         iounmap(sinfo->mmio);
1112 release_mem:
1113         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1114 free_fb:
1115         if (map)
1116                 iounmap(info->screen_base);
1117         else
1118                 atmel_lcdfb_free_video_memory(sinfo);
1119
1120 release_intmem:
1121         if (map)
1122                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1123 stop_clk:
1124         atmel_lcdfb_stop_clock(sinfo);
1125         clk_put(sinfo->lcdc_clk);
1126 put_bus_clk:
1127         clk_put(sinfo->bus_clk);
1128 free_info:
1129         framebuffer_release(info);
1130 out:
1131         dev_dbg(dev, "%s FAILED\n", __func__);
1132         return ret;
1133 }
1134
1135 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1136 {
1137         struct device *dev = &pdev->dev;
1138         struct fb_info *info = dev_get_drvdata(dev);
1139         struct atmel_lcdfb_info *sinfo;
1140
1141         if (!info || !info->par)
1142                 return 0;
1143         sinfo = info->par;
1144
1145         cancel_work_sync(&sinfo->task);
1146         exit_backlight(sinfo);
1147         if (sinfo->atmel_lcdfb_power_control)
1148                 sinfo->atmel_lcdfb_power_control(0);
1149         unregister_framebuffer(info);
1150         atmel_lcdfb_stop_clock(sinfo);
1151         clk_put(sinfo->lcdc_clk);
1152         clk_put(sinfo->bus_clk);
1153         fb_dealloc_cmap(&info->cmap);
1154         free_irq(sinfo->irq_base, info);
1155         iounmap(sinfo->mmio);
1156         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1157         if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1158                 iounmap(info->screen_base);
1159                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1160         } else {
1161                 atmel_lcdfb_free_video_memory(sinfo);
1162         }
1163
1164         dev_set_drvdata(dev, NULL);
1165         framebuffer_release(info);
1166
1167         return 0;
1168 }
1169
1170 #ifdef CONFIG_PM
1171
1172 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1173 {
1174         struct fb_info *info = platform_get_drvdata(pdev);
1175         struct atmel_lcdfb_info *sinfo = info->par;
1176
1177         /*
1178          * We don't want to handle interrupts while the clock is
1179          * stopped. It may take forever.
1180          */
1181         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1182
1183         sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);
1184         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1185         if (sinfo->atmel_lcdfb_power_control)
1186                 sinfo->atmel_lcdfb_power_control(0);
1187
1188         atmel_lcdfb_stop(sinfo);
1189         atmel_lcdfb_stop_clock(sinfo);
1190
1191         return 0;
1192 }
1193
1194 static int atmel_lcdfb_resume(struct platform_device *pdev)
1195 {
1196         struct fb_info *info = platform_get_drvdata(pdev);
1197         struct atmel_lcdfb_info *sinfo = info->par;
1198
1199         atmel_lcdfb_start_clock(sinfo);
1200         atmel_lcdfb_start(sinfo);
1201         if (sinfo->atmel_lcdfb_power_control)
1202                 sinfo->atmel_lcdfb_power_control(1);
1203         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1204
1205         /* Enable FIFO & DMA errors */
1206         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1207                         | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1208
1209         return 0;
1210 }
1211
1212 #else
1213 #define atmel_lcdfb_suspend     NULL
1214 #define atmel_lcdfb_resume      NULL
1215 #endif
1216
1217 static struct platform_driver atmel_lcdfb_driver = {
1218         .remove         = __exit_p(atmel_lcdfb_remove),
1219         .suspend        = atmel_lcdfb_suspend,
1220         .resume         = atmel_lcdfb_resume,
1221         .id_table       = atmel_lcdfb_devtypes,
1222         .driver         = {
1223                 .name   = "atmel_lcdfb",
1224                 .owner  = THIS_MODULE,
1225         },
1226 };
1227
1228 module_platform_driver_probe(atmel_lcdfb_driver, atmel_lcdfb_probe);
1229
1230 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1231 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1232 MODULE_LICENSE("GPL");