drivers/video/fbdev/amba-clcd.c

   1 /*
   2  *  linux/drivers/video/amba-clcd.c
   3  *
   4  * Copyright (C) 2001 ARM Limited, by David A Rusling
   5  * Updated to 2.5, Deep Blue Solutions Ltd.
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file COPYING in the main directory of this archive
   9  * for more details.
  10  *
  11  *  ARM PrimeCell PL110 Color LCD Controller
  12  */
  13 #include <linux/dma-mapping.h>
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/errno.h>
  17 #include <linux/string.h>
  18 #include <linux/slab.h>
  19 #include <linux/delay.h>
  20 #include <linux/mm.h>
  21 #include <linux/fb.h>
  22 #include <linux/init.h>
  23 #include <linux/ioport.h>
  24 #include <linux/list.h>
  25 #include <linux/amba/bus.h>
  26 #include <linux/amba/clcd.h>
  27 #include <linux/bitops.h>
  28 #include <linux/clk.h>
  29 #include <linux/hardirq.h>
  30 #include <linux/of.h>
  31 #include <linux/of_address.h>
  32 #include <linux/of_graph.h>
  33 #include <video/display_timing.h>
  34 #include <video/of_display_timing.h>
  35 #include <video/videomode.h>
  36
  37 #define to_clcd(info)   container_of(info, struct clcd_fb, fb)
  38
  39 /* This is limited to 16 characters when displayed by X startup */
  40 static const char *clcd_name = "CLCD FB";
  41
  42 /*
  43  * Unfortunately, the enable/disable functions may be called either from
  44  * process or IRQ context, and we _need_ to delay.  This is _not_ good.
  45  */
  46 static inline void clcdfb_sleep(unsigned int ms)
  47 {
  48         if (in_atomic()) {
  49                 mdelay(ms);
  50         } else {
  51                 msleep(ms);
  52         }
  53 }
  54
  55 static inline void clcdfb_set_start(struct clcd_fb *fb)
  56 {
  57         unsigned long ustart = fb->fb.fix.smem_start;
  58         unsigned long lstart;
  59
  60         ustart += fb->fb.var.yoffset * fb->fb.fix.line_length;
  61         lstart = ustart + fb->fb.var.yres * fb->fb.fix.line_length / 2;
  62
  63         writel(ustart, fb->regs + CLCD_UBAS);
  64         writel(lstart, fb->regs + CLCD_LBAS);
  65 }
  66
  67 static void clcdfb_disable(struct clcd_fb *fb)
  68 {
  69         u32 val;
  70
  71         if (fb->board->disable)
  72                 fb->board->disable(fb);
  73
  74         val = readl(fb->regs + fb->off_cntl);
  75         if (val & CNTL_LCDPWR) {
  76                 val &= ~CNTL_LCDPWR;
  77                 writel(val, fb->regs + fb->off_cntl);
  78
  79                 clcdfb_sleep(20);
  80         }
  81         if (val & CNTL_LCDEN) {
  82                 val &= ~CNTL_LCDEN;
  83                 writel(val, fb->regs + fb->off_cntl);
  84         }
  85
  86         /*
  87          * Disable CLCD clock source.
  88          */
  89         if (fb->clk_enabled) {
  90                 fb->clk_enabled = false;
  91                 clk_disable(fb->clk);
  92         }
  93 }
  94
  95 static void clcdfb_enable(struct clcd_fb *fb, u32 cntl)
  96 {
  97         /*
  98          * Enable the CLCD clock source.
  99          */
 100         if (!fb->clk_enabled) {
 101                 fb->clk_enabled = true;
 102                 clk_enable(fb->clk);
 103         }
 104
 105         /*
 106          * Bring up by first enabling..
 107          */
 108         cntl |= CNTL_LCDEN;
 109         writel(cntl, fb->regs + fb->off_cntl);
 110
 111         clcdfb_sleep(20);
 112
 113         /*
 114          * and now apply power.
 115          */
 116         cntl |= CNTL_LCDPWR;
 117         writel(cntl, fb->regs + fb->off_cntl);
 118
 119         /*
 120          * finally, enable the interface.
 121          */
 122         if (fb->board->enable)
 123                 fb->board->enable(fb);
 124 }
 125
 126 static int
 127 clcdfb_set_bitfields(struct clcd_fb *fb, struct fb_var_screeninfo *var)
 128 {
 129         u32 caps;
 130         int ret = 0;
 131
 132         if (fb->panel->caps && fb->board->caps)
 133                 caps = fb->panel->caps & fb->board->caps;
 134         else {
 135                 /* Old way of specifying what can be used */
 136                 caps = fb->panel->cntl & CNTL_BGR ?
 137                         CLCD_CAP_BGR : CLCD_CAP_RGB;
 138                 /* But mask out 444 modes as they weren't supported */
 139                 caps &= ~CLCD_CAP_444;
 140         }
 141
 142         /* Only TFT panels can do RGB888/BGR888 */
 143         if (!(fb->panel->cntl & CNTL_LCDTFT))
 144                 caps &= ~CLCD_CAP_888;
 145
 146         memset(&var->transp, 0, sizeof(var->transp));
 147
 148         var->red.msb_right = 0;
 149         var->green.msb_right = 0;
 150         var->blue.msb_right = 0;
 151
 152         switch (var->bits_per_pixel) {
 153         case 1:
 154         case 2:
 155         case 4:
 156         case 8:
 157                 /* If we can't do 5551, reject */
 158                 caps &= CLCD_CAP_5551;
 159                 if (!caps) {
 160                         ret = -EINVAL;
 161                         break;
 162                 }
 163
 164                 var->red.length         = var->bits_per_pixel;
 165                 var->red.offset         = 0;
 166                 var->green.length       = var->bits_per_pixel;
 167                 var->green.offset       = 0;
 168                 var->blue.length        = var->bits_per_pixel;
 169                 var->blue.offset        = 0;
 170                 break;
 171
 172         case 16:
 173                 /* If we can't do 444, 5551 or 565, reject */
 174                 if (!(caps & (CLCD_CAP_444 | CLCD_CAP_5551 | CLCD_CAP_565))) {
 175                         ret = -EINVAL;
 176                         break;
 177                 }
 178
 179                 /*
 180                  * Green length can be 4, 5 or 6 depending whether
 181                  * we're operating in 444, 5551 or 565 mode.
 182                  */
 183                 if (var->green.length == 4 && caps & CLCD_CAP_444)
 184                         caps &= CLCD_CAP_444;
 185                 if (var->green.length == 5 && caps & CLCD_CAP_5551)
 186                         caps &= CLCD_CAP_5551;
 187                 else if (var->green.length == 6 && caps & CLCD_CAP_565)
 188                         caps &= CLCD_CAP_565;
 189                 else {
 190                         /*
 191                          * PL110 officially only supports RGB555,
 192                          * but may be wired up to allow RGB565.
 193                          */
 194                         if (caps & CLCD_CAP_565) {
 195                                 var->green.length = 6;
 196                                 caps &= CLCD_CAP_565;
 197                         } else if (caps & CLCD_CAP_5551) {
 198                                 var->green.length = 5;
 199                                 caps &= CLCD_CAP_5551;
 200                         } else {
 201                                 var->green.length = 4;
 202                                 caps &= CLCD_CAP_444;
 203                         }
 204                 }
 205
 206                 if (var->green.length >= 5) {
 207                         var->red.length = 5;
 208                         var->blue.length = 5;
 209                 } else {
 210                         var->red.length = 4;
 211                         var->blue.length = 4;
 212                 }
 213                 break;
 214         case 32:
 215                 /* If we can't do 888, reject */
 216                 caps &= CLCD_CAP_888;
 217                 if (!caps) {
 218                         ret = -EINVAL;
 219                         break;
 220                 }
 221
 222                 var->red.length = 8;
 223                 var->green.length = 8;
 224                 var->blue.length = 8;
 225                 break;
 226         default:
 227                 ret = -EINVAL;
 228                 break;
 229         }
 230
 231         /*
 232          * >= 16bpp displays have separate colour component bitfields
 233          * encoded in the pixel data.  Calculate their position from
 234          * the bitfield length defined above.
 235          */
 236         if (ret == 0 && var->bits_per_pixel >= 16) {
 237                 bool bgr, rgb;
 238
 239                 bgr = caps & CLCD_CAP_BGR && var->blue.offset == 0;
 240                 rgb = caps & CLCD_CAP_RGB && var->red.offset == 0;
 241
 242                 if (!bgr && !rgb)
 243                         /*
 244                          * The requested format was not possible, try just
 245                          * our capabilities.  One of BGR or RGB must be
 246                          * supported.
 247                          */
 248                         bgr = caps & CLCD_CAP_BGR;
 249
 250                 if (bgr) {
 251                         var->blue.offset = 0;
 252                         var->green.offset = var->blue.offset + var->blue.length;
 253                         var->red.offset = var->green.offset + var->green.length;
 254                 } else {
 255                         var->red.offset = 0;
 256                         var->green.offset = var->red.offset + var->red.length;
 257                         var->blue.offset = var->green.offset + var->green.length;
 258                 }
 259         }
 260
 261         return ret;
 262 }
 263
 264 static int clcdfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
 265 {
 266         struct clcd_fb *fb = to_clcd(info);
 267         int ret = -EINVAL;
 268
 269         if (fb->board->check)
 270                 ret = fb->board->check(fb, var);
 271
 272         if (ret == 0 &&
 273             var->xres_virtual * var->bits_per_pixel / 8 *
 274             var->yres_virtual > fb->fb.fix.smem_len)
 275                 ret = -EINVAL;
 276
 277         if (ret == 0)
 278                 ret = clcdfb_set_bitfields(fb, var);
 279
 280         return ret;
 281 }
 282
 283 static int clcdfb_set_par(struct fb_info *info)
 284 {
 285         struct clcd_fb *fb = to_clcd(info);
 286         struct clcd_regs regs;
 287
 288         fb->fb.fix.line_length = fb->fb.var.xres_virtual *
 289                                  fb->fb.var.bits_per_pixel / 8;
 290
 291         if (fb->fb.var.bits_per_pixel <= 8)
 292                 fb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
 293         else
 294                 fb->fb.fix.visual = FB_VISUAL_TRUECOLOR;
 295
 296         fb->board->decode(fb, &regs);
 297
 298         clcdfb_disable(fb);
 299
 300         writel(regs.tim0, fb->regs + CLCD_TIM0);
 301         writel(regs.tim1, fb->regs + CLCD_TIM1);
 302         writel(regs.tim2, fb->regs + CLCD_TIM2);
 303         writel(regs.tim3, fb->regs + CLCD_TIM3);
 304
 305         clcdfb_set_start(fb);
 306
 307         clk_set_rate(fb->clk, (1000000000 / regs.pixclock) * 1000);
 308
 309         fb->clcd_cntl = regs.cntl;
 310
 311         clcdfb_enable(fb, regs.cntl);
 312
 313 #ifdef DEBUG
 314         printk(KERN_INFO
 315                "CLCD: Registers set to\n"
 316                "  %08x %08x %08x %08x\n"
 317                "  %08x %08x %08x %08x\n",
 318                 readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1),
 319                 readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3),
 320                 readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS),
 321                 readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl));
 322 #endif
 323
 324         return 0;
 325 }
 326
 327 static inline u32 convert_bitfield(int val, struct fb_bitfield *bf)
 328 {
 329         unsigned int mask = (1 << bf->length) - 1;
 330
 331         return (val >> (16 - bf->length) & mask) << bf->offset;
 332 }
 333
 334 /*
 335  *  Set a single color register. The values supplied have a 16 bit
 336  *  magnitude.  Return != 0 for invalid regno.
 337  */
 338 static int
 339 clcdfb_setcolreg(unsigned int regno, unsigned int red, unsigned int green,
 340                  unsigned int blue, unsigned int transp, struct fb_info *info)
 341 {
 342         struct clcd_fb *fb = to_clcd(info);
 343
 344         if (regno < 16)
 345                 fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) |
 346                                   convert_bitfield(blue, &fb->fb.var.blue) |
 347                                   convert_bitfield(green, &fb->fb.var.green) |
 348                                   convert_bitfield(red, &fb->fb.var.red);
 349
 350         if (fb->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR && regno < 256) {
 351                 int hw_reg = CLCD_PALETTE + ((regno * 2) & ~3);
 352                 u32 val, mask, newval;
 353
 354                 newval  = (red >> 11)  & 0x001f;
 355                 newval |= (green >> 6) & 0x03e0;
 356                 newval |= (blue >> 1)  & 0x7c00;
 357
 358                 /*
 359                  * 3.2.11: if we're configured for big endian
 360                  * byte order, the palette entries are swapped.
 361                  */
 362                 if (fb->clcd_cntl & CNTL_BEBO)
 363                         regno ^= 1;
 364
 365                 if (regno & 1) {
 366                         newval <<= 16;
 367                         mask = 0x0000ffff;
 368                 } else {
 369                         mask = 0xffff0000;
 370                 }
 371
 372                 val = readl(fb->regs + hw_reg) & mask;
 373                 writel(val | newval, fb->regs + hw_reg);
 374         }
 375
 376         return regno > 255;
 377 }
 378
 379 /*
 380  *  Blank the screen if blank_mode != 0, else unblank. If blank == NULL
 381  *  then the caller blanks by setting the CLUT (Color Look Up Table) to all
 382  *  black. Return 0 if blanking succeeded, != 0 if un-/blanking failed due
 383  *  to e.g. a video mode which doesn't support it. Implements VESA suspend
 384  *  and powerdown modes on hardware that supports disabling hsync/vsync:
 385  *    blank_mode == 2: suspend vsync
 386  *    blank_mode == 3: suspend hsync
 387  *    blank_mode == 4: powerdown
 388  */
 389 static int clcdfb_blank(int blank_mode, struct fb_info *info)
 390 {
 391         struct clcd_fb *fb = to_clcd(info);
 392
 393         if (blank_mode != 0) {
 394                 clcdfb_disable(fb);
 395         } else {
 396                 clcdfb_enable(fb, fb->clcd_cntl);
 397         }
 398         return 0;
 399 }
 400
 401 static int clcdfb_mmap(struct fb_info *info,
 402                        struct vm_area_struct *vma)
 403 {
 404         struct clcd_fb *fb = to_clcd(info);
 405         unsigned long len, off = vma->vm_pgoff << PAGE_SHIFT;
 406         int ret = -EINVAL;
 407
 408         len = info->fix.smem_len;
 409
 410         if (off <= len && vma->vm_end - vma->vm_start <= len - off &&
 411             fb->board->mmap)
 412                 ret = fb->board->mmap(fb, vma);
 413
 414         return ret;
 415 }
 416
 417 static struct fb_ops clcdfb_ops = {
 418         .owner          = THIS_MODULE,
 419         .fb_check_var   = clcdfb_check_var,
 420         .fb_set_par     = clcdfb_set_par,
 421         .fb_setcolreg   = clcdfb_setcolreg,
 422         .fb_blank       = clcdfb_blank,
 423         .fb_fillrect    = cfb_fillrect,
 424         .fb_copyarea    = cfb_copyarea,
 425         .fb_imageblit   = cfb_imageblit,
 426         .fb_mmap        = clcdfb_mmap,
 427 };
 428
 429 static int clcdfb_register(struct clcd_fb *fb)
 430 {
 431         int ret;
 432
 433         /*
 434          * ARM PL111 always has IENB at 0x1c; it's only PL110
 435          * which is reversed on some platforms.
 436          */
 437         if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) {
 438                 fb->off_ienb = CLCD_PL111_IENB;
 439                 fb->off_cntl = CLCD_PL111_CNTL;
 440         } else {
 441                 if (of_machine_is_compatible("arm,versatile-ab") ||
 442                     of_machine_is_compatible("arm,versatile-pb")) {
 443                         fb->off_ienb = CLCD_PL111_IENB;
 444                         fb->off_cntl = CLCD_PL111_CNTL;
 445                 } else {
 446                         fb->off_ienb = CLCD_PL110_IENB;
 447                         fb->off_cntl = CLCD_PL110_CNTL;
 448                 }
 449         }
 450
 451         fb->clk = clk_get(&fb->dev->dev, NULL);
 452         if (IS_ERR(fb->clk)) {
 453                 ret = PTR_ERR(fb->clk);
 454                 goto out;
 455         }
 456
 457         ret = clk_prepare(fb->clk);
 458         if (ret)
 459                 goto free_clk;
 460
 461         fb->fb.device           = &fb->dev->dev;
 462
 463         fb->fb.fix.mmio_start   = fb->dev->res.start;
 464         fb->fb.fix.mmio_len     = resource_size(&fb->dev->res);
 465
 466         fb->regs = ioremap(fb->fb.fix.mmio_start, fb->fb.fix.mmio_len);
 467         if (!fb->regs) {
 468                 printk(KERN_ERR "CLCD: unable to remap registers\n");
 469                 ret = -ENOMEM;
 470                 goto clk_unprep;
 471         }
 472
 473         fb->fb.fbops            = &clcdfb_ops;
 474         fb->fb.flags            = FBINFO_FLAG_DEFAULT;
 475         fb->fb.pseudo_palette   = fb->cmap;
 476
 477         strncpy(fb->fb.fix.id, clcd_name, sizeof(fb->fb.fix.id));
 478         fb->fb.fix.type         = FB_TYPE_PACKED_PIXELS;
 479         fb->fb.fix.type_aux     = 0;
 480         fb->fb.fix.xpanstep     = 0;
 481         fb->fb.fix.ypanstep     = 0;
 482         fb->fb.fix.ywrapstep    = 0;
 483         fb->fb.fix.accel        = FB_ACCEL_NONE;
 484
 485         fb->fb.var.xres         = fb->panel->mode.xres;
 486         fb->fb.var.yres         = fb->panel->mode.yres;
 487         fb->fb.var.xres_virtual = fb->panel->mode.xres;
 488         fb->fb.var.yres_virtual = fb->panel->mode.yres;
 489         fb->fb.var.bits_per_pixel = fb->panel->bpp;
 490         fb->fb.var.grayscale    = fb->panel->grayscale;
 491         fb->fb.var.pixclock     = fb->panel->mode.pixclock;
 492         fb->fb.var.left_margin  = fb->panel->mode.left_margin;
 493         fb->fb.var.right_margin = fb->panel->mode.right_margin;
 494         fb->fb.var.upper_margin = fb->panel->mode.upper_margin;
 495         fb->fb.var.lower_margin = fb->panel->mode.lower_margin;
 496         fb->fb.var.hsync_len    = fb->panel->mode.hsync_len;
 497         fb->fb.var.vsync_len    = fb->panel->mode.vsync_len;
 498         fb->fb.var.sync         = fb->panel->mode.sync;
 499         fb->fb.var.vmode        = fb->panel->mode.vmode;
 500         fb->fb.var.activate     = FB_ACTIVATE_NOW;
 501         fb->fb.var.nonstd       = 0;
 502         fb->fb.var.height       = fb->panel->height;
 503         fb->fb.var.width        = fb->panel->width;
 504         fb->fb.var.accel_flags  = 0;
 505
 506         fb->fb.monspecs.hfmin   = 0;
 507         fb->fb.monspecs.hfmax   = 100000;
 508         fb->fb.monspecs.vfmin   = 0;
 509         fb->fb.monspecs.vfmax   = 400;
 510         fb->fb.monspecs.dclkmin = 1000000;
 511         fb->fb.monspecs.dclkmax = 100000000;
 512
 513         /*
 514          * Make sure that the bitfields are set appropriately.
 515          */
 516         clcdfb_set_bitfields(fb, &fb->fb.var);
 517
 518         /*
 519          * Allocate colourmap.
 520          */
 521         ret = fb_alloc_cmap(&fb->fb.cmap, 256, 0);
 522         if (ret)
 523                 goto unmap;
 524
 525         /*
 526          * Ensure interrupts are disabled.
 527          */
 528         writel(0, fb->regs + fb->off_ienb);
 529
 530         fb_set_var(&fb->fb, &fb->fb.var);
 531
 532         dev_info(&fb->dev->dev, "%s hardware, %s display\n",
 533                  fb->board->name, fb->panel->mode.name);
 534
 535         ret = register_framebuffer(&fb->fb);
 536         if (ret == 0)
 537                 goto out;
 538
 539         printk(KERN_ERR "CLCD: cannot register framebuffer (%d)\n", ret);
 540
 541         fb_dealloc_cmap(&fb->fb.cmap);
 542  unmap:
 543         iounmap(fb->regs);
 544  clk_unprep:
 545         clk_unprepare(fb->clk);
 546  free_clk:
 547         clk_put(fb->clk);
 548  out:
 549         return ret;
 550 }
 551
 552 #ifdef CONFIG_OF
 553 static int clcdfb_of_get_dpi_panel_mode(struct device_node *node,
 554                 struct fb_videomode *mode)
 555 {
 556         int err;
 557         struct display_timing timing;
 558         struct videomode video;
 559
 560         err = of_get_display_timing(node, "panel-timing", &timing);
 561         if (err)
 562                 return err;
 563
 564         videomode_from_timing(&timing, &video);
 565
 566         err = fb_videomode_from_videomode(&video, mode);
 567         if (err)
 568                 return err;
 569
 570         return 0;
 571 }
 572
 573 static int clcdfb_snprintf_mode(char *buf, int size, struct fb_videomode *mode)
 574 {
 575         return snprintf(buf, size, "%ux%u@%u", mode->xres, mode->yres,
 576                         mode->refresh);
 577 }
 578
 579 static int clcdfb_of_get_mode(struct device *dev, struct device_node *endpoint,
 580                 struct fb_videomode *mode)
 581 {
 582         int err;
 583         struct device_node *panel;
 584         char *name;
 585         int len;
 586
 587         panel = of_graph_get_remote_port_parent(endpoint);
 588         if (!panel)
 589                 return -ENODEV;
 590
 591         /* Only directly connected DPI panels supported for now */
 592         if (of_device_is_compatible(panel, "panel-dpi"))
 593                 err = clcdfb_of_get_dpi_panel_mode(panel, mode);
 594         else
 595                 err = -ENOENT;
 596         if (err)
 597                 return err;
 598
 599         len = clcdfb_snprintf_mode(NULL, 0, mode);
 600         name = devm_kzalloc(dev, len + 1, GFP_KERNEL);
 601         if (!name)
 602                 return -ENOMEM;
 603
 604         clcdfb_snprintf_mode(name, len + 1, mode);
 605         mode->name = name;
 606
 607         return 0;
 608 }
 609
 610 static int clcdfb_of_init_tft_panel(struct clcd_fb *fb, u32 r0, u32 g0, u32 b0)
 611 {
 612         static struct {
 613                 unsigned int part;
 614                 u32 r0, g0, b0;
 615                 u32 caps;
 616         } panels[] = {
 617                 { 0x110, 1,  7, 13, CLCD_CAP_5551 },
 618                 { 0x110, 0,  8, 16, CLCD_CAP_888 },
 619                 { 0x111, 4, 14, 20, CLCD_CAP_444 },
 620                 { 0x111, 3, 11, 19, CLCD_CAP_444 | CLCD_CAP_5551 },
 621                 { 0x111, 3, 10, 19, CLCD_CAP_444 | CLCD_CAP_5551 |
 622                                     CLCD_CAP_565 },
 623                 { 0x111, 0,  8, 16, CLCD_CAP_444 | CLCD_CAP_5551 |
 624                                     CLCD_CAP_565 | CLCD_CAP_888 },
 625         };
 626         int i;
 627
 628         /* Bypass pixel clock divider, data output on the falling edge */
 629         fb->panel->tim2 = TIM2_BCD | TIM2_IPC;
 630
 631         /* TFT display, vert. comp. interrupt at the start of the back porch */
 632         fb->panel->cntl |= CNTL_LCDTFT | CNTL_LCDVCOMP(1);
 633
 634         fb->panel->caps = 0;
 635
 636         /* Match the setup with known variants */
 637         for (i = 0; i < ARRAY_SIZE(panels) && !fb->panel->caps; i++) {
 638                 if (amba_part(fb->dev) != panels[i].part)
 639                         continue;
 640                 if (g0 != panels[i].g0)
 641                         continue;
 642                 if (r0 == panels[i].r0 && b0 == panels[i].b0)
 643                         fb->panel->caps = panels[i].caps;
 644         }
 645
 646         return fb->panel->caps ? 0 : -EINVAL;
 647 }
 648
 649 static int clcdfb_of_init_display(struct clcd_fb *fb)
 650 {
 651         struct device_node *endpoint;
 652         int err;
 653         unsigned int bpp;
 654         u32 max_bandwidth;
 655         u32 tft_r0b0g0[3];
 656
 657         fb->panel = devm_kzalloc(&fb->dev->dev, sizeof(*fb->panel), GFP_KERNEL);
 658         if (!fb->panel)
 659                 return -ENOMEM;
 660
 661         endpoint = of_graph_get_next_endpoint(fb->dev->dev.of_node, NULL);
 662         if (!endpoint)
 663                 return -ENODEV;
 664
 665         err = clcdfb_of_get_mode(&fb->dev->dev, endpoint, &fb->panel->mode);
 666         if (err)
 667                 return err;
 668
 669         err = of_property_read_u32(fb->dev->dev.of_node, "max-memory-bandwidth",
 670                         &max_bandwidth);
 671         if (!err) {
 672                 /*
 673                  * max_bandwidth is in bytes per second and pixclock in
 674                  * pico-seconds, so the maximum allowed bits per pixel is
 675                  *   8 * max_bandwidth / (PICOS2KHZ(pixclock) * 1000)
 676                  * Rearrange this calculation to avoid overflow and then ensure
 677                  * result is a valid format.
 678                  */
 679                 bpp = max_bandwidth / (1000 / 8)
 680                         / PICOS2KHZ(fb->panel->mode.pixclock);
 681                 bpp = rounddown_pow_of_two(bpp);
 682                 if (bpp > 32)
 683                         bpp = 32;
 684         } else
 685                 bpp = 32;
 686         fb->panel->bpp = bpp;
 687
 688 #ifdef CONFIG_CPU_BIG_ENDIAN
 689         fb->panel->cntl |= CNTL_BEBO;
 690 #endif
 691         fb->panel->width = -1;
 692         fb->panel->height = -1;
 693
 694         if (of_property_read_u32_array(endpoint,
 695                         "arm,pl11x,tft-r0g0b0-pads",
 696                         tft_r0b0g0, ARRAY_SIZE(tft_r0b0g0)) == 0)
 697                 return clcdfb_of_init_tft_panel(fb, tft_r0b0g0[0],
 698                                  tft_r0b0g0[1],  tft_r0b0g0[2]);
 699
 700         return -ENOENT;
 701 }
 702
 703 static int clcdfb_of_vram_setup(struct clcd_fb *fb)
 704 {
 705         int err;
 706         struct device_node *memory;
 707         u64 size;
 708
 709         err = clcdfb_of_init_display(fb);
 710         if (err)
 711                 return err;
 712
 713         memory = of_parse_phandle(fb->dev->dev.of_node, "memory-region", 0);
 714         if (!memory)
 715                 return -ENODEV;
 716
 717         fb->fb.screen_base = of_iomap(memory, 0);
 718         if (!fb->fb.screen_base)
 719                 return -ENOMEM;
 720
 721         fb->fb.fix.smem_start = of_translate_address(memory,
 722                         of_get_address(memory, 0, &size, NULL));
 723         fb->fb.fix.smem_len = size;
 724
 725         return 0;
 726 }
 727
 728 static int clcdfb_of_vram_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
 729 {
 730         unsigned long off, user_size, kernel_size;
 731
 732
 733         off = vma->vm_pgoff << PAGE_SHIFT;
 734         user_size = vma->vm_end - vma->vm_start;
 735         kernel_size = fb->fb.fix.smem_len;
 736
 737         if (off >= kernel_size || user_size > (kernel_size - off))
 738                 return -ENXIO;
 739
 740         return remap_pfn_range(vma, vma->vm_start,
 741                         __phys_to_pfn(fb->fb.fix.smem_start) + vma->vm_pgoff,
 742                         user_size,
 743                         pgprot_writecombine(vma->vm_page_prot));
 744 }
 745
 746 static void clcdfb_of_vram_remove(struct clcd_fb *fb)
 747 {
 748         iounmap(fb->fb.screen_base);
 749 }
 750
 751 static int clcdfb_of_dma_setup(struct clcd_fb *fb)
 752 {
 753         unsigned long framesize;
 754         dma_addr_t dma;
 755         int err;
 756
 757         err = clcdfb_of_init_display(fb);
 758         if (err)
 759                 return err;
 760
 761         framesize = fb->panel->mode.xres * fb->panel->mode.yres *
 762                         fb->panel->bpp / 8;
 763         fb->fb.screen_base = dma_alloc_coherent(&fb->dev->dev, framesize,
 764                         &dma, GFP_KERNEL);
 765         if (!fb->fb.screen_base)
 766                 return -ENOMEM;
 767
 768         fb->fb.fix.smem_start = dma;
 769         fb->fb.fix.smem_len = framesize;
 770
 771         return 0;
 772 }
 773
 774 static int clcdfb_of_dma_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
 775 {
 776         return dma_mmap_wc(&fb->dev->dev, vma, fb->fb.screen_base,
 777                            fb->fb.fix.smem_start, fb->fb.fix.smem_len);
 778 }
 779
 780 static void clcdfb_of_dma_remove(struct clcd_fb *fb)
 781 {
 782         dma_free_coherent(&fb->dev->dev, fb->fb.fix.smem_len,
 783                         fb->fb.screen_base, fb->fb.fix.smem_start);
 784 }
 785
 786 static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
 787 {
 788         struct clcd_board *board = devm_kzalloc(&dev->dev, sizeof(*board),
 789                         GFP_KERNEL);
 790         struct device_node *node = dev->dev.of_node;
 791
 792         if (!board)
 793                 return NULL;
 794
 795         board->name = of_node_full_name(node);
 796         board->caps = CLCD_CAP_ALL;
 797         board->check = clcdfb_check;
 798         board->decode = clcdfb_decode;
 799         if (of_find_property(node, "memory-region", NULL)) {
 800                 board->setup = clcdfb_of_vram_setup;
 801                 board->mmap = clcdfb_of_vram_mmap;
 802                 board->remove = clcdfb_of_vram_remove;
 803         } else {
 804                 board->setup = clcdfb_of_dma_setup;
 805                 board->mmap = clcdfb_of_dma_mmap;
 806                 board->remove = clcdfb_of_dma_remove;
 807         }
 808
 809         return board;
 810 }
 811 #else
 812 static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
 813 {
 814         return NULL;
 815 }
 816 #endif
 817
 818 static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id)
 819 {
 820         struct clcd_board *board = dev_get_platdata(&dev->dev);
 821         struct clcd_fb *fb;
 822         int ret;
 823
 824         if (!board)
 825                 board = clcdfb_of_get_board(dev);
 826
 827         if (!board)
 828                 return -EINVAL;
 829
 830         ret = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
 831         if (ret)
 832                 goto out;
 833
 834         ret = amba_request_regions(dev, NULL);
 835         if (ret) {
 836                 printk(KERN_ERR "CLCD: unable to reserve regs region\n");
 837                 goto out;
 838         }
 839
 840         fb = kzalloc(sizeof(struct clcd_fb), GFP_KERNEL);
 841         if (!fb) {
 842                 printk(KERN_INFO "CLCD: could not allocate new clcd_fb struct\n");
 843                 ret = -ENOMEM;
 844                 goto free_region;
 845         }
 846
 847         fb->dev = dev;
 848         fb->board = board;
 849
 850         dev_info(&fb->dev->dev, "PL%03x rev%u at 0x%08llx\n",
 851                 amba_part(dev), amba_rev(dev),
 852                 (unsigned long long)dev->res.start);
 853
 854         ret = fb->board->setup(fb);
 855         if (ret)
 856                 goto free_fb;
 857
 858         ret = clcdfb_register(fb);
 859         if (ret == 0) {
 860                 amba_set_drvdata(dev, fb);
 861                 goto out;
 862         }
 863
 864         fb->board->remove(fb);
 865  free_fb:
 866         kfree(fb);
 867  free_region:
 868         amba_release_regions(dev);
 869  out:
 870         return ret;
 871 }
 872
 873 static int clcdfb_remove(struct amba_device *dev)
 874 {
 875         struct clcd_fb *fb = amba_get_drvdata(dev);
 876
 877         clcdfb_disable(fb);
 878         unregister_framebuffer(&fb->fb);
 879         if (fb->fb.cmap.len)
 880                 fb_dealloc_cmap(&fb->fb.cmap);
 881         iounmap(fb->regs);
 882         clk_unprepare(fb->clk);
 883         clk_put(fb->clk);
 884
 885         fb->board->remove(fb);
 886
 887         kfree(fb);
 888
 889         amba_release_regions(dev);
 890
 891         return 0;
 892 }
 893
 894 static struct amba_id clcdfb_id_table[] = {
 895         {
 896                 .id     = 0x00041110,
 897                 .mask   = 0x000ffffe,
 898         },
 899         { 0, 0 },
 900 };
 901
 902 MODULE_DEVICE_TABLE(amba, clcdfb_id_table);
 903
 904 static struct amba_driver clcd_driver = {
 905         .drv            = {
 906                 .name   = "clcd-pl11x",
 907         },
 908         .probe          = clcdfb_probe,
 909         .remove         = clcdfb_remove,
 910         .id_table       = clcdfb_id_table,
 911 };
 912
 913 static int __init amba_clcdfb_init(void)
 914 {
 915         if (fb_get_options("ambafb", NULL))
 916                 return -ENODEV;
 917
 918         return amba_driver_register(&clcd_driver);
 919 }
 920
 921 module_init(amba_clcdfb_init);
 922
 923 static void __exit amba_clcdfb_exit(void)
 924 {
 925         amba_driver_unregister(&clcd_driver);
 926 }
 927
 928 module_exit(amba_clcdfb_exit);
 929
 930 MODULE_DESCRIPTION("ARM PrimeCell PL110 CLCD core driver");
 931 MODULE_LICENSE("GPL");