drivers/video/mxsfb.c

   1 /*
   2  * Copyright (C) 2010 Juergen Beisert, Pengutronix
   3  *
   4  * This code is based on:
   5  * Author: Vitaly Wool <vital@embeddedalley.com>
   6  *
   7  * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
   8  * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * as published by the Free Software Foundation; either version 2
  13  * of the License, or (at your option) any later version.
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  */
  19
  20 #define DRIVER_NAME "mxsfb"
  21
  22 /**
  23  * @file
  24  * @brief LCDIF driver for i.MX23 and i.MX28
  25  *
  26  * The LCDIF support four modes of operation
  27  * - MPU interface (to drive smart displays) -> not supported yet
  28  * - VSYNC interface (like MPU interface plus Vsync) -> not supported yet
  29  * - Dotclock interface (to drive LC displays with RGB data and sync signals)
  30  * - DVI (to drive ITU-R BT656)  -> not supported yet
  31  *
  32  * This driver depends on a correct setup of the pins used for this purpose
  33  * (platform specific).
  34  *
  35  * For the developer: Don't forget to set the data bus width to the display
  36  * in the imx_fb_videomode structure. You will else end up with ugly colours.
  37  * If you fight against jitter you can vary the clock delay. This is a feature
  38  * of the i.MX28 and you can vary it between 2 ns ... 8 ns in 2 ns steps. Give
  39  * the required value in the imx_fb_videomode structure.
  40  */
  41
  42 #include <linux/module.h>
  43 #include <linux/kernel.h>
  44 #include <linux/of_device.h>
  45 #include <linux/of_gpio.h>
  46 #include <linux/platform_device.h>
  47 #include <linux/clk.h>
  48 #include <linux/dma-mapping.h>
  49 #include <linux/io.h>
  50 #include <linux/pinctrl/consumer.h>
  51 #include <linux/mxsfb.h>
  52
  53 #define REG_SET 4
  54 #define REG_CLR 8
  55
  56 #define LCDC_CTRL                       0x00
  57 #define LCDC_CTRL1                      0x10
  58 #define LCDC_V4_CTRL2                   0x20
  59 #define LCDC_V3_TRANSFER_COUNT          0x20
  60 #define LCDC_V4_TRANSFER_COUNT          0x30
  61 #define LCDC_V4_CUR_BUF                 0x40
  62 #define LCDC_V4_NEXT_BUF                0x50
  63 #define LCDC_V3_CUR_BUF                 0x30
  64 #define LCDC_V3_NEXT_BUF                0x40
  65 #define LCDC_TIMING                     0x60
  66 #define LCDC_VDCTRL0                    0x70
  67 #define LCDC_VDCTRL1                    0x80
  68 #define LCDC_VDCTRL2                    0x90
  69 #define LCDC_VDCTRL3                    0xa0
  70 #define LCDC_VDCTRL4                    0xb0
  71 #define LCDC_DVICTRL0                   0xc0
  72 #define LCDC_DVICTRL1                   0xd0
  73 #define LCDC_DVICTRL2                   0xe0
  74 #define LCDC_DVICTRL3                   0xf0
  75 #define LCDC_DVICTRL4                   0x100
  76 #define LCDC_V4_DATA                    0x180
  77 #define LCDC_V3_DATA                    0x1b0
  78 #define LCDC_V4_DEBUG0                  0x1d0
  79 #define LCDC_V3_DEBUG0                  0x1f0
  80
  81 #define CTRL_SFTRST                     (1 << 31)
  82 #define CTRL_CLKGATE                    (1 << 30)
  83 #define CTRL_BYPASS_COUNT               (1 << 19)
  84 #define CTRL_VSYNC_MODE                 (1 << 18)
  85 #define CTRL_DOTCLK_MODE                (1 << 17)
  86 #define CTRL_DATA_SELECT                (1 << 16)
  87 #define CTRL_SET_BUS_WIDTH(x)           (((x) & 0x3) << 10)
  88 #define CTRL_GET_BUS_WIDTH(x)           (((x) >> 10) & 0x3)
  89 #define CTRL_SET_WORD_LENGTH(x)         (((x) & 0x3) << 8)
  90 #define CTRL_GET_WORD_LENGTH(x)         (((x) >> 8) & 0x3)
  91 #define CTRL_MASTER                     (1 << 5)
  92 #define CTRL_DF16                       (1 << 3)
  93 #define CTRL_DF18                       (1 << 2)
  94 #define CTRL_DF24                       (1 << 1)
  95 #define CTRL_RUN                        (1 << 0)
  96
  97 #define CTRL1_FIFO_CLEAR                (1 << 21)
  98 #define CTRL1_SET_BYTE_PACKAGING(x)     (((x) & 0xf) << 16)
  99 #define CTRL1_GET_BYTE_PACKAGING(x)     (((x) >> 16) & 0xf)
 100
 101 #define TRANSFER_COUNT_SET_VCOUNT(x)    (((x) & 0xffff) << 16)
 102 #define TRANSFER_COUNT_GET_VCOUNT(x)    (((x) >> 16) & 0xffff)
 103 #define TRANSFER_COUNT_SET_HCOUNT(x)    ((x) & 0xffff)
 104 #define TRANSFER_COUNT_GET_HCOUNT(x)    ((x) & 0xffff)
 105
 106
 107 #define VDCTRL0_ENABLE_PRESENT          (1 << 28)
 108 #define VDCTRL0_VSYNC_ACT_HIGH          (1 << 27)
 109 #define VDCTRL0_HSYNC_ACT_HIGH          (1 << 26)
 110 #define VDCTRL0_DOTCLK_ACT_FAILING      (1 << 25)
 111 #define VDCTRL0_ENABLE_ACT_HIGH         (1 << 24)
 112 #define VDCTRL0_VSYNC_PERIOD_UNIT       (1 << 21)
 113 #define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT  (1 << 20)
 114 #define VDCTRL0_HALF_LINE               (1 << 19)
 115 #define VDCTRL0_HALF_LINE_MODE          (1 << 18)
 116 #define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
 117 #define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
 118
 119 #define VDCTRL2_SET_HSYNC_PERIOD(x)     ((x) & 0x3ffff)
 120 #define VDCTRL2_GET_HSYNC_PERIOD(x)     ((x) & 0x3ffff)
 121
 122 #define VDCTRL3_MUX_SYNC_SIGNALS        (1 << 29)
 123 #define VDCTRL3_VSYNC_ONLY              (1 << 28)
 124 #define SET_HOR_WAIT_CNT(x)             (((x) & 0xfff) << 16)
 125 #define GET_HOR_WAIT_CNT(x)             (((x) >> 16) & 0xfff)
 126 #define SET_VERT_WAIT_CNT(x)            ((x) & 0xffff)
 127 #define GET_VERT_WAIT_CNT(x)            ((x) & 0xffff)
 128
 129 #define VDCTRL4_SET_DOTCLK_DLY(x)       (((x) & 0x7) << 29) /* v4 only */
 130 #define VDCTRL4_GET_DOTCLK_DLY(x)       (((x) >> 29) & 0x7) /* v4 only */
 131 #define VDCTRL4_SYNC_SIGNALS_ON         (1 << 18)
 132 #define SET_DOTCLK_H_VALID_DATA_CNT(x)  ((x) & 0x3ffff)
 133
 134 #define DEBUG0_HSYNC                    (1 < 26)
 135 #define DEBUG0_VSYNC                    (1 < 25)
 136
 137 #define MIN_XRES                        120
 138 #define MIN_YRES                        120
 139
 140 #define RED 0
 141 #define GREEN 1
 142 #define BLUE 2
 143 #define TRANSP 3
 144
 145 enum mxsfb_devtype {
 146         MXSFB_V3,
 147         MXSFB_V4,
 148 };
 149
 150 /* CPU dependent register offsets */
 151 struct mxsfb_devdata {
 152         unsigned transfer_count;
 153         unsigned cur_buf;
 154         unsigned next_buf;
 155         unsigned debug0;
 156         unsigned hs_wdth_mask;
 157         unsigned hs_wdth_shift;
 158         unsigned ipversion;
 159 };
 160
 161 struct mxsfb_info {
 162         struct fb_info fb_info;
 163         struct platform_device *pdev;
 164         struct clk *clk;
 165         void __iomem *base;     /* registers */
 166         unsigned allocated_size;
 167         int enabled;
 168         unsigned ld_intf_width;
 169         unsigned dotclk_delay;
 170         const struct mxsfb_devdata *devdata;
 171         int mapped;
 172         u32 sync;
 173 };
 174
 175 #define mxsfb_is_v3(host) (host->devdata->ipversion == 3)
 176 #define mxsfb_is_v4(host) (host->devdata->ipversion == 4)
 177
 178 static const struct mxsfb_devdata mxsfb_devdata[] = {
 179         [MXSFB_V3] = {
 180                 .transfer_count = LCDC_V3_TRANSFER_COUNT,
 181                 .cur_buf = LCDC_V3_CUR_BUF,
 182                 .next_buf = LCDC_V3_NEXT_BUF,
 183                 .debug0 = LCDC_V3_DEBUG0,
 184                 .hs_wdth_mask = 0xff,
 185                 .hs_wdth_shift = 24,
 186                 .ipversion = 3,
 187         },
 188         [MXSFB_V4] = {
 189                 .transfer_count = LCDC_V4_TRANSFER_COUNT,
 190                 .cur_buf = LCDC_V4_CUR_BUF,
 191                 .next_buf = LCDC_V4_NEXT_BUF,
 192                 .debug0 = LCDC_V4_DEBUG0,
 193                 .hs_wdth_mask = 0x3fff,
 194                 .hs_wdth_shift = 18,
 195                 .ipversion = 4,
 196         },
 197 };
 198
 199 #define to_imxfb_host(x) (container_of(x, struct mxsfb_info, fb_info))
 200
 201 /* mask and shift depends on architecture */
 202 static inline u32 set_hsync_pulse_width(struct mxsfb_info *host, unsigned val)
 203 {
 204         return (val & host->devdata->hs_wdth_mask) <<
 205                 host->devdata->hs_wdth_shift;
 206 }
 207
 208 static inline u32 get_hsync_pulse_width(struct mxsfb_info *host, unsigned val)
 209 {
 210         return (val >> host->devdata->hs_wdth_shift) &
 211                 host->devdata->hs_wdth_mask;
 212 }
 213
 214 static const struct fb_bitfield def_rgb565[] = {
 215         [RED] = {
 216                 .offset = 11,
 217                 .length = 5,
 218         },
 219         [GREEN] = {
 220                 .offset = 5,
 221                 .length = 6,
 222         },
 223         [BLUE] = {
 224                 .offset = 0,
 225                 .length = 5,
 226         },
 227         [TRANSP] = {    /* no support for transparency */
 228                 .length = 0,
 229         }
 230 };
 231
 232 static const struct fb_bitfield def_rgb666[] = {
 233         [RED] = {
 234                 .offset = 16,
 235                 .length = 6,
 236         },
 237         [GREEN] = {
 238                 .offset = 8,
 239                 .length = 6,
 240         },
 241         [BLUE] = {
 242                 .offset = 0,
 243                 .length = 6,
 244         },
 245         [TRANSP] = {    /* no support for transparency */
 246                 .length = 0,
 247         }
 248 };
 249
 250 static const struct fb_bitfield def_rgb888[] = {
 251         [RED] = {
 252                 .offset = 16,
 253                 .length = 8,
 254         },
 255         [GREEN] = {
 256                 .offset = 8,
 257                 .length = 8,
 258         },
 259         [BLUE] = {
 260                 .offset = 0,
 261                 .length = 8,
 262         },
 263         [TRANSP] = {    /* no support for transparency */
 264                 .length = 0,
 265         }
 266 };
 267
 268 static inline unsigned chan_to_field(unsigned chan, struct fb_bitfield *bf)
 269 {
 270         chan &= 0xffff;
 271         chan >>= 16 - bf->length;
 272         return chan << bf->offset;
 273 }
 274
 275 static int mxsfb_check_var(struct fb_var_screeninfo *var,
 276                 struct fb_info *fb_info)
 277 {
 278         struct mxsfb_info *host = to_imxfb_host(fb_info);
 279         const struct fb_bitfield *rgb = NULL;
 280
 281         if (var->xres < MIN_XRES)
 282                 var->xres = MIN_XRES;
 283         if (var->yres < MIN_YRES)
 284                 var->yres = MIN_YRES;
 285
 286         var->xres_virtual = var->xres;
 287
 288         var->yres_virtual = var->yres;
 289
 290         switch (var->bits_per_pixel) {
 291         case 16:
 292                 /* always expect RGB 565 */
 293                 rgb = def_rgb565;
 294                 break;
 295         case 32:
 296                 switch (host->ld_intf_width) {
 297                 case STMLCDIF_8BIT:
 298                         pr_debug("Unsupported LCD bus width mapping\n");
 299                         break;
 300                 case STMLCDIF_16BIT:
 301                 case STMLCDIF_18BIT:
 302                         /* 24 bit to 18 bit mapping */
 303                         rgb = def_rgb666;
 304                         break;
 305                 case STMLCDIF_24BIT:
 306                         /* real 24 bit */
 307                         rgb = def_rgb888;
 308                         break;
 309                 }
 310                 break;
 311         default:
 312                 pr_debug("Unsupported colour depth: %u\n", var->bits_per_pixel);
 313                 return -EINVAL;
 314         }
 315
 316         /*
 317          * Copy the RGB parameters for this display
 318          * from the machine specific parameters.
 319          */
 320         var->red    = rgb[RED];
 321         var->green  = rgb[GREEN];
 322         var->blue   = rgb[BLUE];
 323         var->transp = rgb[TRANSP];
 324
 325         return 0;
 326 }
 327
 328 static void mxsfb_enable_controller(struct fb_info *fb_info)
 329 {
 330         struct mxsfb_info *host = to_imxfb_host(fb_info);
 331         u32 reg;
 332
 333         dev_dbg(&host->pdev->dev, "%s\n", __func__);
 334
 335         clk_prepare_enable(host->clk);
 336         clk_set_rate(host->clk, PICOS2KHZ(fb_info->var.pixclock) * 1000U);
 337
 338         /* if it was disabled, re-enable the mode again */
 339         writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_SET);
 340
 341         /* enable the SYNC signals first, then the DMA engine */
 342         reg = readl(host->base + LCDC_VDCTRL4);
 343         reg |= VDCTRL4_SYNC_SIGNALS_ON;
 344         writel(reg, host->base + LCDC_VDCTRL4);
 345
 346         writel(CTRL_RUN, host->base + LCDC_CTRL + REG_SET);
 347
 348         host->enabled = 1;
 349 }
 350
 351 static void mxsfb_disable_controller(struct fb_info *fb_info)
 352 {
 353         struct mxsfb_info *host = to_imxfb_host(fb_info);
 354         unsigned loop;
 355         u32 reg;
 356
 357         dev_dbg(&host->pdev->dev, "%s\n", __func__);
 358
 359         /*
 360          * Even if we disable the controller here, it will still continue
 361          * until its FIFOs are running out of data
 362          */
 363         writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_CLR);
 364
 365         loop = 1000;
 366         while (loop) {
 367                 reg = readl(host->base + LCDC_CTRL);
 368                 if (!(reg & CTRL_RUN))
 369                         break;
 370                 loop--;
 371         }
 372
 373         reg = readl(host->base + LCDC_VDCTRL4);
 374         writel(reg & ~VDCTRL4_SYNC_SIGNALS_ON, host->base + LCDC_VDCTRL4);
 375
 376         clk_disable_unprepare(host->clk);
 377
 378         host->enabled = 0;
 379 }
 380
 381 static int mxsfb_set_par(struct fb_info *fb_info)
 382 {
 383         struct mxsfb_info *host = to_imxfb_host(fb_info);
 384         u32 ctrl, vdctrl0, vdctrl4;
 385         int line_size, fb_size;
 386         int reenable = 0;
 387
 388         line_size =  fb_info->var.xres * (fb_info->var.bits_per_pixel >> 3);
 389         fb_size = fb_info->var.yres_virtual * line_size;
 390
 391         if (fb_size > fb_info->fix.smem_len)
 392                 return -ENOMEM;
 393
 394         fb_info->fix.line_length = line_size;
 395
 396         /*
 397          * It seems, you can't re-program the controller if it is still running.
 398          * This may lead into shifted pictures (FIFO issue?).
 399          * So, first stop the controller and drain its FIFOs
 400          */
 401         if (host->enabled) {
 402                 reenable = 1;
 403                 mxsfb_disable_controller(fb_info);
 404         }
 405
 406         /* clear the FIFOs */
 407         writel(CTRL1_FIFO_CLEAR, host->base + LCDC_CTRL1 + REG_SET);
 408
 409         ctrl = CTRL_BYPASS_COUNT | CTRL_MASTER |
 410                 CTRL_SET_BUS_WIDTH(host->ld_intf_width);
 411
 412         switch (fb_info->var.bits_per_pixel) {
 413         case 16:
 414                 dev_dbg(&host->pdev->dev, "Setting up RGB565 mode\n");
 415                 ctrl |= CTRL_SET_WORD_LENGTH(0);
 416                 writel(CTRL1_SET_BYTE_PACKAGING(0xf), host->base + LCDC_CTRL1);
 417                 break;
 418         case 32:
 419                 dev_dbg(&host->pdev->dev, "Setting up RGB888/666 mode\n");
 420                 ctrl |= CTRL_SET_WORD_LENGTH(3);
 421                 switch (host->ld_intf_width) {
 422                 case STMLCDIF_8BIT:
 423                         dev_dbg(&host->pdev->dev,
 424                                         "Unsupported LCD bus width mapping\n");
 425                         return -EINVAL;
 426                 case STMLCDIF_16BIT:
 427                 case STMLCDIF_18BIT:
 428                         /* 24 bit to 18 bit mapping */
 429                         ctrl |= CTRL_DF24; /* ignore the upper 2 bits in
 430                                             *  each colour component
 431                                             */
 432                         break;
 433                 case STMLCDIF_24BIT:
 434                         /* real 24 bit */
 435                         break;
 436                 }
 437                 /* do not use packed pixels = one pixel per word instead */
 438                 writel(CTRL1_SET_BYTE_PACKAGING(0x7), host->base + LCDC_CTRL1);
 439                 break;
 440         default:
 441                 dev_dbg(&host->pdev->dev, "Unhandled color depth of %u\n",
 442                                 fb_info->var.bits_per_pixel);
 443                 return -EINVAL;
 444         }
 445
 446         writel(ctrl, host->base + LCDC_CTRL);
 447
 448         writel(TRANSFER_COUNT_SET_VCOUNT(fb_info->var.yres) |
 449                         TRANSFER_COUNT_SET_HCOUNT(fb_info->var.xres),
 450                         host->base + host->devdata->transfer_count);
 451
 452         vdctrl0 = VDCTRL0_ENABLE_PRESENT |      /* always in DOTCLOCK mode */
 453                 VDCTRL0_VSYNC_PERIOD_UNIT |
 454                 VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
 455                 VDCTRL0_SET_VSYNC_PULSE_WIDTH(fb_info->var.vsync_len);
 456         if (fb_info->var.sync & FB_SYNC_HOR_HIGH_ACT)
 457                 vdctrl0 |= VDCTRL0_HSYNC_ACT_HIGH;
 458         if (fb_info->var.sync & FB_SYNC_VERT_HIGH_ACT)
 459                 vdctrl0 |= VDCTRL0_VSYNC_ACT_HIGH;
 460         if (host->sync & MXSFB_SYNC_DATA_ENABLE_HIGH_ACT)
 461                 vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH;
 462         if (host->sync & MXSFB_SYNC_DOTCLK_FAILING_ACT)
 463                 vdctrl0 |= VDCTRL0_DOTCLK_ACT_FAILING;
 464
 465         writel(vdctrl0, host->base + LCDC_VDCTRL0);
 466
 467         /* frame length in lines */
 468         writel(fb_info->var.upper_margin + fb_info->var.vsync_len +
 469                 fb_info->var.lower_margin + fb_info->var.yres,
 470                 host->base + LCDC_VDCTRL1);
 471
 472         /* line length in units of clocks or pixels */
 473         writel(set_hsync_pulse_width(host, fb_info->var.hsync_len) |
 474                 VDCTRL2_SET_HSYNC_PERIOD(fb_info->var.left_margin +
 475                 fb_info->var.hsync_len + fb_info->var.right_margin +
 476                 fb_info->var.xres),
 477                 host->base + LCDC_VDCTRL2);
 478
 479         writel(SET_HOR_WAIT_CNT(fb_info->var.left_margin +
 480                 fb_info->var.hsync_len) |
 481                 SET_VERT_WAIT_CNT(fb_info->var.upper_margin +
 482                         fb_info->var.vsync_len),
 483                 host->base + LCDC_VDCTRL3);
 484
 485         vdctrl4 = SET_DOTCLK_H_VALID_DATA_CNT(fb_info->var.xres);
 486         if (mxsfb_is_v4(host))
 487                 vdctrl4 |= VDCTRL4_SET_DOTCLK_DLY(host->dotclk_delay);
 488         writel(vdctrl4, host->base + LCDC_VDCTRL4);
 489
 490         writel(fb_info->fix.smem_start +
 491                         fb_info->fix.line_length * fb_info->var.yoffset,
 492                         host->base + host->devdata->next_buf);
 493
 494         if (reenable)
 495                 mxsfb_enable_controller(fb_info);
 496
 497         return 0;
 498 }
 499
 500 static int mxsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
 501                 u_int transp, struct fb_info *fb_info)
 502 {
 503         unsigned int val;
 504         int ret = -EINVAL;
 505
 506         /*
 507          * If greyscale is true, then we convert the RGB value
 508          * to greyscale no matter what visual we are using.
 509          */
 510         if (fb_info->var.grayscale)
 511                 red = green = blue = (19595 * red + 38470 * green +
 512                                         7471 * blue) >> 16;
 513
 514         switch (fb_info->fix.visual) {
 515         case FB_VISUAL_TRUECOLOR:
 516                 /*
 517                  * 12 or 16-bit True Colour.  We encode the RGB value
 518                  * according to the RGB bitfield information.
 519                  */
 520                 if (regno < 16) {
 521                         u32 *pal = fb_info->pseudo_palette;
 522
 523                         val  = chan_to_field(red, &fb_info->var.red);
 524                         val |= chan_to_field(green, &fb_info->var.green);
 525                         val |= chan_to_field(blue, &fb_info->var.blue);
 526
 527                         pal[regno] = val;
 528                         ret = 0;
 529                 }
 530                 break;
 531
 532         case FB_VISUAL_STATIC_PSEUDOCOLOR:
 533         case FB_VISUAL_PSEUDOCOLOR:
 534                 break;
 535         }
 536
 537         return ret;
 538 }
 539
 540 static int mxsfb_blank(int blank, struct fb_info *fb_info)
 541 {
 542         struct mxsfb_info *host = to_imxfb_host(fb_info);
 543
 544         switch (blank) {
 545         case FB_BLANK_POWERDOWN:
 546         case FB_BLANK_VSYNC_SUSPEND:
 547         case FB_BLANK_HSYNC_SUSPEND:
 548         case FB_BLANK_NORMAL:
 549                 if (host->enabled)
 550                         mxsfb_disable_controller(fb_info);
 551                 break;
 552
 553         case FB_BLANK_UNBLANK:
 554                 if (!host->enabled)
 555                         mxsfb_enable_controller(fb_info);
 556                 break;
 557         }
 558         return 0;
 559 }
 560
 561 static int mxsfb_pan_display(struct fb_var_screeninfo *var,
 562                 struct fb_info *fb_info)
 563 {
 564         struct mxsfb_info *host = to_imxfb_host(fb_info);
 565         unsigned offset;
 566
 567         if (var->xoffset != 0)
 568                 return -EINVAL;
 569
 570         offset = fb_info->fix.line_length * var->yoffset;
 571
 572         /* update on next VSYNC */
 573         writel(fb_info->fix.smem_start + offset,
 574                         host->base + host->devdata->next_buf);
 575
 576         return 0;
 577 }
 578
 579 static struct fb_ops mxsfb_ops = {
 580         .owner = THIS_MODULE,
 581         .fb_check_var = mxsfb_check_var,
 582         .fb_set_par = mxsfb_set_par,
 583         .fb_setcolreg = mxsfb_setcolreg,
 584         .fb_blank = mxsfb_blank,
 585         .fb_pan_display = mxsfb_pan_display,
 586         .fb_fillrect = cfb_fillrect,
 587         .fb_copyarea = cfb_copyarea,
 588         .fb_imageblit = cfb_imageblit,
 589 };
 590
 591 static int mxsfb_restore_mode(struct mxsfb_info *host)
 592 {
 593         struct fb_info *fb_info = &host->fb_info;
 594         unsigned line_count;
 595         unsigned period;
 596         unsigned long pa, fbsize;
 597         int bits_per_pixel, ofs;
 598         u32 transfer_count, vdctrl0, vdctrl2, vdctrl3, vdctrl4, ctrl;
 599         struct fb_videomode vmode;
 600
 601         /* Only restore the mode when the controller is running */
 602         ctrl = readl(host->base + LCDC_CTRL);
 603         if (!(ctrl & CTRL_RUN))
 604                 return -EINVAL;
 605
 606         vdctrl0 = readl(host->base + LCDC_VDCTRL0);
 607         vdctrl2 = readl(host->base + LCDC_VDCTRL2);
 608         vdctrl3 = readl(host->base + LCDC_VDCTRL3);
 609         vdctrl4 = readl(host->base + LCDC_VDCTRL4);
 610
 611         transfer_count = readl(host->base + host->devdata->transfer_count);
 612
 613         vmode.xres = TRANSFER_COUNT_GET_HCOUNT(transfer_count);
 614         vmode.yres = TRANSFER_COUNT_GET_VCOUNT(transfer_count);
 615
 616         switch (CTRL_GET_WORD_LENGTH(ctrl)) {
 617         case 0:
 618                 bits_per_pixel = 16;
 619                 break;
 620         case 3:
 621                 bits_per_pixel = 32;
 622         case 1:
 623         default:
 624                 return -EINVAL;
 625         }
 626
 627         fb_info->var.bits_per_pixel = bits_per_pixel;
 628
 629         vmode.pixclock = KHZ2PICOS(clk_get_rate(host->clk) / 1000U);
 630         vmode.hsync_len = get_hsync_pulse_width(host, vdctrl2);
 631         vmode.left_margin = GET_HOR_WAIT_CNT(vdctrl3) - vmode.hsync_len;
 632         vmode.right_margin = VDCTRL2_GET_HSYNC_PERIOD(vdctrl2) - vmode.hsync_len -
 633                 vmode.left_margin - vmode.xres;
 634         vmode.vsync_len = VDCTRL0_GET_VSYNC_PULSE_WIDTH(vdctrl0);
 635         period = readl(host->base + LCDC_VDCTRL1);
 636         vmode.upper_margin = GET_VERT_WAIT_CNT(vdctrl3) - vmode.vsync_len;
 637         vmode.lower_margin = period - vmode.vsync_len - vmode.upper_margin - vmode.yres;
 638
 639         vmode.vmode = FB_VMODE_NONINTERLACED;
 640
 641         vmode.sync = 0;
 642         if (vdctrl0 & VDCTRL0_HSYNC_ACT_HIGH)
 643                 vmode.sync |= FB_SYNC_HOR_HIGH_ACT;
 644         if (vdctrl0 & VDCTRL0_VSYNC_ACT_HIGH)
 645                 vmode.sync |= FB_SYNC_VERT_HIGH_ACT;
 646
 647         pr_debug("Reconstructed video mode:\n");
 648         pr_debug("%dx%d, hsync: %u left: %u, right: %u, vsync: %u, upper: %u, lower: %u\n",
 649                         vmode.xres, vmode.yres,
 650                         vmode.hsync_len, vmode.left_margin, vmode.right_margin,
 651                         vmode.vsync_len, vmode.upper_margin, vmode.lower_margin);
 652         pr_debug("pixclk: %ldkHz\n", PICOS2KHZ(vmode.pixclock));
 653
 654         fb_add_videomode(&vmode, &fb_info->modelist);
 655
 656         host->ld_intf_width = CTRL_GET_BUS_WIDTH(ctrl);
 657         host->dotclk_delay = VDCTRL4_GET_DOTCLK_DLY(vdctrl4);
 658
 659         fb_info->fix.line_length = vmode.xres * (bits_per_pixel >> 3);
 660
 661         pa = readl(host->base + host->devdata->cur_buf);
 662         fbsize = fb_info->fix.line_length * vmode.yres;
 663         if (pa < fb_info->fix.smem_start)
 664                 return -EINVAL;
 665         if (pa + fbsize > fb_info->fix.smem_start + fb_info->fix.smem_len)
 666                 return -EINVAL;
 667         ofs = pa - fb_info->fix.smem_start;
 668         if (ofs) {
 669                 memmove(fb_info->screen_base, fb_info->screen_base + ofs, fbsize);
 670                 writel(fb_info->fix.smem_start, host->base + host->devdata->next_buf);
 671         }
 672
 673         line_count = fb_info->fix.smem_len / fb_info->fix.line_length;
 674         fb_info->fix.ypanstep = 1;
 675
 676         clk_prepare_enable(host->clk);
 677         host->enabled = 1;
 678
 679         return 0;
 680 }
 681
 682 static int mxsfb_init_fbinfo(struct mxsfb_info *host)
 683 {
 684         struct fb_info *fb_info = &host->fb_info;
 685         struct fb_var_screeninfo *var = &fb_info->var;
 686         struct mxsfb_platform_data *pdata = host->pdev->dev.platform_data;
 687         dma_addr_t fb_phys;
 688         void *fb_virt;
 689         unsigned fb_size = pdata->fb_size;
 690
 691         fb_info->fbops = &mxsfb_ops;
 692         fb_info->flags = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST;
 693         strlcpy(fb_info->fix.id, "mxs", sizeof(fb_info->fix.id));
 694         fb_info->fix.type = FB_TYPE_PACKED_PIXELS;
 695         fb_info->fix.ypanstep = 1;
 696         fb_info->fix.visual = FB_VISUAL_TRUECOLOR,
 697         fb_info->fix.accel = FB_ACCEL_NONE;
 698
 699         var->bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16;
 700         var->nonstd = 0;
 701         var->activate = FB_ACTIVATE_NOW;
 702         var->accel_flags = 0;
 703         var->vmode = FB_VMODE_NONINTERLACED;
 704
 705         host->dotclk_delay = pdata->dotclk_delay;
 706         host->ld_intf_width = pdata->ld_intf_width;
 707
 708         /* Memory allocation for framebuffer */
 709         if (pdata->fb_phys) {
 710                 if (!fb_size)
 711                         return -EINVAL;
 712
 713                 fb_phys = pdata->fb_phys;
 714
 715                 if (!request_mem_region(fb_phys, fb_size, host->pdev->name))
 716                         return -ENOMEM;
 717
 718                 fb_virt = ioremap(fb_phys, fb_size);
 719                 if (!fb_virt) {
 720                         release_mem_region(fb_phys, fb_size);
 721                         return -ENOMEM;
 722                 }
 723                 host->mapped = 1;
 724         } else {
 725                 if (!fb_size)
 726                         fb_size = SZ_2M; /* default */
 727                 fb_virt = alloc_pages_exact(fb_size, GFP_DMA);
 728                 if (!fb_virt)
 729                         return -ENOMEM;
 730
 731                 fb_phys = virt_to_phys(fb_virt);
 732         }
 733
 734         fb_info->fix.smem_start = fb_phys;
 735         fb_info->screen_base = fb_virt;
 736         fb_info->screen_size = fb_info->fix.smem_len = fb_size;
 737
 738         if (mxsfb_restore_mode(host))
 739                 memset(fb_virt, 0, fb_size);
 740
 741         return 0;
 742 }
 743
 744 static void mxsfb_free_videomem(struct mxsfb_info *host)
 745 {
 746         struct fb_info *fb_info = &host->fb_info;
 747
 748         if (host->mapped) {
 749                 iounmap(fb_info->screen_base);
 750                 release_mem_region(fb_info->fix.smem_start,
 751                                 fb_info->screen_size);
 752         } else {
 753                 free_pages_exact(fb_info->screen_base, fb_info->fix.smem_len);
 754         }
 755 }
 756
 757 static struct platform_device_id mxsfb_devtype[] = {
 758         {
 759                 .name = "imx23-fb",
 760                 .driver_data = MXSFB_V3,
 761         }, {
 762                 .name = "imx28-fb",
 763                 .driver_data = MXSFB_V4,
 764         }, {
 765                 /* sentinel */
 766         }
 767 };
 768 MODULE_DEVICE_TABLE(platform, mxsfb_devtype);
 769
 770 static const struct of_device_id mxsfb_dt_ids[] = {
 771         { .compatible = "fsl,imx23-lcdif", .data = &mxsfb_devtype[0], },
 772         { .compatible = "fsl,imx28-lcdif", .data = &mxsfb_devtype[1], },
 773         { /* sentinel */ }
 774 };
 775 MODULE_DEVICE_TABLE(of, mxsfb_dt_ids);
 776
 777 static int mxsfb_probe(struct platform_device *pdev)
 778 {
 779         const struct of_device_id *of_id =
 780                         of_match_device(mxsfb_dt_ids, &pdev->dev);
 781         struct mxsfb_platform_data *pdata = pdev->dev.platform_data;
 782         struct resource *res;
 783         struct mxsfb_info *host;
 784         struct fb_info *fb_info;
 785         struct fb_modelist *modelist;
 786         struct pinctrl *pinctrl;
 787         int panel_enable;
 788         enum of_gpio_flags flags;
 789         int i, ret;
 790
 791         if (of_id)
 792                 pdev->id_entry = of_id->data;
 793
 794         if (!pdata) {
 795                 dev_err(&pdev->dev, "No platformdata. Giving up\n");
 796                 return -ENODEV;
 797         }
 798
 799         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 800         if (!res) {
 801                 dev_err(&pdev->dev, "Cannot get memory IO resource\n");
 802                 return -ENODEV;
 803         }
 804
 805         if (!request_mem_region(res->start, resource_size(res), pdev->name))
 806                 return -EBUSY;
 807
 808         fb_info = framebuffer_alloc(sizeof(struct mxsfb_info), &pdev->dev);
 809         if (!fb_info) {
 810                 dev_err(&pdev->dev, "Failed to allocate fbdev\n");
 811                 ret = -ENOMEM;
 812                 goto error_alloc_info;
 813         }
 814
 815         host = to_imxfb_host(fb_info);
 816
 817         host->base = ioremap(res->start, resource_size(res));
 818         if (!host->base) {
 819                 dev_err(&pdev->dev, "ioremap failed\n");
 820                 ret = -ENOMEM;
 821                 goto error_ioremap;
 822         }
 823
 824         host->pdev = pdev;
 825         platform_set_drvdata(pdev, host);
 826
 827         host->devdata = &mxsfb_devdata[pdev->id_entry->driver_data];
 828
 829         pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
 830         if (IS_ERR(pinctrl)) {
 831                 ret = PTR_ERR(pinctrl);
 832                 goto error_getpin;
 833         }
 834
 835         host->clk = clk_get(&host->pdev->dev, NULL);
 836         if (IS_ERR(host->clk)) {
 837                 ret = PTR_ERR(host->clk);
 838                 goto error_getclock;
 839         }
 840
 841         panel_enable = of_get_named_gpio_flags(pdev->dev.of_node,
 842                                                "panel-enable-gpios", 0, &flags);
 843         if (gpio_is_valid(panel_enable)) {
 844                 unsigned long f = GPIOF_OUT_INIT_HIGH;
 845                 if (flags == OF_GPIO_ACTIVE_LOW)
 846                         f = GPIOF_OUT_INIT_LOW;
 847                 ret = devm_gpio_request_one(&pdev->dev, panel_enable,
 848                                             f, "panel-enable");
 849                 if (ret) {
 850                         dev_err(&pdev->dev,
 851                                 "failed to request gpio %d: %d\n",
 852                                 panel_enable, ret);
 853                         goto error_panel_enable;
 854                 }
 855         }
 856
 857         fb_info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL);
 858         if (!fb_info->pseudo_palette) {
 859                 ret = -ENOMEM;
 860                 goto error_pseudo_pallette;
 861         }
 862
 863         INIT_LIST_HEAD(&fb_info->modelist);
 864
 865         host->sync = pdata->sync;
 866
 867         ret = mxsfb_init_fbinfo(host);
 868         if (ret != 0)
 869                 goto error_init_fb;
 870
 871         for (i = 0; i < pdata->mode_count; i++)
 872                 fb_add_videomode(&pdata->mode_list[i], &fb_info->modelist);
 873
 874         modelist = list_first_entry(&fb_info->modelist,
 875                         struct fb_modelist, list);
 876         fb_videomode_to_var(&fb_info->var, &modelist->mode);
 877
 878         /* init the color fields */
 879         mxsfb_check_var(&fb_info->var, fb_info);
 880
 881         platform_set_drvdata(pdev, fb_info);
 882
 883         ret = register_framebuffer(fb_info);
 884         if (ret != 0) {
 885                 dev_err(&pdev->dev,"Failed to register framebuffer\n");
 886                 goto error_register;
 887         }
 888
 889         if (!host->enabled) {
 890                 writel(0, host->base + LCDC_CTRL);
 891                 mxsfb_set_par(fb_info);
 892                 mxsfb_enable_controller(fb_info);
 893         }
 894
 895         dev_info(&pdev->dev, "initialized\n");
 896
 897         return 0;
 898
 899 error_register:
 900         if (host->enabled)
 901                 clk_disable_unprepare(host->clk);
 902         fb_destroy_modelist(&fb_info->modelist);
 903 error_init_fb:
 904         kfree(fb_info->pseudo_palette);
 905 error_pseudo_pallette:
 906 error_panel_enable:
 907         clk_put(host->clk);
 908 error_getclock:
 909 error_getpin:
 910         iounmap(host->base);
 911 error_ioremap:
 912         framebuffer_release(fb_info);
 913 error_alloc_info:
 914         release_mem_region(res->start, resource_size(res));
 915
 916         return ret;
 917 }
 918
 919 static int mxsfb_remove(struct platform_device *pdev)
 920 {
 921         struct fb_info *fb_info = platform_get_drvdata(pdev);
 922         struct mxsfb_info *host = to_imxfb_host(fb_info);
 923         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 924
 925         if (host->enabled)
 926                 mxsfb_disable_controller(fb_info);
 927
 928         unregister_framebuffer(fb_info);
 929         kfree(fb_info->pseudo_palette);
 930         mxsfb_free_videomem(host);
 931         iounmap(host->base);
 932         clk_put(host->clk);
 933
 934         framebuffer_release(fb_info);
 935         release_mem_region(res->start, resource_size(res));
 936
 937         platform_set_drvdata(pdev, NULL);
 938
 939         return 0;
 940 }
 941
 942 static void mxsfb_shutdown(struct platform_device *pdev)
 943 {
 944         struct fb_info *fb_info = platform_get_drvdata(pdev);
 945         struct mxsfb_info *host = to_imxfb_host(fb_info);
 946
 947         /*
 948          * Force stop the LCD controller as keeping it running during reboot
 949          * might interfere with the BootROM's boot mode pads sampling.
 950          */
 951         writel(CTRL_RUN, host->base + LCDC_CTRL + REG_CLR);
 952 }
 953
 954 static struct platform_driver mxsfb_driver = {
 955         .probe = mxsfb_probe,
 956         .remove = mxsfb_remove,
 957         .shutdown = mxsfb_shutdown,
 958         .id_table = mxsfb_devtype,
 959         .driver = {
 960                    .name = DRIVER_NAME,
 961                    .of_match_table = mxsfb_dt_ids,
 962         },
 963 };
 964
 965 module_platform_driver(mxsfb_driver);
 966
 967 MODULE_DESCRIPTION("Freescale mxs framebuffer driver");
 968 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 969 MODULE_LICENSE("GPL");