sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include <sound/hdaudio.h>
  41 #include <sound/hda_i915.h>
  42 #include <sound/hda_chmap.h>
  43 #include "hda_codec.h"
  44 #include "hda_local.h"
  45 #include "hda_jack.h"
  46
  47 static bool static_hdmi_pcm;
  48 module_param(static_hdmi_pcm, bool, 0644);
  49 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  50
  51 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  52 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  53 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  54 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  55 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  56 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  57                                 || is_skylake(codec) || is_broxton(codec) \
  58                                 || is_kabylake(codec))
  59
  60 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  61 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  62 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  63
  64 struct hdmi_spec_per_cvt {
  65         hda_nid_t cvt_nid;
  66         int assigned;
  67         unsigned int channels_min;
  68         unsigned int channels_max;
  69         u32 rates;
  70         u64 formats;
  71         unsigned int maxbps;
  72 };
  73
  74 /* max. connections to a widget */
  75 #define HDA_MAX_CONNECTIONS     32
  76
  77 struct hdmi_spec_per_pin {
  78         hda_nid_t pin_nid;
  79         /* pin idx, different device entries on the same pin use the same idx */
  80         int pin_nid_idx;
  81         int num_mux_nids;
  82         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  83         int mux_idx;
  84         hda_nid_t cvt_nid;
  85
  86         struct hda_codec *codec;
  87         struct hdmi_eld sink_eld;
  88         struct mutex lock;
  89         struct delayed_work work;
  90         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  91         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  92         int repoll_count;
  93         bool setup; /* the stream has been set up by prepare callback */
  94         int channels; /* current number of channels */
  95         bool non_pcm;
  96         bool chmap_set;         /* channel-map override by ALSA API? */
  97         unsigned char chmap[8]; /* ALSA API channel-map */
  98 #ifdef CONFIG_SND_PROC_FS
  99         struct snd_info_entry *proc_entry;
 100 #endif
 101 };
 102
 103 /* operations used by generic code that can be overridden by patches */
 104 struct hdmi_ops {
 105         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 106                            unsigned char *buf, int *eld_size);
 107
 108         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 109                                     int ca, int active_channels, int conn_type);
 110
 111         /* enable/disable HBR (HD passthrough) */
 112         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 113
 114         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 115                             hda_nid_t pin_nid, u32 stream_tag, int format);
 116
 117 };
 118
 119 struct hdmi_pcm {
 120         struct hda_pcm *pcm;
 121         struct snd_jack *jack;
 122         struct snd_kcontrol *eld_ctl;
 123 };
 124
 125 struct hdmi_spec {
 126         int num_cvts;
 127         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 128         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 129
 130         int num_pins;
 131         struct snd_array pins; /* struct hdmi_spec_per_pin */
 132         struct hdmi_pcm pcm_rec[16];
 133         struct mutex pcm_lock;
 134         /* pcm_bitmap means which pcms have been assigned to pins*/
 135         unsigned long pcm_bitmap;
 136         int pcm_used;   /* counter of pcm_rec[] */
 137         /* bitmap shows whether the pcm is opened in user space
 138          * bit 0 means the first playback PCM (PCM3);
 139          * bit 1 means the second playback PCM, and so on.
 140          */
 141         unsigned long pcm_in_use;
 142
 143         struct hdmi_eld temp_eld;
 144         struct hdmi_ops ops;
 145
 146         bool dyn_pin_out;
 147         bool dyn_pcm_assign;
 148         /*
 149          * Non-generic VIA/NVIDIA specific
 150          */
 151         struct hda_multi_out multiout;
 152         struct hda_pcm_stream pcm_playback;
 153
 154         /* i915/powerwell (Haswell+/Valleyview+) specific */
 155         bool use_acomp_notifier; /* use i915 eld_notify callback for hotplug */
 156         struct i915_audio_component_audio_ops i915_audio_ops;
 157
 158         struct hdac_chmap chmap;
 159 };
 160
 161 #ifdef CONFIG_SND_HDA_I915
 162 static inline bool codec_has_acomp(struct hda_codec *codec)
 163 {
 164         struct hdmi_spec *spec = codec->spec;
 165         return spec->use_acomp_notifier;
 166 }
 167 #else
 168 #define codec_has_acomp(codec)  false
 169 #endif
 170
 171 struct hdmi_audio_infoframe {
 172         u8 type; /* 0x84 */
 173         u8 ver;  /* 0x01 */
 174         u8 len;  /* 0x0a */
 175
 176         u8 checksum;
 177
 178         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 179         u8 SS01_SF24;
 180         u8 CXT04;
 181         u8 CA;
 182         u8 LFEPBL01_LSV36_DM_INH7;
 183 };
 184
 185 struct dp_audio_infoframe {
 186         u8 type; /* 0x84 */
 187         u8 len;  /* 0x1b */
 188         u8 ver;  /* 0x11 << 2 */
 189
 190         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 191         u8 SS01_SF24;
 192         u8 CXT04;
 193         u8 CA;
 194         u8 LFEPBL01_LSV36_DM_INH7;
 195 };
 196
 197 union audio_infoframe {
 198         struct hdmi_audio_infoframe hdmi;
 199         struct dp_audio_infoframe dp;
 200         u8 bytes[0];
 201 };
 202
 203 /*
 204  * HDMI routines
 205  */
 206
 207 #define get_pin(spec, idx) \
 208         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 209 #define get_cvt(spec, idx) \
 210         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 211 /* obtain hdmi_pcm object assigned to idx */
 212 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 213 /* obtain hda_pcm object assigned to idx */
 214 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 215
 216 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
 217 {
 218         struct hdmi_spec *spec = codec->spec;
 219         int pin_idx;
 220
 221         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 222                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 223                         return pin_idx;
 224
 225         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 226         return -EINVAL;
 227 }
 228
 229 static int hinfo_to_pcm_index(struct hda_codec *codec,
 230                         struct hda_pcm_stream *hinfo)
 231 {
 232         struct hdmi_spec *spec = codec->spec;
 233         int pcm_idx;
 234
 235         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 236                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 237                         return pcm_idx;
 238
 239         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 240         return -EINVAL;
 241 }
 242
 243 static int hinfo_to_pin_index(struct hda_codec *codec,
 244                               struct hda_pcm_stream *hinfo)
 245 {
 246         struct hdmi_spec *spec = codec->spec;
 247         struct hdmi_spec_per_pin *per_pin;
 248         int pin_idx;
 249
 250         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 251                 per_pin = get_pin(spec, pin_idx);
 252                 if (per_pin->pcm &&
 253                         per_pin->pcm->pcm->stream == hinfo)
 254                         return pin_idx;
 255         }
 256
 257         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 258         return -EINVAL;
 259 }
 260
 261 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 262                                                 int pcm_idx)
 263 {
 264         int i;
 265         struct hdmi_spec_per_pin *per_pin;
 266
 267         for (i = 0; i < spec->num_pins; i++) {
 268                 per_pin = get_pin(spec, i);
 269                 if (per_pin->pcm_idx == pcm_idx)
 270                         return per_pin;
 271         }
 272         return NULL;
 273 }
 274
 275 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 276 {
 277         struct hdmi_spec *spec = codec->spec;
 278         int cvt_idx;
 279
 280         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 281                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 282                         return cvt_idx;
 283
 284         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 285         return -EINVAL;
 286 }
 287
 288 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 289                         struct snd_ctl_elem_info *uinfo)
 290 {
 291         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 292         struct hdmi_spec *spec = codec->spec;
 293         struct hdmi_spec_per_pin *per_pin;
 294         struct hdmi_eld *eld;
 295         int pcm_idx;
 296
 297         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 298
 299         pcm_idx = kcontrol->private_value;
 300         mutex_lock(&spec->pcm_lock);
 301         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 302         if (!per_pin) {
 303                 /* no pin is bound to the pcm */
 304                 uinfo->count = 0;
 305                 mutex_unlock(&spec->pcm_lock);
 306                 return 0;
 307         }
 308         eld = &per_pin->sink_eld;
 309         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 310         mutex_unlock(&spec->pcm_lock);
 311
 312         return 0;
 313 }
 314
 315 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 316                         struct snd_ctl_elem_value *ucontrol)
 317 {
 318         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 319         struct hdmi_spec *spec = codec->spec;
 320         struct hdmi_spec_per_pin *per_pin;
 321         struct hdmi_eld *eld;
 322         int pcm_idx;
 323
 324         pcm_idx = kcontrol->private_value;
 325         mutex_lock(&spec->pcm_lock);
 326         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 327         if (!per_pin) {
 328                 /* no pin is bound to the pcm */
 329                 memset(ucontrol->value.bytes.data, 0,
 330                        ARRAY_SIZE(ucontrol->value.bytes.data));
 331                 mutex_unlock(&spec->pcm_lock);
 332                 return 0;
 333         }
 334         eld = &per_pin->sink_eld;
 335
 336         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 337             eld->eld_size > ELD_MAX_SIZE) {
 338                 mutex_unlock(&spec->pcm_lock);
 339                 snd_BUG();
 340                 return -EINVAL;
 341         }
 342
 343         memset(ucontrol->value.bytes.data, 0,
 344                ARRAY_SIZE(ucontrol->value.bytes.data));
 345         if (eld->eld_valid)
 346                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 347                        eld->eld_size);
 348         mutex_unlock(&spec->pcm_lock);
 349
 350         return 0;
 351 }
 352
 353 static struct snd_kcontrol_new eld_bytes_ctl = {
 354         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 355         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 356         .name = "ELD",
 357         .info = hdmi_eld_ctl_info,
 358         .get = hdmi_eld_ctl_get,
 359 };
 360
 361 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 362                         int device)
 363 {
 364         struct snd_kcontrol *kctl;
 365         struct hdmi_spec *spec = codec->spec;
 366         int err;
 367
 368         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 369         if (!kctl)
 370                 return -ENOMEM;
 371         kctl->private_value = pcm_idx;
 372         kctl->id.device = device;
 373
 374         /* no pin nid is associated with the kctl now
 375          * tbd: associate pin nid to eld ctl later
 376          */
 377         err = snd_hda_ctl_add(codec, 0, kctl);
 378         if (err < 0)
 379                 return err;
 380
 381         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 382         return 0;
 383 }
 384
 385 #ifdef BE_PARANOID
 386 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 387                                 int *packet_index, int *byte_index)
 388 {
 389         int val;
 390
 391         val = snd_hda_codec_read(codec, pin_nid, 0,
 392                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 393
 394         *packet_index = val >> 5;
 395         *byte_index = val & 0x1f;
 396 }
 397 #endif
 398
 399 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 400                                 int packet_index, int byte_index)
 401 {
 402         int val;
 403
 404         val = (packet_index << 5) | (byte_index & 0x1f);
 405
 406         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 407 }
 408
 409 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 410                                 unsigned char val)
 411 {
 412         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 413 }
 414
 415 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 416 {
 417         struct hdmi_spec *spec = codec->spec;
 418         int pin_out;
 419
 420         /* Unmute */
 421         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 422                 snd_hda_codec_write(codec, pin_nid, 0,
 423                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 424
 425         if (spec->dyn_pin_out)
 426                 /* Disable pin out until stream is active */
 427                 pin_out = 0;
 428         else
 429                 /* Enable pin out: some machines with GM965 gets broken output
 430                  * when the pin is disabled or changed while using with HDMI
 431                  */
 432                 pin_out = PIN_OUT;
 433
 434         snd_hda_codec_write(codec, pin_nid, 0,
 435                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 436 }
 437
 438 /*
 439  * ELD proc files
 440  */
 441
 442 #ifdef CONFIG_SND_PROC_FS
 443 static void print_eld_info(struct snd_info_entry *entry,
 444                            struct snd_info_buffer *buffer)
 445 {
 446         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 447
 448         mutex_lock(&per_pin->lock);
 449         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 450         mutex_unlock(&per_pin->lock);
 451 }
 452
 453 static void write_eld_info(struct snd_info_entry *entry,
 454                            struct snd_info_buffer *buffer)
 455 {
 456         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 457
 458         mutex_lock(&per_pin->lock);
 459         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 460         mutex_unlock(&per_pin->lock);
 461 }
 462
 463 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 464 {
 465         char name[32];
 466         struct hda_codec *codec = per_pin->codec;
 467         struct snd_info_entry *entry;
 468         int err;
 469
 470         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 471         err = snd_card_proc_new(codec->card, name, &entry);
 472         if (err < 0)
 473                 return err;
 474
 475         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 476         entry->c.text.write = write_eld_info;
 477         entry->mode |= S_IWUSR;
 478         per_pin->proc_entry = entry;
 479
 480         return 0;
 481 }
 482
 483 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 484 {
 485         if (!per_pin->codec->bus->shutdown) {
 486                 snd_info_free_entry(per_pin->proc_entry);
 487                 per_pin->proc_entry = NULL;
 488         }
 489 }
 490 #else
 491 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 492                                int index)
 493 {
 494         return 0;
 495 }
 496 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 497 {
 498 }
 499 #endif
 500
 501 /*
 502  * Audio InfoFrame routines
 503  */
 504
 505 /*
 506  * Enable Audio InfoFrame Transmission
 507  */
 508 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 509                                        hda_nid_t pin_nid)
 510 {
 511         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 512         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 513                                                 AC_DIPXMIT_BEST);
 514 }
 515
 516 /*
 517  * Disable Audio InfoFrame Transmission
 518  */
 519 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 520                                       hda_nid_t pin_nid)
 521 {
 522         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 523         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 524                                                 AC_DIPXMIT_DISABLE);
 525 }
 526
 527 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 528 {
 529 #ifdef CONFIG_SND_DEBUG_VERBOSE
 530         int i;
 531         int size;
 532
 533         size = snd_hdmi_get_eld_size(codec, pin_nid);
 534         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 535
 536         for (i = 0; i < 8; i++) {
 537                 size = snd_hda_codec_read(codec, pin_nid, 0,
 538                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 539                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 540         }
 541 #endif
 542 }
 543
 544 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 545 {
 546 #ifdef BE_PARANOID
 547         int i, j;
 548         int size;
 549         int pi, bi;
 550         for (i = 0; i < 8; i++) {
 551                 size = snd_hda_codec_read(codec, pin_nid, 0,
 552                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 553                 if (size == 0)
 554                         continue;
 555
 556                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 557                 for (j = 1; j < 1000; j++) {
 558                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 559                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 560                         if (pi != i)
 561                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 562                                                 bi, pi, i);
 563                         if (bi == 0) /* byte index wrapped around */
 564                                 break;
 565                 }
 566                 codec_dbg(codec,
 567                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 568                         i, size, j);
 569         }
 570 #endif
 571 }
 572
 573 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 574 {
 575         u8 *bytes = (u8 *)hdmi_ai;
 576         u8 sum = 0;
 577         int i;
 578
 579         hdmi_ai->checksum = 0;
 580
 581         for (i = 0; i < sizeof(*hdmi_ai); i++)
 582                 sum += bytes[i];
 583
 584         hdmi_ai->checksum = -sum;
 585 }
 586
 587 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 588                                       hda_nid_t pin_nid,
 589                                       u8 *dip, int size)
 590 {
 591         int i;
 592
 593         hdmi_debug_dip_size(codec, pin_nid);
 594         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 595
 596         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 597         for (i = 0; i < size; i++)
 598                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 599 }
 600
 601 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 602                                     u8 *dip, int size)
 603 {
 604         u8 val;
 605         int i;
 606
 607         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 608                                                             != AC_DIPXMIT_BEST)
 609                 return false;
 610
 611         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 612         for (i = 0; i < size; i++) {
 613                 val = snd_hda_codec_read(codec, pin_nid, 0,
 614                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 615                 if (val != dip[i])
 616                         return false;
 617         }
 618
 619         return true;
 620 }
 621
 622 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 623                                      hda_nid_t pin_nid,
 624                                      int ca, int active_channels,
 625                                      int conn_type)
 626 {
 627         union audio_infoframe ai;
 628
 629         memset(&ai, 0, sizeof(ai));
 630         if (conn_type == 0) { /* HDMI */
 631                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 632
 633                 hdmi_ai->type           = 0x84;
 634                 hdmi_ai->ver            = 0x01;
 635                 hdmi_ai->len            = 0x0a;
 636                 hdmi_ai->CC02_CT47      = active_channels - 1;
 637                 hdmi_ai->CA             = ca;
 638                 hdmi_checksum_audio_infoframe(hdmi_ai);
 639         } else if (conn_type == 1) { /* DisplayPort */
 640                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 641
 642                 dp_ai->type             = 0x84;
 643                 dp_ai->len              = 0x1b;
 644                 dp_ai->ver              = 0x11 << 2;
 645                 dp_ai->CC02_CT47        = active_channels - 1;
 646                 dp_ai->CA               = ca;
 647         } else {
 648                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 649                             pin_nid);
 650                 return;
 651         }
 652
 653         /*
 654          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 655          * sizeof(*dp_ai) to avoid partial match/update problems when
 656          * the user switches between HDMI/DP monitors.
 657          */
 658         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 659                                         sizeof(ai))) {
 660                 codec_dbg(codec,
 661                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 662                             pin_nid,
 663                             active_channels, ca);
 664                 hdmi_stop_infoframe_trans(codec, pin_nid);
 665                 hdmi_fill_audio_infoframe(codec, pin_nid,
 666                                             ai.bytes, sizeof(ai));
 667                 hdmi_start_infoframe_trans(codec, pin_nid);
 668         }
 669 }
 670
 671 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 672                                        struct hdmi_spec_per_pin *per_pin,
 673                                        bool non_pcm)
 674 {
 675         struct hdmi_spec *spec = codec->spec;
 676         struct hdac_chmap *chmap = &spec->chmap;
 677         hda_nid_t pin_nid = per_pin->pin_nid;
 678         int channels = per_pin->channels;
 679         int active_channels;
 680         struct hdmi_eld *eld;
 681         int ca;
 682
 683         if (!channels)
 684                 return;
 685
 686         if (is_haswell_plus(codec))
 687                 snd_hda_codec_write(codec, pin_nid, 0,
 688                                             AC_VERB_SET_AMP_GAIN_MUTE,
 689                                             AMP_OUT_UNMUTE);
 690
 691         eld = &per_pin->sink_eld;
 692
 693         ca = snd_hdac_channel_allocation(&codec->core,
 694                         eld->info.spk_alloc, channels,
 695                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 696
 697         active_channels = snd_hdac_get_active_channels(ca);
 698
 699         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 700                                                 active_channels);
 701
 702         /*
 703          * always configure channel mapping, it may have been changed by the
 704          * user in the meantime
 705          */
 706         snd_hdac_setup_channel_mapping(&spec->chmap,
 707                                 pin_nid, non_pcm, ca, channels,
 708                                 per_pin->chmap, per_pin->chmap_set);
 709
 710         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
 711                                       eld->info.conn_type);
 712
 713         per_pin->non_pcm = non_pcm;
 714 }
 715
 716 /*
 717  * Unsolicited events
 718  */
 719
 720 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 721
 722 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid)
 723 {
 724         struct hdmi_spec *spec = codec->spec;
 725         int pin_idx = pin_nid_to_pin_index(codec, nid);
 726
 727         if (pin_idx < 0)
 728                 return;
 729         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
 730                 snd_hda_jack_report_sync(codec);
 731 }
 732
 733 static void jack_callback(struct hda_codec *codec,
 734                           struct hda_jack_callback *jack)
 735 {
 736         check_presence_and_report(codec, jack->nid);
 737 }
 738
 739 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 740 {
 741         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 742         struct hda_jack_tbl *jack;
 743         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 744
 745         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
 746         if (!jack)
 747                 return;
 748         jack->jack_dirty = 1;
 749
 750         codec_dbg(codec,
 751                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 752                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
 753                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 754
 755         check_presence_and_report(codec, jack->nid);
 756 }
 757
 758 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 759 {
 760         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 761         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 762         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 763         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 764
 765         codec_info(codec,
 766                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 767                 codec->addr,
 768                 tag,
 769                 subtag,
 770                 cp_state,
 771                 cp_ready);
 772
 773         /* TODO */
 774         if (cp_state)
 775                 ;
 776         if (cp_ready)
 777                 ;
 778 }
 779
 780
 781 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 782 {
 783         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 784         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 785
 786         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
 787                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 788                 return;
 789         }
 790
 791         if (subtag == 0)
 792                 hdmi_intrinsic_event(codec, res);
 793         else
 794                 hdmi_non_intrinsic_event(codec, res);
 795 }
 796
 797 static void haswell_verify_D0(struct hda_codec *codec,
 798                 hda_nid_t cvt_nid, hda_nid_t nid)
 799 {
 800         int pwr;
 801
 802         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 803          * thus pins could only choose converter 0 for use. Make sure the
 804          * converters are in correct power state */
 805         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 806                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 807
 808         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 809                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 810                                     AC_PWRST_D0);
 811                 msleep(40);
 812                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 813                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 814                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 815         }
 816 }
 817
 818 /*
 819  * Callbacks
 820  */
 821
 822 /* HBR should be Non-PCM, 8 channels */
 823 #define is_hbr_format(format) \
 824         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 825
 826 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 827                               bool hbr)
 828 {
 829         int pinctl, new_pinctl;
 830
 831         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 832                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 833                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 834
 835                 if (pinctl < 0)
 836                         return hbr ? -EINVAL : 0;
 837
 838                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 839                 if (hbr)
 840                         new_pinctl |= AC_PINCTL_EPT_HBR;
 841                 else
 842                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 843
 844                 codec_dbg(codec,
 845                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 846                             pin_nid,
 847                             pinctl == new_pinctl ? "" : "new-",
 848                             new_pinctl);
 849
 850                 if (pinctl != new_pinctl)
 851                         snd_hda_codec_write(codec, pin_nid, 0,
 852                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 853                                             new_pinctl);
 854         } else if (hbr)
 855                 return -EINVAL;
 856
 857         return 0;
 858 }
 859
 860 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 861                               hda_nid_t pin_nid, u32 stream_tag, int format)
 862 {
 863         struct hdmi_spec *spec = codec->spec;
 864         int err;
 865
 866         if (is_haswell_plus(codec))
 867                 haswell_verify_D0(codec, cvt_nid, pin_nid);
 868
 869         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
 870
 871         if (err) {
 872                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 873                 return err;
 874         }
 875
 876         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 877         return 0;
 878 }
 879
 880 /* Try to find an available converter
 881  * If pin_idx is less then zero, just try to find an available converter.
 882  * Otherwise, try to find an available converter and get the cvt mux index
 883  * of the pin.
 884  */
 885 static int hdmi_choose_cvt(struct hda_codec *codec,
 886                         int pin_idx, int *cvt_id, int *mux_id)
 887 {
 888         struct hdmi_spec *spec = codec->spec;
 889         struct hdmi_spec_per_pin *per_pin;
 890         struct hdmi_spec_per_cvt *per_cvt = NULL;
 891         int cvt_idx, mux_idx = 0;
 892
 893         /* pin_idx < 0 means no pin will be bound to the converter */
 894         if (pin_idx < 0)
 895                 per_pin = NULL;
 896         else
 897                 per_pin = get_pin(spec, pin_idx);
 898
 899         /* Dynamically assign converter to stream */
 900         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 901                 per_cvt = get_cvt(spec, cvt_idx);
 902
 903                 /* Must not already be assigned */
 904                 if (per_cvt->assigned)
 905                         continue;
 906                 if (per_pin == NULL)
 907                         break;
 908                 /* Must be in pin's mux's list of converters */
 909                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 910                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 911                                 break;
 912                 /* Not in mux list */
 913                 if (mux_idx == per_pin->num_mux_nids)
 914                         continue;
 915                 break;
 916         }
 917
 918         /* No free converters */
 919         if (cvt_idx == spec->num_cvts)
 920                 return -EBUSY;
 921
 922         if (per_pin != NULL)
 923                 per_pin->mux_idx = mux_idx;
 924
 925         if (cvt_id)
 926                 *cvt_id = cvt_idx;
 927         if (mux_id)
 928                 *mux_id = mux_idx;
 929
 930         return 0;
 931 }
 932
 933 /* Assure the pin select the right convetor */
 934 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
 935                         struct hdmi_spec_per_pin *per_pin)
 936 {
 937         hda_nid_t pin_nid = per_pin->pin_nid;
 938         int mux_idx, curr;
 939
 940         mux_idx = per_pin->mux_idx;
 941         curr = snd_hda_codec_read(codec, pin_nid, 0,
 942                                           AC_VERB_GET_CONNECT_SEL, 0);
 943         if (curr != mux_idx)
 944                 snd_hda_codec_write_cache(codec, pin_nid, 0,
 945                                             AC_VERB_SET_CONNECT_SEL,
 946                                             mux_idx);
 947 }
 948
 949 /* get the mux index for the converter of the pins
 950  * converter's mux index is the same for all pins on Intel platform
 951  */
 952 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
 953                         hda_nid_t cvt_nid)
 954 {
 955         int i;
 956
 957         for (i = 0; i < spec->num_cvts; i++)
 958                 if (spec->cvt_nids[i] == cvt_nid)
 959                         return i;
 960         return -EINVAL;
 961 }
 962
 963 /* Intel HDMI workaround to fix audio routing issue:
 964  * For some Intel display codecs, pins share the same connection list.
 965  * So a conveter can be selected by multiple pins and playback on any of these
 966  * pins will generate sound on the external display, because audio flows from
 967  * the same converter to the display pipeline. Also muting one pin may make
 968  * other pins have no sound output.
 969  * So this function assures that an assigned converter for a pin is not selected
 970  * by any other pins.
 971  */
 972 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
 973                         hda_nid_t pin_nid, int mux_idx)
 974 {
 975         struct hdmi_spec *spec = codec->spec;
 976         hda_nid_t nid;
 977         int cvt_idx, curr;
 978         struct hdmi_spec_per_cvt *per_cvt;
 979
 980         /* configure all pins, including "no physical connection" ones */
 981         for_each_hda_codec_node(nid, codec) {
 982                 unsigned int wid_caps = get_wcaps(codec, nid);
 983                 unsigned int wid_type = get_wcaps_type(wid_caps);
 984
 985                 if (wid_type != AC_WID_PIN)
 986                         continue;
 987
 988                 if (nid == pin_nid)
 989                         continue;
 990
 991                 curr = snd_hda_codec_read(codec, nid, 0,
 992                                           AC_VERB_GET_CONNECT_SEL, 0);
 993                 if (curr != mux_idx)
 994                         continue;
 995
 996                 /* choose an unassigned converter. The conveters in the
 997                  * connection list are in the same order as in the codec.
 998                  */
 999                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1000                         per_cvt = get_cvt(spec, cvt_idx);
1001                         if (!per_cvt->assigned) {
1002                                 codec_dbg(codec,
1003                                           "choose cvt %d for pin nid %d\n",
1004                                         cvt_idx, nid);
1005                                 snd_hda_codec_write_cache(codec, nid, 0,
1006                                             AC_VERB_SET_CONNECT_SEL,
1007                                             cvt_idx);
1008                                 break;
1009                         }
1010                 }
1011         }
1012 }
1013
1014 /* A wrapper of intel_not_share_asigned_cvt() */
1015 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1016                         hda_nid_t pin_nid, hda_nid_t cvt_nid)
1017 {
1018         int mux_idx;
1019         struct hdmi_spec *spec = codec->spec;
1020
1021         if (!is_haswell_plus(codec) && !is_valleyview_plus(codec))
1022                 return;
1023
1024         /* On Intel platform, the mapping of converter nid to
1025          * mux index of the pins are always the same.
1026          * The pin nid may be 0, this means all pins will not
1027          * share the converter.
1028          */
1029         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1030         if (mux_idx >= 0)
1031                 intel_not_share_assigned_cvt(codec, pin_nid, mux_idx);
1032 }
1033
1034 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1035  * in dyn_pcm_assign mode.
1036  */
1037 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1038                          struct hda_codec *codec,
1039                          struct snd_pcm_substream *substream)
1040 {
1041         struct hdmi_spec *spec = codec->spec;
1042         struct snd_pcm_runtime *runtime = substream->runtime;
1043         int cvt_idx, pcm_idx;
1044         struct hdmi_spec_per_cvt *per_cvt = NULL;
1045         int err;
1046
1047         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1048         if (pcm_idx < 0)
1049                 return -EINVAL;
1050
1051         err = hdmi_choose_cvt(codec, -1, &cvt_idx, NULL);
1052         if (err)
1053                 return err;
1054
1055         per_cvt = get_cvt(spec, cvt_idx);
1056         per_cvt->assigned = 1;
1057         hinfo->nid = per_cvt->cvt_nid;
1058
1059         intel_not_share_assigned_cvt_nid(codec, 0, per_cvt->cvt_nid);
1060
1061         set_bit(pcm_idx, &spec->pcm_in_use);
1062         /* todo: setup spdif ctls assign */
1063
1064         /* Initially set the converter's capabilities */
1065         hinfo->channels_min = per_cvt->channels_min;
1066         hinfo->channels_max = per_cvt->channels_max;
1067         hinfo->rates = per_cvt->rates;
1068         hinfo->formats = per_cvt->formats;
1069         hinfo->maxbps = per_cvt->maxbps;
1070
1071         /* Store the updated parameters */
1072         runtime->hw.channels_min = hinfo->channels_min;
1073         runtime->hw.channels_max = hinfo->channels_max;
1074         runtime->hw.formats = hinfo->formats;
1075         runtime->hw.rates = hinfo->rates;
1076
1077         snd_pcm_hw_constraint_step(substream->runtime, 0,
1078                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1079         return 0;
1080 }
1081
1082 /*
1083  * HDA PCM callbacks
1084  */
1085 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1086                          struct hda_codec *codec,
1087                          struct snd_pcm_substream *substream)
1088 {
1089         struct hdmi_spec *spec = codec->spec;
1090         struct snd_pcm_runtime *runtime = substream->runtime;
1091         int pin_idx, cvt_idx, pcm_idx, mux_idx = 0;
1092         struct hdmi_spec_per_pin *per_pin;
1093         struct hdmi_eld *eld;
1094         struct hdmi_spec_per_cvt *per_cvt = NULL;
1095         int err;
1096
1097         /* Validate hinfo */
1098         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1099         if (pcm_idx < 0)
1100                 return -EINVAL;
1101
1102         mutex_lock(&spec->pcm_lock);
1103         pin_idx = hinfo_to_pin_index(codec, hinfo);
1104         if (!spec->dyn_pcm_assign) {
1105                 if (snd_BUG_ON(pin_idx < 0)) {
1106                         mutex_unlock(&spec->pcm_lock);
1107                         return -EINVAL;
1108                 }
1109         } else {
1110                 /* no pin is assigned to the PCM
1111                  * PA need pcm open successfully when probe
1112                  */
1113                 if (pin_idx < 0) {
1114                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1115                         mutex_unlock(&spec->pcm_lock);
1116                         return err;
1117                 }
1118         }
1119
1120         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1121         if (err < 0) {
1122                 mutex_unlock(&spec->pcm_lock);
1123                 return err;
1124         }
1125
1126         per_cvt = get_cvt(spec, cvt_idx);
1127         /* Claim converter */
1128         per_cvt->assigned = 1;
1129
1130         set_bit(pcm_idx, &spec->pcm_in_use);
1131         per_pin = get_pin(spec, pin_idx);
1132         per_pin->cvt_nid = per_cvt->cvt_nid;
1133         hinfo->nid = per_cvt->cvt_nid;
1134
1135         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1136                             AC_VERB_SET_CONNECT_SEL,
1137                             mux_idx);
1138
1139         /* configure unused pins to choose other converters */
1140         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
1141                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1142
1143         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1144
1145         /* Initially set the converter's capabilities */
1146         hinfo->channels_min = per_cvt->channels_min;
1147         hinfo->channels_max = per_cvt->channels_max;
1148         hinfo->rates = per_cvt->rates;
1149         hinfo->formats = per_cvt->formats;
1150         hinfo->maxbps = per_cvt->maxbps;
1151
1152         eld = &per_pin->sink_eld;
1153         /* Restrict capabilities by ELD if this isn't disabled */
1154         if (!static_hdmi_pcm && eld->eld_valid) {
1155                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1156                 if (hinfo->channels_min > hinfo->channels_max ||
1157                     !hinfo->rates || !hinfo->formats) {
1158                         per_cvt->assigned = 0;
1159                         hinfo->nid = 0;
1160                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1161                         mutex_unlock(&spec->pcm_lock);
1162                         return -ENODEV;
1163                 }
1164         }
1165
1166         mutex_unlock(&spec->pcm_lock);
1167         /* Store the updated parameters */
1168         runtime->hw.channels_min = hinfo->channels_min;
1169         runtime->hw.channels_max = hinfo->channels_max;
1170         runtime->hw.formats = hinfo->formats;
1171         runtime->hw.rates = hinfo->rates;
1172
1173         snd_pcm_hw_constraint_step(substream->runtime, 0,
1174                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1175         return 0;
1176 }
1177
1178 /*
1179  * HDA/HDMI auto parsing
1180  */
1181 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1182 {
1183         struct hdmi_spec *spec = codec->spec;
1184         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1185         hda_nid_t pin_nid = per_pin->pin_nid;
1186
1187         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1188                 codec_warn(codec,
1189                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1190                            pin_nid, get_wcaps(codec, pin_nid));
1191                 return -EINVAL;
1192         }
1193
1194         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1195                                                         per_pin->mux_nids,
1196                                                         HDA_MAX_CONNECTIONS);
1197
1198         return 0;
1199 }
1200
1201 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1202                                 struct hdmi_spec_per_pin *per_pin)
1203 {
1204         int i;
1205
1206         /* try the prefer PCM */
1207         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1208                 return per_pin->pin_nid_idx;
1209
1210         /* have a second try; check the "reserved area" over num_pins */
1211         for (i = spec->num_pins; i < spec->pcm_used; i++) {
1212                 if (!test_bit(i, &spec->pcm_bitmap))
1213                         return i;
1214         }
1215
1216         /* the last try; check the empty slots in pins */
1217         for (i = 0; i < spec->num_pins; i++) {
1218                 if (!test_bit(i, &spec->pcm_bitmap))
1219                         return i;
1220         }
1221         return -EBUSY;
1222 }
1223
1224 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1225                                 struct hdmi_spec_per_pin *per_pin)
1226 {
1227         int idx;
1228
1229         /* pcm already be attached to the pin */
1230         if (per_pin->pcm)
1231                 return;
1232         idx = hdmi_find_pcm_slot(spec, per_pin);
1233         if (idx == -EBUSY)
1234                 return;
1235         per_pin->pcm_idx = idx;
1236         per_pin->pcm = get_hdmi_pcm(spec, idx);
1237         set_bit(idx, &spec->pcm_bitmap);
1238 }
1239
1240 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1241                                 struct hdmi_spec_per_pin *per_pin)
1242 {
1243         int idx;
1244
1245         /* pcm already be detached from the pin */
1246         if (!per_pin->pcm)
1247                 return;
1248         idx = per_pin->pcm_idx;
1249         per_pin->pcm_idx = -1;
1250         per_pin->pcm = NULL;
1251         if (idx >= 0 && idx < spec->pcm_used)
1252                 clear_bit(idx, &spec->pcm_bitmap);
1253 }
1254
1255 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1256                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1257 {
1258         int mux_idx;
1259
1260         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1261                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1262                         break;
1263         return mux_idx;
1264 }
1265
1266 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1267
1268 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1269                            struct hdmi_spec_per_pin *per_pin)
1270 {
1271         struct hda_codec *codec = per_pin->codec;
1272         struct hda_pcm *pcm;
1273         struct hda_pcm_stream *hinfo;
1274         struct snd_pcm_substream *substream;
1275         int mux_idx;
1276         bool non_pcm;
1277
1278         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1279                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1280         else
1281                 return;
1282         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1283                 return;
1284
1285         /* hdmi audio only uses playback and one substream */
1286         hinfo = pcm->stream;
1287         substream = pcm->pcm->streams[0].substream;
1288
1289         per_pin->cvt_nid = hinfo->nid;
1290
1291         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1292         if (mux_idx < per_pin->num_mux_nids)
1293                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1294                                 AC_VERB_SET_CONNECT_SEL,
1295                                 mux_idx);
1296         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1297
1298         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1299         if (substream->runtime)
1300                 per_pin->channels = substream->runtime->channels;
1301         per_pin->setup = true;
1302         per_pin->mux_idx = mux_idx;
1303
1304         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1305 }
1306
1307 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1308                            struct hdmi_spec_per_pin *per_pin)
1309 {
1310         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1311                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1312
1313         per_pin->chmap_set = false;
1314         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1315
1316         per_pin->setup = false;
1317         per_pin->channels = 0;
1318 }
1319
1320 /* update per_pin ELD from the given new ELD;
1321  * setup info frame and notification accordingly
1322  */
1323 static void update_eld(struct hda_codec *codec,
1324                        struct hdmi_spec_per_pin *per_pin,
1325                        struct hdmi_eld *eld)
1326 {
1327         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1328         struct hdmi_spec *spec = codec->spec;
1329         bool old_eld_valid = pin_eld->eld_valid;
1330         bool eld_changed;
1331         int pcm_idx = -1;
1332
1333         /* for monitor disconnection, save pcm_idx firstly */
1334         pcm_idx = per_pin->pcm_idx;
1335         if (spec->dyn_pcm_assign) {
1336                 if (eld->eld_valid) {
1337                         hdmi_attach_hda_pcm(spec, per_pin);
1338                         hdmi_pcm_setup_pin(spec, per_pin);
1339                 } else {
1340                         hdmi_pcm_reset_pin(spec, per_pin);
1341                         hdmi_detach_hda_pcm(spec, per_pin);
1342                 }
1343         }
1344         /* if pcm_idx == -1, it means this is in monitor connection event
1345          * we can get the correct pcm_idx now.
1346          */
1347         if (pcm_idx == -1)
1348                 pcm_idx = per_pin->pcm_idx;
1349
1350         if (eld->eld_valid)
1351                 snd_hdmi_show_eld(codec, &eld->info);
1352
1353         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1354         if (eld->eld_valid && pin_eld->eld_valid)
1355                 if (pin_eld->eld_size != eld->eld_size ||
1356                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1357                            eld->eld_size) != 0)
1358                         eld_changed = true;
1359
1360         pin_eld->monitor_present = eld->monitor_present;
1361         pin_eld->eld_valid = eld->eld_valid;
1362         pin_eld->eld_size = eld->eld_size;
1363         if (eld->eld_valid)
1364                 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1365         pin_eld->info = eld->info;
1366
1367         /*
1368          * Re-setup pin and infoframe. This is needed e.g. when
1369          * - sink is first plugged-in
1370          * - transcoder can change during stream playback on Haswell
1371          *   and this can make HW reset converter selection on a pin.
1372          */
1373         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1374                 if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1375                         intel_verify_pin_cvt_connect(codec, per_pin);
1376                         intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
1377                                                      per_pin->mux_idx);
1378                 }
1379
1380                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1381         }
1382
1383         if (eld_changed && pcm_idx >= 0)
1384                 snd_ctl_notify(codec->card,
1385                                SNDRV_CTL_EVENT_MASK_VALUE |
1386                                SNDRV_CTL_EVENT_MASK_INFO,
1387                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1388 }
1389
1390 /* update ELD and jack state via HD-audio verbs */
1391 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1392                                          int repoll)
1393 {
1394         struct hda_jack_tbl *jack;
1395         struct hda_codec *codec = per_pin->codec;
1396         struct hdmi_spec *spec = codec->spec;
1397         struct hdmi_eld *eld = &spec->temp_eld;
1398         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1399         hda_nid_t pin_nid = per_pin->pin_nid;
1400         /*
1401          * Always execute a GetPinSense verb here, even when called from
1402          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1403          * response's PD bit is not the real PD value, but indicates that
1404          * the real PD value changed. An older version of the HD-audio
1405          * specification worked this way. Hence, we just ignore the data in
1406          * the unsolicited response to avoid custom WARs.
1407          */
1408         int present;
1409         bool ret;
1410         bool do_repoll = false;
1411
1412         present = snd_hda_pin_sense(codec, pin_nid);
1413
1414         mutex_lock(&per_pin->lock);
1415         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1416         if (pin_eld->monitor_present)
1417                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1418         else
1419                 eld->eld_valid = false;
1420
1421         codec_dbg(codec,
1422                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1423                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1424
1425         if (eld->eld_valid) {
1426                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1427                                                      &eld->eld_size) < 0)
1428                         eld->eld_valid = false;
1429                 else {
1430                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1431                                                     eld->eld_size) < 0)
1432                                 eld->eld_valid = false;
1433                 }
1434                 if (!eld->eld_valid && repoll)
1435                         do_repoll = true;
1436         }
1437
1438         if (do_repoll)
1439                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1440         else
1441                 update_eld(codec, per_pin, eld);
1442
1443         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1444
1445         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1446         if (jack)
1447                 jack->block_report = !ret;
1448
1449         mutex_unlock(&per_pin->lock);
1450         return ret;
1451 }
1452
1453 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1454                                  struct hdmi_spec_per_pin *per_pin)
1455 {
1456         struct hdmi_spec *spec = codec->spec;
1457         struct snd_jack *jack = NULL;
1458         struct hda_jack_tbl *jack_tbl;
1459
1460         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1461          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1462          * NULL even after snd_hda_jack_tbl_clear() is called to
1463          * free snd_jack. This may cause access invalid memory
1464          * when calling snd_jack_report
1465          */
1466         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1467                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1468         else if (!spec->dyn_pcm_assign) {
1469                 jack_tbl = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1470                 if (jack_tbl)
1471                         jack = jack_tbl->jack;
1472         }
1473         return jack;
1474 }
1475
1476 /* update ELD and jack state via audio component */
1477 static void sync_eld_via_acomp(struct hda_codec *codec,
1478                                struct hdmi_spec_per_pin *per_pin)
1479 {
1480         struct hdmi_spec *spec = codec->spec;
1481         struct hdmi_eld *eld = &spec->temp_eld;
1482         struct snd_jack *jack = NULL;
1483         int size;
1484
1485         mutex_lock(&per_pin->lock);
1486         eld->monitor_present = false;
1487         size = snd_hdac_acomp_get_eld(&codec->bus->core, per_pin->pin_nid,
1488                                       &eld->monitor_present, eld->eld_buffer,
1489                                       ELD_MAX_SIZE);
1490         if (size > 0) {
1491                 size = min(size, ELD_MAX_SIZE);
1492                 if (snd_hdmi_parse_eld(codec, &eld->info,
1493                                        eld->eld_buffer, size) < 0)
1494                         size = -EINVAL;
1495         }
1496
1497         if (size > 0) {
1498                 eld->eld_valid = true;
1499                 eld->eld_size = size;
1500         } else {
1501                 eld->eld_valid = false;
1502                 eld->eld_size = 0;
1503         }
1504
1505         /* pcm_idx >=0 before update_eld() means it is in monitor
1506          * disconnected event. Jack must be fetched before update_eld()
1507          */
1508         jack = pin_idx_to_jack(codec, per_pin);
1509         update_eld(codec, per_pin, eld);
1510         if (jack == NULL)
1511                 jack = pin_idx_to_jack(codec, per_pin);
1512         if (jack == NULL)
1513                 goto unlock;
1514         snd_jack_report(jack,
1515                         eld->monitor_present ? SND_JACK_AVOUT : 0);
1516  unlock:
1517         mutex_unlock(&per_pin->lock);
1518 }
1519
1520 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1521 {
1522         struct hda_codec *codec = per_pin->codec;
1523         struct hdmi_spec *spec = codec->spec;
1524         int ret;
1525
1526         /* no temporary power up/down needed for component notifier */
1527         if (!codec_has_acomp(codec))
1528                 snd_hda_power_up_pm(codec);
1529
1530         mutex_lock(&spec->pcm_lock);
1531         if (codec_has_acomp(codec)) {
1532                 sync_eld_via_acomp(codec, per_pin);
1533                 ret = false; /* don't call snd_hda_jack_report_sync() */
1534         } else {
1535                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1536         }
1537         mutex_unlock(&spec->pcm_lock);
1538
1539         if (!codec_has_acomp(codec))
1540                 snd_hda_power_down_pm(codec);
1541
1542         return ret;
1543 }
1544
1545 static void hdmi_repoll_eld(struct work_struct *work)
1546 {
1547         struct hdmi_spec_per_pin *per_pin =
1548         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1549
1550         if (per_pin->repoll_count++ > 6)
1551                 per_pin->repoll_count = 0;
1552
1553         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1554                 snd_hda_jack_report_sync(per_pin->codec);
1555 }
1556
1557 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1558                                              hda_nid_t nid);
1559
1560 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1561 {
1562         struct hdmi_spec *spec = codec->spec;
1563         unsigned int caps, config;
1564         int pin_idx;
1565         struct hdmi_spec_per_pin *per_pin;
1566         int err;
1567
1568         caps = snd_hda_query_pin_caps(codec, pin_nid);
1569         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1570                 return 0;
1571
1572         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1573         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1574                 return 0;
1575
1576         if (is_haswell_plus(codec))
1577                 intel_haswell_fixup_connect_list(codec, pin_nid);
1578
1579         pin_idx = spec->num_pins;
1580         per_pin = snd_array_new(&spec->pins);
1581         if (!per_pin)
1582                 return -ENOMEM;
1583
1584         per_pin->pin_nid = pin_nid;
1585         per_pin->non_pcm = false;
1586         if (spec->dyn_pcm_assign)
1587                 per_pin->pcm_idx = -1;
1588         else {
1589                 per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1590                 per_pin->pcm_idx = pin_idx;
1591         }
1592         per_pin->pin_nid_idx = pin_idx;
1593
1594         err = hdmi_read_pin_conn(codec, pin_idx);
1595         if (err < 0)
1596                 return err;
1597
1598         spec->num_pins++;
1599
1600         return 0;
1601 }
1602
1603 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1604 {
1605         struct hdmi_spec *spec = codec->spec;
1606         struct hdmi_spec_per_cvt *per_cvt;
1607         unsigned int chans;
1608         int err;
1609
1610         chans = get_wcaps(codec, cvt_nid);
1611         chans = get_wcaps_channels(chans);
1612
1613         per_cvt = snd_array_new(&spec->cvts);
1614         if (!per_cvt)
1615                 return -ENOMEM;
1616
1617         per_cvt->cvt_nid = cvt_nid;
1618         per_cvt->channels_min = 2;
1619         if (chans <= 16) {
1620                 per_cvt->channels_max = chans;
1621                 if (chans > spec->chmap.channels_max)
1622                         spec->chmap.channels_max = chans;
1623         }
1624
1625         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1626                                           &per_cvt->rates,
1627                                           &per_cvt->formats,
1628                                           &per_cvt->maxbps);
1629         if (err < 0)
1630                 return err;
1631
1632         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1633                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1634         spec->num_cvts++;
1635
1636         return 0;
1637 }
1638
1639 static int hdmi_parse_codec(struct hda_codec *codec)
1640 {
1641         hda_nid_t nid;
1642         int i, nodes;
1643
1644         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1645         if (!nid || nodes < 0) {
1646                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1647                 return -EINVAL;
1648         }
1649
1650         for (i = 0; i < nodes; i++, nid++) {
1651                 unsigned int caps;
1652                 unsigned int type;
1653
1654                 caps = get_wcaps(codec, nid);
1655                 type = get_wcaps_type(caps);
1656
1657                 if (!(caps & AC_WCAP_DIGITAL))
1658                         continue;
1659
1660                 switch (type) {
1661                 case AC_WID_AUD_OUT:
1662                         hdmi_add_cvt(codec, nid);
1663                         break;
1664                 case AC_WID_PIN:
1665                         hdmi_add_pin(codec, nid);
1666                         break;
1667                 }
1668         }
1669
1670         return 0;
1671 }
1672
1673 /*
1674  */
1675 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1676 {
1677         struct hda_spdif_out *spdif;
1678         bool non_pcm;
1679
1680         mutex_lock(&codec->spdif_mutex);
1681         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1682         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1683         mutex_unlock(&codec->spdif_mutex);
1684         return non_pcm;
1685 }
1686
1687 /*
1688  * HDMI callbacks
1689  */
1690
1691 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1692                                            struct hda_codec *codec,
1693                                            unsigned int stream_tag,
1694                                            unsigned int format,
1695                                            struct snd_pcm_substream *substream)
1696 {
1697         hda_nid_t cvt_nid = hinfo->nid;
1698         struct hdmi_spec *spec = codec->spec;
1699         int pin_idx;
1700         struct hdmi_spec_per_pin *per_pin;
1701         hda_nid_t pin_nid;
1702         struct snd_pcm_runtime *runtime = substream->runtime;
1703         bool non_pcm;
1704         int pinctl;
1705         int err;
1706
1707         mutex_lock(&spec->pcm_lock);
1708         pin_idx = hinfo_to_pin_index(codec, hinfo);
1709         if (spec->dyn_pcm_assign && pin_idx < 0) {
1710                 /* when dyn_pcm_assign and pcm is not bound to a pin
1711                  * skip pin setup and return 0 to make audio playback
1712                  * be ongoing
1713                  */
1714                 intel_not_share_assigned_cvt_nid(codec, 0, cvt_nid);
1715                 snd_hda_codec_setup_stream(codec, cvt_nid,
1716                                         stream_tag, 0, format);
1717                 mutex_unlock(&spec->pcm_lock);
1718                 return 0;
1719         }
1720
1721         if (snd_BUG_ON(pin_idx < 0)) {
1722                 mutex_unlock(&spec->pcm_lock);
1723                 return -EINVAL;
1724         }
1725         per_pin = get_pin(spec, pin_idx);
1726         pin_nid = per_pin->pin_nid;
1727         if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1728                 /* Verify pin:cvt selections to avoid silent audio after S3.
1729                  * After S3, the audio driver restores pin:cvt selections
1730                  * but this can happen before gfx is ready and such selection
1731                  * is overlooked by HW. Thus multiple pins can share a same
1732                  * default convertor and mute control will affect each other,
1733                  * which can cause a resumed audio playback become silent
1734                  * after S3.
1735                  */
1736                 intel_verify_pin_cvt_connect(codec, per_pin);
1737                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
1738         }
1739
1740         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1741         /* Todo: add DP1.2 MST audio support later */
1742         if (codec_has_acomp(codec))
1743                 snd_hdac_sync_audio_rate(&codec->bus->core, pin_nid, runtime->rate);
1744
1745         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1746         mutex_lock(&per_pin->lock);
1747         per_pin->channels = substream->runtime->channels;
1748         per_pin->setup = true;
1749
1750         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1751         mutex_unlock(&per_pin->lock);
1752         if (spec->dyn_pin_out) {
1753                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1754                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1755                 snd_hda_codec_write(codec, pin_nid, 0,
1756                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1757                                     pinctl | PIN_OUT);
1758         }
1759
1760         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
1761                                  stream_tag, format);
1762         mutex_unlock(&spec->pcm_lock);
1763         return err;
1764 }
1765
1766 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1767                                              struct hda_codec *codec,
1768                                              struct snd_pcm_substream *substream)
1769 {
1770         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1771         return 0;
1772 }
1773
1774 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1775                           struct hda_codec *codec,
1776                           struct snd_pcm_substream *substream)
1777 {
1778         struct hdmi_spec *spec = codec->spec;
1779         int cvt_idx, pin_idx, pcm_idx;
1780         struct hdmi_spec_per_cvt *per_cvt;
1781         struct hdmi_spec_per_pin *per_pin;
1782         int pinctl;
1783
1784         if (hinfo->nid) {
1785                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1786                 if (snd_BUG_ON(pcm_idx < 0))
1787                         return -EINVAL;
1788                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1789                 if (snd_BUG_ON(cvt_idx < 0))
1790                         return -EINVAL;
1791                 per_cvt = get_cvt(spec, cvt_idx);
1792
1793                 snd_BUG_ON(!per_cvt->assigned);
1794                 per_cvt->assigned = 0;
1795                 hinfo->nid = 0;
1796
1797                 mutex_lock(&spec->pcm_lock);
1798                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1799                 clear_bit(pcm_idx, &spec->pcm_in_use);
1800                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1801                 if (spec->dyn_pcm_assign && pin_idx < 0) {
1802                         mutex_unlock(&spec->pcm_lock);
1803                         return 0;
1804                 }
1805
1806                 if (snd_BUG_ON(pin_idx < 0)) {
1807                         mutex_unlock(&spec->pcm_lock);
1808                         return -EINVAL;
1809                 }
1810                 per_pin = get_pin(spec, pin_idx);
1811
1812                 if (spec->dyn_pin_out) {
1813                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1814                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1815                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1816                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1817                                             pinctl & ~PIN_OUT);
1818                 }
1819
1820                 mutex_lock(&per_pin->lock);
1821                 per_pin->chmap_set = false;
1822                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1823
1824                 per_pin->setup = false;
1825                 per_pin->channels = 0;
1826                 mutex_unlock(&per_pin->lock);
1827                 mutex_unlock(&spec->pcm_lock);
1828         }
1829
1830         return 0;
1831 }
1832
1833 static const struct hda_pcm_ops generic_ops = {
1834         .open = hdmi_pcm_open,
1835         .close = hdmi_pcm_close,
1836         .prepare = generic_hdmi_playback_pcm_prepare,
1837         .cleanup = generic_hdmi_playback_pcm_cleanup,
1838 };
1839
1840 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
1841                                         unsigned char *chmap)
1842 {
1843         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1844         struct hdmi_spec *spec = codec->spec;
1845         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1846
1847         /* chmap is already set to 0 in caller */
1848         if (!per_pin)
1849                 return;
1850
1851         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
1852 }
1853
1854 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
1855                                 unsigned char *chmap, int prepared)
1856 {
1857         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1858         struct hdmi_spec *spec = codec->spec;
1859         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1860
1861         mutex_lock(&per_pin->lock);
1862         per_pin->chmap_set = true;
1863         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
1864         if (prepared)
1865                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1866         mutex_unlock(&per_pin->lock);
1867 }
1868
1869 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
1870 {
1871         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1872         struct hdmi_spec *spec = codec->spec;
1873         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1874
1875         return per_pin ? true:false;
1876 }
1877
1878 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1879 {
1880         struct hdmi_spec *spec = codec->spec;
1881         int pin_idx;
1882
1883         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1884                 struct hda_pcm *info;
1885                 struct hda_pcm_stream *pstr;
1886
1887                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", pin_idx);
1888                 if (!info)
1889                         return -ENOMEM;
1890
1891                 spec->pcm_rec[pin_idx].pcm = info;
1892                 spec->pcm_used++;
1893                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1894                 info->own_chmap = true;
1895
1896                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1897                 pstr->substreams = 1;
1898                 pstr->ops = generic_ops;
1899                 /* other pstr fields are set in open */
1900         }
1901
1902         return 0;
1903 }
1904
1905 static void free_hdmi_jack_priv(struct snd_jack *jack)
1906 {
1907         struct hdmi_pcm *pcm = jack->private_data;
1908
1909         pcm->jack = NULL;
1910 }
1911
1912 static int add_hdmi_jack_kctl(struct hda_codec *codec,
1913                                struct hdmi_spec *spec,
1914                                int pcm_idx,
1915                                const char *name)
1916 {
1917         struct snd_jack *jack;
1918         int err;
1919
1920         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
1921                            true, false);
1922         if (err < 0)
1923                 return err;
1924
1925         spec->pcm_rec[pcm_idx].jack = jack;
1926         jack->private_data = &spec->pcm_rec[pcm_idx];
1927         jack->private_free = free_hdmi_jack_priv;
1928         return 0;
1929 }
1930
1931 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
1932 {
1933         char hdmi_str[32] = "HDMI/DP";
1934         struct hdmi_spec *spec = codec->spec;
1935         struct hdmi_spec_per_pin *per_pin;
1936         struct hda_jack_tbl *jack;
1937         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
1938         bool phantom_jack;
1939         int ret;
1940
1941         if (pcmdev > 0)
1942                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1943
1944         if (spec->dyn_pcm_assign)
1945                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
1946
1947         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
1948         /* if !dyn_pcm_assign, it must be non-MST mode.
1949          * This means pcms and pins are statically mapped.
1950          * And pcm_idx is pin_idx.
1951          */
1952         per_pin = get_pin(spec, pcm_idx);
1953         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
1954         if (phantom_jack)
1955                 strncat(hdmi_str, " Phantom",
1956                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1957         ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
1958                                     phantom_jack);
1959         if (ret < 0)
1960                 return ret;
1961         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1962         if (jack == NULL)
1963                 return 0;
1964         /* assign jack->jack to pcm_rec[].jack to
1965          * align with dyn_pcm_assign mode
1966          */
1967         spec->pcm_rec[pcm_idx].jack = jack->jack;
1968         return 0;
1969 }
1970
1971 static int generic_hdmi_build_controls(struct hda_codec *codec)
1972 {
1973         struct hdmi_spec *spec = codec->spec;
1974         int err;
1975         int pin_idx, pcm_idx;
1976
1977
1978         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
1979                 err = generic_hdmi_build_jack(codec, pcm_idx);
1980                 if (err < 0)
1981                         return err;
1982
1983                 /* create the spdif for each pcm
1984                  * pin will be bound when monitor is connected
1985                  */
1986                 if (spec->dyn_pcm_assign)
1987                         err = snd_hda_create_dig_out_ctls(codec,
1988                                           0, spec->cvt_nids[0],
1989                                           HDA_PCM_TYPE_HDMI);
1990                 else {
1991                         struct hdmi_spec_per_pin *per_pin =
1992                                 get_pin(spec, pcm_idx);
1993                         err = snd_hda_create_dig_out_ctls(codec,
1994                                                   per_pin->pin_nid,
1995                                                   per_pin->mux_nids[0],
1996                                                   HDA_PCM_TYPE_HDMI);
1997                 }
1998                 if (err < 0)
1999                         return err;
2000                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2001
2002                 /* add control for ELD Bytes */
2003                 err = hdmi_create_eld_ctl(codec, pcm_idx,
2004                                         get_pcm_rec(spec, pcm_idx)->device);
2005                 if (err < 0)
2006                         return err;
2007         }
2008
2009         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2010                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2011
2012                 hdmi_present_sense(per_pin, 0);
2013         }
2014
2015         /* add channel maps */
2016         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2017                 struct hda_pcm *pcm;
2018
2019                 pcm = get_pcm_rec(spec, pcm_idx);
2020                 if (!pcm || !pcm->pcm)
2021                         break;
2022                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2023                 if (err < 0)
2024                         return err;
2025         }
2026
2027         return 0;
2028 }
2029
2030 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2031 {
2032         struct hdmi_spec *spec = codec->spec;
2033         int pin_idx;
2034
2035         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2036                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2037
2038                 per_pin->codec = codec;
2039                 mutex_init(&per_pin->lock);
2040                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2041                 eld_proc_new(per_pin, pin_idx);
2042         }
2043         return 0;
2044 }
2045
2046 static int generic_hdmi_init(struct hda_codec *codec)
2047 {
2048         struct hdmi_spec *spec = codec->spec;
2049         int pin_idx;
2050
2051         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2052                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2053                 hda_nid_t pin_nid = per_pin->pin_nid;
2054
2055                 hdmi_init_pin(codec, pin_nid);
2056                 if (!codec_has_acomp(codec))
2057                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2058                                 codec->jackpoll_interval > 0 ?
2059                                 jack_callback : NULL);
2060         }
2061         return 0;
2062 }
2063
2064 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2065 {
2066         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2067         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2068 }
2069
2070 static void hdmi_array_free(struct hdmi_spec *spec)
2071 {
2072         snd_array_free(&spec->pins);
2073         snd_array_free(&spec->cvts);
2074 }
2075
2076 static void generic_spec_free(struct hda_codec *codec)
2077 {
2078         struct hdmi_spec *spec = codec->spec;
2079
2080         if (spec) {
2081                 hdmi_array_free(spec);
2082                 kfree(spec);
2083                 codec->spec = NULL;
2084         }
2085         codec->dp_mst = false;
2086 }
2087
2088 static void generic_hdmi_free(struct hda_codec *codec)
2089 {
2090         struct hdmi_spec *spec = codec->spec;
2091         int pin_idx, pcm_idx;
2092
2093         if (codec_has_acomp(codec))
2094                 snd_hdac_i915_register_notifier(NULL);
2095
2096         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2097                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2098                 cancel_delayed_work_sync(&per_pin->work);
2099                 eld_proc_free(per_pin);
2100         }
2101
2102         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2103                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2104                         continue;
2105                 if (spec->dyn_pcm_assign)
2106                         snd_device_free(codec->card,
2107                                         spec->pcm_rec[pcm_idx].jack);
2108                 else
2109                         spec->pcm_rec[pcm_idx].jack = NULL;
2110         }
2111
2112         generic_spec_free(codec);
2113 }
2114
2115 #ifdef CONFIG_PM
2116 static int generic_hdmi_resume(struct hda_codec *codec)
2117 {
2118         struct hdmi_spec *spec = codec->spec;
2119         int pin_idx;
2120
2121         codec->patch_ops.init(codec);
2122         regcache_sync(codec->core.regmap);
2123
2124         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2125                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2126                 hdmi_present_sense(per_pin, 1);
2127         }
2128         return 0;
2129 }
2130 #endif
2131
2132 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2133         .init                   = generic_hdmi_init,
2134         .free                   = generic_hdmi_free,
2135         .build_pcms             = generic_hdmi_build_pcms,
2136         .build_controls         = generic_hdmi_build_controls,
2137         .unsol_event            = hdmi_unsol_event,
2138 #ifdef CONFIG_PM
2139         .resume                 = generic_hdmi_resume,
2140 #endif
2141 };
2142
2143 static const struct hdmi_ops generic_standard_hdmi_ops = {
2144         .pin_get_eld                            = snd_hdmi_get_eld,
2145         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2146         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2147         .setup_stream                           = hdmi_setup_stream,
2148 };
2149
2150 /* allocate codec->spec and assign/initialize generic parser ops */
2151 static int alloc_generic_hdmi(struct hda_codec *codec)
2152 {
2153         struct hdmi_spec *spec;
2154
2155         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2156         if (!spec)
2157                 return -ENOMEM;
2158
2159         spec->ops = generic_standard_hdmi_ops;
2160         mutex_init(&spec->pcm_lock);
2161         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2162
2163         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2164         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2165         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2166
2167         codec->spec = spec;
2168         hdmi_array_init(spec, 4);
2169
2170         codec->patch_ops = generic_hdmi_patch_ops;
2171
2172         return 0;
2173 }
2174
2175 /* generic HDMI parser */
2176 static int patch_generic_hdmi(struct hda_codec *codec)
2177 {
2178         int err;
2179
2180         err = alloc_generic_hdmi(codec);
2181         if (err < 0)
2182                 return err;
2183
2184         err = hdmi_parse_codec(codec);
2185         if (err < 0) {
2186                 generic_spec_free(codec);
2187                 return err;
2188         }
2189
2190         generic_hdmi_init_per_pins(codec);
2191         return 0;
2192 }
2193
2194 /*
2195  * Intel codec parsers and helpers
2196  */
2197
2198 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2199                                              hda_nid_t nid)
2200 {
2201         struct hdmi_spec *spec = codec->spec;
2202         hda_nid_t conns[4];
2203         int nconns;
2204
2205         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2206         if (nconns == spec->num_cvts &&
2207             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2208                 return;
2209
2210         /* override pins connection list */
2211         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2212         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2213 }
2214
2215 #define INTEL_VENDOR_NID 0x08
2216 #define INTEL_GET_VENDOR_VERB 0xf81
2217 #define INTEL_SET_VENDOR_VERB 0x781
2218 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2219 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2220
2221 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2222                                           bool update_tree)
2223 {
2224         unsigned int vendor_param;
2225
2226         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2227                                 INTEL_GET_VENDOR_VERB, 0);
2228         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2229                 return;
2230
2231         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2232         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2233                                 INTEL_SET_VENDOR_VERB, vendor_param);
2234         if (vendor_param == -1)
2235                 return;
2236
2237         if (update_tree)
2238                 snd_hda_codec_update_widgets(codec);
2239 }
2240
2241 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2242 {
2243         unsigned int vendor_param;
2244
2245         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2246                                 INTEL_GET_VENDOR_VERB, 0);
2247         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2248                 return;
2249
2250         /* enable DP1.2 mode */
2251         vendor_param |= INTEL_EN_DP12;
2252         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2253         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2254                                 INTEL_SET_VENDOR_VERB, vendor_param);
2255 }
2256
2257 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2258  * Otherwise you may get severe h/w communication errors.
2259  */
2260 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2261                                 unsigned int power_state)
2262 {
2263         if (power_state == AC_PWRST_D0) {
2264                 intel_haswell_enable_all_pins(codec, false);
2265                 intel_haswell_fixup_enable_dp12(codec);
2266         }
2267
2268         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2269         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2270 }
2271
2272 static void intel_pin_eld_notify(void *audio_ptr, int port)
2273 {
2274         struct hda_codec *codec = audio_ptr;
2275         int pin_nid = port + 0x04;
2276
2277         /* we assume only from port-B to port-D */
2278         if (port < 1 || port > 3)
2279                 return;
2280
2281         /* skip notification during system suspend (but not in runtime PM);
2282          * the state will be updated at resume
2283          */
2284         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2285                 return;
2286         /* ditto during suspend/resume process itself */
2287         if (atomic_read(&(codec)->core.in_pm))
2288                 return;
2289
2290         check_presence_and_report(codec, pin_nid);
2291 }
2292
2293 /* register i915 component pin_eld_notify callback */
2294 static void register_i915_notifier(struct hda_codec *codec)
2295 {
2296         struct hdmi_spec *spec = codec->spec;
2297
2298         spec->use_acomp_notifier = true;
2299         spec->i915_audio_ops.audio_ptr = codec;
2300         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2301          * will call pin_eld_notify with using audio_ptr pointer
2302          * We need make sure audio_ptr is really setup
2303          */
2304         wmb();
2305         spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2306         snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2307 }
2308
2309 /* Intel Haswell and onwards; audio component with eld notifier */
2310 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2311 {
2312         struct hdmi_spec *spec;
2313         int err;
2314
2315         /* HSW+ requires i915 binding */
2316         if (!codec->bus->core.audio_component) {
2317                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2318                 return -ENODEV;
2319         }
2320
2321         err = alloc_generic_hdmi(codec);
2322         if (err < 0)
2323                 return err;
2324         spec = codec->spec;
2325
2326         intel_haswell_enable_all_pins(codec, true);
2327         intel_haswell_fixup_enable_dp12(codec);
2328
2329         /* For Haswell/Broadwell, the controller is also in the power well and
2330          * can cover the codec power request, and so need not set this flag.
2331          */
2332         if (!is_haswell(codec) && !is_broadwell(codec))
2333                 codec->core.link_power_control = 1;
2334
2335         codec->patch_ops.set_power_state = haswell_set_power_state;
2336         codec->dp_mst = true;
2337         codec->depop_delay = 0;
2338         codec->auto_runtime_pm = 1;
2339
2340         err = hdmi_parse_codec(codec);
2341         if (err < 0) {
2342                 generic_spec_free(codec);
2343                 return err;
2344         }
2345
2346         generic_hdmi_init_per_pins(codec);
2347         register_i915_notifier(codec);
2348         return 0;
2349 }
2350
2351 /* Intel Baytrail and Braswell; without get_eld notifier */
2352 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2353 {
2354         struct hdmi_spec *spec;
2355         int err;
2356
2357         /* requires i915 binding */
2358         if (!codec->bus->core.audio_component) {
2359                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2360                 return -ENODEV;
2361         }
2362
2363         err = alloc_generic_hdmi(codec);
2364         if (err < 0)
2365                 return err;
2366         spec = codec->spec;
2367
2368         /* For Valleyview/Cherryview, only the display codec is in the display
2369          * power well and can use link_power ops to request/release the power.
2370          */
2371         codec->core.link_power_control = 1;
2372
2373         codec->depop_delay = 0;
2374         codec->auto_runtime_pm = 1;
2375
2376         err = hdmi_parse_codec(codec);
2377         if (err < 0) {
2378                 generic_spec_free(codec);
2379                 return err;
2380         }
2381
2382         generic_hdmi_init_per_pins(codec);
2383         return 0;
2384 }
2385
2386 /*
2387  * Shared non-generic implementations
2388  */
2389
2390 static int simple_playback_build_pcms(struct hda_codec *codec)
2391 {
2392         struct hdmi_spec *spec = codec->spec;
2393         struct hda_pcm *info;
2394         unsigned int chans;
2395         struct hda_pcm_stream *pstr;
2396         struct hdmi_spec_per_cvt *per_cvt;
2397
2398         per_cvt = get_cvt(spec, 0);
2399         chans = get_wcaps(codec, per_cvt->cvt_nid);
2400         chans = get_wcaps_channels(chans);
2401
2402         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2403         if (!info)
2404                 return -ENOMEM;
2405         spec->pcm_rec[0].pcm = info;
2406         info->pcm_type = HDA_PCM_TYPE_HDMI;
2407         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2408         *pstr = spec->pcm_playback;
2409         pstr->nid = per_cvt->cvt_nid;
2410         if (pstr->channels_max <= 2 && chans && chans <= 16)
2411                 pstr->channels_max = chans;
2412
2413         return 0;
2414 }
2415
2416 /* unsolicited event for jack sensing */
2417 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2418                                     unsigned int res)
2419 {
2420         snd_hda_jack_set_dirty_all(codec);
2421         snd_hda_jack_report_sync(codec);
2422 }
2423
2424 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2425  * as long as spec->pins[] is set correctly
2426  */
2427 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2428
2429 static int simple_playback_build_controls(struct hda_codec *codec)
2430 {
2431         struct hdmi_spec *spec = codec->spec;
2432         struct hdmi_spec_per_cvt *per_cvt;
2433         int err;
2434
2435         per_cvt = get_cvt(spec, 0);
2436         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2437                                           per_cvt->cvt_nid,
2438                                           HDA_PCM_TYPE_HDMI);
2439         if (err < 0)
2440                 return err;
2441         return simple_hdmi_build_jack(codec, 0);
2442 }
2443
2444 static int simple_playback_init(struct hda_codec *codec)
2445 {
2446         struct hdmi_spec *spec = codec->spec;
2447         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2448         hda_nid_t pin = per_pin->pin_nid;
2449
2450         snd_hda_codec_write(codec, pin, 0,
2451                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2452         /* some codecs require to unmute the pin */
2453         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2454                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2455                                     AMP_OUT_UNMUTE);
2456         snd_hda_jack_detect_enable(codec, pin);
2457         return 0;
2458 }
2459
2460 static void simple_playback_free(struct hda_codec *codec)
2461 {
2462         struct hdmi_spec *spec = codec->spec;
2463
2464         hdmi_array_free(spec);
2465         kfree(spec);
2466 }
2467
2468 /*
2469  * Nvidia specific implementations
2470  */
2471
2472 #define Nv_VERB_SET_Channel_Allocation          0xF79
2473 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2474 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2475 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2476
2477 #define nvhdmi_master_con_nid_7x        0x04
2478 #define nvhdmi_master_pin_nid_7x        0x05
2479
2480 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2481         /*front, rear, clfe, rear_surr */
2482         0x6, 0x8, 0xa, 0xc,
2483 };
2484
2485 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2486         /* set audio protect on */
2487         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2488         /* enable digital output on pin widget */
2489         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2490         {} /* terminator */
2491 };
2492
2493 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2494         /* set audio protect on */
2495         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2496         /* enable digital output on pin widget */
2497         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2498         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2499         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2500         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2501         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2502         {} /* terminator */
2503 };
2504
2505 #ifdef LIMITED_RATE_FMT_SUPPORT
2506 /* support only the safe format and rate */
2507 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2508 #define SUPPORTED_MAXBPS        16
2509 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2510 #else
2511 /* support all rates and formats */
2512 #define SUPPORTED_RATES \
2513         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2514         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2515          SNDRV_PCM_RATE_192000)
2516 #define SUPPORTED_MAXBPS        24
2517 #define SUPPORTED_FORMATS \
2518         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2519 #endif
2520
2521 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2522 {
2523         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2524         return 0;
2525 }
2526
2527 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2528 {
2529         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2530         return 0;
2531 }
2532
2533 static unsigned int channels_2_6_8[] = {
2534         2, 6, 8
2535 };
2536
2537 static unsigned int channels_2_8[] = {
2538         2, 8
2539 };
2540
2541 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2542         .count = ARRAY_SIZE(channels_2_6_8),
2543         .list = channels_2_6_8,
2544         .mask = 0,
2545 };
2546
2547 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2548         .count = ARRAY_SIZE(channels_2_8),
2549         .list = channels_2_8,
2550         .mask = 0,
2551 };
2552
2553 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2554                                     struct hda_codec *codec,
2555                                     struct snd_pcm_substream *substream)
2556 {
2557         struct hdmi_spec *spec = codec->spec;
2558         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2559
2560         switch (codec->preset->vendor_id) {
2561         case 0x10de0002:
2562         case 0x10de0003:
2563         case 0x10de0005:
2564         case 0x10de0006:
2565                 hw_constraints_channels = &hw_constraints_2_8_channels;
2566                 break;
2567         case 0x10de0007:
2568                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2569                 break;
2570         default:
2571                 break;
2572         }
2573
2574         if (hw_constraints_channels != NULL) {
2575                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2576                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2577                                 hw_constraints_channels);
2578         } else {
2579                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2580                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2581         }
2582
2583         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2584 }
2585
2586 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2587                                      struct hda_codec *codec,
2588                                      struct snd_pcm_substream *substream)
2589 {
2590         struct hdmi_spec *spec = codec->spec;
2591         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2592 }
2593
2594 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2595                                        struct hda_codec *codec,
2596                                        unsigned int stream_tag,
2597                                        unsigned int format,
2598                                        struct snd_pcm_substream *substream)
2599 {
2600         struct hdmi_spec *spec = codec->spec;
2601         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2602                                              stream_tag, format, substream);
2603 }
2604
2605 static const struct hda_pcm_stream simple_pcm_playback = {
2606         .substreams = 1,
2607         .channels_min = 2,
2608         .channels_max = 2,
2609         .ops = {
2610                 .open = simple_playback_pcm_open,
2611                 .close = simple_playback_pcm_close,
2612                 .prepare = simple_playback_pcm_prepare
2613         },
2614 };
2615
2616 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2617         .build_controls = simple_playback_build_controls,
2618         .build_pcms = simple_playback_build_pcms,
2619         .init = simple_playback_init,
2620         .free = simple_playback_free,
2621         .unsol_event = simple_hdmi_unsol_event,
2622 };
2623
2624 static int patch_simple_hdmi(struct hda_codec *codec,
2625                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2626 {
2627         struct hdmi_spec *spec;
2628         struct hdmi_spec_per_cvt *per_cvt;
2629         struct hdmi_spec_per_pin *per_pin;
2630
2631         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2632         if (!spec)
2633                 return -ENOMEM;
2634
2635         codec->spec = spec;
2636         hdmi_array_init(spec, 1);
2637
2638         spec->multiout.num_dacs = 0;  /* no analog */
2639         spec->multiout.max_channels = 2;
2640         spec->multiout.dig_out_nid = cvt_nid;
2641         spec->num_cvts = 1;
2642         spec->num_pins = 1;
2643         per_pin = snd_array_new(&spec->pins);
2644         per_cvt = snd_array_new(&spec->cvts);
2645         if (!per_pin || !per_cvt) {
2646                 simple_playback_free(codec);
2647                 return -ENOMEM;
2648         }
2649         per_cvt->cvt_nid = cvt_nid;
2650         per_pin->pin_nid = pin_nid;
2651         spec->pcm_playback = simple_pcm_playback;
2652
2653         codec->patch_ops = simple_hdmi_patch_ops;
2654
2655         return 0;
2656 }
2657
2658 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2659                                                     int channels)
2660 {
2661         unsigned int chanmask;
2662         int chan = channels ? (channels - 1) : 1;
2663
2664         switch (channels) {
2665         default:
2666         case 0:
2667         case 2:
2668                 chanmask = 0x00;
2669                 break;
2670         case 4:
2671                 chanmask = 0x08;
2672                 break;
2673         case 6:
2674                 chanmask = 0x0b;
2675                 break;
2676         case 8:
2677                 chanmask = 0x13;
2678                 break;
2679         }
2680
2681         /* Set the audio infoframe channel allocation and checksum fields.  The
2682          * channel count is computed implicitly by the hardware. */
2683         snd_hda_codec_write(codec, 0x1, 0,
2684                         Nv_VERB_SET_Channel_Allocation, chanmask);
2685
2686         snd_hda_codec_write(codec, 0x1, 0,
2687                         Nv_VERB_SET_Info_Frame_Checksum,
2688                         (0x71 - chan - chanmask));
2689 }
2690
2691 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2692                                    struct hda_codec *codec,
2693                                    struct snd_pcm_substream *substream)
2694 {
2695         struct hdmi_spec *spec = codec->spec;
2696         int i;
2697
2698         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2699                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2700         for (i = 0; i < 4; i++) {
2701                 /* set the stream id */
2702                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2703                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2704                 /* set the stream format */
2705                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2706                                 AC_VERB_SET_STREAM_FORMAT, 0);
2707         }
2708
2709         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2710          * streams are disabled. */
2711         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2712
2713         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2714 }
2715
2716 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2717                                      struct hda_codec *codec,
2718                                      unsigned int stream_tag,
2719                                      unsigned int format,
2720                                      struct snd_pcm_substream *substream)
2721 {
2722         int chs;
2723         unsigned int dataDCC2, channel_id;
2724         int i;
2725         struct hdmi_spec *spec = codec->spec;
2726         struct hda_spdif_out *spdif;
2727         struct hdmi_spec_per_cvt *per_cvt;
2728
2729         mutex_lock(&codec->spdif_mutex);
2730         per_cvt = get_cvt(spec, 0);
2731         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2732
2733         chs = substream->runtime->channels;
2734
2735         dataDCC2 = 0x2;
2736
2737         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2738         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2739                 snd_hda_codec_write(codec,
2740                                 nvhdmi_master_con_nid_7x,
2741                                 0,
2742                                 AC_VERB_SET_DIGI_CONVERT_1,
2743                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2744
2745         /* set the stream id */
2746         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2747                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2748
2749         /* set the stream format */
2750         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2751                         AC_VERB_SET_STREAM_FORMAT, format);
2752
2753         /* turn on again (if needed) */
2754         /* enable and set the channel status audio/data flag */
2755         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2756                 snd_hda_codec_write(codec,
2757                                 nvhdmi_master_con_nid_7x,
2758                                 0,
2759                                 AC_VERB_SET_DIGI_CONVERT_1,
2760                                 spdif->ctls & 0xff);
2761                 snd_hda_codec_write(codec,
2762                                 nvhdmi_master_con_nid_7x,
2763                                 0,
2764                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2765         }
2766
2767         for (i = 0; i < 4; i++) {
2768                 if (chs == 2)
2769                         channel_id = 0;
2770                 else
2771                         channel_id = i * 2;
2772
2773                 /* turn off SPDIF once;
2774                  *otherwise the IEC958 bits won't be updated
2775                  */
2776                 if (codec->spdif_status_reset &&
2777                 (spdif->ctls & AC_DIG1_ENABLE))
2778                         snd_hda_codec_write(codec,
2779                                 nvhdmi_con_nids_7x[i],
2780                                 0,
2781                                 AC_VERB_SET_DIGI_CONVERT_1,
2782                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2783                 /* set the stream id */
2784                 snd_hda_codec_write(codec,
2785                                 nvhdmi_con_nids_7x[i],
2786                                 0,
2787                                 AC_VERB_SET_CHANNEL_STREAMID,
2788                                 (stream_tag << 4) | channel_id);
2789                 /* set the stream format */
2790                 snd_hda_codec_write(codec,
2791                                 nvhdmi_con_nids_7x[i],
2792                                 0,
2793                                 AC_VERB_SET_STREAM_FORMAT,
2794                                 format);
2795                 /* turn on again (if needed) */
2796                 /* enable and set the channel status audio/data flag */
2797                 if (codec->spdif_status_reset &&
2798                 (spdif->ctls & AC_DIG1_ENABLE)) {
2799                         snd_hda_codec_write(codec,
2800                                         nvhdmi_con_nids_7x[i],
2801                                         0,
2802                                         AC_VERB_SET_DIGI_CONVERT_1,
2803                                         spdif->ctls & 0xff);
2804                         snd_hda_codec_write(codec,
2805                                         nvhdmi_con_nids_7x[i],
2806                                         0,
2807                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2808                 }
2809         }
2810
2811         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2812
2813         mutex_unlock(&codec->spdif_mutex);
2814         return 0;
2815 }
2816
2817 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2818         .substreams = 1,
2819         .channels_min = 2,
2820         .channels_max = 8,
2821         .nid = nvhdmi_master_con_nid_7x,
2822         .rates = SUPPORTED_RATES,
2823         .maxbps = SUPPORTED_MAXBPS,
2824         .formats = SUPPORTED_FORMATS,
2825         .ops = {
2826                 .open = simple_playback_pcm_open,
2827                 .close = nvhdmi_8ch_7x_pcm_close,
2828                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2829         },
2830 };
2831
2832 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2833 {
2834         struct hdmi_spec *spec;
2835         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2836                                     nvhdmi_master_pin_nid_7x);
2837         if (err < 0)
2838                 return err;
2839
2840         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2841         /* override the PCM rates, etc, as the codec doesn't give full list */
2842         spec = codec->spec;
2843         spec->pcm_playback.rates = SUPPORTED_RATES;
2844         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2845         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2846         return 0;
2847 }
2848
2849 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2850 {
2851         struct hdmi_spec *spec = codec->spec;
2852         int err = simple_playback_build_pcms(codec);
2853         if (!err) {
2854                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2855                 info->own_chmap = true;
2856         }
2857         return err;
2858 }
2859
2860 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2861 {
2862         struct hdmi_spec *spec = codec->spec;
2863         struct hda_pcm *info;
2864         struct snd_pcm_chmap *chmap;
2865         int err;
2866
2867         err = simple_playback_build_controls(codec);
2868         if (err < 0)
2869                 return err;
2870
2871         /* add channel maps */
2872         info = get_pcm_rec(spec, 0);
2873         err = snd_pcm_add_chmap_ctls(info->pcm,
2874                                      SNDRV_PCM_STREAM_PLAYBACK,
2875                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2876         if (err < 0)
2877                 return err;
2878         switch (codec->preset->vendor_id) {
2879         case 0x10de0002:
2880         case 0x10de0003:
2881         case 0x10de0005:
2882         case 0x10de0006:
2883                 chmap->channel_mask = (1U << 2) | (1U << 8);
2884                 break;
2885         case 0x10de0007:
2886                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2887         }
2888         return 0;
2889 }
2890
2891 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2892 {
2893         struct hdmi_spec *spec;
2894         int err = patch_nvhdmi_2ch(codec);
2895         if (err < 0)
2896                 return err;
2897         spec = codec->spec;
2898         spec->multiout.max_channels = 8;
2899         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2900         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2901         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2902         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2903
2904         /* Initialize the audio infoframe channel mask and checksum to something
2905          * valid */
2906         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2907
2908         return 0;
2909 }
2910
2911 /*
2912  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2913  * - 0x10de0015
2914  * - 0x10de0040
2915  */
2916 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
2917                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
2918 {
2919         if (cap->ca_index == 0x00 && channels == 2)
2920                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
2921
2922         /* If the speaker allocation matches the channel count, it is OK. */
2923         if (cap->channels != channels)
2924                 return -1;
2925
2926         /* all channels are remappable freely */
2927         return SNDRV_CTL_TLVT_CHMAP_VAR;
2928 }
2929
2930 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
2931                 int ca, int chs, unsigned char *map)
2932 {
2933         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2934                 return -EINVAL;
2935
2936         return 0;
2937 }
2938
2939 static int patch_nvhdmi(struct hda_codec *codec)
2940 {
2941         struct hdmi_spec *spec;
2942         int err;
2943
2944         err = patch_generic_hdmi(codec);
2945         if (err)
2946                 return err;
2947
2948         spec = codec->spec;
2949         spec->dyn_pin_out = true;
2950
2951         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
2952                 nvhdmi_chmap_cea_alloc_validate_get_type;
2953         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
2954
2955         return 0;
2956 }
2957
2958 /*
2959  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
2960  * accessed using vendor-defined verbs. These registers can be used for
2961  * interoperability between the HDA and HDMI drivers.
2962  */
2963
2964 /* Audio Function Group node */
2965 #define NVIDIA_AFG_NID 0x01
2966
2967 /*
2968  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
2969  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
2970  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
2971  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
2972  * additional bit (at position 30) to signal the validity of the format.
2973  *
2974  * | 31      | 30    | 29  16 | 15   0 |
2975  * +---------+-------+--------+--------+
2976  * | TRIGGER | VALID | UNUSED | FORMAT |
2977  * +-----------------------------------|
2978  *
2979  * Note that for the trigger bit to take effect it needs to change value
2980  * (i.e. it needs to be toggled).
2981  */
2982 #define NVIDIA_GET_SCRATCH0             0xfa6
2983 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
2984 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
2985 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
2986 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
2987 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
2988 #define NVIDIA_SCRATCH_VALID   (1 << 6)
2989
2990 #define NVIDIA_GET_SCRATCH1             0xfab
2991 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
2992 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
2993 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
2994 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
2995
2996 /*
2997  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
2998  * the format is invalidated so that the HDMI codec can be disabled.
2999  */
3000 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3001 {
3002         unsigned int value;
3003
3004         /* bits [31:30] contain the trigger and valid bits */
3005         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3006                                    NVIDIA_GET_SCRATCH0, 0);
3007         value = (value >> 24) & 0xff;
3008
3009         /* bits [15:0] are used to store the HDA format */
3010         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3011                             NVIDIA_SET_SCRATCH0_BYTE0,
3012                             (format >> 0) & 0xff);
3013         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3014                             NVIDIA_SET_SCRATCH0_BYTE1,
3015                             (format >> 8) & 0xff);
3016
3017         /* bits [16:24] are unused */
3018         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3019                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3020
3021         /*
3022          * Bit 30 signals that the data is valid and hence that HDMI audio can
3023          * be enabled.
3024          */
3025         if (format == 0)
3026                 value &= ~NVIDIA_SCRATCH_VALID;
3027         else
3028                 value |= NVIDIA_SCRATCH_VALID;
3029
3030         /*
3031          * Whenever the trigger bit is toggled, an interrupt is raised in the
3032          * HDMI codec. The HDMI driver will use that as trigger to update its
3033          * configuration.
3034          */
3035         value ^= NVIDIA_SCRATCH_TRIGGER;
3036
3037         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3038                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3039 }
3040
3041 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3042                                   struct hda_codec *codec,
3043                                   unsigned int stream_tag,
3044                                   unsigned int format,
3045                                   struct snd_pcm_substream *substream)
3046 {
3047         int err;
3048
3049         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3050                                                 format, substream);
3051         if (err < 0)
3052                 return err;
3053
3054         /* notify the HDMI codec of the format change */
3055         tegra_hdmi_set_format(codec, format);
3056
3057         return 0;
3058 }
3059
3060 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3061                                   struct hda_codec *codec,
3062                                   struct snd_pcm_substream *substream)
3063 {
3064         /* invalidate the format in the HDMI codec */
3065         tegra_hdmi_set_format(codec, 0);
3066
3067         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3068 }
3069
3070 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3071 {
3072         struct hdmi_spec *spec = codec->spec;
3073         unsigned int i;
3074
3075         for (i = 0; i < spec->num_pins; i++) {
3076                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3077
3078                 if (pcm->pcm_type == type)
3079                         return pcm;
3080         }
3081
3082         return NULL;
3083 }
3084
3085 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3086 {
3087         struct hda_pcm_stream *stream;
3088         struct hda_pcm *pcm;
3089         int err;
3090
3091         err = generic_hdmi_build_pcms(codec);
3092         if (err < 0)
3093                 return err;
3094
3095         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3096         if (!pcm)
3097                 return -ENODEV;
3098
3099         /*
3100          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3101          * codec about format changes.
3102          */
3103         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3104         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3105         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3106
3107         return 0;
3108 }
3109
3110 static int patch_tegra_hdmi(struct hda_codec *codec)
3111 {
3112         int err;
3113
3114         err = patch_generic_hdmi(codec);
3115         if (err)
3116                 return err;
3117
3118         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3119
3120         return 0;
3121 }
3122
3123 /*
3124  * ATI/AMD-specific implementations
3125  */
3126
3127 #define is_amdhdmi_rev3_or_later(codec) \
3128         ((codec)->core.vendor_id == 0x1002aa01 && \
3129          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3130 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3131
3132 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3133 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3134 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3135 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3136 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3137 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3138 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3139 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3140 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3141 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3142 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3143 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3144 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3145 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3146 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3147 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3148 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3149 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3150 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3151 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3152 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3153 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3154 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3155 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3156 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3157
3158 /* AMD specific HDA cvt verbs */
3159 #define ATI_VERB_SET_RAMP_RATE          0x770
3160 #define ATI_VERB_GET_RAMP_RATE          0xf70
3161
3162 #define ATI_OUT_ENABLE 0x1
3163
3164 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3165 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3166
3167 #define ATI_HBR_CAPABLE 0x01
3168 #define ATI_HBR_ENABLE 0x10
3169
3170 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3171                            unsigned char *buf, int *eld_size)
3172 {
3173         /* call hda_eld.c ATI/AMD-specific function */
3174         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3175                                     is_amdhdmi_rev3_or_later(codec));
3176 }
3177
3178 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3179                                         int active_channels, int conn_type)
3180 {
3181         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3182 }
3183
3184 static int atihdmi_paired_swap_fc_lfe(int pos)
3185 {
3186         /*
3187          * ATI/AMD have automatic FC/LFE swap built-in
3188          * when in pairwise mapping mode.
3189          */
3190
3191         switch (pos) {
3192                 /* see channel_allocations[].speakers[] */
3193                 case 2: return 3;
3194                 case 3: return 2;
3195                 default: break;
3196         }
3197
3198         return pos;
3199 }
3200
3201 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3202                         int ca, int chs, unsigned char *map)
3203 {
3204         struct hdac_cea_channel_speaker_allocation *cap;
3205         int i, j;
3206
3207         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3208
3209         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3210         for (i = 0; i < chs; ++i) {
3211                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3212                 bool ok = false;
3213                 bool companion_ok = false;
3214
3215                 if (!mask)
3216                         continue;
3217
3218                 for (j = 0 + i % 2; j < 8; j += 2) {
3219                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3220                         if (cap->speakers[chan_idx] == mask) {
3221                                 /* channel is in a supported position */
3222                                 ok = true;
3223
3224                                 if (i % 2 == 0 && i + 1 < chs) {
3225                                         /* even channel, check the odd companion */
3226                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3227                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3228                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3229
3230                                         if (comp_mask_req == comp_mask_act)
3231                                                 companion_ok = true;
3232                                         else
3233                                                 return -EINVAL;
3234                                 }
3235                                 break;
3236                         }
3237                 }
3238
3239                 if (!ok)
3240                         return -EINVAL;
3241
3242                 if (companion_ok)
3243                         i++; /* companion channel already checked */
3244         }
3245
3246         return 0;
3247 }
3248
3249 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3250                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3251 {
3252         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3253         int verb;
3254         int ati_channel_setup = 0;
3255
3256         if (hdmi_slot > 7)
3257                 return -EINVAL;
3258
3259         if (!has_amd_full_remap_support(codec)) {
3260                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3261
3262                 /* In case this is an odd slot but without stream channel, do not
3263                  * disable the slot since the corresponding even slot could have a
3264                  * channel. In case neither have a channel, the slot pair will be
3265                  * disabled when this function is called for the even slot. */
3266                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3267                         return 0;
3268
3269                 hdmi_slot -= hdmi_slot % 2;
3270
3271                 if (stream_channel != 0xf)
3272                         stream_channel -= stream_channel % 2;
3273         }
3274
3275         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3276
3277         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3278
3279         if (stream_channel != 0xf)
3280                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3281
3282         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3283 }
3284
3285 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3286                                 hda_nid_t pin_nid, int asp_slot)
3287 {
3288         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3289         bool was_odd = false;
3290         int ati_asp_slot = asp_slot;
3291         int verb;
3292         int ati_channel_setup;
3293
3294         if (asp_slot > 7)
3295                 return -EINVAL;
3296
3297         if (!has_amd_full_remap_support(codec)) {
3298                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3299                 if (ati_asp_slot % 2 != 0) {
3300                         ati_asp_slot -= 1;
3301                         was_odd = true;
3302                 }
3303         }
3304
3305         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3306
3307         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3308
3309         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3310                 return 0xf;
3311
3312         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3313 }
3314
3315 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3316                 struct hdac_chmap *chmap,
3317                 struct hdac_cea_channel_speaker_allocation *cap,
3318                 int channels)
3319 {
3320         int c;
3321
3322         /*
3323          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3324          * we need to take that into account (a single channel may take 2
3325          * channel slots if we need to carry a silent channel next to it).
3326          * On Rev3+ AMD codecs this function is not used.
3327          */
3328         int chanpairs = 0;
3329
3330         /* We only produce even-numbered channel count TLVs */
3331         if ((channels % 2) != 0)
3332                 return -1;
3333
3334         for (c = 0; c < 7; c += 2) {
3335                 if (cap->speakers[c] || cap->speakers[c+1])
3336                         chanpairs++;
3337         }
3338
3339         if (chanpairs * 2 != channels)
3340                 return -1;
3341
3342         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3343 }
3344
3345 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3346                 struct hdac_cea_channel_speaker_allocation *cap,
3347                 unsigned int *chmap, int channels)
3348 {
3349         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3350         int count = 0;
3351         int c;
3352
3353         for (c = 7; c >= 0; c--) {
3354                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3355                 int spk = cap->speakers[chan];
3356                 if (!spk) {
3357                         /* add N/A channel if the companion channel is occupied */
3358                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3359                                 chmap[count++] = SNDRV_CHMAP_NA;
3360
3361                         continue;
3362                 }
3363
3364                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3365         }
3366
3367         WARN_ON(count != channels);
3368 }
3369
3370 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3371                                  bool hbr)
3372 {
3373         int hbr_ctl, hbr_ctl_new;
3374
3375         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3376         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3377                 if (hbr)
3378                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3379                 else
3380                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3381
3382                 codec_dbg(codec,
3383                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3384                                 pin_nid,
3385                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3386                                 hbr_ctl_new);
3387
3388                 if (hbr_ctl != hbr_ctl_new)
3389                         snd_hda_codec_write(codec, pin_nid, 0,
3390                                                 ATI_VERB_SET_HBR_CONTROL,
3391                                                 hbr_ctl_new);
3392
3393         } else if (hbr)
3394                 return -EINVAL;
3395
3396         return 0;
3397 }
3398
3399 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3400                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3401 {
3402
3403         if (is_amdhdmi_rev3_or_later(codec)) {
3404                 int ramp_rate = 180; /* default as per AMD spec */
3405                 /* disable ramp-up/down for non-pcm as per AMD spec */
3406                 if (format & AC_FMT_TYPE_NON_PCM)
3407                         ramp_rate = 0;
3408
3409                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3410         }
3411
3412         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3413 }
3414
3415
3416 static int atihdmi_init(struct hda_codec *codec)
3417 {
3418         struct hdmi_spec *spec = codec->spec;
3419         int pin_idx, err;
3420
3421         err = generic_hdmi_init(codec);
3422
3423         if (err)
3424                 return err;
3425
3426         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3427                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3428
3429                 /* make sure downmix information in infoframe is zero */
3430                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3431
3432                 /* enable channel-wise remap mode if supported */
3433                 if (has_amd_full_remap_support(codec))
3434                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3435                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3436                                             ATI_MULTICHANNEL_MODE_SINGLE);
3437         }
3438
3439         return 0;
3440 }
3441
3442 static int patch_atihdmi(struct hda_codec *codec)
3443 {
3444         struct hdmi_spec *spec;
3445         struct hdmi_spec_per_cvt *per_cvt;
3446         int err, cvt_idx;
3447
3448         err = patch_generic_hdmi(codec);
3449
3450         if (err)
3451                 return err;
3452
3453         codec->patch_ops.init = atihdmi_init;
3454
3455         spec = codec->spec;
3456
3457         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3458         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3459         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3460         spec->ops.setup_stream = atihdmi_setup_stream;
3461
3462         if (!has_amd_full_remap_support(codec)) {
3463                 /* override to ATI/AMD-specific versions with pairwise mapping */
3464                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3465                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3466                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
3467                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
3468                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
3469                 spec->chmap.ops.pin_get_slot_channel =
3470                                 atihdmi_pin_get_slot_channel;
3471                 spec->chmap.ops.pin_set_slot_channel =
3472                                 atihdmi_pin_set_slot_channel;
3473         }
3474
3475         /* ATI/AMD converters do not advertise all of their capabilities */
3476         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3477                 per_cvt = get_cvt(spec, cvt_idx);
3478                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3479                 per_cvt->rates |= SUPPORTED_RATES;
3480                 per_cvt->formats |= SUPPORTED_FORMATS;
3481                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3482         }
3483
3484         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
3485
3486         return 0;
3487 }
3488
3489 /* VIA HDMI Implementation */
3490 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3491 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3492
3493 static int patch_via_hdmi(struct hda_codec *codec)
3494 {
3495         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3496 }
3497
3498 /*
3499  * patch entries
3500  */
3501 static const struct hda_device_id snd_hda_id_hdmi[] = {
3502 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
3503 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
3504 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
3505 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
3506 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
3507 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
3508 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
3509 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3510 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3511 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3512 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3513 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
3514 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
3515 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
3516 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
3517 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
3518 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
3519 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
3520 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
3521 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
3522 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
3523 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
3524 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
3525 /* 17 is known to be absent */
3526 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
3527 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
3528 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
3529 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
3530 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
3531 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
3532 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
3533 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
3534 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
3535 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
3536 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
3537 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
3538 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
3539 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
3540 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
3541 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
3542 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
3543 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
3544 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
3545 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
3546 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
3547 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
3548 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
3549 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
3550 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
3551 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
3552 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
3553 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
3554 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_generic_hdmi),
3555 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
3556 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
3557 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
3558 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_generic_hdmi),
3559 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_generic_hdmi),
3560 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_generic_hdmi),
3561 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
3562 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
3563 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
3564 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
3565 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
3566 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
3567 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
3568 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
3569 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
3570 /* special ID for generic HDMI */
3571 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
3572 {} /* terminator */
3573 };
3574 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
3575
3576 MODULE_LICENSE("GPL");
3577 MODULE_DESCRIPTION("HDMI HD-audio codec");
3578 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3579 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3580 MODULE_ALIAS("snd-hda-codec-atihdmi");
3581
3582 static struct hda_codec_driver hdmi_driver = {
3583         .id = snd_hda_id_hdmi,
3584 };
3585
3586 module_hda_codec_driver(hdmi_driver);