sound/soc/codecs/pcm512x.c

   1 /*
   2  * Driver for the PCM512x CODECs
   3  *
   4  * Author:      Mark Brown <broonie@linaro.org>
   5  *              Copyright 2014 Linaro Ltd
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * version 2 as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  */
  16
  17
  18 #include <linux/init.h>
  19 #include <linux/module.h>
  20 #include <linux/clk.h>
  21 #include <linux/pm_runtime.h>
  22 #include <linux/regmap.h>
  23 #include <linux/regulator/consumer.h>
  24 #include <linux/gcd.h>
  25 #include <sound/soc.h>
  26 #include <sound/soc-dapm.h>
  27 #include <sound/pcm_params.h>
  28 #include <sound/tlv.h>
  29
  30 #include "pcm512x.h"
  31
  32 #define DIV_ROUND_DOWN_ULL(ll, d) \
  33         ({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; })
  34 #define DIV_ROUND_CLOSEST_ULL(ll, d) \
  35         ({ unsigned long long _tmp = (ll)+(d)/2; do_div(_tmp, d); _tmp; })
  36
  37 #define PCM512x_NUM_SUPPLIES 3
  38 static const char * const pcm512x_supply_names[PCM512x_NUM_SUPPLIES] = {
  39         "AVDD",
  40         "DVDD",
  41         "CPVDD",
  42 };
  43
  44 struct pcm512x_priv {
  45         struct regmap *regmap;
  46         struct clk *sclk;
  47         struct regulator_bulk_data supplies[PCM512x_NUM_SUPPLIES];
  48         struct notifier_block supply_nb[PCM512x_NUM_SUPPLIES];
  49         int fmt;
  50         int pll_in;
  51         int pll_out;
  52         int pll_r;
  53         int pll_j;
  54         int pll_d;
  55         int pll_p;
  56         unsigned long real_pll;
  57 };
  58
  59 /*
  60  * We can't use the same notifier block for more than one supply and
  61  * there's no way I can see to get from a callback to the caller
  62  * except container_of().
  63  */
  64 #define PCM512x_REGULATOR_EVENT(n) \
  65 static int pcm512x_regulator_event_##n(struct notifier_block *nb, \
  66                                       unsigned long event, void *data)    \
  67 { \
  68         struct pcm512x_priv *pcm512x = container_of(nb, struct pcm512x_priv, \
  69                                                     supply_nb[n]); \
  70         if (event & REGULATOR_EVENT_DISABLE) { \
  71                 regcache_mark_dirty(pcm512x->regmap);   \
  72                 regcache_cache_only(pcm512x->regmap, true);     \
  73         } \
  74         return 0; \
  75 }
  76
  77 PCM512x_REGULATOR_EVENT(0)
  78 PCM512x_REGULATOR_EVENT(1)
  79 PCM512x_REGULATOR_EVENT(2)
  80
  81 static const struct reg_default pcm512x_reg_defaults[] = {
  82         { PCM512x_RESET,             0x00 },
  83         { PCM512x_POWER,             0x00 },
  84         { PCM512x_MUTE,              0x00 },
  85         { PCM512x_DSP,               0x00 },
  86         { PCM512x_PLL_REF,           0x00 },
  87         { PCM512x_DAC_REF,           0x00 },
  88         { PCM512x_DAC_ROUTING,       0x11 },
  89         { PCM512x_DSP_PROGRAM,       0x01 },
  90         { PCM512x_CLKDET,            0x00 },
  91         { PCM512x_AUTO_MUTE,         0x00 },
  92         { PCM512x_ERROR_DETECT,      0x00 },
  93         { PCM512x_DIGITAL_VOLUME_1,  0x00 },
  94         { PCM512x_DIGITAL_VOLUME_2,  0x30 },
  95         { PCM512x_DIGITAL_VOLUME_3,  0x30 },
  96         { PCM512x_DIGITAL_MUTE_1,    0x22 },
  97         { PCM512x_DIGITAL_MUTE_2,    0x00 },
  98         { PCM512x_DIGITAL_MUTE_3,    0x07 },
  99         { PCM512x_OUTPUT_AMPLITUDE,  0x00 },
 100         { PCM512x_ANALOG_GAIN_CTRL,  0x00 },
 101         { PCM512x_UNDERVOLTAGE_PROT, 0x00 },
 102         { PCM512x_ANALOG_MUTE_CTRL,  0x00 },
 103         { PCM512x_ANALOG_GAIN_BOOST, 0x00 },
 104         { PCM512x_VCOM_CTRL_1,       0x00 },
 105         { PCM512x_VCOM_CTRL_2,       0x01 },
 106         { PCM512x_BCLK_LRCLK_CFG,    0x00 },
 107         { PCM512x_MASTER_MODE,       0x7c },
 108         { PCM512x_GPIO_PLLIN,        0x00 },
 109         { PCM512x_SYNCHRONIZE,       0x10 },
 110         { PCM512x_PLL_COEFF_0,       0x00 },
 111         { PCM512x_PLL_COEFF_1,       0x00 },
 112         { PCM512x_PLL_COEFF_2,       0x00 },
 113         { PCM512x_PLL_COEFF_3,       0x00 },
 114         { PCM512x_PLL_COEFF_4,       0x00 },
 115         { PCM512x_DSP_CLKDIV,        0x00 },
 116         { PCM512x_DAC_CLKDIV,        0x00 },
 117         { PCM512x_NCP_CLKDIV,        0x00 },
 118         { PCM512x_OSR_CLKDIV,        0x00 },
 119         { PCM512x_MASTER_CLKDIV_1,   0x00 },
 120         { PCM512x_MASTER_CLKDIV_2,   0x00 },
 121         { PCM512x_FS_SPEED_MODE,     0x00 },
 122         { PCM512x_IDAC_1,            0x01 },
 123         { PCM512x_IDAC_2,            0x00 },
 124 };
 125
 126 static bool pcm512x_readable(struct device *dev, unsigned int reg)
 127 {
 128         switch (reg) {
 129         case PCM512x_RESET:
 130         case PCM512x_POWER:
 131         case PCM512x_MUTE:
 132         case PCM512x_PLL_EN:
 133         case PCM512x_SPI_MISO_FUNCTION:
 134         case PCM512x_DSP:
 135         case PCM512x_GPIO_EN:
 136         case PCM512x_BCLK_LRCLK_CFG:
 137         case PCM512x_DSP_GPIO_INPUT:
 138         case PCM512x_MASTER_MODE:
 139         case PCM512x_PLL_REF:
 140         case PCM512x_DAC_REF:
 141         case PCM512x_GPIO_PLLIN:
 142         case PCM512x_SYNCHRONIZE:
 143         case PCM512x_PLL_COEFF_0:
 144         case PCM512x_PLL_COEFF_1:
 145         case PCM512x_PLL_COEFF_2:
 146         case PCM512x_PLL_COEFF_3:
 147         case PCM512x_PLL_COEFF_4:
 148         case PCM512x_DSP_CLKDIV:
 149         case PCM512x_DAC_CLKDIV:
 150         case PCM512x_NCP_CLKDIV:
 151         case PCM512x_OSR_CLKDIV:
 152         case PCM512x_MASTER_CLKDIV_1:
 153         case PCM512x_MASTER_CLKDIV_2:
 154         case PCM512x_FS_SPEED_MODE:
 155         case PCM512x_IDAC_1:
 156         case PCM512x_IDAC_2:
 157         case PCM512x_ERROR_DETECT:
 158         case PCM512x_I2S_1:
 159         case PCM512x_I2S_2:
 160         case PCM512x_DAC_ROUTING:
 161         case PCM512x_DSP_PROGRAM:
 162         case PCM512x_CLKDET:
 163         case PCM512x_AUTO_MUTE:
 164         case PCM512x_DIGITAL_VOLUME_1:
 165         case PCM512x_DIGITAL_VOLUME_2:
 166         case PCM512x_DIGITAL_VOLUME_3:
 167         case PCM512x_DIGITAL_MUTE_1:
 168         case PCM512x_DIGITAL_MUTE_2:
 169         case PCM512x_DIGITAL_MUTE_3:
 170         case PCM512x_GPIO_OUTPUT_1:
 171         case PCM512x_GPIO_OUTPUT_2:
 172         case PCM512x_GPIO_OUTPUT_3:
 173         case PCM512x_GPIO_OUTPUT_4:
 174         case PCM512x_GPIO_OUTPUT_5:
 175         case PCM512x_GPIO_OUTPUT_6:
 176         case PCM512x_GPIO_CONTROL_1:
 177         case PCM512x_GPIO_CONTROL_2:
 178         case PCM512x_OVERFLOW:
 179         case PCM512x_RATE_DET_1:
 180         case PCM512x_RATE_DET_2:
 181         case PCM512x_RATE_DET_3:
 182         case PCM512x_RATE_DET_4:
 183         case PCM512x_CLOCK_STATUS:
 184         case PCM512x_ANALOG_MUTE_DET:
 185         case PCM512x_GPIN:
 186         case PCM512x_DIGITAL_MUTE_DET:
 187         case PCM512x_OUTPUT_AMPLITUDE:
 188         case PCM512x_ANALOG_GAIN_CTRL:
 189         case PCM512x_UNDERVOLTAGE_PROT:
 190         case PCM512x_ANALOG_MUTE_CTRL:
 191         case PCM512x_ANALOG_GAIN_BOOST:
 192         case PCM512x_VCOM_CTRL_1:
 193         case PCM512x_VCOM_CTRL_2:
 194         case PCM512x_CRAM_CTRL:
 195         case PCM512x_FLEX_A:
 196         case PCM512x_FLEX_B:
 197                 return true;
 198         default:
 199                 /* There are 256 raw register addresses */
 200                 return reg < 0xff;
 201         }
 202 }
 203
 204 static bool pcm512x_volatile(struct device *dev, unsigned int reg)
 205 {
 206         switch (reg) {
 207         case PCM512x_PLL_EN:
 208         case PCM512x_OVERFLOW:
 209         case PCM512x_RATE_DET_1:
 210         case PCM512x_RATE_DET_2:
 211         case PCM512x_RATE_DET_3:
 212         case PCM512x_RATE_DET_4:
 213         case PCM512x_CLOCK_STATUS:
 214         case PCM512x_ANALOG_MUTE_DET:
 215         case PCM512x_GPIN:
 216         case PCM512x_DIGITAL_MUTE_DET:
 217         case PCM512x_CRAM_CTRL:
 218                 return true;
 219         default:
 220                 /* There are 256 raw register addresses */
 221                 return reg < 0xff;
 222         }
 223 }
 224
 225 static const DECLARE_TLV_DB_SCALE(digital_tlv, -10350, 50, 1);
 226 static const DECLARE_TLV_DB_SCALE(analog_tlv, -600, 600, 0);
 227 static const DECLARE_TLV_DB_SCALE(boost_tlv, 0, 80, 0);
 228
 229 static const char * const pcm512x_dsp_program_texts[] = {
 230         "FIR interpolation with de-emphasis",
 231         "Low latency IIR with de-emphasis",
 232         "Fixed process flow",
 233         "High attenuation with de-emphasis",
 234         "Ringing-less low latency FIR",
 235 };
 236
 237 static const unsigned int pcm512x_dsp_program_values[] = {
 238         1,
 239         2,
 240         3,
 241         5,
 242         7,
 243 };
 244
 245 static SOC_VALUE_ENUM_SINGLE_DECL(pcm512x_dsp_program,
 246                                   PCM512x_DSP_PROGRAM, 0, 0x1f,
 247                                   pcm512x_dsp_program_texts,
 248                                   pcm512x_dsp_program_values);
 249
 250 static const char * const pcm512x_clk_missing_text[] = {
 251         "1s", "2s", "3s", "4s", "5s", "6s", "7s", "8s"
 252 };
 253
 254 static const struct soc_enum pcm512x_clk_missing =
 255         SOC_ENUM_SINGLE(PCM512x_CLKDET, 0,  8, pcm512x_clk_missing_text);
 256
 257 static const char * const pcm512x_autom_text[] = {
 258         "21ms", "106ms", "213ms", "533ms", "1.07s", "2.13s", "5.33s", "10.66s"
 259 };
 260
 261 static const struct soc_enum pcm512x_autom_l =
 262         SOC_ENUM_SINGLE(PCM512x_AUTO_MUTE, PCM512x_ATML_SHIFT, 8,
 263                         pcm512x_autom_text);
 264
 265 static const struct soc_enum pcm512x_autom_r =
 266         SOC_ENUM_SINGLE(PCM512x_AUTO_MUTE, PCM512x_ATMR_SHIFT, 8,
 267                         pcm512x_autom_text);
 268
 269 static const char * const pcm512x_ramp_rate_text[] = {
 270         "1 sample/update", "2 samples/update", "4 samples/update",
 271         "Immediate"
 272 };
 273
 274 static const struct soc_enum pcm512x_vndf =
 275         SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_1, PCM512x_VNDF_SHIFT, 4,
 276                         pcm512x_ramp_rate_text);
 277
 278 static const struct soc_enum pcm512x_vnuf =
 279         SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_1, PCM512x_VNUF_SHIFT, 4,
 280                         pcm512x_ramp_rate_text);
 281
 282 static const struct soc_enum pcm512x_vedf =
 283         SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_2, PCM512x_VEDF_SHIFT, 4,
 284                         pcm512x_ramp_rate_text);
 285
 286 static const char * const pcm512x_ramp_step_text[] = {
 287         "4dB/step", "2dB/step", "1dB/step", "0.5dB/step"
 288 };
 289
 290 static const struct soc_enum pcm512x_vnds =
 291         SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_1, PCM512x_VNDS_SHIFT, 4,
 292                         pcm512x_ramp_step_text);
 293
 294 static const struct soc_enum pcm512x_vnus =
 295         SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_1, PCM512x_VNUS_SHIFT, 4,
 296                         pcm512x_ramp_step_text);
 297
 298 static const struct soc_enum pcm512x_veds =
 299         SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_2, PCM512x_VEDS_SHIFT, 4,
 300                         pcm512x_ramp_step_text);
 301
 302 static const struct snd_kcontrol_new pcm512x_controls[] = {
 303 SOC_DOUBLE_R_TLV("Digital Playback Volume", PCM512x_DIGITAL_VOLUME_2,
 304                  PCM512x_DIGITAL_VOLUME_3, 0, 255, 1, digital_tlv),
 305 SOC_DOUBLE_TLV("Playback Volume", PCM512x_ANALOG_GAIN_CTRL,
 306                PCM512x_LAGN_SHIFT, PCM512x_RAGN_SHIFT, 1, 1, analog_tlv),
 307 SOC_DOUBLE_TLV("Playback Boost Volume", PCM512x_ANALOG_GAIN_BOOST,
 308                PCM512x_AGBL_SHIFT, PCM512x_AGBR_SHIFT, 1, 0, boost_tlv),
 309 SOC_DOUBLE("Digital Playback Switch", PCM512x_MUTE, PCM512x_RQML_SHIFT,
 310            PCM512x_RQMR_SHIFT, 1, 1),
 311
 312 SOC_SINGLE("Deemphasis Switch", PCM512x_DSP, PCM512x_DEMP_SHIFT, 1, 1),
 313 SOC_ENUM("DSP Program", pcm512x_dsp_program),
 314
 315 SOC_ENUM("Clock Missing Period", pcm512x_clk_missing),
 316 SOC_ENUM("Auto Mute Time Left", pcm512x_autom_l),
 317 SOC_ENUM("Auto Mute Time Right", pcm512x_autom_r),
 318 SOC_SINGLE("Auto Mute Mono Switch", PCM512x_DIGITAL_MUTE_3,
 319            PCM512x_ACTL_SHIFT, 1, 0),
 320 SOC_DOUBLE("Auto Mute Switch", PCM512x_DIGITAL_MUTE_3, PCM512x_AMLE_SHIFT,
 321            PCM512x_AMRE_SHIFT, 1, 0),
 322
 323 SOC_ENUM("Volume Ramp Down Rate", pcm512x_vndf),
 324 SOC_ENUM("Volume Ramp Down Step", pcm512x_vnds),
 325 SOC_ENUM("Volume Ramp Up Rate", pcm512x_vnuf),
 326 SOC_ENUM("Volume Ramp Up Step", pcm512x_vnus),
 327 SOC_ENUM("Volume Ramp Down Emergency Rate", pcm512x_vedf),
 328 SOC_ENUM("Volume Ramp Down Emergency Step", pcm512x_veds),
 329 };
 330
 331 static const struct snd_soc_dapm_widget pcm512x_dapm_widgets[] = {
 332 SND_SOC_DAPM_DAC("DACL", NULL, SND_SOC_NOPM, 0, 0),
 333 SND_SOC_DAPM_DAC("DACR", NULL, SND_SOC_NOPM, 0, 0),
 334
 335 SND_SOC_DAPM_OUTPUT("OUTL"),
 336 SND_SOC_DAPM_OUTPUT("OUTR"),
 337 };
 338
 339 static const struct snd_soc_dapm_route pcm512x_dapm_routes[] = {
 340         { "DACL", NULL, "Playback" },
 341         { "DACR", NULL, "Playback" },
 342
 343         { "OUTL", NULL, "DACL" },
 344         { "OUTR", NULL, "DACR" },
 345 };
 346
 347 static const u32 pcm512x_dai_rates[] = {
 348         8000, 11025, 16000, 22050, 32000, 44100, 48000, 64000,
 349         88200, 96000, 176400, 192000, 384000,
 350 };
 351
 352 static const struct snd_pcm_hw_constraint_list constraints_slave = {
 353         .count = ARRAY_SIZE(pcm512x_dai_rates),
 354         .list  = pcm512x_dai_rates,
 355 };
 356
 357 static const struct snd_interval pcm512x_dai_ranges_64bpf[] = {
 358         {
 359                 .min = 8000,
 360                 .max = 195312,
 361         }, {
 362                 .min = 250000,
 363                 .max = 390625,
 364         },
 365 };
 366
 367 static struct snd_pcm_hw_constraint_ranges constraints_64bpf = {
 368         .count  = ARRAY_SIZE(pcm512x_dai_ranges_64bpf),
 369         .ranges = pcm512x_dai_ranges_64bpf,
 370 };
 371
 372 static int pcm512x_hw_rule_rate(struct snd_pcm_hw_params *params,
 373                                 struct snd_pcm_hw_rule *rule)
 374 {
 375         struct snd_pcm_hw_constraint_ranges *r = rule->private;
 376         int frame_size;
 377
 378         frame_size = snd_soc_params_to_frame_size(params);
 379         if (frame_size < 0)
 380                 return frame_size;
 381
 382         if (frame_size != 64)
 383                 return 0;
 384
 385         return snd_interval_ranges(hw_param_interval(params, rule->var),
 386                                    r->count, r->ranges, r->mask);
 387 }
 388
 389 static int pcm512x_dai_startup_master(struct snd_pcm_substream *substream,
 390                                       struct snd_soc_dai *dai)
 391 {
 392         struct snd_soc_codec *codec = dai->codec;
 393         struct pcm512x_priv *pcm512x = snd_soc_codec_get_drvdata(codec);
 394         struct device *dev = dai->dev;
 395         struct snd_pcm_hw_constraint_ratnums *constraints_no_pll;
 396         struct snd_ratnum *rats_no_pll;
 397
 398         if (IS_ERR(pcm512x->sclk)) {
 399                 dev_err(dev, "Need SCLK for master mode: %ld\n",
 400                         PTR_ERR(pcm512x->sclk));
 401                 return PTR_ERR(pcm512x->sclk);
 402         }
 403
 404         if (pcm512x->pll_out)
 405                 return snd_pcm_hw_rule_add(substream->runtime, 0,
 406                                            SNDRV_PCM_HW_PARAM_RATE,
 407                                            pcm512x_hw_rule_rate,
 408                                            (void *)&constraints_64bpf,
 409                                            SNDRV_PCM_HW_PARAM_FRAME_BITS,
 410                                            SNDRV_PCM_HW_PARAM_CHANNELS, -1);
 411
 412         constraints_no_pll = devm_kzalloc(dev, sizeof(*constraints_no_pll),
 413                                           GFP_KERNEL);
 414         if (!constraints_no_pll)
 415                 return -ENOMEM;
 416         constraints_no_pll->nrats = 1;
 417         rats_no_pll = devm_kzalloc(dev, sizeof(*rats_no_pll), GFP_KERNEL);
 418         if (!rats_no_pll)
 419                 return -ENOMEM;
 420         constraints_no_pll->rats = rats_no_pll;
 421         rats_no_pll->num = clk_get_rate(pcm512x->sclk) / 64;
 422         rats_no_pll->den_min = 1;
 423         rats_no_pll->den_max = 128;
 424         rats_no_pll->den_step = 1;
 425
 426         return snd_pcm_hw_constraint_ratnums(substream->runtime, 0,
 427                                              SNDRV_PCM_HW_PARAM_RATE,
 428                                              constraints_no_pll);
 429 }
 430
 431 static int pcm512x_dai_startup_slave(struct snd_pcm_substream *substream,
 432                                      struct snd_soc_dai *dai)
 433 {
 434         struct snd_soc_codec *codec = dai->codec;
 435         struct pcm512x_priv *pcm512x = snd_soc_codec_get_drvdata(codec);
 436         struct device *dev = dai->dev;
 437         struct regmap *regmap = pcm512x->regmap;
 438
 439         if (IS_ERR(pcm512x->sclk)) {
 440                 dev_info(dev, "No SCLK, using BCLK: %ld\n",
 441                          PTR_ERR(pcm512x->sclk));
 442
 443                 /* Disable reporting of missing SCLK as an error */
 444                 regmap_update_bits(regmap, PCM512x_ERROR_DETECT,
 445                                    PCM512x_IDCH, PCM512x_IDCH);
 446
 447                 /* Switch PLL input to BCLK */
 448                 regmap_update_bits(regmap, PCM512x_PLL_REF,
 449                                    PCM512x_SREF, PCM512x_SREF_BCK);
 450         }
 451
 452         return snd_pcm_hw_constraint_list(substream->runtime, 0,
 453                                           SNDRV_PCM_HW_PARAM_RATE,
 454                                           &constraints_slave);
 455 }
 456
 457 static int pcm512x_dai_startup(struct snd_pcm_substream *substream,
 458                                struct snd_soc_dai *dai)
 459 {
 460         struct snd_soc_codec *codec = dai->codec;
 461         struct pcm512x_priv *pcm512x = snd_soc_codec_get_drvdata(codec);
 462
 463         switch (pcm512x->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 464         case SND_SOC_DAIFMT_CBM_CFM:
 465                 return pcm512x_dai_startup_master(substream, dai);
 466
 467         case SND_SOC_DAIFMT_CBS_CFS:
 468                 return pcm512x_dai_startup_slave(substream, dai);
 469
 470         default:
 471                 return -EINVAL;
 472         }
 473 }
 474
 475 static int pcm512x_set_bias_level(struct snd_soc_codec *codec,
 476                                   enum snd_soc_bias_level level)
 477 {
 478         struct pcm512x_priv *pcm512x = dev_get_drvdata(codec->dev);
 479         int ret;
 480
 481         switch (level) {
 482         case SND_SOC_BIAS_ON:
 483         case SND_SOC_BIAS_PREPARE:
 484                 break;
 485
 486         case SND_SOC_BIAS_STANDBY:
 487                 ret = regmap_update_bits(pcm512x->regmap, PCM512x_POWER,
 488                                          PCM512x_RQST, 0);
 489                 if (ret != 0) {
 490                         dev_err(codec->dev, "Failed to remove standby: %d\n",
 491                                 ret);
 492                         return ret;
 493                 }
 494                 break;
 495
 496         case SND_SOC_BIAS_OFF:
 497                 ret = regmap_update_bits(pcm512x->regmap, PCM512x_POWER,
 498                                          PCM512x_RQST, PCM512x_RQST);
 499                 if (ret != 0) {
 500                         dev_err(codec->dev, "Failed to request standby: %d\n",
 501                                 ret);
 502                         return ret;
 503                 }
 504                 break;
 505         }
 506
 507         codec->dapm.bias_level = level;
 508
 509         return 0;
 510 }
 511
 512 static unsigned long pcm512x_find_sck(struct snd_soc_dai *dai,
 513                                       unsigned long bclk_rate)
 514 {
 515         struct device *dev = dai->dev;
 516         unsigned long sck_rate;
 517         int pow2;
 518
 519         /* 64 MHz <= pll_rate <= 100 MHz, VREF mode */
 520         /* 16 MHz <= sck_rate <=  25 MHz, VREF mode */
 521
 522         /* select sck_rate as a multiple of bclk_rate but still with
 523          * as many factors of 2 as possible, as that makes it easier
 524          * to find a fast DAC rate
 525          */
 526         pow2 = 1 << fls((25000000 - 16000000) / bclk_rate);
 527         for (; pow2; pow2 >>= 1) {
 528                 sck_rate = rounddown(25000000, bclk_rate * pow2);
 529                 if (sck_rate >= 16000000)
 530                         break;
 531         }
 532         if (!pow2) {
 533                 dev_err(dev, "Impossible to generate a suitable SCK\n");
 534                 return 0;
 535         }
 536
 537         dev_dbg(dev, "sck_rate %lu\n", sck_rate);
 538         return sck_rate;
 539 }
 540
 541 /* pll_rate = pllin_rate * R * J.D / P
 542  * 1 <= R <= 16
 543  * 1 <= J <= 63
 544  * 0 <= D <= 9999
 545  * 1 <= P <= 15
 546  * 64 MHz <= pll_rate <= 100 MHz
 547  * if D == 0
 548  *     1 MHz <= pllin_rate / P <= 20 MHz
 549  * else if D > 0
 550  *     6.667 MHz <= pllin_rate / P <= 20 MHz
 551  *     4 <= J <= 11
 552  *     R = 1
 553  */
 554 static int pcm512x_find_pll_coeff(struct snd_soc_dai *dai,
 555                                   unsigned long pllin_rate,
 556                                   unsigned long pll_rate)
 557 {
 558         struct device *dev = dai->dev;
 559         struct snd_soc_codec *codec = dai->codec;
 560         struct pcm512x_priv *pcm512x = snd_soc_codec_get_drvdata(codec);
 561         unsigned long common;
 562         int R, J, D, P;
 563         unsigned long K; /* 10000 * J.D */
 564         unsigned long num;
 565         unsigned long den;
 566
 567         common = gcd(pll_rate, pllin_rate);
 568         dev_dbg(dev, "pll %lu pllin %lu common %lu\n",
 569                 pll_rate, pllin_rate, common);
 570         num = pll_rate / common;
 571         den = pllin_rate / common;
 572
 573         /* pllin_rate / P (or here, den) cannot be greater than 20 MHz */
 574         if (pllin_rate / den > 20000000 && num < 8) {
 575                 num *= 20000000 / (pllin_rate / den);
 576                 den *= 20000000 / (pllin_rate / den);
 577         }
 578         dev_dbg(dev, "num / den = %lu / %lu\n", num, den);
 579
 580         P = den;
 581         if (den <= 15 && num <= 16 * 63
 582             && 1000000 <= pllin_rate / P && pllin_rate / P <= 20000000) {
 583                 /* Try the case with D = 0 */
 584                 D = 0;
 585                 /* factor 'num' into J and R, such that R <= 16 and J <= 63 */
 586                 for (R = 16; R; R--) {
 587                         if (num % R)
 588                                 continue;
 589                         J = num / R;
 590                         if (J == 0 || J > 63)
 591                                 continue;
 592
 593                         dev_dbg(dev, "R * J / P = %d * %d / %d\n", R, J, P);
 594                         pcm512x->real_pll = pll_rate;
 595                         goto done;
 596                 }
 597                 /* no luck */
 598         }
 599
 600         R = 1;
 601
 602         if (num > 0xffffffffUL / 10000)
 603                 goto fallback;
 604
 605         /* Try to find an exact pll_rate using the D > 0 case */
 606         common = gcd(10000 * num, den);
 607         num = 10000 * num / common;
 608         den /= common;
 609         dev_dbg(dev, "num %lu den %lu common %lu\n", num, den, common);
 610
 611         for (P = den; P <= 15; P++) {
 612                 if (pllin_rate / P < 6667000 || 200000000 < pllin_rate / P)
 613                         continue;
 614                 if (num * P % den)
 615                         continue;
 616                 K = num * P / den;
 617                 /* J == 12 is ok if D == 0 */
 618                 if (K < 40000 || K > 120000)
 619                         continue;
 620
 621                 J = K / 10000;
 622                 D = K % 10000;
 623                 dev_dbg(dev, "J.D / P = %d.%04d / %d\n", J, D, P);
 624                 pcm512x->real_pll = pll_rate;
 625                 goto done;
 626         }
 627
 628         /* Fall back to an approximate pll_rate */
 629
 630 fallback:
 631         /* find smallest possible P */
 632         P = DIV_ROUND_UP(pllin_rate, 20000000);
 633         if (!P)
 634                 P = 1;
 635         else if (P > 15) {
 636                 dev_err(dev, "Need a slower clock as pll-input\n");
 637                 return -EINVAL;
 638         }
 639         if (pllin_rate / P < 6667000) {
 640                 dev_err(dev, "Need a faster clock as pll-input\n");
 641                 return -EINVAL;
 642         }
 643         K = DIV_ROUND_CLOSEST_ULL(10000ULL * pll_rate * P, pllin_rate);
 644         if (K < 40000)
 645                 K = 40000;
 646         /* J == 12 is ok if D == 0 */
 647         if (K > 120000)
 648                 K = 120000;
 649         J = K / 10000;
 650         D = K % 10000;
 651         dev_dbg(dev, "J.D / P ~ %d.%04d / %d\n", J, D, P);
 652         pcm512x->real_pll = DIV_ROUND_DOWN_ULL((u64)K * pllin_rate, 10000 * P);
 653
 654 done:
 655         pcm512x->pll_r = R;
 656         pcm512x->pll_j = J;
 657         pcm512x->pll_d = D;
 658         pcm512x->pll_p = P;
 659         return 0;
 660 }
 661
 662 static int pcm512x_set_dividers(struct snd_soc_dai *dai,
 663                                 struct snd_pcm_hw_params *params)
 664 {
 665         struct device *dev = dai->dev;
 666         struct snd_soc_codec *codec = dai->codec;
 667         struct pcm512x_priv *pcm512x = snd_soc_codec_get_drvdata(codec);
 668         unsigned long pllin_rate = 0;
 669         unsigned long pll_rate;
 670         unsigned long sck_rate;
 671         unsigned long mck_rate;
 672         unsigned long bclk_rate;
 673         unsigned long sample_rate;
 674         unsigned long osr_rate;
 675         int bclk_div;
 676         int lrclk_div;
 677         int dsp_div;
 678         int dac_div;
 679         unsigned long dac_rate;
 680         int ncp_div;
 681         int osr_div;
 682         unsigned long dac_mul;
 683         unsigned long sck_mul;
 684         int ret;
 685         int idac;
 686         int fssp;
 687
 688         lrclk_div = snd_soc_params_to_frame_size(params);
 689         if (lrclk_div == 0) {
 690                 dev_err(dev, "No LRCLK?\n");
 691                 return -EINVAL;
 692         }
 693
 694         if (!pcm512x->pll_out) {
 695                 sck_rate = clk_get_rate(pcm512x->sclk);
 696                 bclk_div = params->rate_den * 64 / lrclk_div;
 697                 bclk_rate = DIV_ROUND_CLOSEST(sck_rate, bclk_div);
 698
 699                 mck_rate = sck_rate;
 700         } else {
 701                 ret = snd_soc_params_to_bclk(params);
 702                 if (ret < 0) {
 703                         dev_err(dev, "Failed to find suitable BCLK: %d\n", ret);
 704                         return ret;
 705                 }
 706                 if (ret == 0) {
 707                         dev_err(dev, "No BCLK?\n");
 708                         return -EINVAL;
 709                 }
 710                 bclk_rate = ret;
 711
 712                 pllin_rate = clk_get_rate(pcm512x->sclk);
 713
 714                 sck_rate = pcm512x_find_sck(dai, bclk_rate);
 715                 if (!sck_rate)
 716                         return -EINVAL;
 717                 pll_rate = 4 * sck_rate;
 718
 719                 ret = pcm512x_find_pll_coeff(dai, pllin_rate, pll_rate);
 720                 if (ret != 0)
 721                         return ret;
 722
 723                 ret = regmap_write(pcm512x->regmap,
 724                                    PCM512x_PLL_COEFF_0, pcm512x->pll_p - 1);
 725                 if (ret != 0) {
 726                         dev_err(dev, "Failed to write PLL P: %d\n", ret);
 727                         return ret;
 728                 }
 729
 730                 ret = regmap_write(pcm512x->regmap,
 731                                    PCM512x_PLL_COEFF_1, pcm512x->pll_j);
 732                 if (ret != 0) {
 733                         dev_err(dev, "Failed to write PLL J: %d\n", ret);
 734                         return ret;
 735                 }
 736
 737                 ret = regmap_write(pcm512x->regmap,
 738                                    PCM512x_PLL_COEFF_2, pcm512x->pll_d >> 8);
 739                 if (ret != 0) {
 740                         dev_err(dev, "Failed to write PLL D msb: %d\n", ret);
 741                         return ret;
 742                 }
 743
 744                 ret = regmap_write(pcm512x->regmap,
 745                                    PCM512x_PLL_COEFF_3, pcm512x->pll_d & 0xff);
 746                 if (ret != 0) {
 747                         dev_err(dev, "Failed to write PLL D lsb: %d\n", ret);
 748                         return ret;
 749                 }
 750
 751                 ret = regmap_write(pcm512x->regmap,
 752                                    PCM512x_PLL_COEFF_4, pcm512x->pll_r - 1);
 753                 if (ret != 0) {
 754                         dev_err(dev, "Failed to write PLL R: %d\n", ret);
 755                         return ret;
 756                 }
 757
 758                 mck_rate = pcm512x->real_pll;
 759
 760                 bclk_div = DIV_ROUND_CLOSEST(sck_rate, bclk_rate);
 761         }
 762
 763         if (bclk_div > 128) {
 764                 dev_err(dev, "Failed to find BCLK divider\n");
 765                 return -EINVAL;
 766         }
 767
 768         /* the actual rate */
 769         sample_rate = sck_rate / bclk_div / lrclk_div;
 770         osr_rate = 16 * sample_rate;
 771
 772         /* run DSP no faster than 50 MHz */
 773         dsp_div = mck_rate > 50000000 ? 2 : 1;
 774
 775         /* run DAC no faster than 6144000 Hz */
 776         dac_mul = 6144000 / osr_rate;
 777         sck_mul = sck_rate / osr_rate;
 778         for (; dac_mul; dac_mul--) {
 779                 if (!(sck_mul % dac_mul))
 780                         break;
 781         }
 782         if (!dac_mul) {
 783                 dev_err(dev, "Failed to find DAC rate\n");
 784                 return -EINVAL;
 785         }
 786
 787         dac_rate = dac_mul * osr_rate;
 788         dev_dbg(dev, "dac_rate %lu sample_rate %lu\n", dac_rate, sample_rate);
 789
 790         dac_div = DIV_ROUND_CLOSEST(sck_rate, dac_rate);
 791         if (dac_div > 128) {
 792                 dev_err(dev, "Failed to find DAC divider\n");
 793                 return -EINVAL;
 794         }
 795
 796         ncp_div = DIV_ROUND_CLOSEST(sck_rate / dac_div, 1536000);
 797         if (ncp_div > 128 || sck_rate / dac_div / ncp_div > 2048000) {
 798                 /* run NCP no faster than 2048000 Hz, but why? */
 799                 ncp_div = DIV_ROUND_UP(sck_rate / dac_div, 2048000);
 800                 if (ncp_div > 128) {
 801                         dev_err(dev, "Failed to find NCP divider\n");
 802                         return -EINVAL;
 803                 }
 804         }
 805
 806         osr_div = DIV_ROUND_CLOSEST(dac_rate, osr_rate);
 807         if (osr_div > 128) {
 808                 dev_err(dev, "Failed to find OSR divider\n");
 809                 return -EINVAL;
 810         }
 811
 812         idac = mck_rate / (dsp_div * sample_rate);
 813
 814         ret = regmap_write(pcm512x->regmap, PCM512x_DSP_CLKDIV, dsp_div - 1);
 815         if (ret != 0) {
 816                 dev_err(dev, "Failed to write DSP divider: %d\n", ret);
 817                 return ret;
 818         }
 819
 820         ret = regmap_write(pcm512x->regmap, PCM512x_DAC_CLKDIV, dac_div - 1);
 821         if (ret != 0) {
 822                 dev_err(dev, "Failed to write DAC divider: %d\n", ret);
 823                 return ret;
 824         }
 825
 826         ret = regmap_write(pcm512x->regmap, PCM512x_NCP_CLKDIV, ncp_div - 1);
 827         if (ret != 0) {
 828                 dev_err(dev, "Failed to write NCP divider: %d\n", ret);
 829                 return ret;
 830         }
 831
 832         ret = regmap_write(pcm512x->regmap, PCM512x_OSR_CLKDIV, osr_div - 1);
 833         if (ret != 0) {
 834                 dev_err(dev, "Failed to write OSR divider: %d\n", ret);
 835                 return ret;
 836         }
 837
 838         ret = regmap_write(pcm512x->regmap,
 839                            PCM512x_MASTER_CLKDIV_1, bclk_div - 1);
 840         if (ret != 0) {
 841                 dev_err(dev, "Failed to write BCLK divider: %d\n", ret);
 842                 return ret;
 843         }
 844
 845         ret = regmap_write(pcm512x->regmap,
 846                            PCM512x_MASTER_CLKDIV_2, lrclk_div - 1);
 847         if (ret != 0) {
 848                 dev_err(dev, "Failed to write LRCLK divider: %d\n", ret);
 849                 return ret;
 850         }
 851
 852         ret = regmap_write(pcm512x->regmap, PCM512x_IDAC_1, idac >> 8);
 853         if (ret != 0) {
 854                 dev_err(dev, "Failed to write IDAC msb divider: %d\n", ret);
 855                 return ret;
 856         }
 857
 858         ret = regmap_write(pcm512x->regmap, PCM512x_IDAC_2, idac & 0xff);
 859         if (ret != 0) {
 860                 dev_err(dev, "Failed to write IDAC lsb divider: %d\n", ret);
 861                 return ret;
 862         }
 863
 864         if (sample_rate <= 48000)
 865                 fssp = PCM512x_FSSP_48KHZ;
 866         else if (sample_rate <= 96000)
 867                 fssp = PCM512x_FSSP_96KHZ;
 868         else if (sample_rate <= 192000)
 869                 fssp = PCM512x_FSSP_192KHZ;
 870         else
 871                 fssp = PCM512x_FSSP_384KHZ;
 872         ret = regmap_update_bits(pcm512x->regmap, PCM512x_FS_SPEED_MODE,
 873                                  PCM512x_FSSP, fssp);
 874         if (ret != 0) {
 875                 dev_err(codec->dev, "Failed to set fs speed: %d\n", ret);
 876                 return ret;
 877         }
 878
 879         dev_dbg(codec->dev, "DSP divider %d\n", dsp_div);
 880         dev_dbg(codec->dev, "DAC divider %d\n", dac_div);
 881         dev_dbg(codec->dev, "NCP divider %d\n", ncp_div);
 882         dev_dbg(codec->dev, "OSR divider %d\n", osr_div);
 883         dev_dbg(codec->dev, "BCK divider %d\n", bclk_div);
 884         dev_dbg(codec->dev, "LRCK divider %d\n", lrclk_div);
 885         dev_dbg(codec->dev, "IDAC %d\n", idac);
 886         dev_dbg(codec->dev, "1<<FSSP %d\n", 1 << fssp);
 887
 888         return 0;
 889 }
 890
 891 static int pcm512x_hw_params(struct snd_pcm_substream *substream,
 892                              struct snd_pcm_hw_params *params,
 893                              struct snd_soc_dai *dai)
 894 {
 895         struct snd_soc_codec *codec = dai->codec;
 896         struct pcm512x_priv *pcm512x = snd_soc_codec_get_drvdata(codec);
 897         int alen;
 898         int gpio;
 899         int ret;
 900
 901         dev_dbg(codec->dev, "hw_params %u Hz, %u channels\n",
 902                 params_rate(params),
 903                 params_channels(params));
 904
 905         switch (snd_pcm_format_width(params_format(params))) {
 906         case 16:
 907                 alen = PCM512x_ALEN_16;
 908                 break;
 909         case 20:
 910                 alen = PCM512x_ALEN_20;
 911                 break;
 912         case 24:
 913                 alen = PCM512x_ALEN_24;
 914                 break;
 915         case 32:
 916                 alen = PCM512x_ALEN_32;
 917                 break;
 918         default:
 919                 dev_err(codec->dev, "Bad frame size: %d\n",
 920                         snd_pcm_format_width(params_format(params)));
 921                 return -EINVAL;
 922         }
 923
 924         switch (pcm512x->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 925         case SND_SOC_DAIFMT_CBS_CFS:
 926                 ret = regmap_update_bits(pcm512x->regmap,
 927                                          PCM512x_BCLK_LRCLK_CFG,
 928                                          PCM512x_BCKP
 929                                          | PCM512x_BCKO | PCM512x_LRKO,
 930                                          0);
 931                 if (ret != 0) {
 932                         dev_err(codec->dev,
 933                                 "Failed to enable slave mode: %d\n", ret);
 934                         return ret;
 935                 }
 936
 937                 ret = regmap_update_bits(pcm512x->regmap, PCM512x_ERROR_DETECT,
 938                                          PCM512x_DCAS, 0);
 939                 if (ret != 0) {
 940                         dev_err(codec->dev,
 941                                 "Failed to enable clock divider autoset: %d\n",
 942                                 ret);
 943                         return ret;
 944                 }
 945                 return 0;
 946         case SND_SOC_DAIFMT_CBM_CFM:
 947                 break;
 948         default:
 949                 return -EINVAL;
 950         }
 951
 952         ret = regmap_update_bits(pcm512x->regmap, PCM512x_I2S_1,
 953                                  PCM512x_ALEN, alen);
 954         if (ret != 0) {
 955                 dev_err(codec->dev, "Failed to set frame size: %d\n", ret);
 956                 return ret;
 957         }
 958
 959         if (pcm512x->pll_out) {
 960                 ret = regmap_write(pcm512x->regmap, PCM512x_FLEX_A, 0x11);
 961                 if (ret != 0) {
 962                         dev_err(codec->dev, "Failed to set FLEX_A: %d\n", ret);
 963                         return ret;
 964                 }
 965
 966                 ret = regmap_write(pcm512x->regmap, PCM512x_FLEX_B, 0xff);
 967                 if (ret != 0) {
 968                         dev_err(codec->dev, "Failed to set FLEX_B: %d\n", ret);
 969                         return ret;
 970                 }
 971
 972                 ret = regmap_update_bits(pcm512x->regmap, PCM512x_ERROR_DETECT,
 973                                          PCM512x_IDFS | PCM512x_IDBK
 974                                          | PCM512x_IDSK | PCM512x_IDCH
 975                                          | PCM512x_IDCM | PCM512x_DCAS
 976                                          | PCM512x_IPLK,
 977                                          PCM512x_IDFS | PCM512x_IDBK
 978                                          | PCM512x_IDSK | PCM512x_IDCH
 979                                          | PCM512x_DCAS);
 980                 if (ret != 0) {
 981                         dev_err(codec->dev,
 982                                 "Failed to ignore auto-clock failures: %d\n",
 983                                 ret);
 984                         return ret;
 985                 }
 986         } else {
 987                 ret = regmap_update_bits(pcm512x->regmap, PCM512x_ERROR_DETECT,
 988                                          PCM512x_IDFS | PCM512x_IDBK
 989                                          | PCM512x_IDSK | PCM512x_IDCH
 990                                          | PCM512x_IDCM | PCM512x_DCAS
 991                                          | PCM512x_IPLK,
 992                                          PCM512x_IDFS | PCM512x_IDBK
 993                                          | PCM512x_IDSK | PCM512x_IDCH
 994                                          | PCM512x_DCAS | PCM512x_IPLK);
 995                 if (ret != 0) {
 996                         dev_err(codec->dev,
 997                                 "Failed to ignore auto-clock failures: %d\n",
 998                                 ret);
 999                         return ret;
1000                 }
1001
1002                 ret = regmap_update_bits(pcm512x->regmap, PCM512x_PLL_EN,
1003                                          PCM512x_PLLE, 0);
1004                 if (ret != 0) {
1005                         dev_err(codec->dev, "Failed to disable pll: %d\n", ret);
1006                         return ret;
1007                 }
1008         }
1009
1010         ret = pcm512x_set_dividers(dai, params);
1011         if (ret != 0)
1012                 return ret;
1013
1014         ret = regmap_update_bits(pcm512x->regmap, PCM512x_DAC_REF,
1015                                  PCM512x_SDAC, PCM512x_SDAC_SCK);
1016         if (ret != 0) {
1017                 dev_err(codec->dev, "Failed to set sck as dacref: %d\n", ret);
1018                 return ret;
1019         }
1020
1021         if (pcm512x->pll_out) {
1022                 ret = regmap_update_bits(pcm512x->regmap, PCM512x_PLL_REF,
1023                                          PCM512x_SREF, PCM512x_SREF_GPIO);
1024                 if (ret != 0) {
1025                         dev_err(codec->dev,
1026                                 "Failed to set gpio as pllref: %d\n", ret);
1027                         return ret;
1028                 }
1029
1030                 gpio = PCM512x_GREF_GPIO1 + pcm512x->pll_in - 1;
1031                 ret = regmap_update_bits(pcm512x->regmap, PCM512x_GPIO_PLLIN,
1032                                          PCM512x_GREF, gpio);
1033                 if (ret != 0) {
1034                         dev_err(codec->dev,
1035                                 "Failed to set gpio %d as pllin: %d\n",
1036                                 pcm512x->pll_in, ret);
1037                         return ret;
1038                 }
1039
1040                 ret = regmap_update_bits(pcm512x->regmap, PCM512x_PLL_EN,
1041                                          PCM512x_PLLE, PCM512x_PLLE);
1042                 if (ret != 0) {
1043                         dev_err(codec->dev, "Failed to enable pll: %d\n", ret);
1044                         return ret;
1045                 }
1046         }
1047
1048         ret = regmap_update_bits(pcm512x->regmap, PCM512x_BCLK_LRCLK_CFG,
1049                                  PCM512x_BCKP | PCM512x_BCKO | PCM512x_LRKO,
1050                                  PCM512x_BCKO | PCM512x_LRKO);
1051         if (ret != 0) {
1052                 dev_err(codec->dev, "Failed to enable clock output: %d\n", ret);
1053                 return ret;
1054         }
1055
1056         ret = regmap_update_bits(pcm512x->regmap, PCM512x_MASTER_MODE,
1057                                  PCM512x_RLRK | PCM512x_RBCK,
1058                                  PCM512x_RLRK | PCM512x_RBCK);
1059         if (ret != 0) {
1060                 dev_err(codec->dev, "Failed to enable master mode: %d\n", ret);
1061                 return ret;
1062         }
1063
1064         if (pcm512x->pll_out) {
1065                 gpio = PCM512x_G1OE << (pcm512x->pll_out - 1);
1066                 ret = regmap_update_bits(pcm512x->regmap, PCM512x_GPIO_EN,
1067                                          gpio, gpio);
1068                 if (ret != 0) {
1069                         dev_err(codec->dev, "Failed to enable gpio %d: %d\n",
1070                                 pcm512x->pll_out, ret);
1071                         return ret;
1072                 }
1073
1074                 gpio = PCM512x_GPIO_OUTPUT_1 + pcm512x->pll_out - 1;
1075                 ret = regmap_update_bits(pcm512x->regmap, gpio,
1076                                          PCM512x_GxSL, PCM512x_GxSL_PLLCK);
1077                 if (ret != 0) {
1078                         dev_err(codec->dev, "Failed to output pll on %d: %d\n",
1079                                 ret, pcm512x->pll_out);
1080                         return ret;
1081                 }
1082
1083                 gpio = PCM512x_G1OE << (4 - 1);
1084                 ret = regmap_update_bits(pcm512x->regmap, PCM512x_GPIO_EN,
1085                                          gpio, gpio);
1086                 if (ret != 0) {
1087                         dev_err(codec->dev, "Failed to enable gpio %d: %d\n",
1088                                 4, ret);
1089                         return ret;
1090                 }
1091
1092                 gpio = PCM512x_GPIO_OUTPUT_1 + 4 - 1;
1093                 ret = regmap_update_bits(pcm512x->regmap, gpio,
1094                                          PCM512x_GxSL, PCM512x_GxSL_PLLLK);
1095                 if (ret != 0) {
1096                         dev_err(codec->dev,
1097                                 "Failed to output pll lock on %d: %d\n",
1098                                 ret, 4);
1099                         return ret;
1100                 }
1101         }
1102
1103         ret = regmap_update_bits(pcm512x->regmap, PCM512x_SYNCHRONIZE,
1104                                  PCM512x_RQSY, PCM512x_RQSY_HALT);
1105         if (ret != 0) {
1106                 dev_err(codec->dev, "Failed to halt clocks: %d\n", ret);
1107                 return ret;
1108         }
1109
1110         ret = regmap_update_bits(pcm512x->regmap, PCM512x_SYNCHRONIZE,
1111                                  PCM512x_RQSY, PCM512x_RQSY_RESUME);
1112         if (ret != 0) {
1113                 dev_err(codec->dev, "Failed to resume clocks: %d\n", ret);
1114                 return ret;
1115         }
1116
1117         return 0;
1118 }
1119
1120 static int pcm512x_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1121 {
1122         struct snd_soc_codec *codec = dai->codec;
1123         struct pcm512x_priv *pcm512x = snd_soc_codec_get_drvdata(codec);
1124
1125         pcm512x->fmt = fmt;
1126
1127         return 0;
1128 }
1129
1130 static const struct snd_soc_dai_ops pcm512x_dai_ops = {
1131         .startup = pcm512x_dai_startup,
1132         .hw_params = pcm512x_hw_params,
1133         .set_fmt = pcm512x_set_fmt,
1134 };
1135
1136 static struct snd_soc_dai_driver pcm512x_dai = {
1137         .name = "pcm512x-hifi",
1138         .playback = {
1139                 .stream_name = "Playback",
1140                 .channels_min = 2,
1141                 .channels_max = 2,
1142                 .rates = SNDRV_PCM_RATE_CONTINUOUS,
1143                 .rate_min = 8000,
1144                 .rate_max = 384000,
1145                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
1146                            SNDRV_PCM_FMTBIT_S24_LE |
1147                            SNDRV_PCM_FMTBIT_S32_LE
1148         },
1149         .ops = &pcm512x_dai_ops,
1150 };
1151
1152 static struct snd_soc_codec_driver pcm512x_codec_driver = {
1153         .set_bias_level = pcm512x_set_bias_level,
1154         .idle_bias_off = true,
1155
1156         .controls = pcm512x_controls,
1157         .num_controls = ARRAY_SIZE(pcm512x_controls),
1158         .dapm_widgets = pcm512x_dapm_widgets,
1159         .num_dapm_widgets = ARRAY_SIZE(pcm512x_dapm_widgets),
1160         .dapm_routes = pcm512x_dapm_routes,
1161         .num_dapm_routes = ARRAY_SIZE(pcm512x_dapm_routes),
1162 };
1163
1164 static const struct regmap_range_cfg pcm512x_range = {
1165         .name = "Pages", .range_min = PCM512x_VIRT_BASE,
1166         .range_max = PCM512x_MAX_REGISTER,
1167         .selector_reg = PCM512x_PAGE,
1168         .selector_mask = 0xff,
1169         .window_start = 0, .window_len = 0x100,
1170 };
1171
1172 const struct regmap_config pcm512x_regmap = {
1173         .reg_bits = 8,
1174         .val_bits = 8,
1175
1176         .readable_reg = pcm512x_readable,
1177         .volatile_reg = pcm512x_volatile,
1178
1179         .ranges = &pcm512x_range,
1180         .num_ranges = 1,
1181
1182         .max_register = PCM512x_MAX_REGISTER,
1183         .reg_defaults = pcm512x_reg_defaults,
1184         .num_reg_defaults = ARRAY_SIZE(pcm512x_reg_defaults),
1185         .cache_type = REGCACHE_RBTREE,
1186 };
1187 EXPORT_SYMBOL_GPL(pcm512x_regmap);
1188
1189 int pcm512x_probe(struct device *dev, struct regmap *regmap)
1190 {
1191         struct pcm512x_priv *pcm512x;
1192         int i, ret;
1193         u32 val;
1194
1195         pcm512x = devm_kzalloc(dev, sizeof(struct pcm512x_priv), GFP_KERNEL);
1196         if (!pcm512x)
1197                 return -ENOMEM;
1198
1199         dev_set_drvdata(dev, pcm512x);
1200         pcm512x->regmap = regmap;
1201
1202         for (i = 0; i < ARRAY_SIZE(pcm512x->supplies); i++)
1203                 pcm512x->supplies[i].supply = pcm512x_supply_names[i];
1204
1205         ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(pcm512x->supplies),
1206                                       pcm512x->supplies);
1207         if (ret != 0) {
1208                 dev_err(dev, "Failed to get supplies: %d\n", ret);
1209                 return ret;
1210         }
1211
1212         pcm512x->supply_nb[0].notifier_call = pcm512x_regulator_event_0;
1213         pcm512x->supply_nb[1].notifier_call = pcm512x_regulator_event_1;
1214         pcm512x->supply_nb[2].notifier_call = pcm512x_regulator_event_2;
1215
1216         for (i = 0; i < ARRAY_SIZE(pcm512x->supplies); i++) {
1217                 ret = regulator_register_notifier(pcm512x->supplies[i].consumer,
1218                                                   &pcm512x->supply_nb[i]);
1219                 if (ret != 0) {
1220                         dev_err(dev,
1221                                 "Failed to register regulator notifier: %d\n",
1222                                 ret);
1223                 }
1224         }
1225
1226         ret = regulator_bulk_enable(ARRAY_SIZE(pcm512x->supplies),
1227                                     pcm512x->supplies);
1228         if (ret != 0) {
1229                 dev_err(dev, "Failed to enable supplies: %d\n", ret);
1230                 return ret;
1231         }
1232
1233         /* Reset the device, verifying I/O in the process for I2C */
1234         ret = regmap_write(regmap, PCM512x_RESET,
1235                            PCM512x_RSTM | PCM512x_RSTR);
1236         if (ret != 0) {
1237                 dev_err(dev, "Failed to reset device: %d\n", ret);
1238                 goto err;
1239         }
1240
1241         ret = regmap_write(regmap, PCM512x_RESET, 0);
1242         if (ret != 0) {
1243                 dev_err(dev, "Failed to reset device: %d\n", ret);
1244                 goto err;
1245         }
1246
1247         pcm512x->sclk = devm_clk_get(dev, NULL);
1248         if (PTR_ERR(pcm512x->sclk) == -EPROBE_DEFER)
1249                 return -EPROBE_DEFER;
1250         if (!IS_ERR(pcm512x->sclk)) {
1251                 ret = clk_prepare_enable(pcm512x->sclk);
1252                 if (ret != 0) {
1253                         dev_err(dev, "Failed to enable SCLK: %d\n", ret);
1254                         return ret;
1255                 }
1256         }
1257
1258         /* Default to standby mode */
1259         ret = regmap_update_bits(pcm512x->regmap, PCM512x_POWER,
1260                                  PCM512x_RQST, PCM512x_RQST);
1261         if (ret != 0) {
1262                 dev_err(dev, "Failed to request standby: %d\n",
1263                         ret);
1264                 goto err_clk;
1265         }
1266
1267         pm_runtime_set_active(dev);
1268         pm_runtime_enable(dev);
1269         pm_runtime_idle(dev);
1270
1271 #ifdef CONFIG_OF
1272         if (dev->of_node) {
1273                 const struct device_node *np = dev->of_node;
1274
1275                 if (of_property_read_u32(np, "pll-in", &val) >= 0) {
1276                         if (val > 6) {
1277                                 dev_err(dev, "Invalid pll-in\n");
1278                                 ret = -EINVAL;
1279                                 goto err_clk;
1280                         }
1281                         pcm512x->pll_in = val;
1282                 }
1283
1284                 if (of_property_read_u32(np, "pll-out", &val) >= 0) {
1285                         if (val > 6) {
1286                                 dev_err(dev, "Invalid pll-out\n");
1287                                 ret = -EINVAL;
1288                                 goto err_clk;
1289                         }
1290                         pcm512x->pll_out = val;
1291                 }
1292
1293                 if (!pcm512x->pll_in != !pcm512x->pll_out) {
1294                         dev_err(dev,
1295                                 "Error: both pll-in and pll-out, or none\n");
1296                         ret = -EINVAL;
1297                         goto err_clk;
1298                 }
1299                 if (pcm512x->pll_in && pcm512x->pll_in == pcm512x->pll_out) {
1300                         dev_err(dev, "Error: pll-in == pll-out\n");
1301                         ret = -EINVAL;
1302                         goto err_clk;
1303                 }
1304         }
1305 #endif
1306
1307         ret = snd_soc_register_codec(dev, &pcm512x_codec_driver,
1308                                     &pcm512x_dai, 1);
1309         if (ret != 0) {
1310                 dev_err(dev, "Failed to register CODEC: %d\n", ret);
1311                 goto err_pm;
1312         }
1313
1314         return 0;
1315
1316 err_pm:
1317         pm_runtime_disable(dev);
1318 err_clk:
1319         if (!IS_ERR(pcm512x->sclk))
1320                 clk_disable_unprepare(pcm512x->sclk);
1321 err:
1322         regulator_bulk_disable(ARRAY_SIZE(pcm512x->supplies),
1323                                      pcm512x->supplies);
1324         return ret;
1325 }
1326 EXPORT_SYMBOL_GPL(pcm512x_probe);
1327
1328 void pcm512x_remove(struct device *dev)
1329 {
1330         struct pcm512x_priv *pcm512x = dev_get_drvdata(dev);
1331
1332         snd_soc_unregister_codec(dev);
1333         pm_runtime_disable(dev);
1334         if (!IS_ERR(pcm512x->sclk))
1335                 clk_disable_unprepare(pcm512x->sclk);
1336         regulator_bulk_disable(ARRAY_SIZE(pcm512x->supplies),
1337                                pcm512x->supplies);
1338 }
1339 EXPORT_SYMBOL_GPL(pcm512x_remove);
1340
1341 #ifdef CONFIG_PM
1342 static int pcm512x_suspend(struct device *dev)
1343 {
1344         struct pcm512x_priv *pcm512x = dev_get_drvdata(dev);
1345         int ret;
1346
1347         ret = regmap_update_bits(pcm512x->regmap, PCM512x_POWER,
1348                                  PCM512x_RQPD, PCM512x_RQPD);
1349         if (ret != 0) {
1350                 dev_err(dev, "Failed to request power down: %d\n", ret);
1351                 return ret;
1352         }
1353
1354         ret = regulator_bulk_disable(ARRAY_SIZE(pcm512x->supplies),
1355                                      pcm512x->supplies);
1356         if (ret != 0) {
1357                 dev_err(dev, "Failed to disable supplies: %d\n", ret);
1358                 return ret;
1359         }
1360
1361         if (!IS_ERR(pcm512x->sclk))
1362                 clk_disable_unprepare(pcm512x->sclk);
1363
1364         return 0;
1365 }
1366
1367 static int pcm512x_resume(struct device *dev)
1368 {
1369         struct pcm512x_priv *pcm512x = dev_get_drvdata(dev);
1370         int ret;
1371
1372         if (!IS_ERR(pcm512x->sclk)) {
1373                 ret = clk_prepare_enable(pcm512x->sclk);
1374                 if (ret != 0) {
1375                         dev_err(dev, "Failed to enable SCLK: %d\n", ret);
1376                         return ret;
1377                 }
1378         }
1379
1380         ret = regulator_bulk_enable(ARRAY_SIZE(pcm512x->supplies),
1381                                     pcm512x->supplies);
1382         if (ret != 0) {
1383                 dev_err(dev, "Failed to enable supplies: %d\n", ret);
1384                 return ret;
1385         }
1386
1387         regcache_cache_only(pcm512x->regmap, false);
1388         ret = regcache_sync(pcm512x->regmap);
1389         if (ret != 0) {
1390                 dev_err(dev, "Failed to sync cache: %d\n", ret);
1391                 return ret;
1392         }
1393
1394         ret = regmap_update_bits(pcm512x->regmap, PCM512x_POWER,
1395                                  PCM512x_RQPD, 0);
1396         if (ret != 0) {
1397                 dev_err(dev, "Failed to remove power down: %d\n", ret);
1398                 return ret;
1399         }
1400
1401         return 0;
1402 }
1403 #endif
1404
1405 const struct dev_pm_ops pcm512x_pm_ops = {
1406         SET_RUNTIME_PM_OPS(pcm512x_suspend, pcm512x_resume, NULL)
1407 };
1408 EXPORT_SYMBOL_GPL(pcm512x_pm_ops);
1409
1410 MODULE_DESCRIPTION("ASoC PCM512x codec driver");
1411 MODULE_AUTHOR("Mark Brown <broonie@linaro.org>");
1412 MODULE_LICENSE("GPL v2");