sound/soc/codecs/wm8991.c

   1 /*
   2  * wm8991.c  --  WM8991 ALSA Soc Audio driver
   3  *
   4  * Copyright 2007-2010 Wolfson Microelectronics PLC.
   5  * Author: Graeme Gregory
   6  *         Graeme.Gregory@wolfsonmicro.com
   7  *
   8  *  This program is free software; you can redistribute  it and/or modify it
   9  *  under  the terms of  the GNU General  Public License as published by the
  10  *  Free Software Foundation;  either version 2 of the  License, or (at your
  11  *  option) any later version.
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/moduleparam.h>
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18 #include <linux/delay.h>
  19 #include <linux/pm.h>
  20 #include <linux/i2c.h>
  21 #include <linux/regmap.h>
  22 #include <linux/slab.h>
  23 #include <sound/core.h>
  24 #include <sound/pcm.h>
  25 #include <sound/pcm_params.h>
  26 #include <sound/soc.h>
  27 #include <sound/soc-dapm.h>
  28 #include <sound/initval.h>
  29 #include <sound/tlv.h>
  30 #include <asm/div64.h>
  31
  32 #include "wm8991.h"
  33
  34 struct wm8991_priv {
  35         struct regmap *regmap;
  36         unsigned int pcmclk;
  37 };
  38
  39 static const struct reg_default wm8991_reg_defaults[] = {
  40         {  1, 0x0000 },     /* R1  - Power Management (1) */
  41         {  2, 0x6000 },     /* R2  - Power Management (2) */
  42         {  3, 0x0000 },     /* R3  - Power Management (3) */
  43         {  4, 0x4050 },     /* R4  - Audio Interface (1) */
  44         {  5, 0x4000 },     /* R5  - Audio Interface (2) */
  45         {  6, 0x01C8 },     /* R6  - Clocking (1) */
  46         {  7, 0x0000 },     /* R7  - Clocking (2) */
  47         {  8, 0x0040 },     /* R8  - Audio Interface (3) */
  48         {  9, 0x0040 },     /* R9  - Audio Interface (4) */
  49         { 10, 0x0004 },     /* R10 - DAC CTRL */
  50         { 11, 0x00C0 },     /* R11 - Left DAC Digital Volume */
  51         { 12, 0x00C0 },     /* R12 - Right DAC Digital Volume */
  52         { 13, 0x0000 },     /* R13 - Digital Side Tone */
  53         { 14, 0x0100 },     /* R14 - ADC CTRL */
  54         { 15, 0x00C0 },     /* R15 - Left ADC Digital Volume */
  55         { 16, 0x00C0 },     /* R16 - Right ADC Digital Volume */
  56
  57         { 18, 0x0000 },     /* R18 - GPIO CTRL 1 */
  58         { 19, 0x1000 },     /* R19 - GPIO1 & GPIO2 */
  59         { 20, 0x1010 },     /* R20 - GPIO3 & GPIO4 */
  60         { 21, 0x1010 },     /* R21 - GPIO5 & GPIO6 */
  61         { 22, 0x8000 },     /* R22 - GPIOCTRL 2 */
  62         { 23, 0x0800 },     /* R23 - GPIO_POL */
  63         { 24, 0x008B },     /* R24 - Left Line Input 1&2 Volume */
  64         { 25, 0x008B },     /* R25 - Left Line Input 3&4 Volume */
  65         { 26, 0x008B },     /* R26 - Right Line Input 1&2 Volume */
  66         { 27, 0x008B },     /* R27 - Right Line Input 3&4 Volume */
  67         { 28, 0x0000 },     /* R28 - Left Output Volume */
  68         { 29, 0x0000 },     /* R29 - Right Output Volume */
  69         { 30, 0x0066 },     /* R30 - Line Outputs Volume */
  70         { 31, 0x0022 },     /* R31 - Out3/4 Volume */
  71         { 32, 0x0079 },     /* R32 - Left OPGA Volume */
  72         { 33, 0x0079 },     /* R33 - Right OPGA Volume */
  73         { 34, 0x0003 },     /* R34 - Speaker Volume */
  74         { 35, 0x0003 },     /* R35 - ClassD1 */
  75
  76         { 37, 0x0100 },     /* R37 - ClassD3 */
  77
  78         { 39, 0x0000 },     /* R39 - Input Mixer1 */
  79         { 40, 0x0000 },     /* R40 - Input Mixer2 */
  80         { 41, 0x0000 },     /* R41 - Input Mixer3 */
  81         { 42, 0x0000 },     /* R42 - Input Mixer4 */
  82         { 43, 0x0000 },     /* R43 - Input Mixer5 */
  83         { 44, 0x0000 },     /* R44 - Input Mixer6 */
  84         { 45, 0x0000 },     /* R45 - Output Mixer1 */
  85         { 46, 0x0000 },     /* R46 - Output Mixer2 */
  86         { 47, 0x0000 },     /* R47 - Output Mixer3 */
  87         { 48, 0x0000 },     /* R48 - Output Mixer4 */
  88         { 49, 0x0000 },     /* R49 - Output Mixer5 */
  89         { 50, 0x0000 },     /* R50 - Output Mixer6 */
  90         { 51, 0x0180 },     /* R51 - Out3/4 Mixer */
  91         { 52, 0x0000 },     /* R52 - Line Mixer1 */
  92         { 53, 0x0000 },     /* R53 - Line Mixer2 */
  93         { 54, 0x0000 },     /* R54 - Speaker Mixer */
  94         { 55, 0x0000 },     /* R55 - Additional Control */
  95         { 56, 0x0000 },     /* R56 - AntiPOP1 */
  96         { 57, 0x0000 },     /* R57 - AntiPOP2 */
  97         { 58, 0x0000 },     /* R58 - MICBIAS */
  98
  99         { 60, 0x0008 },     /* R60 - PLL1 */
 100         { 61, 0x0031 },     /* R61 - PLL2 */
 101         { 62, 0x0026 },     /* R62 - PLL3 */
 102 };
 103
 104 static bool wm8991_volatile(struct device *dev, unsigned int reg)
 105 {
 106         switch (reg) {
 107         case WM8991_RESET:
 108                 return true;
 109         default:
 110                 return false;
 111         }
 112 }
 113
 114 static const DECLARE_TLV_DB_LINEAR(rec_mix_tlv, -1500, 600);
 115 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(in_pga_tlv, -1650, 150, 0);
 116 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(out_mix_tlv, -2100, 300, 0);
 117 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(out_pga_tlv,
 118         0x00, 0x2f, SNDRV_CTL_TLVD_DB_SCALE_ITEM(SNDRV_CTL_TLVD_DB_GAIN_MUTE, 0, 1),
 119         0x30, 0x7f, SNDRV_CTL_TLVD_DB_SCALE_ITEM(-7300, 100, 0),
 120 );
 121 static const DECLARE_TLV_DB_LINEAR(out_omix_tlv, -600, 0);
 122 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(out_dac_tlv,
 123         0x00, 0xbf, SNDRV_CTL_TLVD_DB_SCALE_ITEM(-71625, 375, 1),
 124         0xc0, 0xff, SNDRV_CTL_TLVD_DB_SCALE_ITEM(0, 0, 0),
 125 );
 126 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(in_adc_tlv,
 127         0x00, 0xef, SNDRV_CTL_TLVD_DB_SCALE_ITEM(-71625, 375, 1),
 128         0xf0, 0xff, SNDRV_CTL_TLVD_DB_SCALE_ITEM(17625, 0, 0),
 129 );
 130 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(out_sidetone_tlv,
 131         0x00, 0x0c, SNDRV_CTL_TLVD_DB_SCALE_ITEM(-3600, 300, 0),
 132         0x0d, 0x0f, SNDRV_CTL_TLVD_DB_SCALE_ITEM(0, 0, 0),
 133 );
 134
 135 static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol,
 136                                       struct snd_ctl_elem_value *ucontrol)
 137 {
 138         struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
 139         int reg = kcontrol->private_value & 0xff;
 140         int ret;
 141         u16 val;
 142
 143         ret = snd_soc_put_volsw(kcontrol, ucontrol);
 144         if (ret < 0)
 145                 return ret;
 146
 147         /* now hit the volume update bits (always bit 8) */
 148         val = snd_soc_read(codec, reg);
 149         return snd_soc_write(codec, reg, val | 0x0100);
 150 }
 151
 152 static const char *wm8991_digital_sidetone[] =
 153 {"None", "Left ADC", "Right ADC", "Reserved"};
 154
 155 static SOC_ENUM_SINGLE_DECL(wm8991_left_digital_sidetone_enum,
 156                             WM8991_DIGITAL_SIDE_TONE,
 157                             WM8991_ADC_TO_DACL_SHIFT,
 158                             wm8991_digital_sidetone);
 159
 160 static SOC_ENUM_SINGLE_DECL(wm8991_right_digital_sidetone_enum,
 161                             WM8991_DIGITAL_SIDE_TONE,
 162                             WM8991_ADC_TO_DACR_SHIFT,
 163                             wm8991_digital_sidetone);
 164
 165 static const char *wm8991_adcmode[] =
 166 {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"};
 167
 168 static SOC_ENUM_SINGLE_DECL(wm8991_right_adcmode_enum,
 169                             WM8991_ADC_CTRL,
 170                             WM8991_ADC_HPF_CUT_SHIFT,
 171                             wm8991_adcmode);
 172
 173 static const struct snd_kcontrol_new wm8991_snd_controls[] = {
 174         /* INMIXL */
 175         SOC_SINGLE("LIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L12MNBST_BIT, 1, 0),
 176         SOC_SINGLE("LIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L34MNBST_BIT, 1, 0),
 177         /* INMIXR */
 178         SOC_SINGLE("RIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R12MNBST_BIT, 1, 0),
 179         SOC_SINGLE("RIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R34MNBST_BIT, 1, 0),
 180
 181         /* LOMIX */
 182         SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER3,
 183                 WM8991_LLI3LOVOL_SHIFT, WM8991_LLI3LOVOL_MASK, 1, out_mix_tlv),
 184         SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
 185                 WM8991_LR12LOVOL_SHIFT, WM8991_LR12LOVOL_MASK, 1, out_mix_tlv),
 186         SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3,
 187                 WM8991_LL12LOVOL_SHIFT, WM8991_LL12LOVOL_MASK, 1, out_mix_tlv),
 188         SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER5,
 189                 WM8991_LRI3LOVOL_SHIFT, WM8991_LRI3LOVOL_MASK, 1, out_mix_tlv),
 190         SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
 191                 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
 192         SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER5,
 193                 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv),
 194
 195         /* ROMIX */
 196         SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER4,
 197                 WM8991_RRI3ROVOL_SHIFT, WM8991_RRI3ROVOL_MASK, 1, out_mix_tlv),
 198         SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
 199                 WM8991_RL12ROVOL_SHIFT, WM8991_RL12ROVOL_MASK, 1, out_mix_tlv),
 200         SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4,
 201                 WM8991_RR12ROVOL_SHIFT, WM8991_RR12ROVOL_MASK, 1, out_mix_tlv),
 202         SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER6,
 203                 WM8991_RLI3ROVOL_SHIFT, WM8991_RLI3ROVOL_MASK, 1, out_mix_tlv),
 204         SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
 205                 WM8991_RLBROVOL_SHIFT, WM8991_RLBROVOL_MASK, 1, out_mix_tlv),
 206         SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER6,
 207                 WM8991_RRBROVOL_SHIFT, WM8991_RRBROVOL_MASK, 1, out_mix_tlv),
 208
 209         /* LOUT */
 210         SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8991_LEFT_OUTPUT_VOLUME,
 211                 WM8991_LOUTVOL_SHIFT, WM8991_LOUTVOL_MASK, 0, out_pga_tlv),
 212         SOC_SINGLE("LOUT ZC", WM8991_LEFT_OUTPUT_VOLUME, WM8991_LOZC_BIT, 1, 0),
 213
 214         /* ROUT */
 215         SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8991_RIGHT_OUTPUT_VOLUME,
 216                 WM8991_ROUTVOL_SHIFT, WM8991_ROUTVOL_MASK, 0, out_pga_tlv),
 217         SOC_SINGLE("ROUT ZC", WM8991_RIGHT_OUTPUT_VOLUME, WM8991_ROZC_BIT, 1, 0),
 218
 219         /* LOPGA */
 220         SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8991_LEFT_OPGA_VOLUME,
 221                 WM8991_LOPGAVOL_SHIFT, WM8991_LOPGAVOL_MASK, 0, out_pga_tlv),
 222         SOC_SINGLE("LOPGA ZC Switch", WM8991_LEFT_OPGA_VOLUME,
 223                 WM8991_LOPGAZC_BIT, 1, 0),
 224
 225         /* ROPGA */
 226         SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8991_RIGHT_OPGA_VOLUME,
 227                 WM8991_ROPGAVOL_SHIFT, WM8991_ROPGAVOL_MASK, 0, out_pga_tlv),
 228         SOC_SINGLE("ROPGA ZC Switch", WM8991_RIGHT_OPGA_VOLUME,
 229                 WM8991_ROPGAZC_BIT, 1, 0),
 230
 231         SOC_SINGLE("LON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
 232                 WM8991_LONMUTE_BIT, 1, 0),
 233         SOC_SINGLE("LOP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
 234                 WM8991_LOPMUTE_BIT, 1, 0),
 235         SOC_SINGLE("LOP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
 236                 WM8991_LOATTN_BIT, 1, 0),
 237         SOC_SINGLE("RON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
 238                 WM8991_RONMUTE_BIT, 1, 0),
 239         SOC_SINGLE("ROP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME,
 240                 WM8991_ROPMUTE_BIT, 1, 0),
 241         SOC_SINGLE("ROP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME,
 242                 WM8991_ROATTN_BIT, 1, 0),
 243
 244         SOC_SINGLE("OUT3 Mute Switch", WM8991_OUT3_4_VOLUME,
 245                 WM8991_OUT3MUTE_BIT, 1, 0),
 246         SOC_SINGLE("OUT3 Attenuation Switch", WM8991_OUT3_4_VOLUME,
 247                 WM8991_OUT3ATTN_BIT, 1, 0),
 248
 249         SOC_SINGLE("OUT4 Mute Switch", WM8991_OUT3_4_VOLUME,
 250                 WM8991_OUT4MUTE_BIT, 1, 0),
 251         SOC_SINGLE("OUT4 Attenuation Switch", WM8991_OUT3_4_VOLUME,
 252                 WM8991_OUT4ATTN_BIT, 1, 0),
 253
 254         SOC_SINGLE("Speaker Mode Switch", WM8991_CLASSD1,
 255                 WM8991_CDMODE_BIT, 1, 0),
 256
 257         SOC_SINGLE("Speaker Output Attenuation Volume", WM8991_SPEAKER_VOLUME,
 258                 WM8991_SPKVOL_SHIFT, WM8991_SPKVOL_MASK, 0),
 259         SOC_SINGLE("Speaker DC Boost Volume", WM8991_CLASSD3,
 260                 WM8991_DCGAIN_SHIFT, WM8991_DCGAIN_MASK, 0),
 261         SOC_SINGLE("Speaker AC Boost Volume", WM8991_CLASSD3,
 262                 WM8991_ACGAIN_SHIFT, WM8991_ACGAIN_MASK, 0),
 263
 264         SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume",
 265                 WM8991_LEFT_DAC_DIGITAL_VOLUME,
 266                 WM8991_DACL_VOL_SHIFT,
 267                 WM8991_DACL_VOL_MASK,
 268                 0,
 269                 out_dac_tlv),
 270
 271         SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume",
 272                 WM8991_RIGHT_DAC_DIGITAL_VOLUME,
 273                 WM8991_DACR_VOL_SHIFT,
 274                 WM8991_DACR_VOL_MASK,
 275                 0,
 276                 out_dac_tlv),
 277
 278         SOC_ENUM("Left Digital Sidetone", wm8991_left_digital_sidetone_enum),
 279         SOC_ENUM("Right Digital Sidetone", wm8991_right_digital_sidetone_enum),
 280
 281         SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
 282                 WM8991_ADCL_DAC_SVOL_SHIFT, WM8991_ADCL_DAC_SVOL_MASK, 0,
 283                 out_sidetone_tlv),
 284         SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE,
 285                 WM8991_ADCR_DAC_SVOL_SHIFT, WM8991_ADCR_DAC_SVOL_MASK, 0,
 286                 out_sidetone_tlv),
 287
 288         SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8991_ADC_CTRL,
 289                 WM8991_ADC_HPF_ENA_BIT, 1, 0),
 290
 291         SOC_ENUM("ADC HPF Mode", wm8991_right_adcmode_enum),
 292
 293         SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume",
 294                 WM8991_LEFT_ADC_DIGITAL_VOLUME,
 295                 WM8991_ADCL_VOL_SHIFT,
 296                 WM8991_ADCL_VOL_MASK,
 297                 0,
 298                 in_adc_tlv),
 299
 300         SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume",
 301                 WM8991_RIGHT_ADC_DIGITAL_VOLUME,
 302                 WM8991_ADCR_VOL_SHIFT,
 303                 WM8991_ADCR_VOL_MASK,
 304                 0,
 305                 in_adc_tlv),
 306
 307         SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume",
 308                 WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
 309                 WM8991_LIN12VOL_SHIFT,
 310                 WM8991_LIN12VOL_MASK,
 311                 0,
 312                 in_pga_tlv),
 313
 314         SOC_SINGLE("LIN12 ZC Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
 315                 WM8991_LI12ZC_BIT, 1, 0),
 316
 317         SOC_SINGLE("LIN12 Mute Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME,
 318                 WM8991_LI12MUTE_BIT, 1, 0),
 319
 320         SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume",
 321                 WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
 322                 WM8991_LIN34VOL_SHIFT,
 323                 WM8991_LIN34VOL_MASK,
 324                 0,
 325                 in_pga_tlv),
 326
 327         SOC_SINGLE("LIN34 ZC Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
 328                 WM8991_LI34ZC_BIT, 1, 0),
 329
 330         SOC_SINGLE("LIN34 Mute Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME,
 331                 WM8991_LI34MUTE_BIT, 1, 0),
 332
 333         SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume",
 334                 WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
 335                 WM8991_RIN12VOL_SHIFT,
 336                 WM8991_RIN12VOL_MASK,
 337                 0,
 338                 in_pga_tlv),
 339
 340         SOC_SINGLE("RIN12 ZC Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
 341                 WM8991_RI12ZC_BIT, 1, 0),
 342
 343         SOC_SINGLE("RIN12 Mute Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME,
 344                 WM8991_RI12MUTE_BIT, 1, 0),
 345
 346         SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume",
 347                 WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
 348                 WM8991_RIN34VOL_SHIFT,
 349                 WM8991_RIN34VOL_MASK,
 350                 0,
 351                 in_pga_tlv),
 352
 353         SOC_SINGLE("RIN34 ZC Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
 354                 WM8991_RI34ZC_BIT, 1, 0),
 355
 356         SOC_SINGLE("RIN34 Mute Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME,
 357                 WM8991_RI34MUTE_BIT, 1, 0),
 358 };
 359
 360 /*
 361  * _DAPM_ Controls
 362  */
 363 static int outmixer_event(struct snd_soc_dapm_widget *w,
 364                           struct snd_kcontrol *kcontrol, int event)
 365 {
 366         struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 367         u32 reg_shift = kcontrol->private_value & 0xfff;
 368         int ret = 0;
 369         u16 reg;
 370
 371         switch (reg_shift) {
 372         case WM8991_SPEAKER_MIXER | (WM8991_LDSPK_BIT << 8):
 373                 reg = snd_soc_read(codec, WM8991_OUTPUT_MIXER1);
 374                 if (reg & WM8991_LDLO) {
 375                         printk(KERN_WARNING
 376                                "Cannot set as Output Mixer 1 LDLO Set\n");
 377                         ret = -1;
 378                 }
 379                 break;
 380
 381         case WM8991_SPEAKER_MIXER | (WM8991_RDSPK_BIT << 8):
 382                 reg = snd_soc_read(codec, WM8991_OUTPUT_MIXER2);
 383                 if (reg & WM8991_RDRO) {
 384                         printk(KERN_WARNING
 385                                "Cannot set as Output Mixer 2 RDRO Set\n");
 386                         ret = -1;
 387                 }
 388                 break;
 389
 390         case WM8991_OUTPUT_MIXER1 | (WM8991_LDLO_BIT << 8):
 391                 reg = snd_soc_read(codec, WM8991_SPEAKER_MIXER);
 392                 if (reg & WM8991_LDSPK) {
 393                         printk(KERN_WARNING
 394                                "Cannot set as Speaker Mixer LDSPK Set\n");
 395                         ret = -1;
 396                 }
 397                 break;
 398
 399         case WM8991_OUTPUT_MIXER2 | (WM8991_RDRO_BIT << 8):
 400                 reg = snd_soc_read(codec, WM8991_SPEAKER_MIXER);
 401                 if (reg & WM8991_RDSPK) {
 402                         printk(KERN_WARNING
 403                                "Cannot set as Speaker Mixer RDSPK Set\n");
 404                         ret = -1;
 405                 }
 406                 break;
 407         }
 408
 409         return ret;
 410 }
 411
 412 /* INMIX dB values */
 413 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(in_mix_tlv, -1200, 300, 1);
 414
 415 /* Left In PGA Connections */
 416 static const struct snd_kcontrol_new wm8991_dapm_lin12_pga_controls[] = {
 417         SOC_DAPM_SINGLE("LIN1 Switch", WM8991_INPUT_MIXER2, WM8991_LMN1_BIT, 1, 0),
 418         SOC_DAPM_SINGLE("LIN2 Switch", WM8991_INPUT_MIXER2, WM8991_LMP2_BIT, 1, 0),
 419 };
 420
 421 static const struct snd_kcontrol_new wm8991_dapm_lin34_pga_controls[] = {
 422         SOC_DAPM_SINGLE("LIN3 Switch", WM8991_INPUT_MIXER2, WM8991_LMN3_BIT, 1, 0),
 423         SOC_DAPM_SINGLE("LIN4 Switch", WM8991_INPUT_MIXER2, WM8991_LMP4_BIT, 1, 0),
 424 };
 425
 426 /* Right In PGA Connections */
 427 static const struct snd_kcontrol_new wm8991_dapm_rin12_pga_controls[] = {
 428         SOC_DAPM_SINGLE("RIN1 Switch", WM8991_INPUT_MIXER2, WM8991_RMN1_BIT, 1, 0),
 429         SOC_DAPM_SINGLE("RIN2 Switch", WM8991_INPUT_MIXER2, WM8991_RMP2_BIT, 1, 0),
 430 };
 431
 432 static const struct snd_kcontrol_new wm8991_dapm_rin34_pga_controls[] = {
 433         SOC_DAPM_SINGLE("RIN3 Switch", WM8991_INPUT_MIXER2, WM8991_RMN3_BIT, 1, 0),
 434         SOC_DAPM_SINGLE("RIN4 Switch", WM8991_INPUT_MIXER2, WM8991_RMP4_BIT, 1, 0),
 435 };
 436
 437 /* INMIXL */
 438 static const struct snd_kcontrol_new wm8991_dapm_inmixl_controls[] = {
 439         SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8991_INPUT_MIXER3,
 440                 WM8991_LDBVOL_SHIFT, WM8991_LDBVOL_MASK, 0, in_mix_tlv),
 441         SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8991_INPUT_MIXER5, WM8991_LI2BVOL_SHIFT,
 442                 7, 0, in_mix_tlv),
 443         SOC_DAPM_SINGLE("LINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
 444                 1, 0),
 445         SOC_DAPM_SINGLE("LINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
 446                 1, 0),
 447 };
 448
 449 /* INMIXR */
 450 static const struct snd_kcontrol_new wm8991_dapm_inmixr_controls[] = {
 451         SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8991_INPUT_MIXER4,
 452                 WM8991_RDBVOL_SHIFT, WM8991_RDBVOL_MASK, 0, in_mix_tlv),
 453         SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8991_INPUT_MIXER6, WM8991_RI2BVOL_SHIFT,
 454                 7, 0, in_mix_tlv),
 455         SOC_DAPM_SINGLE("RINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT,
 456                 1, 0),
 457         SOC_DAPM_SINGLE("RINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT,
 458                 1, 0),
 459 };
 460
 461 /* AINLMUX */
 462 static const char *wm8991_ainlmux[] =
 463 {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"};
 464
 465 static SOC_ENUM_SINGLE_DECL(wm8991_ainlmux_enum,
 466                             WM8991_INPUT_MIXER1, WM8991_AINLMODE_SHIFT,
 467                             wm8991_ainlmux);
 468
 469 static const struct snd_kcontrol_new wm8991_dapm_ainlmux_controls =
 470         SOC_DAPM_ENUM("Route", wm8991_ainlmux_enum);
 471
 472 /* DIFFINL */
 473
 474 /* AINRMUX */
 475 static const char *wm8991_ainrmux[] =
 476 {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"};
 477
 478 static SOC_ENUM_SINGLE_DECL(wm8991_ainrmux_enum,
 479                             WM8991_INPUT_MIXER1, WM8991_AINRMODE_SHIFT,
 480                             wm8991_ainrmux);
 481
 482 static const struct snd_kcontrol_new wm8991_dapm_ainrmux_controls =
 483         SOC_DAPM_ENUM("Route", wm8991_ainrmux_enum);
 484
 485 /* RXVOICE */
 486 static const struct snd_kcontrol_new wm8991_dapm_rxvoice_controls[] = {
 487         SOC_DAPM_SINGLE_TLV("LIN4RXN", WM8991_INPUT_MIXER5, WM8991_LR4BVOL_SHIFT,
 488                 WM8991_LR4BVOL_MASK, 0, in_mix_tlv),
 489         SOC_DAPM_SINGLE_TLV("RIN4RXP", WM8991_INPUT_MIXER6, WM8991_RL4BVOL_SHIFT,
 490                 WM8991_RL4BVOL_MASK, 0, in_mix_tlv),
 491 };
 492
 493 /* LOMIX */
 494 static const struct snd_kcontrol_new wm8991_dapm_lomix_controls[] = {
 495         SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
 496                 WM8991_LRBLO_BIT, 1, 0),
 497         SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER1,
 498                 WM8991_LLBLO_BIT, 1, 0),
 499         SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
 500                 WM8991_LRI3LO_BIT, 1, 0),
 501         SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER1,
 502                 WM8991_LLI3LO_BIT, 1, 0),
 503         SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
 504                 WM8991_LR12LO_BIT, 1, 0),
 505         SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1,
 506                 WM8991_LL12LO_BIT, 1, 0),
 507         SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8991_OUTPUT_MIXER1,
 508                 WM8991_LDLO_BIT, 1, 0),
 509 };
 510
 511 /* ROMIX */
 512 static const struct snd_kcontrol_new wm8991_dapm_romix_controls[] = {
 513         SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
 514                 WM8991_RLBRO_BIT, 1, 0),
 515         SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER2,
 516                 WM8991_RRBRO_BIT, 1, 0),
 517         SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
 518                 WM8991_RLI3RO_BIT, 1, 0),
 519         SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER2,
 520                 WM8991_RRI3RO_BIT, 1, 0),
 521         SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
 522                 WM8991_RL12RO_BIT, 1, 0),
 523         SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2,
 524                 WM8991_RR12RO_BIT, 1, 0),
 525         SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8991_OUTPUT_MIXER2,
 526                 WM8991_RDRO_BIT, 1, 0),
 527 };
 528
 529 /* LONMIX */
 530 static const struct snd_kcontrol_new wm8991_dapm_lonmix_controls[] = {
 531         SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
 532                 WM8991_LLOPGALON_BIT, 1, 0),
 533         SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER1,
 534                 WM8991_LROPGALON_BIT, 1, 0),
 535         SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8991_LINE_MIXER1,
 536                 WM8991_LOPLON_BIT, 1, 0),
 537 };
 538
 539 /* LOPMIX */
 540 static const struct snd_kcontrol_new wm8991_dapm_lopmix_controls[] = {
 541         SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER1,
 542                 WM8991_LR12LOP_BIT, 1, 0),
 543         SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER1,
 544                 WM8991_LL12LOP_BIT, 1, 0),
 545         SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1,
 546                 WM8991_LLOPGALOP_BIT, 1, 0),
 547 };
 548
 549 /* RONMIX */
 550 static const struct snd_kcontrol_new wm8991_dapm_ronmix_controls[] = {
 551         SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
 552                 WM8991_RROPGARON_BIT, 1, 0),
 553         SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER2,
 554                 WM8991_RLOPGARON_BIT, 1, 0),
 555         SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8991_LINE_MIXER2,
 556                 WM8991_ROPRON_BIT, 1, 0),
 557 };
 558
 559 /* ROPMIX */
 560 static const struct snd_kcontrol_new wm8991_dapm_ropmix_controls[] = {
 561         SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER2,
 562                 WM8991_RL12ROP_BIT, 1, 0),
 563         SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER2,
 564                 WM8991_RR12ROP_BIT, 1, 0),
 565         SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2,
 566                 WM8991_RROPGAROP_BIT, 1, 0),
 567 };
 568
 569 /* OUT3MIX */
 570 static const struct snd_kcontrol_new wm8991_dapm_out3mix_controls[] = {
 571         SOC_DAPM_SINGLE("OUT3MIX LIN4RXN Bypass Switch", WM8991_OUT3_4_MIXER,
 572                 WM8991_LI4O3_BIT, 1, 0),
 573         SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8991_OUT3_4_MIXER,
 574                 WM8991_LPGAO3_BIT, 1, 0),
 575 };
 576
 577 /* OUT4MIX */
 578 static const struct snd_kcontrol_new wm8991_dapm_out4mix_controls[] = {
 579         SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8991_OUT3_4_MIXER,
 580                 WM8991_RPGAO4_BIT, 1, 0),
 581         SOC_DAPM_SINGLE("OUT4MIX RIN4RXP Bypass Switch", WM8991_OUT3_4_MIXER,
 582                 WM8991_RI4O4_BIT, 1, 0),
 583 };
 584
 585 /* SPKMIX */
 586 static const struct snd_kcontrol_new wm8991_dapm_spkmix_controls[] = {
 587         SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
 588                 WM8991_LI2SPK_BIT, 1, 0),
 589         SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8991_SPEAKER_MIXER,
 590                 WM8991_LB2SPK_BIT, 1, 0),
 591         SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8991_SPEAKER_MIXER,
 592                 WM8991_LOPGASPK_BIT, 1, 0),
 593         SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8991_SPEAKER_MIXER,
 594                 WM8991_LDSPK_BIT, 1, 0),
 595         SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8991_SPEAKER_MIXER,
 596                 WM8991_RDSPK_BIT, 1, 0),
 597         SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8991_SPEAKER_MIXER,
 598                 WM8991_ROPGASPK_BIT, 1, 0),
 599         SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8991_SPEAKER_MIXER,
 600                 WM8991_RL12ROP_BIT, 1, 0),
 601         SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8991_SPEAKER_MIXER,
 602                 WM8991_RI2SPK_BIT, 1, 0),
 603 };
 604
 605 static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = {
 606         /* Input Side */
 607         /* Input Lines */
 608         SND_SOC_DAPM_INPUT("LIN1"),
 609         SND_SOC_DAPM_INPUT("LIN2"),
 610         SND_SOC_DAPM_INPUT("LIN3"),
 611         SND_SOC_DAPM_INPUT("LIN4RXN"),
 612         SND_SOC_DAPM_INPUT("RIN3"),
 613         SND_SOC_DAPM_INPUT("RIN4RXP"),
 614         SND_SOC_DAPM_INPUT("RIN1"),
 615         SND_SOC_DAPM_INPUT("RIN2"),
 616         SND_SOC_DAPM_INPUT("Internal ADC Source"),
 617
 618         SND_SOC_DAPM_SUPPLY("INL", WM8991_POWER_MANAGEMENT_2,
 619                             WM8991_AINL_ENA_BIT, 0, NULL, 0),
 620         SND_SOC_DAPM_SUPPLY("INR", WM8991_POWER_MANAGEMENT_2,
 621                             WM8991_AINR_ENA_BIT, 0, NULL, 0),
 622
 623         /* DACs */
 624         SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8991_POWER_MANAGEMENT_2,
 625                 WM8991_ADCL_ENA_BIT, 0),
 626         SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8991_POWER_MANAGEMENT_2,
 627                 WM8991_ADCR_ENA_BIT, 0),
 628
 629         /* Input PGAs */
 630         SND_SOC_DAPM_MIXER("LIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN12_ENA_BIT,
 631                 0, &wm8991_dapm_lin12_pga_controls[0],
 632                 ARRAY_SIZE(wm8991_dapm_lin12_pga_controls)),
 633         SND_SOC_DAPM_MIXER("LIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN34_ENA_BIT,
 634                 0, &wm8991_dapm_lin34_pga_controls[0],
 635                 ARRAY_SIZE(wm8991_dapm_lin34_pga_controls)),
 636         SND_SOC_DAPM_MIXER("RIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN12_ENA_BIT,
 637                 0, &wm8991_dapm_rin12_pga_controls[0],
 638                 ARRAY_SIZE(wm8991_dapm_rin12_pga_controls)),
 639         SND_SOC_DAPM_MIXER("RIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN34_ENA_BIT,
 640                 0, &wm8991_dapm_rin34_pga_controls[0],
 641                 ARRAY_SIZE(wm8991_dapm_rin34_pga_controls)),
 642
 643         /* INMIXL */
 644         SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0,
 645                 &wm8991_dapm_inmixl_controls[0],
 646                 ARRAY_SIZE(wm8991_dapm_inmixl_controls)),
 647
 648         /* AINLMUX */
 649         SND_SOC_DAPM_MUX("AINLMUX", SND_SOC_NOPM, 0, 0,
 650                 &wm8991_dapm_ainlmux_controls),
 651
 652         /* INMIXR */
 653         SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0,
 654                 &wm8991_dapm_inmixr_controls[0],
 655                 ARRAY_SIZE(wm8991_dapm_inmixr_controls)),
 656
 657         /* AINRMUX */
 658         SND_SOC_DAPM_MUX("AINRMUX", SND_SOC_NOPM, 0, 0,
 659                 &wm8991_dapm_ainrmux_controls),
 660
 661         /* Output Side */
 662         /* DACs */
 663         SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8991_POWER_MANAGEMENT_3,
 664                 WM8991_DACL_ENA_BIT, 0),
 665         SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8991_POWER_MANAGEMENT_3,
 666                 WM8991_DACR_ENA_BIT, 0),
 667
 668         /* LOMIX */
 669         SND_SOC_DAPM_MIXER_E("LOMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOMIX_ENA_BIT,
 670                 0, &wm8991_dapm_lomix_controls[0],
 671                 ARRAY_SIZE(wm8991_dapm_lomix_controls),
 672                 outmixer_event, SND_SOC_DAPM_PRE_REG),
 673
 674         /* LONMIX */
 675         SND_SOC_DAPM_MIXER("LONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LON_ENA_BIT, 0,
 676                 &wm8991_dapm_lonmix_controls[0],
 677                 ARRAY_SIZE(wm8991_dapm_lonmix_controls)),
 678
 679         /* LOPMIX */
 680         SND_SOC_DAPM_MIXER("LOPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOP_ENA_BIT, 0,
 681                 &wm8991_dapm_lopmix_controls[0],
 682                 ARRAY_SIZE(wm8991_dapm_lopmix_controls)),
 683
 684         /* OUT3MIX */
 685         SND_SOC_DAPM_MIXER("OUT3MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT3_ENA_BIT, 0,
 686                 &wm8991_dapm_out3mix_controls[0],
 687                 ARRAY_SIZE(wm8991_dapm_out3mix_controls)),
 688
 689         /* SPKMIX */
 690         SND_SOC_DAPM_MIXER_E("SPKMIX", WM8991_POWER_MANAGEMENT_1, WM8991_SPK_ENA_BIT, 0,
 691                 &wm8991_dapm_spkmix_controls[0],
 692                 ARRAY_SIZE(wm8991_dapm_spkmix_controls), outmixer_event,
 693                 SND_SOC_DAPM_PRE_REG),
 694
 695         /* OUT4MIX */
 696         SND_SOC_DAPM_MIXER("OUT4MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT4_ENA_BIT, 0,
 697                 &wm8991_dapm_out4mix_controls[0],
 698                 ARRAY_SIZE(wm8991_dapm_out4mix_controls)),
 699
 700         /* ROPMIX */
 701         SND_SOC_DAPM_MIXER("ROPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROP_ENA_BIT, 0,
 702                 &wm8991_dapm_ropmix_controls[0],
 703                 ARRAY_SIZE(wm8991_dapm_ropmix_controls)),
 704
 705         /* RONMIX */
 706         SND_SOC_DAPM_MIXER("RONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_RON_ENA_BIT, 0,
 707                 &wm8991_dapm_ronmix_controls[0],
 708                 ARRAY_SIZE(wm8991_dapm_ronmix_controls)),
 709
 710         /* ROMIX */
 711         SND_SOC_DAPM_MIXER_E("ROMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROMIX_ENA_BIT,
 712                 0, &wm8991_dapm_romix_controls[0],
 713                 ARRAY_SIZE(wm8991_dapm_romix_controls),
 714                 outmixer_event, SND_SOC_DAPM_PRE_REG),
 715
 716         /* LOUT PGA */
 717         SND_SOC_DAPM_PGA("LOUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_LOUT_ENA_BIT, 0,
 718                 NULL, 0),
 719
 720         /* ROUT PGA */
 721         SND_SOC_DAPM_PGA("ROUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_ROUT_ENA_BIT, 0,
 722                 NULL, 0),
 723
 724         /* LOPGA */
 725         SND_SOC_DAPM_PGA("LOPGA", WM8991_POWER_MANAGEMENT_3, WM8991_LOPGA_ENA_BIT, 0,
 726                 NULL, 0),
 727
 728         /* ROPGA */
 729         SND_SOC_DAPM_PGA("ROPGA", WM8991_POWER_MANAGEMENT_3, WM8991_ROPGA_ENA_BIT, 0,
 730                 NULL, 0),
 731
 732         /* MICBIAS */
 733         SND_SOC_DAPM_SUPPLY("MICBIAS", WM8991_POWER_MANAGEMENT_1,
 734                             WM8991_MICBIAS_ENA_BIT, 0, NULL, 0),
 735
 736         SND_SOC_DAPM_OUTPUT("LON"),
 737         SND_SOC_DAPM_OUTPUT("LOP"),
 738         SND_SOC_DAPM_OUTPUT("OUT3"),
 739         SND_SOC_DAPM_OUTPUT("LOUT"),
 740         SND_SOC_DAPM_OUTPUT("SPKN"),
 741         SND_SOC_DAPM_OUTPUT("SPKP"),
 742         SND_SOC_DAPM_OUTPUT("ROUT"),
 743         SND_SOC_DAPM_OUTPUT("OUT4"),
 744         SND_SOC_DAPM_OUTPUT("ROP"),
 745         SND_SOC_DAPM_OUTPUT("RON"),
 746         SND_SOC_DAPM_OUTPUT("OUT"),
 747
 748         SND_SOC_DAPM_OUTPUT("Internal DAC Sink"),
 749 };
 750
 751 static const struct snd_soc_dapm_route wm8991_dapm_routes[] = {
 752         /* Make DACs turn on when playing even if not mixed into any outputs */
 753         {"Internal DAC Sink", NULL, "Left DAC"},
 754         {"Internal DAC Sink", NULL, "Right DAC"},
 755
 756         /* Make ADCs turn on when recording even if not mixed from any inputs */
 757         {"Left ADC", NULL, "Internal ADC Source"},
 758         {"Right ADC", NULL, "Internal ADC Source"},
 759
 760         /* Input Side */
 761         {"INMIXL", NULL, "INL"},
 762         {"AINLMUX", NULL, "INL"},
 763         {"INMIXR", NULL, "INR"},
 764         {"AINRMUX", NULL, "INR"},
 765         /* LIN12 PGA */
 766         {"LIN12 PGA", "LIN1 Switch", "LIN1"},
 767         {"LIN12 PGA", "LIN2 Switch", "LIN2"},
 768         /* LIN34 PGA */
 769         {"LIN34 PGA", "LIN3 Switch", "LIN3"},
 770         {"LIN34 PGA", "LIN4 Switch", "LIN4RXN"},
 771         /* INMIXL */
 772         {"INMIXL", "Record Left Volume", "LOMIX"},
 773         {"INMIXL", "LIN2 Volume", "LIN2"},
 774         {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"},
 775         {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"},
 776         /* AINLMUX */
 777         {"AINLMUX", "INMIXL Mix", "INMIXL"},
 778         {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"},
 779         {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"},
 780         {"AINLMUX", "RXVOICE Mix", "LIN4RXN"},
 781         {"AINLMUX", "RXVOICE Mix", "RIN4RXP"},
 782         /* ADC */
 783         {"Left ADC", NULL, "AINLMUX"},
 784
 785         /* RIN12 PGA */
 786         {"RIN12 PGA", "RIN1 Switch", "RIN1"},
 787         {"RIN12 PGA", "RIN2 Switch", "RIN2"},
 788         /* RIN34 PGA */
 789         {"RIN34 PGA", "RIN3 Switch", "RIN3"},
 790         {"RIN34 PGA", "RIN4 Switch", "RIN4RXP"},
 791         /* INMIXL */
 792         {"INMIXR", "Record Right Volume", "ROMIX"},
 793         {"INMIXR", "RIN2 Volume", "RIN2"},
 794         {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"},
 795         {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"},
 796         /* AINRMUX */
 797         {"AINRMUX", "INMIXR Mix", "INMIXR"},
 798         {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"},
 799         {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"},
 800         {"AINRMUX", "RXVOICE Mix", "LIN4RXN"},
 801         {"AINRMUX", "RXVOICE Mix", "RIN4RXP"},
 802         /* ADC */
 803         {"Right ADC", NULL, "AINRMUX"},
 804
 805         /* LOMIX */
 806         {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"},
 807         {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"},
 808         {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
 809         {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
 810         {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"},
 811         {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"},
 812         {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"},
 813
 814         /* ROMIX */
 815         {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"},
 816         {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"},
 817         {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
 818         {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
 819         {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"},
 820         {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"},
 821         {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"},
 822
 823         /* SPKMIX */
 824         {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"},
 825         {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"},
 826         {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"},
 827         {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"},
 828         {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"},
 829         {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"},
 830         {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"},
 831         {"SPKMIX", "SPKMIX Left DAC Switch", "Right DAC"},
 832
 833         /* LONMIX */
 834         {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"},
 835         {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"},
 836         {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"},
 837
 838         /* LOPMIX */
 839         {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"},
 840         {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"},
 841         {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"},
 842
 843         /* OUT3MIX */
 844         {"OUT3MIX", "OUT3MIX LIN4RXN Bypass Switch", "LIN4RXN"},
 845         {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"},
 846
 847         /* OUT4MIX */
 848         {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"},
 849         {"OUT4MIX", "OUT4MIX RIN4RXP Bypass Switch", "RIN4RXP"},
 850
 851         /* RONMIX */
 852         {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"},
 853         {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"},
 854         {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"},
 855
 856         /* ROPMIX */
 857         {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"},
 858         {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"},
 859         {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"},
 860
 861         /* Out Mixer PGAs */
 862         {"LOPGA", NULL, "LOMIX"},
 863         {"ROPGA", NULL, "ROMIX"},
 864
 865         {"LOUT PGA", NULL, "LOMIX"},
 866         {"ROUT PGA", NULL, "ROMIX"},
 867
 868         /* Output Pins */
 869         {"LON", NULL, "LONMIX"},
 870         {"LOP", NULL, "LOPMIX"},
 871         {"OUT", NULL, "OUT3MIX"},
 872         {"LOUT", NULL, "LOUT PGA"},
 873         {"SPKN", NULL, "SPKMIX"},
 874         {"ROUT", NULL, "ROUT PGA"},
 875         {"OUT4", NULL, "OUT4MIX"},
 876         {"ROP", NULL, "ROPMIX"},
 877         {"RON", NULL, "RONMIX"},
 878 };
 879
 880 /* PLL divisors */
 881 struct _pll_div {
 882         u32 div2;
 883         u32 n;
 884         u32 k;
 885 };
 886
 887 /* The size in bits of the pll divide multiplied by 10
 888  * to allow rounding later */
 889 #define FIXED_PLL_SIZE ((1 << 16) * 10)
 890
 891 static void pll_factors(struct _pll_div *pll_div, unsigned int target,
 892                         unsigned int source)
 893 {
 894         u64 Kpart;
 895         unsigned int K, Ndiv, Nmod;
 896
 897
 898         Ndiv = target / source;
 899         if (Ndiv < 6) {
 900                 source >>= 1;
 901                 pll_div->div2 = 1;
 902                 Ndiv = target / source;
 903         } else
 904                 pll_div->div2 = 0;
 905
 906         if ((Ndiv < 6) || (Ndiv > 12))
 907                 printk(KERN_WARNING
 908                        "WM8991 N value outwith recommended range! N = %d\n", Ndiv);
 909
 910         pll_div->n = Ndiv;
 911         Nmod = target % source;
 912         Kpart = FIXED_PLL_SIZE * (long long)Nmod;
 913
 914         do_div(Kpart, source);
 915
 916         K = Kpart & 0xFFFFFFFF;
 917
 918         /* Check if we need to round */
 919         if ((K % 10) >= 5)
 920                 K += 5;
 921
 922         /* Move down to proper range now rounding is done */
 923         K /= 10;
 924
 925         pll_div->k = K;
 926 }
 927
 928 static int wm8991_set_dai_pll(struct snd_soc_dai *codec_dai,
 929                               int pll_id, int src, unsigned int freq_in, unsigned int freq_out)
 930 {
 931         u16 reg;
 932         struct snd_soc_codec *codec = codec_dai->codec;
 933         struct _pll_div pll_div;
 934
 935         if (freq_in && freq_out) {
 936                 pll_factors(&pll_div, freq_out * 4, freq_in);
 937
 938                 /* Turn on PLL */
 939                 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
 940                 reg |= WM8991_PLL_ENA;
 941                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
 942
 943                 /* sysclk comes from PLL */
 944                 reg = snd_soc_read(codec, WM8991_CLOCKING_2);
 945                 snd_soc_write(codec, WM8991_CLOCKING_2, reg | WM8991_SYSCLK_SRC);
 946
 947                 /* set up N , fractional mode and pre-divisor if necessary */
 948                 snd_soc_write(codec, WM8991_PLL1, pll_div.n | WM8991_SDM |
 949                               (pll_div.div2 ? WM8991_PRESCALE : 0));
 950                 snd_soc_write(codec, WM8991_PLL2, (u8)(pll_div.k>>8));
 951                 snd_soc_write(codec, WM8991_PLL3, (u8)(pll_div.k & 0xFF));
 952         } else {
 953                 /* Turn on PLL */
 954                 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2);
 955                 reg &= ~WM8991_PLL_ENA;
 956                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg);
 957         }
 958         return 0;
 959 }
 960
 961 /*
 962  * Set's ADC and Voice DAC format.
 963  */
 964 static int wm8991_set_dai_fmt(struct snd_soc_dai *codec_dai,
 965                               unsigned int fmt)
 966 {
 967         struct snd_soc_codec *codec = codec_dai->codec;
 968         u16 audio1, audio3;
 969
 970         audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
 971         audio3 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_3);
 972
 973         /* set master/slave audio interface */
 974         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 975         case SND_SOC_DAIFMT_CBS_CFS:
 976                 audio3 &= ~WM8991_AIF_MSTR1;
 977                 break;
 978         case SND_SOC_DAIFMT_CBM_CFM:
 979                 audio3 |= WM8991_AIF_MSTR1;
 980                 break;
 981         default:
 982                 return -EINVAL;
 983         }
 984
 985         audio1 &= ~WM8991_AIF_FMT_MASK;
 986
 987         /* interface format */
 988         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 989         case SND_SOC_DAIFMT_I2S:
 990                 audio1 |= WM8991_AIF_TMF_I2S;
 991                 audio1 &= ~WM8991_AIF_LRCLK_INV;
 992                 break;
 993         case SND_SOC_DAIFMT_RIGHT_J:
 994                 audio1 |= WM8991_AIF_TMF_RIGHTJ;
 995                 audio1 &= ~WM8991_AIF_LRCLK_INV;
 996                 break;
 997         case SND_SOC_DAIFMT_LEFT_J:
 998                 audio1 |= WM8991_AIF_TMF_LEFTJ;
 999                 audio1 &= ~WM8991_AIF_LRCLK_INV;
1000                 break;
1001         case SND_SOC_DAIFMT_DSP_A:
1002                 audio1 |= WM8991_AIF_TMF_DSP;
1003                 audio1 &= ~WM8991_AIF_LRCLK_INV;
1004                 break;
1005         case SND_SOC_DAIFMT_DSP_B:
1006                 audio1 |= WM8991_AIF_TMF_DSP | WM8991_AIF_LRCLK_INV;
1007                 break;
1008         default:
1009                 return -EINVAL;
1010         }
1011
1012         snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1013         snd_soc_write(codec, WM8991_AUDIO_INTERFACE_3, audio3);
1014         return 0;
1015 }
1016
1017 static int wm8991_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1018                                  int div_id, int div)
1019 {
1020         struct snd_soc_codec *codec = codec_dai->codec;
1021         u16 reg;
1022
1023         switch (div_id) {
1024         case WM8991_MCLK_DIV:
1025                 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1026                       ~WM8991_MCLK_DIV_MASK;
1027                 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1028                 break;
1029         case WM8991_DACCLK_DIV:
1030                 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1031                       ~WM8991_DAC_CLKDIV_MASK;
1032                 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1033                 break;
1034         case WM8991_ADCCLK_DIV:
1035                 reg = snd_soc_read(codec, WM8991_CLOCKING_2) &
1036                       ~WM8991_ADC_CLKDIV_MASK;
1037                 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div);
1038                 break;
1039         case WM8991_BCLK_DIV:
1040                 reg = snd_soc_read(codec, WM8991_CLOCKING_1) &
1041                       ~WM8991_BCLK_DIV_MASK;
1042                 snd_soc_write(codec, WM8991_CLOCKING_1, reg | div);
1043                 break;
1044         default:
1045                 return -EINVAL;
1046         }
1047
1048         return 0;
1049 }
1050
1051 /*
1052  * Set PCM DAI bit size and sample rate.
1053  */
1054 static int wm8991_hw_params(struct snd_pcm_substream *substream,
1055                             struct snd_pcm_hw_params *params,
1056                             struct snd_soc_dai *dai)
1057 {
1058         struct snd_soc_codec *codec = dai->codec;
1059         u16 audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1);
1060
1061         audio1 &= ~WM8991_AIF_WL_MASK;
1062         /* bit size */
1063         switch (params_width(params)) {
1064         case 16:
1065                 break;
1066         case 20:
1067                 audio1 |= WM8991_AIF_WL_20BITS;
1068                 break;
1069         case 24:
1070                 audio1 |= WM8991_AIF_WL_24BITS;
1071                 break;
1072         case 32:
1073                 audio1 |= WM8991_AIF_WL_32BITS;
1074                 break;
1075         }
1076
1077         snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1);
1078         return 0;
1079 }
1080
1081 static int wm8991_mute(struct snd_soc_dai *dai, int mute)
1082 {
1083         struct snd_soc_codec *codec = dai->codec;
1084         u16 val;
1085
1086         val  = snd_soc_read(codec, WM8991_DAC_CTRL) & ~WM8991_DAC_MUTE;
1087         if (mute)
1088                 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1089         else
1090                 snd_soc_write(codec, WM8991_DAC_CTRL, val);
1091         return 0;
1092 }
1093
1094 static int wm8991_set_bias_level(struct snd_soc_codec *codec,
1095                                  enum snd_soc_bias_level level)
1096 {
1097         struct wm8991_priv *wm8991 = snd_soc_codec_get_drvdata(codec);
1098         u16 val;
1099
1100         switch (level) {
1101         case SND_SOC_BIAS_ON:
1102                 break;
1103
1104         case SND_SOC_BIAS_PREPARE:
1105                 /* VMID=2*50k */
1106                 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1107                       ~WM8991_VMID_MODE_MASK;
1108                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x2);
1109                 break;
1110
1111         case SND_SOC_BIAS_STANDBY:
1112                 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
1113                         regcache_sync(wm8991->regmap);
1114                         /* Enable all output discharge bits */
1115                         snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1116                                       WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1117                                       WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1118                                       WM8991_DIS_ROUT);
1119
1120                         /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
1121                         snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1122                                       WM8991_BUFDCOPEN | WM8991_POBCTRL |
1123                                       WM8991_VMIDTOG);
1124
1125                         /* Delay to allow output caps to discharge */
1126                         msleep(300);
1127
1128                         /* Disable VMIDTOG */
1129                         snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1130                                       WM8991_BUFDCOPEN | WM8991_POBCTRL);
1131
1132                         /* disable all output discharge bits */
1133                         snd_soc_write(codec, WM8991_ANTIPOP1, 0);
1134
1135                         /* Enable outputs */
1136                         snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1b00);
1137
1138                         msleep(50);
1139
1140                         /* Enable VMID at 2x50k */
1141                         snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f02);
1142
1143                         msleep(100);
1144
1145                         /* Enable VREF */
1146                         snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1147
1148                         msleep(600);
1149
1150                         /* Enable BUFIOEN */
1151                         snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1152                                       WM8991_BUFDCOPEN | WM8991_POBCTRL |
1153                                       WM8991_BUFIOEN);
1154
1155                         /* Disable outputs */
1156                         snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x3);
1157
1158                         /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1159                         snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_BUFIOEN);
1160                 }
1161
1162                 /* VMID=2*250k */
1163                 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) &
1164                       ~WM8991_VMID_MODE_MASK;
1165                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x4);
1166                 break;
1167
1168         case SND_SOC_BIAS_OFF:
1169                 /* Enable POBCTRL and SOFT_ST */
1170                 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1171                               WM8991_POBCTRL | WM8991_BUFIOEN);
1172
1173                 /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */
1174                 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST |
1175                               WM8991_BUFDCOPEN | WM8991_POBCTRL |
1176                               WM8991_BUFIOEN);
1177
1178                 /* mute DAC */
1179                 val = snd_soc_read(codec, WM8991_DAC_CTRL);
1180                 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE);
1181
1182                 /* Enable any disabled outputs */
1183                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03);
1184
1185                 /* Disable VMID */
1186                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f01);
1187
1188                 msleep(300);
1189
1190                 /* Enable all output discharge bits */
1191                 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1192                               WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
1193                               WM8991_DIS_OUT4 | WM8991_DIS_LOUT |
1194                               WM8991_DIS_ROUT);
1195
1196                 /* Disable VREF */
1197                 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x0);
1198
1199                 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1200                 snd_soc_write(codec, WM8991_ANTIPOP2, 0x0);
1201                 regcache_mark_dirty(wm8991->regmap);
1202                 break;
1203         }
1204
1205         return 0;
1206 }
1207
1208 #define WM8991_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1209                         SNDRV_PCM_FMTBIT_S24_LE)
1210
1211 static const struct snd_soc_dai_ops wm8991_ops = {
1212         .hw_params = wm8991_hw_params,
1213         .digital_mute = wm8991_mute,
1214         .set_fmt = wm8991_set_dai_fmt,
1215         .set_clkdiv = wm8991_set_dai_clkdiv,
1216         .set_pll = wm8991_set_dai_pll
1217 };
1218
1219 /*
1220  * The WM8991 supports 2 different and mutually exclusive DAI
1221  * configurations.
1222  *
1223  * 1. ADC/DAC on Primary Interface
1224  * 2. ADC on Primary Interface/DAC on secondary
1225  */
1226 static struct snd_soc_dai_driver wm8991_dai = {
1227         /* ADC/DAC on primary */
1228         .name = "wm8991",
1229         .id = 1,
1230         .playback = {
1231                 .stream_name = "Playback",
1232                 .channels_min = 1,
1233                 .channels_max = 2,
1234                 .rates = SNDRV_PCM_RATE_8000_96000,
1235                 .formats = WM8991_FORMATS
1236         },
1237         .capture = {
1238                 .stream_name = "Capture",
1239                 .channels_min = 1,
1240                 .channels_max = 2,
1241                 .rates = SNDRV_PCM_RATE_8000_96000,
1242                 .formats = WM8991_FORMATS
1243         },
1244         .ops = &wm8991_ops
1245 };
1246
1247 static struct snd_soc_codec_driver soc_codec_dev_wm8991 = {
1248         .set_bias_level = wm8991_set_bias_level,
1249         .suspend_bias_off = true,
1250
1251         .controls = wm8991_snd_controls,
1252         .num_controls = ARRAY_SIZE(wm8991_snd_controls),
1253         .dapm_widgets = wm8991_dapm_widgets,
1254         .num_dapm_widgets = ARRAY_SIZE(wm8991_dapm_widgets),
1255         .dapm_routes = wm8991_dapm_routes,
1256         .num_dapm_routes = ARRAY_SIZE(wm8991_dapm_routes),
1257 };
1258
1259 static const struct regmap_config wm8991_regmap = {
1260         .reg_bits = 8,
1261         .val_bits = 16,
1262
1263         .max_register = WM8991_PLL3,
1264         .volatile_reg = wm8991_volatile,
1265         .reg_defaults = wm8991_reg_defaults,
1266         .num_reg_defaults = ARRAY_SIZE(wm8991_reg_defaults),
1267         .cache_type = REGCACHE_RBTREE,
1268 };
1269
1270 static int wm8991_i2c_probe(struct i2c_client *i2c,
1271                             const struct i2c_device_id *id)
1272 {
1273         struct wm8991_priv *wm8991;
1274         unsigned int val;
1275         int ret;
1276
1277         wm8991 = devm_kzalloc(&i2c->dev, sizeof(*wm8991), GFP_KERNEL);
1278         if (!wm8991)
1279                 return -ENOMEM;
1280
1281         wm8991->regmap = devm_regmap_init_i2c(i2c, &wm8991_regmap);
1282         if (IS_ERR(wm8991->regmap))
1283                 return PTR_ERR(wm8991->regmap);
1284
1285         i2c_set_clientdata(i2c, wm8991);
1286
1287         ret = regmap_read(wm8991->regmap, WM8991_RESET, &val);
1288         if (ret != 0) {
1289                 dev_err(&i2c->dev, "Failed to read device ID: %d\n", ret);
1290                 return ret;
1291         }
1292         if (val != 0x8991) {
1293                 dev_err(&i2c->dev, "Device with ID %x is not a WM8991\n", val);
1294                 return -EINVAL;
1295         }
1296
1297         ret = regmap_write(wm8991->regmap, WM8991_RESET, 0);
1298         if (ret < 0) {
1299                 dev_err(&i2c->dev, "Failed to issue reset: %d\n", ret);
1300                 return ret;
1301         }
1302
1303         regmap_update_bits(wm8991->regmap, WM8991_AUDIO_INTERFACE_4,
1304                            WM8991_ALRCGPIO1, WM8991_ALRCGPIO1);
1305
1306         regmap_update_bits(wm8991->regmap, WM8991_GPIO1_GPIO2,
1307                            WM8991_GPIO1_SEL_MASK, 1);
1308
1309         regmap_update_bits(wm8991->regmap, WM8991_POWER_MANAGEMENT_1,
1310                            WM8991_VREF_ENA | WM8991_VMID_MODE_MASK,
1311                            WM8991_VREF_ENA | WM8991_VMID_MODE_MASK);
1312
1313         regmap_update_bits(wm8991->regmap, WM8991_POWER_MANAGEMENT_2,
1314                            WM8991_OPCLK_ENA, WM8991_OPCLK_ENA);
1315
1316         regmap_write(wm8991->regmap, WM8991_DAC_CTRL, 0);
1317         regmap_write(wm8991->regmap, WM8991_LEFT_OUTPUT_VOLUME,
1318                      0x50 | (1<<8));
1319         regmap_write(wm8991->regmap, WM8991_RIGHT_OUTPUT_VOLUME,
1320                      0x50 | (1<<8));
1321
1322         ret = snd_soc_register_codec(&i2c->dev,
1323                                      &soc_codec_dev_wm8991, &wm8991_dai, 1);
1324
1325         return ret;
1326 }
1327
1328 static int wm8991_i2c_remove(struct i2c_client *client)
1329 {
1330         snd_soc_unregister_codec(&client->dev);
1331
1332         return 0;
1333 }
1334
1335 static const struct i2c_device_id wm8991_i2c_id[] = {
1336         { "wm8991", 0 },
1337         { }
1338 };
1339 MODULE_DEVICE_TABLE(i2c, wm8991_i2c_id);
1340
1341 static struct i2c_driver wm8991_i2c_driver = {
1342         .driver = {
1343                 .name = "wm8991",
1344         },
1345         .probe = wm8991_i2c_probe,
1346         .remove = wm8991_i2c_remove,
1347         .id_table = wm8991_i2c_id,
1348 };
1349
1350 module_i2c_driver(wm8991_i2c_driver);
1351
1352 MODULE_DESCRIPTION("ASoC WM8991 driver");
1353 MODULE_AUTHOR("Graeme Gregory");
1354 MODULE_LICENSE("GPL");