2 * wm_adsp.c -- Wolfson ADSP support
4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/firmware.h>
18 #include <linux/list.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
24 #include <linux/vmalloc.h>
25 #include <linux/workqueue.h>
26 #include <linux/debugfs.h>
27 #include <sound/core.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/soc.h>
31 #include <sound/jack.h>
32 #include <sound/initval.h>
33 #include <sound/tlv.h>
37 #define adsp_crit(_dsp, fmt, ...) \
38 dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
39 #define adsp_err(_dsp, fmt, ...) \
40 dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
41 #define adsp_warn(_dsp, fmt, ...) \
42 dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
43 #define adsp_info(_dsp, fmt, ...) \
44 dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
45 #define adsp_dbg(_dsp, fmt, ...) \
46 dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
48 #define ADSP1_CONTROL_1 0x00
49 #define ADSP1_CONTROL_2 0x02
50 #define ADSP1_CONTROL_3 0x03
51 #define ADSP1_CONTROL_4 0x04
52 #define ADSP1_CONTROL_5 0x06
53 #define ADSP1_CONTROL_6 0x07
54 #define ADSP1_CONTROL_7 0x08
55 #define ADSP1_CONTROL_8 0x09
56 #define ADSP1_CONTROL_9 0x0A
57 #define ADSP1_CONTROL_10 0x0B
58 #define ADSP1_CONTROL_11 0x0C
59 #define ADSP1_CONTROL_12 0x0D
60 #define ADSP1_CONTROL_13 0x0F
61 #define ADSP1_CONTROL_14 0x10
62 #define ADSP1_CONTROL_15 0x11
63 #define ADSP1_CONTROL_16 0x12
64 #define ADSP1_CONTROL_17 0x13
65 #define ADSP1_CONTROL_18 0x14
66 #define ADSP1_CONTROL_19 0x16
67 #define ADSP1_CONTROL_20 0x17
68 #define ADSP1_CONTROL_21 0x18
69 #define ADSP1_CONTROL_22 0x1A
70 #define ADSP1_CONTROL_23 0x1B
71 #define ADSP1_CONTROL_24 0x1C
72 #define ADSP1_CONTROL_25 0x1E
73 #define ADSP1_CONTROL_26 0x20
74 #define ADSP1_CONTROL_27 0x21
75 #define ADSP1_CONTROL_28 0x22
76 #define ADSP1_CONTROL_29 0x23
77 #define ADSP1_CONTROL_30 0x24
78 #define ADSP1_CONTROL_31 0x26
83 #define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
84 #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
85 #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
91 #define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */
92 #define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */
93 #define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */
94 #define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */
95 #define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
96 #define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
97 #define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
98 #define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
99 #define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
100 #define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
101 #define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
102 #define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
103 #define ADSP1_START 0x0001 /* DSP1_START */
104 #define ADSP1_START_MASK 0x0001 /* DSP1_START */
105 #define ADSP1_START_SHIFT 0 /* DSP1_START */
106 #define ADSP1_START_WIDTH 1 /* DSP1_START */
111 #define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
112 #define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
113 #define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
115 #define ADSP2_CONTROL 0x0
116 #define ADSP2_CLOCKING 0x1
117 #define ADSP2_STATUS1 0x4
118 #define ADSP2_WDMA_CONFIG_1 0x30
119 #define ADSP2_WDMA_CONFIG_2 0x31
120 #define ADSP2_RDMA_CONFIG_1 0x34
122 #define ADSP2_SCRATCH0 0x40
123 #define ADSP2_SCRATCH1 0x41
124 #define ADSP2_SCRATCH2 0x42
125 #define ADSP2_SCRATCH3 0x43
131 #define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */
132 #define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */
133 #define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */
134 #define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */
135 #define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */
136 #define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */
137 #define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */
138 #define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */
139 #define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */
140 #define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */
141 #define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */
142 #define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */
143 #define ADSP2_START 0x0001 /* DSP1_START */
144 #define ADSP2_START_MASK 0x0001 /* DSP1_START */
145 #define ADSP2_START_SHIFT 0 /* DSP1_START */
146 #define ADSP2_START_WIDTH 1 /* DSP1_START */
151 #define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */
152 #define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */
153 #define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */
158 #define ADSP2_RAM_RDY 0x0001
159 #define ADSP2_RAM_RDY_MASK 0x0001
160 #define ADSP2_RAM_RDY_SHIFT 0
161 #define ADSP2_RAM_RDY_WIDTH 1
163 #define ADSP_MAX_STD_CTRL_SIZE 512
166 struct list_head list;
170 static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len,
171 struct list_head *list)
173 struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL);
178 buf->buf = vmalloc(len);
183 memcpy(buf->buf, src, len);
186 list_add_tail(&buf->list, list);
191 static void wm_adsp_buf_free(struct list_head *list)
193 while (!list_empty(list)) {
194 struct wm_adsp_buf *buf = list_first_entry(list,
197 list_del(&buf->list);
203 #define WM_ADSP_FW_MBC_VSS 0
204 #define WM_ADSP_FW_HIFI 1
205 #define WM_ADSP_FW_TX 2
206 #define WM_ADSP_FW_TX_SPK 3
207 #define WM_ADSP_FW_RX 4
208 #define WM_ADSP_FW_RX_ANC 5
209 #define WM_ADSP_FW_CTRL 6
210 #define WM_ADSP_FW_ASR 7
211 #define WM_ADSP_FW_TRACE 8
212 #define WM_ADSP_FW_SPK_PROT 9
213 #define WM_ADSP_FW_MISC 10
215 #define WM_ADSP_NUM_FW 11
217 static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
218 [WM_ADSP_FW_MBC_VSS] = "MBC/VSS",
219 [WM_ADSP_FW_HIFI] = "MasterHiFi",
220 [WM_ADSP_FW_TX] = "Tx",
221 [WM_ADSP_FW_TX_SPK] = "Tx Speaker",
222 [WM_ADSP_FW_RX] = "Rx",
223 [WM_ADSP_FW_RX_ANC] = "Rx ANC",
224 [WM_ADSP_FW_CTRL] = "Voice Ctrl",
225 [WM_ADSP_FW_ASR] = "ASR Assist",
226 [WM_ADSP_FW_TRACE] = "Dbg Trace",
227 [WM_ADSP_FW_SPK_PROT] = "Protection",
228 [WM_ADSP_FW_MISC] = "Misc",
231 struct wm_adsp_system_config_xm_hdr {
237 __be32 dma_buffer_size;
240 __be32 build_job_name[3];
241 __be32 build_job_number;
244 struct wm_adsp_alg_xm_struct {
250 __be32 high_water_mark;
251 __be32 low_water_mark;
252 __be64 smoothed_power;
255 struct wm_adsp_buffer {
256 __be32 X_buf_base; /* XM base addr of first X area */
257 __be32 X_buf_size; /* Size of 1st X area in words */
258 __be32 X_buf_base2; /* XM base addr of 2nd X area */
259 __be32 X_buf_brk; /* Total X size in words */
260 __be32 Y_buf_base; /* YM base addr of Y area */
261 __be32 wrap; /* Total size X and Y in words */
262 __be32 high_water_mark; /* Point at which IRQ is asserted */
263 __be32 irq_count; /* bits 1-31 count IRQ assertions */
264 __be32 irq_ack; /* acked IRQ count, bit 0 enables IRQ */
265 __be32 next_write_index; /* word index of next write */
266 __be32 next_read_index; /* word index of next read */
267 __be32 error; /* error if any */
268 __be32 oldest_block_index; /* word index of oldest surviving */
269 __be32 requested_rewind; /* how many blocks rewind was done */
270 __be32 reserved_space; /* internal */
271 __be32 min_free; /* min free space since stream start */
272 __be32 blocks_written[2]; /* total blocks written (64 bit) */
273 __be32 words_written[2]; /* total words written (64 bit) */
276 struct wm_adsp_compr;
278 struct wm_adsp_compr_buf {
280 struct wm_adsp_compr *compr;
282 struct wm_adsp_buffer_region *regions;
291 struct wm_adsp_compr {
293 struct wm_adsp_compr_buf *buf;
295 struct snd_compr_stream *stream;
296 struct snd_compressed_buffer size;
299 unsigned int copied_total;
301 unsigned int sample_rate;
304 #define WM_ADSP_DATA_WORD_SIZE 3
306 #define WM_ADSP_MIN_FRAGMENTS 1
307 #define WM_ADSP_MAX_FRAGMENTS 256
308 #define WM_ADSP_MIN_FRAGMENT_SIZE (64 * WM_ADSP_DATA_WORD_SIZE)
309 #define WM_ADSP_MAX_FRAGMENT_SIZE (4096 * WM_ADSP_DATA_WORD_SIZE)
311 #define WM_ADSP_ALG_XM_STRUCT_MAGIC 0x49aec7
313 #define HOST_BUFFER_FIELD(field) \
314 (offsetof(struct wm_adsp_buffer, field) / sizeof(__be32))
316 #define ALG_XM_FIELD(field) \
317 (offsetof(struct wm_adsp_alg_xm_struct, field) / sizeof(__be32))
319 static int wm_adsp_buffer_init(struct wm_adsp *dsp);
320 static int wm_adsp_buffer_free(struct wm_adsp *dsp);
322 struct wm_adsp_buffer_region {
324 unsigned int cumulative_size;
325 unsigned int mem_type;
326 unsigned int base_addr;
329 struct wm_adsp_buffer_region_def {
330 unsigned int mem_type;
331 unsigned int base_offset;
332 unsigned int size_offset;
335 static const struct wm_adsp_buffer_region_def default_regions[] = {
337 .mem_type = WMFW_ADSP2_XM,
338 .base_offset = HOST_BUFFER_FIELD(X_buf_base),
339 .size_offset = HOST_BUFFER_FIELD(X_buf_size),
342 .mem_type = WMFW_ADSP2_XM,
343 .base_offset = HOST_BUFFER_FIELD(X_buf_base2),
344 .size_offset = HOST_BUFFER_FIELD(X_buf_brk),
347 .mem_type = WMFW_ADSP2_YM,
348 .base_offset = HOST_BUFFER_FIELD(Y_buf_base),
349 .size_offset = HOST_BUFFER_FIELD(wrap),
353 struct wm_adsp_fw_caps {
355 struct snd_codec_desc desc;
357 const struct wm_adsp_buffer_region_def *region_defs;
360 static const struct wm_adsp_fw_caps ctrl_caps[] = {
362 .id = SND_AUDIOCODEC_BESPOKE,
365 .sample_rates = { 16000 },
366 .num_sample_rates = 1,
367 .formats = SNDRV_PCM_FMTBIT_S16_LE,
369 .num_regions = ARRAY_SIZE(default_regions),
370 .region_defs = default_regions,
374 static const struct wm_adsp_fw_caps trace_caps[] = {
376 .id = SND_AUDIOCODEC_BESPOKE,
380 4000, 8000, 11025, 12000, 16000, 22050,
381 24000, 32000, 44100, 48000, 64000, 88200,
382 96000, 176400, 192000
384 .num_sample_rates = 15,
385 .formats = SNDRV_PCM_FMTBIT_S16_LE,
387 .num_regions = ARRAY_SIZE(default_regions),
388 .region_defs = default_regions,
392 static const struct {
396 const struct wm_adsp_fw_caps *caps;
398 } wm_adsp_fw[WM_ADSP_NUM_FW] = {
399 [WM_ADSP_FW_MBC_VSS] = { .file = "mbc-vss" },
400 [WM_ADSP_FW_HIFI] = { .file = "hifi" },
401 [WM_ADSP_FW_TX] = { .file = "tx" },
402 [WM_ADSP_FW_TX_SPK] = { .file = "tx-spk" },
403 [WM_ADSP_FW_RX] = { .file = "rx" },
404 [WM_ADSP_FW_RX_ANC] = { .file = "rx-anc" },
405 [WM_ADSP_FW_CTRL] = {
407 .compr_direction = SND_COMPRESS_CAPTURE,
408 .num_caps = ARRAY_SIZE(ctrl_caps),
410 .voice_trigger = true,
412 [WM_ADSP_FW_ASR] = { .file = "asr" },
413 [WM_ADSP_FW_TRACE] = {
415 .compr_direction = SND_COMPRESS_CAPTURE,
416 .num_caps = ARRAY_SIZE(trace_caps),
419 [WM_ADSP_FW_SPK_PROT] = { .file = "spk-prot" },
420 [WM_ADSP_FW_MISC] = { .file = "misc" },
423 struct wm_coeff_ctl_ops {
424 int (*xget)(struct snd_kcontrol *kcontrol,
425 struct snd_ctl_elem_value *ucontrol);
426 int (*xput)(struct snd_kcontrol *kcontrol,
427 struct snd_ctl_elem_value *ucontrol);
428 int (*xinfo)(struct snd_kcontrol *kcontrol,
429 struct snd_ctl_elem_info *uinfo);
432 struct wm_coeff_ctl {
435 struct wm_adsp_alg_region alg_region;
436 struct wm_coeff_ctl_ops ops;
438 unsigned int enabled:1;
439 struct list_head list;
444 struct snd_kcontrol *kcontrol;
445 struct soc_bytes_ext bytes_ext;
449 #ifdef CONFIG_DEBUG_FS
450 static void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp, const char *s)
452 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
454 kfree(dsp->wmfw_file_name);
455 dsp->wmfw_file_name = tmp;
458 static void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp, const char *s)
460 char *tmp = kasprintf(GFP_KERNEL, "%s\n", s);
462 kfree(dsp->bin_file_name);
463 dsp->bin_file_name = tmp;
466 static void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
468 kfree(dsp->wmfw_file_name);
469 kfree(dsp->bin_file_name);
470 dsp->wmfw_file_name = NULL;
471 dsp->bin_file_name = NULL;
474 static ssize_t wm_adsp_debugfs_wmfw_read(struct file *file,
475 char __user *user_buf,
476 size_t count, loff_t *ppos)
478 struct wm_adsp *dsp = file->private_data;
481 mutex_lock(&dsp->pwr_lock);
483 if (!dsp->wmfw_file_name || !dsp->booted)
486 ret = simple_read_from_buffer(user_buf, count, ppos,
488 strlen(dsp->wmfw_file_name));
490 mutex_unlock(&dsp->pwr_lock);
494 static ssize_t wm_adsp_debugfs_bin_read(struct file *file,
495 char __user *user_buf,
496 size_t count, loff_t *ppos)
498 struct wm_adsp *dsp = file->private_data;
501 mutex_lock(&dsp->pwr_lock);
503 if (!dsp->bin_file_name || !dsp->booted)
506 ret = simple_read_from_buffer(user_buf, count, ppos,
508 strlen(dsp->bin_file_name));
510 mutex_unlock(&dsp->pwr_lock);
514 static const struct {
516 const struct file_operations fops;
517 } wm_adsp_debugfs_fops[] = {
519 .name = "wmfw_file_name",
522 .read = wm_adsp_debugfs_wmfw_read,
526 .name = "bin_file_name",
529 .read = wm_adsp_debugfs_bin_read,
534 static void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
535 struct snd_soc_codec *codec)
537 struct dentry *root = NULL;
541 if (!codec->component.debugfs_root) {
542 adsp_err(dsp, "No codec debugfs root\n");
546 root_name = kmalloc(PAGE_SIZE, GFP_KERNEL);
550 snprintf(root_name, PAGE_SIZE, "dsp%d", dsp->num);
551 root = debugfs_create_dir(root_name, codec->component.debugfs_root);
557 if (!debugfs_create_bool("booted", S_IRUGO, root, &dsp->booted))
560 if (!debugfs_create_bool("running", S_IRUGO, root, &dsp->running))
563 if (!debugfs_create_x32("fw_id", S_IRUGO, root, &dsp->fw_id))
566 if (!debugfs_create_x32("fw_version", S_IRUGO, root,
567 &dsp->fw_id_version))
570 for (i = 0; i < ARRAY_SIZE(wm_adsp_debugfs_fops); ++i) {
571 if (!debugfs_create_file(wm_adsp_debugfs_fops[i].name,
573 &wm_adsp_debugfs_fops[i].fops))
577 dsp->debugfs_root = root;
581 debugfs_remove_recursive(root);
582 adsp_err(dsp, "Failed to create debugfs\n");
585 static void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
587 wm_adsp_debugfs_clear(dsp);
588 debugfs_remove_recursive(dsp->debugfs_root);
591 static inline void wm_adsp2_init_debugfs(struct wm_adsp *dsp,
592 struct snd_soc_codec *codec)
596 static inline void wm_adsp2_cleanup_debugfs(struct wm_adsp *dsp)
600 static inline void wm_adsp_debugfs_save_wmfwname(struct wm_adsp *dsp,
605 static inline void wm_adsp_debugfs_save_binname(struct wm_adsp *dsp,
610 static inline void wm_adsp_debugfs_clear(struct wm_adsp *dsp)
615 static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
616 struct snd_ctl_elem_value *ucontrol)
618 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
619 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
620 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
622 ucontrol->value.enumerated.item[0] = dsp[e->shift_l].fw;
627 static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
628 struct snd_ctl_elem_value *ucontrol)
630 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
631 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
632 struct wm_adsp *dsp = snd_soc_codec_get_drvdata(codec);
635 if (ucontrol->value.enumerated.item[0] == dsp[e->shift_l].fw)
638 if (ucontrol->value.enumerated.item[0] >= WM_ADSP_NUM_FW)
641 mutex_lock(&dsp[e->shift_l].pwr_lock);
643 if (dsp[e->shift_l].booted || dsp[e->shift_l].compr)
646 dsp[e->shift_l].fw = ucontrol->value.enumerated.item[0];
648 mutex_unlock(&dsp[e->shift_l].pwr_lock);
653 static const struct soc_enum wm_adsp_fw_enum[] = {
654 SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
655 SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
656 SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
657 SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
660 const struct snd_kcontrol_new wm_adsp_fw_controls[] = {
661 SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
662 wm_adsp_fw_get, wm_adsp_fw_put),
663 SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
664 wm_adsp_fw_get, wm_adsp_fw_put),
665 SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
666 wm_adsp_fw_get, wm_adsp_fw_put),
667 SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3],
668 wm_adsp_fw_get, wm_adsp_fw_put),
670 EXPORT_SYMBOL_GPL(wm_adsp_fw_controls);
672 static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,
677 for (i = 0; i < dsp->num_mems; i++)
678 if (dsp->mem[i].type == type)
684 static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *mem,
691 return mem->base + (offset * 3);
693 return mem->base + (offset * 2);
695 return mem->base + (offset * 2);
697 return mem->base + (offset * 2);
699 return mem->base + (offset * 2);
701 WARN(1, "Unknown memory region type");
706 static void wm_adsp2_show_fw_status(struct wm_adsp *dsp)
711 ret = regmap_raw_read(dsp->regmap, dsp->base + ADSP2_SCRATCH0,
712 scratch, sizeof(scratch));
714 adsp_err(dsp, "Failed to read SCRATCH regs: %d\n", ret);
718 adsp_dbg(dsp, "FW SCRATCH 0:0x%x 1:0x%x 2:0x%x 3:0x%x\n",
719 be16_to_cpu(scratch[0]),
720 be16_to_cpu(scratch[1]),
721 be16_to_cpu(scratch[2]),
722 be16_to_cpu(scratch[3]));
725 static inline struct wm_coeff_ctl *bytes_ext_to_ctl(struct soc_bytes_ext *ext)
727 return container_of(ext, struct wm_coeff_ctl, bytes_ext);
730 static int wm_coeff_info(struct snd_kcontrol *kctl,
731 struct snd_ctl_elem_info *uinfo)
733 struct soc_bytes_ext *bytes_ext =
734 (struct soc_bytes_ext *)kctl->private_value;
735 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
737 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
738 uinfo->count = ctl->len;
742 static int wm_coeff_write_control(struct wm_coeff_ctl *ctl,
743 const void *buf, size_t len)
745 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
746 const struct wm_adsp_region *mem;
747 struct wm_adsp *dsp = ctl->dsp;
752 mem = wm_adsp_find_region(dsp, alg_region->type);
754 adsp_err(dsp, "No base for region %x\n",
759 reg = ctl->alg_region.base + ctl->offset;
760 reg = wm_adsp_region_to_reg(mem, reg);
762 scratch = kmemdup(buf, len, GFP_KERNEL | GFP_DMA);
766 ret = regmap_raw_write(dsp->regmap, reg, scratch,
769 adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n",
774 adsp_dbg(dsp, "Wrote %zu bytes to %x\n", len, reg);
781 static int wm_coeff_put(struct snd_kcontrol *kctl,
782 struct snd_ctl_elem_value *ucontrol)
784 struct soc_bytes_ext *bytes_ext =
785 (struct soc_bytes_ext *)kctl->private_value;
786 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
787 char *p = ucontrol->value.bytes.data;
790 mutex_lock(&ctl->dsp->pwr_lock);
792 memcpy(ctl->cache, p, ctl->len);
795 if (ctl->enabled && ctl->dsp->running)
796 ret = wm_coeff_write_control(ctl, p, ctl->len);
798 mutex_unlock(&ctl->dsp->pwr_lock);
803 static int wm_coeff_tlv_put(struct snd_kcontrol *kctl,
804 const unsigned int __user *bytes, unsigned int size)
806 struct soc_bytes_ext *bytes_ext =
807 (struct soc_bytes_ext *)kctl->private_value;
808 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
811 mutex_lock(&ctl->dsp->pwr_lock);
813 if (copy_from_user(ctl->cache, bytes, size)) {
817 if (ctl->enabled && ctl->dsp->running)
818 ret = wm_coeff_write_control(ctl, ctl->cache, size);
821 mutex_unlock(&ctl->dsp->pwr_lock);
826 static int wm_coeff_read_control(struct wm_coeff_ctl *ctl,
827 void *buf, size_t len)
829 struct wm_adsp_alg_region *alg_region = &ctl->alg_region;
830 const struct wm_adsp_region *mem;
831 struct wm_adsp *dsp = ctl->dsp;
836 mem = wm_adsp_find_region(dsp, alg_region->type);
838 adsp_err(dsp, "No base for region %x\n",
843 reg = ctl->alg_region.base + ctl->offset;
844 reg = wm_adsp_region_to_reg(mem, reg);
846 scratch = kmalloc(len, GFP_KERNEL | GFP_DMA);
850 ret = regmap_raw_read(dsp->regmap, reg, scratch, len);
852 adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n",
857 adsp_dbg(dsp, "Read %zu bytes from %x\n", len, reg);
859 memcpy(buf, scratch, len);
865 static int wm_coeff_get(struct snd_kcontrol *kctl,
866 struct snd_ctl_elem_value *ucontrol)
868 struct soc_bytes_ext *bytes_ext =
869 (struct soc_bytes_ext *)kctl->private_value;
870 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
871 char *p = ucontrol->value.bytes.data;
874 mutex_lock(&ctl->dsp->pwr_lock);
876 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
877 if (ctl->enabled && ctl->dsp->running)
878 ret = wm_coeff_read_control(ctl, p, ctl->len);
882 if (!ctl->flags && ctl->enabled && ctl->dsp->running)
883 ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len);
885 memcpy(p, ctl->cache, ctl->len);
888 mutex_unlock(&ctl->dsp->pwr_lock);
893 static int wm_coeff_tlv_get(struct snd_kcontrol *kctl,
894 unsigned int __user *bytes, unsigned int size)
896 struct soc_bytes_ext *bytes_ext =
897 (struct soc_bytes_ext *)kctl->private_value;
898 struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
901 mutex_lock(&ctl->dsp->pwr_lock);
903 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
904 if (ctl->enabled && ctl->dsp->running)
905 ret = wm_coeff_read_control(ctl, ctl->cache, size);
909 if (!ctl->flags && ctl->enabled && ctl->dsp->running)
910 ret = wm_coeff_read_control(ctl, ctl->cache, size);
913 if (!ret && copy_to_user(bytes, ctl->cache, size))
916 mutex_unlock(&ctl->dsp->pwr_lock);
921 struct wmfw_ctl_work {
923 struct wm_coeff_ctl *ctl;
924 struct work_struct work;
927 static unsigned int wmfw_convert_flags(unsigned int in, unsigned int len)
929 unsigned int out, rd, wr, vol;
931 if (len > ADSP_MAX_STD_CTRL_SIZE) {
932 rd = SNDRV_CTL_ELEM_ACCESS_TLV_READ;
933 wr = SNDRV_CTL_ELEM_ACCESS_TLV_WRITE;
934 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
936 out = SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK;
938 rd = SNDRV_CTL_ELEM_ACCESS_READ;
939 wr = SNDRV_CTL_ELEM_ACCESS_WRITE;
940 vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
946 if (in & WMFW_CTL_FLAG_READABLE)
948 if (in & WMFW_CTL_FLAG_WRITEABLE)
950 if (in & WMFW_CTL_FLAG_VOLATILE)
953 out |= rd | wr | vol;
959 static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl)
961 struct snd_kcontrol_new *kcontrol;
964 if (!ctl || !ctl->name)
967 kcontrol = kzalloc(sizeof(*kcontrol), GFP_KERNEL);
970 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
972 kcontrol->name = ctl->name;
973 kcontrol->info = wm_coeff_info;
974 kcontrol->get = wm_coeff_get;
975 kcontrol->put = wm_coeff_put;
976 kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
977 kcontrol->tlv.c = snd_soc_bytes_tlv_callback;
978 kcontrol->private_value = (unsigned long)&ctl->bytes_ext;
980 ctl->bytes_ext.max = ctl->len;
981 ctl->bytes_ext.get = wm_coeff_tlv_get;
982 ctl->bytes_ext.put = wm_coeff_tlv_put;
984 kcontrol->access = wmfw_convert_flags(ctl->flags, ctl->len);
986 ret = snd_soc_add_card_controls(dsp->card, kcontrol, 1);
992 ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card, ctl->name);
1001 static int wm_coeff_init_control_caches(struct wm_adsp *dsp)
1003 struct wm_coeff_ctl *ctl;
1006 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1007 if (!ctl->enabled || ctl->set)
1009 if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
1012 ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len);
1020 static int wm_coeff_sync_controls(struct wm_adsp *dsp)
1022 struct wm_coeff_ctl *ctl;
1025 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1028 if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) {
1029 ret = wm_coeff_write_control(ctl, ctl->cache, ctl->len);
1038 static void wm_adsp_ctl_work(struct work_struct *work)
1040 struct wmfw_ctl_work *ctl_work = container_of(work,
1041 struct wmfw_ctl_work,
1044 wmfw_add_ctl(ctl_work->dsp, ctl_work->ctl);
1048 static void wm_adsp_free_ctl_blk(struct wm_coeff_ctl *ctl)
1055 static int wm_adsp_create_control(struct wm_adsp *dsp,
1056 const struct wm_adsp_alg_region *alg_region,
1057 unsigned int offset, unsigned int len,
1058 const char *subname, unsigned int subname_len,
1061 struct wm_coeff_ctl *ctl;
1062 struct wmfw_ctl_work *ctl_work;
1063 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
1067 if (flags & WMFW_CTL_FLAG_SYS)
1070 switch (alg_region->type) {
1087 adsp_err(dsp, "Unknown region type: %d\n", alg_region->type);
1091 switch (dsp->fw_ver) {
1094 snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "DSP%d %s %x",
1095 dsp->num, region_name, alg_region->alg);
1098 ret = snprintf(name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN,
1099 "DSP%d%c %.12s %x", dsp->num, *region_name,
1100 wm_adsp_fw_text[dsp->fw], alg_region->alg);
1102 /* Truncate the subname from the start if it is too long */
1104 int avail = SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret - 2;
1107 if (subname_len > avail)
1108 skip = subname_len - avail;
1110 snprintf(name + ret,
1111 SNDRV_CTL_ELEM_ID_NAME_MAXLEN - ret, " %.*s",
1112 subname_len - skip, subname + skip);
1117 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1118 if (!strcmp(ctl->name, name)) {
1125 ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
1128 ctl->fw_name = wm_adsp_fw_text[dsp->fw];
1129 ctl->alg_region = *alg_region;
1130 ctl->name = kmemdup(name, strlen(name) + 1, GFP_KERNEL);
1137 ctl->ops.xget = wm_coeff_get;
1138 ctl->ops.xput = wm_coeff_put;
1142 ctl->offset = offset;
1144 ctl->cache = kzalloc(ctl->len, GFP_KERNEL);
1150 list_add(&ctl->list, &dsp->ctl_list);
1152 ctl_work = kzalloc(sizeof(*ctl_work), GFP_KERNEL);
1158 ctl_work->dsp = dsp;
1159 ctl_work->ctl = ctl;
1160 INIT_WORK(&ctl_work->work, wm_adsp_ctl_work);
1161 schedule_work(&ctl_work->work);
1175 struct wm_coeff_parsed_alg {
1182 struct wm_coeff_parsed_coeff {
1192 static int wm_coeff_parse_string(int bytes, const u8 **pos, const u8 **str)
1201 length = le16_to_cpu(*((__le16 *)*pos));
1208 *str = *pos + bytes;
1210 *pos += ((length + bytes) + 3) & ~0x03;
1215 static int wm_coeff_parse_int(int bytes, const u8 **pos)
1221 val = le16_to_cpu(*((__le16 *)*pos));
1224 val = le32_to_cpu(*((__le32 *)*pos));
1235 static inline void wm_coeff_parse_alg(struct wm_adsp *dsp, const u8 **data,
1236 struct wm_coeff_parsed_alg *blk)
1238 const struct wmfw_adsp_alg_data *raw;
1240 switch (dsp->fw_ver) {
1243 raw = (const struct wmfw_adsp_alg_data *)*data;
1246 blk->id = le32_to_cpu(raw->id);
1247 blk->name = raw->name;
1248 blk->name_len = strlen(raw->name);
1249 blk->ncoeff = le32_to_cpu(raw->ncoeff);
1252 blk->id = wm_coeff_parse_int(sizeof(raw->id), data);
1253 blk->name_len = wm_coeff_parse_string(sizeof(u8), data,
1255 wm_coeff_parse_string(sizeof(u16), data, NULL);
1256 blk->ncoeff = wm_coeff_parse_int(sizeof(raw->ncoeff), data);
1260 adsp_dbg(dsp, "Algorithm ID: %#x\n", blk->id);
1261 adsp_dbg(dsp, "Algorithm name: %.*s\n", blk->name_len, blk->name);
1262 adsp_dbg(dsp, "# of coefficient descriptors: %#x\n", blk->ncoeff);
1265 static inline void wm_coeff_parse_coeff(struct wm_adsp *dsp, const u8 **data,
1266 struct wm_coeff_parsed_coeff *blk)
1268 const struct wmfw_adsp_coeff_data *raw;
1272 switch (dsp->fw_ver) {
1275 raw = (const struct wmfw_adsp_coeff_data *)*data;
1276 *data = *data + sizeof(raw->hdr) + le32_to_cpu(raw->hdr.size);
1278 blk->offset = le16_to_cpu(raw->hdr.offset);
1279 blk->mem_type = le16_to_cpu(raw->hdr.type);
1280 blk->name = raw->name;
1281 blk->name_len = strlen(raw->name);
1282 blk->ctl_type = le16_to_cpu(raw->ctl_type);
1283 blk->flags = le16_to_cpu(raw->flags);
1284 blk->len = le32_to_cpu(raw->len);
1288 blk->offset = wm_coeff_parse_int(sizeof(raw->hdr.offset), &tmp);
1289 blk->mem_type = wm_coeff_parse_int(sizeof(raw->hdr.type), &tmp);
1290 length = wm_coeff_parse_int(sizeof(raw->hdr.size), &tmp);
1291 blk->name_len = wm_coeff_parse_string(sizeof(u8), &tmp,
1293 wm_coeff_parse_string(sizeof(u8), &tmp, NULL);
1294 wm_coeff_parse_string(sizeof(u16), &tmp, NULL);
1295 blk->ctl_type = wm_coeff_parse_int(sizeof(raw->ctl_type), &tmp);
1296 blk->flags = wm_coeff_parse_int(sizeof(raw->flags), &tmp);
1297 blk->len = wm_coeff_parse_int(sizeof(raw->len), &tmp);
1299 *data = *data + sizeof(raw->hdr) + length;
1303 adsp_dbg(dsp, "\tCoefficient type: %#x\n", blk->mem_type);
1304 adsp_dbg(dsp, "\tCoefficient offset: %#x\n", blk->offset);
1305 adsp_dbg(dsp, "\tCoefficient name: %.*s\n", blk->name_len, blk->name);
1306 adsp_dbg(dsp, "\tCoefficient flags: %#x\n", blk->flags);
1307 adsp_dbg(dsp, "\tALSA control type: %#x\n", blk->ctl_type);
1308 adsp_dbg(dsp, "\tALSA control len: %#x\n", blk->len);
1311 static int wm_adsp_parse_coeff(struct wm_adsp *dsp,
1312 const struct wmfw_region *region)
1314 struct wm_adsp_alg_region alg_region = {};
1315 struct wm_coeff_parsed_alg alg_blk;
1316 struct wm_coeff_parsed_coeff coeff_blk;
1317 const u8 *data = region->data;
1320 wm_coeff_parse_alg(dsp, &data, &alg_blk);
1321 for (i = 0; i < alg_blk.ncoeff; i++) {
1322 wm_coeff_parse_coeff(dsp, &data, &coeff_blk);
1324 switch (coeff_blk.ctl_type) {
1325 case SNDRV_CTL_ELEM_TYPE_BYTES:
1328 adsp_err(dsp, "Unknown control type: %d\n",
1329 coeff_blk.ctl_type);
1333 alg_region.type = coeff_blk.mem_type;
1334 alg_region.alg = alg_blk.id;
1336 ret = wm_adsp_create_control(dsp, &alg_region,
1343 adsp_err(dsp, "Failed to create control: %.*s, %d\n",
1344 coeff_blk.name_len, coeff_blk.name, ret);
1350 static int wm_adsp_load(struct wm_adsp *dsp)
1352 LIST_HEAD(buf_list);
1353 const struct firmware *firmware;
1354 struct regmap *regmap = dsp->regmap;
1355 unsigned int pos = 0;
1356 const struct wmfw_header *header;
1357 const struct wmfw_adsp1_sizes *adsp1_sizes;
1358 const struct wmfw_adsp2_sizes *adsp2_sizes;
1359 const struct wmfw_footer *footer;
1360 const struct wmfw_region *region;
1361 const struct wm_adsp_region *mem;
1362 const char *region_name;
1364 struct wm_adsp_buf *buf;
1367 int ret, offset, type, sizes;
1369 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1373 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num,
1374 wm_adsp_fw[dsp->fw].file);
1375 file[PAGE_SIZE - 1] = '\0';
1377 ret = request_firmware(&firmware, file, dsp->dev);
1379 adsp_err(dsp, "Failed to request '%s'\n", file);
1384 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1385 if (pos >= firmware->size) {
1386 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1387 file, firmware->size);
1391 header = (void *)&firmware->data[0];
1393 if (memcmp(&header->magic[0], "WMFW", 4) != 0) {
1394 adsp_err(dsp, "%s: invalid magic\n", file);
1398 switch (header->ver) {
1400 adsp_warn(dsp, "%s: Depreciated file format %d\n",
1407 adsp_err(dsp, "%s: unknown file format %d\n",
1412 adsp_info(dsp, "Firmware version: %d\n", header->ver);
1413 dsp->fw_ver = header->ver;
1415 if (header->core != dsp->type) {
1416 adsp_err(dsp, "%s: invalid core %d != %d\n",
1417 file, header->core, dsp->type);
1421 switch (dsp->type) {
1423 pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
1424 adsp1_sizes = (void *)&(header[1]);
1425 footer = (void *)&(adsp1_sizes[1]);
1426 sizes = sizeof(*adsp1_sizes);
1428 adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n",
1429 file, le32_to_cpu(adsp1_sizes->dm),
1430 le32_to_cpu(adsp1_sizes->pm),
1431 le32_to_cpu(adsp1_sizes->zm));
1435 pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer);
1436 adsp2_sizes = (void *)&(header[1]);
1437 footer = (void *)&(adsp2_sizes[1]);
1438 sizes = sizeof(*adsp2_sizes);
1440 adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n",
1441 file, le32_to_cpu(adsp2_sizes->xm),
1442 le32_to_cpu(adsp2_sizes->ym),
1443 le32_to_cpu(adsp2_sizes->pm),
1444 le32_to_cpu(adsp2_sizes->zm));
1448 WARN(1, "Unknown DSP type");
1452 if (le32_to_cpu(header->len) != sizeof(*header) +
1453 sizes + sizeof(*footer)) {
1454 adsp_err(dsp, "%s: unexpected header length %d\n",
1455 file, le32_to_cpu(header->len));
1459 adsp_dbg(dsp, "%s: timestamp %llu\n", file,
1460 le64_to_cpu(footer->timestamp));
1462 while (pos < firmware->size &&
1463 pos - firmware->size > sizeof(*region)) {
1464 region = (void *)&(firmware->data[pos]);
1465 region_name = "Unknown";
1468 offset = le32_to_cpu(region->offset) & 0xffffff;
1469 type = be32_to_cpu(region->type) & 0xff;
1470 mem = wm_adsp_find_region(dsp, type);
1473 case WMFW_NAME_TEXT:
1474 region_name = "Firmware name";
1475 text = kzalloc(le32_to_cpu(region->len) + 1,
1478 case WMFW_ALGORITHM_DATA:
1479 region_name = "Algorithm";
1480 ret = wm_adsp_parse_coeff(dsp, region);
1484 case WMFW_INFO_TEXT:
1485 region_name = "Information";
1486 text = kzalloc(le32_to_cpu(region->len) + 1,
1490 region_name = "Absolute";
1495 reg = wm_adsp_region_to_reg(mem, offset);
1499 reg = wm_adsp_region_to_reg(mem, offset);
1503 reg = wm_adsp_region_to_reg(mem, offset);
1507 reg = wm_adsp_region_to_reg(mem, offset);
1511 reg = wm_adsp_region_to_reg(mem, offset);
1515 "%s.%d: Unknown region type %x at %d(%x)\n",
1516 file, regions, type, pos, pos);
1520 adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,
1521 regions, le32_to_cpu(region->len), offset,
1525 memcpy(text, region->data, le32_to_cpu(region->len));
1526 adsp_info(dsp, "%s: %s\n", file, text);
1531 buf = wm_adsp_buf_alloc(region->data,
1532 le32_to_cpu(region->len),
1535 adsp_err(dsp, "Out of memory\n");
1540 ret = regmap_raw_write_async(regmap, reg, buf->buf,
1541 le32_to_cpu(region->len));
1544 "%s.%d: Failed to write %d bytes at %d in %s: %d\n",
1546 le32_to_cpu(region->len), offset,
1552 pos += le32_to_cpu(region->len) + sizeof(*region);
1556 ret = regmap_async_complete(regmap);
1558 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
1562 if (pos > firmware->size)
1563 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
1564 file, regions, pos - firmware->size);
1566 wm_adsp_debugfs_save_wmfwname(dsp, file);
1569 regmap_async_complete(regmap);
1570 wm_adsp_buf_free(&buf_list);
1571 release_firmware(firmware);
1578 static void wm_adsp_ctl_fixup_base(struct wm_adsp *dsp,
1579 const struct wm_adsp_alg_region *alg_region)
1581 struct wm_coeff_ctl *ctl;
1583 list_for_each_entry(ctl, &dsp->ctl_list, list) {
1584 if (ctl->fw_name == wm_adsp_fw_text[dsp->fw] &&
1585 alg_region->alg == ctl->alg_region.alg &&
1586 alg_region->type == ctl->alg_region.type) {
1587 ctl->alg_region.base = alg_region->base;
1592 static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs,
1593 unsigned int pos, unsigned int len)
1600 adsp_err(dsp, "No algorithms\n");
1601 return ERR_PTR(-EINVAL);
1604 if (n_algs > 1024) {
1605 adsp_err(dsp, "Algorithm count %zx excessive\n", n_algs);
1606 return ERR_PTR(-EINVAL);
1609 /* Read the terminator first to validate the length */
1610 ret = regmap_raw_read(dsp->regmap, pos + len, &val, sizeof(val));
1612 adsp_err(dsp, "Failed to read algorithm list end: %d\n",
1614 return ERR_PTR(ret);
1617 if (be32_to_cpu(val) != 0xbedead)
1618 adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n",
1619 pos + len, be32_to_cpu(val));
1621 alg = kzalloc(len * 2, GFP_KERNEL | GFP_DMA);
1623 return ERR_PTR(-ENOMEM);
1625 ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2);
1627 adsp_err(dsp, "Failed to read algorithm list: %d\n", ret);
1629 return ERR_PTR(ret);
1635 static struct wm_adsp_alg_region *
1636 wm_adsp_find_alg_region(struct wm_adsp *dsp, int type, unsigned int id)
1638 struct wm_adsp_alg_region *alg_region;
1640 list_for_each_entry(alg_region, &dsp->alg_regions, list) {
1641 if (id == alg_region->alg && type == alg_region->type)
1648 static struct wm_adsp_alg_region *wm_adsp_create_region(struct wm_adsp *dsp,
1649 int type, __be32 id,
1652 struct wm_adsp_alg_region *alg_region;
1654 alg_region = kzalloc(sizeof(*alg_region), GFP_KERNEL);
1656 return ERR_PTR(-ENOMEM);
1658 alg_region->type = type;
1659 alg_region->alg = be32_to_cpu(id);
1660 alg_region->base = be32_to_cpu(base);
1662 list_add_tail(&alg_region->list, &dsp->alg_regions);
1664 if (dsp->fw_ver > 0)
1665 wm_adsp_ctl_fixup_base(dsp, alg_region);
1670 static void wm_adsp_free_alg_regions(struct wm_adsp *dsp)
1672 struct wm_adsp_alg_region *alg_region;
1674 while (!list_empty(&dsp->alg_regions)) {
1675 alg_region = list_first_entry(&dsp->alg_regions,
1676 struct wm_adsp_alg_region,
1678 list_del(&alg_region->list);
1683 static int wm_adsp1_setup_algs(struct wm_adsp *dsp)
1685 struct wmfw_adsp1_id_hdr adsp1_id;
1686 struct wmfw_adsp1_alg_hdr *adsp1_alg;
1687 struct wm_adsp_alg_region *alg_region;
1688 const struct wm_adsp_region *mem;
1689 unsigned int pos, len;
1693 mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);
1697 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp1_id,
1700 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1705 n_algs = be32_to_cpu(adsp1_id.n_algs);
1706 dsp->fw_id = be32_to_cpu(adsp1_id.fw.id);
1707 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1709 (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16,
1710 (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8,
1711 be32_to_cpu(adsp1_id.fw.ver) & 0xff,
1714 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1715 adsp1_id.fw.id, adsp1_id.zm);
1716 if (IS_ERR(alg_region))
1717 return PTR_ERR(alg_region);
1719 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1720 adsp1_id.fw.id, adsp1_id.dm);
1721 if (IS_ERR(alg_region))
1722 return PTR_ERR(alg_region);
1724 pos = sizeof(adsp1_id) / 2;
1725 len = (sizeof(*adsp1_alg) * n_algs) / 2;
1727 adsp1_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
1728 if (IS_ERR(adsp1_alg))
1729 return PTR_ERR(adsp1_alg);
1731 for (i = 0; i < n_algs; i++) {
1732 adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
1733 i, be32_to_cpu(adsp1_alg[i].alg.id),
1734 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16,
1735 (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8,
1736 be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff,
1737 be32_to_cpu(adsp1_alg[i].dm),
1738 be32_to_cpu(adsp1_alg[i].zm));
1740 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_DM,
1741 adsp1_alg[i].alg.id,
1743 if (IS_ERR(alg_region)) {
1744 ret = PTR_ERR(alg_region);
1747 if (dsp->fw_ver == 0) {
1748 if (i + 1 < n_algs) {
1749 len = be32_to_cpu(adsp1_alg[i + 1].dm);
1750 len -= be32_to_cpu(adsp1_alg[i].dm);
1752 wm_adsp_create_control(dsp, alg_region, 0,
1755 adsp_warn(dsp, "Missing length info for region DM with ID %x\n",
1756 be32_to_cpu(adsp1_alg[i].alg.id));
1760 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP1_ZM,
1761 adsp1_alg[i].alg.id,
1763 if (IS_ERR(alg_region)) {
1764 ret = PTR_ERR(alg_region);
1767 if (dsp->fw_ver == 0) {
1768 if (i + 1 < n_algs) {
1769 len = be32_to_cpu(adsp1_alg[i + 1].zm);
1770 len -= be32_to_cpu(adsp1_alg[i].zm);
1772 wm_adsp_create_control(dsp, alg_region, 0,
1775 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1776 be32_to_cpu(adsp1_alg[i].alg.id));
1786 static int wm_adsp2_setup_algs(struct wm_adsp *dsp)
1788 struct wmfw_adsp2_id_hdr adsp2_id;
1789 struct wmfw_adsp2_alg_hdr *adsp2_alg;
1790 struct wm_adsp_alg_region *alg_region;
1791 const struct wm_adsp_region *mem;
1792 unsigned int pos, len;
1796 mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
1800 ret = regmap_raw_read(dsp->regmap, mem->base, &adsp2_id,
1803 adsp_err(dsp, "Failed to read algorithm info: %d\n",
1808 n_algs = be32_to_cpu(adsp2_id.n_algs);
1809 dsp->fw_id = be32_to_cpu(adsp2_id.fw.id);
1810 dsp->fw_id_version = be32_to_cpu(adsp2_id.fw.ver);
1811 adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
1813 (dsp->fw_id_version & 0xff0000) >> 16,
1814 (dsp->fw_id_version & 0xff00) >> 8,
1815 dsp->fw_id_version & 0xff,
1818 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1819 adsp2_id.fw.id, adsp2_id.xm);
1820 if (IS_ERR(alg_region))
1821 return PTR_ERR(alg_region);
1823 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1824 adsp2_id.fw.id, adsp2_id.ym);
1825 if (IS_ERR(alg_region))
1826 return PTR_ERR(alg_region);
1828 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1829 adsp2_id.fw.id, adsp2_id.zm);
1830 if (IS_ERR(alg_region))
1831 return PTR_ERR(alg_region);
1833 pos = sizeof(adsp2_id) / 2;
1834 len = (sizeof(*adsp2_alg) * n_algs) / 2;
1836 adsp2_alg = wm_adsp_read_algs(dsp, n_algs, mem->base + pos, len);
1837 if (IS_ERR(adsp2_alg))
1838 return PTR_ERR(adsp2_alg);
1840 for (i = 0; i < n_algs; i++) {
1842 "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
1843 i, be32_to_cpu(adsp2_alg[i].alg.id),
1844 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
1845 (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
1846 be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
1847 be32_to_cpu(adsp2_alg[i].xm),
1848 be32_to_cpu(adsp2_alg[i].ym),
1849 be32_to_cpu(adsp2_alg[i].zm));
1851 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_XM,
1852 adsp2_alg[i].alg.id,
1854 if (IS_ERR(alg_region)) {
1855 ret = PTR_ERR(alg_region);
1858 if (dsp->fw_ver == 0) {
1859 if (i + 1 < n_algs) {
1860 len = be32_to_cpu(adsp2_alg[i + 1].xm);
1861 len -= be32_to_cpu(adsp2_alg[i].xm);
1863 wm_adsp_create_control(dsp, alg_region, 0,
1866 adsp_warn(dsp, "Missing length info for region XM with ID %x\n",
1867 be32_to_cpu(adsp2_alg[i].alg.id));
1871 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_YM,
1872 adsp2_alg[i].alg.id,
1874 if (IS_ERR(alg_region)) {
1875 ret = PTR_ERR(alg_region);
1878 if (dsp->fw_ver == 0) {
1879 if (i + 1 < n_algs) {
1880 len = be32_to_cpu(adsp2_alg[i + 1].ym);
1881 len -= be32_to_cpu(adsp2_alg[i].ym);
1883 wm_adsp_create_control(dsp, alg_region, 0,
1886 adsp_warn(dsp, "Missing length info for region YM with ID %x\n",
1887 be32_to_cpu(adsp2_alg[i].alg.id));
1891 alg_region = wm_adsp_create_region(dsp, WMFW_ADSP2_ZM,
1892 adsp2_alg[i].alg.id,
1894 if (IS_ERR(alg_region)) {
1895 ret = PTR_ERR(alg_region);
1898 if (dsp->fw_ver == 0) {
1899 if (i + 1 < n_algs) {
1900 len = be32_to_cpu(adsp2_alg[i + 1].zm);
1901 len -= be32_to_cpu(adsp2_alg[i].zm);
1903 wm_adsp_create_control(dsp, alg_region, 0,
1906 adsp_warn(dsp, "Missing length info for region ZM with ID %x\n",
1907 be32_to_cpu(adsp2_alg[i].alg.id));
1917 static int wm_adsp_load_coeff(struct wm_adsp *dsp)
1919 LIST_HEAD(buf_list);
1920 struct regmap *regmap = dsp->regmap;
1921 struct wmfw_coeff_hdr *hdr;
1922 struct wmfw_coeff_item *blk;
1923 const struct firmware *firmware;
1924 const struct wm_adsp_region *mem;
1925 struct wm_adsp_alg_region *alg_region;
1926 const char *region_name;
1927 int ret, pos, blocks, type, offset, reg;
1929 struct wm_adsp_buf *buf;
1931 file = kzalloc(PAGE_SIZE, GFP_KERNEL);
1935 snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num,
1936 wm_adsp_fw[dsp->fw].file);
1937 file[PAGE_SIZE - 1] = '\0';
1939 ret = request_firmware(&firmware, file, dsp->dev);
1941 adsp_warn(dsp, "Failed to request '%s'\n", file);
1947 if (sizeof(*hdr) >= firmware->size) {
1948 adsp_err(dsp, "%s: file too short, %zu bytes\n",
1949 file, firmware->size);
1953 hdr = (void *)&firmware->data[0];
1954 if (memcmp(hdr->magic, "WMDR", 4) != 0) {
1955 adsp_err(dsp, "%s: invalid magic\n", file);
1959 switch (be32_to_cpu(hdr->rev) & 0xff) {
1963 adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
1964 file, be32_to_cpu(hdr->rev) & 0xff);
1969 adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
1970 (le32_to_cpu(hdr->ver) >> 16) & 0xff,
1971 (le32_to_cpu(hdr->ver) >> 8) & 0xff,
1972 le32_to_cpu(hdr->ver) & 0xff);
1974 pos = le32_to_cpu(hdr->len);
1977 while (pos < firmware->size &&
1978 pos - firmware->size > sizeof(*blk)) {
1979 blk = (void *)(&firmware->data[pos]);
1981 type = le16_to_cpu(blk->type);
1982 offset = le16_to_cpu(blk->offset);
1984 adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
1985 file, blocks, le32_to_cpu(blk->id),
1986 (le32_to_cpu(blk->ver) >> 16) & 0xff,
1987 (le32_to_cpu(blk->ver) >> 8) & 0xff,
1988 le32_to_cpu(blk->ver) & 0xff);
1989 adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",
1990 file, blocks, le32_to_cpu(blk->len), offset, type);
1993 region_name = "Unknown";
1995 case (WMFW_NAME_TEXT << 8):
1996 case (WMFW_INFO_TEXT << 8):
1998 case (WMFW_ABSOLUTE << 8):
2000 * Old files may use this for global
2003 if (le32_to_cpu(blk->id) == dsp->fw_id &&
2005 region_name = "global coefficients";
2006 mem = wm_adsp_find_region(dsp, type);
2008 adsp_err(dsp, "No ZM\n");
2011 reg = wm_adsp_region_to_reg(mem, 0);
2014 region_name = "register";
2023 adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",
2024 file, blocks, le32_to_cpu(blk->len),
2025 type, le32_to_cpu(blk->id));
2027 mem = wm_adsp_find_region(dsp, type);
2029 adsp_err(dsp, "No base for region %x\n", type);
2033 alg_region = wm_adsp_find_alg_region(dsp, type,
2034 le32_to_cpu(blk->id));
2036 reg = alg_region->base;
2037 reg = wm_adsp_region_to_reg(mem, reg);
2040 adsp_err(dsp, "No %x for algorithm %x\n",
2041 type, le32_to_cpu(blk->id));
2046 adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",
2047 file, blocks, type, pos);
2052 buf = wm_adsp_buf_alloc(blk->data,
2053 le32_to_cpu(blk->len),
2056 adsp_err(dsp, "Out of memory\n");
2061 adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",
2062 file, blocks, le32_to_cpu(blk->len),
2064 ret = regmap_raw_write_async(regmap, reg, buf->buf,
2065 le32_to_cpu(blk->len));
2068 "%s.%d: Failed to write to %x in %s: %d\n",
2069 file, blocks, reg, region_name, ret);
2073 pos += (le32_to_cpu(blk->len) + sizeof(*blk) + 3) & ~0x03;
2077 ret = regmap_async_complete(regmap);
2079 adsp_err(dsp, "Failed to complete async write: %d\n", ret);
2081 if (pos > firmware->size)
2082 adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
2083 file, blocks, pos - firmware->size);
2085 wm_adsp_debugfs_save_binname(dsp, file);
2088 regmap_async_complete(regmap);
2089 release_firmware(firmware);
2090 wm_adsp_buf_free(&buf_list);
2096 int wm_adsp1_init(struct wm_adsp *dsp)
2098 INIT_LIST_HEAD(&dsp->alg_regions);
2100 mutex_init(&dsp->pwr_lock);
2104 EXPORT_SYMBOL_GPL(wm_adsp1_init);
2106 int wm_adsp1_event(struct snd_soc_dapm_widget *w,
2107 struct snd_kcontrol *kcontrol,
2110 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2111 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2112 struct wm_adsp *dsp = &dsps[w->shift];
2113 struct wm_coeff_ctl *ctl;
2117 dsp->card = codec->component.card;
2119 mutex_lock(&dsp->pwr_lock);
2122 case SND_SOC_DAPM_POST_PMU:
2123 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2124 ADSP1_SYS_ENA, ADSP1_SYS_ENA);
2127 * For simplicity set the DSP clock rate to be the
2128 * SYSCLK rate rather than making it configurable.
2130 if (dsp->sysclk_reg) {
2131 ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
2133 adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
2138 val = (val & dsp->sysclk_mask) >> dsp->sysclk_shift;
2140 ret = regmap_update_bits(dsp->regmap,
2141 dsp->base + ADSP1_CONTROL_31,
2142 ADSP1_CLK_SEL_MASK, val);
2144 adsp_err(dsp, "Failed to set clock rate: %d\n",
2150 ret = wm_adsp_load(dsp);
2154 ret = wm_adsp1_setup_algs(dsp);
2158 ret = wm_adsp_load_coeff(dsp);
2162 /* Initialize caches for enabled and unset controls */
2163 ret = wm_coeff_init_control_caches(dsp);
2167 /* Sync set controls */
2168 ret = wm_coeff_sync_controls(dsp);
2174 /* Start the core running */
2175 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2176 ADSP1_CORE_ENA | ADSP1_START,
2177 ADSP1_CORE_ENA | ADSP1_START);
2179 dsp->running = true;
2182 case SND_SOC_DAPM_PRE_PMD:
2183 dsp->running = false;
2184 dsp->booted = false;
2187 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2188 ADSP1_CORE_ENA | ADSP1_START, 0);
2190 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,
2191 ADSP1_WDMA_BUFFER_LENGTH_MASK, 0);
2193 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2196 list_for_each_entry(ctl, &dsp->ctl_list, list)
2200 wm_adsp_free_alg_regions(dsp);
2207 mutex_unlock(&dsp->pwr_lock);
2212 regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
2215 mutex_unlock(&dsp->pwr_lock);
2219 EXPORT_SYMBOL_GPL(wm_adsp1_event);
2221 static int wm_adsp2_ena(struct wm_adsp *dsp)
2226 ret = regmap_update_bits_async(dsp->regmap, dsp->base + ADSP2_CONTROL,
2227 ADSP2_SYS_ENA, ADSP2_SYS_ENA);
2231 /* Wait for the RAM to start, should be near instantaneous */
2232 for (count = 0; count < 10; ++count) {
2233 ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, &val);
2237 if (val & ADSP2_RAM_RDY)
2243 if (!(val & ADSP2_RAM_RDY)) {
2244 adsp_err(dsp, "Failed to start DSP RAM\n");
2248 adsp_dbg(dsp, "RAM ready after %d polls\n", count);
2253 static void wm_adsp2_boot_work(struct work_struct *work)
2255 struct wm_adsp *dsp = container_of(work,
2260 mutex_lock(&dsp->pwr_lock);
2262 ret = wm_adsp2_ena(dsp);
2266 ret = wm_adsp_load(dsp);
2270 ret = wm_adsp2_setup_algs(dsp);
2274 ret = wm_adsp_load_coeff(dsp);
2278 /* Initialize caches for enabled and unset controls */
2279 ret = wm_coeff_init_control_caches(dsp);
2285 mutex_unlock(&dsp->pwr_lock);
2290 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2291 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2293 mutex_unlock(&dsp->pwr_lock);
2296 static void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq)
2300 ret = regmap_update_bits_async(dsp->regmap,
2301 dsp->base + ADSP2_CLOCKING,
2303 freq << ADSP2_CLK_SEL_SHIFT);
2305 adsp_err(dsp, "Failed to set clock rate: %d\n", ret);
2308 int wm_adsp2_early_event(struct snd_soc_dapm_widget *w,
2309 struct snd_kcontrol *kcontrol, int event,
2312 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2313 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2314 struct wm_adsp *dsp = &dsps[w->shift];
2316 dsp->card = codec->component.card;
2319 case SND_SOC_DAPM_PRE_PMU:
2320 wm_adsp2_set_dspclk(dsp, freq);
2321 queue_work(system_unbound_wq, &dsp->boot_work);
2329 EXPORT_SYMBOL_GPL(wm_adsp2_early_event);
2331 int wm_adsp2_event(struct snd_soc_dapm_widget *w,
2332 struct snd_kcontrol *kcontrol, int event)
2334 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2335 struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2336 struct wm_adsp *dsp = &dsps[w->shift];
2337 struct wm_coeff_ctl *ctl;
2341 case SND_SOC_DAPM_POST_PMU:
2342 flush_work(&dsp->boot_work);
2347 /* Sync set controls */
2348 ret = wm_coeff_sync_controls(dsp);
2352 ret = regmap_update_bits(dsp->regmap,
2353 dsp->base + ADSP2_CONTROL,
2354 ADSP2_CORE_ENA | ADSP2_START,
2355 ADSP2_CORE_ENA | ADSP2_START);
2359 dsp->running = true;
2361 mutex_lock(&dsp->pwr_lock);
2363 if (wm_adsp_fw[dsp->fw].num_caps != 0)
2364 ret = wm_adsp_buffer_init(dsp);
2366 mutex_unlock(&dsp->pwr_lock);
2370 case SND_SOC_DAPM_PRE_PMD:
2371 /* Log firmware state, it can be useful for analysis */
2372 wm_adsp2_show_fw_status(dsp);
2374 mutex_lock(&dsp->pwr_lock);
2376 wm_adsp_debugfs_clear(dsp);
2379 dsp->fw_id_version = 0;
2381 dsp->running = false;
2382 dsp->booted = false;
2384 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2385 ADSP2_CORE_ENA | ADSP2_START, 0);
2387 /* Make sure DMAs are quiesced */
2388 regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);
2389 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);
2390 regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);
2392 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2395 list_for_each_entry(ctl, &dsp->ctl_list, list)
2398 wm_adsp_free_alg_regions(dsp);
2400 if (wm_adsp_fw[dsp->fw].num_caps != 0)
2401 wm_adsp_buffer_free(dsp);
2403 mutex_unlock(&dsp->pwr_lock);
2405 adsp_dbg(dsp, "Shutdown complete\n");
2414 regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2415 ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
2418 EXPORT_SYMBOL_GPL(wm_adsp2_event);
2420 int wm_adsp2_codec_probe(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2422 wm_adsp2_init_debugfs(dsp, codec);
2424 return snd_soc_add_codec_controls(codec,
2425 &wm_adsp_fw_controls[dsp->num - 1],
2428 EXPORT_SYMBOL_GPL(wm_adsp2_codec_probe);
2430 int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec)
2432 wm_adsp2_cleanup_debugfs(dsp);
2436 EXPORT_SYMBOL_GPL(wm_adsp2_codec_remove);
2438 int wm_adsp2_init(struct wm_adsp *dsp)
2443 * Disable the DSP memory by default when in reset for a small
2446 ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
2449 adsp_err(dsp, "Failed to clear memory retention: %d\n", ret);
2453 INIT_LIST_HEAD(&dsp->alg_regions);
2454 INIT_LIST_HEAD(&dsp->ctl_list);
2455 INIT_WORK(&dsp->boot_work, wm_adsp2_boot_work);
2457 mutex_init(&dsp->pwr_lock);
2461 EXPORT_SYMBOL_GPL(wm_adsp2_init);
2463 void wm_adsp2_remove(struct wm_adsp *dsp)
2465 struct wm_coeff_ctl *ctl;
2467 while (!list_empty(&dsp->ctl_list)) {
2468 ctl = list_first_entry(&dsp->ctl_list, struct wm_coeff_ctl,
2470 list_del(&ctl->list);
2471 wm_adsp_free_ctl_blk(ctl);
2474 EXPORT_SYMBOL_GPL(wm_adsp2_remove);
2476 static inline int wm_adsp_compr_attached(struct wm_adsp_compr *compr)
2478 return compr->buf != NULL;
2481 static int wm_adsp_compr_attach(struct wm_adsp_compr *compr)
2484 * Note this will be more complex once each DSP can support multiple
2487 if (!compr->dsp->buffer)
2490 compr->buf = compr->dsp->buffer;
2491 compr->buf->compr = compr;
2496 static void wm_adsp_compr_detach(struct wm_adsp_compr *compr)
2501 /* Wake the poll so it can see buffer is no longer attached */
2503 snd_compr_fragment_elapsed(compr->stream);
2505 if (wm_adsp_compr_attached(compr)) {
2506 compr->buf->compr = NULL;
2511 int wm_adsp_compr_open(struct wm_adsp *dsp, struct snd_compr_stream *stream)
2513 struct wm_adsp_compr *compr;
2516 mutex_lock(&dsp->pwr_lock);
2518 if (wm_adsp_fw[dsp->fw].num_caps == 0) {
2519 adsp_err(dsp, "Firmware does not support compressed API\n");
2524 if (wm_adsp_fw[dsp->fw].compr_direction != stream->direction) {
2525 adsp_err(dsp, "Firmware does not support stream direction\n");
2531 /* It is expect this limitation will be removed in future */
2532 adsp_err(dsp, "Only a single stream supported per DSP\n");
2537 compr = kzalloc(sizeof(*compr), GFP_KERNEL);
2544 compr->stream = stream;
2548 stream->runtime->private_data = compr;
2551 mutex_unlock(&dsp->pwr_lock);
2555 EXPORT_SYMBOL_GPL(wm_adsp_compr_open);
2557 int wm_adsp_compr_free(struct snd_compr_stream *stream)
2559 struct wm_adsp_compr *compr = stream->runtime->private_data;
2560 struct wm_adsp *dsp = compr->dsp;
2562 mutex_lock(&dsp->pwr_lock);
2564 wm_adsp_compr_detach(compr);
2567 kfree(compr->raw_buf);
2570 mutex_unlock(&dsp->pwr_lock);
2574 EXPORT_SYMBOL_GPL(wm_adsp_compr_free);
2576 static int wm_adsp_compr_check_params(struct snd_compr_stream *stream,
2577 struct snd_compr_params *params)
2579 struct wm_adsp_compr *compr = stream->runtime->private_data;
2580 struct wm_adsp *dsp = compr->dsp;
2581 const struct wm_adsp_fw_caps *caps;
2582 const struct snd_codec_desc *desc;
2585 if (params->buffer.fragment_size < WM_ADSP_MIN_FRAGMENT_SIZE ||
2586 params->buffer.fragment_size > WM_ADSP_MAX_FRAGMENT_SIZE ||
2587 params->buffer.fragments < WM_ADSP_MIN_FRAGMENTS ||
2588 params->buffer.fragments > WM_ADSP_MAX_FRAGMENTS ||
2589 params->buffer.fragment_size % WM_ADSP_DATA_WORD_SIZE) {
2590 adsp_err(dsp, "Invalid buffer fragsize=%d fragments=%d\n",
2591 params->buffer.fragment_size,
2592 params->buffer.fragments);
2597 for (i = 0; i < wm_adsp_fw[dsp->fw].num_caps; i++) {
2598 caps = &wm_adsp_fw[dsp->fw].caps[i];
2601 if (caps->id != params->codec.id)
2604 if (stream->direction == SND_COMPRESS_PLAYBACK) {
2605 if (desc->max_ch < params->codec.ch_out)
2608 if (desc->max_ch < params->codec.ch_in)
2612 if (!(desc->formats & (1 << params->codec.format)))
2615 for (j = 0; j < desc->num_sample_rates; ++j)
2616 if (desc->sample_rates[j] == params->codec.sample_rate)
2620 adsp_err(dsp, "Invalid params id=%u ch=%u,%u rate=%u fmt=%u\n",
2621 params->codec.id, params->codec.ch_in, params->codec.ch_out,
2622 params->codec.sample_rate, params->codec.format);
2626 static inline unsigned int wm_adsp_compr_frag_words(struct wm_adsp_compr *compr)
2628 return compr->size.fragment_size / WM_ADSP_DATA_WORD_SIZE;
2631 int wm_adsp_compr_set_params(struct snd_compr_stream *stream,
2632 struct snd_compr_params *params)
2634 struct wm_adsp_compr *compr = stream->runtime->private_data;
2638 ret = wm_adsp_compr_check_params(stream, params);
2642 compr->size = params->buffer;
2644 adsp_dbg(compr->dsp, "fragment_size=%d fragments=%d\n",
2645 compr->size.fragment_size, compr->size.fragments);
2647 size = wm_adsp_compr_frag_words(compr) * sizeof(*compr->raw_buf);
2648 compr->raw_buf = kmalloc(size, GFP_DMA | GFP_KERNEL);
2649 if (!compr->raw_buf)
2652 compr->sample_rate = params->codec.sample_rate;
2656 EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params);
2658 int wm_adsp_compr_get_caps(struct snd_compr_stream *stream,
2659 struct snd_compr_caps *caps)
2661 struct wm_adsp_compr *compr = stream->runtime->private_data;
2662 int fw = compr->dsp->fw;
2665 if (wm_adsp_fw[fw].caps) {
2666 for (i = 0; i < wm_adsp_fw[fw].num_caps; i++)
2667 caps->codecs[i] = wm_adsp_fw[fw].caps[i].id;
2669 caps->num_codecs = i;
2670 caps->direction = wm_adsp_fw[fw].compr_direction;
2672 caps->min_fragment_size = WM_ADSP_MIN_FRAGMENT_SIZE;
2673 caps->max_fragment_size = WM_ADSP_MAX_FRAGMENT_SIZE;
2674 caps->min_fragments = WM_ADSP_MIN_FRAGMENTS;
2675 caps->max_fragments = WM_ADSP_MAX_FRAGMENTS;
2680 EXPORT_SYMBOL_GPL(wm_adsp_compr_get_caps);
2682 static int wm_adsp_read_data_block(struct wm_adsp *dsp, int mem_type,
2683 unsigned int mem_addr,
2684 unsigned int num_words, u32 *data)
2686 struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
2687 unsigned int i, reg;
2693 reg = wm_adsp_region_to_reg(mem, mem_addr);
2695 ret = regmap_raw_read(dsp->regmap, reg, data,
2696 sizeof(*data) * num_words);
2700 for (i = 0; i < num_words; ++i)
2701 data[i] = be32_to_cpu(data[i]) & 0x00ffffffu;
2706 static inline int wm_adsp_read_data_word(struct wm_adsp *dsp, int mem_type,
2707 unsigned int mem_addr, u32 *data)
2709 return wm_adsp_read_data_block(dsp, mem_type, mem_addr, 1, data);
2712 static int wm_adsp_write_data_word(struct wm_adsp *dsp, int mem_type,
2713 unsigned int mem_addr, u32 data)
2715 struct wm_adsp_region const *mem = wm_adsp_find_region(dsp, mem_type);
2721 reg = wm_adsp_region_to_reg(mem, mem_addr);
2723 data = cpu_to_be32(data & 0x00ffffffu);
2725 return regmap_raw_write(dsp->regmap, reg, &data, sizeof(data));
2728 static inline int wm_adsp_buffer_read(struct wm_adsp_compr_buf *buf,
2729 unsigned int field_offset, u32 *data)
2731 return wm_adsp_read_data_word(buf->dsp, WMFW_ADSP2_XM,
2732 buf->host_buf_ptr + field_offset, data);
2735 static inline int wm_adsp_buffer_write(struct wm_adsp_compr_buf *buf,
2736 unsigned int field_offset, u32 data)
2738 return wm_adsp_write_data_word(buf->dsp, WMFW_ADSP2_XM,
2739 buf->host_buf_ptr + field_offset, data);
2742 static int wm_adsp_buffer_locate(struct wm_adsp_compr_buf *buf)
2744 struct wm_adsp_alg_region *alg_region;
2745 struct wm_adsp *dsp = buf->dsp;
2746 u32 xmalg, addr, magic;
2749 alg_region = wm_adsp_find_alg_region(dsp, WMFW_ADSP2_XM, dsp->fw_id);
2750 xmalg = sizeof(struct wm_adsp_system_config_xm_hdr) / sizeof(__be32);
2752 addr = alg_region->base + xmalg + ALG_XM_FIELD(magic);
2753 ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr, &magic);
2757 if (magic != WM_ADSP_ALG_XM_STRUCT_MAGIC)
2760 addr = alg_region->base + xmalg + ALG_XM_FIELD(host_buf_ptr);
2761 for (i = 0; i < 5; ++i) {
2762 ret = wm_adsp_read_data_word(dsp, WMFW_ADSP2_XM, addr,
2763 &buf->host_buf_ptr);
2767 if (buf->host_buf_ptr)
2770 usleep_range(1000, 2000);
2773 if (!buf->host_buf_ptr)
2776 adsp_dbg(dsp, "host_buf_ptr=%x\n", buf->host_buf_ptr);
2781 static int wm_adsp_buffer_populate(struct wm_adsp_compr_buf *buf)
2783 const struct wm_adsp_fw_caps *caps = wm_adsp_fw[buf->dsp->fw].caps;
2784 struct wm_adsp_buffer_region *region;
2788 for (i = 0; i < caps->num_regions; ++i) {
2789 region = &buf->regions[i];
2791 region->offset = offset;
2792 region->mem_type = caps->region_defs[i].mem_type;
2794 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].base_offset,
2795 ®ion->base_addr);
2799 ret = wm_adsp_buffer_read(buf, caps->region_defs[i].size_offset,
2804 region->cumulative_size = offset;
2807 "region=%d type=%d base=%04x off=%04x size=%04x\n",
2808 i, region->mem_type, region->base_addr,
2809 region->offset, region->cumulative_size);
2815 static int wm_adsp_buffer_init(struct wm_adsp *dsp)
2817 struct wm_adsp_compr_buf *buf;
2820 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
2825 buf->read_index = -1;
2826 buf->irq_count = 0xFFFFFFFF;
2828 ret = wm_adsp_buffer_locate(buf);
2830 adsp_err(dsp, "Failed to acquire host buffer: %d\n", ret);
2834 buf->regions = kcalloc(wm_adsp_fw[dsp->fw].caps->num_regions,
2835 sizeof(*buf->regions), GFP_KERNEL);
2836 if (!buf->regions) {
2841 ret = wm_adsp_buffer_populate(buf);
2843 adsp_err(dsp, "Failed to populate host buffer: %d\n", ret);
2852 kfree(buf->regions);
2858 static int wm_adsp_buffer_free(struct wm_adsp *dsp)
2861 wm_adsp_compr_detach(dsp->buffer->compr);
2863 kfree(dsp->buffer->regions);
2872 int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd)
2874 struct wm_adsp_compr *compr = stream->runtime->private_data;
2875 struct wm_adsp *dsp = compr->dsp;
2878 adsp_dbg(dsp, "Trigger: %d\n", cmd);
2880 mutex_lock(&dsp->pwr_lock);
2883 case SNDRV_PCM_TRIGGER_START:
2884 if (wm_adsp_compr_attached(compr))
2887 ret = wm_adsp_compr_attach(compr);
2889 adsp_err(dsp, "Failed to link buffer and stream: %d\n",
2894 /* Trigger the IRQ at one fragment of data */
2895 ret = wm_adsp_buffer_write(compr->buf,
2896 HOST_BUFFER_FIELD(high_water_mark),
2897 wm_adsp_compr_frag_words(compr));
2899 adsp_err(dsp, "Failed to set high water mark: %d\n",
2904 case SNDRV_PCM_TRIGGER_STOP:
2911 mutex_unlock(&dsp->pwr_lock);
2915 EXPORT_SYMBOL_GPL(wm_adsp_compr_trigger);
2917 static inline int wm_adsp_buffer_size(struct wm_adsp_compr_buf *buf)
2919 int last_region = wm_adsp_fw[buf->dsp->fw].caps->num_regions - 1;
2921 return buf->regions[last_region].cumulative_size;
2924 static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf)
2926 u32 next_read_index, next_write_index;
2927 int write_index, read_index, avail;
2930 /* Only sync read index if we haven't already read a valid index */
2931 if (buf->read_index < 0) {
2932 ret = wm_adsp_buffer_read(buf,
2933 HOST_BUFFER_FIELD(next_read_index),
2938 read_index = sign_extend32(next_read_index, 23);
2940 if (read_index < 0) {
2941 adsp_dbg(buf->dsp, "Avail check on unstarted stream\n");
2945 buf->read_index = read_index;
2948 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(next_write_index),
2953 write_index = sign_extend32(next_write_index, 23);
2955 avail = write_index - buf->read_index;
2957 avail += wm_adsp_buffer_size(buf);
2959 adsp_dbg(buf->dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n",
2960 buf->read_index, write_index, avail * WM_ADSP_DATA_WORD_SIZE);
2967 static int wm_adsp_buffer_get_error(struct wm_adsp_compr_buf *buf)
2971 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error);
2973 adsp_err(buf->dsp, "Failed to check buffer error: %d\n", ret);
2976 if (buf->error != 0) {
2977 adsp_err(buf->dsp, "Buffer error occurred: %d\n", buf->error);
2984 int wm_adsp_compr_handle_irq(struct wm_adsp *dsp)
2986 struct wm_adsp_compr_buf *buf;
2987 struct wm_adsp_compr *compr;
2990 mutex_lock(&dsp->pwr_lock);
3000 adsp_dbg(dsp, "Handling buffer IRQ\n");
3002 ret = wm_adsp_buffer_get_error(buf);
3004 goto out_notify; /* Wake poll to report error */
3006 ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count),
3009 adsp_err(dsp, "Failed to get irq_count: %d\n", ret);
3013 ret = wm_adsp_buffer_update_avail(buf);
3015 adsp_err(dsp, "Error reading avail: %d\n", ret);
3019 if (wm_adsp_fw[dsp->fw].voice_trigger && buf->irq_count == 2)
3020 ret = WM_ADSP_COMPR_VOICE_TRIGGER;
3023 if (compr && compr->stream)
3024 snd_compr_fragment_elapsed(compr->stream);
3027 mutex_unlock(&dsp->pwr_lock);
3031 EXPORT_SYMBOL_GPL(wm_adsp_compr_handle_irq);
3033 static int wm_adsp_buffer_reenable_irq(struct wm_adsp_compr_buf *buf)
3035 if (buf->irq_count & 0x01)
3038 adsp_dbg(buf->dsp, "Enable IRQ(0x%x) for next fragment\n",
3041 buf->irq_count |= 0x01;
3043 return wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(irq_ack),
3047 int wm_adsp_compr_pointer(struct snd_compr_stream *stream,
3048 struct snd_compr_tstamp *tstamp)
3050 struct wm_adsp_compr *compr = stream->runtime->private_data;
3051 struct wm_adsp *dsp = compr->dsp;
3052 struct wm_adsp_compr_buf *buf;
3055 adsp_dbg(dsp, "Pointer request\n");
3057 mutex_lock(&dsp->pwr_lock);
3061 if (!compr->buf || compr->buf->error) {
3062 snd_compr_stop_error(stream, SNDRV_PCM_STATE_XRUN);
3067 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
3068 ret = wm_adsp_buffer_update_avail(buf);
3070 adsp_err(dsp, "Error reading avail: %d\n", ret);
3075 * If we really have less than 1 fragment available tell the
3076 * DSP to inform us once a whole fragment is available.
3078 if (buf->avail < wm_adsp_compr_frag_words(compr)) {
3079 ret = wm_adsp_buffer_get_error(buf);
3081 if (compr->buf->error)
3082 snd_compr_stop_error(stream,
3083 SNDRV_PCM_STATE_XRUN);
3087 ret = wm_adsp_buffer_reenable_irq(buf);
3090 "Failed to re-enable buffer IRQ: %d\n",
3097 tstamp->copied_total = compr->copied_total;
3098 tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE;
3099 tstamp->sampling_rate = compr->sample_rate;
3102 mutex_unlock(&dsp->pwr_lock);
3106 EXPORT_SYMBOL_GPL(wm_adsp_compr_pointer);
3108 static int wm_adsp_buffer_capture_block(struct wm_adsp_compr *compr, int target)
3110 struct wm_adsp_compr_buf *buf = compr->buf;
3111 u8 *pack_in = (u8 *)compr->raw_buf;
3112 u8 *pack_out = (u8 *)compr->raw_buf;
3113 unsigned int adsp_addr;
3114 int mem_type, nwords, max_read;
3117 /* Calculate read parameters */
3118 for (i = 0; i < wm_adsp_fw[buf->dsp->fw].caps->num_regions; ++i)
3119 if (buf->read_index < buf->regions[i].cumulative_size)
3122 if (i == wm_adsp_fw[buf->dsp->fw].caps->num_regions)
3125 mem_type = buf->regions[i].mem_type;
3126 adsp_addr = buf->regions[i].base_addr +
3127 (buf->read_index - buf->regions[i].offset);
3129 max_read = wm_adsp_compr_frag_words(compr);
3130 nwords = buf->regions[i].cumulative_size - buf->read_index;
3132 if (nwords > target)
3134 if (nwords > buf->avail)
3135 nwords = buf->avail;
3136 if (nwords > max_read)
3141 /* Read data from DSP */
3142 ret = wm_adsp_read_data_block(buf->dsp, mem_type, adsp_addr,
3143 nwords, compr->raw_buf);
3147 /* Remove the padding bytes from the data read from the DSP */
3148 for (i = 0; i < nwords; i++) {
3149 for (j = 0; j < WM_ADSP_DATA_WORD_SIZE; j++)
3150 *pack_out++ = *pack_in++;
3152 pack_in += sizeof(*(compr->raw_buf)) - WM_ADSP_DATA_WORD_SIZE;
3155 /* update read index to account for words read */
3156 buf->read_index += nwords;
3157 if (buf->read_index == wm_adsp_buffer_size(buf))
3158 buf->read_index = 0;
3160 ret = wm_adsp_buffer_write(buf, HOST_BUFFER_FIELD(next_read_index),
3165 /* update avail to account for words read */
3166 buf->avail -= nwords;
3171 static int wm_adsp_compr_read(struct wm_adsp_compr *compr,
3172 char __user *buf, size_t count)
3174 struct wm_adsp *dsp = compr->dsp;
3178 adsp_dbg(dsp, "Requested read of %zu bytes\n", count);
3180 if (!compr->buf || compr->buf->error) {
3181 snd_compr_stop_error(compr->stream, SNDRV_PCM_STATE_XRUN);
3185 count /= WM_ADSP_DATA_WORD_SIZE;
3188 nwords = wm_adsp_buffer_capture_block(compr, count);
3190 adsp_err(dsp, "Failed to capture block: %d\n", nwords);
3194 nbytes = nwords * WM_ADSP_DATA_WORD_SIZE;
3196 adsp_dbg(dsp, "Read %d bytes\n", nbytes);
3198 if (copy_to_user(buf + ntotal, compr->raw_buf, nbytes)) {
3199 adsp_err(dsp, "Failed to copy data to user: %d, %d\n",
3206 } while (nwords > 0 && count > 0);
3208 compr->copied_total += ntotal;
3213 int wm_adsp_compr_copy(struct snd_compr_stream *stream, char __user *buf,
3216 struct wm_adsp_compr *compr = stream->runtime->private_data;
3217 struct wm_adsp *dsp = compr->dsp;
3220 mutex_lock(&dsp->pwr_lock);
3222 if (stream->direction == SND_COMPRESS_CAPTURE)
3223 ret = wm_adsp_compr_read(compr, buf, count);
3227 mutex_unlock(&dsp->pwr_lock);
3231 EXPORT_SYMBOL_GPL(wm_adsp_compr_copy);
3233 MODULE_LICENSE("GPL v2");