tools/testing/nvdimm/test/nfit.c

   1 /*
   2  * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of version 2 of the GNU General Public License as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  */
  13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14 #include <linux/platform_device.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/libnvdimm.h>
  17 #include <linux/vmalloc.h>
  18 #include <linux/device.h>
  19 #include <linux/module.h>
  20 #include <linux/mutex.h>
  21 #include <linux/ndctl.h>
  22 #include <linux/sizes.h>
  23 #include <linux/list.h>
  24 #include <linux/slab.h>
  25 #include <nfit.h>
  26 #include <nd.h>
  27 #include "nfit_test.h"
  28
  29 /*
  30  * Generate an NFIT table to describe the following topology:
  31  *
  32  * BUS0: Interleaved PMEM regions, and aliasing with BLK regions
  33  *
  34  *                     (a)                       (b)            DIMM   BLK-REGION
  35  *           +----------+--------------+----------+---------+
  36  * +------+  |  blk2.0  |     pm0.0    |  blk2.1  |  pm1.0  |    0      region2
  37  * | imc0 +--+- - - - - region0 - - - -+----------+         +
  38  * +--+---+  |  blk3.0  |     pm0.0    |  blk3.1  |  pm1.0  |    1      region3
  39  *    |      +----------+--------------v----------v         v
  40  * +--+---+                            |                    |
  41  * | cpu0 |                                    region1
  42  * +--+---+                            |                    |
  43  *    |      +-------------------------^----------^         ^
  44  * +--+---+  |                 blk4.0             |  pm1.0  |    2      region4
  45  * | imc1 +--+-------------------------+----------+         +
  46  * +------+  |                 blk5.0             |  pm1.0  |    3      region5
  47  *           +-------------------------+----------+-+-------+
  48  *
  49  * +--+---+
  50  * | cpu1 |
  51  * +--+---+                   (Hotplug DIMM)
  52  *    |      +----------------------------------------------+
  53  * +--+---+  |                 blk6.0/pm7.0                 |    4      region6/7
  54  * | imc0 +--+----------------------------------------------+
  55  * +------+
  56  *
  57  *
  58  * *) In this layout we have four dimms and two memory controllers in one
  59  *    socket.  Each unique interface (BLK or PMEM) to DPA space
  60  *    is identified by a region device with a dynamically assigned id.
  61  *
  62  * *) The first portion of dimm0 and dimm1 are interleaved as REGION0.
  63  *    A single PMEM namespace "pm0.0" is created using half of the
  64  *    REGION0 SPA-range.  REGION0 spans dimm0 and dimm1.  PMEM namespace
  65  *    allocate from from the bottom of a region.  The unallocated
  66  *    portion of REGION0 aliases with REGION2 and REGION3.  That
  67  *    unallacted capacity is reclaimed as BLK namespaces ("blk2.0" and
  68  *    "blk3.0") starting at the base of each DIMM to offset (a) in those
  69  *    DIMMs.  "pm0.0", "blk2.0" and "blk3.0" are free-form readable
  70  *    names that can be assigned to a namespace.
  71  *
  72  * *) In the last portion of dimm0 and dimm1 we have an interleaved
  73  *    SPA range, REGION1, that spans those two dimms as well as dimm2
  74  *    and dimm3.  Some of REGION1 allocated to a PMEM namespace named
  75  *    "pm1.0" the rest is reclaimed in 4 BLK namespaces (for each
  76  *    dimm in the interleave set), "blk2.1", "blk3.1", "blk4.0", and
  77  *    "blk5.0".
  78  *
  79  * *) The portion of dimm2 and dimm3 that do not participate in the
  80  *    REGION1 interleaved SPA range (i.e. the DPA address below offset
  81  *    (b) are also included in the "blk4.0" and "blk5.0" namespaces.
  82  *    Note, that BLK namespaces need not be contiguous in DPA-space, and
  83  *    can consume aliased capacity from multiple interleave sets.
  84  *
  85  * BUS1: Legacy NVDIMM (single contiguous range)
  86  *
  87  *  region2
  88  * +---------------------+
  89  * |---------------------|
  90  * ||       pm2.0       ||
  91  * |---------------------|
  92  * +---------------------+
  93  *
  94  * *) A NFIT-table may describe a simple system-physical-address range
  95  *    with no BLK aliasing.  This type of region may optionally
  96  *    reference an NVDIMM.
  97  */
  98 enum {
  99         NUM_PM  = 3,
 100         NUM_DCR = 5,
 101         NUM_BDW = NUM_DCR,
 102         NUM_SPA = NUM_PM + NUM_DCR + NUM_BDW,
 103         NUM_MEM = NUM_DCR + NUM_BDW + 2 /* spa0 iset */ + 4 /* spa1 iset */,
 104         DIMM_SIZE = SZ_32M,
 105         LABEL_SIZE = SZ_128K,
 106         SPA0_SIZE = DIMM_SIZE,
 107         SPA1_SIZE = DIMM_SIZE*2,
 108         SPA2_SIZE = DIMM_SIZE,
 109         BDW_SIZE = 64 << 8,
 110         DCR_SIZE = 12,
 111         NUM_NFITS = 2, /* permit testing multiple NFITs per system */
 112 };
 113
 114 struct nfit_test_dcr {
 115         __le64 bdw_addr;
 116         __le32 bdw_status;
 117         __u8 aperature[BDW_SIZE];
 118 };
 119
 120 #define NFIT_DIMM_HANDLE(node, socket, imc, chan, dimm) \
 121         (((node & 0xfff) << 16) | ((socket & 0xf) << 12) \
 122          | ((imc & 0xf) << 8) | ((chan & 0xf) << 4) | (dimm & 0xf))
 123
 124 static u32 handle[NUM_DCR] = {
 125         [0] = NFIT_DIMM_HANDLE(0, 0, 0, 0, 0),
 126         [1] = NFIT_DIMM_HANDLE(0, 0, 0, 0, 1),
 127         [2] = NFIT_DIMM_HANDLE(0, 0, 1, 0, 0),
 128         [3] = NFIT_DIMM_HANDLE(0, 0, 1, 0, 1),
 129         [4] = NFIT_DIMM_HANDLE(0, 1, 0, 0, 0),
 130 };
 131
 132 struct nfit_test {
 133         struct acpi_nfit_desc acpi_desc;
 134         struct platform_device pdev;
 135         struct list_head resources;
 136         void *nfit_buf;
 137         dma_addr_t nfit_dma;
 138         size_t nfit_size;
 139         int num_dcr;
 140         int num_pm;
 141         void **dimm;
 142         dma_addr_t *dimm_dma;
 143         void **flush;
 144         dma_addr_t *flush_dma;
 145         void **label;
 146         dma_addr_t *label_dma;
 147         void **spa_set;
 148         dma_addr_t *spa_set_dma;
 149         struct nfit_test_dcr **dcr;
 150         dma_addr_t *dcr_dma;
 151         int (*alloc)(struct nfit_test *t);
 152         void (*setup)(struct nfit_test *t);
 153         int setup_hotplug;
 154 };
 155
 156 static struct nfit_test *to_nfit_test(struct device *dev)
 157 {
 158         struct platform_device *pdev = to_platform_device(dev);
 159
 160         return container_of(pdev, struct nfit_test, pdev);
 161 }
 162
 163 static int nfit_test_cmd_get_config_size(struct nd_cmd_get_config_size *nd_cmd,
 164                 unsigned int buf_len)
 165 {
 166         if (buf_len < sizeof(*nd_cmd))
 167                 return -EINVAL;
 168
 169         nd_cmd->status = 0;
 170         nd_cmd->config_size = LABEL_SIZE;
 171         nd_cmd->max_xfer = SZ_4K;
 172
 173         return 0;
 174 }
 175
 176 static int nfit_test_cmd_get_config_data(struct nd_cmd_get_config_data_hdr
 177                 *nd_cmd, unsigned int buf_len, void *label)
 178 {
 179         unsigned int len, offset = nd_cmd->in_offset;
 180         int rc;
 181
 182         if (buf_len < sizeof(*nd_cmd))
 183                 return -EINVAL;
 184         if (offset >= LABEL_SIZE)
 185                 return -EINVAL;
 186         if (nd_cmd->in_length + sizeof(*nd_cmd) > buf_len)
 187                 return -EINVAL;
 188
 189         nd_cmd->status = 0;
 190         len = min(nd_cmd->in_length, LABEL_SIZE - offset);
 191         memcpy(nd_cmd->out_buf, label + offset, len);
 192         rc = buf_len - sizeof(*nd_cmd) - len;
 193
 194         return rc;
 195 }
 196
 197 static int nfit_test_cmd_set_config_data(struct nd_cmd_set_config_hdr *nd_cmd,
 198                 unsigned int buf_len, void *label)
 199 {
 200         unsigned int len, offset = nd_cmd->in_offset;
 201         u32 *status;
 202         int rc;
 203
 204         if (buf_len < sizeof(*nd_cmd))
 205                 return -EINVAL;
 206         if (offset >= LABEL_SIZE)
 207                 return -EINVAL;
 208         if (nd_cmd->in_length + sizeof(*nd_cmd) + 4 > buf_len)
 209                 return -EINVAL;
 210
 211         status = (void *)nd_cmd + nd_cmd->in_length + sizeof(*nd_cmd);
 212         *status = 0;
 213         len = min(nd_cmd->in_length, LABEL_SIZE - offset);
 214         memcpy(label + offset, nd_cmd->in_buf, len);
 215         rc = buf_len - sizeof(*nd_cmd) - (len + 4);
 216
 217         return rc;
 218 }
 219
 220 #define NFIT_TEST_ARS_RECORDS 4
 221
 222 static int nfit_test_cmd_ars_cap(struct nd_cmd_ars_cap *nd_cmd,
 223                 unsigned int buf_len)
 224 {
 225         if (buf_len < sizeof(*nd_cmd))
 226                 return -EINVAL;
 227
 228         nd_cmd->max_ars_out = sizeof(struct nd_cmd_ars_status)
 229                 + NFIT_TEST_ARS_RECORDS * sizeof(struct nd_ars_record);
 230         nd_cmd->status = (ND_ARS_PERSISTENT | ND_ARS_VOLATILE) << 16;
 231
 232         return 0;
 233 }
 234
 235 static int nfit_test_cmd_ars_start(struct nd_cmd_ars_start *nd_cmd,
 236                 unsigned int buf_len)
 237 {
 238         if (buf_len < sizeof(*nd_cmd))
 239                 return -EINVAL;
 240
 241         nd_cmd->status = 0;
 242
 243         return 0;
 244 }
 245
 246 static int nfit_test_cmd_ars_status(struct nd_cmd_ars_status *nd_cmd,
 247                 unsigned int buf_len)
 248 {
 249         if (buf_len < sizeof(*nd_cmd))
 250                 return -EINVAL;
 251
 252         nd_cmd->out_length = sizeof(struct nd_cmd_ars_status);
 253         /* TODO: emit error records */
 254         nd_cmd->num_records = 0;
 255         nd_cmd->address = 0;
 256         nd_cmd->length = -1ULL;
 257         nd_cmd->status = 0;
 258
 259         return 0;
 260 }
 261
 262 static int nfit_test_ctl(struct nvdimm_bus_descriptor *nd_desc,
 263                 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
 264                 unsigned int buf_len)
 265 {
 266         struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
 267         struct nfit_test *t = container_of(acpi_desc, typeof(*t), acpi_desc);
 268         int i, rc = 0;
 269
 270         if (nvdimm) {
 271                 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
 272
 273                 if (!nfit_mem || !test_bit(cmd, &nfit_mem->dsm_mask))
 274                         return -ENOTTY;
 275
 276                 /* lookup label space for the given dimm */
 277                 for (i = 0; i < ARRAY_SIZE(handle); i++)
 278                         if (__to_nfit_memdev(nfit_mem)->device_handle ==
 279                                         handle[i])
 280                                 break;
 281                 if (i >= ARRAY_SIZE(handle))
 282                         return -ENXIO;
 283
 284                 switch (cmd) {
 285                 case ND_CMD_GET_CONFIG_SIZE:
 286                         rc = nfit_test_cmd_get_config_size(buf, buf_len);
 287                         break;
 288                 case ND_CMD_GET_CONFIG_DATA:
 289                         rc = nfit_test_cmd_get_config_data(buf, buf_len,
 290                                 t->label[i]);
 291                         break;
 292                 case ND_CMD_SET_CONFIG_DATA:
 293                         rc = nfit_test_cmd_set_config_data(buf, buf_len,
 294                                 t->label[i]);
 295                         break;
 296                 default:
 297                         return -ENOTTY;
 298                 }
 299         } else {
 300                 if (!nd_desc || !test_bit(cmd, &nd_desc->dsm_mask))
 301                         return -ENOTTY;
 302
 303                 switch (cmd) {
 304                 case ND_CMD_ARS_CAP:
 305                         rc = nfit_test_cmd_ars_cap(buf, buf_len);
 306                         break;
 307                 case ND_CMD_ARS_START:
 308                         rc = nfit_test_cmd_ars_start(buf, buf_len);
 309                         break;
 310                 case ND_CMD_ARS_STATUS:
 311                         rc = nfit_test_cmd_ars_status(buf, buf_len);
 312                         break;
 313                 default:
 314                         return -ENOTTY;
 315                 }
 316         }
 317
 318         return rc;
 319 }
 320
 321 static DEFINE_SPINLOCK(nfit_test_lock);
 322 static struct nfit_test *instances[NUM_NFITS];
 323
 324 static void release_nfit_res(void *data)
 325 {
 326         struct nfit_test_resource *nfit_res = data;
 327         struct resource *res = nfit_res->res;
 328
 329         spin_lock(&nfit_test_lock);
 330         list_del(&nfit_res->list);
 331         spin_unlock(&nfit_test_lock);
 332
 333         if (is_vmalloc_addr(nfit_res->buf))
 334                 vfree(nfit_res->buf);
 335         else
 336                 dma_free_coherent(nfit_res->dev, resource_size(res),
 337                                 nfit_res->buf, res->start);
 338         kfree(res);
 339         kfree(nfit_res);
 340 }
 341
 342 static void *__test_alloc(struct nfit_test *t, size_t size, dma_addr_t *dma,
 343                 void *buf)
 344 {
 345         struct device *dev = &t->pdev.dev;
 346         struct resource *res = kzalloc(sizeof(*res) * 2, GFP_KERNEL);
 347         struct nfit_test_resource *nfit_res = kzalloc(sizeof(*nfit_res),
 348                         GFP_KERNEL);
 349         int rc;
 350
 351         if (!res || !buf || !nfit_res)
 352                 goto err;
 353         rc = devm_add_action(dev, release_nfit_res, nfit_res);
 354         if (rc)
 355                 goto err;
 356         INIT_LIST_HEAD(&nfit_res->list);
 357         memset(buf, 0, size);
 358         nfit_res->dev = dev;
 359         nfit_res->buf = buf;
 360         nfit_res->res = res;
 361         res->start = *dma;
 362         res->end = *dma + size - 1;
 363         res->name = "NFIT";
 364         spin_lock(&nfit_test_lock);
 365         list_add(&nfit_res->list, &t->resources);
 366         spin_unlock(&nfit_test_lock);
 367
 368         return nfit_res->buf;
 369  err:
 370         if (buf && !is_vmalloc_addr(buf))
 371                 dma_free_coherent(dev, size, buf, *dma);
 372         else if (buf)
 373                 vfree(buf);
 374         kfree(res);
 375         kfree(nfit_res);
 376         return NULL;
 377 }
 378
 379 static void *test_alloc(struct nfit_test *t, size_t size, dma_addr_t *dma)
 380 {
 381         void *buf = vmalloc(size);
 382
 383         *dma = (unsigned long) buf;
 384         return __test_alloc(t, size, dma, buf);
 385 }
 386
 387 static void *test_alloc_coherent(struct nfit_test *t, size_t size,
 388                 dma_addr_t *dma)
 389 {
 390         struct device *dev = &t->pdev.dev;
 391         void *buf = dma_alloc_coherent(dev, size, dma, GFP_KERNEL);
 392
 393         return __test_alloc(t, size, dma, buf);
 394 }
 395
 396 static struct nfit_test_resource *nfit_test_lookup(resource_size_t addr)
 397 {
 398         int i;
 399
 400         for (i = 0; i < ARRAY_SIZE(instances); i++) {
 401                 struct nfit_test_resource *n, *nfit_res = NULL;
 402                 struct nfit_test *t = instances[i];
 403
 404                 if (!t)
 405                         continue;
 406                 spin_lock(&nfit_test_lock);
 407                 list_for_each_entry(n, &t->resources, list) {
 408                         if (addr >= n->res->start && (addr < n->res->start
 409                                                 + resource_size(n->res))) {
 410                                 nfit_res = n;
 411                                 break;
 412                         } else if (addr >= (unsigned long) n->buf
 413                                         && (addr < (unsigned long) n->buf
 414                                                 + resource_size(n->res))) {
 415                                 nfit_res = n;
 416                                 break;
 417                         }
 418                 }
 419                 spin_unlock(&nfit_test_lock);
 420                 if (nfit_res)
 421                         return nfit_res;
 422         }
 423
 424         return NULL;
 425 }
 426
 427 static int nfit_test0_alloc(struct nfit_test *t)
 428 {
 429         size_t nfit_size = sizeof(struct acpi_nfit_system_address) * NUM_SPA
 430                         + sizeof(struct acpi_nfit_memory_map) * NUM_MEM
 431                         + sizeof(struct acpi_nfit_control_region) * NUM_DCR
 432                         + offsetof(struct acpi_nfit_control_region,
 433                                         window_size) * NUM_DCR
 434                         + sizeof(struct acpi_nfit_data_region) * NUM_BDW
 435                         + sizeof(struct acpi_nfit_flush_address) * NUM_DCR;
 436         int i;
 437
 438         t->nfit_buf = test_alloc(t, nfit_size, &t->nfit_dma);
 439         if (!t->nfit_buf)
 440                 return -ENOMEM;
 441         t->nfit_size = nfit_size;
 442
 443         t->spa_set[0] = test_alloc_coherent(t, SPA0_SIZE, &t->spa_set_dma[0]);
 444         if (!t->spa_set[0])
 445                 return -ENOMEM;
 446
 447         t->spa_set[1] = test_alloc_coherent(t, SPA1_SIZE, &t->spa_set_dma[1]);
 448         if (!t->spa_set[1])
 449                 return -ENOMEM;
 450
 451         t->spa_set[2] = test_alloc_coherent(t, SPA0_SIZE, &t->spa_set_dma[2]);
 452         if (!t->spa_set[2])
 453                 return -ENOMEM;
 454
 455         for (i = 0; i < NUM_DCR; i++) {
 456                 t->dimm[i] = test_alloc(t, DIMM_SIZE, &t->dimm_dma[i]);
 457                 if (!t->dimm[i])
 458                         return -ENOMEM;
 459
 460                 t->label[i] = test_alloc(t, LABEL_SIZE, &t->label_dma[i]);
 461                 if (!t->label[i])
 462                         return -ENOMEM;
 463                 sprintf(t->label[i], "label%d", i);
 464
 465                 t->flush[i] = test_alloc(t, 8, &t->flush_dma[i]);
 466                 if (!t->flush[i])
 467                         return -ENOMEM;
 468         }
 469
 470         for (i = 0; i < NUM_DCR; i++) {
 471                 t->dcr[i] = test_alloc(t, LABEL_SIZE, &t->dcr_dma[i]);
 472                 if (!t->dcr[i])
 473                         return -ENOMEM;
 474         }
 475
 476         return 0;
 477 }
 478
 479 static int nfit_test1_alloc(struct nfit_test *t)
 480 {
 481         size_t nfit_size = sizeof(struct acpi_nfit_system_address)
 482                 + sizeof(struct acpi_nfit_memory_map)
 483                 + offsetof(struct acpi_nfit_control_region, window_size);
 484
 485         t->nfit_buf = test_alloc(t, nfit_size, &t->nfit_dma);
 486         if (!t->nfit_buf)
 487                 return -ENOMEM;
 488         t->nfit_size = nfit_size;
 489
 490         t->spa_set[0] = test_alloc_coherent(t, SPA2_SIZE, &t->spa_set_dma[0]);
 491         if (!t->spa_set[0])
 492                 return -ENOMEM;
 493
 494         return 0;
 495 }
 496
 497 static void nfit_test0_setup(struct nfit_test *t)
 498 {
 499         struct nvdimm_bus_descriptor *nd_desc;
 500         struct acpi_nfit_desc *acpi_desc;
 501         struct acpi_nfit_memory_map *memdev;
 502         void *nfit_buf = t->nfit_buf;
 503         struct acpi_nfit_system_address *spa;
 504         struct acpi_nfit_control_region *dcr;
 505         struct acpi_nfit_data_region *bdw;
 506         struct acpi_nfit_flush_address *flush;
 507         unsigned int offset;
 508
 509         /*
 510          * spa0 (interleave first half of dimm0 and dimm1, note storage
 511          * does not actually alias the related block-data-window
 512          * regions)
 513          */
 514         spa = nfit_buf;
 515         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 516         spa->header.length = sizeof(*spa);
 517         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
 518         spa->range_index = 0+1;
 519         spa->address = t->spa_set_dma[0];
 520         spa->length = SPA0_SIZE;
 521
 522         /*
 523          * spa1 (interleave last half of the 4 DIMMS, note storage
 524          * does not actually alias the related block-data-window
 525          * regions)
 526          */
 527         spa = nfit_buf + sizeof(*spa);
 528         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 529         spa->header.length = sizeof(*spa);
 530         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
 531         spa->range_index = 1+1;
 532         spa->address = t->spa_set_dma[1];
 533         spa->length = SPA1_SIZE;
 534
 535         /* spa2 (dcr0) dimm0 */
 536         spa = nfit_buf + sizeof(*spa) * 2;
 537         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 538         spa->header.length = sizeof(*spa);
 539         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
 540         spa->range_index = 2+1;
 541         spa->address = t->dcr_dma[0];
 542         spa->length = DCR_SIZE;
 543
 544         /* spa3 (dcr1) dimm1 */
 545         spa = nfit_buf + sizeof(*spa) * 3;
 546         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 547         spa->header.length = sizeof(*spa);
 548         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
 549         spa->range_index = 3+1;
 550         spa->address = t->dcr_dma[1];
 551         spa->length = DCR_SIZE;
 552
 553         /* spa4 (dcr2) dimm2 */
 554         spa = nfit_buf + sizeof(*spa) * 4;
 555         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 556         spa->header.length = sizeof(*spa);
 557         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
 558         spa->range_index = 4+1;
 559         spa->address = t->dcr_dma[2];
 560         spa->length = DCR_SIZE;
 561
 562         /* spa5 (dcr3) dimm3 */
 563         spa = nfit_buf + sizeof(*spa) * 5;
 564         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 565         spa->header.length = sizeof(*spa);
 566         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
 567         spa->range_index = 5+1;
 568         spa->address = t->dcr_dma[3];
 569         spa->length = DCR_SIZE;
 570
 571         /* spa6 (bdw for dcr0) dimm0 */
 572         spa = nfit_buf + sizeof(*spa) * 6;
 573         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 574         spa->header.length = sizeof(*spa);
 575         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
 576         spa->range_index = 6+1;
 577         spa->address = t->dimm_dma[0];
 578         spa->length = DIMM_SIZE;
 579
 580         /* spa7 (bdw for dcr1) dimm1 */
 581         spa = nfit_buf + sizeof(*spa) * 7;
 582         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 583         spa->header.length = sizeof(*spa);
 584         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
 585         spa->range_index = 7+1;
 586         spa->address = t->dimm_dma[1];
 587         spa->length = DIMM_SIZE;
 588
 589         /* spa8 (bdw for dcr2) dimm2 */
 590         spa = nfit_buf + sizeof(*spa) * 8;
 591         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 592         spa->header.length = sizeof(*spa);
 593         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
 594         spa->range_index = 8+1;
 595         spa->address = t->dimm_dma[2];
 596         spa->length = DIMM_SIZE;
 597
 598         /* spa9 (bdw for dcr3) dimm3 */
 599         spa = nfit_buf + sizeof(*spa) * 9;
 600         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 601         spa->header.length = sizeof(*spa);
 602         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
 603         spa->range_index = 9+1;
 604         spa->address = t->dimm_dma[3];
 605         spa->length = DIMM_SIZE;
 606
 607         offset = sizeof(*spa) * 10;
 608         /* mem-region0 (spa0, dimm0) */
 609         memdev = nfit_buf + offset;
 610         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 611         memdev->header.length = sizeof(*memdev);
 612         memdev->device_handle = handle[0];
 613         memdev->physical_id = 0;
 614         memdev->region_id = 0;
 615         memdev->range_index = 0+1;
 616         memdev->region_index = 4+1;
 617         memdev->region_size = SPA0_SIZE/2;
 618         memdev->region_offset = t->spa_set_dma[0];
 619         memdev->address = 0;
 620         memdev->interleave_index = 0;
 621         memdev->interleave_ways = 2;
 622
 623         /* mem-region1 (spa0, dimm1) */
 624         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map);
 625         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 626         memdev->header.length = sizeof(*memdev);
 627         memdev->device_handle = handle[1];
 628         memdev->physical_id = 1;
 629         memdev->region_id = 0;
 630         memdev->range_index = 0+1;
 631         memdev->region_index = 5+1;
 632         memdev->region_size = SPA0_SIZE/2;
 633         memdev->region_offset = t->spa_set_dma[0] + SPA0_SIZE/2;
 634         memdev->address = 0;
 635         memdev->interleave_index = 0;
 636         memdev->interleave_ways = 2;
 637
 638         /* mem-region2 (spa1, dimm0) */
 639         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 2;
 640         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 641         memdev->header.length = sizeof(*memdev);
 642         memdev->device_handle = handle[0];
 643         memdev->physical_id = 0;
 644         memdev->region_id = 1;
 645         memdev->range_index = 1+1;
 646         memdev->region_index = 4+1;
 647         memdev->region_size = SPA1_SIZE/4;
 648         memdev->region_offset = t->spa_set_dma[1];
 649         memdev->address = SPA0_SIZE/2;
 650         memdev->interleave_index = 0;
 651         memdev->interleave_ways = 4;
 652
 653         /* mem-region3 (spa1, dimm1) */
 654         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 3;
 655         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 656         memdev->header.length = sizeof(*memdev);
 657         memdev->device_handle = handle[1];
 658         memdev->physical_id = 1;
 659         memdev->region_id = 1;
 660         memdev->range_index = 1+1;
 661         memdev->region_index = 5+1;
 662         memdev->region_size = SPA1_SIZE/4;
 663         memdev->region_offset = t->spa_set_dma[1] + SPA1_SIZE/4;
 664         memdev->address = SPA0_SIZE/2;
 665         memdev->interleave_index = 0;
 666         memdev->interleave_ways = 4;
 667
 668         /* mem-region4 (spa1, dimm2) */
 669         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 4;
 670         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 671         memdev->header.length = sizeof(*memdev);
 672         memdev->device_handle = handle[2];
 673         memdev->physical_id = 2;
 674         memdev->region_id = 0;
 675         memdev->range_index = 1+1;
 676         memdev->region_index = 6+1;
 677         memdev->region_size = SPA1_SIZE/4;
 678         memdev->region_offset = t->spa_set_dma[1] + 2*SPA1_SIZE/4;
 679         memdev->address = SPA0_SIZE/2;
 680         memdev->interleave_index = 0;
 681         memdev->interleave_ways = 4;
 682
 683         /* mem-region5 (spa1, dimm3) */
 684         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 5;
 685         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 686         memdev->header.length = sizeof(*memdev);
 687         memdev->device_handle = handle[3];
 688         memdev->physical_id = 3;
 689         memdev->region_id = 0;
 690         memdev->range_index = 1+1;
 691         memdev->region_index = 7+1;
 692         memdev->region_size = SPA1_SIZE/4;
 693         memdev->region_offset = t->spa_set_dma[1] + 3*SPA1_SIZE/4;
 694         memdev->address = SPA0_SIZE/2;
 695         memdev->interleave_index = 0;
 696         memdev->interleave_ways = 4;
 697
 698         /* mem-region6 (spa/dcr0, dimm0) */
 699         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 6;
 700         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 701         memdev->header.length = sizeof(*memdev);
 702         memdev->device_handle = handle[0];
 703         memdev->physical_id = 0;
 704         memdev->region_id = 0;
 705         memdev->range_index = 2+1;
 706         memdev->region_index = 0+1;
 707         memdev->region_size = 0;
 708         memdev->region_offset = 0;
 709         memdev->address = 0;
 710         memdev->interleave_index = 0;
 711         memdev->interleave_ways = 1;
 712
 713         /* mem-region7 (spa/dcr1, dimm1) */
 714         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 7;
 715         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 716         memdev->header.length = sizeof(*memdev);
 717         memdev->device_handle = handle[1];
 718         memdev->physical_id = 1;
 719         memdev->region_id = 0;
 720         memdev->range_index = 3+1;
 721         memdev->region_index = 1+1;
 722         memdev->region_size = 0;
 723         memdev->region_offset = 0;
 724         memdev->address = 0;
 725         memdev->interleave_index = 0;
 726         memdev->interleave_ways = 1;
 727
 728         /* mem-region8 (spa/dcr2, dimm2) */
 729         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 8;
 730         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 731         memdev->header.length = sizeof(*memdev);
 732         memdev->device_handle = handle[2];
 733         memdev->physical_id = 2;
 734         memdev->region_id = 0;
 735         memdev->range_index = 4+1;
 736         memdev->region_index = 2+1;
 737         memdev->region_size = 0;
 738         memdev->region_offset = 0;
 739         memdev->address = 0;
 740         memdev->interleave_index = 0;
 741         memdev->interleave_ways = 1;
 742
 743         /* mem-region9 (spa/dcr3, dimm3) */
 744         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 9;
 745         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 746         memdev->header.length = sizeof(*memdev);
 747         memdev->device_handle = handle[3];
 748         memdev->physical_id = 3;
 749         memdev->region_id = 0;
 750         memdev->range_index = 5+1;
 751         memdev->region_index = 3+1;
 752         memdev->region_size = 0;
 753         memdev->region_offset = 0;
 754         memdev->address = 0;
 755         memdev->interleave_index = 0;
 756         memdev->interleave_ways = 1;
 757
 758         /* mem-region10 (spa/bdw0, dimm0) */
 759         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 10;
 760         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 761         memdev->header.length = sizeof(*memdev);
 762         memdev->device_handle = handle[0];
 763         memdev->physical_id = 0;
 764         memdev->region_id = 0;
 765         memdev->range_index = 6+1;
 766         memdev->region_index = 0+1;
 767         memdev->region_size = 0;
 768         memdev->region_offset = 0;
 769         memdev->address = 0;
 770         memdev->interleave_index = 0;
 771         memdev->interleave_ways = 1;
 772
 773         /* mem-region11 (spa/bdw1, dimm1) */
 774         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 11;
 775         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 776         memdev->header.length = sizeof(*memdev);
 777         memdev->device_handle = handle[1];
 778         memdev->physical_id = 1;
 779         memdev->region_id = 0;
 780         memdev->range_index = 7+1;
 781         memdev->region_index = 1+1;
 782         memdev->region_size = 0;
 783         memdev->region_offset = 0;
 784         memdev->address = 0;
 785         memdev->interleave_index = 0;
 786         memdev->interleave_ways = 1;
 787
 788         /* mem-region12 (spa/bdw2, dimm2) */
 789         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 12;
 790         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 791         memdev->header.length = sizeof(*memdev);
 792         memdev->device_handle = handle[2];
 793         memdev->physical_id = 2;
 794         memdev->region_id = 0;
 795         memdev->range_index = 8+1;
 796         memdev->region_index = 2+1;
 797         memdev->region_size = 0;
 798         memdev->region_offset = 0;
 799         memdev->address = 0;
 800         memdev->interleave_index = 0;
 801         memdev->interleave_ways = 1;
 802
 803         /* mem-region13 (spa/dcr3, dimm3) */
 804         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 13;
 805         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 806         memdev->header.length = sizeof(*memdev);
 807         memdev->device_handle = handle[3];
 808         memdev->physical_id = 3;
 809         memdev->region_id = 0;
 810         memdev->range_index = 9+1;
 811         memdev->region_index = 3+1;
 812         memdev->region_size = 0;
 813         memdev->region_offset = 0;
 814         memdev->address = 0;
 815         memdev->interleave_index = 0;
 816         memdev->interleave_ways = 1;
 817
 818         offset = offset + sizeof(struct acpi_nfit_memory_map) * 14;
 819         /* dcr-descriptor0: blk */
 820         dcr = nfit_buf + offset;
 821         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 822         dcr->header.length = sizeof(struct acpi_nfit_control_region);
 823         dcr->region_index = 0+1;
 824         dcr->vendor_id = 0xabcd;
 825         dcr->device_id = 0;
 826         dcr->revision_id = 1;
 827         dcr->serial_number = ~handle[0];
 828         dcr->code = NFIT_FIC_BLK;
 829         dcr->windows = 1;
 830         dcr->window_size = DCR_SIZE;
 831         dcr->command_offset = 0;
 832         dcr->command_size = 8;
 833         dcr->status_offset = 8;
 834         dcr->status_size = 4;
 835
 836         /* dcr-descriptor1: blk */
 837         dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region);
 838         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 839         dcr->header.length = sizeof(struct acpi_nfit_control_region);
 840         dcr->region_index = 1+1;
 841         dcr->vendor_id = 0xabcd;
 842         dcr->device_id = 0;
 843         dcr->revision_id = 1;
 844         dcr->serial_number = ~handle[1];
 845         dcr->code = NFIT_FIC_BLK;
 846         dcr->windows = 1;
 847         dcr->window_size = DCR_SIZE;
 848         dcr->command_offset = 0;
 849         dcr->command_size = 8;
 850         dcr->status_offset = 8;
 851         dcr->status_size = 4;
 852
 853         /* dcr-descriptor2: blk */
 854         dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region) * 2;
 855         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 856         dcr->header.length = sizeof(struct acpi_nfit_control_region);
 857         dcr->region_index = 2+1;
 858         dcr->vendor_id = 0xabcd;
 859         dcr->device_id = 0;
 860         dcr->revision_id = 1;
 861         dcr->serial_number = ~handle[2];
 862         dcr->code = NFIT_FIC_BLK;
 863         dcr->windows = 1;
 864         dcr->window_size = DCR_SIZE;
 865         dcr->command_offset = 0;
 866         dcr->command_size = 8;
 867         dcr->status_offset = 8;
 868         dcr->status_size = 4;
 869
 870         /* dcr-descriptor3: blk */
 871         dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region) * 3;
 872         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 873         dcr->header.length = sizeof(struct acpi_nfit_control_region);
 874         dcr->region_index = 3+1;
 875         dcr->vendor_id = 0xabcd;
 876         dcr->device_id = 0;
 877         dcr->revision_id = 1;
 878         dcr->serial_number = ~handle[3];
 879         dcr->code = NFIT_FIC_BLK;
 880         dcr->windows = 1;
 881         dcr->window_size = DCR_SIZE;
 882         dcr->command_offset = 0;
 883         dcr->command_size = 8;
 884         dcr->status_offset = 8;
 885         dcr->status_size = 4;
 886
 887         offset = offset + sizeof(struct acpi_nfit_control_region) * 4;
 888         /* dcr-descriptor0: pmem */
 889         dcr = nfit_buf + offset;
 890         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 891         dcr->header.length = offsetof(struct acpi_nfit_control_region,
 892                         window_size);
 893         dcr->region_index = 4+1;
 894         dcr->vendor_id = 0xabcd;
 895         dcr->device_id = 0;
 896         dcr->revision_id = 1;
 897         dcr->serial_number = ~handle[0];
 898         dcr->code = NFIT_FIC_BYTEN;
 899         dcr->windows = 0;
 900
 901         /* dcr-descriptor1: pmem */
 902         dcr = nfit_buf + offset + offsetof(struct acpi_nfit_control_region,
 903                         window_size);
 904         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 905         dcr->header.length = offsetof(struct acpi_nfit_control_region,
 906                         window_size);
 907         dcr->region_index = 5+1;
 908         dcr->vendor_id = 0xabcd;
 909         dcr->device_id = 0;
 910         dcr->revision_id = 1;
 911         dcr->serial_number = ~handle[1];
 912         dcr->code = NFIT_FIC_BYTEN;
 913         dcr->windows = 0;
 914
 915         /* dcr-descriptor2: pmem */
 916         dcr = nfit_buf + offset + offsetof(struct acpi_nfit_control_region,
 917                         window_size) * 2;
 918         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 919         dcr->header.length = offsetof(struct acpi_nfit_control_region,
 920                         window_size);
 921         dcr->region_index = 6+1;
 922         dcr->vendor_id = 0xabcd;
 923         dcr->device_id = 0;
 924         dcr->revision_id = 1;
 925         dcr->serial_number = ~handle[2];
 926         dcr->code = NFIT_FIC_BYTEN;
 927         dcr->windows = 0;
 928
 929         /* dcr-descriptor3: pmem */
 930         dcr = nfit_buf + offset + offsetof(struct acpi_nfit_control_region,
 931                         window_size) * 3;
 932         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 933         dcr->header.length = offsetof(struct acpi_nfit_control_region,
 934                         window_size);
 935         dcr->region_index = 7+1;
 936         dcr->vendor_id = 0xabcd;
 937         dcr->device_id = 0;
 938         dcr->revision_id = 1;
 939         dcr->serial_number = ~handle[3];
 940         dcr->code = NFIT_FIC_BYTEN;
 941         dcr->windows = 0;
 942
 943         offset = offset + offsetof(struct acpi_nfit_control_region,
 944                         window_size) * 4;
 945         /* bdw0 (spa/dcr0, dimm0) */
 946         bdw = nfit_buf + offset;
 947         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
 948         bdw->header.length = sizeof(struct acpi_nfit_data_region);
 949         bdw->region_index = 0+1;
 950         bdw->windows = 1;
 951         bdw->offset = 0;
 952         bdw->size = BDW_SIZE;
 953         bdw->capacity = DIMM_SIZE;
 954         bdw->start_address = 0;
 955
 956         /* bdw1 (spa/dcr1, dimm1) */
 957         bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region);
 958         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
 959         bdw->header.length = sizeof(struct acpi_nfit_data_region);
 960         bdw->region_index = 1+1;
 961         bdw->windows = 1;
 962         bdw->offset = 0;
 963         bdw->size = BDW_SIZE;
 964         bdw->capacity = DIMM_SIZE;
 965         bdw->start_address = 0;
 966
 967         /* bdw2 (spa/dcr2, dimm2) */
 968         bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region) * 2;
 969         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
 970         bdw->header.length = sizeof(struct acpi_nfit_data_region);
 971         bdw->region_index = 2+1;
 972         bdw->windows = 1;
 973         bdw->offset = 0;
 974         bdw->size = BDW_SIZE;
 975         bdw->capacity = DIMM_SIZE;
 976         bdw->start_address = 0;
 977
 978         /* bdw3 (spa/dcr3, dimm3) */
 979         bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region) * 3;
 980         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
 981         bdw->header.length = sizeof(struct acpi_nfit_data_region);
 982         bdw->region_index = 3+1;
 983         bdw->windows = 1;
 984         bdw->offset = 0;
 985         bdw->size = BDW_SIZE;
 986         bdw->capacity = DIMM_SIZE;
 987         bdw->start_address = 0;
 988
 989         offset = offset + sizeof(struct acpi_nfit_data_region) * 4;
 990         /* flush0 (dimm0) */
 991         flush = nfit_buf + offset;
 992         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
 993         flush->header.length = sizeof(struct acpi_nfit_flush_address);
 994         flush->device_handle = handle[0];
 995         flush->hint_count = 1;
 996         flush->hint_address[0] = t->flush_dma[0];
 997
 998         /* flush1 (dimm1) */
 999         flush = nfit_buf + offset + sizeof(struct acpi_nfit_flush_address) * 1;
1000         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1001         flush->header.length = sizeof(struct acpi_nfit_flush_address);
1002         flush->device_handle = handle[1];
1003         flush->hint_count = 1;
1004         flush->hint_address[0] = t->flush_dma[1];
1005
1006         /* flush2 (dimm2) */
1007         flush = nfit_buf + offset + sizeof(struct acpi_nfit_flush_address) * 2;
1008         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1009         flush->header.length = sizeof(struct acpi_nfit_flush_address);
1010         flush->device_handle = handle[2];
1011         flush->hint_count = 1;
1012         flush->hint_address[0] = t->flush_dma[2];
1013
1014         /* flush3 (dimm3) */
1015         flush = nfit_buf + offset + sizeof(struct acpi_nfit_flush_address) * 3;
1016         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1017         flush->header.length = sizeof(struct acpi_nfit_flush_address);
1018         flush->device_handle = handle[3];
1019         flush->hint_count = 1;
1020         flush->hint_address[0] = t->flush_dma[3];
1021
1022         if (t->setup_hotplug) {
1023                 offset = offset + sizeof(struct acpi_nfit_flush_address) * 4;
1024                 /* dcr-descriptor4: blk */
1025                 dcr = nfit_buf + offset;
1026                 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1027                 dcr->header.length = sizeof(struct acpi_nfit_control_region);
1028                 dcr->region_index = 8+1;
1029                 dcr->vendor_id = 0xabcd;
1030                 dcr->device_id = 0;
1031                 dcr->revision_id = 1;
1032                 dcr->serial_number = ~handle[4];
1033                 dcr->code = NFIT_FIC_BLK;
1034                 dcr->windows = 1;
1035                 dcr->window_size = DCR_SIZE;
1036                 dcr->command_offset = 0;
1037                 dcr->command_size = 8;
1038                 dcr->status_offset = 8;
1039                 dcr->status_size = 4;
1040
1041                 offset = offset + sizeof(struct acpi_nfit_control_region);
1042                 /* dcr-descriptor4: pmem */
1043                 dcr = nfit_buf + offset;
1044                 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1045                 dcr->header.length = offsetof(struct acpi_nfit_control_region,
1046                                 window_size);
1047                 dcr->region_index = 9+1;
1048                 dcr->vendor_id = 0xabcd;
1049                 dcr->device_id = 0;
1050                 dcr->revision_id = 1;
1051                 dcr->serial_number = ~handle[4];
1052                 dcr->code = NFIT_FIC_BYTEN;
1053                 dcr->windows = 0;
1054
1055                 offset = offset + offsetof(struct acpi_nfit_control_region,
1056                                 window_size);
1057                 /* bdw4 (spa/dcr4, dimm4) */
1058                 bdw = nfit_buf + offset;
1059                 bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
1060                 bdw->header.length = sizeof(struct acpi_nfit_data_region);
1061                 bdw->region_index = 8+1;
1062                 bdw->windows = 1;
1063                 bdw->offset = 0;
1064                 bdw->size = BDW_SIZE;
1065                 bdw->capacity = DIMM_SIZE;
1066                 bdw->start_address = 0;
1067
1068                 offset = offset + sizeof(struct acpi_nfit_data_region);
1069                 /* spa10 (dcr4) dimm4 */
1070                 spa = nfit_buf + offset;
1071                 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1072                 spa->header.length = sizeof(*spa);
1073                 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
1074                 spa->range_index = 10+1;
1075                 spa->address = t->dcr_dma[4];
1076                 spa->length = DCR_SIZE;
1077
1078                 /*
1079                  * spa11 (single-dimm interleave for hotplug, note storage
1080                  * does not actually alias the related block-data-window
1081                  * regions)
1082                  */
1083                 spa = nfit_buf + offset + sizeof(*spa);
1084                 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1085                 spa->header.length = sizeof(*spa);
1086                 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
1087                 spa->range_index = 11+1;
1088                 spa->address = t->spa_set_dma[2];
1089                 spa->length = SPA0_SIZE;
1090
1091                 /* spa12 (bdw for dcr4) dimm4 */
1092                 spa = nfit_buf + offset + sizeof(*spa) * 2;
1093                 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1094                 spa->header.length = sizeof(*spa);
1095                 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
1096                 spa->range_index = 12+1;
1097                 spa->address = t->dimm_dma[4];
1098                 spa->length = DIMM_SIZE;
1099
1100                 offset = offset + sizeof(*spa) * 3;
1101                 /* mem-region14 (spa/dcr4, dimm4) */
1102                 memdev = nfit_buf + offset;
1103                 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1104                 memdev->header.length = sizeof(*memdev);
1105                 memdev->device_handle = handle[4];
1106                 memdev->physical_id = 4;
1107                 memdev->region_id = 0;
1108                 memdev->range_index = 10+1;
1109                 memdev->region_index = 8+1;
1110                 memdev->region_size = 0;
1111                 memdev->region_offset = 0;
1112                 memdev->address = 0;
1113                 memdev->interleave_index = 0;
1114                 memdev->interleave_ways = 1;
1115
1116                 /* mem-region15 (spa0, dimm4) */
1117                 memdev = nfit_buf + offset +
1118                                 sizeof(struct acpi_nfit_memory_map);
1119                 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1120                 memdev->header.length = sizeof(*memdev);
1121                 memdev->device_handle = handle[4];
1122                 memdev->physical_id = 4;
1123                 memdev->region_id = 0;
1124                 memdev->range_index = 11+1;
1125                 memdev->region_index = 9+1;
1126                 memdev->region_size = SPA0_SIZE;
1127                 memdev->region_offset = t->spa_set_dma[2];
1128                 memdev->address = 0;
1129                 memdev->interleave_index = 0;
1130                 memdev->interleave_ways = 1;
1131
1132                 /* mem-region16 (spa/bdw4, dimm4) */
1133                 memdev = nfit_buf + offset +
1134                                 sizeof(struct acpi_nfit_memory_map) * 2;
1135                 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1136                 memdev->header.length = sizeof(*memdev);
1137                 memdev->device_handle = handle[4];
1138                 memdev->physical_id = 4;
1139                 memdev->region_id = 0;
1140                 memdev->range_index = 12+1;
1141                 memdev->region_index = 8+1;
1142                 memdev->region_size = 0;
1143                 memdev->region_offset = 0;
1144                 memdev->address = 0;
1145                 memdev->interleave_index = 0;
1146                 memdev->interleave_ways = 1;
1147
1148                 offset = offset + sizeof(struct acpi_nfit_memory_map) * 3;
1149                 /* flush3 (dimm4) */
1150                 flush = nfit_buf + offset;
1151                 flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1152                 flush->header.length = sizeof(struct acpi_nfit_flush_address);
1153                 flush->device_handle = handle[4];
1154                 flush->hint_count = 1;
1155                 flush->hint_address[0] = t->flush_dma[4];
1156         }
1157
1158         acpi_desc = &t->acpi_desc;
1159         set_bit(ND_CMD_GET_CONFIG_SIZE, &acpi_desc->dimm_dsm_force_en);
1160         set_bit(ND_CMD_GET_CONFIG_DATA, &acpi_desc->dimm_dsm_force_en);
1161         set_bit(ND_CMD_SET_CONFIG_DATA, &acpi_desc->dimm_dsm_force_en);
1162         set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_dsm_force_en);
1163         set_bit(ND_CMD_ARS_START, &acpi_desc->bus_dsm_force_en);
1164         set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_dsm_force_en);
1165         nd_desc = &acpi_desc->nd_desc;
1166         nd_desc->ndctl = nfit_test_ctl;
1167 }
1168
1169 static void nfit_test1_setup(struct nfit_test *t)
1170 {
1171         size_t offset;
1172         void *nfit_buf = t->nfit_buf;
1173         struct acpi_nfit_memory_map *memdev;
1174         struct acpi_nfit_control_region *dcr;
1175         struct acpi_nfit_system_address *spa;
1176         struct nvdimm_bus_descriptor *nd_desc;
1177         struct acpi_nfit_desc *acpi_desc;
1178
1179         offset = 0;
1180         /* spa0 (flat range with no bdw aliasing) */
1181         spa = nfit_buf + offset;
1182         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1183         spa->header.length = sizeof(*spa);
1184         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
1185         spa->range_index = 0+1;
1186         spa->address = t->spa_set_dma[0];
1187         spa->length = SPA2_SIZE;
1188
1189         offset += sizeof(*spa);
1190         /* mem-region0 (spa0, dimm0) */
1191         memdev = nfit_buf + offset;
1192         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1193         memdev->header.length = sizeof(*memdev);
1194         memdev->device_handle = 0;
1195         memdev->physical_id = 0;
1196         memdev->region_id = 0;
1197         memdev->range_index = 0+1;
1198         memdev->region_index = 0+1;
1199         memdev->region_size = SPA2_SIZE;
1200         memdev->region_offset = 0;
1201         memdev->address = 0;
1202         memdev->interleave_index = 0;
1203         memdev->interleave_ways = 1;
1204         memdev->flags = ACPI_NFIT_MEM_SAVE_FAILED | ACPI_NFIT_MEM_RESTORE_FAILED
1205                 | ACPI_NFIT_MEM_FLUSH_FAILED | ACPI_NFIT_MEM_HEALTH_OBSERVED
1206                 | ACPI_NFIT_MEM_NOT_ARMED;
1207
1208         offset += sizeof(*memdev);
1209         /* dcr-descriptor0 */
1210         dcr = nfit_buf + offset;
1211         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1212         dcr->header.length = offsetof(struct acpi_nfit_control_region,
1213                         window_size);
1214         dcr->region_index = 0+1;
1215         dcr->vendor_id = 0xabcd;
1216         dcr->device_id = 0;
1217         dcr->revision_id = 1;
1218         dcr->serial_number = ~0;
1219         dcr->code = NFIT_FIC_BYTE;
1220         dcr->windows = 0;
1221
1222         acpi_desc = &t->acpi_desc;
1223         set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_dsm_force_en);
1224         set_bit(ND_CMD_ARS_START, &acpi_desc->bus_dsm_force_en);
1225         set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_dsm_force_en);
1226         nd_desc = &acpi_desc->nd_desc;
1227         nd_desc->ndctl = nfit_test_ctl;
1228 }
1229
1230 static int nfit_test_blk_do_io(struct nd_blk_region *ndbr, resource_size_t dpa,
1231                 void *iobuf, u64 len, int rw)
1232 {
1233         struct nfit_blk *nfit_blk = ndbr->blk_provider_data;
1234         struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1235         struct nd_region *nd_region = &ndbr->nd_region;
1236         unsigned int lane;
1237
1238         lane = nd_region_acquire_lane(nd_region);
1239         if (rw)
1240                 memcpy(mmio->addr.base + dpa, iobuf, len);
1241         else {
1242                 memcpy(iobuf, mmio->addr.base + dpa, len);
1243
1244                 /* give us some some coverage of the mmio_flush_range() API */
1245                 mmio_flush_range(mmio->addr.base + dpa, len);
1246         }
1247         nd_region_release_lane(nd_region, lane);
1248
1249         return 0;
1250 }
1251
1252 static int nfit_test_probe(struct platform_device *pdev)
1253 {
1254         struct nvdimm_bus_descriptor *nd_desc;
1255         struct acpi_nfit_desc *acpi_desc;
1256         struct device *dev = &pdev->dev;
1257         struct nfit_test *nfit_test;
1258         int rc;
1259
1260         nfit_test = to_nfit_test(&pdev->dev);
1261
1262         /* common alloc */
1263         if (nfit_test->num_dcr) {
1264                 int num = nfit_test->num_dcr;
1265
1266                 nfit_test->dimm = devm_kcalloc(dev, num, sizeof(void *),
1267                                 GFP_KERNEL);
1268                 nfit_test->dimm_dma = devm_kcalloc(dev, num, sizeof(dma_addr_t),
1269                                 GFP_KERNEL);
1270                 nfit_test->flush = devm_kcalloc(dev, num, sizeof(void *),
1271                                 GFP_KERNEL);
1272                 nfit_test->flush_dma = devm_kcalloc(dev, num, sizeof(dma_addr_t),
1273                                 GFP_KERNEL);
1274                 nfit_test->label = devm_kcalloc(dev, num, sizeof(void *),
1275                                 GFP_KERNEL);
1276                 nfit_test->label_dma = devm_kcalloc(dev, num,
1277                                 sizeof(dma_addr_t), GFP_KERNEL);
1278                 nfit_test->dcr = devm_kcalloc(dev, num,
1279                                 sizeof(struct nfit_test_dcr *), GFP_KERNEL);
1280                 nfit_test->dcr_dma = devm_kcalloc(dev, num,
1281                                 sizeof(dma_addr_t), GFP_KERNEL);
1282                 if (nfit_test->dimm && nfit_test->dimm_dma && nfit_test->label
1283                                 && nfit_test->label_dma && nfit_test->dcr
1284                                 && nfit_test->dcr_dma && nfit_test->flush
1285                                 && nfit_test->flush_dma)
1286                         /* pass */;
1287                 else
1288                         return -ENOMEM;
1289         }
1290
1291         if (nfit_test->num_pm) {
1292                 int num = nfit_test->num_pm;
1293
1294                 nfit_test->spa_set = devm_kcalloc(dev, num, sizeof(void *),
1295                                 GFP_KERNEL);
1296                 nfit_test->spa_set_dma = devm_kcalloc(dev, num,
1297                                 sizeof(dma_addr_t), GFP_KERNEL);
1298                 if (nfit_test->spa_set && nfit_test->spa_set_dma)
1299                         /* pass */;
1300                 else
1301                         return -ENOMEM;
1302         }
1303
1304         /* per-nfit specific alloc */
1305         if (nfit_test->alloc(nfit_test))
1306                 return -ENOMEM;
1307
1308         nfit_test->setup(nfit_test);
1309         acpi_desc = &nfit_test->acpi_desc;
1310         acpi_desc->dev = &pdev->dev;
1311         acpi_desc->nfit = nfit_test->nfit_buf;
1312         acpi_desc->blk_do_io = nfit_test_blk_do_io;
1313         nd_desc = &acpi_desc->nd_desc;
1314         nd_desc->attr_groups = acpi_nfit_attribute_groups;
1315         acpi_desc->nvdimm_bus = nvdimm_bus_register(&pdev->dev, nd_desc);
1316         if (!acpi_desc->nvdimm_bus)
1317                 return -ENXIO;
1318
1319         INIT_LIST_HEAD(&acpi_desc->spa_maps);
1320         INIT_LIST_HEAD(&acpi_desc->spas);
1321         INIT_LIST_HEAD(&acpi_desc->dcrs);
1322         INIT_LIST_HEAD(&acpi_desc->bdws);
1323         INIT_LIST_HEAD(&acpi_desc->idts);
1324         INIT_LIST_HEAD(&acpi_desc->flushes);
1325         INIT_LIST_HEAD(&acpi_desc->memdevs);
1326         INIT_LIST_HEAD(&acpi_desc->dimms);
1327         mutex_init(&acpi_desc->spa_map_mutex);
1328         mutex_init(&acpi_desc->init_mutex);
1329
1330         rc = acpi_nfit_init(acpi_desc, nfit_test->nfit_size);
1331         if (rc) {
1332                 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
1333                 return rc;
1334         }
1335
1336         if (nfit_test->setup != nfit_test0_setup)
1337                 return 0;
1338
1339         nfit_test->setup_hotplug = 1;
1340         nfit_test->setup(nfit_test);
1341
1342         rc = acpi_nfit_init(acpi_desc, nfit_test->nfit_size);
1343         if (rc) {
1344                 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
1345                 return rc;
1346         }
1347
1348         return 0;
1349 }
1350
1351 static int nfit_test_remove(struct platform_device *pdev)
1352 {
1353         struct nfit_test *nfit_test = to_nfit_test(&pdev->dev);
1354         struct acpi_nfit_desc *acpi_desc = &nfit_test->acpi_desc;
1355
1356         nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
1357
1358         return 0;
1359 }
1360
1361 static void nfit_test_release(struct device *dev)
1362 {
1363         struct nfit_test *nfit_test = to_nfit_test(dev);
1364
1365         kfree(nfit_test);
1366 }
1367
1368 static const struct platform_device_id nfit_test_id[] = {
1369         { KBUILD_MODNAME },
1370         { },
1371 };
1372
1373 static struct platform_driver nfit_test_driver = {
1374         .probe = nfit_test_probe,
1375         .remove = nfit_test_remove,
1376         .driver = {
1377                 .name = KBUILD_MODNAME,
1378         },
1379         .id_table = nfit_test_id,
1380 };
1381
1382 #ifdef CONFIG_CMA_SIZE_MBYTES
1383 #define CMA_SIZE_MBYTES CONFIG_CMA_SIZE_MBYTES
1384 #else
1385 #define CMA_SIZE_MBYTES 0
1386 #endif
1387
1388 static __init int nfit_test_init(void)
1389 {
1390         int rc, i;
1391
1392         nfit_test_setup(nfit_test_lookup);
1393
1394         for (i = 0; i < NUM_NFITS; i++) {
1395                 struct nfit_test *nfit_test;
1396                 struct platform_device *pdev;
1397                 static int once;
1398
1399                 nfit_test = kzalloc(sizeof(*nfit_test), GFP_KERNEL);
1400                 if (!nfit_test) {
1401                         rc = -ENOMEM;
1402                         goto err_register;
1403                 }
1404                 INIT_LIST_HEAD(&nfit_test->resources);
1405                 switch (i) {
1406                 case 0:
1407                         nfit_test->num_pm = NUM_PM;
1408                         nfit_test->num_dcr = NUM_DCR;
1409                         nfit_test->alloc = nfit_test0_alloc;
1410                         nfit_test->setup = nfit_test0_setup;
1411                         break;
1412                 case 1:
1413                         nfit_test->num_pm = 1;
1414                         nfit_test->alloc = nfit_test1_alloc;
1415                         nfit_test->setup = nfit_test1_setup;
1416                         break;
1417                 default:
1418                         rc = -EINVAL;
1419                         goto err_register;
1420                 }
1421                 pdev = &nfit_test->pdev;
1422                 pdev->name = KBUILD_MODNAME;
1423                 pdev->id = i;
1424                 pdev->dev.release = nfit_test_release;
1425                 rc = platform_device_register(pdev);
1426                 if (rc) {
1427                         put_device(&pdev->dev);
1428                         goto err_register;
1429                 }
1430
1431                 rc = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
1432                 if (rc)
1433                         goto err_register;
1434
1435                 instances[i] = nfit_test;
1436
1437                 if (!once++) {
1438                         dma_addr_t dma;
1439                         void *buf;
1440
1441                         buf = dma_alloc_coherent(&pdev->dev, SZ_128M, &dma,
1442                                         GFP_KERNEL);
1443                         if (!buf) {
1444                                 rc = -ENOMEM;
1445                                 dev_warn(&pdev->dev, "need 128M of free cma\n");
1446                                 goto err_register;
1447                         }
1448                         dma_free_coherent(&pdev->dev, SZ_128M, buf, dma);
1449                 }
1450         }
1451
1452         rc = platform_driver_register(&nfit_test_driver);
1453         if (rc)
1454                 goto err_register;
1455         return 0;
1456
1457  err_register:
1458         for (i = 0; i < NUM_NFITS; i++)
1459                 if (instances[i])
1460                         platform_device_unregister(&instances[i]->pdev);
1461         nfit_test_teardown();
1462         return rc;
1463 }
1464
1465 static __exit void nfit_test_exit(void)
1466 {
1467         int i;
1468
1469         platform_driver_unregister(&nfit_test_driver);
1470         for (i = 0; i < NUM_NFITS; i++)
1471                 platform_device_unregister(&instances[i]->pdev);
1472         nfit_test_teardown();
1473 }
1474
1475 module_init(nfit_test_init);
1476 module_exit(nfit_test_exit);
1477 MODULE_LICENSE("GPL v2");
1478 MODULE_AUTHOR("Intel Corporation");