tools/testing/nvdimm/test/nfit.c

   1 /*
   2  * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of version 2 of the GNU General Public License as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  */
  13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14 #include <linux/platform_device.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/libnvdimm.h>
  17 #include <linux/vmalloc.h>
  18 #include <linux/device.h>
  19 #include <linux/module.h>
  20 #include <linux/mutex.h>
  21 #include <linux/ndctl.h>
  22 #include <linux/sizes.h>
  23 #include <linux/list.h>
  24 #include <linux/slab.h>
  25 #include <nfit.h>
  26 #include <nd.h>
  27 #include "nfit_test.h"
  28
  29 /*
  30  * Generate an NFIT table to describe the following topology:
  31  *
  32  * BUS0: Interleaved PMEM regions, and aliasing with BLK regions
  33  *
  34  *                     (a)                       (b)            DIMM   BLK-REGION
  35  *           +----------+--------------+----------+---------+
  36  * +------+  |  blk2.0  |     pm0.0    |  blk2.1  |  pm1.0  |    0      region2
  37  * | imc0 +--+- - - - - region0 - - - -+----------+         +
  38  * +--+---+  |  blk3.0  |     pm0.0    |  blk3.1  |  pm1.0  |    1      region3
  39  *    |      +----------+--------------v----------v         v
  40  * +--+---+                            |                    |
  41  * | cpu0 |                                    region1
  42  * +--+---+                            |                    |
  43  *    |      +-------------------------^----------^         ^
  44  * +--+---+  |                 blk4.0             |  pm1.0  |    2      region4
  45  * | imc1 +--+-------------------------+----------+         +
  46  * +------+  |                 blk5.0             |  pm1.0  |    3      region5
  47  *           +-------------------------+----------+-+-------+
  48  *
  49  * +--+---+
  50  * | cpu1 |
  51  * +--+---+                   (Hotplug DIMM)
  52  *    |      +----------------------------------------------+
  53  * +--+---+  |                 blk6.0/pm7.0                 |    4      region6/7
  54  * | imc0 +--+----------------------------------------------+
  55  * +------+
  56  *
  57  *
  58  * *) In this layout we have four dimms and two memory controllers in one
  59  *    socket.  Each unique interface (BLK or PMEM) to DPA space
  60  *    is identified by a region device with a dynamically assigned id.
  61  *
  62  * *) The first portion of dimm0 and dimm1 are interleaved as REGION0.
  63  *    A single PMEM namespace "pm0.0" is created using half of the
  64  *    REGION0 SPA-range.  REGION0 spans dimm0 and dimm1.  PMEM namespace
  65  *    allocate from from the bottom of a region.  The unallocated
  66  *    portion of REGION0 aliases with REGION2 and REGION3.  That
  67  *    unallacted capacity is reclaimed as BLK namespaces ("blk2.0" and
  68  *    "blk3.0") starting at the base of each DIMM to offset (a) in those
  69  *    DIMMs.  "pm0.0", "blk2.0" and "blk3.0" are free-form readable
  70  *    names that can be assigned to a namespace.
  71  *
  72  * *) In the last portion of dimm0 and dimm1 we have an interleaved
  73  *    SPA range, REGION1, that spans those two dimms as well as dimm2
  74  *    and dimm3.  Some of REGION1 allocated to a PMEM namespace named
  75  *    "pm1.0" the rest is reclaimed in 4 BLK namespaces (for each
  76  *    dimm in the interleave set), "blk2.1", "blk3.1", "blk4.0", and
  77  *    "blk5.0".
  78  *
  79  * *) The portion of dimm2 and dimm3 that do not participate in the
  80  *    REGION1 interleaved SPA range (i.e. the DPA address below offset
  81  *    (b) are also included in the "blk4.0" and "blk5.0" namespaces.
  82  *    Note, that BLK namespaces need not be contiguous in DPA-space, and
  83  *    can consume aliased capacity from multiple interleave sets.
  84  *
  85  * BUS1: Legacy NVDIMM (single contiguous range)
  86  *
  87  *  region2
  88  * +---------------------+
  89  * |---------------------|
  90  * ||       pm2.0       ||
  91  * |---------------------|
  92  * +---------------------+
  93  *
  94  * *) A NFIT-table may describe a simple system-physical-address range
  95  *    with no BLK aliasing.  This type of region may optionally
  96  *    reference an NVDIMM.
  97  */
  98 enum {
  99         NUM_PM  = 3,
 100         NUM_DCR = 5,
 101         NUM_HINTS = 8,
 102         NUM_BDW = NUM_DCR,
 103         NUM_SPA = NUM_PM + NUM_DCR + NUM_BDW,
 104         NUM_MEM = NUM_DCR + NUM_BDW + 2 /* spa0 iset */ + 4 /* spa1 iset */,
 105         DIMM_SIZE = SZ_32M,
 106         LABEL_SIZE = SZ_128K,
 107         SPA0_SIZE = DIMM_SIZE,
 108         SPA1_SIZE = DIMM_SIZE*2,
 109         SPA2_SIZE = DIMM_SIZE,
 110         BDW_SIZE = 64 << 8,
 111         DCR_SIZE = 12,
 112         NUM_NFITS = 2, /* permit testing multiple NFITs per system */
 113 };
 114
 115 struct nfit_test_dcr {
 116         __le64 bdw_addr;
 117         __le32 bdw_status;
 118         __u8 aperature[BDW_SIZE];
 119 };
 120
 121 #define NFIT_DIMM_HANDLE(node, socket, imc, chan, dimm) \
 122         (((node & 0xfff) << 16) | ((socket & 0xf) << 12) \
 123          | ((imc & 0xf) << 8) | ((chan & 0xf) << 4) | (dimm & 0xf))
 124
 125 static u32 handle[NUM_DCR] = {
 126         [0] = NFIT_DIMM_HANDLE(0, 0, 0, 0, 0),
 127         [1] = NFIT_DIMM_HANDLE(0, 0, 0, 0, 1),
 128         [2] = NFIT_DIMM_HANDLE(0, 0, 1, 0, 0),
 129         [3] = NFIT_DIMM_HANDLE(0, 0, 1, 0, 1),
 130         [4] = NFIT_DIMM_HANDLE(0, 1, 0, 0, 0),
 131 };
 132
 133 struct nfit_test {
 134         struct acpi_nfit_desc acpi_desc;
 135         struct platform_device pdev;
 136         struct list_head resources;
 137         void *nfit_buf;
 138         dma_addr_t nfit_dma;
 139         size_t nfit_size;
 140         int num_dcr;
 141         int num_pm;
 142         void **dimm;
 143         dma_addr_t *dimm_dma;
 144         void **flush;
 145         dma_addr_t *flush_dma;
 146         void **label;
 147         dma_addr_t *label_dma;
 148         void **spa_set;
 149         dma_addr_t *spa_set_dma;
 150         struct nfit_test_dcr **dcr;
 151         dma_addr_t *dcr_dma;
 152         int (*alloc)(struct nfit_test *t);
 153         void (*setup)(struct nfit_test *t);
 154         int setup_hotplug;
 155         struct ars_state {
 156                 struct nd_cmd_ars_status *ars_status;
 157                 unsigned long deadline;
 158                 spinlock_t lock;
 159         } ars_state;
 160 };
 161
 162 static struct nfit_test *to_nfit_test(struct device *dev)
 163 {
 164         struct platform_device *pdev = to_platform_device(dev);
 165
 166         return container_of(pdev, struct nfit_test, pdev);
 167 }
 168
 169 static int nfit_test_cmd_get_config_size(struct nd_cmd_get_config_size *nd_cmd,
 170                 unsigned int buf_len)
 171 {
 172         if (buf_len < sizeof(*nd_cmd))
 173                 return -EINVAL;
 174
 175         nd_cmd->status = 0;
 176         nd_cmd->config_size = LABEL_SIZE;
 177         nd_cmd->max_xfer = SZ_4K;
 178
 179         return 0;
 180 }
 181
 182 static int nfit_test_cmd_get_config_data(struct nd_cmd_get_config_data_hdr
 183                 *nd_cmd, unsigned int buf_len, void *label)
 184 {
 185         unsigned int len, offset = nd_cmd->in_offset;
 186         int rc;
 187
 188         if (buf_len < sizeof(*nd_cmd))
 189                 return -EINVAL;
 190         if (offset >= LABEL_SIZE)
 191                 return -EINVAL;
 192         if (nd_cmd->in_length + sizeof(*nd_cmd) > buf_len)
 193                 return -EINVAL;
 194
 195         nd_cmd->status = 0;
 196         len = min(nd_cmd->in_length, LABEL_SIZE - offset);
 197         memcpy(nd_cmd->out_buf, label + offset, len);
 198         rc = buf_len - sizeof(*nd_cmd) - len;
 199
 200         return rc;
 201 }
 202
 203 static int nfit_test_cmd_set_config_data(struct nd_cmd_set_config_hdr *nd_cmd,
 204                 unsigned int buf_len, void *label)
 205 {
 206         unsigned int len, offset = nd_cmd->in_offset;
 207         u32 *status;
 208         int rc;
 209
 210         if (buf_len < sizeof(*nd_cmd))
 211                 return -EINVAL;
 212         if (offset >= LABEL_SIZE)
 213                 return -EINVAL;
 214         if (nd_cmd->in_length + sizeof(*nd_cmd) + 4 > buf_len)
 215                 return -EINVAL;
 216
 217         status = (void *)nd_cmd + nd_cmd->in_length + sizeof(*nd_cmd);
 218         *status = 0;
 219         len = min(nd_cmd->in_length, LABEL_SIZE - offset);
 220         memcpy(label + offset, nd_cmd->in_buf, len);
 221         rc = buf_len - sizeof(*nd_cmd) - (len + 4);
 222
 223         return rc;
 224 }
 225
 226 #define NFIT_TEST_ARS_RECORDS 4
 227 #define NFIT_TEST_CLEAR_ERR_UNIT 256
 228
 229 static int nfit_test_cmd_ars_cap(struct nd_cmd_ars_cap *nd_cmd,
 230                 unsigned int buf_len)
 231 {
 232         if (buf_len < sizeof(*nd_cmd))
 233                 return -EINVAL;
 234
 235         nd_cmd->max_ars_out = sizeof(struct nd_cmd_ars_status)
 236                 + NFIT_TEST_ARS_RECORDS * sizeof(struct nd_ars_record);
 237         nd_cmd->status = (ND_ARS_PERSISTENT | ND_ARS_VOLATILE) << 16;
 238         nd_cmd->clear_err_unit = NFIT_TEST_CLEAR_ERR_UNIT;
 239
 240         return 0;
 241 }
 242
 243 /*
 244  * Initialize the ars_state to return an ars_result 1 second in the future with
 245  * a 4K error range in the middle of the requested address range.
 246  */
 247 static void post_ars_status(struct ars_state *ars_state, u64 addr, u64 len)
 248 {
 249         struct nd_cmd_ars_status *ars_status;
 250         struct nd_ars_record *ars_record;
 251
 252         ars_state->deadline = jiffies + 1*HZ;
 253         ars_status = ars_state->ars_status;
 254         ars_status->status = 0;
 255         ars_status->out_length = sizeof(struct nd_cmd_ars_status)
 256                 + sizeof(struct nd_ars_record);
 257         ars_status->address = addr;
 258         ars_status->length = len;
 259         ars_status->type = ND_ARS_PERSISTENT;
 260         ars_status->num_records = 1;
 261         ars_record = &ars_status->records[0];
 262         ars_record->handle = 0;
 263         ars_record->err_address = addr + len / 2;
 264         ars_record->length = SZ_4K;
 265 }
 266
 267 static int nfit_test_cmd_ars_start(struct ars_state *ars_state,
 268                 struct nd_cmd_ars_start *ars_start, unsigned int buf_len,
 269                 int *cmd_rc)
 270 {
 271         if (buf_len < sizeof(*ars_start))
 272                 return -EINVAL;
 273
 274         spin_lock(&ars_state->lock);
 275         if (time_before(jiffies, ars_state->deadline)) {
 276                 ars_start->status = NFIT_ARS_START_BUSY;
 277                 *cmd_rc = -EBUSY;
 278         } else {
 279                 ars_start->status = 0;
 280                 ars_start->scrub_time = 1;
 281                 post_ars_status(ars_state, ars_start->address,
 282                                 ars_start->length);
 283                 *cmd_rc = 0;
 284         }
 285         spin_unlock(&ars_state->lock);
 286
 287         return 0;
 288 }
 289
 290 static int nfit_test_cmd_ars_status(struct ars_state *ars_state,
 291                 struct nd_cmd_ars_status *ars_status, unsigned int buf_len,
 292                 int *cmd_rc)
 293 {
 294         if (buf_len < ars_state->ars_status->out_length)
 295                 return -EINVAL;
 296
 297         spin_lock(&ars_state->lock);
 298         if (time_before(jiffies, ars_state->deadline)) {
 299                 memset(ars_status, 0, buf_len);
 300                 ars_status->status = NFIT_ARS_STATUS_BUSY;
 301                 ars_status->out_length = sizeof(*ars_status);
 302                 *cmd_rc = -EBUSY;
 303         } else {
 304                 memcpy(ars_status, ars_state->ars_status,
 305                                 ars_state->ars_status->out_length);
 306                 *cmd_rc = 0;
 307         }
 308         spin_unlock(&ars_state->lock);
 309         return 0;
 310 }
 311
 312 static int nfit_test_cmd_clear_error(struct nd_cmd_clear_error *clear_err,
 313                 unsigned int buf_len, int *cmd_rc)
 314 {
 315         const u64 mask = NFIT_TEST_CLEAR_ERR_UNIT - 1;
 316         if (buf_len < sizeof(*clear_err))
 317                 return -EINVAL;
 318
 319         if ((clear_err->address & mask) || (clear_err->length & mask))
 320                 return -EINVAL;
 321
 322         /*
 323          * Report 'all clear' success for all commands even though a new
 324          * scrub will find errors again.  This is enough to have the
 325          * error removed from the 'badblocks' tracking in the pmem
 326          * driver.
 327          */
 328         clear_err->status = 0;
 329         clear_err->cleared = clear_err->length;
 330         *cmd_rc = 0;
 331         return 0;
 332 }
 333
 334 static int nfit_test_cmd_smart(struct nd_cmd_smart *smart, unsigned int buf_len)
 335 {
 336         static const struct nd_smart_payload smart_data = {
 337                 .flags = ND_SMART_HEALTH_VALID | ND_SMART_TEMP_VALID
 338                         | ND_SMART_SPARES_VALID | ND_SMART_ALARM_VALID
 339                         | ND_SMART_USED_VALID | ND_SMART_SHUTDOWN_VALID,
 340                 .health = ND_SMART_NON_CRITICAL_HEALTH,
 341                 .temperature = 23 * 16,
 342                 .spares = 75,
 343                 .alarm_flags = ND_SMART_SPARE_TRIP | ND_SMART_TEMP_TRIP,
 344                 .life_used = 5,
 345                 .shutdown_state = 0,
 346                 .vendor_size = 0,
 347         };
 348
 349         if (buf_len < sizeof(*smart))
 350                 return -EINVAL;
 351         memcpy(smart->data, &smart_data, sizeof(smart_data));
 352         return 0;
 353 }
 354
 355 static int nfit_test_cmd_smart_threshold(struct nd_cmd_smart_threshold *smart_t,
 356                 unsigned int buf_len)
 357 {
 358         static const struct nd_smart_threshold_payload smart_t_data = {
 359                 .alarm_control = ND_SMART_SPARE_TRIP | ND_SMART_TEMP_TRIP,
 360                 .temperature = 40 * 16,
 361                 .spares = 5,
 362         };
 363
 364         if (buf_len < sizeof(*smart_t))
 365                 return -EINVAL;
 366         memcpy(smart_t->data, &smart_t_data, sizeof(smart_t_data));
 367         return 0;
 368 }
 369
 370 static int nfit_test_ctl(struct nvdimm_bus_descriptor *nd_desc,
 371                 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
 372                 unsigned int buf_len, int *cmd_rc)
 373 {
 374         struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
 375         struct nfit_test *t = container_of(acpi_desc, typeof(*t), acpi_desc);
 376         unsigned int func = cmd;
 377         int i, rc = 0, __cmd_rc;
 378
 379         if (!cmd_rc)
 380                 cmd_rc = &__cmd_rc;
 381         *cmd_rc = 0;
 382
 383         if (nvdimm) {
 384                 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
 385                 unsigned long cmd_mask = nvdimm_cmd_mask(nvdimm);
 386
 387                 if (!nfit_mem)
 388                         return -ENOTTY;
 389
 390                 if (cmd == ND_CMD_CALL) {
 391                         struct nd_cmd_pkg *call_pkg = buf;
 392
 393                         buf_len = call_pkg->nd_size_in + call_pkg->nd_size_out;
 394                         buf = (void *) call_pkg->nd_payload;
 395                         func = call_pkg->nd_command;
 396                         if (call_pkg->nd_family != nfit_mem->family)
 397                                 return -ENOTTY;
 398                 }
 399
 400                 if (!test_bit(cmd, &cmd_mask)
 401                                 || !test_bit(func, &nfit_mem->dsm_mask))
 402                         return -ENOTTY;
 403
 404                 /* lookup label space for the given dimm */
 405                 for (i = 0; i < ARRAY_SIZE(handle); i++)
 406                         if (__to_nfit_memdev(nfit_mem)->device_handle ==
 407                                         handle[i])
 408                                 break;
 409                 if (i >= ARRAY_SIZE(handle))
 410                         return -ENXIO;
 411
 412                 switch (func) {
 413                 case ND_CMD_GET_CONFIG_SIZE:
 414                         rc = nfit_test_cmd_get_config_size(buf, buf_len);
 415                         break;
 416                 case ND_CMD_GET_CONFIG_DATA:
 417                         rc = nfit_test_cmd_get_config_data(buf, buf_len,
 418                                 t->label[i]);
 419                         break;
 420                 case ND_CMD_SET_CONFIG_DATA:
 421                         rc = nfit_test_cmd_set_config_data(buf, buf_len,
 422                                 t->label[i]);
 423                         break;
 424                 case ND_CMD_SMART:
 425                         rc = nfit_test_cmd_smart(buf, buf_len);
 426                         break;
 427                 case ND_CMD_SMART_THRESHOLD:
 428                         rc = nfit_test_cmd_smart_threshold(buf, buf_len);
 429                         break;
 430                 default:
 431                         return -ENOTTY;
 432                 }
 433         } else {
 434                 struct ars_state *ars_state = &t->ars_state;
 435
 436                 if (!nd_desc || !test_bit(cmd, &nd_desc->cmd_mask))
 437                         return -ENOTTY;
 438
 439                 switch (func) {
 440                 case ND_CMD_ARS_CAP:
 441                         rc = nfit_test_cmd_ars_cap(buf, buf_len);
 442                         break;
 443                 case ND_CMD_ARS_START:
 444                         rc = nfit_test_cmd_ars_start(ars_state, buf, buf_len,
 445                                         cmd_rc);
 446                         break;
 447                 case ND_CMD_ARS_STATUS:
 448                         rc = nfit_test_cmd_ars_status(ars_state, buf, buf_len,
 449                                         cmd_rc);
 450                         break;
 451                 case ND_CMD_CLEAR_ERROR:
 452                         rc = nfit_test_cmd_clear_error(buf, buf_len, cmd_rc);
 453                         break;
 454                 default:
 455                         return -ENOTTY;
 456                 }
 457         }
 458
 459         return rc;
 460 }
 461
 462 static DEFINE_SPINLOCK(nfit_test_lock);
 463 static struct nfit_test *instances[NUM_NFITS];
 464
 465 static void release_nfit_res(void *data)
 466 {
 467         struct nfit_test_resource *nfit_res = data;
 468         struct resource *res = nfit_res->res;
 469
 470         spin_lock(&nfit_test_lock);
 471         list_del(&nfit_res->list);
 472         spin_unlock(&nfit_test_lock);
 473
 474         vfree(nfit_res->buf);
 475         kfree(res);
 476         kfree(nfit_res);
 477 }
 478
 479 static void *__test_alloc(struct nfit_test *t, size_t size, dma_addr_t *dma,
 480                 void *buf)
 481 {
 482         struct device *dev = &t->pdev.dev;
 483         struct resource *res = kzalloc(sizeof(*res) * 2, GFP_KERNEL);
 484         struct nfit_test_resource *nfit_res = kzalloc(sizeof(*nfit_res),
 485                         GFP_KERNEL);
 486         int rc;
 487
 488         if (!res || !buf || !nfit_res)
 489                 goto err;
 490         rc = devm_add_action(dev, release_nfit_res, nfit_res);
 491         if (rc)
 492                 goto err;
 493         INIT_LIST_HEAD(&nfit_res->list);
 494         memset(buf, 0, size);
 495         nfit_res->dev = dev;
 496         nfit_res->buf = buf;
 497         nfit_res->res = res;
 498         res->start = *dma;
 499         res->end = *dma + size - 1;
 500         res->name = "NFIT";
 501         spin_lock(&nfit_test_lock);
 502         list_add(&nfit_res->list, &t->resources);
 503         spin_unlock(&nfit_test_lock);
 504
 505         return nfit_res->buf;
 506  err:
 507         if (buf)
 508                 vfree(buf);
 509         kfree(res);
 510         kfree(nfit_res);
 511         return NULL;
 512 }
 513
 514 static void *test_alloc(struct nfit_test *t, size_t size, dma_addr_t *dma)
 515 {
 516         void *buf = vmalloc(size);
 517
 518         *dma = (unsigned long) buf;
 519         return __test_alloc(t, size, dma, buf);
 520 }
 521
 522 static struct nfit_test_resource *nfit_test_lookup(resource_size_t addr)
 523 {
 524         int i;
 525
 526         for (i = 0; i < ARRAY_SIZE(instances); i++) {
 527                 struct nfit_test_resource *n, *nfit_res = NULL;
 528                 struct nfit_test *t = instances[i];
 529
 530                 if (!t)
 531                         continue;
 532                 spin_lock(&nfit_test_lock);
 533                 list_for_each_entry(n, &t->resources, list) {
 534                         if (addr >= n->res->start && (addr < n->res->start
 535                                                 + resource_size(n->res))) {
 536                                 nfit_res = n;
 537                                 break;
 538                         } else if (addr >= (unsigned long) n->buf
 539                                         && (addr < (unsigned long) n->buf
 540                                                 + resource_size(n->res))) {
 541                                 nfit_res = n;
 542                                 break;
 543                         }
 544                 }
 545                 spin_unlock(&nfit_test_lock);
 546                 if (nfit_res)
 547                         return nfit_res;
 548         }
 549
 550         return NULL;
 551 }
 552
 553 static int ars_state_init(struct device *dev, struct ars_state *ars_state)
 554 {
 555         ars_state->ars_status = devm_kzalloc(dev,
 556                         sizeof(struct nd_cmd_ars_status)
 557                         + sizeof(struct nd_ars_record) * NFIT_TEST_ARS_RECORDS,
 558                         GFP_KERNEL);
 559         if (!ars_state->ars_status)
 560                 return -ENOMEM;
 561         spin_lock_init(&ars_state->lock);
 562         return 0;
 563 }
 564
 565 static int nfit_test0_alloc(struct nfit_test *t)
 566 {
 567         size_t nfit_size = sizeof(struct acpi_nfit_system_address) * NUM_SPA
 568                         + sizeof(struct acpi_nfit_memory_map) * NUM_MEM
 569                         + sizeof(struct acpi_nfit_control_region) * NUM_DCR
 570                         + offsetof(struct acpi_nfit_control_region,
 571                                         window_size) * NUM_DCR
 572                         + sizeof(struct acpi_nfit_data_region) * NUM_BDW
 573                         + (sizeof(struct acpi_nfit_flush_address)
 574                                         + sizeof(u64) * NUM_HINTS) * NUM_DCR;
 575         int i;
 576
 577         t->nfit_buf = test_alloc(t, nfit_size, &t->nfit_dma);
 578         if (!t->nfit_buf)
 579                 return -ENOMEM;
 580         t->nfit_size = nfit_size;
 581
 582         t->spa_set[0] = test_alloc(t, SPA0_SIZE, &t->spa_set_dma[0]);
 583         if (!t->spa_set[0])
 584                 return -ENOMEM;
 585
 586         t->spa_set[1] = test_alloc(t, SPA1_SIZE, &t->spa_set_dma[1]);
 587         if (!t->spa_set[1])
 588                 return -ENOMEM;
 589
 590         t->spa_set[2] = test_alloc(t, SPA0_SIZE, &t->spa_set_dma[2]);
 591         if (!t->spa_set[2])
 592                 return -ENOMEM;
 593
 594         for (i = 0; i < NUM_DCR; i++) {
 595                 t->dimm[i] = test_alloc(t, DIMM_SIZE, &t->dimm_dma[i]);
 596                 if (!t->dimm[i])
 597                         return -ENOMEM;
 598
 599                 t->label[i] = test_alloc(t, LABEL_SIZE, &t->label_dma[i]);
 600                 if (!t->label[i])
 601                         return -ENOMEM;
 602                 sprintf(t->label[i], "label%d", i);
 603
 604                 t->flush[i] = test_alloc(t, sizeof(u64) * NUM_HINTS,
 605                                 &t->flush_dma[i]);
 606                 if (!t->flush[i])
 607                         return -ENOMEM;
 608         }
 609
 610         for (i = 0; i < NUM_DCR; i++) {
 611                 t->dcr[i] = test_alloc(t, LABEL_SIZE, &t->dcr_dma[i]);
 612                 if (!t->dcr[i])
 613                         return -ENOMEM;
 614         }
 615
 616         return ars_state_init(&t->pdev.dev, &t->ars_state);
 617 }
 618
 619 static int nfit_test1_alloc(struct nfit_test *t)
 620 {
 621         size_t nfit_size = sizeof(struct acpi_nfit_system_address)
 622                 + sizeof(struct acpi_nfit_memory_map)
 623                 + offsetof(struct acpi_nfit_control_region, window_size);
 624
 625         t->nfit_buf = test_alloc(t, nfit_size, &t->nfit_dma);
 626         if (!t->nfit_buf)
 627                 return -ENOMEM;
 628         t->nfit_size = nfit_size;
 629
 630         t->spa_set[0] = test_alloc(t, SPA2_SIZE, &t->spa_set_dma[0]);
 631         if (!t->spa_set[0])
 632                 return -ENOMEM;
 633
 634         return ars_state_init(&t->pdev.dev, &t->ars_state);
 635 }
 636
 637 static void nfit_test0_setup(struct nfit_test *t)
 638 {
 639         const int flush_hint_size = sizeof(struct acpi_nfit_flush_address)
 640                 + (sizeof(u64) * NUM_HINTS);
 641         struct acpi_nfit_desc *acpi_desc;
 642         struct acpi_nfit_memory_map *memdev;
 643         void *nfit_buf = t->nfit_buf;
 644         struct acpi_nfit_system_address *spa;
 645         struct acpi_nfit_control_region *dcr;
 646         struct acpi_nfit_data_region *bdw;
 647         struct acpi_nfit_flush_address *flush;
 648         unsigned int offset, i;
 649
 650         /*
 651          * spa0 (interleave first half of dimm0 and dimm1, note storage
 652          * does not actually alias the related block-data-window
 653          * regions)
 654          */
 655         spa = nfit_buf;
 656         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 657         spa->header.length = sizeof(*spa);
 658         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
 659         spa->range_index = 0+1;
 660         spa->address = t->spa_set_dma[0];
 661         spa->length = SPA0_SIZE;
 662
 663         /*
 664          * spa1 (interleave last half of the 4 DIMMS, note storage
 665          * does not actually alias the related block-data-window
 666          * regions)
 667          */
 668         spa = nfit_buf + sizeof(*spa);
 669         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 670         spa->header.length = sizeof(*spa);
 671         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
 672         spa->range_index = 1+1;
 673         spa->address = t->spa_set_dma[1];
 674         spa->length = SPA1_SIZE;
 675
 676         /* spa2 (dcr0) dimm0 */
 677         spa = nfit_buf + sizeof(*spa) * 2;
 678         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 679         spa->header.length = sizeof(*spa);
 680         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
 681         spa->range_index = 2+1;
 682         spa->address = t->dcr_dma[0];
 683         spa->length = DCR_SIZE;
 684
 685         /* spa3 (dcr1) dimm1 */
 686         spa = nfit_buf + sizeof(*spa) * 3;
 687         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 688         spa->header.length = sizeof(*spa);
 689         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
 690         spa->range_index = 3+1;
 691         spa->address = t->dcr_dma[1];
 692         spa->length = DCR_SIZE;
 693
 694         /* spa4 (dcr2) dimm2 */
 695         spa = nfit_buf + sizeof(*spa) * 4;
 696         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 697         spa->header.length = sizeof(*spa);
 698         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
 699         spa->range_index = 4+1;
 700         spa->address = t->dcr_dma[2];
 701         spa->length = DCR_SIZE;
 702
 703         /* spa5 (dcr3) dimm3 */
 704         spa = nfit_buf + sizeof(*spa) * 5;
 705         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 706         spa->header.length = sizeof(*spa);
 707         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
 708         spa->range_index = 5+1;
 709         spa->address = t->dcr_dma[3];
 710         spa->length = DCR_SIZE;
 711
 712         /* spa6 (bdw for dcr0) dimm0 */
 713         spa = nfit_buf + sizeof(*spa) * 6;
 714         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 715         spa->header.length = sizeof(*spa);
 716         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
 717         spa->range_index = 6+1;
 718         spa->address = t->dimm_dma[0];
 719         spa->length = DIMM_SIZE;
 720
 721         /* spa7 (bdw for dcr1) dimm1 */
 722         spa = nfit_buf + sizeof(*spa) * 7;
 723         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 724         spa->header.length = sizeof(*spa);
 725         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
 726         spa->range_index = 7+1;
 727         spa->address = t->dimm_dma[1];
 728         spa->length = DIMM_SIZE;
 729
 730         /* spa8 (bdw for dcr2) dimm2 */
 731         spa = nfit_buf + sizeof(*spa) * 8;
 732         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 733         spa->header.length = sizeof(*spa);
 734         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
 735         spa->range_index = 8+1;
 736         spa->address = t->dimm_dma[2];
 737         spa->length = DIMM_SIZE;
 738
 739         /* spa9 (bdw for dcr3) dimm3 */
 740         spa = nfit_buf + sizeof(*spa) * 9;
 741         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
 742         spa->header.length = sizeof(*spa);
 743         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
 744         spa->range_index = 9+1;
 745         spa->address = t->dimm_dma[3];
 746         spa->length = DIMM_SIZE;
 747
 748         offset = sizeof(*spa) * 10;
 749         /* mem-region0 (spa0, dimm0) */
 750         memdev = nfit_buf + offset;
 751         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 752         memdev->header.length = sizeof(*memdev);
 753         memdev->device_handle = handle[0];
 754         memdev->physical_id = 0;
 755         memdev->region_id = 0;
 756         memdev->range_index = 0+1;
 757         memdev->region_index = 4+1;
 758         memdev->region_size = SPA0_SIZE/2;
 759         memdev->region_offset = t->spa_set_dma[0];
 760         memdev->address = 0;
 761         memdev->interleave_index = 0;
 762         memdev->interleave_ways = 2;
 763
 764         /* mem-region1 (spa0, dimm1) */
 765         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map);
 766         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 767         memdev->header.length = sizeof(*memdev);
 768         memdev->device_handle = handle[1];
 769         memdev->physical_id = 1;
 770         memdev->region_id = 0;
 771         memdev->range_index = 0+1;
 772         memdev->region_index = 5+1;
 773         memdev->region_size = SPA0_SIZE/2;
 774         memdev->region_offset = t->spa_set_dma[0] + SPA0_SIZE/2;
 775         memdev->address = 0;
 776         memdev->interleave_index = 0;
 777         memdev->interleave_ways = 2;
 778
 779         /* mem-region2 (spa1, dimm0) */
 780         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 2;
 781         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 782         memdev->header.length = sizeof(*memdev);
 783         memdev->device_handle = handle[0];
 784         memdev->physical_id = 0;
 785         memdev->region_id = 1;
 786         memdev->range_index = 1+1;
 787         memdev->region_index = 4+1;
 788         memdev->region_size = SPA1_SIZE/4;
 789         memdev->region_offset = t->spa_set_dma[1];
 790         memdev->address = SPA0_SIZE/2;
 791         memdev->interleave_index = 0;
 792         memdev->interleave_ways = 4;
 793
 794         /* mem-region3 (spa1, dimm1) */
 795         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 3;
 796         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 797         memdev->header.length = sizeof(*memdev);
 798         memdev->device_handle = handle[1];
 799         memdev->physical_id = 1;
 800         memdev->region_id = 1;
 801         memdev->range_index = 1+1;
 802         memdev->region_index = 5+1;
 803         memdev->region_size = SPA1_SIZE/4;
 804         memdev->region_offset = t->spa_set_dma[1] + SPA1_SIZE/4;
 805         memdev->address = SPA0_SIZE/2;
 806         memdev->interleave_index = 0;
 807         memdev->interleave_ways = 4;
 808
 809         /* mem-region4 (spa1, dimm2) */
 810         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 4;
 811         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 812         memdev->header.length = sizeof(*memdev);
 813         memdev->device_handle = handle[2];
 814         memdev->physical_id = 2;
 815         memdev->region_id = 0;
 816         memdev->range_index = 1+1;
 817         memdev->region_index = 6+1;
 818         memdev->region_size = SPA1_SIZE/4;
 819         memdev->region_offset = t->spa_set_dma[1] + 2*SPA1_SIZE/4;
 820         memdev->address = SPA0_SIZE/2;
 821         memdev->interleave_index = 0;
 822         memdev->interleave_ways = 4;
 823
 824         /* mem-region5 (spa1, dimm3) */
 825         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 5;
 826         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 827         memdev->header.length = sizeof(*memdev);
 828         memdev->device_handle = handle[3];
 829         memdev->physical_id = 3;
 830         memdev->region_id = 0;
 831         memdev->range_index = 1+1;
 832         memdev->region_index = 7+1;
 833         memdev->region_size = SPA1_SIZE/4;
 834         memdev->region_offset = t->spa_set_dma[1] + 3*SPA1_SIZE/4;
 835         memdev->address = SPA0_SIZE/2;
 836         memdev->interleave_index = 0;
 837         memdev->interleave_ways = 4;
 838
 839         /* mem-region6 (spa/dcr0, dimm0) */
 840         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 6;
 841         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 842         memdev->header.length = sizeof(*memdev);
 843         memdev->device_handle = handle[0];
 844         memdev->physical_id = 0;
 845         memdev->region_id = 0;
 846         memdev->range_index = 2+1;
 847         memdev->region_index = 0+1;
 848         memdev->region_size = 0;
 849         memdev->region_offset = 0;
 850         memdev->address = 0;
 851         memdev->interleave_index = 0;
 852         memdev->interleave_ways = 1;
 853
 854         /* mem-region7 (spa/dcr1, dimm1) */
 855         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 7;
 856         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 857         memdev->header.length = sizeof(*memdev);
 858         memdev->device_handle = handle[1];
 859         memdev->physical_id = 1;
 860         memdev->region_id = 0;
 861         memdev->range_index = 3+1;
 862         memdev->region_index = 1+1;
 863         memdev->region_size = 0;
 864         memdev->region_offset = 0;
 865         memdev->address = 0;
 866         memdev->interleave_index = 0;
 867         memdev->interleave_ways = 1;
 868
 869         /* mem-region8 (spa/dcr2, dimm2) */
 870         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 8;
 871         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 872         memdev->header.length = sizeof(*memdev);
 873         memdev->device_handle = handle[2];
 874         memdev->physical_id = 2;
 875         memdev->region_id = 0;
 876         memdev->range_index = 4+1;
 877         memdev->region_index = 2+1;
 878         memdev->region_size = 0;
 879         memdev->region_offset = 0;
 880         memdev->address = 0;
 881         memdev->interleave_index = 0;
 882         memdev->interleave_ways = 1;
 883
 884         /* mem-region9 (spa/dcr3, dimm3) */
 885         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 9;
 886         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 887         memdev->header.length = sizeof(*memdev);
 888         memdev->device_handle = handle[3];
 889         memdev->physical_id = 3;
 890         memdev->region_id = 0;
 891         memdev->range_index = 5+1;
 892         memdev->region_index = 3+1;
 893         memdev->region_size = 0;
 894         memdev->region_offset = 0;
 895         memdev->address = 0;
 896         memdev->interleave_index = 0;
 897         memdev->interleave_ways = 1;
 898
 899         /* mem-region10 (spa/bdw0, dimm0) */
 900         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 10;
 901         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 902         memdev->header.length = sizeof(*memdev);
 903         memdev->device_handle = handle[0];
 904         memdev->physical_id = 0;
 905         memdev->region_id = 0;
 906         memdev->range_index = 6+1;
 907         memdev->region_index = 0+1;
 908         memdev->region_size = 0;
 909         memdev->region_offset = 0;
 910         memdev->address = 0;
 911         memdev->interleave_index = 0;
 912         memdev->interleave_ways = 1;
 913
 914         /* mem-region11 (spa/bdw1, dimm1) */
 915         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 11;
 916         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 917         memdev->header.length = sizeof(*memdev);
 918         memdev->device_handle = handle[1];
 919         memdev->physical_id = 1;
 920         memdev->region_id = 0;
 921         memdev->range_index = 7+1;
 922         memdev->region_index = 1+1;
 923         memdev->region_size = 0;
 924         memdev->region_offset = 0;
 925         memdev->address = 0;
 926         memdev->interleave_index = 0;
 927         memdev->interleave_ways = 1;
 928
 929         /* mem-region12 (spa/bdw2, dimm2) */
 930         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 12;
 931         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 932         memdev->header.length = sizeof(*memdev);
 933         memdev->device_handle = handle[2];
 934         memdev->physical_id = 2;
 935         memdev->region_id = 0;
 936         memdev->range_index = 8+1;
 937         memdev->region_index = 2+1;
 938         memdev->region_size = 0;
 939         memdev->region_offset = 0;
 940         memdev->address = 0;
 941         memdev->interleave_index = 0;
 942         memdev->interleave_ways = 1;
 943
 944         /* mem-region13 (spa/dcr3, dimm3) */
 945         memdev = nfit_buf + offset + sizeof(struct acpi_nfit_memory_map) * 13;
 946         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
 947         memdev->header.length = sizeof(*memdev);
 948         memdev->device_handle = handle[3];
 949         memdev->physical_id = 3;
 950         memdev->region_id = 0;
 951         memdev->range_index = 9+1;
 952         memdev->region_index = 3+1;
 953         memdev->region_size = 0;
 954         memdev->region_offset = 0;
 955         memdev->address = 0;
 956         memdev->interleave_index = 0;
 957         memdev->interleave_ways = 1;
 958
 959         offset = offset + sizeof(struct acpi_nfit_memory_map) * 14;
 960         /* dcr-descriptor0: blk */
 961         dcr = nfit_buf + offset;
 962         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 963         dcr->header.length = sizeof(struct acpi_nfit_control_region);
 964         dcr->region_index = 0+1;
 965         dcr->vendor_id = 0xabcd;
 966         dcr->device_id = 0;
 967         dcr->revision_id = 1;
 968         dcr->serial_number = ~handle[0];
 969         dcr->code = NFIT_FIC_BLK;
 970         dcr->windows = 1;
 971         dcr->window_size = DCR_SIZE;
 972         dcr->command_offset = 0;
 973         dcr->command_size = 8;
 974         dcr->status_offset = 8;
 975         dcr->status_size = 4;
 976
 977         /* dcr-descriptor1: blk */
 978         dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region);
 979         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 980         dcr->header.length = sizeof(struct acpi_nfit_control_region);
 981         dcr->region_index = 1+1;
 982         dcr->vendor_id = 0xabcd;
 983         dcr->device_id = 0;
 984         dcr->revision_id = 1;
 985         dcr->serial_number = ~handle[1];
 986         dcr->code = NFIT_FIC_BLK;
 987         dcr->windows = 1;
 988         dcr->window_size = DCR_SIZE;
 989         dcr->command_offset = 0;
 990         dcr->command_size = 8;
 991         dcr->status_offset = 8;
 992         dcr->status_size = 4;
 993
 994         /* dcr-descriptor2: blk */
 995         dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region) * 2;
 996         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
 997         dcr->header.length = sizeof(struct acpi_nfit_control_region);
 998         dcr->region_index = 2+1;
 999         dcr->vendor_id = 0xabcd;
1000         dcr->device_id = 0;
1001         dcr->revision_id = 1;
1002         dcr->serial_number = ~handle[2];
1003         dcr->code = NFIT_FIC_BLK;
1004         dcr->windows = 1;
1005         dcr->window_size = DCR_SIZE;
1006         dcr->command_offset = 0;
1007         dcr->command_size = 8;
1008         dcr->status_offset = 8;
1009         dcr->status_size = 4;
1010
1011         /* dcr-descriptor3: blk */
1012         dcr = nfit_buf + offset + sizeof(struct acpi_nfit_control_region) * 3;
1013         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1014         dcr->header.length = sizeof(struct acpi_nfit_control_region);
1015         dcr->region_index = 3+1;
1016         dcr->vendor_id = 0xabcd;
1017         dcr->device_id = 0;
1018         dcr->revision_id = 1;
1019         dcr->serial_number = ~handle[3];
1020         dcr->code = NFIT_FIC_BLK;
1021         dcr->windows = 1;
1022         dcr->window_size = DCR_SIZE;
1023         dcr->command_offset = 0;
1024         dcr->command_size = 8;
1025         dcr->status_offset = 8;
1026         dcr->status_size = 4;
1027
1028         offset = offset + sizeof(struct acpi_nfit_control_region) * 4;
1029         /* dcr-descriptor0: pmem */
1030         dcr = nfit_buf + offset;
1031         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1032         dcr->header.length = offsetof(struct acpi_nfit_control_region,
1033                         window_size);
1034         dcr->region_index = 4+1;
1035         dcr->vendor_id = 0xabcd;
1036         dcr->device_id = 0;
1037         dcr->revision_id = 1;
1038         dcr->serial_number = ~handle[0];
1039         dcr->code = NFIT_FIC_BYTEN;
1040         dcr->windows = 0;
1041
1042         /* dcr-descriptor1: pmem */
1043         dcr = nfit_buf + offset + offsetof(struct acpi_nfit_control_region,
1044                         window_size);
1045         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1046         dcr->header.length = offsetof(struct acpi_nfit_control_region,
1047                         window_size);
1048         dcr->region_index = 5+1;
1049         dcr->vendor_id = 0xabcd;
1050         dcr->device_id = 0;
1051         dcr->revision_id = 1;
1052         dcr->serial_number = ~handle[1];
1053         dcr->code = NFIT_FIC_BYTEN;
1054         dcr->windows = 0;
1055
1056         /* dcr-descriptor2: pmem */
1057         dcr = nfit_buf + offset + offsetof(struct acpi_nfit_control_region,
1058                         window_size) * 2;
1059         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1060         dcr->header.length = offsetof(struct acpi_nfit_control_region,
1061                         window_size);
1062         dcr->region_index = 6+1;
1063         dcr->vendor_id = 0xabcd;
1064         dcr->device_id = 0;
1065         dcr->revision_id = 1;
1066         dcr->serial_number = ~handle[2];
1067         dcr->code = NFIT_FIC_BYTEN;
1068         dcr->windows = 0;
1069
1070         /* dcr-descriptor3: pmem */
1071         dcr = nfit_buf + offset + offsetof(struct acpi_nfit_control_region,
1072                         window_size) * 3;
1073         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1074         dcr->header.length = offsetof(struct acpi_nfit_control_region,
1075                         window_size);
1076         dcr->region_index = 7+1;
1077         dcr->vendor_id = 0xabcd;
1078         dcr->device_id = 0;
1079         dcr->revision_id = 1;
1080         dcr->serial_number = ~handle[3];
1081         dcr->code = NFIT_FIC_BYTEN;
1082         dcr->windows = 0;
1083
1084         offset = offset + offsetof(struct acpi_nfit_control_region,
1085                         window_size) * 4;
1086         /* bdw0 (spa/dcr0, dimm0) */
1087         bdw = nfit_buf + offset;
1088         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
1089         bdw->header.length = sizeof(struct acpi_nfit_data_region);
1090         bdw->region_index = 0+1;
1091         bdw->windows = 1;
1092         bdw->offset = 0;
1093         bdw->size = BDW_SIZE;
1094         bdw->capacity = DIMM_SIZE;
1095         bdw->start_address = 0;
1096
1097         /* bdw1 (spa/dcr1, dimm1) */
1098         bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region);
1099         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
1100         bdw->header.length = sizeof(struct acpi_nfit_data_region);
1101         bdw->region_index = 1+1;
1102         bdw->windows = 1;
1103         bdw->offset = 0;
1104         bdw->size = BDW_SIZE;
1105         bdw->capacity = DIMM_SIZE;
1106         bdw->start_address = 0;
1107
1108         /* bdw2 (spa/dcr2, dimm2) */
1109         bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region) * 2;
1110         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
1111         bdw->header.length = sizeof(struct acpi_nfit_data_region);
1112         bdw->region_index = 2+1;
1113         bdw->windows = 1;
1114         bdw->offset = 0;
1115         bdw->size = BDW_SIZE;
1116         bdw->capacity = DIMM_SIZE;
1117         bdw->start_address = 0;
1118
1119         /* bdw3 (spa/dcr3, dimm3) */
1120         bdw = nfit_buf + offset + sizeof(struct acpi_nfit_data_region) * 3;
1121         bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
1122         bdw->header.length = sizeof(struct acpi_nfit_data_region);
1123         bdw->region_index = 3+1;
1124         bdw->windows = 1;
1125         bdw->offset = 0;
1126         bdw->size = BDW_SIZE;
1127         bdw->capacity = DIMM_SIZE;
1128         bdw->start_address = 0;
1129
1130         offset = offset + sizeof(struct acpi_nfit_data_region) * 4;
1131         /* flush0 (dimm0) */
1132         flush = nfit_buf + offset;
1133         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1134         flush->header.length = flush_hint_size;
1135         flush->device_handle = handle[0];
1136         flush->hint_count = NUM_HINTS;
1137         for (i = 0; i < NUM_HINTS; i++)
1138                 flush->hint_address[i] = t->flush_dma[0] + i * sizeof(u64);
1139
1140         /* flush1 (dimm1) */
1141         flush = nfit_buf + offset + flush_hint_size * 1;
1142         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1143         flush->header.length = flush_hint_size;
1144         flush->device_handle = handle[1];
1145         flush->hint_count = NUM_HINTS;
1146         for (i = 0; i < NUM_HINTS; i++)
1147                 flush->hint_address[i] = t->flush_dma[1] + i * sizeof(u64);
1148
1149         /* flush2 (dimm2) */
1150         flush = nfit_buf + offset + flush_hint_size  * 2;
1151         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1152         flush->header.length = flush_hint_size;
1153         flush->device_handle = handle[2];
1154         flush->hint_count = NUM_HINTS;
1155         for (i = 0; i < NUM_HINTS; i++)
1156                 flush->hint_address[i] = t->flush_dma[2] + i * sizeof(u64);
1157
1158         /* flush3 (dimm3) */
1159         flush = nfit_buf + offset + flush_hint_size * 3;
1160         flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1161         flush->header.length = flush_hint_size;
1162         flush->device_handle = handle[3];
1163         flush->hint_count = NUM_HINTS;
1164         for (i = 0; i < NUM_HINTS; i++)
1165                 flush->hint_address[i] = t->flush_dma[3] + i * sizeof(u64);
1166
1167         if (t->setup_hotplug) {
1168                 offset = offset + flush_hint_size * 4;
1169                 /* dcr-descriptor4: blk */
1170                 dcr = nfit_buf + offset;
1171                 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1172                 dcr->header.length = sizeof(struct acpi_nfit_control_region);
1173                 dcr->region_index = 8+1;
1174                 dcr->vendor_id = 0xabcd;
1175                 dcr->device_id = 0;
1176                 dcr->revision_id = 1;
1177                 dcr->serial_number = ~handle[4];
1178                 dcr->code = NFIT_FIC_BLK;
1179                 dcr->windows = 1;
1180                 dcr->window_size = DCR_SIZE;
1181                 dcr->command_offset = 0;
1182                 dcr->command_size = 8;
1183                 dcr->status_offset = 8;
1184                 dcr->status_size = 4;
1185
1186                 offset = offset + sizeof(struct acpi_nfit_control_region);
1187                 /* dcr-descriptor4: pmem */
1188                 dcr = nfit_buf + offset;
1189                 dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1190                 dcr->header.length = offsetof(struct acpi_nfit_control_region,
1191                                 window_size);
1192                 dcr->region_index = 9+1;
1193                 dcr->vendor_id = 0xabcd;
1194                 dcr->device_id = 0;
1195                 dcr->revision_id = 1;
1196                 dcr->serial_number = ~handle[4];
1197                 dcr->code = NFIT_FIC_BYTEN;
1198                 dcr->windows = 0;
1199
1200                 offset = offset + offsetof(struct acpi_nfit_control_region,
1201                                 window_size);
1202                 /* bdw4 (spa/dcr4, dimm4) */
1203                 bdw = nfit_buf + offset;
1204                 bdw->header.type = ACPI_NFIT_TYPE_DATA_REGION;
1205                 bdw->header.length = sizeof(struct acpi_nfit_data_region);
1206                 bdw->region_index = 8+1;
1207                 bdw->windows = 1;
1208                 bdw->offset = 0;
1209                 bdw->size = BDW_SIZE;
1210                 bdw->capacity = DIMM_SIZE;
1211                 bdw->start_address = 0;
1212
1213                 offset = offset + sizeof(struct acpi_nfit_data_region);
1214                 /* spa10 (dcr4) dimm4 */
1215                 spa = nfit_buf + offset;
1216                 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1217                 spa->header.length = sizeof(*spa);
1218                 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_DCR), 16);
1219                 spa->range_index = 10+1;
1220                 spa->address = t->dcr_dma[4];
1221                 spa->length = DCR_SIZE;
1222
1223                 /*
1224                  * spa11 (single-dimm interleave for hotplug, note storage
1225                  * does not actually alias the related block-data-window
1226                  * regions)
1227                  */
1228                 spa = nfit_buf + offset + sizeof(*spa);
1229                 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1230                 spa->header.length = sizeof(*spa);
1231                 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
1232                 spa->range_index = 11+1;
1233                 spa->address = t->spa_set_dma[2];
1234                 spa->length = SPA0_SIZE;
1235
1236                 /* spa12 (bdw for dcr4) dimm4 */
1237                 spa = nfit_buf + offset + sizeof(*spa) * 2;
1238                 spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1239                 spa->header.length = sizeof(*spa);
1240                 memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_BDW), 16);
1241                 spa->range_index = 12+1;
1242                 spa->address = t->dimm_dma[4];
1243                 spa->length = DIMM_SIZE;
1244
1245                 offset = offset + sizeof(*spa) * 3;
1246                 /* mem-region14 (spa/dcr4, dimm4) */
1247                 memdev = nfit_buf + offset;
1248                 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1249                 memdev->header.length = sizeof(*memdev);
1250                 memdev->device_handle = handle[4];
1251                 memdev->physical_id = 4;
1252                 memdev->region_id = 0;
1253                 memdev->range_index = 10+1;
1254                 memdev->region_index = 8+1;
1255                 memdev->region_size = 0;
1256                 memdev->region_offset = 0;
1257                 memdev->address = 0;
1258                 memdev->interleave_index = 0;
1259                 memdev->interleave_ways = 1;
1260
1261                 /* mem-region15 (spa0, dimm4) */
1262                 memdev = nfit_buf + offset +
1263                                 sizeof(struct acpi_nfit_memory_map);
1264                 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1265                 memdev->header.length = sizeof(*memdev);
1266                 memdev->device_handle = handle[4];
1267                 memdev->physical_id = 4;
1268                 memdev->region_id = 0;
1269                 memdev->range_index = 11+1;
1270                 memdev->region_index = 9+1;
1271                 memdev->region_size = SPA0_SIZE;
1272                 memdev->region_offset = t->spa_set_dma[2];
1273                 memdev->address = 0;
1274                 memdev->interleave_index = 0;
1275                 memdev->interleave_ways = 1;
1276
1277                 /* mem-region16 (spa/bdw4, dimm4) */
1278                 memdev = nfit_buf + offset +
1279                                 sizeof(struct acpi_nfit_memory_map) * 2;
1280                 memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1281                 memdev->header.length = sizeof(*memdev);
1282                 memdev->device_handle = handle[4];
1283                 memdev->physical_id = 4;
1284                 memdev->region_id = 0;
1285                 memdev->range_index = 12+1;
1286                 memdev->region_index = 8+1;
1287                 memdev->region_size = 0;
1288                 memdev->region_offset = 0;
1289                 memdev->address = 0;
1290                 memdev->interleave_index = 0;
1291                 memdev->interleave_ways = 1;
1292
1293                 offset = offset + sizeof(struct acpi_nfit_memory_map) * 3;
1294                 /* flush3 (dimm4) */
1295                 flush = nfit_buf + offset;
1296                 flush->header.type = ACPI_NFIT_TYPE_FLUSH_ADDRESS;
1297                 flush->header.length = flush_hint_size;
1298                 flush->device_handle = handle[4];
1299                 flush->hint_count = NUM_HINTS;
1300                 for (i = 0; i < NUM_HINTS; i++)
1301                         flush->hint_address[i] = t->flush_dma[4]
1302                                 + i * sizeof(u64);
1303         }
1304
1305         post_ars_status(&t->ars_state, t->spa_set_dma[0], SPA0_SIZE);
1306
1307         acpi_desc = &t->acpi_desc;
1308         set_bit(ND_CMD_GET_CONFIG_SIZE, &acpi_desc->dimm_cmd_force_en);
1309         set_bit(ND_CMD_GET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en);
1310         set_bit(ND_CMD_SET_CONFIG_DATA, &acpi_desc->dimm_cmd_force_en);
1311         set_bit(ND_CMD_SMART, &acpi_desc->dimm_cmd_force_en);
1312         set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_cmd_force_en);
1313         set_bit(ND_CMD_ARS_START, &acpi_desc->bus_cmd_force_en);
1314         set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_cmd_force_en);
1315         set_bit(ND_CMD_CLEAR_ERROR, &acpi_desc->bus_cmd_force_en);
1316         set_bit(ND_CMD_SMART_THRESHOLD, &acpi_desc->dimm_cmd_force_en);
1317 }
1318
1319 static void nfit_test1_setup(struct nfit_test *t)
1320 {
1321         size_t offset;
1322         void *nfit_buf = t->nfit_buf;
1323         struct acpi_nfit_memory_map *memdev;
1324         struct acpi_nfit_control_region *dcr;
1325         struct acpi_nfit_system_address *spa;
1326         struct acpi_nfit_desc *acpi_desc;
1327
1328         offset = 0;
1329         /* spa0 (flat range with no bdw aliasing) */
1330         spa = nfit_buf + offset;
1331         spa->header.type = ACPI_NFIT_TYPE_SYSTEM_ADDRESS;
1332         spa->header.length = sizeof(*spa);
1333         memcpy(spa->range_guid, to_nfit_uuid(NFIT_SPA_PM), 16);
1334         spa->range_index = 0+1;
1335         spa->address = t->spa_set_dma[0];
1336         spa->length = SPA2_SIZE;
1337
1338         offset += sizeof(*spa);
1339         /* mem-region0 (spa0, dimm0) */
1340         memdev = nfit_buf + offset;
1341         memdev->header.type = ACPI_NFIT_TYPE_MEMORY_MAP;
1342         memdev->header.length = sizeof(*memdev);
1343         memdev->device_handle = 0;
1344         memdev->physical_id = 0;
1345         memdev->region_id = 0;
1346         memdev->range_index = 0+1;
1347         memdev->region_index = 0+1;
1348         memdev->region_size = SPA2_SIZE;
1349         memdev->region_offset = 0;
1350         memdev->address = 0;
1351         memdev->interleave_index = 0;
1352         memdev->interleave_ways = 1;
1353         memdev->flags = ACPI_NFIT_MEM_SAVE_FAILED | ACPI_NFIT_MEM_RESTORE_FAILED
1354                 | ACPI_NFIT_MEM_FLUSH_FAILED | ACPI_NFIT_MEM_HEALTH_OBSERVED
1355                 | ACPI_NFIT_MEM_NOT_ARMED;
1356
1357         offset += sizeof(*memdev);
1358         /* dcr-descriptor0 */
1359         dcr = nfit_buf + offset;
1360         dcr->header.type = ACPI_NFIT_TYPE_CONTROL_REGION;
1361         dcr->header.length = offsetof(struct acpi_nfit_control_region,
1362                         window_size);
1363         dcr->region_index = 0+1;
1364         dcr->vendor_id = 0xabcd;
1365         dcr->device_id = 0;
1366         dcr->revision_id = 1;
1367         dcr->serial_number = ~0;
1368         dcr->code = NFIT_FIC_BYTE;
1369         dcr->windows = 0;
1370
1371         post_ars_status(&t->ars_state, t->spa_set_dma[0], SPA2_SIZE);
1372
1373         acpi_desc = &t->acpi_desc;
1374         set_bit(ND_CMD_ARS_CAP, &acpi_desc->bus_cmd_force_en);
1375         set_bit(ND_CMD_ARS_START, &acpi_desc->bus_cmd_force_en);
1376         set_bit(ND_CMD_ARS_STATUS, &acpi_desc->bus_cmd_force_en);
1377         set_bit(ND_CMD_CLEAR_ERROR, &acpi_desc->bus_cmd_force_en);
1378 }
1379
1380 static int nfit_test_blk_do_io(struct nd_blk_region *ndbr, resource_size_t dpa,
1381                 void *iobuf, u64 len, int rw)
1382 {
1383         struct nfit_blk *nfit_blk = ndbr->blk_provider_data;
1384         struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1385         struct nd_region *nd_region = &ndbr->nd_region;
1386         unsigned int lane;
1387
1388         lane = nd_region_acquire_lane(nd_region);
1389         if (rw)
1390                 memcpy(mmio->addr.base + dpa, iobuf, len);
1391         else {
1392                 memcpy(iobuf, mmio->addr.base + dpa, len);
1393
1394                 /* give us some some coverage of the mmio_flush_range() API */
1395                 mmio_flush_range(mmio->addr.base + dpa, len);
1396         }
1397         nd_region_release_lane(nd_region, lane);
1398
1399         return 0;
1400 }
1401
1402 static int nfit_test_probe(struct platform_device *pdev)
1403 {
1404         struct nvdimm_bus_descriptor *nd_desc;
1405         struct acpi_nfit_desc *acpi_desc;
1406         struct device *dev = &pdev->dev;
1407         struct nfit_test *nfit_test;
1408         int rc;
1409
1410         nfit_test = to_nfit_test(&pdev->dev);
1411
1412         /* common alloc */
1413         if (nfit_test->num_dcr) {
1414                 int num = nfit_test->num_dcr;
1415
1416                 nfit_test->dimm = devm_kcalloc(dev, num, sizeof(void *),
1417                                 GFP_KERNEL);
1418                 nfit_test->dimm_dma = devm_kcalloc(dev, num, sizeof(dma_addr_t),
1419                                 GFP_KERNEL);
1420                 nfit_test->flush = devm_kcalloc(dev, num, sizeof(void *),
1421                                 GFP_KERNEL);
1422                 nfit_test->flush_dma = devm_kcalloc(dev, num, sizeof(dma_addr_t),
1423                                 GFP_KERNEL);
1424                 nfit_test->label = devm_kcalloc(dev, num, sizeof(void *),
1425                                 GFP_KERNEL);
1426                 nfit_test->label_dma = devm_kcalloc(dev, num,
1427                                 sizeof(dma_addr_t), GFP_KERNEL);
1428                 nfit_test->dcr = devm_kcalloc(dev, num,
1429                                 sizeof(struct nfit_test_dcr *), GFP_KERNEL);
1430                 nfit_test->dcr_dma = devm_kcalloc(dev, num,
1431                                 sizeof(dma_addr_t), GFP_KERNEL);
1432                 if (nfit_test->dimm && nfit_test->dimm_dma && nfit_test->label
1433                                 && nfit_test->label_dma && nfit_test->dcr
1434                                 && nfit_test->dcr_dma && nfit_test->flush
1435                                 && nfit_test->flush_dma)
1436                         /* pass */;
1437                 else
1438                         return -ENOMEM;
1439         }
1440
1441         if (nfit_test->num_pm) {
1442                 int num = nfit_test->num_pm;
1443
1444                 nfit_test->spa_set = devm_kcalloc(dev, num, sizeof(void *),
1445                                 GFP_KERNEL);
1446                 nfit_test->spa_set_dma = devm_kcalloc(dev, num,
1447                                 sizeof(dma_addr_t), GFP_KERNEL);
1448                 if (nfit_test->spa_set && nfit_test->spa_set_dma)
1449                         /* pass */;
1450                 else
1451                         return -ENOMEM;
1452         }
1453
1454         /* per-nfit specific alloc */
1455         if (nfit_test->alloc(nfit_test))
1456                 return -ENOMEM;
1457
1458         nfit_test->setup(nfit_test);
1459         acpi_desc = &nfit_test->acpi_desc;
1460         acpi_nfit_desc_init(acpi_desc, &pdev->dev);
1461         acpi_desc->nfit = nfit_test->nfit_buf;
1462         acpi_desc->blk_do_io = nfit_test_blk_do_io;
1463         nd_desc = &acpi_desc->nd_desc;
1464         nd_desc->provider_name = NULL;
1465         nd_desc->ndctl = nfit_test_ctl;
1466         acpi_desc->nvdimm_bus = nvdimm_bus_register(&pdev->dev, nd_desc);
1467         if (!acpi_desc->nvdimm_bus)
1468                 return -ENXIO;
1469
1470         rc = acpi_nfit_init(acpi_desc, nfit_test->nfit_size);
1471         if (rc) {
1472                 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
1473                 return rc;
1474         }
1475
1476         if (nfit_test->setup != nfit_test0_setup)
1477                 return 0;
1478
1479         nfit_test->setup_hotplug = 1;
1480         nfit_test->setup(nfit_test);
1481
1482         rc = acpi_nfit_init(acpi_desc, nfit_test->nfit_size);
1483         if (rc) {
1484                 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
1485                 return rc;
1486         }
1487
1488         return 0;
1489 }
1490
1491 static int nfit_test_remove(struct platform_device *pdev)
1492 {
1493         struct nfit_test *nfit_test = to_nfit_test(&pdev->dev);
1494         struct acpi_nfit_desc *acpi_desc = &nfit_test->acpi_desc;
1495
1496         nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
1497
1498         return 0;
1499 }
1500
1501 static void nfit_test_release(struct device *dev)
1502 {
1503         struct nfit_test *nfit_test = to_nfit_test(dev);
1504
1505         kfree(nfit_test);
1506 }
1507
1508 static const struct platform_device_id nfit_test_id[] = {
1509         { KBUILD_MODNAME },
1510         { },
1511 };
1512
1513 static struct platform_driver nfit_test_driver = {
1514         .probe = nfit_test_probe,
1515         .remove = nfit_test_remove,
1516         .driver = {
1517                 .name = KBUILD_MODNAME,
1518         },
1519         .id_table = nfit_test_id,
1520 };
1521
1522 static __init int nfit_test_init(void)
1523 {
1524         int rc, i;
1525
1526         nfit_test_setup(nfit_test_lookup);
1527
1528         for (i = 0; i < NUM_NFITS; i++) {
1529                 struct nfit_test *nfit_test;
1530                 struct platform_device *pdev;
1531
1532                 nfit_test = kzalloc(sizeof(*nfit_test), GFP_KERNEL);
1533                 if (!nfit_test) {
1534                         rc = -ENOMEM;
1535                         goto err_register;
1536                 }
1537                 INIT_LIST_HEAD(&nfit_test->resources);
1538                 switch (i) {
1539                 case 0:
1540                         nfit_test->num_pm = NUM_PM;
1541                         nfit_test->num_dcr = NUM_DCR;
1542                         nfit_test->alloc = nfit_test0_alloc;
1543                         nfit_test->setup = nfit_test0_setup;
1544                         break;
1545                 case 1:
1546                         nfit_test->num_pm = 1;
1547                         nfit_test->alloc = nfit_test1_alloc;
1548                         nfit_test->setup = nfit_test1_setup;
1549                         break;
1550                 default:
1551                         rc = -EINVAL;
1552                         goto err_register;
1553                 }
1554                 pdev = &nfit_test->pdev;
1555                 pdev->name = KBUILD_MODNAME;
1556                 pdev->id = i;
1557                 pdev->dev.release = nfit_test_release;
1558                 rc = platform_device_register(pdev);
1559                 if (rc) {
1560                         put_device(&pdev->dev);
1561                         goto err_register;
1562                 }
1563
1564                 rc = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
1565                 if (rc)
1566                         goto err_register;
1567
1568                 instances[i] = nfit_test;
1569         }
1570
1571         rc = platform_driver_register(&nfit_test_driver);
1572         if (rc)
1573                 goto err_register;
1574         return 0;
1575
1576  err_register:
1577         for (i = 0; i < NUM_NFITS; i++)
1578                 if (instances[i])
1579                         platform_device_unregister(&instances[i]->pdev);
1580         nfit_test_teardown();
1581         return rc;
1582 }
1583
1584 static __exit void nfit_test_exit(void)
1585 {
1586         int i;
1587
1588         platform_driver_unregister(&nfit_test_driver);
1589         for (i = 0; i < NUM_NFITS; i++)
1590                 platform_device_unregister(&instances[i]->pdev);
1591         nfit_test_teardown();
1592 }
1593
1594 module_init(nfit_test_init);
1595 module_exit(nfit_test_exit);
1596 MODULE_LICENSE("GPL v2");
1597 MODULE_AUTHOR("Intel Corporation");