/* * P2020 RDB Core1 Device Tree Source in CAMP mode. * * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache * can be shared, all the other devices must be assigned to one core only. * This dts allows core1 to have l2, dma2, eth0, pci1, msi. * * Please note to add "-b 1" for core1's dts compiling. * * Copyright 2009-2011 Freescale Semiconductor Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ /include/ "p2020rdb.dts" / { model = "fsl,P2020RDB"; compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP"; cpus { PowerPC,P2020@0 { status = "disabled"; }; }; localbus@ffe05000 { status = "disabled"; }; soc@ffe00000 { ecm-law@0 { status = "disabled"; }; ecm@1000 { status = "disabled"; }; memory-controller@2000 { status = "disabled"; }; i2c@3000 { status = "disabled"; }; i2c@3100 { status = "disabled"; }; serial0: serial@4500 { status = "disabled"; }; spi@7000 { status = "disabled"; }; gpio: gpio-controller@f000 { status = "disabled"; }; dma@21300 { status = "disabled"; }; usb@22000 { status = "disabled"; }; mdio@24520 { status = "disabled"; }; mdio@25520 { status = "disabled"; }; mdio@26520 { status = "disabled"; }; enet1: ethernet@25000 { status = "disabled"; }; enet2: ethernet@26000 { status = "disabled"; }; sdhci@2e000 { status = "disabled"; }; crypto@30000 { status = "disabled"; }; mpic: pic@40000 { protected-sources = < 17 18 43 42 59 47 /*ecm, mem, i2c, serial0, spi,gpio */ 16 20 21 22 23 28 /* L2, dma1, USB */ 03 35 36 40 31 32 33 /* mdio, enet1, enet2 */ 72 45 58 25 /* sdhci, crypto , pci */ >; }; global-utilities@e0000 { //global utilities block status = "disabled"; }; }; pci0: pcie@ffe08000 { status = "disabled"; }; pci1: pcie@ffe09000 { status = "disabled"; }; };