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Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[cascardo/linux.git]
/
arch
/
blackfin
/
Kconfig
diff --git
a/arch/blackfin/Kconfig
b/arch/blackfin/Kconfig
index
9ceccef
..
f81e7b9
100644
(file)
--- a/
arch/blackfin/Kconfig
+++ b/
arch/blackfin/Kconfig
@@
-34,6
+34,7
@@
config BLACKFIN
select ARCH_WANT_IPC_PARSE_VERSION
select GENERIC_ATOMIC64
select GENERIC_IRQ_PROBE
select ARCH_WANT_IPC_PARSE_VERSION
select GENERIC_ATOMIC64
select GENERIC_IRQ_PROBE
+ select GENERIC_IRQ_SHOW
select HAVE_NMI_WATCHDOG if NMI_WATCHDOG
select GENERIC_SMP_IDLE_THREAD
select ARCH_USES_GETTIMEOFFSET if !GENERIC_CLOCKEVENTS
select HAVE_NMI_WATCHDOG if NMI_WATCHDOG
select GENERIC_SMP_IDLE_THREAD
select ARCH_USES_GETTIMEOFFSET if !GENERIC_CLOCKEVENTS
@@
-51,9
+52,6
@@
config GENERIC_BUG
config ZONE_DMA
def_bool y
config ZONE_DMA
def_bool y
-config GENERIC_GPIO
- def_bool y
-
config FORCE_MAX_ZONEORDER
int
default "14"
config FORCE_MAX_ZONEORDER
int
default "14"
@@
-870,14
+868,6
@@
config SYS_BFIN_SPINLOCK_L1
If enabled, sys_bfin_spinlock function is linked
into L1 instruction memory. (less latency)
If enabled, sys_bfin_spinlock function is linked
into L1 instruction memory. (less latency)
-config IP_CHECKSUM_L1
- bool "Locate IP Checksum function in L1 Memory"
- default n
- depends on !SMP
- help
- If enabled, the IP Checksum function is linked
- into L1 instruction memory. (less latency)
-
config CACHELINE_ALIGNED_L1
bool "Locate cacheline_aligned data to L1 Data Memory"
default y if !BF54x
config CACHELINE_ALIGNED_L1
bool "Locate cacheline_aligned data to L1 Data Memory"
default y if !BF54x