ARM: dts: dra7: Enable gpio controller for GPMC
[cascardo/linux.git] / arch / arm / boot / dts / dra7.dtsi
index 13ac882..e007401 100644 (file)
                                        #size-cells = <1>;
                                        ranges = <0 0x0 0x1400>;
 
-                                       pbias_regulator: pbias_regulator {
+                                       pbias_regulator: pbias_regulator@e00 {
                                                compatible = "ti,pbias-dra7", "ti,pbias-omap";
                                                reg = <0xe00 0x4>;
                                                syscon = <&scm_conf>;
                                        compatible = "syscon";
                                        reg = <0x1c24 0x0024>;
                                };
+
+                               sdma_xbar: dma-router@b78 {
+                                       compatible = "ti,dra7-dma-crossbar";
+                                       reg = <0xb78 0xfc>;
+                                       #dma-cells = <1>;
+                                       dma-requests = <205>;
+                                       ti,dma-safe-map = <0>;
+                                       dma-masters = <&sdma>;
+                               };
+
+                               edma_xbar: dma-router@c78 {
+                                       compatible = "ti,dra7-dma-crossbar";
+                                       reg = <0xc78 0x7c>;
+                                       #dma-cells = <2>;
+                                       dma-requests = <204>;
+                                       ti,dma-safe-map = <0>;
+                                       dma-masters = <&edma>;
+                               };
                        };
 
                        cm_core_aon: cm_core_aon@5000 {
                        dma-requests = <127>;
                };
 
-               sdma_xbar: dma-router@4a002b78 {
-                       compatible = "ti,dra7-dma-crossbar";
-                       reg = <0x4a002b78 0xfc>;
-                       #dma-cells = <1>;
-                       dma-requests = <205>;
-                       ti,dma-safe-map = <0>;
-                       dma-masters = <&sdma>;
+               edma: edma@43300000 {
+                       compatible = "ti,edma3-tpcc";
+                       ti,hwmods = "tpcc";
+                       reg = <0x43300000 0x100000>;
+                       reg-names = "edma3_cc";
+                       interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "edma3_ccint", "emda3_mperr",
+                                         "edma3_ccerrint";
+                       dma-requests = <64>;
+                       #dma-cells = <2>;
+
+                       ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 0>;
+
+                       /*
+                        * memcpy is disabled, can be enabled with:
+                        * ti,edma-memcpy-channels = <20 21>;
+                        * for example. Note that these channels need to be
+                        * masked in the xbar as well.
+                        */
+               };
+
+               edma_tptc0: tptc@43400000 {
+                       compatible = "ti,edma3-tptc";
+                       ti,hwmods = "tptc0";
+                       reg =   <0x43400000 0x100000>;
+                       interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "edma3_tcerrint";
+               };
+
+               edma_tptc1: tptc@43500000 {
+                       compatible = "ti,edma3-tptc";
+                       ti,hwmods = "tptc1";
+                       reg =   <0x43500000 0x100000>;
+                       interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "edma3_tcerrint";
                };
 
                gpio1: gpio@4ae10000 {
                        ti,hwmods = "timer11";
                };
 
+               timer12: timer@4ae20000 {
+                       compatible = "ti,omap5430-timer";
+                       reg = <0x4ae20000 0x80>;
+                       interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+                       ti,hwmods = "timer12";
+                       ti,timer-alwon;
+                       ti,timer-secure;
+               };
+
                timer13: timer@48828000 {
                        compatible = "ti,omap5430-timer";
                        reg = <0x48828000 0x80>;
                        interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer13";
-                       status = "disabled";
                };
 
                timer14: timer@4882a000 {
                        reg = <0x4882a000 0x80>;
                        interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer14";
-                       status = "disabled";
                };
 
                timer15: timer@4882c000 {
                        reg = <0x4882c000 0x80>;
                        interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer15";
-                       status = "disabled";
                };
 
                timer16: timer@4882e000 {
                        reg = <0x4882e000 0x80>;
                        interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "timer16";
-                       status = "disabled";
                };
 
                wdt2: wdt@4ae14000 {
                        #size-cells = <1>;
                        interrupt-controller;
                        #interrupt-cells = <2>;
+                       gpio-controller;
+                       #gpio-cells = <2>;
                        status = "disabled";
                };
 
                        status = "disabled";
                };
 
+               mcasp1: mcasp@48460000 {
+                       compatible = "ti,dra7-mcasp-audio";
+                       ti,hwmods = "mcasp1";
+                       reg = <0x48460000 0x2000>,
+                             <0x45800000 0x1000>;
+                       reg-names = "mpu","dat";
+                       interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tx", "rx";
+                       dmas = <&edma_xbar 129 1>, <&edma_xbar 128 1>;
+                       dma-names = "tx", "rx";
+                       clocks = <&mcasp1_aux_gfclk_mux>, <&mcasp1_ahclkx_mux>,
+                                <&mcasp1_ahclkr_mux>;
+                       clock-names = "fck", "ahclkx", "ahclkr";
+                       status = "disabled";
+               };
+
+               mcasp2: mcasp@48464000 {
+                       compatible = "ti,dra7-mcasp-audio";
+                       ti,hwmods = "mcasp2";
+                       reg = <0x48464000 0x2000>,
+                             <0x45c00000 0x1000>;
+                       reg-names = "mpu","dat";
+                       interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tx", "rx";
+                       dmas = <&edma_xbar 131 1>, <&edma_xbar 130 1>;
+                       dma-names = "tx", "rx";
+                       clocks = <&mcasp2_aux_gfclk_mux>, <&mcasp2_ahclkx_mux>,
+                                <&mcasp2_ahclkr_mux>;
+                       clock-names = "fck", "ahclkx", "ahclkr";
+                       status = "disabled";
+               };
+
                mcasp3: mcasp@48468000 {
                        compatible = "ti,dra7-mcasp-audio";
                        ti,hwmods = "mcasp3";
-                       reg = <0x48468000 0x2000>;
-                       reg-names = "mpu";
+                       reg = <0x48468000 0x2000>,
+                             <0x46000000 0x1000>;
+                       reg-names = "mpu","dat";
                        interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "tx", "rx";
-                       dmas = <&sdma_xbar 133>, <&sdma_xbar 132>;
+                       dmas = <&edma_xbar 133 1>, <&edma_xbar 132 1>;
                        dma-names = "tx", "rx";
                        clocks = <&mcasp3_aux_gfclk_mux>, <&mcasp3_ahclkx_mux>;
                        clock-names = "fck", "ahclkx";
                        status = "disabled";
                };
 
+               mcasp4: mcasp@4846c000 {
+                       compatible = "ti,dra7-mcasp-audio";
+                       ti,hwmods = "mcasp4";
+                       reg = <0x4846c000 0x2000>,
+                             <0x48436000 0x1000>;
+                       reg-names = "mpu","dat";
+                       interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tx", "rx";
+                       dmas = <&edma_xbar 135 1>, <&edma_xbar 134 1>;
+                       dma-names = "tx", "rx";
+                       clocks = <&mcasp4_aux_gfclk_mux>, <&mcasp4_ahclkx_mux>;
+                       clock-names = "fck", "ahclkx";
+                       status = "disabled";
+               };
+
+               mcasp5: mcasp@48470000 {
+                       compatible = "ti,dra7-mcasp-audio";
+                       ti,hwmods = "mcasp5";
+                       reg = <0x48470000 0x2000>,
+                             <0x4843a000 0x1000>;
+                       reg-names = "mpu","dat";
+                       interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tx", "rx";
+                       dmas = <&edma_xbar 137 1>, <&edma_xbar 136 1>;
+                       dma-names = "tx", "rx";
+                       clocks = <&mcasp5_aux_gfclk_mux>, <&mcasp5_ahclkx_mux>;
+                       clock-names = "fck", "ahclkx";
+                       status = "disabled";
+               };
+
+               mcasp6: mcasp@48474000 {
+                       compatible = "ti,dra7-mcasp-audio";
+                       ti,hwmods = "mcasp6";
+                       reg = <0x48474000 0x2000>,
+                             <0x4844c000 0x1000>;
+                       reg-names = "mpu","dat";
+                       interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tx", "rx";
+                       dmas = <&edma_xbar 139 1>, <&edma_xbar 138 1>;
+                       dma-names = "tx", "rx";
+                       clocks = <&mcasp6_aux_gfclk_mux>, <&mcasp6_ahclkx_mux>;
+                       clock-names = "fck", "ahclkx";
+                       status = "disabled";
+               };
+
+               mcasp7: mcasp@48478000 {
+                       compatible = "ti,dra7-mcasp-audio";
+                       ti,hwmods = "mcasp7";
+                       reg = <0x48478000 0x2000>,
+                             <0x48450000 0x1000>;
+                       reg-names = "mpu","dat";
+                       interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tx", "rx";
+                       dmas = <&edma_xbar 141 1>, <&edma_xbar 140 1>;
+                       dma-names = "tx", "rx";
+                       clocks = <&mcasp7_aux_gfclk_mux>, <&mcasp7_ahclkx_mux>;
+                       clock-names = "fck", "ahclkx";
+                       status = "disabled";
+               };
+
+               mcasp8: mcasp@4847c000 {
+                       compatible = "ti,dra7-mcasp-audio";
+                       ti,hwmods = "mcasp8";
+                       reg = <0x4847c000 0x2000>,
+                             <0x48454000 0x1000>;
+                       reg-names = "mpu","dat";
+                       interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tx", "rx";
+                       dmas = <&edma_xbar 143 1>, <&edma_xbar 142 1>;
+                       dma-names = "tx", "rx";
+                       clocks = <&mcasp8_aux_gfclk_mux>, <&mcasp8_ahclkx_mux>;
+                       clock-names = "fck", "ahclkx";
+                       status = "disabled";
+               };
+
                crossbar_mpu: crossbar@4a002a48 {
                        compatible = "ti,irq-crossbar";
                        reg = <0x4a002a48 0x130>;