Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivi...
[cascardo/linux.git] / arch / arm / boot / dts / imx51-babbage.dts
index 6484b73..6bc3243 100644 (file)
        model = "Freescale i.MX51 Babbage Board";
        compatible = "fsl,imx51-babbage", "fsl,imx51";
 
+       chosen {
+               stdout-path = &uart1;
+       };
+
        memory {
                reg = <0x90000000 0x20000000>;
        };
                usbh1phy: usbh1phy@0 {
                        compatible = "usb-nop-xceiv";
                        reg = <0>;
-                       clocks = <&clks 0>;
+                       clocks = <&clks IMX5_CLK_DUMMY>;
                        clock-names = "main_clk";
                };
        };
        status = "okay";
 
        pmic: mc13892@0 {
-               #address-cells = <1>;
-               #size-cells = <0>;
                compatible = "fsl,mc13892";
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_pmic>;
        status = "okay";
 };
 
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+};
+
 &i2c2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_i2c2>;
 
                pinctrl_fec: fecgrp {
                        fsl,pins = <
-                               MX51_PAD_EIM_EB2__FEC_MDIO              0x80000000
-                               MX51_PAD_EIM_EB3__FEC_RDATA1            0x80000000
-                               MX51_PAD_EIM_CS2__FEC_RDATA2            0x80000000
-                               MX51_PAD_EIM_CS3__FEC_RDATA3            0x80000000
-                               MX51_PAD_EIM_CS4__FEC_RX_ER             0x80000000
-                               MX51_PAD_EIM_CS5__FEC_CRS               0x80000000
-                               MX51_PAD_NANDF_RB2__FEC_COL             0x80000000
-                               MX51_PAD_NANDF_RB3__FEC_RX_CLK          0x80000000
-                               MX51_PAD_NANDF_D9__FEC_RDATA0           0x80000000
-                               MX51_PAD_NANDF_D8__FEC_TDATA0           0x80000000
-                               MX51_PAD_NANDF_CS2__FEC_TX_ER           0x80000000
-                               MX51_PAD_NANDF_CS3__FEC_MDC             0x80000000
-                               MX51_PAD_NANDF_CS4__FEC_TDATA1          0x80000000
-                               MX51_PAD_NANDF_CS5__FEC_TDATA2          0x80000000
-                               MX51_PAD_NANDF_CS6__FEC_TDATA3          0x80000000
-                               MX51_PAD_NANDF_CS7__FEC_TX_EN           0x80000000
-                               MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK      0x80000000
-                               MX51_PAD_EIM_A20__GPIO2_14              0x85 /* Reset */
+                               MX51_PAD_EIM_EB2__FEC_MDIO              0x000001f5
+                               MX51_PAD_EIM_EB3__FEC_RDATA1            0x00000085
+                               MX51_PAD_EIM_CS2__FEC_RDATA2            0x00000085
+                               MX51_PAD_EIM_CS3__FEC_RDATA3            0x00000085
+                               MX51_PAD_EIM_CS4__FEC_RX_ER             0x00000180
+                               MX51_PAD_EIM_CS5__FEC_CRS               0x00000180
+                               MX51_PAD_NANDF_RB2__FEC_COL             0x00000180
+                               MX51_PAD_NANDF_RB3__FEC_RX_CLK          0x00000180
+                               MX51_PAD_NANDF_D9__FEC_RDATA0           0x00002180
+                               MX51_PAD_NANDF_D8__FEC_TDATA0           0x00002004
+                               MX51_PAD_NANDF_CS2__FEC_TX_ER           0x00002004
+                               MX51_PAD_NANDF_CS3__FEC_MDC             0x00002004
+                               MX51_PAD_NANDF_CS4__FEC_TDATA1          0x00002004
+                               MX51_PAD_NANDF_CS5__FEC_TDATA2          0x00002004
+                               MX51_PAD_NANDF_CS6__FEC_TDATA3          0x00002004
+                               MX51_PAD_NANDF_CS7__FEC_TX_EN           0x00002004
+                               MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK      0x00002180
+                               MX51_PAD_NANDF_D11__FEC_RX_DV           0x000020a4
+                               MX51_PAD_EIM_A20__GPIO2_14              0x00000085 /* Phy Reset */
                        >;
                };
 
                        >;
                };
 
+               pinctrl_i2c1: i2c1grp {
+                       fsl,pins = <
+                               MX51_PAD_EIM_D19__I2C1_SCL              0x400001ed
+                               MX51_PAD_EIM_D16__I2C1_SDA              0x400001ed
+                       >;
+               };
+
                pinctrl_i2c2: i2c2grp {
                        fsl,pins = <
                                MX51_PAD_KEY_COL4__I2C2_SCL             0x400001ed