Merge remote-tracking branch 'mkp-scsi/4.5/scsi-fixes' into fixes
[cascardo/linux.git] / arch / arm / boot / dts / imx6q.dtsi
index 399103b..0d93c0e 100644 (file)
@@ -14,6 +14,7 @@
 
 / {
        aliases {
+               ipu1 = &ipu2;
                spi4 = &ecspi5;
        };
 
 
                        iomuxc: iomuxc@020e0000 {
                                compatible = "fsl,imx6q-iomuxc";
-
-                               ipu2 {
-                                       pinctrl_ipu2_1: ipu2grp-1 {
-                                               fsl,pins = <
-                                                       MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0x10
-                                                       MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15       0x10
-                                                       MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02        0x10
-                                                       MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03        0x10
-                                                       MX6QDL_PAD_DI0_PIN4__IPU2_DI0_PIN04        0x80000000
-                                                       MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00   0x10
-                                                       MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01   0x10
-                                                       MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02   0x10
-                                                       MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03   0x10
-                                                       MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04   0x10
-                                                       MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05   0x10
-                                                       MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06   0x10
-                                                       MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07   0x10
-                                                       MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08   0x10
-                                                       MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09   0x10
-                                                       MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10  0x10
-                                                       MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11  0x10
-                                                       MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12  0x10
-                                                       MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13  0x10
-                                                       MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14  0x10
-                                                       MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15  0x10
-                                                       MX6QDL_PAD_DISP0_DAT16__IPU2_DISP0_DATA16  0x10
-                                                       MX6QDL_PAD_DISP0_DAT17__IPU2_DISP0_DATA17  0x10
-                                                       MX6QDL_PAD_DISP0_DAT18__IPU2_DISP0_DATA18  0x10
-                                                       MX6QDL_PAD_DISP0_DAT19__IPU2_DISP0_DATA19  0x10
-                                                       MX6QDL_PAD_DISP0_DAT20__IPU2_DISP0_DATA20  0x10
-                                                       MX6QDL_PAD_DISP0_DAT21__IPU2_DISP0_DATA21  0x10
-                                                       MX6QDL_PAD_DISP0_DAT22__IPU2_DISP0_DATA22  0x10
-                                                       MX6QDL_PAD_DISP0_DAT23__IPU2_DISP0_DATA23  0x10
-                                               >;
-                                       };
-                               };
                        };
                };
 
                        status = "disabled";
                };
 
+               gpu_vg: gpu@02204000 {
+                       compatible = "vivante,gc";
+                       reg = <0x02204000 0x4000>;
+                       interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clks IMX6QDL_CLK_OPENVG_AXI>,
+                                <&clks IMX6QDL_CLK_GPU2D_CORE>;
+                       clock-names = "bus", "core";
+                       power-domains = <&gpc 1>;
+               };
+
                ipu2: ipu@02800000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                compatible = "fsl,imx-display-subsystem";
                ports = <&ipu1_di0>, <&ipu1_di1>, <&ipu2_di0>, <&ipu2_di1>;
        };
+
+       gpu-subsystem {
+               compatible = "fsl,imx-gpu-subsystem";
+               cores = <&gpu_2d>, <&gpu_3d>, <&gpu_vg>;
+       };
 };
 
 &hdmi {