ARM: efm32: properly namespace i2c location property

[cascardo/linux.git] / arch / arm / boot / dts / omap5.dtsi

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index ab9a21a..a72813a 100644 (file)
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -117,6 +117,58 @@
                interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 
+               prm: prm@4ae06000 {
+                       compatible = "ti,omap5-prm";
+                       reg = <0x4ae06000 0x3000>;
+
+                       prm_clocks: clocks {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+
+                       prm_clockdomains: clockdomains {
+                       };
+               };
+
+               cm_core_aon: cm_core_aon@4a004000 {
+                       compatible = "ti,omap5-cm-core-aon";
+                       reg = <0x4a004000 0x2000>;
+
+                       cm_core_aon_clocks: clocks {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+
+                       cm_core_aon_clockdomains: clockdomains {
+                       };
+               };
+
+               scrm: scrm@4ae0a000 {
+                       compatible = "ti,omap5-scrm";
+                       reg = <0x4ae0a000 0x2000>;
+
+                       scrm_clocks: clocks {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+
+                       scrm_clockdomains: clockdomains {
+                       };
+               };
+
+               cm_core: cm_core@4a008000 {
+                       compatible = "ti,omap5-cm-core";
+                       reg = <0x4a008000 0x3000>;
+
+                       cm_core_clocks: clocks {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+
+                       cm_core_clockdomains: clockdomains {
+                       };
+               };
+
                counter32k: counter@4ae04000 {
                        compatible = "ti,omap-counter32k";
                        reg = <0x4ae04000 0x40>;
@@ -751,3 +803,5 @@
                };
        };
 };
+
+/include/ "omap54xx-clocks.dtsi"