ARM: dts: stm32429i-eval: Add USB HS host mode support

[cascardo/linux.git] / arch / arm / boot / dts / stm32f429.dtsi

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 5e1e234..ee82756 100644 (file)
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -46,6 +46,7 @@
  */
 
 #include "armv7-m.dtsi"
+#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>
 
 / {
        clocks {
@@ -57,6 +58,8 @@
        };
 
        soc {
+               dma-ranges = <0xc0000000 0x0 0x10000000>;
+
                timer2: timer@40000000 {
                        compatible = "st,stm32-timer";
                        reg = <0x40000000 0x400>;
@@ -168,6 +171,135 @@
                        status = "disabled";
                };
 
+               pin-controller {
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       compatible = "st,stm32f429-pinctrl";
+                       ranges = <0 0x40020000 0x3000>;
+                       pins-are-numbered;
+
+                       gpioa: gpio@40020000 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               reg = <0x0 0x400>;
+                               clocks = <&rcc 0 0>;
+                               st,bank-name = "GPIOA";
+                       };
+
+                       gpiob: gpio@40020400 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               reg = <0x400 0x400>;
+                               clocks = <&rcc 0 1>;
+                               st,bank-name = "GPIOB";
+                       };
+
+                       gpioc: gpio@40020800 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               reg = <0x800 0x400>;
+                               clocks = <&rcc 0 2>;
+                               st,bank-name = "GPIOC";
+                       };
+
+                       gpiod: gpio@40020c00 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               reg = <0xc00 0x400>;
+                               clocks = <&rcc 0 3>;
+                               st,bank-name = "GPIOD";
+                       };
+
+                       gpioe: gpio@40021000 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               reg = <0x1000 0x400>;
+                               clocks = <&rcc 0 4>;
+                               st,bank-name = "GPIOE";
+                       };
+
+                       gpiof: gpio@40021400 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               reg = <0x1400 0x400>;
+                               clocks = <&rcc 0 5>;
+                               st,bank-name = "GPIOF";
+                       };
+
+                       gpiog: gpio@40021800 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               reg = <0x1800 0x400>;
+                               clocks = <&rcc 0 6>;
+                               st,bank-name = "GPIOG";
+                       };
+
+                       gpioh: gpio@40021c00 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               reg = <0x1c00 0x400>;
+                               clocks = <&rcc 0 7>;
+                               st,bank-name = "GPIOH";
+                       };
+
+                       gpioi: gpio@40022000 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               reg = <0x2000 0x400>;
+                               clocks = <&rcc 0 8>;
+                               st,bank-name = "GPIOI";
+                       };
+
+                       gpioj: gpio@40022400 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               reg = <0x2400 0x400>;
+                               clocks = <&rcc 0 9>;
+                               st,bank-name = "GPIOJ";
+                       };
+
+                       gpiok: gpio@40022800 {
+                               gpio-controller;
+                               #gpio-cells = <2>;
+                               reg = <0x2800 0x400>;
+                               clocks = <&rcc 0 10>;
+                               st,bank-name = "GPIOK";
+                       };
+
+                       usart1_pins_a: usart1@0 {
+                               pins1 {
+                                       pinmux = <STM32F429_PA9_FUNC_USART1_TX>;
+                                       bias-disable;
+                                       drive-push-pull;
+                                       slew-rate = <0>;
+                               };
+                               pins2 {
+                                       pinmux = <STM32F429_PA10_FUNC_USART1_RX>;
+                                       bias-disable;
+                               };
+                       };
+
+                       usbotg_hs_pins_a: usbotg_hs@0 {
+                               pins {
+                                       pinmux = <STM32F429_PH4_FUNC_OTG_HS_ULPI_NXT>,
+                                                <STM32F429_PI11_FUNC_OTG_HS_ULPI_DIR>,
+                                                <STM32F429_PC0_FUNC_OTG_HS_ULPI_STP>,
+                                                <STM32F429_PA5_FUNC_OTG_HS_ULPI_CK>,
+                                                <STM32F429_PA3_FUNC_OTG_HS_ULPI_D0>,
+                                                <STM32F429_PB0_FUNC_OTG_HS_ULPI_D1>,
+                                                <STM32F429_PB1_FUNC_OTG_HS_ULPI_D2>,
+                                                <STM32F429_PB10_FUNC_OTG_HS_ULPI_D3>,
+                                                <STM32F429_PB11_FUNC_OTG_HS_ULPI_D4>,
+                                                <STM32F429_PB12_FUNC_OTG_HS_ULPI_D5>,
+                                                <STM32F429_PB13_FUNC_OTG_HS_ULPI_D6>,
+                                                <STM32F429_PB5_FUNC_OTG_HS_ULPI_D7>;
+                                       bias-disable;
+                                       drive-push-pull;
+                                       slew-rate = <2>;
+                               };
+                       };
+               };
+
                rcc: rcc@40023810 {
                        #clock-cells = <2>;
                        compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
@@ -175,6 +307,47 @@
                        clocks = <&clk_hse>;
                };
 
+               dma1: dma-controller@40026000 {
+                       compatible = "st,stm32-dma";
+                       reg = <0x40026000 0x400>;
+                       interrupts = <11>,
+                                    <12>,
+                                    <13>,
+                                    <14>,
+                                    <15>,
+                                    <16>,
+                                    <17>,
+                                    <47>;
+                       clocks = <&rcc 0 21>;
+                       #dma-cells = <4>;
+               };
+
+               dma2: dma-controller@40026400 {
+                       compatible = "st,stm32-dma";
+                       reg = <0x40026400 0x400>;
+                       interrupts = <56>,
+                                    <57>,
+                                    <58>,
+                                    <59>,
+                                    <60>,
+                                    <68>,
+                                    <69>,
+                                    <70>;
+                       clocks = <&rcc 0 22>;
+                       #dma-cells = <4>;
+                       st,mem2mem;
+               };
+
+               usbotg_hs: usb@40040000 {
+                       compatible = "snps,dwc2";
+                       dma-ranges;
+                       reg = <0x40040000 0x40000>;
+                       interrupts = <77>;
+                       clocks = <&rcc 0 29>;
+                       clock-names = "otg";
+                       status = "disabled";
+               };
+
                rng: rng@50060800 {
                        compatible = "st,stm32-rng";
                        reg = <0x50060800 0x400>;